Convert Marvell ARM platforms to FDT convention.

The following systems are involved:

  - DB-88F5182
  - DB-88F5281
  - DB-88F6281
  - DB-78100
  - SheevaPlug

This overhaul covers the following major changes:

  - All integrated peripherals drivers for Marvell ARM SoC, which are
    currently in the FreeBSD source tree are reworked and adjusted so they
    derive config data out of the device tree blob (instead of hard coded /
    tabelarized values).

  - Since the common FDT infrastrucutre (fdtbus, simplebus) is used we say
    good by to obio / mbus drivers and numerous hard-coded config data.

Note that world needs to be built WITH_FDT for the affected platforms.

Reviewed by:	imp
Sponsored by:	The FreeBSD Foundation.

1 files changed, 1 insertions, 72 deletions

diff --git a/sys/arm/mv/mvvar.h b/sys/arm/mv/mvvar.h
index 7d7de32..c0e5512 100644
--- a/sys/arm/mv/mvvar.h
+++ b/sys/arm/mv/mvvar.h
@@ -48,51 +48,6 @@
 
 #define	MV_TYPE_PCI		0
 #define	MV_TYPE_PCIE		1
-#define	MV_TYPE_PCIE_AGGR_LANE	2	/* Additional PCIE lane to aggregate */
-
-struct obio_softc {
-	bus_space_tag_t obio_bst;	/* bus space tag */
-	struct rman	obio_mem;
-	struct rman	obio_irq;
-	struct rman	obio_gpio;
-};
-
-struct obio_device {
-	const char	*od_name;
-	u_long		od_base;
-	u_long		od_size;
-	u_int		od_irqs[7 + 1];	/* keep additional entry for -1 sentinel */
-	u_int		od_gpio[2 + 1]; /* as above for IRQ */
-	u_int		od_pwr_mask;
-	struct resource_list od_resources;
-};
-
-struct obio_pci_irq_map {
-	int		opim_slot;
-	int		opim_pin;
-	int		opim_irq;
-};
-
-struct obio_pci {
-	int		op_type;
-
-	bus_addr_t	op_base;
-	u_long		op_size;
-
-	/* Note IO/MEM regions are assumed VA == PA */
-	bus_addr_t	op_io_base;
-	u_long		op_io_size;
-	int		op_io_win_target;
-	int		op_io_win_attr;
-
-	bus_addr_t	op_mem_base;
-	u_long		op_mem_size;
-	int		op_mem_win_target;
-	int		op_mem_win_attr;
-
-	const struct obio_pci_irq_map	*op_pci_irq_map;
-	int		op_irq;		/* used if IRQ map table is NULL */
-};
 
 struct gpio_config {
 	int		gc_gpio;	/* GPIO number */
@@ -109,14 +64,9 @@ struct decode_win {
 };
 
 extern const struct pmap_devmap pmap_devmap[];
-extern const struct obio_pci mv_pci_info[];
 extern const struct gpio_config mv_gpio_config[];
-extern bus_space_tag_t obio_tag;
-extern struct obio_device obio_devices[];
-extern const struct decode_win *cpu_wins;
 extern const struct decode_win *idma_wins;
 extern const struct decode_win *xor_wins;
-extern int cpu_wins_no;
 extern int idma_wins_no;
 extern int xor_wins_no;
 
@@ -125,14 +75,12 @@ int mv_gpio_setup_intrhandler(const char *name, driver_filter_t *filt,
     void (*hand)(void *), void *arg, int pin, int flags, void **cookiep);
 void mv_gpio_intr_mask(int pin);
 void mv_gpio_intr_unmask(int pin);
-int mv_gpio_configure(uint32_t pin, uint32_t flags, uint32_t mask);
 void mv_gpio_out(uint32_t pin, uint8_t val, uint8_t enable);
 uint8_t mv_gpio_in(uint32_t pin);
+int platform_gpio_init(void);
 
-void platform_mpp_init(void);
 int soc_decode_win(void);
 void soc_id(uint32_t *dev, uint32_t *rev);
-void soc_identify(void);
 void soc_dump_decode_win(void);
 uint32_t soc_power_ctrl_get(uint32_t mask);
 void soc_power_ctrl_set(uint32_t mask);
@@ -142,14 +90,6 @@ int decode_win_cpu_set(int target, int attr, vm_paddr_t base, uint32_t size,
 int decode_win_overlap(int, int, const struct decode_win *);
 int win_cpu_can_remap(int);
 
-void decode_win_idma_dump(void);
-void decode_win_idma_setup(void);
-int decode_win_idma_valid(void);
-
-void decode_win_xor_dump(void);
-void decode_win_xor_setup(void);
-int decode_win_xor_valid(void);
-
 int ddr_is_active(int i);
 uint32_t ddr_base(int i);
 uint32_t ddr_size(int i);
@@ -161,15 +101,4 @@ uint32_t get_tclk(void);
 uint32_t read_cpu_ctrl(uint32_t);
 void write_cpu_ctrl(uint32_t, uint32_t);
 
-enum mbus_device_ivars {
-	MBUS_IVAR_BASE,
-};
-
-#define	MBUS_ACCESSOR(var, ivar, type)	\
-	__BUS_ACCESSOR(mbus, var, MBUS, ivar, type)
-
-MBUS_ACCESSOR(base,	BASE,	u_long)
-
-#undef	MBUS_ACCESSOR
-
 #endif /* _MVVAR_H_ */