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authorcognet <cognet@FreeBSD.org>2009-02-12 23:23:30 +0000
committercognet <cognet@FreeBSD.org>2009-02-12 23:23:30 +0000
commita4557d874cea19c85b904233ff0bc7ec8fc632ee (patch)
tree12b428cc8123665fb6db4a1437aa7d2d1f139c8c /sys/arm/include/sysarch.h
parentfd95932030a1e694173ce5b6c7d417ad5938b302 (diff)
downloadFreeBSD-src-a4557d874cea19c85b904233ff0bc7ec8fc632ee.zip
FreeBSD-src-a4557d874cea19c85b904233ff0bc7ec8fc632ee.tar.gz
To prevent various race conditions in the RAS code, store and restore the
values in ARM_RAS_START and ARM_RAS_END at context switch time. MFC after: 1 week
Diffstat (limited to 'sys/arm/include/sysarch.h')
-rw-r--r--sys/arm/include/sysarch.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/sys/arm/include/sysarch.h b/sys/arm/include/sysarch.h
index 5623fd7..12db4df 100644
--- a/sys/arm/include/sysarch.h
+++ b/sys/arm/include/sysarch.h
@@ -42,6 +42,9 @@
* The ARM_TP_ADDRESS points to a special purpose page, which is used as local
* store for the ARM per-thread data and Restartable Atomic Sequences support.
* Put it just above the "high" vectors' page.
+ * the cpu_switch() code assumes ARM_RAS_START is ARM_TP_ADDRESS + 4, and
+ * ARM_RAS_END is ARM_TP_ADDRESS + 8, so if that ever changes, be sure to
+ * update the cpu_switch() (and cpu_throw()) code as well.
*/
#define ARM_TP_ADDRESS (ARM_VECTORS_HIGH + 0x1000)
#define ARM_RAS_START (ARM_TP_ADDRESS + 4)
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