Improve ARM_TP_ADDRESS and RAS area.

De-hardcode usage of ARM_TP_ADDRESS and RAS local storage, and move this
special purpose page to a more convenient place i.e. after the vectors high
page, more towards the end of address space. Previous location (0xe000_0000)
caused grief if KVA was to go beyond the default limit.

Note that ARM world rebuilding is required after this change since the
location of ARM_TP_ADDRESS is shared between kernel and userland.

Submitted by:	Grzegorz Bernacki (gjb AT semihalf dot com)
Reviewed by:	imp
Approved by:	cognet (mentor)

1 files changed, 29 insertions, 54 deletions

diff --git a/sys/arm/include/atomic.h b/sys/arm/include/atomic.h
index bed5a72..6a33699 100644
--- a/sys/arm/include/atomic.h
+++ b/sys/arm/include/atomic.h
@@ -39,12 +39,14 @@
 #ifndef	_MACHINE_ATOMIC_H_
 #define	_MACHINE_ATOMIC_H_
 
-
-
 #ifndef _LOCORE
 
 #include <sys/types.h>
 
+#ifndef _KERNEL
+#include <machine/sysarch.h>
+#endif
+
 #ifndef I32_bit
 #define I32_bit (1 << 7)        /* IRQ disable */
 #endif
@@ -71,9 +73,6 @@
 			: "cc" );		\
 	} while(0)
 
-#define ARM_RAS_START	0xe0000004
-#define ARM_RAS_END	0xe0000008
-
 static __inline uint32_t
 __swp(uint32_t val, volatile uint32_t *ptr)
 {
@@ -145,28 +144,24 @@ atomic_fetchadd_32(volatile uint32_t *p, uint32_t v)
 static __inline u_int32_t
 atomic_cmpset_32(volatile u_int32_t *p, volatile u_int32_t cmpval, volatile u_int32_t newval)
 {
-	register int done, ras_start;
+	register int done, ras_start = ARM_RAS_START;
 
 	__asm __volatile("1:\n"
 	    "adr	%1, 1b\n"
-	    "mov	%0, #0xe0000004\n"
 	    "str	%1, [%0]\n"
-	    "mov	%0, #0xe0000008\n"
 	    "adr	%1, 2f\n"
-	    "str	%1, [%0]\n"
+	    "str	%1, [%0, #4]\n"
 	    "ldr	%1, [%2]\n"
 	    "cmp	%1, %3\n"
 	    "streq	%4, [%2]\n"
 	    "2:\n"
 	    "mov	%1, #0\n"
-	    "mov	%0, #0xe0000004\n"
 	    "str	%1, [%0]\n"
 	    "mov	%1, #0xffffffff\n"
-	    "mov	%0, #0xe0000008\n"
-	    "str	%1, [%0]\n"
+	    "str	%1, [%0, #4]\n"
 	    "moveq	%1, #1\n"
 	    "movne	%1, #0\n"
-	    : "=r" (ras_start), "=r" (done)
+	    : "+r" (ras_start), "=r" (done)
 	    ,"+r" (p), "+r" (cmpval), "+r" (newval) : : "memory");
 	return (done);
 }
@@ -174,106 +169,90 @@ atomic_cmpset_32(volatile u_int32_t *p, volatile u_int32_t cmpval, volatile u_in
 static __inline void
 atomic_add_32(volatile u_int32_t *p, u_int32_t val)
 {
-	int ras_start, start;
+	int start, ras_start = ARM_RAS_START;
 
 	__asm __volatile("1:\n"
 	    "adr	%1, 1b\n"
-	    "mov	%0, #0xe0000004\n"
 	    "str	%1, [%0]\n"
-	    "mov	%0, #0xe0000008\n"
 	    "adr	%1, 2f\n"
-	    "str	%1, [%0]\n"
+	    "str	%1, [%0, #4]\n"
 	    "ldr	%1, [%2]\n"
 	    "add	%1, %1, %3\n"
 	    "str	%1, [%2]\n"
 	    "2:\n"
-	    "mov	%0, #0xe0000004\n"
 	    "mov	%1, #0\n"
 	    "str	%1, [%0]\n"
 	    "mov	%1, #0xffffffff\n"
-	    "mov	%0, #0xe0000008\n"
-	    "str	%1, [%0]\n"
-	    : "=r" (ras_start), "=r" (start), "+r" (p), "+r" (val)
+	    "str	%1, [%0, #4]\n"
+	    : "+r" (ras_start), "=r" (start), "+r" (p), "+r" (val)
 	    : : "memory");
 }
 
 static __inline void
 atomic_subtract_32(volatile u_int32_t *p, u_int32_t val)
 {
-	int ras_start, start;
+	int start, ras_start = ARM_RAS_START;
 
 	__asm __volatile("1:\n"
 	    "adr	%1, 1b\n"
-	    "mov	%0, #0xe0000004\n"
 	    "str	%1, [%0]\n"
-	    "mov	%0, #0xe0000008\n"
 	    "adr	%1, 2f\n"
-	    "str	%1, [%0]\n"
+	    "str	%1, [%0, #4]\n"
 	    "ldr	%1, [%2]\n"
 	    "sub	%1, %1, %3\n"
 	    "str	%1, [%2]\n"
 	    "2:\n"
-	    "mov	%0, #0xe0000004\n"
 	    "mov	%1, #0\n"
 	    "str	%1, [%0]\n"
 	    "mov	%1, #0xffffffff\n"
-	    "mov	%0, #0xe0000008\n"
-	    "str	%1, [%0]\n"
+	    "str	%1, [%0, #4]\n"
 
-	    : "=r" (ras_start), "=r" (start), "+r" (p), "+r" (val)
+	    : "+r" (ras_start), "=r" (start), "+r" (p), "+r" (val)
 	    : : "memory");
 }
 
 static __inline void
 atomic_set_32(volatile uint32_t *address, uint32_t setmask)
 {
-	int ras_start, start;
+	int start, ras_start = ARM_RAS_START;
 
 	__asm __volatile("1:\n"
 	    "adr	%1, 1b\n"
-	    "mov	%0, #0xe0000004\n"
 	    "str	%1, [%0]\n"
-	    "mov	%0, #0xe0000008\n"
 	    "adr	%1, 2f\n"
-	    "str	%1, [%0]\n"
+	    "str	%1, [%0, #4]\n"
 	    "ldr	%1, [%2]\n"
 	    "orr	%1, %1, %3\n"
 	    "str	%1, [%2]\n"
 	    "2:\n"
-	    "mov	%0, #0xe0000004\n"
 	    "mov	%1, #0\n"
 	    "str	%1, [%0]\n"
 	    "mov	%1, #0xffffffff\n"
-	    "mov	%0, #0xe0000008\n"
-	    "str	%1, [%0]\n"
+	    "str	%1, [%0, #4]\n"
 
-	    : "=r" (ras_start), "=r" (start), "+r" (address), "+r" (setmask)
+	    : "+r" (ras_start), "=r" (start), "+r" (address), "+r" (setmask)
 	    : : "memory");
 }
 
 static __inline void
 atomic_clear_32(volatile uint32_t *address, uint32_t clearmask)
 {
-	int ras_start, start;
+	int start, ras_start = ARM_RAS_START;
 
 	__asm __volatile("1:\n"
 	    "adr	%1, 1b\n"
-	    "mov	%0, #0xe0000004\n"
 	    "str	%1, [%0]\n"
-	    "mov	%0, #0xe0000008\n"
 	    "adr	%1, 2f\n"
-	    "str	%1, [%0]\n"
+	    "str	%1, [%0, #4]\n"
 	    "ldr	%1, [%2]\n"
 	    "bic	%1, %1, %3\n"
 	    "str	%1, [%2]\n"
 	    "2:\n"
-	    "mov	%0, #0xe0000004\n"
 	    "mov	%1, #0\n"
 	    "str	%1, [%0]\n"
 	    "mov	%1, #0xffffffff\n"
-	    "mov	%0, #0xe0000008\n"
-	    "str	%1, [%0]\n"
-	    : "=r" (ras_start), "=r" (start), "+r" (address), "+r" (clearmask)
+	    "str	%1, [%0, #4]\n"
+	    : "+r" (ras_start), "=r" (start), "+r" (address), "+r" (clearmask)
 	    : : "memory");
 
 }
@@ -281,26 +260,22 @@ atomic_clear_32(volatile uint32_t *address, uint32_t clearmask)
 static __inline uint32_t
 atomic_fetchadd_32(volatile uint32_t *p, uint32_t v)
 {
-	uint32_t ras_start, start;
+	uint32_t start, ras_start = ARM_RAS_START;
 
 	__asm __volatile("1:\n"
 	    "adr	%1, 1b\n"
-	    "mov	%0, #0xe0000004\n"
 	    "str	%1, [%0]\n"
-	    "mov	%0, #0xe0000008\n"
 	    "adr	%1, 2f\n"
-	    "str	%1, [%0]\n"
+	    "str	%1, [%0, #4]\n"
 	    "ldr	%1, [%2]\n"
-	    "add	%0, %1, %3\n"
+	    "add	%1, %1, %3\n"
 	    "str	%0, [%2]\n"
 	    "2:\n"
-	    "mov	%0, #0xe0000004\n"
 	    "mov	%3, #0\n"
 	    "str	%3, [%0]\n"
-	    "mov	%0, #0xe0000008\n"
 	    "mov	%3, #0xffffffff\n"
-	    "str	%3, [%0]\n"
-	    : "=r" (ras_start), "=r" (start), "+r" (p), "+r" (v)
+	    "str	%3, [%0, #4]\n"
+	    : "+r" (ras_start), "=r" (start), "+r" (p), "+r" (v)
 	    : : "memory");
 	return (start);
 }