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authorimp <imp@FreeBSD.org>2012-07-14 05:46:52 +0000
committerimp <imp@FreeBSD.org>2012-07-14 05:46:52 +0000
commita8c236d935f387b1cb7759c1ca5e8766eb989d5a (patch)
tree212da9edf2ab06c197ad44b5a1c4b83298b5e89d /sys/arm/at91/board_hl200.c
parent3981b9b76aa0266598ee7b724e5981627d8ac129 (diff)
downloadFreeBSD-src-a8c236d935f387b1cb7759c1ca5e8766eb989d5a.zip
FreeBSD-src-a8c236d935f387b1cb7759c1ca5e8766eb989d5a.tar.gz
Create common routines for configuring the serial ports and use them
on all the at91rm9200 boards.
Diffstat (limited to 'sys/arm/at91/board_hl200.c')
-rw-r--r--sys/arm/at91/board_hl200.c24
1 files changed, 5 insertions, 19 deletions
diff --git a/sys/arm/at91/board_hl200.c b/sys/arm/at91/board_hl200.c
index 4936814..8acde9f 100644
--- a/sys/arm/at91/board_hl200.c
+++ b/sys/arm/at91/board_hl200.c
@@ -44,26 +44,12 @@ board_init(void)
at91rm9200_set_subtype(AT91_ST_RM9200_BGA);
/*
- * Since the USART supports RS-485 multidrop mode, it allows the
- * TX pins to float. However, for RS-232 operations, we don't want
- * these pins to float. Instead, they should be pulled up to avoid
- * mismatches. Linux does something similar when it configures the
- * TX lines. This implies that we also allow the RX lines to float
- * rather than be in the state they are left in by the boot loader.
- * Since they are input pins, I think that this is the right thing
- * to do.
+ * Unsure what all is in the HOTe HL200, but I do know there's
+ * one serial port that isn't DBGU. There's many other peripherals
+ * that need to be configured here.
*/
- /* PIOA's A periph: Turn USART 0 and 2's TX/RX pins */
- at91_pio_use_periph_a(AT91RM92_PIOA_BASE,
- AT91C_PA18_RXD0 | AT91C_PA22_RXD2, 0);
- at91_pio_use_periph_a(AT91RM92_PIOA_BASE,
- AT91C_PA17_TXD0 | AT91C_PA23_TXD2, 1);
- /* PIOA's B periph: Turn USART 3's TX/RX pins */
- at91_pio_use_periph_b(AT91RM92_PIOA_BASE, AT91C_PA6_RXD3, 0);
- at91_pio_use_periph_b(AT91RM92_PIOA_BASE, AT91C_PA5_TXD3, 1);
- /* PIOB's A periph: Turn USART 1's TX/RX pins */
- at91_pio_use_periph_a(AT91RM92_PIOB_BASE, AT91C_PB21_RXD1, 0);
- at91_pio_use_periph_a(AT91RM92_PIOB_BASE, AT91C_PB20_TXD1, 1);
+ at91rm9200_config_uart(AT91_ID_DBGU, 0, 0); /* DBGU just Tx and Rx */
+ at91rm9200_config_uart(AT91RM9200_ID_USART0, 1, 0); /* Tx and Rx */
return (at91_ramsize());
}
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