MF p4:

Adapt to forthcoming spi framework.  The ioctls for SPI commands and such
belong in the higher level driver.

1 files changed, 36 insertions, 0 deletions

diff --git a/sys/arm/at91/at91_spireg.h b/sys/arm/at91/at91_spireg.h
index 10fb259..f212525 100644
--- a/sys/arm/at91/at91_spireg.h
+++ b/sys/arm/at91/at91_spireg.h
@@ -27,4 +27,40 @@
 #ifndef ARM_AT91_AT91_SPIREG_H
 #define ARM_AT91_AT91_SPIREG_H
 
+#define SPI_CR		0x00		/* CR: Control Register */
+#define	  SPI_CR_SPIEN		0x1
+#define	  SPI_CR_SPIDIS		0x2
+#define	  SPI_CR_SWRST		0x8
+#define SPI_MR		0x04		/* MR: Mode Register */
+#define	  SPI_MR_MSTR		0x01
+#define	  SPI_MR_PS		0x02
+#define   SPI_MR_PCSDEC		0x04
+#define   SPI_MR_DIV32		0x08
+#define	  SPI_MR_MODFDIS	0x10
+#define   SPI_MR_LLB		0x80
+#define   SPI_MR_PSC_CS0	0xe0000
+#define   SPI_MR_PSC_CS1	0xd0000
+#define	  SPI_MR_PSC_CS2	0xb0000
+#define	  SPI_MR_PSC_CS3	0x70000
+#define SPI_RDR		0x08		/* RDR: Receive Data Register */
+#define SPI_TDR		0x0c		/* TDR: Transmit Data Register */
+#define SPI_SR		0x10		/* SR: Status Register */
+#define	  SPI_SR_RDRF		0x00001
+#define	  SPI_SR_TDRE		0x00002
+#define	  SPI_SR_MODF		0x00004
+#define	  SPI_SR_OVRES		0x00008
+#define	  SPI_SR_ENDRX		0x00010
+#define	  SPI_SR_ENDTX		0x00020
+#define	  SPI_SR_RXBUFE		0x00040
+#define	  SPI_SR_TXBUFE		0x00080
+#define	  SPI_SR_SPIENS		0x10000
+#define	SPI_IER		0x14		/* IER: Interrupt Enable Regsiter */
+#define	SPI_IDR		0x18		/* IDR: Interrupt Disable Regsiter */
+#define	SPI_IMR		0x1c		/* IMR: Interrupt Mask Regsiter */
+#define SPI_CSR0	0x30		/* CS0: Chip Select 0 */
+#define   SPI_CSR_CPOL		0x01
+#define SPI_CSR1	0x34		/* CS1: Chip Select 1 */
+#define SPI_CSR2	0x38		/* CS2: Chip Select 2 */
+#define SPI_CSR3	0x3c		/* CS3: Chip Select 3 */
+
 #endif /* ARM_AT91_AT91_SPIREG_H */