Export the interrupt status vector via soc_data. Set the interrupt

priorities in the AIC in the atmelarm driver before attaching the
children.  Delete redunant copies of the code.

1 files changed, 26 insertions, 2 deletions

diff --git a/sys/arm/at91/at91.c b/sys/arm/at91/at91.c
index da3aa72..e26b0db 100644
--- a/sys/arm/at91/at91.c
+++ b/sys/arm/at91/at91.c
@@ -247,10 +247,12 @@ at91_attach(device_t dev)
 {
 	struct at91_softc *sc = device_get_softc(dev);
 	const struct pmap_devmap *pdevmap;
+	int i;
 
 	at91_softc = sc;
 	sc->sc_st = &at91_bs_tag;
 	sc->sc_sh = AT91_BASE;
+	sc->sc_aic_sh = AT91_BASE + AT91_SYS_BASE;
 	sc->dev = dev;
 
 	sc->sc_irq_rman.rm_type = RMAN_ARRAY;
@@ -269,13 +271,35 @@ at91_attach(device_t dev)
 			panic("at91_attach: failed to set up memory rman");
 	}
 
+	/*
+	 * Setup the interrupt table.
+	 */
+	if (soc_info.soc_data == NULL || soc_info.soc_data->soc_irq_prio == NULL)
+		panic("Interrupt priority table missing\n");
+	for (i = 0; i < 32; i++) {
+		bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_SVR +
+		    i * 4, i);
+		/* Priority. */
+		bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_SMR + i * 4,
+		    soc_info.soc_data->soc_irq_prio[i]);
+		if (i < 8)
+			bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_EOICR,
+			    1);
+	}
+
+	bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_SPU, 32);
+	/* No debug. */
+	bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_DCR, 0);
+	/* Disable and clear all interrupts. */
+	bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_IDCR, 0xffffffff);
+	bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_ICCR, 0xffffffff);
 
 	/*
-         * Our device list will be added automatically by the cpu device
+	 * Our device list will be added automatically by the cpu device
 	 * e.g. at91rm9200.c when it is identified. To ensure that the
 	 * CPU and PMC are attached first any other "identified" devices
 	 * call BUS_ADD_CHILD(9) with an "order" of at least 2.
-         */
+	 */
 
 	bus_generic_probe(dev);
 	bus_generic_attach(dev);