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author | zbb <zbb@FreeBSD.org> | 2017-06-13 18:50:08 +0000 |
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committer | Luiz Souza <luiz@netgate.com> | 2017-09-06 13:29:33 -0500 |
commit | 926b0d35031c24d53e322fd2f11d319d484b5989 (patch) | |
tree | 0f0e203cdd478899667250b4f19f0dcd8a95647a /sys/arm/arm | |
parent | d2b2169803329131e3defcc0e636a53ec231456e (diff) | |
download | FreeBSD-src-926b0d35031c24d53e322fd2f11d319d484b5989.zip FreeBSD-src-926b0d35031c24d53e322fd2f11d319d484b5989.tar.gz |
Add detection of CPU class for ARMv6/v7
Submitted by: Michal Mazur <mkm@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Reviewed by: andrew
Differential revision: https://reviews.freebsd.org/D10909
(cherry picked from commit e843e48d3646bd18f8480005464fe31a71692d13)
Diffstat (limited to 'sys/arm/arm')
-rw-r--r-- | sys/arm/arm/identcpu-v6.c | 53 |
1 files changed, 36 insertions, 17 deletions
diff --git a/sys/arm/arm/identcpu-v6.c b/sys/arm/arm/identcpu-v6.c index 9043913..11b9846 100644 --- a/sys/arm/arm/identcpu-v6.c +++ b/sys/arm/arm/identcpu-v6.c @@ -66,29 +66,47 @@ static char hw_buf[81]; static int hw_buf_idx; static bool hw_buf_newline; +enum cpu_class cpu_class = CPU_CLASS_NONE; + static struct { int implementer; int part_number; char *impl_name; char *core_name; + enum cpu_class cpu_class; } cpu_names[] = { - {CPU_IMPLEMENTER_ARM, CPU_ARCH_ARM1176, "ARM", "ARM1176"}, - {CPU_IMPLEMENTER_ARM, CPU_ARCH_CORTEX_A5 , "ARM", "Cortex-A5"}, - {CPU_IMPLEMENTER_ARM, CPU_ARCH_CORTEX_A7 , "ARM", "Cortex-A7"}, - {CPU_IMPLEMENTER_ARM, CPU_ARCH_CORTEX_A8 , "ARM", "Cortex-A8"}, - {CPU_IMPLEMENTER_ARM, CPU_ARCH_CORTEX_A9 , "ARM", "Cortex-A9"}, - {CPU_IMPLEMENTER_ARM, CPU_ARCH_CORTEX_A12, "ARM", "Cortex-A12"}, - {CPU_IMPLEMENTER_ARM, CPU_ARCH_CORTEX_A15, "ARM", "Cortex-A15"}, - {CPU_IMPLEMENTER_ARM, CPU_ARCH_CORTEX_A17, "ARM", "Cortex-A17"}, - {CPU_IMPLEMENTER_ARM, CPU_ARCH_CORTEX_A53, "ARM", "Cortex-A53"}, - {CPU_IMPLEMENTER_ARM, CPU_ARCH_CORTEX_A57, "ARM", "Cortex-A57"}, - {CPU_IMPLEMENTER_ARM, CPU_ARCH_CORTEX_A72, "ARM", "Cortex-A72"}, - {CPU_IMPLEMENTER_ARM, CPU_ARCH_CORTEX_A73, "ARM", "Cortex-A73"}, - - {CPU_IMPLEMENTER_MRVL, CPU_ARCH_SHEEVA_581, "Marwell", "PJ4 v7"}, - {CPU_IMPLEMENTER_MRVL, CPU_ARCH_SHEEVA_584, "Marwell", "PJ4MP v7"}, - - {CPU_IMPLEMENTER_QCOM, CPU_ARCH_KRAIT_300, "Qualcomm", "Krait 300"}, + {CPU_IMPLEMENTER_ARM, CPU_ARCH_ARM1176, "ARM", "ARM1176", + CPU_CLASS_ARM11J}, + {CPU_IMPLEMENTER_ARM, CPU_ARCH_CORTEX_A5 , "ARM", "Cortex-A5", + CPU_CLASS_CORTEXA}, + {CPU_IMPLEMENTER_ARM, CPU_ARCH_CORTEX_A7 , "ARM", "Cortex-A7", + CPU_CLASS_CORTEXA}, + {CPU_IMPLEMENTER_ARM, CPU_ARCH_CORTEX_A8 , "ARM", "Cortex-A8", + CPU_CLASS_CORTEXA}, + {CPU_IMPLEMENTER_ARM, CPU_ARCH_CORTEX_A9 , "ARM", "Cortex-A9", + CPU_CLASS_CORTEXA}, + {CPU_IMPLEMENTER_ARM, CPU_ARCH_CORTEX_A12, "ARM", "Cortex-A12", + CPU_CLASS_CORTEXA}, + {CPU_IMPLEMENTER_ARM, CPU_ARCH_CORTEX_A15, "ARM", "Cortex-A15", + CPU_CLASS_CORTEXA}, + {CPU_IMPLEMENTER_ARM, CPU_ARCH_CORTEX_A17, "ARM", "Cortex-A17", + CPU_CLASS_CORTEXA}, + {CPU_IMPLEMENTER_ARM, CPU_ARCH_CORTEX_A53, "ARM", "Cortex-A53", + CPU_CLASS_CORTEXA}, + {CPU_IMPLEMENTER_ARM, CPU_ARCH_CORTEX_A57, "ARM", "Cortex-A57", + CPU_CLASS_CORTEXA}, + {CPU_IMPLEMENTER_ARM, CPU_ARCH_CORTEX_A72, "ARM", "Cortex-A72", + CPU_CLASS_CORTEXA}, + {CPU_IMPLEMENTER_ARM, CPU_ARCH_CORTEX_A73, "ARM", "Cortex-A73", + CPU_CLASS_CORTEXA}, + + {CPU_IMPLEMENTER_MRVL, CPU_ARCH_SHEEVA_581, "Marwell", "PJ4 v7", + CPU_CLASS_MARVELL}, + {CPU_IMPLEMENTER_MRVL, CPU_ARCH_SHEEVA_584, "Marwell", "PJ4MP v7", + CPU_CLASS_MARVELL}, + + {CPU_IMPLEMENTER_QCOM, CPU_ARCH_KRAIT_300, "Qualcomm", "Krait 300", + CPU_CLASS_KRAIT}, }; @@ -273,6 +291,7 @@ identify_arm_cpu(void) for(i = 0; i < nitems(cpu_names); i++) { if (cpu_names[i].implementer == cpuinfo.implementer && cpu_names[i].part_number == cpuinfo.part_number) { + cpu_class = cpu_names[i].cpu_class; snprintf(cpu_model, sizeof(cpu_model) - 1, "CPU: %s %s r%dp%d (ECO: 0x%08X)", cpu_names[i].impl_name, cpu_names[i].core_name, |