diff options
author | kato <kato@FreeBSD.org> | 1997-04-26 04:08:54 +0000 |
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committer | kato <kato@FreeBSD.org> | 1997-04-26 04:08:54 +0000 |
commit | 80b96ecb2f86cc9a64bc39f7b7afb0f052645aef (patch) | |
tree | 6dd9c9d0adf8d3c5b4e4f8025a9749ab782b0f8b /sys/amd64 | |
parent | fae9d8a74aa4d7dbf71b61651e97cf8fdae19fd1 (diff) | |
download | FreeBSD-src-80b96ecb2f86cc9a64bc39f7b7afb0f052645aef.zip FreeBSD-src-80b96ecb2f86cc9a64bc39f7b7afb0f052645aef.tar.gz |
Add new cpu type, CPU_CY486DX, which shows Cyrix 486S/DX series CPUs,
and initialization routine for those CPUs.
Tested by: Bob Bishop <rb@gid.co.uk>
Diffstat (limited to 'sys/amd64')
-rw-r--r-- | sys/amd64/amd64/identcpu.c | 7 | ||||
-rw-r--r-- | sys/amd64/amd64/initcpu.c | 34 | ||||
-rw-r--r-- | sys/amd64/include/cputypes.h | 3 |
3 files changed, 37 insertions, 7 deletions
diff --git a/sys/amd64/amd64/identcpu.c b/sys/amd64/amd64/identcpu.c index bb99ca8..5defd2a 100644 --- a/sys/amd64/amd64/identcpu.c +++ b/sys/amd64/amd64/identcpu.c @@ -36,7 +36,7 @@ * SUCH DAMAGE. * * from: Id: machdep.c,v 1.193 1996/06/18 01:22:04 bde Exp - * $Id: identcpu.c,v 1.14 1997/03/22 18:51:57 kato Exp $ + * $Id: identcpu.c,v 1.15 1997/04/22 06:55:23 jdp Exp $ */ #include "opt_cpu.h" @@ -89,6 +89,7 @@ static struct cpu_nameclass i386_cpus[] = { { "Blue Lightning", CPUCLASS_486 }, /* CPU_BLUE */ { "Cyrix 6x86 MMX", CPUCLASS_586 }, /* CPU_M2 (XXX) */ { "NexGen 586", CPUCLASS_386 }, /* CPU_NX586 (XXX) */ + { "Cyrix 486S/DX", CPUCLASS_486 }, /* CPU_CY486DX */ }; void @@ -536,10 +537,12 @@ finishidentcpu(void) */ switch (cyrix_did & 0x00f0) { case 0x00: - case 0x10: case 0xf0: cpu = CPU_486DLC; break; + case 0x10: + cpu = CPU_CY486DX; + break; case 0x20: if ((cyrix_did & 0x00f0) < 8) cpu = CPU_M1; diff --git a/sys/amd64/amd64/initcpu.c b/sys/amd64/amd64/initcpu.c index e9ee947..0728dad 100644 --- a/sys/amd64/amd64/initcpu.c +++ b/sys/amd64/amd64/initcpu.c @@ -26,7 +26,7 @@ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * - * $Id: initcpu.c,v 1.2 1997/03/24 07:23:05 kato Exp $ + * $Id: initcpu.c,v 1.3 1997/04/19 05:25:19 kato Exp $ */ #include "opt_cpu.h" @@ -45,6 +45,7 @@ void initializecpu(void); static void init_5x86(void); static void init_bluelightning(void); static void init_486dlc(void); +static void init_cy486dx(void); #ifdef CPU_I486_ON_386 static void init_i486_on_386(void); #endif @@ -90,7 +91,7 @@ init_bluelightning(void) } /* - * Cyrix 486 series + * Cyrix 486SLC/DLC/SR/DR series */ static void init_486dlc(void) @@ -133,6 +134,28 @@ init_486dlc(void) /* + * Cyrix 486S/DX series + */ +static void +init_cy486dx(void) +{ + u_long eflags; + u_char ccr2; + + eflags = read_eflags(); + disable_intr(); + invd(); + + ccr2 = read_cyrix_reg(CCR2); +#ifdef SUSP_HLT + ccr2 |= CCR2_SUSP_HTL; +#endif + write_cyrix_reg(CCR2, ccr2); + write_eflags(eflags); +} + + +/* * Cyrix 5x86 */ static void @@ -334,6 +357,9 @@ initializecpu(void) case CPU_486DLC: init_486dlc(); break; + case CPU_CY486DX: + init_cy486dx(); + break; case CPU_M1SC: init_5x86(); break; @@ -407,7 +433,7 @@ DB_SHOW_COMMAND(cyrixreg, cyrixreg) disable_intr(); - if (cpu != CPU_M1SC) { + if ((cpu != CPU_M1SC) && (cpu != CPU_CY486DX)) { ccr0 = read_cyrix_reg(CCR0); } ccr1 = read_cyrix_reg(CCR1); @@ -424,7 +450,7 @@ DB_SHOW_COMMAND(cyrixreg, cyrixreg) } write_eflags(eflags); - if (cpu != CPU_M1SC) + if ((cpu != CPU_M1SC) && (cpu != CPU_CY486DX)) printf("CCR0=%x, ", (u_int)ccr0); printf("CCR1=%x, CCR2=%x, CCR3=%x", diff --git a/sys/amd64/include/cputypes.h b/sys/amd64/include/cputypes.h index 695dafc..f3c1e9e 100644 --- a/sys/amd64/include/cputypes.h +++ b/sys/amd64/include/cputypes.h @@ -24,7 +24,7 @@ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * - * $Id: cputypes.h,v 1.7 1997/02/22 09:34:14 peter Exp $ + * $Id: cputypes.h,v 1.8 1997/03/22 18:53:03 kato Exp $ */ #ifndef _MACHINE_CPUTYPES_H_ @@ -57,4 +57,5 @@ #define CPU_BLUE 10 /* IBM BlueLighting CPU */ #define CPU_M2 11 /* Cyrix M2 (aka enhanced 6x86 with MMX */ #define CPU_NX586 12 /* NexGen (now AMD) 586 */ +#define CPU_CY486DX 13 /* Cyrix 486S/DX/DX2/DX4 */ #endif /* _MACHINE_CPUTYPES_H_ */ |