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author | grehan <grehan@FreeBSD.org> | 2012-11-30 05:40:24 +0000 |
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committer | grehan <grehan@FreeBSD.org> | 2012-11-30 05:40:24 +0000 |
commit | 7f24aaf567c1daf5f2478b28960fa3f98e18e374 (patch) | |
tree | e9b1c8f199330349974679b934b38344496a6de5 /sys/amd64 | |
parent | f59654890648245951f48676dc390a6d95f03aae (diff) | |
download | FreeBSD-src-7f24aaf567c1daf5f2478b28960fa3f98e18e374.zip FreeBSD-src-7f24aaf567c1daf5f2478b28960fa3f98e18e374.tar.gz |
Properly screen for the AND 0x81 instruction from the set
of group1 0x81 instructions that use the reg bits as an
extended opcode.
Still todo: properly update rflags.
Pointed out by: jilles@
Diffstat (limited to 'sys/amd64')
-rw-r--r-- | sys/amd64/vmm/vmm_instruction_emul.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/sys/amd64/vmm/vmm_instruction_emul.c b/sys/amd64/vmm/vmm_instruction_emul.c index 1c4abf8..e73f6bb 100644 --- a/sys/amd64/vmm/vmm_instruction_emul.c +++ b/sys/amd64/vmm/vmm_instruction_emul.c @@ -83,6 +83,7 @@ static const struct vie_op one_byte_opcodes[256] = { .op_type = VIE_OP_TYPE_AND, }, [0x81] = { + /* XXX Group 1 extended opcode - not just AND */ .op_byte = 0x81, .op_type = VIE_OP_TYPE_AND, .op_flags = VIE_OP_F_IMM, @@ -311,7 +312,13 @@ emulate_and(void *vm, int vcpuid, uint64_t gpa, struct vie *vie, * * 81/ and r/m32, imm32 * REX.W + 81/ and r/m64, imm32 sign-extended to 64 + * + * Currently, only the AND operation of the 0x81 opcode + * is implemented (ModRM:reg = b100). */ + if ((vie->reg & 7) != 4) + break; + if (vie->rex_w) size = 8; |