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author | neel <neel@FreeBSD.org> | 2014-09-27 22:15:50 +0000 |
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committer | neel <neel@FreeBSD.org> | 2014-09-27 22:15:50 +0000 |
commit | 09ab9e29373f2b48f72ff71789f6afc0e01c2c91 (patch) | |
tree | 946f5a62ce46b853d35291bd0a8f36622d72980b /sys/amd64 | |
parent | 11f176f81434584587aa1973f46fae8948a837b2 (diff) | |
parent | 54f38c8738077e829c5528976a3269afc01ff7ee (diff) | |
download | FreeBSD-src-09ab9e29373f2b48f72ff71789f6afc0e01c2c91.zip FreeBSD-src-09ab9e29373f2b48f72ff71789f6afc0e01c2c91.tar.gz |
IFC @r272185
Diffstat (limited to 'sys/amd64')
-rw-r--r-- | sys/amd64/amd64/fpu.c | 21 | ||||
-rw-r--r-- | sys/amd64/amd64/machdep.c | 8 | ||||
-rw-r--r-- | sys/amd64/amd64/trap.c | 4 | ||||
-rw-r--r-- | sys/amd64/conf/GENERIC | 2 | ||||
-rw-r--r-- | sys/amd64/conf/NOTES | 4 | ||||
-rw-r--r-- | sys/amd64/vmm/intel/vmx.c | 7 | ||||
-rw-r--r-- | sys/amd64/vmm/io/vlapic.c | 1 | ||||
-rw-r--r-- | sys/amd64/vmm/vmm.c | 8 |
8 files changed, 32 insertions, 23 deletions
diff --git a/sys/amd64/amd64/fpu.c b/sys/amd64/amd64/fpu.c index 0d59df4..5c61859 100644 --- a/sys/amd64/amd64/fpu.c +++ b/sys/amd64/amd64/fpu.c @@ -602,29 +602,30 @@ fputrap_sse(void) return (fpetable[(mxcsr & (~mxcsr >> 7)) & 0x3f]); } -static int err_count = 0; - /* * Device Not Available (DNA, #NM) exception handler. * * It would be better to switch FP context here (if curthread != * fpcurthread) and not necessarily for every context switch, but it * is too hard to access foreign pcb's. - * - * The handler is entered with interrupts enabled, which allows the - * context switch to happen before critical enter() is executed, and - * causes restoration of FPU context on CPU other than that caused - * DNA. It is fine, since context switch started emulation on the - * current CPU as well. */ void fpudna(void) { + /* + * This handler is entered with interrupts enabled, so context + * switches may occur before critical_enter() is executed. If + * a context switch occurs, then when we regain control, our + * state will have been completely restored. The CPU may + * change underneath us, but the only part of our context that + * lives in the CPU is CR0.TS and that will be "restored" by + * setting it on the new CPU. + */ critical_enter(); + if (PCPU_GET(fpcurthread) == curthread) { - printf("fpudna: fpcurthread == curthread %d times\n", - ++err_count); + printf("fpudna: fpcurthread == curthread\n"); stop_emulating(); critical_exit(); return; diff --git a/sys/amd64/amd64/machdep.c b/sys/amd64/amd64/machdep.c index c54b3b1..278409d 100644 --- a/sys/amd64/amd64/machdep.c +++ b/sys/amd64/amd64/machdep.c @@ -184,9 +184,6 @@ struct init_ops init_ops = { * the physical address at which the kernel is loaded. */ extern char kernphys[]; -#ifdef DDB -extern vm_offset_t ksym_start, ksym_end; -#endif struct msgbuf *msgbufp; @@ -1823,6 +1820,10 @@ static caddr_t native_parse_preload_data(u_int64_t modulep) { caddr_t kmdp; +#ifdef DDB + vm_offset_t ksym_start; + vm_offset_t ksym_end; +#endif preload_metadata = (caddr_t)(uintptr_t)(modulep + KERNBASE); preload_bootstrap_relocate(KERNBASE); @@ -1834,6 +1835,7 @@ native_parse_preload_data(u_int64_t modulep) #ifdef DDB ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t); ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t); + db_fetch_ksymtab(ksym_start, ksym_end); #endif return (kmdp); diff --git a/sys/amd64/amd64/trap.c b/sys/amd64/amd64/trap.c index f6459f4..4880c91 100644 --- a/sys/amd64/amd64/trap.c +++ b/sys/amd64/amd64/trap.c @@ -436,8 +436,8 @@ trap(struct trapframe *frame) case T_XMMFLT: /* SIMD floating-point exception */ case T_FPOPFLT: /* FPU operand fetch fault */ /* - * XXXKIB for now disable any FPU traps in kernel - * handler registration seems to be overkill + * For now, supporting kernel handler + * registration for FPU traps is overkill. */ trap_fatal(frame, 0); goto out; diff --git a/sys/amd64/conf/GENERIC b/sys/amd64/conf/GENERIC index 698f510..cf4fb46 100644 --- a/sys/amd64/conf/GENERIC +++ b/sys/amd64/conf/GENERIC @@ -216,6 +216,8 @@ device de # DEC/Intel DC21x4x (``Tulip'') device em # Intel PRO/1000 Gigabit Ethernet Family device igb # Intel PRO/1000 PCIE Server Gigabit Family device ixgbe # Intel PRO/10GbE PCIE Ethernet Family +device ixl # Intel XL710 40Gbe PCIE Ethernet +device ixlv # Intel XL710 40Gbe VF PCIE Ethernet device le # AMD Am7900 LANCE and Am79C9xx PCnet device ti # Alteon Networks Tigon I/II gigabit Ethernet device txp # 3Com 3cR990 (``Typhoon'') diff --git a/sys/amd64/conf/NOTES b/sys/amd64/conf/NOTES index 1262af3..a946c05 100644 --- a/sys/amd64/conf/NOTES +++ b/sys/amd64/conf/NOTES @@ -310,6 +310,8 @@ options DRM_DEBUG # Include debug printfs (slow) # iwn: Intel Wireless WiFi Link 1000/105/135/2000/4965/5000/6000/6050 abgn # 802.11 network adapters # Requires the iwn firmware module +# ixl: Intel XL710 40Gbe PCIE Ethernet +# ixlv: Intel XL710 40Gbe VF PCIE Ethernet # mlx4ib: Mellanox ConnectX HCA InfiniBand # mlxen: Mellanox ConnectX HCA Ethernet # mthca: Mellanox HCA InfiniBand @@ -327,6 +329,8 @@ options ED_SIC device ipw # Intel 2100 wireless NICs. device iwi # Intel 2200BG/2225BG/2915ABG wireless NICs. device iwn # Intel 4965/1000/5000/6000 wireless NICs. +device ixl # Intel XL710 40Gbe PCIE Ethernet +device ixlv # Intel XL710 40Gbe VF PCIE Ethernet device mlx4ib # Mellanox ConnectX HCA InfiniBand device mlxen # Mellanox ConnectX HCA Ethernet device mthca # Mellanox HCA InfiniBand diff --git a/sys/amd64/vmm/intel/vmx.c b/sys/amd64/vmm/intel/vmx.c index 64d9fff..95adf12 100644 --- a/sys/amd64/vmm/intel/vmx.c +++ b/sys/amd64/vmm/intel/vmx.c @@ -885,12 +885,6 @@ vmx_vminit(struct vm *vm, pmap_t pmap) * how they are saved/restored so can be directly accessed by the * guest. * - * Guest KGSBASE is saved and restored in the guest MSR save area. - * Host KGSBASE is restored before returning to userland from the pcb. - * There will be a window of time when we are executing in the host - * kernel context with a value of KGSBASE from the guest. This is ok - * because the value of KGSBASE is inconsequential in kernel context. - * * MSR_EFER is saved and restored in the guest VMCS area on a * VM exit and entry respectively. It is also restored from the * host VMCS area on a VM exit. @@ -905,7 +899,6 @@ vmx_vminit(struct vm *vm, pmap_t pmap) guest_msr_rw(vmx, MSR_SYSENTER_CS_MSR) || guest_msr_rw(vmx, MSR_SYSENTER_ESP_MSR) || guest_msr_rw(vmx, MSR_SYSENTER_EIP_MSR) || - guest_msr_rw(vmx, MSR_KGSBASE) || guest_msr_rw(vmx, MSR_EFER) || guest_msr_ro(vmx, MSR_TSC)) panic("vmx_vminit: error setting guest msr access"); diff --git a/sys/amd64/vmm/io/vlapic.c b/sys/amd64/vmm/io/vlapic.c index c6336bc..b192735 100644 --- a/sys/amd64/vmm/io/vlapic.c +++ b/sys/amd64/vmm/io/vlapic.c @@ -633,6 +633,7 @@ vlapic_fire_timer(struct vlapic *vlapic) // The timer LVT always uses the fixed delivery mode. lvt = vlapic_get_lvt(vlapic, APIC_OFFSET_TIMER_LVT); if (vlapic_fire_lvt(vlapic, lvt | APIC_LVT_DM_FIXED)) { + VLAPIC_CTR0(vlapic, "vlapic timer fired"); vmm_stat_incr(vlapic->vm, vlapic->vcpuid, VLAPIC_INTR_TIMER, 1); } } diff --git a/sys/amd64/vmm/vmm.c b/sys/amd64/vmm/vmm.c index 26f7c59..d73c7b3 100644 --- a/sys/amd64/vmm/vmm.c +++ b/sys/amd64/vmm/vmm.c @@ -1197,8 +1197,12 @@ vm_handle_paging(struct vm *vm, int vcpuid, bool *retu) if (ftype == VM_PROT_READ || ftype == VM_PROT_WRITE) { rv = pmap_emulate_accessed_dirty(vmspace_pmap(vm->vmspace), vme->u.paging.gpa, ftype); - if (rv == 0) + if (rv == 0) { + VCPU_CTR2(vm, vcpuid, "%s bit emulation for gpa %#lx", + ftype == VM_PROT_READ ? "accessed" : "dirty", + vme->u.paging.gpa); goto done; + } } map = &vm->vmspace->vm_map; @@ -1239,6 +1243,8 @@ vm_handle_inst_emul(struct vm *vm, int vcpuid, bool *retu) paging = &vme->u.inst_emul.paging; cpu_mode = paging->cpu_mode; + VCPU_CTR1(vm, vcpuid, "inst_emul fault accessing gpa %#lx", gpa); + /* Fetch, decode and emulate the faulting instruction */ if (vie->num_valid == 0) { /* |