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author | sephe <sephe@FreeBSD.org> | 2017-05-12 03:06:45 +0000 |
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committer | sephe <sephe@FreeBSD.org> | 2017-05-12 03:06:45 +0000 |
commit | 8dc7e6bce37996bed0f5408d4fcb06b40f2077a5 (patch) | |
tree | f97a5ef8f6a701114694000fa31dc1a4b02f695e /sys/amd64/pci/pci_cfgreg.c | |
parent | 6f3e1d5066a694b8582e3281a2e2ae9098bfe4f2 (diff) | |
download | FreeBSD-src-8dc7e6bce37996bed0f5408d4fcb06b40f2077a5.zip FreeBSD-src-8dc7e6bce37996bed0f5408d4fcb06b40f2077a5.tar.gz |
MFC 317786
pcicfg: Fix direct calls of pci_cfg{read,write} on systems w/o PCI host bridge.
Reported by: dexuan@
Reviewed by: jhb@
Sponsored by: Microsoft
Differential Revision: https://reviews.freebsd.org/D10564
Diffstat (limited to 'sys/amd64/pci/pci_cfgreg.c')
-rw-r--r-- | sys/amd64/pci/pci_cfgreg.c | 13 |
1 files changed, 7 insertions, 6 deletions
diff --git a/sys/amd64/pci/pci_cfgreg.c b/sys/amd64/pci/pci_cfgreg.c index 0039008..2e6e728 100644 --- a/sys/amd64/pci/pci_cfgreg.c +++ b/sys/amd64/pci/pci_cfgreg.c @@ -64,6 +64,7 @@ static vm_offset_t pcie_base; static int pcie_minbus, pcie_maxbus; static uint32_t pcie_badslots; static struct mtx pcicfg_mtx; +MTX_SYSINIT(pcicfg_mtx, &pcicfg_mtx, "pcicfg_mtx", MTX_SPIN); static int mcfg_enable = 1; SYSCTL_INT(_hw_pci, OID_AUTO, mcfg, CTLFLAG_RDTUN, &mcfg_enable, 0, "Enable support for PCI-e memory mapped config access"); @@ -74,15 +75,9 @@ SYSCTL_INT(_hw_pci, OID_AUTO, mcfg, CTLFLAG_RDTUN, &mcfg_enable, 0, int pci_cfgregopen(void) { - static int once = 0; uint64_t pciebar; uint16_t did, vid; - if (!once) { - mtx_init(&pcicfg_mtx, "pcicfg", NULL, MTX_SPIN); - once = 1; - } - if (cfgmech != CFGMECH_NONE) return (1); cfgmech = CFGMECH_1; @@ -138,6 +133,9 @@ pci_cfgregread(int bus, int slot, int func, int reg, int bytes) { uint32_t line; + if (cfgmech == CFGMECH_NONE) + return (0xffffffff); + /* * Some BIOS writers seem to want to ignore the spec and put * 0 in the intline rather than 255 to indicate none. Some use @@ -162,6 +160,9 @@ void pci_cfgregwrite(int bus, int slot, int func, int reg, u_int32_t data, int bytes) { + if (cfgmech == CFGMECH_NONE) + return; + if (cfgmech == CFGMECH_PCIE && (bus >= pcie_minbus && bus <= pcie_maxbus) && (bus != 0 || !(1 << slot & pcie_badslots))) |