diff options
author | fabient <fabient@FreeBSD.org> | 2010-04-16 15:43:24 +0000 |
---|---|---|
committer | fabient <fabient@FreeBSD.org> | 2010-04-16 15:43:24 +0000 |
commit | ab69bb0ca5ba497377d209f7d6c92fbd4e4972fb (patch) | |
tree | 4abd46c7f8a265da9fe3285e3788ad3e0251b12d /sys/amd64/include | |
parent | 461b3546b0d4a20003438f9bb74525872ec3475f (diff) | |
download | FreeBSD-src-ab69bb0ca5ba497377d209f7d6c92fbd4e4972fb.zip FreeBSD-src-ab69bb0ca5ba497377d209f7d6c92fbd4e4972fb.tar.gz |
MFC r206089, r206684:
- Support for uncore counting events: one fixed PMC with the uncore
domain clock, 8 programmable PMC.
- Westmere based CPU (Xeon 5600, Corei7 980X) support.
- New man pages with events list for core and uncore.
- Updated Corei7 events with Intel 253669-033US December 2009 doc.
There is some removed events in the documentation, they have been
kept in the code but documented in the man page as obsolete.
- Offcore response events can be setup with rsp token.
Sponsored by: NETASQ
Diffstat (limited to 'sys/amd64/include')
-rw-r--r-- | sys/amd64/include/pmc_mdep.h | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/sys/amd64/include/pmc_mdep.h b/sys/amd64/include/pmc_mdep.h index f233a51..4f16485 100644 --- a/sys/amd64/include/pmc_mdep.h +++ b/sys/amd64/include/pmc_mdep.h @@ -43,17 +43,20 @@ struct pmc_mdep; #include <dev/hwpmc/hwpmc_core.h> #include <dev/hwpmc/hwpmc_piv.h> #include <dev/hwpmc/hwpmc_tsc.h> +#include <dev/hwpmc/hwpmc_uncore.h> /* * Intel processors implementing V2 and later of the Intel performance * measurement architecture have PMCs of the following classes: TSC, - * IAF and IAP. + * IAF, IAP, UCF and UCP. */ #define PMC_MDEP_CLASS_INDEX_TSC 0 #define PMC_MDEP_CLASS_INDEX_K8 1 #define PMC_MDEP_CLASS_INDEX_P4 1 #define PMC_MDEP_CLASS_INDEX_IAP 1 #define PMC_MDEP_CLASS_INDEX_IAF 2 +#define PMC_MDEP_CLASS_INDEX_UCP 3 +#define PMC_MDEP_CLASS_INDEX_UCF 4 /* * On the amd64 platform we support the following PMCs. @@ -63,12 +66,16 @@ struct pmc_mdep; * PIV Intel P4/HTT and P4/EMT64 * IAP Intel Core/Core2/Atom CPUs in 64 bits mode. * IAF Intel fixed-function PMCs in Core2 and later CPUs. + * UCP Intel Uncore programmable PMCs. + * UCF Intel Uncore fixed-function PMCs. */ union pmc_md_op_pmcallocate { struct pmc_md_amd_op_pmcallocate pm_amd; struct pmc_md_iaf_op_pmcallocate pm_iaf; struct pmc_md_iap_op_pmcallocate pm_iap; + struct pmc_md_ucf_op_pmcallocate pm_ucf; + struct pmc_md_ucp_op_pmcallocate pm_ucp; struct pmc_md_p4_op_pmcallocate pm_p4; uint64_t __pad[4]; }; @@ -83,6 +90,8 @@ union pmc_md_pmc { struct pmc_md_amd_pmc pm_amd; struct pmc_md_iaf_pmc pm_iaf; struct pmc_md_iap_pmc pm_iap; + struct pmc_md_ucf_pmc pm_ucf; + struct pmc_md_ucp_pmc pm_ucp; struct pmc_md_p4_pmc pm_p4; }; |