diff options
author | alc <alc@FreeBSD.org> | 2007-06-03 23:18:29 +0000 |
---|---|---|
committer | alc <alc@FreeBSD.org> | 2007-06-03 23:18:29 +0000 |
commit | 0c68a06c262d5f5a208d9c6bc2aeae293543782c (patch) | |
tree | be68dffa1149d3468ca1212aa2d583f93596d5dd /sys/amd64/include/vmparam.h | |
parent | 6cbc02a6818f032531b9b72f0cc4e281f76ea7f4 (diff) | |
download | FreeBSD-src-0c68a06c262d5f5a208d9c6bc2aeae293543782c.zip FreeBSD-src-0c68a06c262d5f5a208d9c6bc2aeae293543782c.tar.gz |
Add the machine-specific definitions for configuring the new physical
memory allocator.
Set the size of phys_avail[] and dump_avail[] using one of these
definitions.
Approved by: re
Diffstat (limited to 'sys/amd64/include/vmparam.h')
-rw-r--r-- | sys/amd64/include/vmparam.h | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/sys/amd64/include/vmparam.h b/sys/amd64/include/vmparam.h index 0fcb874..9bafade 100644 --- a/sys/amd64/include/vmparam.h +++ b/sys/amd64/include/vmparam.h @@ -93,6 +93,44 @@ #define VM_PHYSSEG_DENSE /* + * The number of PHYSSEG entries must be one greater than the number + * of phys_avail entries because the phys_avail entry that spans the + * largest physical address that is accessible by ISA DMA is split + * into two PHYSSEG entries. + */ +#define VM_PHYSSEG_MAX 31 + +/* + * Create two free page pools: VM_FREEPOOL_DEFAULT is the default pool + * from which physical pages are allocated and VM_FREEPOOL_DIRECT is + * the pool from which physical pages for page tables and small UMA + * objects are allocated. + */ +#define VM_NFREEPOOL 2 +#define VM_FREEPOOL_DEFAULT 0 +#define VM_FREEPOOL_DIRECT 1 + +/* + * Create two free page lists: VM_FREELIST_DEFAULT is for physical + * pages that are above the largest physical address that is + * accessible by ISA DMA and VM_FREELIST_ISADMA is for physical pages + * that are below that address. + */ +#define VM_NFREELIST 2 +#define VM_FREELIST_DEFAULT 0 +#define VM_FREELIST_ISADMA 1 + +/* + * An allocation size of 16MB is supported in order to optimize the + * use of the direct map by UMA. Specifically, a cache line contains + * at most 8 PDEs, collectively mapping 16MB of physical memory. By + * reducing the number of distinct 16MB "pages" that are used by UMA, + * the physical memory allocator reduces the likelihood of both 2MB + * page TLB misses and cache misses caused by 2MB page TLB misses. + */ +#define VM_NFREEORDER 13 + +/* * Virtual addresses of things. Derived from the page directory and * page table indexes from pmap.h for precision. * Because of the page that is both a PD and PT, it looks a little |