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author | jhb <jhb@FreeBSD.org> | 2010-05-24 15:45:05 +0000 |
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committer | jhb <jhb@FreeBSD.org> | 2010-05-24 15:45:05 +0000 |
commit | 9e6f9b1e86420cd7da13f1d568950ab52ff2428f (patch) | |
tree | a9d317cc94e24d55cd44eed2052b78547f4a46f9 /sys/amd64/include/specialreg.h | |
parent | ce59c74efda35e47b39621f57c0fe63e02c7af5b (diff) | |
download | FreeBSD-src-9e6f9b1e86420cd7da13f1d568950ab52ff2428f.zip FreeBSD-src-9e6f9b1e86420cd7da13f1d568950ab52ff2428f.tar.gz |
Add support for corrected machine check interrupts. CMCI is a new local
APIC interrupt that fires when a threshold of corrected machine check
events is reached. CMCI also includes a count of events when reporting
corrected errors in the bank's status register. Note that individual
banks may or may not support CMCI. If they do, each bank includes its own
threshold register that determines when the interrupt fires. Currently
the code uses a very simple strategy where it doubles the threshold on
each interrupt until it succeeds in throttling the interrupt to occur
only once a minute (this interval can be tuned via sysctl). The threshold
is also adjusted on each hourly poll which will lower the threshold once
events stop occurring.
Tested by: Sailaja Bangaru sbappana at yahoo com
MFC after: 1 month
Diffstat (limited to 'sys/amd64/include/specialreg.h')
-rw-r--r-- | sys/amd64/include/specialreg.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/sys/amd64/include/specialreg.h b/sys/amd64/include/specialreg.h index 895619c..4e19d8e 100644 --- a/sys/amd64/include/specialreg.h +++ b/sys/amd64/include/specialreg.h @@ -385,7 +385,7 @@ #define MC_STATUS_VAL 0x8000000000000000 #define MC_MISC_RA_LSB 0x000000000000003f /* If MCG_CAP_SER_P */ #define MC_MISC_ADDRESS_MODE 0x00000000000001c0 /* If MCG_CAP_SER_P */ -#define MC_CTL2_THRESHOLD 0x0000000000003fff +#define MC_CTL2_THRESHOLD 0x0000000000007fff #define MC_CTL2_CMCI_EN 0x0000000040000000 /* |