summaryrefslogtreecommitdiffstats
path: root/sys/amd64/include/pmc_mdep.h
diff options
context:
space:
mode:
authorjkoshy <jkoshy@FreeBSD.org>2008-11-27 09:00:47 +0000
committerjkoshy <jkoshy@FreeBSD.org>2008-11-27 09:00:47 +0000
commitaa86a7c59edb19ee67bcf28d9465dc88c0b1fd6a (patch)
treeb416bbd4293b5dc3b86cfd87f09039063e60517b /sys/amd64/include/pmc_mdep.h
parent272e95193bef3d1cacf8bf5d82b6f7bbe6d500a7 (diff)
downloadFreeBSD-src-aa86a7c59edb19ee67bcf28d9465dc88c0b1fd6a.zip
FreeBSD-src-aa86a7c59edb19ee67bcf28d9465dc88c0b1fd6a.tar.gz
- Add support for PMCs in Intel CPUs of Family 6, model 0xE (Core Solo
and Core Duo), models 0xF (Core2), model 0x17 (Core2Extreme) and model 0x1C (Atom). In these CPUs, the actual numbers, kinds and widths of PMCs present need to queried at run time. Support for specific "architectural" events also needs to be queried at run time. Model 0xE CPUs support programmable PMCs, subsequent CPUs additionally support "fixed-function" counters. - Use event names that are close to vendor documentation, taking in account that: - events with identical semantics on two or more CPUs in this family can have differing names in vendor documentation, - identical vendor event names may map to differing events across CPUs, - each type of CPU supports a different subset of measurable events. Fixed-function and programmable counters both use the same vendor names for events. The use of a class name prefix ("iaf-" or "iap-" respectively) permits these to be distinguished. - In libpmc, refactor pmc_name_of_event() into a public interface and an internal helper function, for use by log handling code. - Minor code tweaks: staticize a global, freshen a few comments. Tested by: gnn
Diffstat (limited to 'sys/amd64/include/pmc_mdep.h')
-rw-r--r--sys/amd64/include/pmc_mdep.h9
1 files changed, 7 insertions, 2 deletions
diff --git a/sys/amd64/include/pmc_mdep.h b/sys/amd64/include/pmc_mdep.h
index d4aea66..f8c26f2 100644
--- a/sys/amd64/include/pmc_mdep.h
+++ b/sys/amd64/include/pmc_mdep.h
@@ -40,6 +40,7 @@ struct pmc_mdep;
#endif
#include <dev/hwpmc/hwpmc_amd.h>
+#include <dev/hwpmc/hwpmc_core.h>
#include <dev/hwpmc/hwpmc_piv.h>
#include <dev/hwpmc/hwpmc_tsc.h>
@@ -51,8 +52,8 @@ struct pmc_mdep;
#define PMC_MDEP_CLASS_INDEX_TSC 0
#define PMC_MDEP_CLASS_INDEX_K8 1
#define PMC_MDEP_CLASS_INDEX_P4 1
-#define PMC_MDEP_CLASS_INDEX_IAF 1
-#define PMC_MDEP_CLASS_INDEX_IAP 2
+#define PMC_MDEP_CLASS_INDEX_IAP 1
+#define PMC_MDEP_CLASS_INDEX_IAF 2
/*
* On the amd64 platform we support the following PMCs.
@@ -66,6 +67,8 @@ struct pmc_mdep;
union pmc_md_op_pmcallocate {
struct pmc_md_amd_op_pmcallocate pm_amd;
+ struct pmc_md_iaf_op_pmcallocate pm_iaf;
+ struct pmc_md_iap_op_pmcallocate pm_iap;
struct pmc_md_p4_op_pmcallocate pm_p4;
uint64_t __pad[4];
};
@@ -78,6 +81,8 @@ union pmc_md_op_pmcallocate {
union pmc_md_pmc {
struct pmc_md_amd_pmc pm_amd;
+ struct pmc_md_iaf_pmc pm_iaf;
+ struct pmc_md_iap_pmc pm_iap;
struct pmc_md_p4_pmc pm_p4;
};
OpenPOWER on IntegriCloud