Move userland bits of i386 npx.h and amd64 fpu.h to x86 fpu.h.

Remove FPU types from compat/ia32/ia32_reg.h that are no longer needed.
Create machine/npx.h on amd64 to allow compiling i386 code that uses
this header.

The original npx.h and fpu.h define struct envxmm differently. Both
definitions have been included in the new x86 header as struct __envxmm32
and struct __envxmm64. During compilation either __envxmm32 or __envxmm64
is defined as envxmm depending on machine architecture. On amd64 the i386
struct is also available as struct envxmm32.

Reviewed by:	kib

1 files changed, 1 insertions, 84 deletions

diff --git a/sys/amd64/include/fpu.h b/sys/amd64/include/fpu.h
index d208789..98a016b 100644
--- a/sys/amd64/include/fpu.h
+++ b/sys/amd64/include/fpu.h
@@ -41,64 +41,7 @@
 #ifndef _MACHINE_FPU_H_
 #define	_MACHINE_FPU_H_
 
-/* Contents of each x87 floating point accumulator */
-struct fpacc87 {
-	uint8_t	fp_bytes[10];
-};
-
-/* Contents of each SSE extended accumulator */
-struct  xmmacc {
-	uint8_t	xmm_bytes[16];
-};
-
-/* Contents of the upper 16 bytes of each AVX extended accumulator */
-struct  ymmacc {
-	uint8_t  ymm_bytes[16];
-};
-
-struct  envxmm {
-	uint16_t	en_cw;		/* control word (16bits) */
-	uint16_t	en_sw;		/* status word (16bits) */
-	uint8_t		en_tw;		/* tag word (8bits) */
-	uint8_t		en_zero;
-	uint16_t	en_opcode;	/* opcode last executed (11 bits ) */
-	uint64_t	en_rip;		/* floating point instruction pointer */
-	uint64_t	en_rdp;		/* floating operand pointer */
-	uint32_t	en_mxcsr;	/* SSE sontorol/status register */
-	uint32_t	en_mxcsr_mask;	/* valid bits in mxcsr */
-};
-
-struct  savefpu {
-	struct	envxmm	sv_env;
-	struct {
-		struct fpacc87	fp_acc;
-		uint8_t		fp_pad[6];      /* padding */
-	} sv_fp[8];
-	struct xmmacc	sv_xmm[16];
-	uint8_t sv_pad[96];
-} __aligned(16);
-
-struct xstate_hdr {
-	uint64_t xstate_bv;
-	uint8_t xstate_rsrv0[16];
-	uint8_t	xstate_rsrv[40];
-};
-
-struct savefpu_xstate {
-	struct xstate_hdr sx_hd;
-	struct ymmacc	sx_ymm[16];
-};
-
-struct savefpu_ymm {
-	struct	envxmm	sv_env;
-	struct {
-		struct fpacc87	fp_acc;
-		int8_t		fp_pad[6];      /* padding */
-	} sv_fp[8];
-	struct xmmacc	sv_xmm[16];
-	uint8_t sv_pad[96];
-	struct savefpu_xstate sv_xstate;
-} __aligned(64);
+#include <x86/fpu.h>
 
 #ifdef _KERNEL
 
@@ -108,32 +51,6 @@ struct fpu_kern_ctx;
 
 #define	XSAVE_AREA_ALIGN	64
 
-#endif
-
-/*
- * The hardware default control word for i387's and later coprocessors is
- * 0x37F, giving:
- *
- *	round to nearest
- *	64-bit precision
- *	all exceptions masked.
- *
- * FreeBSD/i386 uses 53 bit precision for things like fadd/fsub/fsqrt etc
- * because of the difference between memory and fpu register stack arguments.
- * If its using an intermediate fpu register, it has 80/64 bits to work
- * with.  If it uses memory, it has 64/53 bits to work with.  However,
- * gcc is aware of this and goes to a fair bit of trouble to make the
- * best use of it.
- *
- * This is mostly academic for AMD64, because the ABI prefers the use
- * SSE2 based math.  For FreeBSD/amd64, we go with the default settings.
- */
-#define	__INITIAL_FPUCW__	0x037F
-#define	__INITIAL_FPUCW_I386__	0x127F
-#define	__INITIAL_MXCSR__	0x1F80
-#define	__INITIAL_MXCSR_MASK__	0xFFBF
-
-#ifdef _KERNEL
 void	fpudna(void);
 void	fpudrop(void);
 void	fpuexit(struct thread *td);