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author | jhb <jhb@FreeBSD.org> | 2006-11-13 22:23:34 +0000 |
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committer | jhb <jhb@FreeBSD.org> | 2006-11-13 22:23:34 +0000 |
commit | fa70d013974c2fa6347ccc628becfdfcdbddc617 (patch) | |
tree | 73f5aafc03e3a710fa43be47c1b42fa68959a2bb /sys/amd64/include/apicvar.h | |
parent | d055bdf0ca2fa4ba26cc9a2bf7648eff24fb1cdd (diff) | |
download | FreeBSD-src-fa70d013974c2fa6347ccc628becfdfcdbddc617.zip FreeBSD-src-fa70d013974c2fa6347ccc628becfdfcdbddc617.tar.gz |
MD support for PCI Message Signalled Interrupts on amd64 and i386:
- Add a new apic_alloc_vectors() method to the local APIC support code
to allocate N contiguous IDT vectors (aligned on a M >= N boundary).
This function is used to allocate IDT vectors for a group of MSI
messages.
- Add MSI and MSI-X PICs. The PIC code here provides methods to manage
edge-triggered MSI messages as x86 interrupt sources. In addition to
the PIC methods, msi.c also includes methods to allocate and release
MSI and MSI-X messages. For x86, we allow for up to 128 different
MSI IRQs starting at IRQ 256 (IRQs 0-15 are reserved for ISA IRQs,
16-254 for APIC PCI IRQs, and IRQ 255 is reserved).
- Add pcib_(alloc|release)_msi[x]() methods to the MD x86 PCI bridge
drivers to bubble the request up to the nexus driver.
- Add pcib_(alloc|release)_msi[x]() methods to the x86 nexus drivers that
ask the MSI PIC code to allocate resources and IDT vectors.
MFC after: 2 months
Diffstat (limited to 'sys/amd64/include/apicvar.h')
-rw-r--r-- | sys/amd64/include/apicvar.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/sys/amd64/include/apicvar.h b/sys/amd64/include/apicvar.h index ebd8f04..6cc37c6 100644 --- a/sys/amd64/include/apicvar.h +++ b/sys/amd64/include/apicvar.h @@ -175,6 +175,7 @@ inthand_t IDTVEC(apic_isr7), IDTVEC(spuriousint), IDTVEC(timerint); u_int apic_alloc_vector(u_int irq); +u_int apic_alloc_vectors(u_int *irqs, u_int count, u_int align); void apic_enable_vector(u_int vector); void apic_free_vector(u_int vector, u_int irq); u_int apic_idt_to_irq(u_int vector); |