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| author | jhb <jhb@FreeBSD.org> | 2006-05-01 21:36:47 +0000 |
|---|---|---|
| committer | jhb <jhb@FreeBSD.org> | 2006-05-01 21:36:47 +0000 |
| commit | ca8d347695197fe6855a628e0325e9ab16820d5f (patch) | |
| tree | 3a0d26aaaeb23a38ebdd2566fd5bdbc8c7bde43f /sys/amd64/include/apicvar.h | |
| parent | 4db7dec298d4cc5de09e6704e4b98919f21bacaf (diff) | |
| download | FreeBSD-src-ca8d347695197fe6855a628e0325e9ab16820d5f.zip FreeBSD-src-ca8d347695197fe6855a628e0325e9ab16820d5f.tar.gz | |
Add a new 'pmap_invalidate_cache()' to flush the CPU caches via the
wbinvd() instruction. This includes a new IPI so that all CPU caches on
all CPUs are flushed for the SMP case.
MFC after: 1 month
Diffstat (limited to 'sys/amd64/include/apicvar.h')
| -rw-r--r-- | sys/amd64/include/apicvar.h | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/sys/amd64/include/apicvar.h b/sys/amd64/include/apicvar.h index c87dc7e..98cf3a3 100644 --- a/sys/amd64/include/apicvar.h +++ b/sys/amd64/include/apicvar.h @@ -118,8 +118,9 @@ #define IPI_INVLTLB (APIC_IPI_INTS + 1) /* TLB Shootdown IPIs */ #define IPI_INVLPG (APIC_IPI_INTS + 2) #define IPI_INVLRNG (APIC_IPI_INTS + 3) +#define IPI_INVLCACHE (APIC_IPI_INTS + 4) /* Vector to handle bitmap based IPIs */ -#define IPI_BITMAP_VECTOR (APIC_IPI_INTS + 5) +#define IPI_BITMAP_VECTOR (APIC_IPI_INTS + 6) /* IPIs handled by IPI_BITMAPED_VECTOR (XXX ups is there a better place?) */ #define IPI_AST 0 /* Generate software trap. */ @@ -127,7 +128,7 @@ #define IPI_BITMAP_LAST IPI_PREEMPT #define IPI_IS_BITMAPED(x) ((x) <= IPI_BITMAP_LAST) -#define IPI_STOP (APIC_IPI_INTS + 6) /* Stop CPU until restarted. */ +#define IPI_STOP (APIC_IPI_INTS + 7) /* Stop CPU until restarted. */ /* * The spurious interrupt can share the priority class with the IPIs since |
