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| author | kib <kib@FreeBSD.org> | 2018-02-17 18:00:01 +0000 |
|---|---|---|
| committer | Luiz Souza <luiz@netgate.com> | 2018-02-19 14:55:29 -0300 |
| commit | 430a2bea3907149b30cc75fc722b6cf1f81da82a (patch) | |
| tree | c808db355a0220f39f7dff07a7e4805c57c44190 /sys/amd64/ia32/ia32_exception.S | |
| parent | 75492dc7653f9d5eb0e33bc8277957739f587ff0 (diff) | |
| download | FreeBSD-src-430a2bea3907149b30cc75fc722b6cf1f81da82a.zip FreeBSD-src-430a2bea3907149b30cc75fc722b6cf1f81da82a.tar.gz | |
MFC r328083,328096,328116,328119,328120,328128,328135,328153,328157,
328166,328177,328199,328202,328205,328468,328470,328624,328625,328627,
328628,329214,329297,329365:
Meltdown mitigation by PTI, PCID optimization of PTI, and kernel use of IBRS
for some mitigations of Spectre.
Tested by: emaste, Arshan Khanifar <arshankhanifar@gmail.com>
Discussed with: jkim
Sponsored by: The FreeBSD Foundation
(cherry picked from commit 6dd025b40ee6870bea6ba670f30dcf684edc3f6c)
Diffstat (limited to 'sys/amd64/ia32/ia32_exception.S')
| -rw-r--r-- | sys/amd64/ia32/ia32_exception.S | 17 |
1 files changed, 10 insertions, 7 deletions
diff --git a/sys/amd64/ia32/ia32_exception.S b/sys/amd64/ia32/ia32_exception.S index fe1a676..1f09764 100644 --- a/sys/amd64/ia32/ia32_exception.S +++ b/sys/amd64/ia32/ia32_exception.S @@ -40,24 +40,27 @@ * that it originated in supervisor mode and skip the swapgs. */ SUPERALIGN_TEXT +IDTVEC(int0x80_syscall_pti) + PTI_UENTRY has_err=0 + jmp int0x80_syscall_common + SUPERALIGN_TEXT IDTVEC(int0x80_syscall) swapgs +int0x80_syscall_common: pushq $2 /* sizeof "int 0x80" */ subq $TF_ERR,%rsp /* skip over tf_trapno */ movq %rdi,TF_RDI(%rsp) movq PCPU(CURPCB),%rdi andl $~PCB_FULL_IRET,PCB_FLAGS(%rdi) - movw %fs,TF_FS(%rsp) - movw %gs,TF_GS(%rsp) - movw %es,TF_ES(%rsp) - movw %ds,TF_DS(%rsp) - sti - movq %rsi,TF_RSI(%rsp) + SAVE_SEGS + movq %rax,TF_RAX(%rsp) movq %rdx,TF_RDX(%rsp) movq %rcx,TF_RCX(%rsp) + call handle_ibrs_entry + sti + movq %rsi,TF_RSI(%rsp) movq %r8,TF_R8(%rsp) movq %r9,TF_R9(%rsp) - movq %rax,TF_RAX(%rsp) movq %rbx,TF_RBX(%rsp) movq %rbp,TF_RBP(%rsp) movq %r10,TF_R10(%rsp) |
