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author | kib <kib@FreeBSD.org> | 2015-12-03 11:14:14 +0000 |
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committer | kib <kib@FreeBSD.org> | 2015-12-03 11:14:14 +0000 |
commit | f741f698b73f18777a27f138b3cfc8ad44bde038 (patch) | |
tree | 75c40eece99b5dfdb79cdf57b3e74fd84f9976f0 /sys/amd64/amd64/pmap.c | |
parent | 559961c499e55f090d0cd285103c25e0dfc18d02 (diff) | |
download | FreeBSD-src-f741f698b73f18777a27f138b3cfc8ad44bde038.zip FreeBSD-src-f741f698b73f18777a27f138b3cfc8ad44bde038.tar.gz |
For amd64 non-PCID machines, and for i386 machines with support for
the PG_G global pte flag, pmap_invalidate_all() fails to flush global
TLB entries [*]. This is because TLB shootdown handler for such
configs reloads CR3, and on i386 pmap_invalidate_all() does the same
for the initiating CPU. Note that current code does not issue total
invalidation requests for the kernel_pmap.
Rename amd64 function invltlb_globpcid() to invltlb_glob(), it is not
specific for PCID for quite some time, and implement the same
functionality for i386. Use the function instead of invltlb() in
shootdown handlers and in i386 pmap_invalidate_all(), but only for the
kernel pmap (which maps pages with the PG_G attribute set), which
takes care of PG_G TLB entries on flush.
To detect the affected pmap in i386 TLB shootdown handler, pmap should
be passed to the smp_masked_invltlb() function, which makes amd64 and
i386 TLB shootdown code almost identical. Merge the code under x86/.
Noted by: jhb [*]
Reviewed by: cem, jhb, pho
Tested by: pho
Sponsored by: The FreeBSD Foundation
Differential revision: https://reviews.freebsd.org/D4346
Diffstat (limited to 'sys/amd64/amd64/pmap.c')
-rw-r--r-- | sys/amd64/amd64/pmap.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/sys/amd64/amd64/pmap.c b/sys/amd64/amd64/pmap.c index 883c1c5..9f9654a 100644 --- a/sys/amd64/amd64/pmap.c +++ b/sys/amd64/amd64/pmap.c @@ -1321,7 +1321,7 @@ pmap_update_pde_invalidate(pmap_t pmap, vm_offset_t va, pd_entry_t newpde) * Promotion: flush every 4KB page mapping from the TLB, * including any global (PG_G) mappings. */ - invltlb_globpcid(); + invltlb_glob(); } } #ifdef SMP @@ -1482,7 +1482,7 @@ pmap_invalidate_all(pmap_t pmap) bzero(&d, sizeof(d)); invpcid(&d, INVPCID_CTXGLOB); } else { - invltlb_globpcid(); + invltlb_glob(); } mask = &all_cpus; } else { @@ -1653,7 +1653,7 @@ pmap_invalidate_all(pmap_t pmap) bzero(&d, sizeof(d)); invpcid(&d, INVPCID_CTXGLOB); } else { - invltlb_globpcid(); + invltlb_glob(); } } else if (pmap == PCPU_GET(curpmap)) { if (pmap_pcid_enabled) { |