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authorattilio <attilio@FreeBSD.org>2010-08-11 10:51:27 +0000
committerattilio <attilio@FreeBSD.org>2010-08-11 10:51:27 +0000
commitaf812168de987e4574b010e1b25ef58447386595 (patch)
tree0dc25afb56094976f7325aea2ae24d0971fcf420 /sys/amd64/amd64/mp_machdep.c
parent29a125ba3369b7e1baefd0195e0366aa21f03f72 (diff)
downloadFreeBSD-src-af812168de987e4574b010e1b25ef58447386595.zip
FreeBSD-src-af812168de987e4574b010e1b25ef58447386595.tar.gz
IPI handlers may run generally with interrupts disabled because they
are served via an interrupt gate. However, that doesn't explicitly prevent preemption and thread migration thus scheduler pinning may be necessary in some handlers. Fix that. Tested by: gianni MFC after: 1 month
Diffstat (limited to 'sys/amd64/amd64/mp_machdep.c')
-rw-r--r--sys/amd64/amd64/mp_machdep.c10
1 files changed, 9 insertions, 1 deletions
diff --git a/sys/amd64/amd64/mp_machdep.c b/sys/amd64/amd64/mp_machdep.c
index 57daf74..46ad289 100644
--- a/sys/amd64/amd64/mp_machdep.c
+++ b/sys/amd64/amd64/mp_machdep.c
@@ -1324,8 +1324,10 @@ cpustop_handler(void)
cpumask_t cpumask;
u_int cpu;
+ sched_pin();
cpu = PCPU_GET(cpuid);
cpumask = PCPU_GET(cpumask);
+ sched_unpin();
savectx(&stoppcbs[cpu]);
@@ -1356,8 +1358,10 @@ cpususpend_handler(void)
register_t cr3, rf;
u_int cpu;
+ sched_pin();
cpu = PCPU_GET(cpuid);
cpumask = PCPU_GET(cpumask);
+ sched_unpin();
rf = intr_disable();
cr3 = rcr3();
@@ -1535,10 +1539,14 @@ mp_grab_cpu_hlt(void)
#endif
int retval;
- mask = PCPU_GET(cpumask);
#ifdef MP_WATCHDOG
+ sched_pin();
+ mask = PCPU_GET(cpumask);
cpuid = PCPU_GET(cpuid);
+ sched_unpin();
ap_watchdog(cpuid);
+#else
+ mask = PCPU_GET(cpumask);
#endif
retval = mask & hlt_cpus_mask;
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