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| author | jhb <jhb@FreeBSD.org> | 2010-06-15 18:51:41 +0000 |
|---|---|---|
| committer | jhb <jhb@FreeBSD.org> | 2010-06-15 18:51:41 +0000 |
| commit | 3e2692fd422754febd92a4d1613d4c2d454b8adc (patch) | |
| tree | d79d22ca750365c31e1642d7bfb41c3704ee18a3 /sys/amd64/amd64/mp_machdep.c | |
| parent | c907b418fb8aa37b08afb920eb5d944466e1e0f6 (diff) | |
| download | FreeBSD-src-3e2692fd422754febd92a4d1613d4c2d454b8adc.zip FreeBSD-src-3e2692fd422754febd92a4d1613d4c2d454b8adc.tar.gz | |
Restore the machine check register banks on resume. For banks being
monitored via CMCI, reset the interrupt threshold to 1 on resume.
Reviewed by: jkim
MFC after: 2 weeks
Diffstat (limited to 'sys/amd64/amd64/mp_machdep.c')
| -rw-r--r-- | sys/amd64/amd64/mp_machdep.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/sys/amd64/amd64/mp_machdep.c b/sys/amd64/amd64/mp_machdep.c index df02255..1bd7200 100644 --- a/sys/amd64/amd64/mp_machdep.c +++ b/sys/amd64/amd64/mp_machdep.c @@ -1264,6 +1264,7 @@ cpususpend_handler(void) /* Restore CR3 and enable interrupts */ load_cr3(cr3); + mca_resume(); lapic_setup(0); intr_restore(rf); } |
