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| author | jhb <jhb@FreeBSD.org> | 2006-05-01 21:36:47 +0000 |
|---|---|---|
| committer | jhb <jhb@FreeBSD.org> | 2006-05-01 21:36:47 +0000 |
| commit | ca8d347695197fe6855a628e0325e9ab16820d5f (patch) | |
| tree | 3a0d26aaaeb23a38ebdd2566fd5bdbc8c7bde43f /sys/amd64/amd64/apic_vector.S | |
| parent | 4db7dec298d4cc5de09e6704e4b98919f21bacaf (diff) | |
| download | FreeBSD-src-ca8d347695197fe6855a628e0325e9ab16820d5f.zip FreeBSD-src-ca8d347695197fe6855a628e0325e9ab16820d5f.tar.gz | |
Add a new 'pmap_invalidate_cache()' to flush the CPU caches via the
wbinvd() instruction. This includes a new IPI so that all CPU caches on
all CPUs are flushed for the SMP case.
MFC after: 1 month
Diffstat (limited to 'sys/amd64/amd64/apic_vector.S')
| -rw-r--r-- | sys/amd64/amd64/apic_vector.S | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/sys/amd64/amd64/apic_vector.S b/sys/amd64/amd64/apic_vector.S index 96018f3..ab781ca 100644 --- a/sys/amd64/amd64/apic_vector.S +++ b/sys/amd64/amd64/apic_vector.S @@ -171,6 +171,25 @@ IDTVEC(invlrng) iretq /* + * Invalidate cache. + */ + .text + SUPERALIGN_TEXT +IDTVEC(invlcache) + pushq %rax + + wbinvd + + movq lapic, %rax + movl $0, LA_EOI(%rax) /* End Of Interrupt to APIC */ + + lock + incl smp_tlb_wait + + popq %rax + iretq + +/* * Handler for IPIs sent via the per-cpu IPI bitmap. */ .text |
