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author | gallatin <gallatin@FreeBSD.org> | 1999-12-14 17:35:08 +0000 |
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committer | gallatin <gallatin@FreeBSD.org> | 1999-12-14 17:35:08 +0000 |
commit | 06a35cd8cdb620e14f713e892ae2e237c5f8f542 (patch) | |
tree | c058b02c61dabc105b9800e0fe6da7248f0827c6 /sys/alpha/pci/tsunami.c | |
parent | 6ef9746e27784bf07538a73466c346ed579759e4 (diff) | |
download | FreeBSD-src-06a35cd8cdb620e14f713e892ae2e237c5f8f542.zip FreeBSD-src-06a35cd8cdb620e14f713e892ae2e237c5f8f542.tar.gz |
Improve the mapping between the hardware PCI bus numbering on multi-hose
tsunami systems and the PCI bus-numbering system of FreeBSD. Eg, the former
allows for 2 PCI bus 2's (one each on hoses 0 and 1) while the latter
needs to give each PCI bus a unique monotonically increasing number.
It has been fairly well tested and correctly maps machines with a ppb on
hose 1 as well as machines with ppbs on both hoses.
DS10s remain untested, as I do not have a pci card with a ppb which will
pass POST in a tsunami.
This is a house of cards.
Diffstat (limited to 'sys/alpha/pci/tsunami.c')
-rw-r--r-- | sys/alpha/pci/tsunami.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/sys/alpha/pci/tsunami.c b/sys/alpha/pci/tsunami.c index c9cb3b5..41f67a5 100644 --- a/sys/alpha/pci/tsunami.c +++ b/sys/alpha/pci/tsunami.c @@ -62,7 +62,7 @@ struct tsunami_softc { int junk; /* no softc */ }; -static int num_pchips = 0; +int tsunami_num_pchips = 0; static volatile tsunami_pchip *pchip[2] = {pchip0, pchip1}; #define TSUNAMI_SOFTC(dev) (struct tsunami_softc*) device_get_softc(dev) @@ -279,7 +279,7 @@ tsunami_check_abort(void) type data; \ if (h == (u_int8_t)-1) \ h = tsunami_hose_from_bus(b); \ - bus = tsunami_bus_within_hose(h, b) ? b : 0; \ + bus = tsunami_bus_within_hose(h, b); \ va = TSUNAMI_CFGADDR(bus, s, f, r, h); \ tsunami_clear_abort(); \ if (badaddr((caddr_t)va, width)) { \ @@ -296,7 +296,7 @@ tsunami_check_abort(void) vm_offset_t va; \ if (h == (u_int8_t)-1) \ h = tsunami_hose_from_bus(b); \ - bus = tsunami_bus_within_hose(h, b) ? b : 0; \ + bus = tsunami_bus_within_hose(h, b); \ va = TSUNAMI_CFGADDR(bus, s, f, r, h); \ tsunami_clear_abort(); \ if (badaddr((caddr_t)va, width)) \ @@ -468,7 +468,7 @@ static void tsunami_sgmap_invalidate(void) { alpha_mb(); - switch (num_pchips) { + switch (tsunami_num_pchips) { case 2: pchip[1]->tlbia.reg = (u_int64_t)0; case 1: @@ -507,7 +507,7 @@ tsunami_init_sgmap(void) if (!sgtable) panic("tsunami_init_sgmap: can't allocate page table"); - for(i=0; i < num_pchips; i++){ + for(i=0; i < tsunami_num_pchips; i++){ pchip[i]->tba[0].reg = pmap_kextract((vm_offset_t) sgtable); pchip[i]->wsba[0].reg |= WINDOW_ENABLE | WINDOW_SCATTER_GATHER; @@ -546,14 +546,14 @@ tsunami_probe(device_t dev) tsunami0 = dev; device_set_desc(dev, "21271 Core Logic chipset"); if(cchip->csc.reg & CSC_P1P) - num_pchips = 2; + tsunami_num_pchips = 2; else - num_pchips = 1; + tsunami_num_pchips = 1; pci_init_resources(); isa_init_intr(); - for(i = 0; i < num_pchips; i++) { + for(i = 0; i < tsunami_num_pchips; i++) { hose = malloc(sizeof(int), M_DEVBUF, M_NOWAIT); *hose = i; child = device_add_child(dev, "pcib", i); |