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authormav <mav@FreeBSD.org>2011-05-15 01:01:53 +0000
committermav <mav@FreeBSD.org>2011-05-15 01:01:53 +0000
commit1c89b601bc4cc1a1cd314875fdd0fd8bb9286205 (patch)
tree4658231cf7b93470a662ecee8456992d1a6f9f6e /share
parent6a2ccc4ca4453a123463d5e1214818e7d21c7a08 (diff)
downloadFreeBSD-src-1c89b601bc4cc1a1cd314875fdd0fd8bb9286205.zip
FreeBSD-src-1c89b601bc4cc1a1cd314875fdd0fd8bb9286205.tar.gz
Fix few typos.
Submitted by: uqs MFC after: 1 week
Diffstat (limited to 'share')
-rw-r--r--share/man/man4/hpet.44
1 files changed, 2 insertions, 2 deletions
diff --git a/share/man/man4/hpet.4 b/share/man/man4/hpet.4
index f787895..f501e0b 100644
--- a/share/man/man4/hpet.4
+++ b/share/man/man4/hpet.4
@@ -69,14 +69,14 @@ This driver uses High Precision Event Timer hardware (part of the chipset,
usually enumerated via ACPI) to supply kernel with one time counter and
several (usually from 3 to 8) event timers.
This hardware includes single main counter with known increment frequency
-(10MHz or more), and several programable comparators (optionally with
+(10MHz or more), and several programmable comparators (optionally with
automatic reload feature).
When value of the main counter matches current value of any comparator,
interrupt can be generated.
Depending on hardware capabilities and configuration, interrupt can be
delivered as regular I/O APIC interrupt (ISA or PCI) in range from 0 to 31,
or as Front Side Bus interrupt, alike to PCI MSI interrupts, or in so called
-"LegacyReplacement Route" HPET can speal IRQ0 of i8254 and IRQ8 of the RTC.
+"LegacyReplacement Route" HPET can steal IRQ0 of i8254 and IRQ8 of the RTC.
Interrupt can be either edge- or level-triggered. In last case they could be
safely shared with PCI IRQs.
Driver prefers to use FSB interrupts, if supported, to avoid sharing.
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