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author | joel <joel@FreeBSD.org> | 2013-04-28 06:15:56 +0000 |
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committer | joel <joel@FreeBSD.org> | 2013-04-28 06:15:56 +0000 |
commit | 2aea9ea9f69ab80d5c533e0496fe14b636f43441 (patch) | |
tree | 98abf71d4f98eb6ce30da529d8a371b815b9ad90 /share/man/man4/man4.arm | |
parent | d4951792e550b0e8317a420bf4695ccd77226686 (diff) | |
download | FreeBSD-src-2aea9ea9f69ab80d5c533e0496fe14b636f43441.zip FreeBSD-src-2aea9ea9f69ab80d5c533e0496fe14b636f43441.tar.gz |
mdoc improvements
Diffstat (limited to 'share/man/man4/man4.arm')
-rw-r--r-- | share/man/man4/man4.arm/devcfg.4 | 24 |
1 files changed, 16 insertions, 8 deletions
diff --git a/share/man/man4/man4.arm/devcfg.4 b/share/man/man4/man4.arm/devcfg.4 index 392e77d..83c4168 100644 --- a/share/man/man4/man4.arm/devcfg.4 +++ b/share/man/man4/man4.arm/devcfg.4 @@ -37,7 +37,9 @@ The special file .Pa /dev/devcfg can be used to configure the PL (FPGA) section of the Xilinx Zynq-7000. .Pp -On the first write to the character device at file offset 0, the devcfg driver +On the first write to the character device at file offset 0, the +.Nm +driver asserts the top-level PL reset signals, disables the PS-PL level shifters, and clears the PL configuration. Write data is sent to the PCAP (processor configuration access port). @@ -54,16 +56,18 @@ The file should not be confused with the .bit file output by the FPGA design tools. It is the binary form of the configuration bitstream. The Xilinx -.Pa promgen +.Ic promgen tool can do the conversion: .Bd -literal -offset indent promgen -b -w -p bin -data_width 32 -u 0 design.bit -o design.bit.bin .Ed .Sh SYSCTL VARIABLES -The devcfg driver provides the following +The +.Nm +driver provides the following .Xr sysctl 8 variables: -.Bl -tag -width 12 +.Bl -tag -width 4n .It Va hw.fpga.pl_done .Pp This variable always reflects the status of the PL's DONE signal. @@ -73,15 +77,19 @@ A 1 means the PL section has been properly programmed. This variable controls if the PS-PL level shifters are enabled after the PL section has been reconfigured. This variable is 1 by default but setting it to 0 allows the PL section to be -programmed with configurations that don't interface to the PS section of the +programmed with configurations that do not interface to the PS section of the part. Changing this value has no effect on the level shifters until the next device reconfiguration. +.El .Sh FILES -/dev/devcfg Character device for +.Bl -tag -width 12n +.It Pa /dev/devcfg +Character device for the .Nm driver. -.Sh AUTHORS -Thomas Skibo +.El .Sh SEE ALSO Zynq-7000 SoC Technical Reference Manual (Xilinx doc UG585) +.Sh AUTHORS +Thomas Skibo |