A follow-up to r288492. In fact, revert the mentioned commit for

pre-VFPv3 processors, since they do require software support code to
handle denormals.  For VFPv3 and later, enable flush-to-zero if
hardware does not claim full denormals arithmetic support by VMVFR1_FZ
field in mvfr1 register.

The end result is that we do use correct fpu environment on Cortexes
with VFPv3, while ARM11 (e.g. rpi) is in non-compliant flush-to-zero
mode.  At least CPUs without complete hardware implementation of
IEEE 754 do not cause unhandled floating point exception on underflow,
as it was before r288492.

Noted by:	ian
Tested by:	gjb
Sponsored by:	The FreeBSD Foundation
MFC after:	1 week

0 files changed, 0 insertions, 0 deletions