summaryrefslogtreecommitdiffstats
path: root/lib/libcompiler_rt
diff options
context:
space:
mode:
authorobrien <obrien@FreeBSD.org>2013-02-08 16:10:16 +0000
committerobrien <obrien@FreeBSD.org>2013-02-08 16:10:16 +0000
commit3028e3f8aba938dfd0bf9fda987b8a72140b8027 (patch)
treeb2f038222ff8a70f687652441df00d2b564c8abe /lib/libcompiler_rt
parent952a6d5a7cd3d3f9007acfa06805262fc04a105f (diff)
parent1d08d5f677c1dfa810e381073590adbae19cc69f (diff)
downloadFreeBSD-src-3028e3f8aba938dfd0bf9fda987b8a72140b8027.zip
FreeBSD-src-3028e3f8aba938dfd0bf9fda987b8a72140b8027.tar.gz
Sync with HEAD.
Diffstat (limited to 'lib/libcompiler_rt')
-rw-r--r--lib/libcompiler_rt/Makefile32
1 files changed, 26 insertions, 6 deletions
diff --git a/lib/libcompiler_rt/Makefile b/lib/libcompiler_rt/Makefile
index 84f9b36..a9daada 100644
--- a/lib/libcompiler_rt/Makefile
+++ b/lib/libcompiler_rt/Makefile
@@ -28,7 +28,6 @@ SRCF= absvdi2 \
ashlti3 \
ashrdi3 \
ashrti3 \
- clear_cache \
clzdi2 \
clzsi2 \
clzti2 \
@@ -126,30 +125,40 @@ SRCF= absvdi2 \
umoddi3 \
umodti3
+# Don't build clear_cache on ARM with clang as it is a builtin there.
+.if ${MACHINE_CPUARCH} != "arm" || ${COMPILER_TYPE} != "clang"
+SRCF+= clear_cache
+.endif
+
# These are already shipped by libc.a on arm and mips
.if ${MACHINE_CPUARCH} != "arm" && ${MACHINE_CPUARCH} != "mips"
SRCF+= adddf3 \
addsf3 \
divdf3 \
divsf3 \
- divsi3 \
extendsfdf2 \
fixdfsi \
fixsfsi \
floatsidf \
floatsisf \
- modsi3 \
muldf3 \
mulsf3 \
subdf3 \
subsf3 \
- truncdfsf2 \
+ truncdfsf2
+.endif
+
+.if ${MACHINE_CPUARCH} != "mips" && \
+ (${MACHINE_CPUARCH} != "arm" || ${MK_ARM_EABI} != "no")
+SRCF+= divsi3 \
+ modsi3 \
udivsi3 \
umodsi3
.endif
-# FreeBSD-specific atomic intrinsics.
-.if ${MACHINE_CPUARCH} == "arm" || ${MACHINE_CPUARCH} == "mips"
+# FreeBSD-specific atomic intrinsics. Clang provides them as a builtin.
+.if (${MACHINE_CPUARCH} == "arm" && ${COMPILER_TYPE} != "clang") || \
+ ${MACHINE_CPUARCH} == "mips"
SRCF+= __sync_fetch_and_add_4 \
__sync_fetch_and_and_4 \
__sync_fetch_and_or_4 \
@@ -176,6 +185,17 @@ SRCS+= ${file}.c
. endif
.endfor
+.if ${MACHINE_CPUARCH} == "arm" && ${MK_ARM_EABI} != "no"
+SRCS+= aeabi_idivmod.S \
+ aeabi_ldivmod.S \
+ aeabi_memcmp.S \
+ aeabi_memcpy.S \
+ aeabi_memmove.S \
+ aeabi_memset.S \
+ aeabi_uidivmod.S \
+ aeabi_uldivmod.S
+.endif
+
.if ${MACHINE_CPUARCH} != "mips"
. if ${MK_INSTALLLIB} != "no"
SYMLINKS+=libcompiler_rt.a ${LIBDIR}/libgcc.a
OpenPOWER on IntegriCloud