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| author | yongari <yongari@FreeBSD.org> | 2009-03-31 03:29:05 +0000 |
|---|---|---|
| committer | yongari <yongari@FreeBSD.org> | 2009-03-31 03:29:05 +0000 |
| commit | 8224fa9318fbd990306359cf9b646b9a74d1cbe6 (patch) | |
| tree | 9733ecf526c94d91e798ea133ec27654626a32ff /lib/libc/stdlib/system.c | |
| parent | 9b2b26a623ab0e3fdbcaba577416c3cb2ea85443 (diff) | |
| download | FreeBSD-src-8224fa9318fbd990306359cf9b646b9a74d1cbe6.zip FreeBSD-src-8224fa9318fbd990306359cf9b646b9a74d1cbe6.tar.gz | |
Partial revert r185756.
It seems that RTL8168D and RTL8102EL requires additional settle
time to complete RL_PHYAR register write. Accessing RL_PHYAR
register right after the write causes errors for subsequent PHY
register accesses.
Tested by: george at luckytele dot com,
Steve Wills < STEVE at stevenwills dot com >
Diffstat (limited to 'lib/libc/stdlib/system.c')
0 files changed, 0 insertions, 0 deletions
