Now that we have UARTs running with fast interrupt handlers the ata

driver's i/o ops must be locked to avoid chaos.  Extend the cambria
bus tag to support ata and add a spin lock.  The ata driver is
hacked to use that instead of it's builtin hack for ixp425.  Once
the ata driver is fixed to not be confused about byte order we can
generalize the cambria bus tag code and make it generally useful.

While here take advantage of our being ixp435-specific to remove
delays when switching between byte+word accesses and to eliminate
the 2us delay for the uarts (the spin lock overhead looks to do
this for us).

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