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authorrdivacky <rdivacky@FreeBSD.org>2009-10-23 14:19:52 +0000
committerrdivacky <rdivacky@FreeBSD.org>2009-10-23 14:19:52 +0000
commit9643cca39fb9fb3b49a8912926de98acf882283c (patch)
tree22cc59e4b240d84c3a5a60531119c4eca914a256 /lib/Target/ARM/ARMSubtarget.h
parent1adacceba9c9ee0f16e54388e56c9a249b296f75 (diff)
downloadFreeBSD-src-9643cca39fb9fb3b49a8912926de98acf882283c.zip
FreeBSD-src-9643cca39fb9fb3b49a8912926de98acf882283c.tar.gz
Update LLVM to r84949.
Diffstat (limited to 'lib/Target/ARM/ARMSubtarget.h')
-rw-r--r--lib/Target/ARM/ARMSubtarget.h10
1 files changed, 7 insertions, 3 deletions
diff --git a/lib/Target/ARM/ARMSubtarget.h b/lib/Target/ARM/ARMSubtarget.h
index 7098fd4..7478159 100644
--- a/lib/Target/ARM/ARMSubtarget.h
+++ b/lib/Target/ARM/ARMSubtarget.h
@@ -126,9 +126,13 @@ protected:
const std::string & getCPUString() const { return CPUString; }
- /// enablePostRAScheduler - From TargetSubtarget, return true to
- /// enable post-RA scheduler.
- bool enablePostRAScheduler() const { return PostRAScheduler; }
+ /// enablePostRAScheduler - True at 'More' optimization except
+ /// for Thumb1.
+ bool enablePostRAScheduler(CodeGenOpt::Level OptLevel,
+ TargetSubtarget::AntiDepBreakMode& mode) const {
+ mode = TargetSubtarget::ANTIDEP_NONE;
+ return PostRAScheduler && OptLevel >= CodeGenOpt::Default;
+ }
/// getInstrItins - Return the instruction itineraies based on subtarget
/// selection.
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