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| author | dim <dim@FreeBSD.org> | 2015-09-06 18:34:38 +0000 |
|---|---|---|
| committer | dim <dim@FreeBSD.org> | 2015-09-06 18:34:38 +0000 |
| commit | 9fcebda97d0cb3d7a2235d2ad835c3a2679e7683 (patch) | |
| tree | 461d3cf041290f4a99740d540bf0973d6084f98e /lib/Target/AMDGPU/SIMachineFunctionInfo.cpp | |
| parent | c5dd590220d0afe971d065bfe9324f549dd00968 (diff) | |
| download | FreeBSD-src-9fcebda97d0cb3d7a2235d2ad835c3a2679e7683.zip FreeBSD-src-9fcebda97d0cb3d7a2235d2ad835c3a2679e7683.tar.gz | |
Import llvm 3.7.0 release (r246257).
Diffstat (limited to 'lib/Target/AMDGPU/SIMachineFunctionInfo.cpp')
| -rw-r--r-- | lib/Target/AMDGPU/SIMachineFunctionInfo.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp b/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp index d23b92e..587ea63 100644 --- a/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp +++ b/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp @@ -53,6 +53,7 @@ SIMachineFunctionInfo::SpilledReg SIMachineFunctionInfo::getSpilledReg( if (!LaneVGPRs.count(LaneVGPRIdx)) { unsigned LaneVGPR = TRI->findUnusedRegister(MRI, &AMDGPU::VGPR_32RegClass); LaneVGPRs[LaneVGPRIdx] = LaneVGPR; + MRI.setPhysRegUsed(LaneVGPR); // Add this register as live-in to all blocks to avoid machine verifer // complaining about use of an undefined physical register. |
