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authordim <dim@FreeBSD.org>2014-05-11 18:24:26 +0000
committerdim <dim@FreeBSD.org>2014-05-11 18:24:26 +0000
commit87ba4fbed530c9d0dff7505d121035f5ed09c9f3 (patch)
tree9f9245264c66971905eab3af40b7fc82e38fc2ad /lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
parentbbe9ac81c3fe3a3ea47d81758276b4432d28786a (diff)
downloadFreeBSD-src-87ba4fbed530c9d0dff7505d121035f5ed09c9f3.zip
FreeBSD-src-87ba4fbed530c9d0dff7505d121035f5ed09c9f3.tar.gz
Vendor import of llvm RELEASE_34/dot1-final tag r208032 (effectively, 3.4.1 release):
https://llvm.org/svn/llvm-project/llvm/tags/RELEASE_34/dot1-final@208032
Diffstat (limited to 'lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp')
-rw-r--r--lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp1
1 files changed, 1 insertions, 0 deletions
diff --git a/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp b/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
index 2c3cdcc..3fb2d9b 100644
--- a/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
+++ b/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
@@ -210,6 +210,7 @@ SDValue VectorLegalizer::LegalizeOp(SDValue Op) {
case ISD::SRL:
case ISD::ROTL:
case ISD::ROTR:
+ case ISD::BSWAP:
case ISD::CTLZ:
case ISD::CTTZ:
case ISD::CTLZ_ZERO_UNDEF:
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