Vendor import of llvm trunk r161861:

http://llvm.org/svn/llvm-project/llvm/trunk@161861

1 files changed, 0 insertions, 201 deletions

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-=pod
-
-=head1 NAME
-
-llc - LLVM static compiler
-
-=head1 SYNOPSIS
-
-B<llc> [I<options>] [I<filename>]
-
-=head1 DESCRIPTION
-
-The B<llc> command compiles LLVM source inputs into assembly language for a
-specified architecture.  The assembly language output can then be passed through
-a native assembler and linker to generate a native executable.
-
-The choice of architecture for the output assembly code is automatically
-determined from the input file, unless the B<-march> option is used to override
-the default.
-
-=head1 OPTIONS
-
-If I<filename> is - or omitted, B<llc> reads from standard input.  Otherwise, it
-will from I<filename>.  Inputs can be in either the LLVM assembly language
-format (.ll) or the LLVM bitcode format (.bc).
-
-If the B<-o> option is omitted, then B<llc> will send its output to standard
-output if the input is from standard input.  If the B<-o> option specifies -,
-then the output will also be sent to standard output.
-
-If no B<-o> option is specified and an input file other than - is specified,
-then B<llc> creates the output filename by taking the input filename,
-removing any existing F<.bc> extension, and adding a F<.s> suffix.
-
-Other B<llc> options are as follows:
-
-=head2 End-user Options
-
-=over
-
-=item B<-help>
-
-Print a summary of command line options.
-
-=item B<-O>=I<uint>
-
-Generate code at different optimization levels. These correspond to the I<-O0>,
-I<-O1>, I<-O2>, and I<-O3> optimization levels used by B<llvm-gcc> and
-B<clang>.
-
-=item B<-mtriple>=I<target triple>
-
-Override the target triple specified in the input file with the specified
-string.
-
-=item B<-march>=I<arch>
-
-Specify the architecture for which to generate assembly, overriding the target
-encoded in the input file.  See the output of B<llc -help> for a list of
-valid architectures.  By default this is inferred from the target triple or
-autodetected to the current architecture.
-
-=item B<-mcpu>=I<cpuname>
-
-Specify a specific chip in the current architecture to generate code for.
-By default this is inferred from the target triple and autodetected to 
-the current architecture.  For a list of available CPUs, use:
-B<llvm-as E<lt> /dev/null | llc -march=xyz -mcpu=help>
-
-=item B<-mattr>=I<a1,+a2,-a3,...>
-
-Override or control specific attributes of the target, such as whether SIMD
-operations are enabled or not.  The default set of attributes is set by the
-current CPU.  For a list of available attributes, use:
-B<llvm-as E<lt> /dev/null | llc -march=xyz -mattr=help>
-
-=item B<--disable-fp-elim>
-
-Disable frame pointer elimination optimization.
-
-=item B<--disable-excess-fp-precision>
-
-Disable optimizations that may produce excess precision for floating point.
-Note that this option can dramatically slow down code on some systems
-(e.g. X86).
-
-=item B<--enable-no-infs-fp-math>
-
-Enable optimizations that assume no Inf values.
-
-=item B<--enable-no-nans-fp-math>
-
-Enable optimizations that assume no NAN values.
-
-=item B<--enable-unsafe-fp-math>
-
-Enable optimizations that make unsafe assumptions about IEEE math (e.g. that
-addition is associative) or may not work for all input ranges.  These
-optimizations allow the code generator to make use of some instructions which
-would otherwise not be usable (such as fsin on X86).
-
-=item B<--enable-correct-eh-support>
-
-Instruct the B<lowerinvoke> pass to insert code for correct exception handling
-support.  This is expensive and is by default omitted for efficiency.
-
-=item B<--stats>
-
-Print statistics recorded by code-generation passes.
-
-=item B<--time-passes>
-
-Record the amount of time needed for each pass and print a report to standard
-error.
-
-=item B<--load>=F<dso_path>
-
-Dynamically load F<dso_path> (a path to a dynamically shared object) that
-implements an LLVM target. This will permit the target name to be used with the
-B<-march> option so that code can be generated for that target.
-
-=back
-
-=head2 Tuning/Configuration Options
-
-=over
-
-=item B<--print-machineinstrs>
-
-Print generated machine code between compilation phases (useful for debugging).
-
-=item B<--regalloc>=I<allocator>
-
-Specify the register allocator to use. The default I<allocator> is I<local>.
-Valid register allocators are:
-
-=over
-
-=item I<simple>
-
-Very simple "always spill" register allocator
-
-=item I<local>
-
-Local register allocator
-
-=item I<linearscan>
-
-Linear scan global register allocator
-
-=item I<iterativescan>
-
-Iterative scan global register allocator
-
-=back
-
-=item B<--spiller>=I<spiller>
-
-Specify the spiller to use for register allocators that support it.  Currently
-this option is used only by the linear scan register allocator. The default
-I<spiller> is I<local>.  Valid spillers are:
-
-=over
-
-=item I<simple>
-
-Simple spiller
-
-=item I<local>
-
-Local spiller
-
-=back
-
-=back
-
-=head2 Intel IA-32-specific Options
-
-=over
-
-=item B<--x86-asm-syntax=att|intel>
-
-Specify whether to emit assembly code in AT&T syntax (the default) or intel
-syntax.
-
-=back
-
-=head1 EXIT STATUS
-
-If B<llc> succeeds, it will exit with 0.  Otherwise, if an error occurs,
-it will exit with a non-zero value.
-
-=head1 SEE ALSO
-
-L<lli|lli>
-
-=head1 AUTHORS
-
-Maintained by the LLVM Team (L<http://llvm.org/>).
-
-=cut