diff options
author | obrien <obrien@FreeBSD.org> | 2002-12-04 15:42:16 +0000 |
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committer | obrien <obrien@FreeBSD.org> | 2002-12-04 15:42:16 +0000 |
commit | c052a718831f40e0a6e558fe7c6f9ea9c99865b6 (patch) | |
tree | b43283da12da723664faf65bfc4e4b1f8af5a2cb /contrib | |
parent | 91f47f293a334517686a4f9330706abaa13430e5 (diff) | |
parent | 7a1080fa5c329ea8a9505e51ce151719955bcfa2 (diff) | |
download | FreeBSD-src-c052a718831f40e0a6e558fe7c6f9ea9c99865b6.zip FreeBSD-src-c052a718831f40e0a6e558fe7c6f9ea9c99865b6.tar.gz |
This commit was generated by cvs2svn to compensate for changes in r107590,
which included commits to RCS files with non-trunk default branches.
Diffstat (limited to 'contrib')
77 files changed, 38625 insertions, 9609 deletions
diff --git a/contrib/gcc/ChangeLog b/contrib/gcc/ChangeLog index 3d0be4d..e74c1ef 100644 --- a/contrib/gcc/ChangeLog +++ b/contrib/gcc/ChangeLog @@ -10,8614 +10,11502 @@ * GCC 3.2.1 Released. -2002-11-18 Gerald Pfeifer <pfeifer@dbai.tuwien.ac.at> +Sat Nov 16 02:54:29 CET 2002 Jan Hubicka <jh@suse.cz> - * MAINTAINERS: Complete James Dennett's entry. + * jump.c (tablejump_p): New. + * cfgcleanup.c (try_optimize_cfg): Do not merge blocks across tablejump. + * rtl.h (tablejump_p): Declare. -2002-11-18 Eric Botcazou <ebotcazou@libertysurf.fr> +2002-11-16 Graham Stott <graham.stott@btinternet.com> - * MAINTAINERS (Write After Approval): Add myself. + * flow.c (life_analysis): Update LABEL_NUSES before purging + dead jumptables. -2002-11-14 Gabriel Dos Reis <gdr@integrable-solutions.net> +2002-11-13 Janis Johnson <janis187@us.ibm.com> - * MAINTAINERS: Remove from write-after-approval-list, uniformize - email. + * doc/install.texi (Testing): Document extra Java testing. + * doc/sourcebuild.texi (Test Suites): Document libgcj testing. -2002-11-08 Neil Booth <neil@daikokuya.co.uk> +2002-11-12 Franz Sirl <Franz.Sirl-kernel@lauterbach.com> - * MAINTAINERS: Fix email address. + * doc/install.texi (powerpc-*-linux-gnu*): Update binutils requirement. -2002-11-05 Nick Clifton <nickc@redhat.com> +2002-11-12 Gerald Pfeifer <pfeifer@dbai.tuwien.ac.at> - * MAINTAINERS: Fix typo in my email address. + * doc/contrib.texi (Contributors): Use GCJ instead of gcj to refer + to that entire project. -2002-11-05 Paolo Carlini <pcarlini@unitus.it> +2002-11-12 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE> - * MAINTAINERS (Write After Approval): Remove myself. - (Various Maintainers: c++ runtime libs): Add myself. - -2002-10-07 Kaveh R. Ghazi <ghazi@caip.rutgers.edu> - - * Makefile.in (CFLAGS_FOR_TARGET): Add -O2. - -2002-09-14 Kazu Hirata <kazu@cs.umass.edu> - - * MAINTAINERS: Update my email address. - -2002-09-14 Stephane Carrez <stcarrez@nerim.fr> - - * MAINTAINERS: Update my email address. - -2002-08-14 Release Manager - - * GCC 3.2 Released. - -2002-07-25 Release Manager - - * GCC 3.1.1 Released. - -2002-07-08 Phil Edwards <pme@gcc.gnu.org> - - * configure.in (gxx_include_dir): Change to match versioned - C++ headers if --enable-version-specific-runtime-libs is used. - -2002-06-27 Benjamin Kosnik <bkoz@redhat.com> - - * config.if (libstdcxx_incdir): Version C++ headers. - (cxx_incdir): Remove. - -2002-06-24 Phil Edwards <pme@gcc.gnu.org> - - * configure: Revert in-srcdir redirect upon request. - * .cvsignore: Add Makefile. - * Makefile: Removed. - -2002-06-18 Phil Edwards <pme@gcc.gnu.org> - - * configure: Remove garbage from previous commit. - -2002-06-18 Phil Edwards <pme@gcc.gnu.org> - - * configure: For in-source builds, make a subdir and re-exec there. - * Makefile: New file. Pass targets through to build directory. - * .cvsignore: No longer ignore "Makefile". - -2002-06-05 Loren J. Rittle <ljrittle@acm.org> - - * ltmain.sh: Detect and handle object name conflicts while - piecewise linking a static library. - -2002-05-14 Release Manager - - * GCC 3.1 Released. - -2002-05-14 Release Manager - - * GCC 3.1 Released. - -2002-05-04 Alexandre Oliva <aoliva@redhat.com> - - * configure.in (noconfigdirs): Don't disable libgcj on - sparc64-*-solaris* and sparcv9-*-solaris*. - -2002-05-03 Alexandre Oliva <aoliva@redhat.com> - - * configure.in: Revert 2002-04-18's patch; fixed in libjava. - -2002-04-29 Roger Sayle <roger@eyesopen.com> - - * MAINTAINERS: Synchronize with mainline. - -2002-04-26 Joel Sherrill <joel@OARcorp.com> - - * configure.in (h8300*-*-rtems*): Disable libf2c and libgcj. - (sparc-*-elf*, sparc64-*-elf*): Disable libgcj. - -2002-04-22 Ulrich Weigand <uweigand@de.ibm.com> - - * configure.in: Disable libgcj on s390-linux targets. - -2002-04-19 Mark Mitchell <mark@codesourcery.com> - - * MAINTAINERS: Add information about purpose of this file. - -2002-04-18 Tom Tromey <tromey@redhat.com> - - * configure.in: Disallow configuring libgcj when it is already - installed and we're using Solaris 2.8 linker. Do enable libgcj on - Solaris 2.8 by default. For PR libgcj/6158. - -2002-04-15 Richard Henderson <rth@redhat.com> - - * config.guess (sun4u:SunOS:5.*:*): Revert 04-12 change. - -2002-04-15 Mark Mitchell <mark@codesourcery.com> - - * MAINTAINERS: Remove chill maintainers. - * Makefile.in (CHILLFLAGS): Remove. - (CHILL_LIB): Remove. - (TARGET_CONFIGDIRS): Remove libchill. - (CHILL_FOR_TARGET): Remove. - (BASE_FLAGS_TO_PASS): Don't pass CHILLFLAGS, CHILL_FOR_TARGET, or - CHILL_LIB. - (CONFIGURE_TARGET_MODULES): Remove configure-target-libchill. - (CHECK_TARGET_MODULES): Likewise. - (INSTALL_TARGET_MODULES): Likewise. - (CLEAN_TARGET_MODULES): Likewise. - (configure-target-libchill): Remove. - (all-target-libchill): Remove. - * configure.in (target_libs): Remove target-libchill. - Do not compute CHILL_FOR_TARGET. - * libchill: Remove directory. - -2002-04-12 Richard Henderson <rth@redhat.com> - - * config.guess (sun4u:SunOS:5.*:*): Guess sparcv9 if 64-bit isa - is supported. - -2002-04-09 Loren J. Rittle <ljrittle@acm.org> - - * configure.in: Add *-*-freebsd* configurations. - -2002-04-08 Tom Tromey <tromey@redhat.com> - - * configure.in: Add FLAGS_FOR_TARGET to GCJ_FOR_TARGET. - Fixes PR libgcj/6068. - -2002-03-30 Krister Walfridsson <cato@df.lth.se> - - * configure.in (i*86-*-netbsdelf*): Don't disable libgcj. - -2002-03-27 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE> - - * configure.in (alpha*-dec-osf*): Enable libgcj. - -2002-03-24 Nick Clifton <nickc@cambridge.redhat.com> - - Fix for: PR bootstrap/3591, target/5676 - * configure.in (mcore-pe): Disable the configuration of - libstdc++-v3 since exceptions are not supported. - -2002-03-20 Anthony Green <green@redhat.com> - - * configure.in: Enable libgcj for xscale-elf target. - -2002-03-16 Alexandre Oliva <aoliva@redhat.com> - - * ltmain.sh (relink_command): Fix typo in previous change. - -2002-03-15 Alexandre Oliva <aoliva@redhat.com> - - * ltmain.sh (taglist): Initialized. Don't let `CC' tag out of it. - (relink_command): Added --tag flags. - (mode=install): If relinking fails; error out. - -2002-03-12 Richard Henderson <rth@redhat.com> - - * Makefile.in (NOTPARALLEL): New. Use it instead of explicit - .NOTPARALLEL tag. - (do-check): Rename from check. - (check): Allow parallel check. - -2002-03-12 Bob Wilson <bob.wilson@acm.org> - - * MAINTAINERS: Add myself as maintainer for xtensa port. - Fix alphabetical order in CPU port maintainer list. - Remove myself from Write After Approval list. - -2002-03-11 Richard Henderson <rth@redhat.com> - - * Makefile.in (.NOTPARALLEL): Add fake tag. - -2002-03-07 H.J. Lu (hjl@gnu.org) - - * configure.in: Enable gprof for mips*-*-linux*. - -2002-02-28 Alexandre Oliva <aoliva@redhat.com> - - * configure.in (libstdcxx_flags): Don't add libstdc++-v3 flags for - libjava. - (CXX_FOR_TARGET): Explain why -shared-libgcc here. - -2002-02-23 Alexandre Oliva <aoliva@redhat.com> - - * Makefile.in (MAKEINFO): Don't assume makeinfo will be built just - because its Makefile is there; test for the executable instead. - -2002-02-22 Alexandre Oliva <aoliva@redhat.com> - - * configure.in (CXX_FOR_TARGET): Add -shared-libgcc for - libstdc++-v3 and libjava. - -2002-02-11 Adam Megacz <adam@xwt.org> - - * gcc/Makefile.in: Removed libstdc++-v3 dependancy for libjava and - boehm-gc - -2002-02-09 Alexandre Oliva <aoliva@redhat.com> - - * config.guess: Updated to 2002-01-30's version. - * config.sub: Updated to 2002-02-01's version. - Contribute sh64-elf. - 2000-12-01 Alexandre Oliva <aoliva@redhat.com> - * configure.in: Added sh64-*-*. - -2002-02-08 Chris Demetriou <cgd@broadcom.com> - - * MAINTAINERS: Belatedly add myself to write after approval list. - -Thu Feb 7 12:40:58 CET 2002 Jan Hubicka <jh@suse.cz> - - * MAINTAINERS: Put self in as maintainer for x86-64 port. - Remove self as Write After Approval. - -2002-01-31 Geoffrey Keating <geoffk@redhat.com> - - * MAINTAINERS: Put self in as maintainer for contrib/regression - directory. - -2002-01-28 Phil Edwards <pme@gcc.gnu.org> - - * MAINTAINERS: Update my email address. - -2002-01-26 Jason Thorpe <thorpej@wasabisystems.com> - - * configure.in (*-*-netbsd*): New. Skip target-newlib, - target-libiberty, and target-libgloss. Skip Java-related - libraries if not supported for NetBSD on target CPU. - -2002-01-25 Douglas B Rupp <rupp@gnat.com> - - * install-sh: Use _inst.$$_ for temp file name. - -2002-01-24 Jason Thorpe <thorpej@wasabisystems.com> - - * MAINTAINERS (Write After Approval): Move my contact info - from here... - (OS Port Maintainers): ...to here (netbsd). - -2002-01-22 Bob Wilson <bob.wilson@acm.org> - - * MAINTAINERS (Write After Approval): Add myself. - -2002-01-17 H.J. Lu <hjl@gnu.org> - - * Makefile.in (all-fastjar): Also depend on all-libiberty. - (all-target-fastjar): Also depend on all-target-libiberty. - -2002-01-16 H.J. Lu (hjl@gnu.org) - - * config.guess: Import from master sources, rev 1.225. - * config.sub: Import from master sources, rev 1.238. - -2002-01-16 Kazu Hirata <kazu@hxi.com> - - * MAINTAINERS (Write After Approval): Remove myself. - -2001-12-19 Florian Weimer <fw@deneb.enyo.de> - - * MAINTAINERS (Write After Approval): Add myself. - -2001-12-17 Joseph S. Myers <jsm28@cam.ac.uk> - - * MAINTAINERS: Add self as docs co-maintainer. - -2001-12-11 Matthias Klose <doko@debian.org> - - * MAINTAINERS (Write After Approval): Add myself. - -2001-12-09 Zack Weinberg <zack@codesourcery.com> - - * MAINTAINERS: Update my email address. - -2001-12-07 Turly O'Connor <turly@apple.com> - * MAINTAINERS (Write After Approval): Add myself. - * rs6000.c (rs6000_trampoline_size): Handle ABI_DARWIN case. - (rs6000_initialize_trampoline): Call __trampoline_setup for - ABI_DARWIN too. - * darwin-tramp.asm: New file, implements __trampoline_setup. - * t-darwin (LIB2FUNCS_EXTRA): Include darwin-tramp.asm. - -2001-12-07 Paolo Carlini <pcarlini@unitus.it> - - * MAINTAINERS (Write After Approval): Add myself. - -Wed Dec 5 07:33:45 2001 Douglas B. Rupp <rupp@gnat.com> - - * configure, configure.in: Use temp file for long sed commands. - -2001-12-03 Laurent Guerby <guerby@acm.org> - - * config.sub: Update to version 1.232 on subversion. - -2001-12-03 Ben Elliston <bje@redhat.com> - - * MAINTAINERS: Update mail address for config.* patches. - -2001-11-27 DJ Delorie <dj@redhat.com> - Zack Weinberg <zack@codesourcery.com> - - When build != host, create libiberty for the build machine. - - * Makefile.in (TARGET_CONFIGARGS, BUILD_CONFIGARGS): Replace - CONFIG_ARGUMENTS. - (ALL_BUILD_MODULES_LIST, BUILD_CONFIGDIRS, BUILD_SUBDIR): - New variables. - (ALL_BUILD_MODULES, CONFIGURE_BUILD_MODULES): New variables - and rules. - (all.normal): Depend on ALL_BUILD_MODULES. - (CONFIGURE_TARGET_MODULES rule): Use TARGET_CONFIGARGS. - (all-build-libiberty): Depend on configure-build-libiberty. - - * configure: Calculate and substitute proper value for - ALL_BUILD_MODULES. - * configure.in: Create the build subdirectory. - Calculate and substitute TARGET_CONFIGARGS (formerly - CONFIG_ARGUMENTS); also BUILD_SUBDIR and BUILD_CONFIGARGS (new). - -2001-11-26 Ziemowit Laski <zlaski@apple.com> - - * MAINTAINERS (write-after-approval): Add self. - -2001-11-17 Craig Rodrigues <rodrigc@gcc.gnu.org> - - * MAINTAINERS (GNATS only accounts): Remove self. - -2001-11-14 Hans-Peter Nilsson <hp@bitrange.com> - - * configure.in (noconfigdirs) [h8300*-*-*, h8500-*-*]: Disable - libf2c. - -2001-11-12 Craig Rodrigues <rodrigc@gcc.gnu.org> - - * MAINTAINERS (Write After Approval): Add self. - -2001-11-12 David O'Brien <obrien@FreeBSD.org> - - * MAINTAINERS: mips and s390 are also CPU ports. - -2001-11-12 David O'Brien <obrien@FreeBSD.org> - - * MAINTAINERS: mcore, cris and mmix are also CPU ports. - -2001-11-11 David O'Brien <obrien@FreeBSD.org> - - * MAINTAINERS: Alphabetize. - -2001-11-09 Kazu Hirata <kazu@hxi.com> - - * MAINTAINERS (Various maintainers: h8 port): Add myself. - -2001-11-09 John David Anglin <dave@hiauly1.hia.nrc.ca> - - * MAINTAINERS (Various maintainers: hppa port): Added myself. - -2001-11-08 Phil Edwards <pedwards@disaster.jaj.com> - - * configure.in (--enable-languages): Be more permissive about - syntax. Check for empty lists better. Warn about $LANGUAGES. - -2001-11-08 Geoffrey Keating <geoffk@redhat.com> - - * config.sub: Import from master sources, rev. 1.230. - * MAINTAINERS: Change 'stormy16' to 'xstormy16'. - -2001-11-07 Laurent Guerby <guerby@acm.org> - - * MAINTAINERS (Write After Approval): Add self. - -2001-11-06 Hans-Peter Nilsson <hp@bitrange.com> - - * Makefile.in (MAKEINFO): Use "missing" for makeinfo older than 4.0. - -2001-11-05 Hans-Peter Nilsson <hp@bitrange.com> - - * config.sub: Import from master sources, rev 1.226. - * config.guess: Import from master sources, rev 1.216. - -2001-11-03 Hans-Peter Nilsson <hp@bitrange.com> - - * configure.in (noconfigdirs) [mmix-*-*]: Disable libgcj. - * MAINTAINERS: Add self as maintainer of MMIX port. - Remove old after-approval entry. - -2001-10-28 Joseph S. Myers <jsm28@cam.ac.uk> - - * ChangeLog, configure: Fix spelling errors. - -2001-10-20 Brendan Kehoe <brendan@zen.org> - - * MAINTAINERS: Tweak my address. - -Thu Oct 11 21:50:15 2001 J"orn Rennecke <amylaar@onetel.net.uk> - - * MAINTAINERS: Update my email address. - -2001-10-11 Hans-Peter Nilsson <hp@axis.com> - - * configure.in (noconfigdirs) [cris-*-*]: Disable libgcj. - * MAINTAINERS: Add self as maintainer of CRIS port. - -2001-10-10 Geert Bosch <bosch@gnat.com> - - * MAINTAINERS (Various maintainers: Ada front end): - Added Robert Dewar. - -2001-10-03 David Billinghurst <David.Billinghurst@riotinto.com> - - * MAINTAINERS (Write After Approval): Added self - -2001-10-02 Geert Bosch <bosch@gnat.com> - - * MAINTAINERS (Various maintainers: Ada front end): Added myself. - -2001-10-02 Joseph S. Myers <jsm28@cam.ac.uk> - - * configure: Handle temporary files securely using mkdir. - -2001-09-29 Alexandre Oliva <aoliva@redhat.com> - - * Makefile.in (configure-target-gperf): Depend on $(ALL_GCC_CXX). - -2001-09-26 Will Cohen <wcohen@redhat.com> - - * configure.in (*-*-linux*): Disable configuration of target-newlib - and target-libgloss. - -2001-09-26 Alexandre Oliva <aoliva@redhat.com> - - * Makefile.in (EXTRA_TARGET_FLAGS): Pass RANLIB_FOR_TARGET for - RANLIB. - -2001-09-21 Alexandre Oliva <aoliva@redhat.com> - - * Makefile.in (AS_FOR_TARGET, LD_FOR_TARGET, - DLLTOOL_FOR_TARGET, WINDRES_FOR_TARGET, AR_FOR_TARGET, - RANLIB_FOR_TARGET, NM_FOR_TARGET): Don't use double quotes to - avoid quotes nesting problems. - (NATIVE_CHECK_MODULES): Ditto, just for consistency. - (DO_X): Export only variables that are set. - -2001-09-19 Ben Elliston <bje@redhat.com> - - * configure.in (sparc-sun-solaris2*): Don't use /usr/bin/which on - Solaris when testing for the /usr/ucb/cc compiler; it has incorrect - semantics. Use the shell built-in "type" command instead. - -2001-08-31 Alexandre Oliva <aoliva@redhat.com> - - Merged from gcc-3_0-branch: - 2001-07-30 Jeff Sturm <jsturm@one-pont.com> - * ltcf-c.sh: Use $objext, not $ac_objext. - 2001-07-27 Mark Kettenis <kettenis@gnu.org> - * ltcf-cxx.sh: Add support for GNU. - 2001-07-22 Timothy Wall <twall@redhat.com> - * ltcf-c.sh: Don't disable shared libraries for AIX5/IA64. Preserve - default settings if using GNU tools with that configuration. - * ltcf-cxx.sh: Ditto. - * ltcf-gcj.sh: Ditto. - 2001-07-21 Michael Chastain <chastain@redhat.com> - * ltconfig: Set max_cmd_len to a maximum of 512Kb, as it seems some - HPUX 11.0 systems have trouble with 1MB. Mark as gcc-local. - * ltmain.sh: Mark as gcc-local. - -2001-08-30 Eric Christopher <echristo@redhat.com> - Jason Eckhardt <jle@redhat.com> - - * config.guess: Merge from master sources. - * config.sub: Merge from master sources, add support for mipsisa32. - -2001-08-25 Geoffrey Keating <geoffk@redhat.com> - * config.sub: Merge from master sources, rev 1.219. - * MAINTAINERS: Add self as contact for stormy16 port. - -2001-08-14 Zack Weinberg <zackw@panix.com> - - * config.sub: Merge from master sources, rev 1.218. - * config.guess: Merge from master sources, rev 1.209. - -2001-08-11 Graham Stott <grahams@redhat.com> - - * Makefile.in (check-c++): Add missing semicolon. - -Mon Jul 30 19:24:13 CEST 2001 Jan Hubicka <jh@suse.cz> - - * MAINTAINERS (Various maitainers: predict.def): Added myself. - -2001-07-30 Eric Christopher <echristo@redhat.com> - - * MAINTAINERS (Various maintainers: mips port): Added myself. - -2001-07-25 Andrew Haley <aph@cambridge.redhat.com> - - * configure.in (sh-*-linux*): New. - -2001-07-27 Richard Henderson <rth@redhat.com> - - * .cvsignore: Add LAST_UPDATED. - -2001-07-23 Ulrich Weigand <uweigand@de.ibm.com> - - * MAINTAINERS (Various maintainers: s390 port): Added myself. - -2001-07-16 Aldy Hernandez <aldyh@redhat.com> - - * config.sub: Fix mips64vr5000el typo in CPU-COMPANY. - -Fri Jul 13 14:31:57 2001 Nicola Pero <nicola@brainstorm.co.uk> - - * MAINTAINERS (Write After Approval): Added myself. - -2001-07-12 Stephane Carrez <Stephane.Carrez@worldnet.fr> - - * configure.in (noconfigdirs): Don't compile libiberty, libstdcxx - and libgcj on m68hc11/m68hc12. - -2001-06-27 H.J. Lu (hjl@gnu.org) - - * Makefile (CFLAGS_FOR_BUILD): New. - (EXTRA_GCC_FLAGS): Add CFLAGS_FOR_BUILD. - -2001-06-13 Joseph S. Myers <jsm28@cam.ac.uk> - - * README: Remove version number. - -2001-06-13 Gerald Pfeifer <pfeifer@dbai.tuwien.ac.at> - - * INSTALL/README: Update wrt. to the installation instructions now - residing in gcc/doc/install.texi. - -2001-06-13 Joseph S. Myers <jsm28@cam.ac.uk> - - * README: Replace with a cut-down and updated version of gcc/README. - -2001-06-12 David Edelsohn <edelsohn@gnu.org> - - * config-ml.in (powerpc-*-* | rs6000-*-*): Allow aix64 and pthread - multilibs to be disabled. - -2001-06-11 Daniel Berlin <dan@cgsoftware.com> - - * MAINTAINERS (Write After Approval): Add myself. - -2001-06-09 Alexandre Oliva <aoliva@redhat.com> - - * config.guess: Import CVS version 1.195. - * config.sub: Import CVS version 1.212. - -2001-06-08 Alexandre Oliva <aoliva@redhat.com>, Jeff Sturm <jsturm@one-point.com> - - * Makefile.in (AS_FOR_TARGET, LD_FOR_TARGET, NM_FOR_TARGET): If - gcc/xgcc is built, use -print-prog-name to find out the program - name to use. - -2001-06-04 Phil Edwards <pme@sources.redhat.com> - - * config.guess: Import CVS version 1.194. All gcc-local changes - appear to also be in the master copy. - * config.sub: Import CVS version 1.211. - -Mon Jun 4 16:32:53 2001 Mark Mitchell <mark@codesourcery.com> - - * ltcf-c.sh (archive_cmds, archive_expsym_cmds) [solaris, - with_gcc]: Use `gcc -shared' to build a shared library. - -Mon Jun 4 16:24:43 2001 John David Anglin <dave@hiauly1.hia.nrc.ca> - - * ltcf-c.sh (archive_cmd) [hpux, with_gcc]: Use gcc to link shared - archives. - -Fri Jun 1 18:55:19 2001 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE> - - * MAINTAINERS (Write After Approval): Add myself. - -2001-06-01 Hans-Peter Nilsson <hp@axis.com> - - * configure.in (libstdcxx_flags): Do not try to execute - libstdc++-v3/testsuite_flags until it exists. - -2001-06-01 Alan Modra <amodra@bigpond.net.au> - - * MAINTAINERS: Update my email address. - -2001-05-31 Graham Stott <grahams@redhat.com> - - * MAINTAINERS (Write After Approval): Add myself. - -2001-05-28 Simon Patarin <simon.patarin@inria.fr> - - * ltcf-cxx.sh (osf3/osf4/osf5): Support creation of C++ shared - libraries when using g++ with native linker. - -2001-05-28 Alexandre Oliva <aoliva@redhat.com> - - * ltconfig, ltmain.sh: Upgrade to libtool 1.4a 1.641.2.256. - -2001-05-22 Alexandre Oliva <aoliva@redhat.com> - - * ltcf-cxx.sh (allow_undefined_flag, no_undefined_flag) - [aix4*|aix5*]: Prepend blank. - -2001-05-20 Alexandre Oliva <aoliva@redhat.com> - - * ltconfig, ltmain.sh, libtool.m4, ltcf-c.sh, ltcf-cxx.sh, - ltcf-gcj.sh: Upgraded to libtool 1.4a 1.641.2.254. Rebuilt a number - of subdir/configure scripts to use the new libtool.m4. - -2001-05-19 Matt Kraai <kraai@alumni.carnegiemellon.edu> - - * MAINTAINERS (Write After Approval): Add myself. - -2001-05-18 Benjamin Kosnik <bkoz@redhat.com> - - * configure.in (libstdcxx_flags): Remove reference to libstdc++.INC. - -2001-05-11 Ben Elliston <bje@redhat.com> - - * Makefile.in (all-sid): New target. - (check-sid, clean-sid, install-sid): Likewise. - -2001-05-09 Jeffrey Oldham <oldham@codesourcery.com> - - * ltcf-cxx.sh: Add -nostdlib to IRIX 6 archive_cmds. - -2001-05-03 Alexandre Oliva <aoliva@redhat.com> - - * configure.in (noconfigdirs) [*-cygwin*, *-mingw*, *-beos]: Disable - libgcj. - -2001-05-03 Alexandre Oliva <aoliva@redhat.com> - - * Makefile.in (AS_FOR_TARGET, LD_FOR_TARGET, NM_FOR_TARGET): If - gcc/xgcc is built, use -print-prog-name to find out the program - name to use. - -2001-04-26 Alexandre Oliva <aoliva@redhat.com> - - * configure.in (noconfigdirs): Don't reset it from scratch in the - target case; only append to it. - - * configure.in (noconfigdirs) [hppa*-*-*, mips*-*-irix6*, - sparc-*-solaris2.8]: Disable ${libgcj}. - -2001-04-25 Alexandre Oliva <aoliva@redhat.com> - - * configure.in (libgcj_saved): Copy from $libgcj. - (libgcj): Zero out if --enable-libgcj; add to noconfigdirs is - --disable-libgcj. - -2001-04-25 Gavin Romig-Koch <gavin@redhat.com> - - * MAINTAINERS: Remove self as MIPS maintainer and - C front end maintainer. - -Mon Apr 23 09:15:03 2001 Anthony Green <green@redhat.com> - - * configure.in: Move *-chorusos target case to the proper switch. - Disable libgcj. - -2001-04-12 Alexandre Oliva <aoliva@redhat.com> - - * ltconfig, ltmain.sh, ltcf-cxx.sh: Upgraded to libtool 1.4a - 1.641.2.228. - -2001-04-13 Franz Sirl <Franz.Sirl-kernel@lauterbach.com> - - * Makefile.in (STAGE1_CFLAGS): Pass down. - -2001-04-13 Alan Modra <amodra@one.net.au> - - * config.guess: Add hppa64-linux support. Note for next import that - this is already in the master file. - * configure.in: Likewise. Accept `parisc' alias for `hppa'. - -2001-04-12 Alexandre Oliva <aoliva@redhat.com> - - * ltconfig, ltmain.sh, libtool.m4, ltcf-c.sh, ltcf-cxx.sh, - ltcf-gcj.sh: Upgraded to libtool 1.4a 1.641.2.226. - -2001-04-11 Stan Shebs <shebs@apple.com> - - * MAINTAINERS: Add self as Darwin port maintainer. - -2001-04-11 Alan Modra <amodra@one.net.au> - - * MAINTAINERS: Update my email address. - -2001-04-10 Loren J. Rittle <ljrittle@acm.org> - - * ltcf-cxx.sh: Support creation of C++ shared libraries on - recent versions of FreeBSD (release 3 or later). - * ltconfig: On FreeBSD, -lc must not be provided when building - a shared library or else the standard -pthread gcc option is - rendered worthless to later users of the built library. - -2001-04-06 Joseph S. Myers <jsm28@cam.ac.uk> - - * MAINTAINERS: Add self and RTH as C front end maintainers. - -2001-04-05 Alexandre Oliva <aoliva@redhat.com> - - * config.sub: Make sure to match an already-canonicalized - machine name (eg. mn10300-unknown-elf). - -2001-04-01 Alexandre Oliva <aoliva@redhat.com> - - * Makefile.in (CXX_FOR_TARGET_FOR_RECURSIVE_MAKE, RECURSE_FLAGS): - New macros. - (bootstrap, cross): Use RECURSE_FLAGS. - * configure.in: Subst CXX_FOR_TARGET_FOR_RECURSIVE_MAKE. - -2001-03-27 Alexandre Oliva <aoliva@redhat.com> - - * configure.in (CXX_FOR_TARGET): Use xgcc for libstdc++-v3. - -2001-03-22 Colin Howell <chowell@redhat.com> - - * Makefile.in (DO_X): Do not backslash single-quotes in - backquotes (two places). - -2001-03-22 Alexandre Oliva <aoliva@redhat.com> - - Re-installed: - 2001-01-02 Laurynas Biveinis <lauras@softhome.net> - * ltcf-c.sh: Clear ac_cv_prog_cc_pic for DJGPP. Do not add - '-DPIC' to ac_cv_prog_cc_pic for DJGPP. - * ltcf-cxx.sh: Likewise. - * ltcf-gcj.sh: Likewise. - -2001-03-22 Gerald Pfeifer <pfeifer@dbai.tuwien.ac.at> - - * MAINTAINERS: Add myself as "documentation co-maintainer". - -2001-03-22 Alexandre Oliva <aoliva@redhat.com> - - * ltconfig, ltmain.sh, libtool.m4, ltcf-c.sh, ltcf-cxx.sh, - ltcf-gcj.sh: Upgraded to libtool 1.4a 1.641.2.198. - -2001-03-19 Tom Tromey <tromey@redhat.com> - - * config-ml.in: Handle GCJ and GCJFLAGS. - -2001-03-21 Michael Chastain <chastain@redhat.com> - - * Makefile.in: all-m4 depends on all-texinfo. - -2001-03-20 Loren J. Rittle <ljrittle@acm.org> - - * MAINTAINERS: Add myself to write after approval list. - -2001-03-18 Laurynas Biveinis <lauras@softhome.net> - - * Makefile.in (DO_X): Quote nested quotes. - -2001-03-18 Alan Modra <alan@linuxcare.com.au> - - * MAINTAINERS: Add myself to write after approval list. - -2001-03-15 Laurynas Biveinis <lauras@softhome.net> - - * Makefile.in (DO_X): Use double quotes for quoting - "RANLIB=$${RANLIB}". - -2001-03-10 Ovidiu Predescu <ovidiu@cup.hp.com> - - * MAINTAINERS: Added Stan Shebs as new maintainer for Objective-C. - -2001-03-09 Nicola Pero <n.pero@mi.flashnet.it> - - * configure.in: Only use `lang_requires' for languages athat are - actually enabled. - -2001-03-08 Phil Edwards <pme@sources.redhat.com> - - * MAINTAINERS (C++ runtime libs): Update and alphabatize. - -2001-03-08 Alexandre Oliva <aoliva@redhat.com> - - * Makefile.in (ALL_GCC, ALL_GCC_C, ALL_GCC_CXX): Set before use. - -2001-03-07 Tom Tromey <tromey@redhat.com> - - * configure.in: Allow config-lang.in to set `lang_requires' to list - of other required languages. - -2001-03-06 Laurynas Biveinis <lauras@softhome.net> - - * Makefile.in: Remove RANLIB definition. Use RANLIB - in RANLIB_FOR_TARGET, EXTRA_HOST_FLAGS, EXTRA_TARGET_FLAGS, - EXTRA_GCC_FLAGS, $(DO_X) targets only when the RANLIB is set. - -2001-02-28 Benjamin Kosnik <bkoz@redhat.com> - Alexandre Oliva <aoliva@redhat.com> - - * Makefile.in (check-c++): Use tabs, not spaces. - -2001-02-20 Laurynas Biveinis <lauras@softhome.net> - - * MAINTAINERS: add myself to Write After Approval list. - -2001-02-19 Benjamin Kosnik <bkoz@redhat.com> - - * Makefile.in (check-c++): New rule. - - * configure.in (target_libs): Remove libg++. - (noconfigdirs): Remove libg++. - (noconfigdirs): Same. - (noconfigdirs): Same. - (noconfigdirs): Same. - - * config-ml.in: Remove libg++ references. - - * Makefile.in (TARGET_CONFIGDIRS): Remove libio, libstdc++, libg++. - (ALL_TARGET_MODULES): Same. - (configure-target-libg++): Remove. - (all-target-libg++): Remove. - (configure-target-libio): Remove. - (all-target-libio): Remove. - (check-target-libio): Remove. - (.PHONY): Remove. - (libg++.tar.bz2): Remove. - (all-target-cygmon): Remove libio. - (all-target-libstdc++): Remove. - (configure-target-libstdc++): Remove. - (TARGET_LIB_PATH): Remove libstdc++. - (ALL_GCC_CXX): Remove libstdc++. - (all-target-gperf): Correct. - -2001-02-16 Nick Clifton <nickc@redhat.com> - - * configure.in (noconfigdirs): Allow configuration of texinfo - for Cygwin hosts. - -2001-02-15 Anthony Green <green@redhat.com> - - * configure: Introduce GCJ_FOR_TARGET. - * configure.in: Ditto. - * Makefile.in: Ditto. - -2001-02-13 Andreas Schwab <schwab@suse.de> - - * MAINTAINERS: Update mail address. - -2001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com> - - * config.guess: Add linux target for S/390. - * config.sub: Likewise. - -2001-02-08 Chandrakala Chavva <cchavva@redhat.com> - - * configure.in: for *-chorusos, don't config target-newlib and - target-libgloss. - -2001-02-06 Ben Elliston <bje@redhat.com> - - * configure: Output host type to stdout, not stderr. - -2001-02-05 Mark Mitchell <mark@codesourcery.com> - - * ltcf-c.sh: Add support for -no-undefined under GNU/Linux. - * ltcf-cxx.sh: Likewise. - - * config.if: Assume enable_libstdcxx_v3 is defined. - -2001-02-04 Mark Mitchell <mark@codesourcery.com> - - Remove V2 C++ library. - * configure.in: Remove --enable-libstdcxx_v3 support. - -2001-01-31 Bryce McKinlay <bryce@albatross.co.nz> - - * include/demangle.h: Add prototype for java_demangle_v3. + * config/mips/t-iris6 (MULTILIB_OSDIRNAMES): Restore old + directories. -2001-01-29 Phil Edwards <pme@sources.redhat.com> +2002-11-11 Janis Johnson <janis187@us.ibm.com> - * COPYING.LIB: Update to LGPL 2.1 from the FSF. + * doc/contrib.texi: Merge in the list from the libstdc++ web pages. -2001-01-27 Richard Henderson <rth@redhat.com> +2002-11-11 Franz Sirl <Franz.Sirl-kernel@lauterbach.com> - * configure.in (target_makefile_frag) [alpha*-*]: Use mt-alphaieee. + PR c/8467 + * stmt.c (tail_recursion_args): Handle DECL_MODE differing from the + mode of DECL_RTL case. -2001-01-27 Michael Sokolov <msokolov@ivan.Harhan.ORG> +2002-11-11 Neil Booth <neil@daikokuya.co.uk> - * ltcf-cxx.sh (ac_cv_prog_cc_pic_works, ac_cv_prog_cc_static_works): - Don't unset, it's non-portable and no longer necessary, set to empty - instead. + PR preprocessor/4890 + * tradcpp.c (output_line_command): When leaving a file, + system_include_depth has not yet been decremented. -2001-01-27 Michael Sokolov <msokolov@ivan.Harhan.ORG>, Alexandre Oliva <oliva@lsd.ic.unicamp.br> +2002-11-10 Joel Sherrill <joel@gcc.gnu.org> - * ltconfig: Shell portability fix for the tagname validity check. + * config/m68k/t-crtstuff (crti.o): Use this... + ($(T)crti.o): ... instead. + (crtn.o): Use this... + ($(T)crtn.o): ... instead. -2001-01-27 Alexandre Oliva <aoliva@redhat.com> +2002-11-10 Ralf Corsepius <corepiu@faw.uni-ulm.de> - * ltcf-c.sh (ld_shlibs) [aix5*]: Disable on unknown CPU types. - * ltcf-cxx.sh, ltcf-gcj.sh: Likewise. + * config/mips/mips.md (movdi_usd): Use %z1 in place of %1. -2001-01-26 Michael Sokolov <msokolov@ivan.Harhan.ORG> +2002-11-11 Graham Stott <graham.stott@btinternet.com> + Jan Hubicka <jh@suse.cz> - * ltcf-cxx.sh: Use parentheses around eval $ac_compile. + PR 8502 + * cfgrtl.c (try_redirect_by_replacing_jump): Do not kill computed + jumps post reload. -2001-01-26 Tom Tromey <tromey@redhat.com> +2002-11-08 H.J. Lu <hjl@gnu.org> - * configure.in: Allow libgcj to be built on Sparc Solaris. + Fix c/5351 and optimization/7591. -2001-01-25 David Edelsohn <edelsohn@gnu.org> + * calls.c (store_one_arg): Remove ATTRIBUTE_UNUSED on + variable_size. Mark any slots used for the argument as in-use + only if we can't pass all arguments to a library call in + registers. - * ltcf-c.sh: Add aix5 case. - * ltcf-cxx.sh: Likewise. - * ltconfig: Likewise. +2002-11-07 H.J. Lu <hjl@gnu.org> -2001-01-24 Alexandre Oliva <aoliva@redhat.com> + Fix bootstrap/8146 and + gcc.c-torture/execute/20020307-2.c with -march=i686. - * ltmain.sh (TAG disable-shared, TAG disable-static): Make sure we - keep at least one of build_libtool_libs or build_old_libs set to - yes. + * calls.c (PUSH_ARGS_REVERSED): Define only if not defined. + * expr.c (PUSH_ARGS_REVERSED): Likewise. - * ltcf-gcj.sh (lt_simple_link_test_code): Remove stray `(0)'. - * libtool.m4 (_AC_LIBTOOL_GCJ): Pass $CPPFLAGS on. + * config/i386/i386.h (PUSH_ARGS_REVERSED): Set to 1. -2001-01-23 Bryce McKinlay <bryce@albatross.co.nz> +2002-11-04 Aldy Hernandez <aldyh@redhat.com> - * configure.in: Enable libgcj on several additional platforms. + Fix c/8252. -2001-01-22 Bryce McKinlay <bryce@albatross.co.nz> + * config/rs6000/rs6000.c (rs6000_legitimate_address): Disallow + vectors from PRE_INC/DEC. - * configure.in: Enable libgcj for linux targets. +2002-11-06 Richard Henderson <rth@redhat.com> -2001-01-20 Michael Sokolov <msokolov@ivan.Harhan.ORG> + PR optimization/7520 + * cfganal.c (flow_active_insn_p): New. + (forwarder_block_p): Use it. - * MAINTAINERS (Write After Approval): Add myself. +2002-11-06 Janis Johnson <janis187@us.ibm.com> -2001-01-15 John David Anglin <dave@hiauly1.hia.nrc.ca> + * doc/contrib.texi: Merge in the list from the Java web pages. - * MAINTAINERS: Add myself as vax port maintainer. +2002-11-06 David O'Brien <obrien@FreeBSD.org> -2001-01-11 Fergus Henderson <fjh@cs.mu.oz.au> + * config/sparc/freebsd.h: Fix typo. - * MAINTAINERS: Add myself as Mercury front-end maintainer. +2002-11-05 Bob Wilson <bob.wilson@acm.org> -2001-01-09 Mike Stump <mrs@wrs.com> + * config/xtensa/elf.h (LIB_SPEC): Add "-lhal". - * Makefile.in (CONFIGURE_TARGET_MODULES): Pass back configuration - failures of subdirectories. +2002-11-04 Aldy Hernandez <aldyh@redhat.com> -2001-01-02 Laurynas Biveinis <lauras@softhome.net> + Backport patch to fix PR c/8451. - * ltcf-c.sh: Clear ac_cv_prog_cc_pic for DJGPP. Do not add - '-DPIC' to ac_cv_prog_cc_pic for DJGPP. - * ltcf-cxx.sh: Likewise. - * ltcf-gcj.sh: Likewise. - * ltconfig.sh: Fix typo. + 2002-04-25 Richard Henderson <rth@redhat.com> -2001-01-02 Laurynas Biveinis <lauras@softhome.net> + * expmed.c (extract_bit_field): Fall through to generic code rather + than aborting on subreg special case. - * configure: handle DOS-style absolute paths. +2002-11-01 Mark Mitchell <mark@codesourcery.com> -2001-01-02 Laurynas Biveinis <lauras@softhome.net> + PR c++/8391 + * toplev.c (rest_of_compilation): Do not refuse to output code for + an inline function in a local class. - * configure.in: remove supported directories from $noconfigdirs for DJGPP. +2002-11-01 David O'Brien <obrien@FreeBSD.org> -2000-12-30 Marek Michalkiewicz <marekm@linux.org.pl> + * config/sparc/freebsd.h (CPP_CPU64_DEFAULT_SPEC): Define __arch64__. + Add comment. - * MAINTAINERS: Add myself as avr port co-maintainer. +2002-11-01 David O'Brien <obrien@FreeBSD.org> -2000-12-28 Ben Elliston <bje@redhat.com> + * config/sparc/freebsd.h (TRANSFER_FROM_TRAMPOLINE): Define + __enable_execute_stack function. - * MAINTAINERS: Add myself under ``Write After Approval''. +2002-11-01 Richard Earnshaw (rearnsha@arm.com) -2000-12-19 Joseph S. Myers <jsm28@cam.ac.uk> + PR target/7856 + * arm.c (use_return_insn): Don't use a return insn if there are + saved integer regs, but LR is not one of them. - * texinfo: Remove directory from GCC. +Thu Oct 31 18:31:22 CET 2002 Jan Hubicka <jh@suse.cz> -2000-12-18 Joseph S. Myers <jsm28@cam.ac.uk> + * i386.c (override_options): Set defaults for flag_omit_frame_pointer, + flag_asynchronous_unwind_tables, flag_pcc_struct_return. + * i386.c (optimization_options): Set flag_omit_frame_pointer, + flag_asynchronous_unwind_tables, flag_pcc_struct_return to 2. + Do not clear -momit-leaf-frame-pointer when profiling. + (ix86_frame_pointer_required): Frame pointer is allways required when + profiling. - * COPYING: Update to current - ftp://ftp.gnu.org/pub/gnu/Licenses/COPYING-2.0 (fixes references - to 19yy as example year in copyright notice). +2002-10-30 Mark Mitchell <mark@codesourcery.com> -2000-12-18 Benjamin Kosnik <bkoz@redhat.com> + * varasm.c (asm_output_aligned_bss): Do not call + ASM_GLOBALIZE_LABEL. - * Makefile.in (BASE_FLAGS_TO_PASS): Alphabetize. - (libstdcxx_incdir): Pass down. - * config.if: Remove expired bits for cxx_interface, add stub. - (libstdcxx_incdir): Add variable for g++ include directory. - * configure.in (gxx_include_dir): Use it. +2002-10-29 Janis Johnson <janis187@us.ibm.com> -2000-12-18 Alexandre Oliva <aoliva@redhat.com> + * doc/invoke.texi (-profile-arcs): Remove references to -a and -ax. - * MAINTAINERS: Added self as sh port co-maintainer. Removed entry - with old-email address from ``Write After Approval''. +2002-10-29 Eric Botcazou <ebotcazou@libertysurf.fr> -2000-12-15 Andreas Jaeger <aj@suse.de> + * expr.c (expand_expr) [PLUS]: Don't use simplify_binary_operation; + check for zero operands explicitly. - * configure.in: Handle lang_dirs. +2002-10-21 Dale Johannesen <dalej@apple.com> -2000-12-14 Tom Tromey <tromey@redhat.com> + PR target/7133 + * config/rs6000/rs6000.c (rs6000_reverse_condition): Handle + unsafe math reversals correctly for RTL generation. + (output_cbranch): Replace rs6000_reverse_condition call + by its former definition. - * MAINTAINERS: Removed brads. +Sun Oct 27 10:12:27 CET 2002 Jan Hubicka <jh@suse.cz> - * MAINTAINERS: Added gcj developers. + * linux64.h (DEFAULT_PCC_STRUCT_RETURN): Define. -2000-12-13 Anthony Green <green@redhat.com> + PR target/6890 + * xmmintrin.h (_MM_TRANSPOSE4_PS): New. - * configure.in: Disable libgcj for any target not specifically - listed. Disable libgcj for x86 and Alpha Linux until compatible - with g++ abi. +2002-10-25 Zack Weinberg <zack@codesourcery.com> -2000-12-13 Mike Stump <mrs@wrs.com> + PR middle-end/6994 + * c-objc-common.c (inline_forbidden_p): Can not inline + functions containing structures or unions containing VLAs. + * tree-inline.c (walk_tree): For all class 't' nodes, walk + TYPE_SIZE and TYPE_SIZE_UNIT. #undef WALK_SUBTREE_TAIL at end. + (copy_tree_r): Copy types if they are variably modified. - * Makefile.in (local-distclean): Also remove fastjar. + * hooks.c (hook_tree_bool_false): New. + * hooks.h: Prototype it. + * langhooks.h (struct lang_hooks_for_tree_inlining): Add + var_mod_type_p. + * langhooks-def.h: Default for tree_inlining.var_mod_type_p is + hook_tree_bool_false. -2000-12-12 Rodney Brown <RodneyBrown@mynd.com> + * tree.c (variably_modified_type_p): Moved here from + cp/tree.c. Use lang_hooks.tree_inlining.var_mod_type_p for + language-specific cases. Due to this, must weaken some 'if + and only if' checks to merely 'if'. + * tree.h: Prototype variably_modified_type_p. - * contrib/gcc_update: Add fastjar --touch entries. +2002-10-22 Jim Wilson <wilson@redhat.com> -2000-12-12 Alexandre Oliva <aoliva@redhat.com> + * config/i386/i386.md (subdi3_1): Add call to ix86_binary_operator_ok. - * configure.in: Disable language-specific target libraries for - languages that aren't enabled. +2002-10-15 Jim Wilson <wilson@redhat.com> -2000-12-10 Anthony Green <green@redhat.com> + PR target/6981 + * config/i386/i386.md (adddi3_1): Add call to ix86_binary_operator_ok. - * configure.in: Define libgcj. Disable libgcj target libraries for - most targets. +2002-10-24 Richard Henderson <rth@redhat.com> -2000-12-10 Neil Booth <neilb@earthling.net> + PR opt/7944 + * reload.c (find_reloads_toplev): Use simplify_gen_subreg; mode + of X is not important when simplifying subregs of constants. - * MAINTAINERS: Update mail address, remove from WAA list. +2002-10-23 Robert Lipe <robertlipe@usa.net> -2000-12-09 Alexandre Petit-Bianco <apbianco@cygnus.com> + * config.gcc (i[34567]86-*-sco3.2v5*): Fix tm_file. - * libjava: Imported from /cvs/java. - * libffi: Likewise. - * Boehm-gc: Likewise. +2002-10-23 Roger Sayle <roger@eyesopen.com> -2000-12-09 Alexandre Petit-Bianco <apbianco@cygnus.com> + PR c/761 + * doc/invoke.texi: Fix some overfull hboxes in "make dvi". + Document --version, -fno-sched-interblock, -fno-sched-spec, + -fsched-spec-load, -fsched-spec-load-dangerous, + -fsched-verbose=n, -fno-branch-count-reg and -fbounds-check. - * configure.in (target_libs): Revert 2000-12-08 patch. - (noconfigdirs): Added target-libjava. +2002-10-23 Ulrich Weigand <uweigand@de.ibm.com> -2000-12-09 Laurynas Biveinis <lauras@softhome.net> + * config/s390/s390.md ("*movdi_64"): Fix op_type attribute. + ("*movdf_64"): Likewise. + ("*lshrdi3_64"): Likewise. - * djunpack.bat: removed. +2002-10-21 Matthias Klose <doko@debian.org> -2000-12-09 Laurynas Biveinis <lauras@softhome.net> + * Backport, without whitespace change: + 2002-06-19 Akim Demaille <akim@epita.fr> + * c-parse.in (initelt: identifier ':' initval): Add an empty + action to fix a type clash. + (aliasdecl, classdef): Add the missing closing `;'. - * Makefile.in: handle DOS-style absolute paths. - * config-ml.in: likewise. - * symlink-tree: likewise. +Sat Oct 19 15:49:14 CEST 2002 Jan Hubicka <jh@suse.cz> -2000-12-08 Alexandre Petit-Bianco <apbianco@cygnus.com> + * mmintrin.h (__m64): typedef it to v2si. + (_mm_cvtsi32_si64, _mm_cvtsi32_si64_mm_sll_pi16, + _mm_sll_pi32, _mm_sll_pi64, _mm_slli_pi64, _mm_sra_pi16, + _mm_sra_pi32, _mm_srl_pi16, _mm_srl_pi32, _mm_srl_pi64, + _mm_srli_pi64, _mm_and_si64, _mm_andnot_si64, + _mm_or_si64, _mm_xor_si64): Add neccesary casts. + * xmmintrin.h (_mm_setzero_si64): Likewise. - * fastjar: Imported. + PR target/7693 + Patch by Shawn Wagner + * mmintrin.h: Replace pi64 by si64. -2000-12-08 Alexandre Petit-Bianco <apbianco@cygnus.com> +2002-10-18 Zack Weinberg <zack@codesourcery.com> - * Makefile.in (TARGET_CONFIGDIRS): Wrong place. Removed note about - libjava. - * configure.in (target_libs): Removed `target-libjava'. + * decl.c (start_decl): Point users of the old initialized- + typedef extension at __typeof__. -2000-12-08 Alexandre Petit-Bianco <apbianco@cygnus.com> +Thu Oct 17 17:14:07 CEST 2002 Jan Hubicka <jh@suse.cz> - * Makefile.in (TARGET_CONFIGDIRS): Added note about libjava. - (ALL_MODULES): Added fastjar. - (NATIVE_CHECK_MODULES, INSTALL_MODULES, CLEAN_MODULES): Likewise. - (all-target-libjava): all-fastjar replaces all-zip. - (all-fastjar): Added. - (configure-target-fastjar, all-target-fastjar): Likewise. - * configure.in (host_tools): Added fastjar. + PR opt/7630 + * reload.c (reload_inner_reg_of_subreg): New argument output; + (push_reload): Update call. -2000-12-07 Mike Stump <mrs@wrs.com> + PR c++/6419 + * expr.c (expand_expr): Use DECL_RTL_SET_P. - * Makefile.in (local-distclean): Remove leftover built files. +Wed Apr 24 23:45:37 2002 J"orn Rennecke <joern.rennecke@superh.com> -2000-11-24 Nick Clifton <nickc@redhat.com> + * calls.c (expand_call): Take current_function_pretend_args_size + into account when setting argblock for sibcalls. - * configure.in (xscale-elf): Add target. - (xscale-coff): Add target. +Wed Oct 16 19:43:38 CEST 2002 Jan Hubicka <jh@suse.cz> -2000-11-22 Loren J. Rittle <ljrittle@acm.org> + PR target/7396 + * i386.c (builtin_description):Drop cmpg[te]s[sd]. + * xmmintrin.h (__mm_cmpg[te]_s[sd]): Rewrite using + swapped alternative. - * ltcf-cxx.sh: Support creation of C++ shared libraries on - recent versions of FreeBSD (release 3 or later). - * ltconfig: On FreeBSD, -lc must not be provided when building - a shared library or else the standard -pthread gcc option is - rendered worthless to later users of the built library. +2002-10-16 Jakub Jelinek <jakub@redhat.com> -2000-11-16 Fred Fish <fnf@be.com> + * fold-const.c (fold): Fix a typo. - * configure.in (enable_libstdcxx_v3): Fix typo, - libstd++ -> libstdc++. +2002-10-15 Ulrich Weigand <uweigand@de.ibm.com> -2000-11-21 Kriang Lerdsuwanakij <lerdsuwa@users.sourceforge.net> + PR target/7370 + * config/s390/s390.md ("*addsi3_inv"): New pattern. - * MAINTAINERS: Add self to Write After Approval list. + PR target/8232 + * config/s390/s390.md ("cmpstrsi"): Convert length operand + from SImode to Pmode. -2000-11-21 Bernd Schmidt <bernds@redhat.com> +2002-10-15 Janis Johnson <janis187@us.ibm.com> - * MAINTAINERS: Update my email address. Add myself to global write - privs list. + * doc/install.texi: Formatting changes for conformance to HTML 4.01. -2000-11-18 Alexandre Oliva <aoliva@redhat.com> +2002-10-15 Ulrich Weigand <uweigand@de.ibm.com> - * Makefile.in: Merge with src and libgcj. - (ALL_GCC_C, ALL_GCC_CXX): New macros. Use them as dependencies of - configure-target-<library> when their configure scripts need the C - or C++ library to have already been built to work properly. - (do_proto_toplev): Set them to an empty string. + PR opt/7409 + * loop.c (loop_regs_scan): Mark registers used for function + argument passing as MAY_NOT_OPTIMIZE. - * Makefile.in (HOST_LIB_PATH, TARGET_LIB_PATH): New macros. - (REALLY_SET_LIB_PATH): Use them. +2002-10-14 Neil Booth <neil@daikokuya.co.uk> -2000-11-17 Stan Shebs <shebs@apple.com> + PR preprocessor/7862 + PR preprocessor/8190 + * gcc.c (cpp_unique_options): Don't delete .d files. + Remove stray whitespace. - * MAINTAINERS: Add self to Write After Approval list. +2002-10-14 Jakub Jelinek <jakub@redhat.com> -2000-11-13 Joseph S. Myers <jsm28@cam.ac.uk> + * config/i386/i386.h (ASM_OUTPUT_REG_PUSH, ASM_OUTPUT_REG_POP): + Handle TARGET_64BIT. - * configure: Provide the original toplevel configure arguments - (including $0) to subprocesses in the environment rather than - through gcc/configargs.h. +2002-10-14 Mark Mitchell <mark@codesourcery.com> -2000-11-13 Joseph S. Myers <jsm28@cam.ac.uk> + PR optimization/6631 + * Makefile.in (function.o): Depend on langhooks.h. + * alias.c (objects_must_conflict_p): Check honor_readonly when + examining TYPE_READONLY. + * function.c (assign_stack_temp_for_type): Likewise. - * MAINTAINERS: Remove references to cccp. Change C9X reference to - C99. Alphabetise "Write After Approval" list. +2002-10-12 John David Anglin <dave@hiauly1.hia.nrc.ca> -2000-11-12 Mark Mitchell <mark@codesourcery.com> + * tree.c (tree_size): Revise expressions using TREE_CODE_LENGTH and + TREE_VEC_LENGTH to ensure values are promoted before doing subtraction. - * configure: Turn on libstdc++ V3 by default. +2002-10-11 Janis Johnson <janis187@us.ibm.com> - * ltcf-c.sh: On Solaris, use `gcc -shared' to build a shared library - if we've got GCC. + * doc/compat.texi: Add info about C++ libraries. -2000-11-11 Philip Blundell <philb@gnu.org> +Thu Oct 10 19:47:41 CEST 2002 Jan Hubicka <jh@suse.cz> - * MAINTAINERS: Add self to Write After Approval list. + PR target/5610 + * invoke.texi (-msse-math): Kill + (-msse): Add note to mfpmath=sse. -2000-11-09 David Edelsohn <edelsohn@gnu.org> +Thu Oct 10 17:38:29 CEST 2002 Jan Hubicka <jh@suse.cz> - * ltcf-c.sh (aix4): Improve shared library configuration; require - exporting symbols. - * ltcf-cxx.sh (aix4): Define. - * ltconfig (aix4): Define library and soname specs appropriate for - AIX. Define command to create export symbols list. + PR ice/7951 + * reload1.c (emit_input_reload_insns): Use constrain_operands + instead of constraint_accepts_reg_p to verify optimization. + (constraint_accepts_reg_p): Kill -Mon Nov 6 14:19:35 2000 Christopher Faylor <cgf@cygnus.com> +Thu Oct 10 17:05:22 CEST 2002 Jan Hubicka <jh@suse.cz> - * config.sub: Add support for Sun Chorus + PR target/7723 + * i386.c (ix86_expand_vector_move): Do not generate const0->mem moves. -2000-10-31 Nick Clifton <nickc@redhat.com> +2002-10-09 Zack Weinberg <zack@codesourcery.com> - * MAINTAINERS: Rename <name>@cygnus.com addresses to - <name>@redhat.com. Also installed new email address for Clint - Popetz. + PR c/7353 + * c-decl.c (start_decl): Unconditionally issue error for + 'typedef foo = bar'. + (finish_decl): Remove special case for TYPE_DECL with initializer. -2000-10-30 Joseph S. Myers <jsm28@cam.ac.uk> + * doc/extend.texi: Delete "Naming Types" section. Change all + cross-references to that section to refer to "Typeof" instead. + Add the useful safe-max()-macro example from "Naming Types" to + "Typeof", rewritten using that extension. Add some compatibility + notes to "Typeof." - * etc: Remove directory from GCC. +2002-10-02 Richard Henderson <rth@redhat.com> -2000-10-16 Michael Meissner <meissner@redhat.com> + PR opt/7124 + * config/i386/i386.c (ix86_register_move_cost): Increase cost + for secondary_memory_needed pairs. - * configure (gcc/configargs.h): Only create if there is a build GCC - directory created. +Wed Oct 9 19:09:13 CEST 2002 Jan Hubicka <jh@suse.cz> -2000-10-16 Matthias Klose <doko@debian.org> + PR opt/7912 + PR opt/7390 + * i386.c (athlon_cost): Fix the move costs. - * config.if: Search libstdc++-v3/configure.in for INTERFACE, - when configured for libstdc++-v3. +2002-10-09 Alan Modra <amodra@bigpond.net.au> -2000-10-05 Phil Edwards <pme@gcc.gnu.org> + * libgcc2.c (__floatdisf): Properly cure double rounding. - * configure: Save configure arguments to gcc/configargs.h. +2002-10-09 Gabriel Dos Reis <gdr@integrable-solutions.net> -2000-10-04 Philipp Thomas <pthomas@suse.de> + PR doc/7484 + * doc/invoke.texi (Option Summary): List + -Wmissing-declarations as a C only option. + +2002-10-08 Jakub Jelinek <jakub@redhat.com> + + * config/sparc/t-linux64 (MULTILIB_OPTIONS): Remove + mno-app-regs|mcmodel=medany. + (MULTILIB_DIRNAMES, MULTILIB_OSDIRNAMES): Remove alt. + (MULTILIB_EXCEPTIONS, MULTILIB_EXCLUSIONS, MULTILIB_MATCHES): Remove. + (CRTSTUFF_T_CFLAGS): Define. + +2002-09-25 Eric Botcazou <ebotcazou@libertysurf.fr> + Volker Reichelt <reichelt@igpm.rwth-aachen.de> + + PR c/7411 + * expr.c (expand_expr) [PLUS]: Simplify after the operands + have been expanded in EXPAND_NORMAL mode. + +2002-10-06 Richard Henderson <rth@redhat.com> + + * config/rs6000/rs6000.md (load_toc_v4_PIC_2): Fix base constraint. + +2002-10-06 Roger Sayle <roger@eyesopen.com> + + PR optimization/6627 + * toplev.c (force_align_functions_log): New global variable. + * flags.h (force_align_functions_log): Add extern prototype. + * varasm.c (assemble_start_function): Use it to force minimum + function alignment. + * config/i386/i386.h (FUNCTION_BOUNDARY): Set the correct + minimum function alignment to one byte. + (TARGET_PTRMEMFUNC_VBIT_LOCATION): Store the virtual bit in + the least significant bit of vtable member function pointers. + * tree.h (enum ptrmemfunc_vbit_where_t): Move definition to + here from cp/cp-tree.h. + +2002-10-06 Neil Booth <neil@daikokuya.co.uk> + + Debian BTS Bug #157416 + * cpplib.c (destringize_and_run): Kludge around getting + tokens from in-progress macros. + (_cpp_do__Pragma): Simplify. + +2002-10-06 Frank Ch. Eigler <fche@redhat.com> + + * cppinit.c (init_standard_includes, parse_option): Use strncmp. + +2002-10-05 Jakub Jelinek <jakub@redhat.com> + + * gcc.c (set_multilib_dir): Don't access *end. + Use memcpy instead of strncpy. Don't write beyond malloced buffer. + (print_multilib_info): Don't show paths starting with ".:". + * genmultilib: Add new option, "yes" if multilibs are enabled. + Update comments. If multilibs not enabled, print .:${osdirout} + for each directory. If multilibs are enabled, always print + ${dirout}:${osdirout}, even if the two are the same. + * Makefile.in (s-mlib): Pass @enable_multilib@ to genmultilib. + Pass all MULTILIB_* variables to genmultilib even if + --disable-multilib but MULTILIB_OSDIRNAMES is not empty. + + * gcc.c (print_multi_os_directory): New variable. + (option_map): Support --print-multi-os-directory. + (struct prefix_list): Add os_multilib field. + (multilib_os_dir): New variable. + (static_specs): Add multilib_options. + (find_a_file): Add multilib argument. Search in GCC or OS multilib + subdirs if non-zero. + (read_specs, execute): Update callers. + (find_file): Likewise. Don't prefix name with multilib_dir, instead + pass 1 as multilib option. + (display_help): Include --print-multi-os-directory. + (add_prefix): Add os_multilib argument. Initialize pl->os_multilib. + (process_command): Update callers. Handle --print-multi-os-directory. + (do_spec_1) ['D']: Use multilib_os_directory if pl->os_multilib is + set. + (main): Update find_a_file and add_prefix callers. + Handle print_multi_os_directory. + (struct mdswitchstr): New. + (mdswitches, n_mdswitches): New variables. + (used_arg): Add MULTILIB_DEFAULT switches too if they are not + present on the command line nor their mutually incompatible + switches. + (default_arg): Optimize. + (set_multilib_dir): Compute multilib_os_dir. Initialize mdswitches + array. + (print_multilib_info): Only print GCC multilib dir name, not OS + multilib dirname. + * genmultilib: Add osdirnames parameter. Output multilib_options + variable. If osdirnames is specified, output dirnames as + dirname:osdirname. + * mklibgcc.in: Use MULTILIB_OSDIRNAMES, --print-multi-directory + and --print-multi-os-directory instead of SHLIB_SLIBDIR_SUFFIXES + to compute libgcc_s soname and install path. + * Makefile.in (libgcc.mk): Pass MULTILIB_OSDIRNAMES instead of + SHLIB_SLIBDIR_SUFFIXES to mklibgcc. + (s_mlib): Pass MULTILIB_OSDIRNAMES or nothing as last genmultilib + argument. + + * config/sparc/t-linux64 (MULTILIB_OSDIRNAMES): Set. + (SHLIB_SLIBDIR_SUFFIXES): Remove. + * config/sparc/linux64.h (STARTFILE_SPEC32, STARTFILE_SPEC64, + ENDFILE_SPEC32, ENDFILE_SPEC64, ENDFILE_COMMON): Remove. + (STARTFILE_SPEC, ENDFILE_SPEC): Don't distinguish between -m32 + and -m64. + * config/sparc/t-sol2-64 (MULTILIB_OSDIRNAMES): Set. + (SHLIB_SLIBDIR_SUFFIXES): Remove. + * config/sparc/sol2-bi.h (STARTFILE_SPEC32, STARTFILE_SPEC64): Remove. + (STARTFILE_ARCH_SPEC): Remove. + (STARTFILE_SPEC): Add values-X*.o here. + * config/i386/t-linux64 (MULTILIB_OSDIRNAMES): Set. + (SHLIB_SLIBDIR_SUFFIXES): Remove. + * config/i386/linux64.h (STARTFILE_PREFIX_SPEC): Remove. + (STARTFILE_SPEC, ENDFILE_SPEC): Don't distinguish between m32 and + !m32. + * config/mips/t-iris6 (MULTILIB_OSDIRNAMES): Set. + (SHLIB_SLIBDIR_SUFFIXES): Remove. + +2002-10-05 Neil Booth <neil@daikokuya.co.uk> + + PR preprocessor/8120 + * doc/cpp.texi: Update documentation of bad use of ##. + +Thu Oct 3 23:15:15 CEST 2002 Jan Hubicka <jh@suse.cz> + + * i386.h (CPP_SPECS): fix defines for -msse, -msse2, -mpentium2,3. + +Thu Oct 3 21:35:36 CEST 2002 Jan Hubicka <jh@suse.cz> + + * toplev.c (rest_of_compilation): Dump loops before clobbering + the structure. + + * expr.c (force_operand): Use expand_simple_* to handle more + cases. - * config.guess: Import CVS version 1.157. - * config.sub: Import CVS version 1.181. + * i386.c (q_regs_operand): Use ANY_QI_REG_P. -2000-10-04 Andris Pavenis <pavenis@latnet.lv> + * i386.c (override_options): Fix stack alignment. + (classify_argument): Handle variable sized types. + (ix86_expand_int_movcc): Avoid RTL sharing problem. - * Makefile.in (bootstrap): avoid recursion if subdir missing - (cross): ditto - (do-proto-toplev): ditto + * i386.md (prefetch_sse_rex, prefetch_3dnow_rex): New. + (prefetch): Properly handle 64bit case. -2000-09-30 Alexandre Oliva <aoliva@redhat.com> + * i386.c (classify_argument): Properly compute word size of the analyzed object. - * Makefile.in (DEVO_SUPPORT): Added gettext.m4, libtool.m4, - ltcf-c.sh, ltcf-cxx.sh and ltcf-gcj.sh. + * jump.c (reg_or_subregno): New function. + * rtl.h (reg_or_subregno): Declare + * unroll.c (find_splittable_givs): Handle subregs. - * ltconfig, ltmain.sh, libtool.m4, ltcf-cxx.sh: Updated from libtool - multi-language branch, to work around Solaris' /bin/sh bug. Rebuilt - all affected `configure' scripts. + Richard Sandiford <rsandifo@redhat.com>: -2000-09-26 David Edelsohn <edelsohn@gnu.org> + * expr.c (force_operand): Fix reversed move. - * config/mt-aix43 (NM_FOR_TARGET): Add -B bsd-style flag. + Andreas Jaeger <aj@suse.de>: -Mon 25-Sep-2000 19:46:09 BST Neil Booth <neilb@earthling.net> + * config/i386/linux64.h (STARTFILE_PREFIX_SPEC): New. - * MAINTAINERS: Add self as cpplib co-maintainer. + Janis Johnson <janis187@us.ibm.com>: -2000-09-24 Aldy Hernandez <aldyh@redhat.com> + * loop.c (emit_prefetch_instructions): Several small fixes. - * MAINTAINERS: Add self to Write After Approval list. +Thu Sep 5 00:34:33 2002 J"orn Rennecke <joern.rennecke@superh.com> -2000-09-18 Gerald Pfeifer <pfeifer@dbai.tuwien.ac.at> + * loop.c (scan_loop): Don't mark separate insns out of a libcall + for moving. + (move_movables): Abort if we see the first insn of a libcall. - * INSTALL/README: egcs -> GCC update. +2002-10-01 David S. Miller <davem@redhat.com> -Sun Sep 17 16:55:59 CEST 2000 Marc Espie <espie@cvs.openbsd.org> + PR middle-end/7151 + * config/sparc/sparc.md (movdi_insn_sp32_v9): Accept 'e' regs. + (movdi reg/reg split): Match only on sparc32, and v9 when int regs. - * MAINTAINERS: Add myself to Write After Approval list. +2002-10-01 David S. Miller <davem@redhat.com> + Jan Hubicka <jh@suse.cz> -2000-09-15 Kazu Hirata <kazu@hxi.com> + * reload1.c (gen_reload:SECONDARY_MEMORY_NEEDED): Handle SUBREG. + * reload.c (push_reload:SECONDARY_MEMORY_NEEDED): Likewise. - * MAINTAINERS: Add myself to Write After Approval list. +2002-09-30 Bob Wilson <bob.wilson@acm.org> -Wed Sep 13 11:11:29 2000 Jeffrey A Law (law@cygnus.com) + * config/xtensa/xtensa.h (REG_CLASS_NAMES, REG_CLASS_CONTENTS): + Add new RL_REGS register class. + (PREFERRED_RELOAD_CLASS, PREFERRED_OUTPUT_RELOAD_CLASS): + Call xtensa_preferred_reload_class for both input and output reloads. + * config/xtensa/xtensa.c (xtensa_regno_to_class): Use new RL_REGS class. + (xtensa_preferred_reload_class): Handle output reloads; use RL_REGS + instead of either AR_REGS or GR_REGS classes. + (xtensa_secondary_reload_class): Use new RL_REGS class. + * config/xtensa/xtensa-protos.h (xtensa_preferred_reload_class): Update. - * configure.in: Do not build byacc for hppa64. Provide paths to the - X11 libraries for hppa64. +2002-08-21 John David Anglin <dave@hiauly1.hia.nrc.ca> -2000-09-08 Stephane Carrez <Stephane.Carrez@worldnet.fr> + * cppinit.c (remove_dup_nonsys_dirs): Fix warning and return value. - * MAINTAINERS: Add myself as 68hc11 port maintainer. +2002-08-20 John David Anglin <dave@hiauly1.hia.nrc.ca> -2000-09-06 Alexandre Oliva <aoliva@redhat.com> + * cppinit.c (remove_dup_dir): Add head_ptr argument to handle removal + at head. + (remove_dup_nonsys_dirs): New function. + (remove_dup_dirs): Change argument head to head_ptr. Remove warnings. + (merge_include_chains): Remove non-system include directories from + quote and bracket include chains when they duplicate equivalent system + directories. + * doc/cpp.texi (-I): Update. + * doc/cppopts.texi (-I): Update. + * doc/install.texi (--with-local-prefix): Further document usage of + this option. + * doc/invoke.texi (-I): Update. - * Makefile.in (all-zlib): Added dummy target. +2002-09-30 Richard Earnshaw <rearnsha@arm.com> - * ltconfig, ltmain.sh, libtool.m4, ltcf-c.sh, ltcf-cxx.sh, - ltcf-gcj.sh: Updated from libtool multi-language branch. + * arm.h (BASE_REG_CLASS): Always return LO_REGS for Thumb. + (MODE_BASE_REG_CLASS, case Thumb): Only return BASE_REGS if we know + that we have a SImode access, and only then if reload hasn't completed; + for all other cases, use LO_REGS. -2000-09-05 Alexandre Oliva <aoliva@redhat.com> +2002-09-29 David S. Miller <davem@redhat.com> - * Makefile.in (all-bootstrap): Added all-texinfo and all-zlib. - (bootstrap*): Depend on all-bootstrap. + * config/sparc/linux64.h (STARTFILE_SPEC32, ENDFILE_SPEC32): Kill + hardcoded paths. -2000-09-05 Philipp Thomas <pthomas@suse.de> +2002-09-27 Alexander N. Kabaev <ak03@gte.com> - * config.guess: Import CVS version 1.156. - * config.sub: Import CVS version 1.179. + PR preprocessor/8055 + * cppmacro.c (stringify_arg): Do not overflow the buffer + with the terminating NUL when the argument to be stringified + has no tokens. -2000-09-02 Anthony Green <green@cygnus.com> +2002-09-26 David S. Miller <davem@redhat.com> - * Makefile.in (all-gcc): Depend on all-zlib. - (CLEAN_MODULES): Add clean-zlib. - (ALL_MODULES): Add all-zlib. - * configure.in (host_libs): Add zlib. + PR optimization/7335 + * calls.c (emit_library_call_value_1): Passing args by reference + converts a CONST function into a PURE one. -2000-09-02 Alexandre Oliva <aoliva@redhat.com>, DJ Delorie <dj@redhat.com> +2002-09-26 Richard Henderson <rth@redhat.com> - * configure.in (FLAGS_FOR_TARGET): Use -nostdinc even for Canadian - crosses, but add gcc/include to the header search path for them. + PR c/7160 + * sched-deps.c (sched_analyze_insn): Make clobber insns depend + on call insns. -2000-08-04 David E. O'Brien <obrien@FreeBSD.org> +2002-09-27 Alan Modra <amodra@bigpond.net.au> - * MAINTAINERS: Add self to Write After Approval list. + * doloop.c (doloop_modify_runtime <biv skips initial incr>): Adjust + by absolute loop increment, not loop increment. -2000-08-27 Franz Sirl <Franz.Sirl-kernel@lauterbach.com> +2002-09-25 David S. Miller <davem@redhat.com> - * config.guess: Import CVS version 1.152. - * config.sub: Import CVS version 1.177. + PR target/7842 + * config/sparc/sparc.c (set_extends): SImode ASHIFT does not + extend. -2000-08-25 Alexandre Oliva <aoliva@redhat.com> +2002-09-20 Jeroen Dobbelaere <jeroen.dobbelaere@acunia.com> - * configure.in (FLAGS_FOR_TARGET): Use $target_configdirs and - $targargs to tell whether newlib is going to be built. + * config/arm/arm.md (sign_extract_onebit, not_signextract_onebit): + Add clobber of the condition code register. - * configure.in [disable-libstdcxx-v3] (libstdcxx_flags): Search - $$r/TARGET_SUBDIR/libio for _G_config.h. +2002-09-18 Richard Earnshaw (rearnsha@arm.com) -2000-08-23 Alexandre Oliva <aoliva@redhat.com> + PR optimization/7967 + * arm.md (ne_zeroextractsi): Add clobber of the condition code + register. - * MAINTAINERS: Add self as a build machinery (*.in) maintainer. +2002-09-17 Richard Henderson <rth@redhat.com> -2000-08-22 DJ Delorie <dj@redhat.com> + * sibcall.c (optimize_sibling_and_tail_recursive_call): Also remove + RTX_UNCHANGING_P markers for successful tail-recursive replacement. - * MAINTAINERS: Add self as a build machinery (*.in) maintainer +2002-09-16 Richard Henderson <rth@redhat.com> -2000-08-22 Alexandre Oliva <aoliva@redhat.com> + PR opt/7515 + * c-objc-common.c (c_cannot_inline_tree_fn): Don't auto-inline + functions that don't bind locally. - * config-ml.in (CC, CXX): Avoid trailing whitespace. - (LD_LIBRARY_PATH, SHLIB_PATH): Adjust for multilibs and export to - sub-configures. +2002-09-17 Alan Modra <amodra@bigpond.net.au> -2000-08-21 DJ Delorie <dj@redhat.com> + Merge from mainline. + 2002-07-20 Alan Modra <amodra@bigpond.net.au> + PR optimization/7130 + * loop.h (struct loop_info): Add "preconditioned". + * unroll.c (unroll_loop): Set it. + * doloop.c (doloop_modify_runtime): Correct count for unrolled loops. - * MAINTAINERS: Add self as a libiberty maintainer + 2002-06-24 Alan Modra <amodra@bigpond.net.au> + PR optimization/6984 + * doloop.c (doloop_valid_p): Correct comment. + (doloop_modify_runtime <abs_inc != 1>): Simplify. + (doloop_modify_runtime <do-while>): Don't emit code when NE. -2000-08-16 Alexandre Oliva <aoliva@redhat.com> +2002-09-16 Jeff Law <law@redhat.com> - * configure.in (libstdcxx_flags): Use - libstdc++-v3/src/libstdc++.INC. + * libgcc2.c: Do not include machmode.h. -2000-08-15 Alexandre Oliva <aoliva@redhat.com> +2002-09-16 Jason Merrill <jason@redhat.com> + Danny Smith <dannysmith@users.sourceforge.net> - * configure.in (libstdcxx_flags): Use libstdc++-v3/src/INCLUDES. + * config/i386/winnt.c (ix86_handle_dll_attribute): Set + DECL_EXTERN and TREE_PUBLIC for dllimported variables here... + (i386_pe_mark_dllimport): Not here. -2000-08-14 Zack Weinberg <zack@wolery.cumb.org> +2002-09-14 Stephane Carrez <stcarrez@nerim.fr> - * configure.in (libstdcxx_flags): Remove -isystem $$s/libio/stdio. + * config/m68hc11/m68hc11.md ("movdi_internal"): Allow any offsetable + memory operand when source is 0 (K constraint). + ("movsi_internal"): Likewise. + ("movdf_internal"): Likewise. + ("movsf_internal"): Likewise. - * configure: Make enable_threads and enable_shared defaults - explicit. Substitute enable_threads into generated Makefiles. - * configure.in: Accept *-*-linux* not just *-*-linux-gnu*. - * libtool.m4: Accept *-*-linux* not just *-*-linux-gnu*. +2002-09-14 Alan Modra <amodra@bigpond.net.au> + + Merge from mainline. + 2002-09-14 Alan Modra <amodra@bigpond.net.au> + * doc/tm.texi (DBX_OUTPUT_NFUN): Describe. + * dbxout.c (dbxout_function_end): Use DBX_OUTPUT_NFUN. + * config/rs6000/linux64.h (DBX_OUTPUT_NFUN): Define. -2000-08-13 Geoff Keating <geoffk@cygnus.com> + 2002-08-27 David Edelsohn <edelsohn@gnu.org> + * config/rs6000/linux64.h (ADJUST_FIELD_ALIGN): Undef before define. - * Makefile.in (GCC_FOR_TARGET): Also add -B$$r/gcc/ here. + 2002-08-02 Alan Modra <amodra@bigpond.net.au> + * config/rs6000/linux64.h (DBX_OUTPUT_BRAC): Define. + (DBX_OUTPUT_LBRAC, DBX_OUTPUT_RBRAC): Define. + * config/rs6000/rs6000.c (output_toc): Don't use lshift_double when + HOST_BITS_PER_WIDE_INT == 64. -2000-08-12 Alexandre Oliva <aoliva@redhat.com> + 2002-07-27 Alan Modra <amodra@bigpond.net.au> + * config/rs6000/rs6000.c (output_profile_hook): Don't generate profile + label reference when NO_PROFILE_COUNTERS. - * config-ml.in (CC): Remove bogus duplicate quotation mark from - previous delta. + 2002-07-11 Alan Modra <amodra@bigpond.net.au> + * config/rs6000/linux64.h (ASM_SPEC): Define. -2000-08-11 Jason Merrill <jason@redhat.com> +2002-09-13 Alan Modra <amodra@bigpond.net.au> - * configure.in (CC_FOR_TARGET, CHILL_FOR_TARGET, - CXX_FOR_TARGET): Add -B$$r/gcc/ here. - (FLAGS_FOR_TARGET): Not here. - (CHILL_FOR_TARGET, CXX_FOR_TARGET): Don't check the list of languages. + Merge from mainline. + 2002-07-24 Alan Modra <amodra@bigpond.net.au> + PR c/7150, target/7380 + * config/rs6000/rs6000.md: Remove scratch reg on insns using + addze and similar (plus (comparison r1 r2) r3) insns. Add + missing scratch reg in one case. Formatting fixes. -2000-08-11 Alexandre Oliva <aoliva@redhat.com> + 2002-07-18 Alan Modra <amodra@bigpond.net.au> + PR other/7114, target/5967 + * config/rs6000/rs6000.c (first_reg_to_save): Remove bogus + adjustments to first_reg for profiling case. + (output_function_profiler): Correct lr save slot for ABI_AIX_NODESC. + Disable profiling for 64 bit code on both ABI_V4 and ABI_AIX_NODESC. + Save static chain reg to sp + 12 on ABI_AIX_NODESC. + * config/rs6000/sysv4.h (ASM_OUTPUT_REG_PUSH): Define. + (ASM_OUTPUT_REG_POP): Define. + * config/rs6000/linux64.h (ASM_OUTPUT_REG_PUSH): Undef. + (ASM_OUTPUT_REG_POP): Undef. - * config-ml.in (CC, CXX): Don't introduce a leading space. + 2002-06-30 Alan Modra <amodra@bigpond.net.au> + PR optimization/7120 + * unroll.c (loop_iterations): Handle EQ loops. -2000-08-07 DJ Delorie <dj@delorie.com> +2002-09-13 Alan Modra <amodra@bigpond.net.au> - * MAINTAINERS: Add self as a DJGPP maintainer + * config/rs6000/rs6000.c (rs6000_emit_load_toc_table): Remove "if" + nesting. Correct test for non-PowerPC64 ELF ABI_AIX. + * config/rs6000/rs6000.md (load_toc_v4_PIC*): Disable when ABI_AIX. -2000-08-07 DJ Delorie <dj@redhat.com> +2002-09-12 Janis Johnson <janis187@us.ibm.com> - * configure.in (FLAGS_FOR_TARGET): invert test for xgcc, should mean - "if we're also building gcc, and it's a gcc that will run on the - build machine, we want to use its includes instead of the system's - default includes". + * doc/compat.texi: New file with new chapter, Binary Compatibility. -2000-08-04 Joseph S. Myers <jsm28@cam.ac.uk> +2002-09-12 Jason Merrill <jason@redhat.com> - * MAINTAINERS: Add self to Write After Approval list. + * calls.c (store_one_arg): Use size_in_bytes to determine the + amount of space to push. -2000-08-03 Alexandre Oliva <aoliva@redhat.com> +2002-09-12 Jakub Jelinek <jakub@redhat.com> - * configure.in (libstdcxx_flags): Don't use `"'. + * config/sparc/linux64.h (STARTFILE_SPEC32): Fix a typo. - * config-ml.in: Adjust multilib search paths to the - appropriate multilib tree. +2002-09-12 Alan Modra <amodra@bigpond.net.au> -2000-08-02 Alexandre Oliva <aoliva@redhat.com> + * emit-rtl.c (set_mem_size): New function. + * expr.h (set_mem_size): Declare. + * config/rs6000/rs6000.c (expand_block_move_mem): Exterminate. + (expand_block_move): Instead, use adjust_address and + replace_equiv_address to generate proper aliasing info. + Move common code out of conditionals. Localize vars. - * configure.in (CHILL_FOR_TARGET, CXX_FOR_TARGET): Convert blanks to - commas in $LANGUAGES. +2002-09-11 Alexander Kabaev <kan@FreeBSD.ORG> -2000-08-02 Manfred Hollstein <manfredh@redhat.com> + Wed Apr 24 13:48:25 CEST 2002 Jan Hubicka <jh@suse.cz> + * loop.c (canonicalize_condition): Use gen_int_mode. - * configure.in: Re-enable all references to libg++ and librx. +2002-09-11 Janis Johnson <janis187@us.ibm.com> -2000-08-01 Alexandre Oliva <aoliva@redhat.com> + * Makefile.in (TEXI_GCC_FILES): Add compat.texi. + * doc/gcc.texi (Top): Add new chapter, Binary Compatibility, and + include its file, compat.texi. + * doc/trouble.texi (Interoperation): Update information about C++ ABI + issues. + * doc/invoke.texi (-fshort-wchar): Move to Code Generation Options. + (-fpcc-struct-return, -freg-struct-return, -fshort-enums, + -fshort-double, -fshort-wchar, -fpack-struct, -fleading-underscore): + Warn that these options can break ABI compatibility. + (Many places): Fix overfull hboxes. - * ltconfig, ltmain.sh: Update from libtool multi-language branch. - * ltcf-c.sh (need_lc): Fix test message. Set wl for archive_cmds. - (ac_cv_prog_cc_pic): Don't print `cached' without `checking'. - * ltcf-cxx.sh (need_lc): Set based on postdeps. + * doc/extend.texi: Fix a broken link; fix overfull hboxes. + * doc/install.texi: Fix a typo, some formatting directives, and + overfull hboxes. + * doc/c-tree.texi: Fix overfull hboxes. + * doc/cppopts.texi: Ditto. + * doc/makefile.texi: Ditto. + * doc/rtl.texi: Ditto. + * doc/standards.texi: Ditto. + * doc/tm.texi: Ditto. - * configure.in (qCXX_FOR_TARGET): Use echo instead of expr. +2002-09-08 Alan Modra <amodra@bigpond.net.au> -2000-07-31 Alexandre Oliva <aoliva@redhat.com> + * reload.c (find_reloads <p constraint>): Pass operand_mode to + find_reloads_address. - * configure.in (qCXX_FOR_TARGET): Quote `&' characters in - CXX_FOR_TARGET for sed. +2002-09-07 Scott Snyder <snyder@fnal.gov> -2000-07-30 Alexandre Oliva <aoliva@redhat.com> + PR target/7374 + * config/alpha/alpha.md (abstf2): Fix typo: 'neg' for 'abs'. - * configure.in (CC_FOR_TARGET, CHILL_FOR_TARGET, CXX_FOR_TARGET): - Do not override if already set in the environment or in configure. - Don't duplicate $(FLAGS_FOR_TARGET) if it already appears in them. - (FLAGS_FOR_TARGET): Don't use host directories on Canadian crosses. +2002-09-07 Glen Nakamura <glen@imodulo.com> -2000-07-28 Alexandre Oliva <aoliva@redhat.com> + PR opt/7814 + * sched-deps.c (sched_analyze_insn): Make sure to add insn + to reg_last->sets after flushing the dependency lists to guarantee + that subsequent clobbers will be dependent on it. - * libtool.m4, ltcf-c.sh, ltcf-cxx.sh, ltcf-gcj.sh: New files from - the libtool CVS tree multi-language branch. - * ltconfig, ltmain.sh: Updated. +2002-09-07 Alan Modra <amodra@bigpond.net.au> -2000-07-27 Alexandre Oliva <aoliva@redhat.com> + * config/rs6000/linux64.h (ASM_PREFERRED_EH_DATA_FORMAT): Define. - * Makefile.in (clean-target-libgcc): Remove gcc/libgcc. - (clean-target): Depend on it. +2002-09-06 Jakub Jelinek <jakub@redhat.com> - * Makefile.in (FLAGS_FOR_TARGET): New macro. - (GCC_FOR_TARGET): Use it. - (CC_FOR_TARGET, CXX_FOR_TARGET, CHILL_FOR_TARGET): Now defined... - * configure.in: ... here. - (FLAGS_FOR_TARGET): Define. Add ld build dir to -L path. - (libstdcxx_flags): Define and append to CXX_FOR_TARGET. + * configure.in (HAVE_AS_OFFSETABLE_LO10): Use -xarch=v9 + unconditionally when gcc_cv_as_flags64 checks are gone. + * configure: Rebuilt. -2000-07-24 Eric Christopher <echristo@cygnus.com> +2002-09-04 Eric Botcazou <ebotcazou@multimania.com> - * MAINTAINERS: Add self to Write After Approval list. + PR c/7102 + * optabs.c (expand_binop): Convert CONST_INTs in all cases. -2000-07-24 Alexandre Oliva <aoliva@redhat.com> +2002-09-04 Jason Thorpe <thorpej@wasabisystems.com> - * Makefile.in (configure-target-libf2c): Depend on $(ALL_GCC). - (configure-target-libchill, configure-target-libobjc): Likewise. + * config/sparc/t-netbsd64: Disable multilib for now. - * configure.in: Use the same cache file for all target libs. - * config-ml.in: But different cache files per multilib variant. +2002-09-01 Alexandre Oliva <aoliva@redhat.com> -2000-07-23 Michael Sokolov <msokolov@ivan.Harhan.ORG> + * c-tree.h (skip_evaluation): Move declaration... + * c-common.h: ... here. + * c-typeck.c (build_external_ref): Don't assemble_external nor + mark a tree as used if skip_evaluation is set. + * c-parse.in (typeof): New non-terminal to set skip_evaluation + around TYPEOF. + (typespec_nonreserved_nonattr): Use it. - * configure (topsrcdir): Don't use dirname. +2002-09-01 Marek Michalkiewicz <marekm@amelek.gda.pl> -2000-07-22 Jeffrey Oldham <oldham@codesourcery.com> + 2002-08-13 Denis Chertykov <denisc@overta.ru> + * config/avr/avr.md: Call CC_STATUS_INIT in all peepnoles + which can change CC0. - * MAINTAINERS: Add self to Write After Approval list. +2002-08-29 Rodney Brown <rbrown64@csc.com.au> -2000-07-20 Jason Merrill <jason@redhat.com> + * doc/install.texi (Specific, alpha*-dec-osf*): Add "virtual + memory exhausted" workarounds. - * configure.in: Remove all references to libg++ and librx. +2002-08-29 John David Anglin <dave@hiauly1.hia.nrc.ca> - * configure, configure.in, Makefile.in: Unify gcc and binutils. + * install.texi (hppa64-hp-hpux11*): Document installation procedure. -2000-07-20 Hans-Peter Nilsson <hp@axis.com> +2002-08-28 Jason Merrill <jason@redhat.com> - * config.sub: Update to subversions version 2000-07-06. + * c-common.c (c_expand_expr) [STMT_EXPR]: If the last expression is + a VAR_DECL with RTL that matches the target, just return that RTL. -2000-07-12 Andrew Haley <aph@cygnus.com> +2002-08-28 Daniel Berlin <dberlin@dberlin.org> - * configure.in (host_makefile_frag): Use mh-ia64pic on IA-64 hosts. - (target_makefile_frag): Use mt-ia64pic on IA-64 targets. + * tree-inline.c (expand_call_inline): Make the statement + expression we generate have a COMPOUND_STMT. -2000-07-07 Phil Edwards <pme@sourceware.cygnus.com> +2002-08-27 Mark Mitchell <mark@codesourcery.com> - * symlink-tree: Check number of arguments. + * doc/invoke.texi: Document -Wabi. -2000-07-05 Jim Wilson <wilson@cygnus.com> +2002-08-23 David Edelsohn <edelsohn@gnu.org> - * Makefile.in (CXX_FOR_TARGET): Add libstdc++ to the library - search path for a g++ extracted from the build tree. This - will allow link tests run by configure scripts in - subdirectories to succeed. + * config/rs6000/rs6000.c (rs6000_select_section): Treat + DEFAULT_ABI == ABI_AIX like PIC. Test PIC & reloc for readonly + default. + (rs6000_unique_section): Likewise. -2000-07-01 Koundinya K <kk@ddeorg.soft.net> +2002-08-22 Jason Merrill <jason@redhat.com> - * ltconfig: Add support for mips-dde-sysv4.2MP + * langhooks-def.h (LANG_HOOKS_EXPR_SIZE): New macro. + * langhooks.c (lhd_expr_size): Define default. + * langhooks.h (struct lang_hooks): Add expr_size. + * explow.c (expr_size): Call it. + (int_expr_size): New fn. + * expr.h: Declare it. + * expr.c (expand_expr) [CONSTRUCTOR]: Use it to calculate how + much to store. -2000-06-29 Michael Hayes <m.hayes@elec.canterbury.ac.nz> +2002-08-23 Alan Modra <amodra@bigpond.net.au> - * MAINTAINERS: Add myself as loop discovery maintainer. + * config/rs6000/rs6000.c (output_mi_thunk): Don't determine insns + for loading delta with num_insns_constant_wide. Calculate + delta_low, delta_high without using a conditional. -2000-06-28 Corinna Vinschen <vinschen@cygnus.com> +2002-08-20 Andreas Jaeger <aj@suse.de> - * ltconfig: Check for host_os beeing one of `cygwin', `mingw' or - `os2'. Force ac_cv_exeext to be ".exe" in that case. + Merge from trunk: + Wed Jul 17 00:20:48 CEST 2002 Jan Hubicka <jh@suse.cz> -2000-06-19 Timothy Wall <twall@cygnus.com> + * i386.md (prefetch): Fix for 64bit mode. + (prefetch_sse_rex, prefetch_3dnow_rex): New patterns. - * configure.in (noconfigdirs): Set noconfigdirs for tic54x target. - * config.sub: Add tic54x target. + 2002-08-11 Andreas Jaeger <aj@suse.de> + PR target/7531: + * doc/invoke.texi (i386 and x86-64 Options): Document -mcmodel. -Sun Jun 11 17:20:00 MET 2000 Toon Moene <toon@moene.indiv.nluug.nl> +2002-06-24 Jeff Law <law@redhat.com> - * MAINTAINERS: Add self as Fortran maintainer, - remove Craig Burley. + * flow.c (propagate_one_insn): When removing an insn + with a REG_LIBCALL note but not the entire libcall sequence, + delete the associated REG_RETVAL note. -Tue May 30 19:01:12 2000 Andrew Cagney <cagney@b1.cygnus.com> +2002-06-04 Jeff Law <law@redhat.com. + David Edelsohn <edelsohn@gnu.org> + Michael Matz <matz@kde.org> - * config.sub: Import CVS version 1.167 Tue May 30 09:00:07 2000. - * config.guess: Import CVS version 1.148 Tue May 30 09:00:06 2000 + * sched-int.h (struct deps): New field libcall_block_tail_insn. + * sched_deps.c (init_deps): Initialize libcall_block_tail_insn. + * sched_deps.c (sched_analyze_insn): If libcall_block_tail_insn + is set, then mark the current insn as being part of a libcall + scheduling group. + (sched_analyze): Set and clear libcall_block_tail_insn appropriately. -Mon May 29 21:15:00 MET 2000 Philipp Thomas <pthomas@suse.de> + * haifa-sched.c (schedule_block): Do not count USE or CLOBBER + insns against the issue rate. - * MAINTAINERS: Add self as i18n maintainer +2002-05-30 Jeff Law <law@redhat.com> -20000-05-21 H.J. Lu (hjl@gnu.org) + * flow.c (propagate_one_insn): Revise yesterday's patch. Delete + a dead insn with a REG_RETVAL note when the entire libcall is not + dead and remove the associated REG_LIBCALL note at the same time. - * Makefile.in (CC_FOR_TARGET): Make sure as/ld in the gcc - directory are used if they exist. Make sure - $(build_tooldir)/include is searched for header files, - $(build_tooldir)/lib/ for library files. - (GCC_FOR_TARGET): Likewise. - (CXX_FOR_TARGET): Likewise. +2002-05-29 Jeff Law <law@redhat.com> -Thu May 18 10:58:13 2000 Jeffrey A Law (law@cygnus.com) + * flow.c (propagate_one_insn): Do not remove a dead insn if it + contains a REG_RETVAL note. - * configure.in (hppa*64*-*-*): Do build ld for this configuration. + * haifa-sched (sched_analyze): Remove another useless clearing + of SCHED_GROUP_P I missed yesterday. -Wed May 17 16:03:48 2000 Alexandre Oliva <aoliva@cygnus.com> +2002-05-28 David Edelsohn <edelsohn@gnu.org> + Jeff Law <law@redhat.com> - * Makefile.in (configure-target-libiberty): Depend on - configure-target-newlib. + * optabs.c (expand_binop): Fix nwords sign warnings. + generate pseudo for add_optab. -2000-05-16 Alexandre Oliva <aoliva@cygnus.com> + * sched-deps.c (sched_analyze): Do not clear SCHED_GROUP_P. + * haifa-sched.c (move_insn): Clear SCHED_GROUP_P after it is used. - * configure.in, Makefile.in: Merge all libffi-related - configury stuff from the libgcj tree. +2002-08-18 Neil Booth <neil@daikokuya.co.uk> -Tue May 16 10:06:21 2000 Andrew Cagney <cagney@b1.cygnus.com> + PR preprocessor/7602 + * cppinit.c (path_include): Treat the system environment + variables as being cxx_aware. - Thu Apr 27 11:01:48 2000 Andrew Cagney <cagney@b1.cygnus.com>: - * Makefile.in (do-tar-bz2, do-md5sum): Skip CVS directories. +2002-08-16 David Edelsohn <edelsohn@gnu.org> -Tue May 16 09:57:35 2000 Andrew Cagney <cagney@b1.cygnus.com> + * collect2.c (is_ctor_dtor): Add other possible JOINER values. - Wed Apr 26 17:03:53 2000 Andrew Cagney <cagney@b1.cygnus.com>: - * Makefile.in (do-djunpack): New target. Update djunpack.bat with - current version information. Add to proto-toplev directory. - (gdb-taz): Build do-djunpack. + * config/rs6000/rs6000.c (output_mi_thunk): Return to function + section on TARGET_ELF. -2000-05-15 David Edelsohn <edelsohn@gnu.org> + * doc/install.texi (*-ibm-aix*): Explain AIX shared object versioning. + (Binaries): Update Bull Freeware URL. - * configure.in: Special case powerpc*-*-aix* target_makefile_frag. +2002-08-15 Neil Booth <neil@daikokuya.co.uk> -Mon May 15 13:39:09 2000 Andrew Cagney <cagney@b1.cygnus.com> + PR preprocessor/7358 + PR preprocessor/7357 + PR preprocessor/7526 + * cppfiles.c (stack_include_file): Ignore main file if + appropriate. Correct test of whether a dependency should + be output. + * cppinit.c (init_dependency_output): Ignore main file + for SUNPRO_DEPENDENCIES. + (struct lang_flags): Rename trigraphs std. + (set_lang): Update. + * cpplib.c (run_directive): Kludge so _Pragma dependency works. + * cpplib.h (struct cpp_options): New members. + * cppmacro.c (collect_args): Flag whether to swallow a possible + future comma pasted with varargs. + (replace_args): Use this flag. + * doc/cpp.texi: Update varargs extension documentation. + * doc/cppenv.texi: Update. - * MAINTAINERS: Add self to Write After Approval list. +2002-08-14 Release Manager -2000-05-13 Alexandre Oliva <oliva@lsd.ic.unicamp.br> + * GCC 3.2 Released. - * ltmain.sh: Preserve in relink_command any environment - variables that may affect the linker behavior. +2002-08-08 Jakub Jelinek <jakub@redhat.com> -Fri May 12 11:23:17 2000 Jeffrey A Law (law@cygnus.com) + * config/rs6000/rs6000.h, config/rs6000/aix.h, + config/rs6000/darwin.h, config/rs6000/linux64.h: Revert last + two patches. + * config/rs6000/sysv4.h: Likewise, remove #undef ADJUST_FIELD_ALIGN. - * config.sub (basic_machine): Recognize hppa64 as a valid cpu type. +2002-08-08 Jakub Jelinek <jakub@redhat.com> -Wed May 10 21:26:51 2000 Jim Wilson <wilson@cygnus.com> + * config/rs6000/rs6000-protos.h (rs6000_field_alignment): Remove. + * config/rs6000/rs6000.c (rs6000_field_alignment): Move... + * config/rs6000/rs6000.h (ADJUST_FIELD_ALIGN): ...inline into the + macro. - * configure.in (ia64*-*-elf*): Add gdb and friends to noconfigdirs. +2002-08-08 Jakub Jelinek <jakub@redhat.com> -2000-05-08 Eli Zaretskii <eliz@is.elta.co.il> + * stor-layout.c (place_union_field): For bitfields if + PCC_BITFIELD_TYPE_MATTERS and TYPE_USER_ALIGN, set record's + TYPE_USER_ALIGN. - * djunpack.bat: Change the Sed script to replace @V@ in fnchange.lst - with the version name. +2002-08-07 Jakub Jelinek <jakub@redhat.com> + Richard Henderson <rth@redhat.com> -Sat May 6 21:12:55 CDT 2000 Jason Eckhardt <jle@cygnus.com> + * stor-layout.c (place_union_field): Apply ADJUST_FIELD_ALIGN + to type_align when PCC_BITFIELD_TYPE_MATTERS. Only apply + ADJUST_FIELD_ALIGN if not DECL_USER_ALIGN resp. TYPE_USER_ALIGN. + (place_field): Likewise. + * config/i386/i386.c (x86_field_alignment): Don't check + TARGET_ALIGN_DOUBLE for the second time. + Apply min for all MODE_INT and MODE_CLASS_INT modes. + * config/rs6000/rs6000.c (rs6000_field_alignment): New. + * config/rs6000/rs6000-protos.h (rs6000_field_alignment): New + prototype. + * config/rs6000/rs6000.h (ADJUST_FIELD_ALIGN): Define. + * config/rs6000/aix.h (ADJUST_FIELD_ALIGN): Remove. + * config/rs6000/darwin.h (ADJUST_FIELD_ALIGN): Remove. + * config/rs6000/linux64.h (ADJUST_FIELD_ALIGN): Remove. + * config/rs6000/sysv4.h (ADJUST_FIELD_ALIGN): Remove. + * doc/tm.texi (ADJUST_FIELD_ALIGN): Update description. - * MAINTAINERS: Add self as bb-reorder maintainer. +2002-08-06 Jakub Jelinek <jakub@redhat.com> -2000-05-01 Benjamin Kosnik <bkoz@cygnus.com> + * config/i386/mmintrin.h (__m64): Make the type 64-bit aligned. - * config.if: Tweak. +2002-08-06 Jakub Jelinek <jakub@redhat.com> -2000-04-23 Eli Zaretskii <eliz@is.elta.co.il> + * config.gcc (*-*-linux*): Default to --enable-threads=posix if no + --{enable,disable}-threads is given to configure. + (alpha*-*-linux*, hppa*-*-linux*, i[34567]86-*-linux*, + x86_64-*-linux*, ia64*-*-linux*, m68k-*-linux*, mips*-*-linux*, + powerpc-*-linux-gnualtivec*, powerpc-*-linux*, s390-*-linux*, + s390x-*-linux*, sh-*-linux*, sparc-*-linux*, sparc64-*-linux*): + Remove thread_file setting here. - * djunpack.bat: New file. +2002-08-04 Mark Mitchell <mark@codesourcery.com> -Wed Apr 19 12:46:26 2000 Andrew Cagney <cagney@b1.cygnus.com> + * doc/install.texi (Installing GCC): Refer to buildstat.html, + rather than listing version-specific build status files. - * Makefile.in (taz, gdb-taz, gas.tar.bz2, binutils.tar.bz2, - gas+binutils.tar.bz2, libg++.tar.bz2, gnats.tar.bz2, gdb.tar.bz2, - dejagnu.tar.bz2, gdb+dejagnu.tar.bz2, insight.tar.bz2, - insight+dejagnu.tar.bz2, newlib.tar.bz2): Pass MD5PROG to sub-make. +2002-08-04 Joseph S. Myers <jsm@polyomino.org.uk> -2000-04-16 Dave Pitts <dpitts@cozx.com> + * doc/include/gcc-common.texi (version-GCC): Increase to 3.2. - * config.sub (case $basic_machine): Change default for "ibm-*" - to "openedition". +2002-08-01 Benjamin Kosnik <bkoz@redhat.com> -2000-04-13 Andreas Jaeger <aj@suse.de> + * gcc.c: Set __GXX_ABI_VERSION to 102. - * MAINTAINERS: Added myself. +2002-07-30 Franz Sirl <Franz.Sirl-kernel@lauterbach.com> -Wed Apr 12 16:42:48 2000 Andrew Cagney <cagney@b1.cygnus.com> + * gcc.c (cpp_unique_options): Define __GXX_ABI_VERSION, bump it to 101. - * Makefile.in (gdb-taz): New target. GDB specific archive. - (do-md5sum): New target. - (MD5PROG): Define. - (PACKAGE): Default to TOOL. - (VER): Default to a shell script. - (taz): Rewrite target. Move real work to do-proto-toplev. Include - md5 checksum generation. - (do-proto-toplev): New target. Create $(PACKAGE)-$(VER) link. - (do-tar-bz2): Delete creation of $(PACKAGE)-$(VER) link. - (gdb.tar.bz2, dejagnu.tar.bz2, gdb+dejagnu.tar.bz2, - insight.tar.bz2): Use gdb-taz to create archive. +2002-07-24 Frank van der Linden <fvdl@wasabisystems.com> -Fri Apr 7 18:10:29 2000 Andrew Cagney <cagney@b1.cygnus.com> + PR optimization/7291 + * config/i386/i386.c (ix86_expand_clrstr): Fix bzero alignment + problem on x86_64. - * configure (warn_cflags): Delete. +2002-05-16 Jason Merrill <jason@redhat.com> -Thu Apr 6 16:15:14 2000 Philippe De Muyter <phdm@macqel.be> + * config/mips/mips.c (mips_output_external): Don't do sdata + optimization for a variable with DECL_COMDAT set. - * MAINTAINERS: Added myself. +2002-01-03 Jakub Jelinek <jakub@redhat.com> -2000-04-05 Benjamin Kosnik <bkoz@cygnus.com> - Martin v. Loewis <martin@loewis.home.cs.tu-berlin.de> + * c-decl.c (build_compound_literal): Set decl TREE_READONLY from TYPE. - * configure.in (enable_libstdcxx_v3): Add. - (target_libs): Add bits here to switch between libstdc++-v2 and - libstdc++-v3. - * config.if: And this file too. - * Makefile.in: Add libstdc++-v3 targets. + * c-decl.c (build_compound_literal): Defer compound literal decls + until until file end to emit them only if they are actually used. -2000-04-05 Michael Meissner <meissner@redhat.com> +2002-07-25 Release Manager - * config.sub (d30v): Add d30v as a basic machine type. + * GCC 3.1.1 Released. -2000-03-29 Jason Merrill <jason@casey.cygnus.com> +2002-07-21 Nick Clifton <nickc@redhat.com> - * configure.in: -linux-gnu*, not -linux-gnu. + * Import following patch from mainline: -Sun Mar 12 17:30:30 2000 Toon Moene <toon@moene.indiv.nluug.nl> + 2002-03-18 Bernd Schmidt <bernds@redhat.com> - * MAINTAINERS: Add self in write-after-approval section. + * config/arm/arm.c (arm_gen_movstrqi): Use gen_lowpart + instead of gen_rtx_SUBREG. + (arm_reload_out_hi): Use gen_lowpart instead of + gen_rtx_SUBREG to access QImode components. + * config/arm/arm.md: Disable zero_extend split for QImode + subregs in BIG_ENDIAN mode. + (storehi_bigend): Match use of least significant byte. + (storeinthi): Remove extraneous SUBREG. + Add missing construction of operands[2]. + (movhi): Use gen_lowpart in place of gen_rtx_SUBREG. + (movqi): Use gen_lowpart in place of gen_rtx_SUBREG. + Replace gen_rtx (SUBREG) with gen_rtx_SUBREG. -Sun Mar 12 00:23:32 2000 Jim Wilson <wilson@cygnus.com> +2002-07-18 Richard Henderson <rth@redhat.com> - * MAINTAINERS: Add self as ia64 port maintainer. + PR optimization/7147 + * ifcvt.c (noce_get_condition): Make certain that the condition + is valid at JUMP. -2000-03-08 Neil Booth <NeilB@earthling.net> +2002-07-16 Hans-Peter Nilsson <hp@axis.com> - * MAINTAINERS: Add self in write-after-approval section. + * config/cris/linux.h (CRIS_LINK_SUBTARGET_SPEC): Don't + --gc-sections if -r. -Fri Mar 3 18:44:08 2000 Andrew Cagney <cagney@b1.cygnus.com> +2002-07-15 Eric Botcazou <ebotcazou@multimania.com> - * Makefile.in (taz): Set PACKAGE to TOOL when not defined. - (do-tar-bz2): Replace TOOL with PACKAGE. - (gdb.tar.bz2): Remove GDBTK from GDB package. - (gdb+dejagnu.tar.bz2, insight.tar.bz2, insight+dejagnu.tar.bz2, - dejagnu.tar.bz2): New packages. + PR optimization/7153 + * regmove.c (optimize_reg_copy_3): Don't optimize if the register + dies in more than one insn. -2000-02-27 Andreas Jaeger <aj@suse.de> +2002-07-15 Jason Thorpe <thorpej@wasabisystems.com> - * configure.in: Add entry for mips*-*-linux*, move catch all - *-*-*linux* entry below this one. + * config/sparc/netbsd-elf.h (TRANSFER_FROM_TRAMPOLINE): Remove. -2000-02-27 Ian Lance Taylor <ian@zembu.com> +2002-07-15 John David Anglin <dave@hiauly1.hia.nrc.ca> - * ltconfig, ltmain.sh: Update to libtool 1.3.4. + * bb-reorder.c (make_reorder_chain_1): Search harder for the vax + casesi fallthru edge. + * cfgrtl.c (force_nonfallthru_and_redirect): Place redirection + block after ADDR_VEC. + * vax.md (casesi): Use emit_jump_insn. Remove unused constraints. -2000-02-24 Nick Clifton <nickc@cygnus.com> +2002-07-15 Jakub Jelinek <jakub@redhat.com> - * config.sub: Support an OS of "wince". + PR middle-end/7245 + * config/i386/i386.c (const_int_1_31_operand): New. + * config/i386/i386.h (PREDICATE_CODES): Add it. + * config/i386/i386.md (ashlsi3_cmp, ashlsi3_cmp_zext, ashlhi3_cmp, + ashlqi3_cmp, ashrsi3_cmp, ashrsi3_cmp_zext, ashrhi3_cmp, ashrqi3_cmp, + lshrsi3_cmp, lshrsi3_cmp_zext, lshrhi3_cmp, lshrqi3_cmp): Use it. -Thu Feb 24 16:15:56 2000 Andrew Cagney <cagney@b1.cygnus.com> +2002-06-11 Andreas Schwab <schwab@suse.de> - * config.guess, config.sub: Updated to match config's 2000-02-15 - version. + * config/m68k/m68k.h (PREDICATE_CODES): Define. -2000-02-23 Linas Vepstas <linas@linas.org> +2002-07-15 Alan Modra <amodra@bigpond.net.au> - * config.sub: Add support for Linux/IBM 370. - * configure.in: Likewise. + PR target/7282 + * config/rs6000/rs6000.md (floatsidf2): Enable for POWERPC64. + (floatunssidf2): Likewise. + (floatsidf_ppc64): New insn_and_split. + (floatunssidf_ppc64): Likewise. -2000-02-22 Nick Clifton <nickc@cygnus.com> +2002-07-12 Stephane Carrez <stcarrez@nerim.fr> - * configure.in: Add mips-pe, sh-pe and arm-wince-pe targets. + * config/m68hc11/m68hc11.md ("zero_extendsidi2"): Use D_REG only for + the scratch register. + ("*movhi2_push"): Accept Z_REG because a split pattern can make use + of it, forbid reload to use it. -2000-02-20 Christopher Faylor <cgf@cygnus.com> +2002-07-12 Marek Michalkiewicz <marekm@amelek.gda.pl> - * config.guess: Guess "cygwin" rather than "cygwin32". + * config/avr/avr.c (test_hard_reg_class): Fix TEST_HARD_REG_BIT + usage on 64-bit hosts, return value was truncated to 32 bits. -2000-02-16 Kaveh R. Ghazi <ghazi@caip.rutgers.edu> +2002-07-11 John David Anglin <dave@hiauly1.hia.nrc.ca> - * configure (gcc_version): When setting, narrow search to - lines containing `version_string'. + * pa.md (adddi3): Change predicate of operand 2 to adddi3_operand. + Remove comment. Change predicate of 32-bit adddi3 insn pattern to + arith11_operand. + * pa-protos.h (adddi3_operand): Add prototype. + * pa.c (cint_ok_for_move): Fix comment. + (adddi3_operand): New function. + (emit_move_sequence): Don't directly split DImode constants on + 32-bit targets. -2000-02-15 Denis Chertykov <denisc@overta.ru> +2002-07-05 Stephane Carrez <stcarrez@nerim.fr> - * config.sub: Add support for avr target. + * config/m68hc11/m68hc11.md ("*movqi_68hc12"): Avoid allocating + QI mode registers in soft registers. + ("zero_extendqihi2"): Do not take into account soft registers + for register allocation (use '*' constraint). -2000-02-14 Nick Clifton <nickc@cygnus.com> +2002-07-05 Stephane Carrez <stcarrez@nerim.fr> - * MAINTAINERS: Add maintainers for MCore port. + * config/m68hc11/m68hc11.md ("*ashlsi3"): Avoid saving y if we know + it is dead. + ("*ashrsi3"): Likewise. + ("*lshrsi3"): Likewise. -Tue Feb 1 00:07:46 2000 Hans-Peter Nilsson <hp@bitrange.com> +2002-07-05 Stephane Carrez <stcarrez@nerim.fr> - * config.sub: Add mmix-knuth-mmixware. + * config/m68hc11/m68hc11.md (peephole2): New peephole2 to optimize + address computation and memory moves. -2000-01-31 Kaveh R. Ghazi <ghazi@caip.rutgers.edu> +2002-07-03 Mark Mitchell <mark@codesourcery.com> - * MAINTAINERS: Pair cccp with cpplib maintainership. + PR c++/6706 + * dwarfout.c (output_reg_number): Fix warning message. + (output_bound_representation): Check SAVE_EXPR_RTL is not NULL + before using it. -2000-01-27 Christopher Faylor <cgf@redhat.com> +2002-07-03 Richard Henderson <rth@redhat.com> - * Makefile.in (CC_FOR_TARGET): Add new winsup directory - structure stuff to -L library search. - (CXX_FOR_TARGET): Ditto. - (CROSS_CHECK_MODULES): Fix spelling mistake. + * config/i386/i386.md (prologue_get_pc): Issue pop here ... + * config/i386/i386.c (load_pic_register): ... not here. -2000-01-24 Mark Mitchell <mark@codesourcery.com> +2002-07-03 David Edelsohn <edelsohn@gnu.org> - * Makefile.in (CXX_FOR_TARGET): Use g++, not xgcc, to invoke - the C++ compiler. + * config/rs6000/rs6000.md (fix_truncdfsi2_internal): Ignore DImode + in FPR as preference. + (fctiwz): Same. + (floatdidf2, fix_truncdfdi2): Same. + (floatdisf2, floatditf2, fix_trunctfdi2): Same. + (floatditf2): Same. + (floatsitf2, fix_trunctfsi2): SImode in GPR. + (ctrdi): Remove FPR alternative and splitter. -2000-01-12 Richard Henderson <rth@cygnus.com> +2002-07-02 Hans-Peter Nilsson <hp@axis.com> - * configure.in: Don't build some bits for beos. + PR target/7177 + * config/cris/cris.h (LEGITIMIZE_RELOAD_ADDRESS): Correct number + of indirections for register inside sign-extended mem part. -2000-01-12 Joel Sherrill (joel@OARcorp.com) +2002-07-01 John David Anglin <dave@hiauly1.hia.nrc.ca> - * Makefile.in (CC_FOR_TARGET): Use newlib libraries as well - as include files. + * emit-rtl.c (init_emit_once): Add missing cast to HOST_WIDE_INT. -2000-01-11 Zack Weinberg <zack@wolery.cumb.org> +2002-06-30 David Edelsohn <edelsohn@gnu.org> - * Add self as cpplib maintainer, as requested by Jason - Merrill. Correct my e-mail address. + * config/rs6000/rs6000.md (ctrdi): Allocate pseudo for FPR + constraint in define_expand, not splitter. -2000-01-06 Geoff Keating <geoffk@cygnus.com> +2002-06-28 Phil Edwards <pme@gcc.gnu.org> - * configure.in: Use mt-aix43 to handle *_TARGET defs, - not mh-aix43. + * configure.in (gcc_gxx_include_dir): Change to match versioned + C++ headers if --enable-version-specific-runtime-libs is used. + * configure: Regenerate. -Thu Dec 23 03:43:36 1999 Hans-Peter Nilsson <hp@bitrange.com> +2002-06-28 Stephane Carrez <stcarrez@nerim.fr> - * MAINTAINERS: Add myself to "write after approval" list. + * config/m68hc11/m68hc11.md ("*addsi3"): Use 'o' constraint to + avoid the auto increment addressing modes. + ("*subsi3"): Likewise. + (split for add/sub on address): For 68HC12 push the value on + the stack and do the operation with a pop. -1999-12-14 Richard Henderson <rth@cygnus.com> +2002-06-28 Stephane Carrez <stcarrez@nerim.fr> - * config.guess (alpha-osf, alpha-linux): Detect ev67. - * config.sub: Accept alphaev[78], alphaev8. + * config/m68hc11/m68hc11.h (OPTIMIZATION_OPTIONS): Define. + * config/m68hc11/m68hc11-protos.h (m68hc11_optimization_options): + Declare. + * config/m68hc11/m68hc11.c (m68hc11_optimization_options): New, + do not reorder basic blocks at the end when optimizing for size. -1999-12-03 Alexandre Oliva <oliva@lsd.ic.unicamp.br> +2002-06-28 Stephane Carrez <stcarrez@nerim.fr> - * config.guess, config.sub: Update from autoconf. + * config/m68hc11/m68hc11.c (autoinc_mode): New function. + (m68hc11_make_autoinc_notes): New function. + (m68hc11_split_move): Be very cautious when spliting a move with + auto increment/decrement modes because this may result in incompatible + directions; add REG_INC notes to the resulting insn for CSE reg. -1999-11-29 Bruce Korb <autogen@linuxbox.com> +2002-06-28 Stephane Carrez <Stephane.Carrez@nerim.fr> - * MAINTAINERS: update my playtime e-address. + * config/m68hc11/m68hc11.c (register_indirect_p): For 68HC12 a constant + can be a valid address. -Tue Nov 23 00:57:41 1999 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE> +2002-06-28 Bob Wilson <bob.wilson@acm.org> - * config-ml.in (sparc*-*-*): Disable sparcv9 support if the - necessary libraries are missing. + * config/xtensa/xtensa-protos.h (xtensa_return_addr): Declare. + config/xtensa/xtensa.c (xtensa_return_addr): New function. + config/xtensa/xtensa.h (RETURN_ADDR_RTX): Use xtensa_return_addr. + config/xtensa/xtensa.md (fix_return_addr): New pattern. -Fri Nov 19 11:22:31 MST 1999 Diego Novillo <dnovillo@cygnus.com> +2002-06-28 Bob Wilson <bob.wilson@acm.org> - * MAINTAINERS: Add new 'write after approval' maintainer. + * config/xtensa/xtensa.h (FUNCTION_PROFILER): Respect flag_pic + when generating the call to _mcount. + (NO_PROFILE_COUNTERS): Define. -Wed Nov 17 16:08:43 1999 Alexandre Petit-Bianco <apbianco@cygnus.com> +2001-06-08 Bernd Schmidt <bernds@redhat.com> - * MAINTAINERS: Add new Java maintainer. + * emit-rtl.c (gen_lowpart_common): Don't create paradoxical FLOAT_MODE + subregs. + * recog.c (general_operand, register_operand): Disallow them. -1999-10-25 Andreas Schwab <schwab@suse.de> +2002-06-27 Bob Wilson <bob.wilson@acm.org> - * configure: Fix quoting inside arguments of eval. + * config/xtensa/xtensa.h (ASM_OUTPUT_POOL_PROLOGUE): Pass + flag_function_sections as new 3rd arg to resolve_unique_section. -1999-10-21 Nick Clifton <nickc@cygnus.com> +2002-06-27 Neil Booth <neil@daikokuya.co.uk> - * config-ml.in: Allow suppression of some ARM multilibs. + PR preprocessor/7070 + * c-lex.c (cb_def_pragma): Don't try to spell CPP_EOF. -Tue Sep 7 23:33:57 1999 Linas Vepstas <linas@linas.org> +2002-06-27 Gerald Pfeifer <pfeifer@dbai.tuwien.ac.at> - * config.guess: Add OS/390 match pattern. - * config.sub: Add mvs, openedition targets. - * configure.in (i370-ibm-opened*): New. + * doc/install.texi (Binaries): Add Sinix/Reliant Unix. Move + Hitachi entry. Make punctuation more consistent. -1999-09-04 Steve Chamberlain <sac@pobox.com> +2002-06-27 Matt Kraai <kraai@alumni.cmu.edu> - * config.sub: Add support for configuring for pj. + * doc/install.texi: Change ` bit' to `-bit'. + * doc/md.texi: Change `-bits' to `-bit'. + * doc/tm.texi: Change `-bits' to ` bits'. -1999-08-31 Nick Clifton <nickc@cygnus.com> +2002-06-24 David S. Miller <davem@redhat.com> - * config.sub (maybe_os): Add support for configuring for fr30. + * config/sparc/sparc.h (INIT_TARGET_OPTABS): If ARCH64, set the + 32-bit ABI libfuncs to NULL. -1999-08-25 Nick Clifton <nickc@cygnus.com> + * expmed.c (expand_divmod): Do not set optab1/optab2 to the shift + optabs if op1 is const0_rtx. - * configure.in: Do not configure or build ld for AIX - platforms. ld is known to be broken on these platforms. +2002-06-23 Jan Hubicka <jh@suse.cz> -Wed Aug 25 01:12:25 1999 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE> + * reg-stack.c (convert_regs_exit): Push the registers to stack in + proper order. - * config-ml.in: Pass compiler flag corresponding to multidirs to - subdir configures. +2002-06-22 Ulrich Weigand <uweigand@de.ibm.com> -1999-08-09 Ian Lance Taylor <ian@zembu.com> + PR middle-end/6963 + * function.c (assign_stack_temp_for_type): Do not return + the same MEM rtx for multiple uses of a stack slot. - * Makefile.in (LDFLAGS): Define. +2002-06-22 David S. Miller <davem@redhat.com> -1999-08-08 Mumit Khan <khan@xraylith.wisc.edu> + PR target/6841 target/6770 target/6719 + * config/sparc/sparc.h (PREFERRED_RELOAD_CLASS): Return + NO_REGS for constant X when CLASS is GENERAL_OR_FP_REGS or + GENERAL_OR_EXTRA_FP_REGS. - * configure.in (i[3456]-*-mingw32*): Don't put gprof in - noconfigdirs. - (*-*-cygwin*): Likewise. +2002-06-21 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE> -1999-08-08 Ian Lance Taylor <ian@zembu.com> + * config/sparc/t-crtfm (crtfastmath.o): Prefix with $(T) for + multilibs. + * config/sparc/t-sol2-64 (EXTRA_MULTILIB_PARTS): Add crtfastmath.o. + * config/sparc/t-linux64 (EXTRA_MULTILIB_PARTS): Likewise. + Fixes PR other/6836. - * mkdep: New file. - * Makefile.in (GAS_SUPPORT_DIRS): Add mkdep. - (BINUTILS_SUPPORT_DIRS): Add mkdep. +2002-06-21 Bo Thorsen <bo@suse.de> - From Eli Zaretskii <eliz@is.elta.co.il>: - * configure (tmpfile): Change cONf$$ to cNf$$ to avoid an overly - long file name when using DJGPP on MS-DOS. + * config/i386/linux64.h (MD_FALLBACK_FRAME_STATE_FOR): Add i386 + support so multilib works again. And don't define this at all + when -Dinhibit_libc is used. -Wed Aug 4 02:07:14 1999 Jeffrey A Law (law@cygnus.com) +Thu Jun 20 16:41:40 CEST 2002 Jan Hubicka <jh@suse.cz> - * config.sub (vxworks case): Use os=-vxworks, not os=vxworks. + * combine.c (gen_lowpart_for_combine): Avoid calling of + simplify_gen_subreg on VOIDmode. -1999-07-30 Alan Modra <alan@spri.levels.unisa.edu.au> + * combine.c (subst): Be prepared for simplify_subreg to return VOIDmode. - * Makefile.in (check-target-libio): Remove all-target-libstdc++ - dependency as this causes "make check" to globally "make all" +2002-06-20 Richard Henderson <rth@redhat.com> -Tue Jun 22 23:45:18 1999 Tom Tromey <tromey@cygnus.com> + * c-common.c (c_common_get_alias_set): Correctly handle characters. + Rearrange order of expressions; don't handle vectors here. + * alias.c (get_alias_set): Let vectors match their components. - * configure.in (target_libs): Added target-zlib. - * Makefile.in (ALL_TARGET_MODULES): Added zlib. - (CONFIGURE_TARGET_MODULES): Likewise. - (CHECK_TARGET_MODULES): Likewise. - (INSTALL_TARGET_MODULES): Likewise. - (CLEAN_TARGET_MODULES): Likewise. - (configure-target-zlib): New target. - (all-target-zlib): Likewise. - (all-target-libjava): Depend on all-target-zlib. - (configure-target-libjava): Depend on configure-target-zlib. +2002-06-17 Hans-Peter Nilsson <hp@axis.com> - * Makefile.in (configure-target-libjava): Depend on - configure-target-newlib. - (configure-target-boehm-gc): New target. - (configure-target-qthreads): New target. + PR target/7042 + * config/cris/cris.c (cris_simple_epilogue): Kludge around reorg.c + bug by saing that the epilogue isn't simple if there's a + non-empty current_function_epilogue_delay_list. + * config/cris/cris.md ("return"): Add sanity check asserting that + current_function_epilogue_delay_list is empty. - * configure.in (target_libs): Added target-qthreads. - * Makefile.in (ALL_TARGET_MODULES): Added qthreads. - (CONFIGURE_TARGET_MODULES): Likewise. - (CHECK_TARGET_MODULES): Likewise. - (INSTALL_TARGET_MODULES): Likewise. - (CLEAN_TARGET_MODULES): Likewise. - (all-target-qthreads): New target. - (configure-target-libjava): Depend on configure-target-qthreads. - (all-target-libjava): Depend on all-target-qthreads. +2002-06-17 Richard Henderson <rth@redhat.com> - * Makefile.in (ALL_TARGET_MODULES): Added libjava, boehm-gc. - (CONFIGURE_TARGET_MODULES): Likewise. - (CHECK_TARGET_MODULES): Likewise. - (INSTALL_TARGET_MODULES): Likewise. - (CLEAN_TARGET_MODULES): Likewise. - (all-target-libjava): New target. - (all-target-boehm-gc): Likewise. - * configure.in (target_libs): Added libjava, boehm-gc. + * config/i386/i386.h (BIGGEST_FIELD_ALIGNMENT): Define instead + of ADJUST_FIELD_ALIGN if IN_TARGET_LIBS. -1999-07-22 Ian Lance Taylor <ian@zembu.com> +2002-06-17 Richard Henderson <rth@redhat.com> - * Makefile.in (binutils.tar.bz2): Don't pass makeall.bat and - configure.bat in SUPPORT_FILES. - (gas+binutils.tar.bz2): Likewise. + PR target/6922 + * expmed.c (make_tree): Handle SIGN_EXTEND/ZERO_EXTEND. - * makeall.bat: Remove; obsolete. +Mon Jun 17 00:31:46 CEST 2002 Jan Hubicka <jH@suse.cz> -1999-07-21 Ian Lance Taylor <ian@zembu.com> + * i386-protos.h (x86_field_alignment): Declare. + * i386.c (x86_field_alignment): Define. + * i386.h (ADJUST_FIELD_ALIGNMENT): New. + (BIGGEST_FIELD_ALIGNMENT): Kill. - From Mark Elbrecht: - * configure.bat: Remove; obsolete. +2002-06-16 Richard Henderson <rth@redhat.com> -1999-07-11 Ian Lance Taylor <ian@zembu.com> + PR opt/6722 + * regclass.c (globalize_reg): Update regs_invalidated_by_call. - * configure: Add -W -Wall to the default CFLAGS when compiling with - gcc. +2002-06-16 Richard Henderson <rth@redhat.com> -Thu Jul 8 12:32:23 1999 John David Anglin <dave@hiauly1.hia.nrc.ca> + PR c/7030 + * dwarf2out.c (modified_type_die): Don't assign the qualified die + to the unqualified type. - * configure.in: Build ld, binutils & gas for hppa*-*-linux-gnu*. +2002-06-14 Jeff Sturm <jsturm@one-point.com> -1999-06-30 Mark Mitchell <mark@codesourcery.com> + * config/sparc/sparc.h (DYNAMIC_CHAIN_ADDRESS): Add + SPARC_STACK_BIAS. - * configure.in: Build ld on IRIX6. +2002-06-14 Eric Botcazou <ebotcazou@multimania.com> -1999-06-12 Ian Lance Taylor <ian@zembu.com> + * loop.c (check_final_value): Use v->always_executed + instead of v->always_computable. + * unroll.c (final_giv_value): Don't calculate the final + value as a function of the biv if the giv is not computed + for every loop iteration. - * Makefile.in: Change distribution targets to use bzip2 instead of - gzip. - (TEXINFO_SUPPORT): Set to just texinfo/texinfo.tex. - (taz): Don't use texinfo/gpl.texinfo or texinfo/lgpl.texinfo. +2002-06-14 Eric Botcazou <ebotcazou@multimania.com> -1999-06-04 Nick Clifton <nickc@cygnus.com> + PR c/6677 + * convert.c (convert_to_integer) [LSHIFT_EXPR]: Don't pass + the truncation down when the target type is signed. + [trunc1]: Use unsigned arithmetic for LSHIFT_EXPR. + * fold-const.c (extract_muldiv) [NOP_EXPR]: Don't pass through + the conversion if the target type is a smaller type. - * config.sub: Add mcore target. +Thu Jun 13 18:27:05 CEST 2002 Jan Hubicka <jh@suse.cz> -Sun May 30 16:03:16 1999 Cort Dougan <cort@cs.nmt.edu> + * i386.c (ix86_expand_movstr): Fix pasto. - * config.guess (ppc-*-linux-gnu): Also use ld emul elf32ppclinux. +Thu Jun 13 18:02:11 CEST 2002 Jan Hubicka <jh@suse.cz> -Tue May 25 11:20:46 1999 H.J. Lu (hjl@gnu.org) + * reload.c (find_valid_class): Fix thinko in my previous patch. - * config.guess (dummy): Changed to $dummy. +2002-06-13 Hans-Peter Nilsson <hp@axis.com> -1999-05-24 Nick Clifton <nickc@cygnus.com> + PR target/6997 + * config/cris/cris.md ("sleu"): Set attribute "cc" to "none". - * config.sub: Tidied up case statements. +2002-06-12 Daniel Jacobowitz <drow@mvista.com> -1999-05-22 Ben Elliston <bje@cygnus.com> + * config/mips/elf.h (DWARF2_DEBUG_INFO): Define. + * config/mips/mips.c (mips_output_filename): Don't print a + ".file" directive if we are using DWARF-2. + (mips_output_function_prologue): Do not emit source file + name for TARGET_GAS. - * config.guess: Handle NEC UX/4800. Contributed by Jiro Takabatake - <jiro@din.or.jp>. +2002-06-11 Ulrich Weigand <uweigand@de.ibm.com> - * config.guess: Merge with FSF version. Future changes will be - more accurately recorded in this ChangeLog. - * config.sub: Likewise. + * config/s390/s390.md (movsi): Only use floating point + register alternatives when operands are already fprs. + (movdi_31, movdi_64): Likewise. -Thu May 20 10:00:42 1999 Stephen L Moshier <moshier@world.std.com> +2002-06-11 Ulrich Weigand <uweigand@de.ibm.com> - * Makefile.in (GCC_FOR_TARGET): Add -I$(build_tooldir)/include. + * config/s390/s390.md (reload_base, ltorg): Remove. + * s390.c (s390_stop_dump_lit_p, s390_dump_literal_pool, + s390_asm_output_pool_prologue, s390_pool_start_insn): Remove. + * s390-protos.h (s390_stop_dump_lit_p, s390_dump_literal_pool, + s390_asm_output_pool_prologue): Likewise. + * s390.h (s390_pool_start_insn): Likewise. -1999-04-30 Tom Tromey <tromey@cygnus.com> + * s390.c (s390_output_symbolic_const): Remove support for + old-style pool chunks. + (s390_function_epilogue): Likewise. + (s390_output_constant_pool): Likewise. Also, fix incorrect + alignment for 64-bit literal pools. + (print_operand_address): Remove 'y' and 'Y' format flags. + * s390.h (ASM_OUTPUT_POOL_PROLOGUE): Remove support for + old-style pool chunks. + (ASM_OUTPUT_SPECIAL_POOL_ENTRY): Likewise. + (ASM_OUTPUT_POOL_EPILOGUE): Remove. + (S390_CHUNK_MAX, S390_CHUNK_OV, S390_POOL_MAX): Remove. - * ltmain.sh: [mode link] Always use CC given by ltconfig. + * s390.c (consttable_operand): New function. + * s390-protos.h (consttable_operand): Declare it. + * s390.h (PREDICATE_CODES): Add consttable_operand. + * s390.md (consttable_qi, consttable_hi, consttable_si, consttable_di, + consttable_sf, consttable_df, pool_start_31, pool_end_31, + pool_start_64, pool_end_64, reload_base, reload_base2): New insns. + * s390.c (struct constant, struct constant_pool): New data types. + (constant_modes, gen_consttable): New variables. + (s390_start_pool, s390_end_pool, s390_add_pool, + s390_dump_pool, s390_free_pool): New functions. + (s390_chunkify_pool): Completely reimplement literal pool + overflow handling. -1999-04-23 Tom Tromey <tromey@cygnus.com> + * s390.c (s390_pool_overflow): New variable. + * s390.h (s390_pool_overflow): Declare it. + * s390.md (cjump, icjump): Use it to adapt length for out-of-range + jumps in literal pool overflow situations. - * ltconfig, ltmain.sh: Update to libtool 1.2f. + * s390.c (s390_decompose_address): Accept new-style pool chunk offsets. + (s390_frame_info): Account for possible use of RETURN_REGNUM + by new literal pool overflow code. + (s390_emit_prologue): Likewise. -1999-04-20 Drew Moseley <dmoseley@cygnus.com> +2002-06-10 Jakub Jelinek <jakub@redhat.com> - * configure.in (noconfigdirs): Don't build libstub for arm-elf targets. - (noconfigdirs): Don't build any bsp stuff for for arm-oabi targets. - Bad merge removed these two changes. + PR optimization/6759 + * cse.c (cse_insn): Fold src_eqv just once, store it folded back into + the REQ_EQUAL note. -Tue Apr 13 22:50:54 1999 Donn Terry (donn@interix.com) - Martin Heller (Ing.-Buero_Heller@t-online.de) +2002-06-10 Jakub Jelinek <jakub@redhat.com> - * config.guess (interix Alpha): Add. + PR c/6660 + * c-decl.c (grokfield): Allow user defined types if they declare + structs or unions for unnamed fields. -1999-04-11 Richard Henderson <rth@cygnus.com> +2002-06-10 Jakub Jelinek <jakub@redhat.com> - * configure.in (i?86-*-beos*): Do config gperf; don't config - gdb, newlib, or libgloss. + PR c/6809 + * print-rtl.c (print_mem_expr): Don't crash on unnamed fields. -Sun Apr 11 23:55:34 1999 Alexandre Oliva <oliva@dcc.unicamp.br> +2002-06-10 Jakub Jelinek <jakub@redhat.com> - * config-ml.in: On mips*-*-*, if multidirs contains mabi=64, try to - link a trivial program with -mabi=64. If it fails, remove mabi=64 - from multidirs. + * varasm.c (const_hash): Handle FDESC_EXPR like ADDR_EXPR. + (compare_constant): Likewise. + (output_addressed_constants): Likewise. -Sat Apr 10 21:50:01 1999 Philipp Thomas (kthomas@gwdg.de) +2002-06-10 Jakub Jelinek <jakub@redhat.com> - * config.sub: Set basic_machine to i586 when target_alias = k6-*. + * cfgcleanup.c (try_optimize_cfg): Make sure merge_blocks doesn't + merge bb with itself. -1999-04-08 Nick Clifton <nickc@cygnus.com> +2002-06-07 Jason Thorpe <thorpej@wasabisystems.com> - * config.sub: Add support for mcore targets. + * config.gcc (mips*-*-netbsd*): Add mips/t-netbsd to ${tmake_file}. + * config/mips/t-netbsd: New file. -1999-04-07 Michael Meissner <meissner@cygnus.com> +2002-06-07 H.J. Lu (hjl@gnu.org) - * configure.in (d30v-*): Use config/mt-d30v as makefile fragment, - not mt-ospace, in order to shut up assembler warning about using - symbols that are named the same as registers. + * configure.in: Add --enable-__cxa_atexit. + * configure: Regenerated. + * config.in: Likewise. -1999-04-07 Drew Moseley <dmoseley@cygnus.com> + * defaults.h (DEFAULT_USE_CXA_ATEXIT): New. Defined to be 0 if + not defined. - * Makefile.in (all-target-cygmon): Added all-target-bsp to the - dependency list for all-target-cygmon. +2002-06-07 Jason Thorpe <thorpej@wasabisystems.com> -1999-04-05 Doug Evans <devans@casey.cygnus.com> + * config/mips/netbsd.h (CACHE_FLUSH_FUNC): Define. - * config-ml.in: Check $host, not $target, for selective multilibs. - (arm-*-*): Allow disabling of biendian, h/w fp, 26 bit apcs, - thumb interworking, and underscore prefix multilibs. +Thu Jun 6 07:17:43 2002 Nicola Pero <n.pero@mi.flashnet.it> -1999-04-04 Ian Lance Taylor <ian@zembu.com> + PR objc/6834 + * objc/objc-lang.c (LANG_HOOKS_GET_ALIAS_SET): Define to be + c_common_get_alias_set. + (LANG_HOOKS_SAFE_FROM_P): Define to be c_safe_from_p. - * missing: Update to version from current automake. +2002-06-05 Jeff Law <law@redhat.com> -Fri Apr 2 15:11:32 1999 H.J. Lu (hjl@gnu.org) + * pa.h (EXTRA_CONSTRAINT, T case): Further refine so that it + rejects (mem (lo_sum (reg) (unspec))), but will allow + (mem (lo_sum (reg) (symbol_ref)) for PA2.0. - * configure (gxx_include_dir): Removed. +2002-06-05 Alan Modra <amodra@bigpond.net.au> - * configure.in (gxx_include_dir): Handle it. - * Makefile.in: Likewise. + * config/rs6000/linux64.h (ASM_OUTPUT_SOURCE_LINE): Define. -1999-03-29 Gavin Romig-Koch <gavin@cygnus.com> +Tue Jun 4 18:16:50 CEST 2002 Jan Hubicka <jh@suse.cz> - * config.sub (mips64vr4111,mips64vr4111el) Add. + * dwarf2out.c (expand_builtin_init_dwarf_reg_sizes): Do not initialize + fields past the register table. -1999-03-21 Ben Elliston <bje@cygnus.com> + * i386.c (classify_argument): Properly handle base classes. - * config.guess: Correct typo for detecting ELF on FreeBSD. +Tue Jun 4 13:09:18 CEST 2002 Jan Hubicka <jh@suse.cz> -Thu Mar 18 00:17:50 1999 Mark Elbrecht <snowball3@usa.net> + * loop.c (emit_prefetch_instructions): Properly place the address + computation. - * config/mh-go32: Delete. - * config/mh-djgpp: New. Renamed from mh-go32. - * configure.in (pc-msdosdjgpp): Set host_makefile_frag to - config/mh-djgpp. + * dwarf2out.c (output_call_frame_info): Do not skip unwind info + when flag_asynchronous_unwind_tables is set. -Thu Mar 11 18:37:23 1999 Drew Moseley <dmoseley@cygnus.com> + * i386-protos.h (x86_output_mi_thunk): Declare. + * unix.h (ASM_OUTPUT_MI_THUNK): Move offline to ... + * i386.c (x86_output_mi_thunk): ... here; handle 64bits. - * Makefile.in (all-target-bsp): Added all-gcc all-binutils and - all-target-newlib to dependency list for all-target-bsp. + * config/i386/i386.c (ix86_expand_int_movcc): Truncate to proper + mode. -Thu Mar 11 01:19:31 1999 Mumit Khan <khan@xraylith.wisc.edu> + * i386.md (movabsdi): Kill broken alternative. - * config.sub: Add i386-uwin support. - * config.guess: Likewise. + * i386.c (dbx64_register_map): Fix typo -Thu Mar 11 01:07:55 1999 Franz Sirl <Franz.Sirl-kernel@lauterbach.com> +2002-06-03 Jason Thorpe <thorpej@wasabisystems.com> - * configure.in: cleanup, add mh-*pic handling for arm, special - case powerpc*-*-aix* + * config/rs6000/netbsd.h (DRAFT_V4_STRUCT_RET): Remove. -Wed Mar 10 18:35:07 1999 Jeff Johnston <jjohnstn@cygnus.com> +2002-05-31 John David Anglin <dave@hiauly1.hia.nrc.ca> - * configure.in (noconfigdirs): Removed target-libgloss so libnosys.a - can be built. + * pa-linux.h (WCHAR_UNSIGNED): Define to 0. + * pa.h (WCHAR_UNSIGNED): Define to 1. -Wed Mar 10 17:39:09 1999 Drew Moseley <dmoseley@cygnus.com> +2002-05-31 John David Anglin <dave@hiauly1.hia.nrc.ca> - * configure.in: Added bsp support to arm-*-coff and arm-*-elf - targets. + * pa.c (output_millicode_call): Correct "be,l" insn for TARGET_PA_20. + (output_call): Likewise. -1999-03-02 Nick Clifton <nickc@cygnus.com> +2002-05-30 Richard Henderson <rth@redhat.com> + Eric Botcazou <ebotcazou@multimania.com> - * config.sub: Rename CYGNUS LOCAL to EGCS LOCAL + PR optimization/6822 + * config/i386/i386.c (ix86_expand_int_movcc): Don't cast INTVAL + to unsigned int for op1 comparisons. Use gen_int_mode. -Sun Feb 28 02:20:00 1999 Geoffrey Noer <noer@cygnus.com> +2002-05-30 Marc Espie <espie@openbsd.org> - * config.sub: Check for "cygwin*" rather than "cygwin32*" + * config.gcc (sparc64-*-openbsd*): New. + * config/sparc/openbsd1-64.h: New. + * config/sparc/openbsd64.h: New. -1999-02-24 Nick Clifton <nickc@cygnus.com> +2002-05-30 Jason Thorpe <thorpej@wasabisystems.com> - * config.sub: Fix typo in arm recognition. + * config/m68k/netbsd-elf.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Set to + 96 if not __mc68010__. -Wed Feb 24 13:51:40 1999 Drew Moseley <dmoseley@cygnus.com> +2002-05-30 Andreas Schwab <schwab@suse.de> - * configure.in (noconfigdirs): Changed target_configdirs to - include target-bsp only for m68k-*-elf* and m68k-*-coff* - rather than m68k-*-* since it is not known to work on - m68k-aout. Ditto for arm-*-*oabi. + * config/ia64/sysv4.h (DO_SELECT_SECTION): Also handle + FUNCTION_DECLs. -Wed Feb 24 12:52:17 1999 Stan Shebs <shebs@andros.cygnus.com> +2002-05-30 Jason Thorpe <thorpej@wasabisystems.com> - * configure.in (*-*-windows*): Remove, no longer used. - * config/mh-windows: Ditto. + * config/i386/netbsd64.h (CPP_LP64_SPEC): Define. + (CPP_SUBTARGET_SPEC): Define. + (SUBTARGET_EXTRA_SPECS): Redefine, adding cpp_lp64 and + cpp_subtarget specs. + (CPP_SPEC): Redefine to include %(cpp_subtarget). -1999-02-19 Ben Elliston <bje@cygnus.com> +2002-05-29 Hans-Peter Nilsson <hp@axis.com> - * config.guess: Automatically recognise ELF on FreeBSD. From Niall - Smart and improved by Andrew Cagney. + * doc/md.texi (Patterns): Note pattern condition pitfall + for unnamed insn. -Thu Feb 18 19:55:09 1999 Marc Espie <espie@cvs.openbsd.org> +2002-05-29 Jason Thorpe <thorpej@wasabisystems.com> - * config.guess: Recognize openbsd-*-hppa. + * config/sparc/netbsd-elf.c (CPP_SUBTARGET_SPEC64): Remove + -D__arch64__. Add -D_LP64. + (CPP_ARCH32_SPEC): Redefine to match the non-bi-arch version + from sparc.h. + (CPP_ARCH64_SPEC): Likewise. + (NO_BUILTIN_PTRDIFF_TYPE): Undef. + (NO_BUILTIN_SIZE_TYPE): Undef. -Wed Feb 17 01:38:59 1999 H.J. Lu (hjl@gnu.org) +2002-05-29 Jason Thorpe <thorpej@wasabisystems.com> - * Makefile.in (REALLY_SET_LIB_PATH): Append $$$(RPATH_ENVVAR) - only if it is not empty. + * config.gcc (alpha-*-netbsd*): Don't use crtstuff. -1999-02-17 Nick Clifton <nickc@cygnus.com> +2002-05-29 Jason Thorpe <thorpej@wasabisystems.com> - Patch from: Scott Bambrough <scottb@corelcomputer.com> + * config/alpha/netbsd.h (CPP_PREDEFINES): Add -D_LP64. - * config.guess: Modified to recognize uname's armv* syntax. +2002-05-29 Richard Henderson <rth@redhat.com> - * config.sub: Modified to recognize uname's armv* syntax. + * config/i386/i386.c (ix86_compute_frame_layout): Do add bottom + alignment for alloca. -1999-02-17 Mark Salter <msalter@cygnus.com> +2002-05-29 Neil Booth <neil@daikokuya.demon.co.uk> - * configure.in: Added target-bsp for sparclite. + PR preprocessor/6844 + * cppmacro.c (cpp_macro_definition): Reserve space for terminating + NUL. -Mon Feb 8 14:17:24 1999 Richard Henderson <rth@cygnus.com> +2002-05-29 Joel Sherrill <joel@OARcorp.com> - * config.sub: Recognize alphapca5[67] and up to alphaev8. + * config/rs6000/rs6000.h (ASM_CPU_SPEC): Use -m403 and -m405. -1999-02-08 Nick Clifton <nickc@cygnus.com> +2002-05-29 Hans-Peter Nilsson <hp@axis.com> - * configure.in: Add support for strongarm port. - * config.sub: Add support for strongarm target. + PR target/6838 + * config/cris/cris.md: Fix typos and thinkos in comments. + (splitter for mov_sideqi_mem, mov_sidehi_mem, mov_sidesi_mem): + Remove spurious mode specifier on operand 2. -Sun Feb 7 18:01:54 1999 Mumit Khan <khan@xraylith.wisc.edu> +2002-05-29 Ulrich Weigand <uweigand@de.ibm.com> - * configure.in (*-*-cygwin32*): Use config/mh-cygwin instead of - the old name config/mh-cygwin32. - Enable texinfo. + * config/s390/s390.c (legitimate_pic_operand_p): Do not + accept symbolic LARL operands. + (s390_emit_epilogue): Do not set FRAME_RELATED_P on + epilogue insns. -Thu Feb 4 20:43:25 1999 Ian Lance Taylor <ian@cygnus.com> +2002-05-28 Marc Espie <espie@openbsd.org> + * config/i386/openbsd.h (HAVE_GAS_MAX_SKIP_P2ALIGN): Remove, + inherited from gas.h. + (ASM_QUAD): Undef. OpenBSD does not support it. - * configure.in: Do build ld for ix86 Solaris. +2002-05-28 Danny Smith <dannysmith@users.sourceforge.net> -Tue Feb 2 19:46:40 1999 Jim Wilson <wilson@cygnus.com> + * doc/install.texi (binaries): Change mingw binaries + link to www.mingw.org. - * Makefile.in (EXTRA_GCC_FLAGS): Set AR to $AR instead of - $AR_FOR_TARGET. Likewise for RANLIB. +2002-05-28 Richard Henderson <rth@redhat.com> -Tue Feb 2 20:05:05 1999 Catherine Moore <clm@cygnus.com> + * config/i386/i386.c (ix86_compute_frame_layout): Do not add + bottom alignment for leaf functions. - * config.sub (oabi): Recognize. - * configure.in (arm-*-oabi): Handle. +Mon May 27 10:37:28 CEST 2002 Jan Hubicka <jh@suse.cz> -Sat Jan 30 06:09:00 1999 Robert Lipe (robertlipe@usa.net) + * reload.c (find_valid_class): Accept new argument DEST, + choose class accordingly. + (push_reload): Update callers. - * config.guess: Improve detection of i686 on UnixWare 7. +2002-05-26 Richard Henderson <rth@redhat.com> -Sat Jan 30 08:04:00 1999 Mumit Khan <khan@xraylith.wisc.edu> + 2002-05-25 Richard Henderson <rth@redhat.com> + * c-pragma.c (apply_pragma_weak): Convert value identifier to + string for decl_attributes. + (handle_pragma_weak): Call assemble_alias if we're modifying + an existing decl. - * config.guess: Add support for i386-pc-interix. - * config.sub: Likewise. - * configure.in: Likewise. - * config/mh-interix: New file. + 2002-05-15 Richard Henderson <rth@redhat.com> + * varasm.c (merge_weak): Remove special case for extern and common. -Mon Jan 18 13:59:20 1999 Christopher Faylor <cgf@cygnus.com> + 2002-05-15 Richard Henderson <rth@redhat.com> + * varasm.c (merge_weak): Error for any weakening after definition. + Adjust weakening after use warning to catch more cases. + (assemble_alias): Set TREE_USED and TREE_ASM_WRITTEN consistently. + * config/alpha/alpha.c (alpha_encode_section_info): Do not abort. - * Makefile.in: Remove unneeded all-target-libio from - from all-target-winsup target since it is now unneeded. - Add all-target-libtermcap in its place since it is now + 2002-03-02 Richard Henderson <rth@redhat.com> + * attribs.c (handle_alias_attribute): Don't call assemble_alias. + * toplev.c (rest_of_decl_compilation): Invoke assemble_alias when needed. -Wed Dec 30 20:34:52 1998 Christopher Faylor <cgf@cygnus.com> - - * configure.in: makefile stub for cygwin target is probably - unnecessary. Remove it for now. - * config/mt-cygwin: Remove. - -Wed Dec 30 01:13:03 1998 Christopher Faylor <cgf@cygnus.com> - - * configure.in: libtermcap.a should be built when cygwin is the - target as well as the host. - * config.guess: Allow mixed case in cygwin uname output. - * Makefile.in: Add libtermcap target. - * config/mt-cygwin: New file. libtermcap target info. - -Wed Dec 23 00:20:50 1998 Jeffrey A Law (law@cygnus.com) - - * config.sub: Clean up handling of hppa2.0. - -Tue Dec 22 23:56:31 1998 Rodney Brown (rodneybrown@pmsc.com) - - * config.guess: Use C code to identify more HP machines. - -Thu Dec 17 01:22:30 1998 Jeffrey A Law (law@cygnus.com) - - * config.sub: Handle hppa2.0. - -Tue Dec 15 17:02:58 1998 Bob Manson <manson@charmed.cygnus.com> - - * configure.in: Add cygmon for x86-coff and x86-elf. Configure - cygmon for all sparclite targets, regardless of object format. - -1998-12-15 Mark Salter <msalter@cygnus.com> - - * configure.in: Added target-bsp for several target architectures. - - * Makefile.in: Added rules for bsp. - -Fri Dec 4 01:34:02 1998 Jeffrey A Law (law@cygnus.com) - - * config.guess: Improve detection of hppa2.0 processors. - -Fri Dec 4 01:33:05 1998 Niall Smart <nialls@euristix.ie> - - * config.guess: Recognize FreeBSD using ELF automatically. - -1998-11-26 Manfred Hollstein <manfred@s-direktnet.de> - - * configure (skip-this-dir): Add handling for new shell script, which - might be created by a sub-directory's configure to indicate, this particular - directory is "unwanted". - * Makefile.in ($(CONFIGURE_TARGET_MODULES)): Likewise. - -Wed Nov 18 18:28:45 1998 Geoffrey Noer <noer@cygnus.com> - - * ltconfig: import from libtool, after changing libtool to - account for the cygwin name change. - -Wed Nov 18 18:09:14 1998 Geoffrey Noer <noer@cygnus.com> - - * Makefile.in: CC_FOR_TARGET and CXX_FOR_TARGET should also - include newlib/libc/sys/cygwin and newlib/libc/sys/cygwin32. - -Wed Nov 18 20:13:29 1998 Christopher Faylor <cgf@cygnus.com> - - * configure.in: Add libtermcap to list of cygwin dependencies. - -Tue Nov 17 16:57:51 1998 Geoffrey Noer <noer@cygnus.com> - - * Makefile.in: modify CC_FOR_TARGET and CXX_FOR_TARGET so that - they include winsup/include when it's a cygwin target. - -1998-11-12 Tom Tromey <tromey@cygnus.com> - - * configure.in (host_tools): Added zip. - * Makefile.in (all-target-libjava): Depend on all-zip. - (all-zip): New target. - (ALL_MODULES): Added all-zip. - (NATIVE_CHECK_MODULES): Added check-zip. - (INSTALL_MODULES): Added install-zip. - (CLEAN_MODULES): Added clean-zip. - -Thu Nov 12 17:27:21 1998 Geoffrey Noer <noer@cygnus.com> - - * Makefile.in: lose "32" from comment about cygwin. - -Thu Nov 5 15:00:31 1998 Nick Clifton <nickc@cygnus.com> - - * configure.in: Use -Os to build target libraries for the fr30. - -Wed Nov 4 18:49:43 1998 Dave Brolley <brolley@cygnus.com> - - * config.sub: Add fr30. - -Mon Nov 2 15:19:33 1998 Geoffrey Noer <noer@cygnus.com> - - * configure.in: drop "32" from config/mh-cygwin32. Check - cygwin* instead of cygwin32*. - * config.sub: Check cygwin* instead of cygwin32*. - -Thu Oct 22 10:55:25 1998 Robert Lipe <robertl@dgii.com> - - * config.guess: Match any version of Unixware7. - -1998-10-20 Syd Polk <spolk@cygnus.com> - - * Makefile.in configure.in: Add the ability to use tcl8.1 and tk8.1 - if desired. - -Sun Oct 18 18:34:50 1998 Jeffrey A Law (law@cygnus.com) - - * config.if (cxx_interface, libstdcxx_interface): Do not try to set - these if the appropriate directories and files to not exist. - -Wed Oct 14 10:29:06 1998 Jeffrey A Law (law@cygnus.com) - - * Makefile.in (DEVO_SUPPORT): Add config.if. - -Tue Oct 13 15:45:36 1998 Manfred Hollstein <manfred@s-direktnet.de> - - * configure: Add pattern to replace "build_tooldir"'s - definition in the generated Makefile with "tooldir"'s - actual value. - -Tue Oct 13 09:17:06 1998 Jeffrey A Law (law@cygnus.com) - - * config.sub: Bring back lost sparcv9. - - * Makefile.in (all-snvavigator): Remove all-flexlm dependency. - -Mon Oct 12 12:09:44 1998 Jeffrey A Law (law@cygnus.com) - - * Makefile.in (CHILL_FOR_TARGET): Mirror recent changes to - CC_FOR_TARGET and friends. - -Mon Oct 12 12:09:30 1998 Alexandre Oliva <oliva@dcc.unicamp.br> - - * Makefile.in (build_tooldir): New variable, same as tooldir. - (CC_FOR_TARGET, GCC_FOR_TARGET, CXX_FOR_TARGET): Add - -B$(build_tooldir)/bin/. - (BASE_FLAGS_TO_PASS): Pass build_tooldir down. - -Tue Sep 1 16:23:11 1998 Gerald Pfeifer <pfeifer@dbai.tuwien.ac.at> - - * README: Remove installation instructions and refer to the - INSTALL directory instead. - -Wed Sep 30 22:20:50 1998 Robert Lipe <robertl@dgii.com> - - * config.sub: Add support for i[34567]86-pc-udk. - * configure.in: Likewise. - -Wed Sep 30 19:23:48 1998 Geoffrey Noer <noer@cygnus.com> - - * Makefile.in: add bzip2 package building bits for user - tools module - * configure.in: ditto - -Wed Sep 30 03:00:05 1998 Jeffrey A Law (law@cygnus.com) - - * Makefile.in (TARGET_CONFIGDIRS): Add libobjc. - (ALL_TARGET_MODULES): Add all-target-libobjc. - (CONFIGURE_TARGET_MODULES, CHECK_TARGET_MODULES): Similarly. - (INSTALL_TARGET_MODULES, CLEAN_TARGET_MODULES): Similarly. - (all-target-libchill): Add dependencies. - * configure.in (target_libs): Add libchill. - -1998-09-30 Manfred Hollstein <manfred@s-direktnet.de> - - * configure.in (target_subdir): Remove duplicate line. - -Tue Sep 29 22:45:41 1998 Felix Lee <flee@cygnus.com> - - * Makefile.in (all-automake): fix dependencies. - -Mon Sep 28 04:04:27 1998 Jeffrey A Law (law@cygnus.com) - - * configure.in: Minor cleanups for building in the $(target_alias) - subdir. - -1998-09-22 Jim Wilson <wilson@cygnus.com> - - * Makefile.in (bootstrap): Set r and s before make all. Use - BASE_FLAGS_TO_PASS in make all. - (cross): Likewise. - -1998-09-20 Mark Mitchell <mark@markmitchell.com> - - * Makefile.in (bootstrap): Pass TARGET_FLAGS_TO_PASS to `make all'. - -Sun Sep 20 00:13:02 1998 Richard Henderson <rth@cygnus.com> - - * config.sub: Fix typo in last change. - -1998-09-19 Michael Hayes <m.hayes@elec.canterbury.ac.nz> - - * config.sub: Add support for C4x target. - * configure.in: Likewise. - -1998-09-13 David S. Miller <davem@pierdol.cobaltmicro.com> - - * config.sub: Recognize sparcv9 just like sparc64. - -Wed Sep 9 15:44:52 1998 Robert Lipe <robertl@dgii.com> - - * config.guess: Match "Pent II" or "PentII" for OpenServer. - -Tue Sep 8 01:18:39 1998 Jeffrey A Law (law@cygnus.com) - - * config.guess: Correctly identify Pentium II sco boxes. - - * config.guess: Fix "tr" code. From Weiwen Liu. - -Sat Sep 5 13:56:52 1998 John Hughes <john@Calva.COM> - - * configure.in: Do not assume x86-svr4 or x86-unixware can handle - stabs. - -Sat Sep 5 02:12:02 1998 Jeffrey A Law (law@cygnus.com) - - * Makefile.in (TARGET_CONFIGDIRS): Add libchill. - (ALL_TARGET_MODULES): Add all-target-libchill. - (CONFIGURE_TARGET_MODULES, CHECK_TARGET_MODULES): Similarly. - (INSTALL_TARGET_MODULES, CLEAN_TARGET_MODULES): Similarly. - (all-target-libchill): Add dependencies. - * configure.in (target_libs): Add libchill. - -Sun Aug 30 22:27:02 1998 Lutz Wohlrab <lutz.wohlrab@informatik.tu-chemnitz.de> - - * config.guess: Avoid assumptions about "tr" behaves when - LANG is set to something other than English. - -Sun Aug 30 22:14:44 1998 H.J. Lu (hjl@gnu.org) - - * configure (gxx_include_dir): Changed to - '${prefix}/include/g++'-${libstdcxx_interface}. - - * config.if: New to determine the interfaces. - -Sun Aug 30 21:15:19 1998 Mark Klein (mklein@dis.com) - - * config.guess: Detect and handle MPE/IX. - * config.sub: Deal with MPE/IX. - -Sat Aug 29 14:32:55 1998 David Edelsohn <edelsohn@mhpcc.edu> - - * configure.in: Use mh-aix43. - -1998-07-29 Manfred Hollstein <manfred@s-direktnet.de> - - * configure: Fix --without/--disable cases for gxx-include-dir. - -Fri Aug 28 12:28:26 1998 Per Bothner <bothner@cygnus.com> - - * mdata-sh: Imported. Needed for automake support. - -Thu Aug 13 12:49:29 1998 H.J. Lu <hjl@gnu.org> - - * Makefile.in (taz): Try "chmod -R og=u ." before - "chmod og=u `find . -print`". - -Fri Jul 31 09:38:33 1998 Catherine Moore <clm@cygnus.com> - - * configure.in: Add arm-elf and thumb-elf support. - -Mon Jul 27 16:23:58 1998 Doug Evans <devans@canuck.cygnus.com> - - * Makefile.in: Undo previous patch. - -Fri Jul 24 19:55:24 1998 Doug Evans <devans@canuck.cygnus.com> - - * Makefile.in (INSTALL_TARGET): Move EXTRA_TARGET_HOST_INSTALL_MODULES - to here ... - (install-no-fixedincludes): and here - (INSTALL_MODULES): ... from here. - -Fri Jul 24 17:01:42 1998 Ian Lance Taylor <ian@cygnus.com> - - * config.sub: Merge with FSF. - - * config.guess: Merge with FSF. - -Fri Jul 24 08:43:36 1998 Doug Evans <devans@canuck.cygnus.com> - - * configure (extraconfigdirs): New variable. - (SUBDIRS): Add extraconfigdirs and recurse on them too. - * Makefile.in (all): Move higher in file. - (EXTRA_TARGET_HOST_ALL_MODULES): New variable. - (EXTRA_TARGET_HOST_{INSTALL,CHECK}_MODULES): New variables. - (ALL_MODULES): Add EXTRA_TARGET_HOST_ALL_MODULES. - (CROSS_CHECK_MODULES): Add EXTRA_TARGET_HOST_CHECK_MODULES. - (INSTALL_MODULES): Add EXTRA_TARGET_HOST_INSTALL_MODULES. - -1998-07-23 Brendan Kehoe <brendan@cygnus.com> - - * Makefile.in (all-target-libjava): Depend on all-gcc and - all-target-newlib. - (configure-target-libjava): Depend on $(ALL_GCC). - -Sat Jul 18 14:32:43 CDT 1998 Robert Lipe <robertl@dgii.com> - - * config.guess: (*-pc-sco3.2v5) Add detection for Pentium II. - (*-pc-unixware7) Add detection for Pentium II, Pentium Pro. - -Sun Jul 19 00:46:53 CEST 1998 Marc Lehmann <pcg@goof.com> - - * INSTALL/README: Fix typo. - -Fri Jul 17 13:30:18 1998 Ian Lance Taylor <ian@cygnus.com> - - * ylwrap: Change absolute path checks to check for DOS style path - names. - - * ylwrap: Don't use a full path name if the source file is in the - same directory. From hjl@lucon.org (H.J. Lu). - - * config-ml.in: Default to being verbose, to match Feb 18 change to - configure. - -Thu Jul 16 12:29:51 1998 Ian Lance Taylor <ian@cygnus.com> - - Brought over from egcs: - - Sat Jun 27 22:46:32 1998 Jeffrey A Law (law@cygnus.com) - - * configure.in (target_subdir): Set to ${target_alias} instead - of "libraries". - - Mon Sep 1 16:45:44 1997 Jim Wilson <wilson@cygnus.com> - - * configure.in (target_subdir): Set to libraries if enable_multilib. - -Wed Jul 15 01:00:54 1998 Ian Lance Taylor <ian@cygnus.com> - - * Makefile.in ($(CONFIGURE_TARGET_MODULES)): If there are any - multilibs, force reconfiguration the first time we create - multilib.out in a subdirectory, in case TARGET_SUBDIR is `.'. - -Tue Jul 14 23:41:03 1998 Ian Lance Taylor <ian@cygnus.com> - - * configure.in: Strip any --no option from CONFIG_ARGUMENTS, to - avoid confusion with --no-recursion. - -Tue Jul 14 15:37:41 1998 Geoffrey Noer <noer@cygnus.com> - - * configure.in: Win32 hosts shouldn't use install -x - * install-sh: remove -x option, and special .exe-handling - hack. - -Tue Jul 14 15:28:41 1998 Richard Henderson <rth@cygnus.com> - - * config.guess: Recognize i586-pc-beos. - * configure.in: Don't build some bits for beos. - -Tue Jul 14 13:22:18 1998 Ian Lance Taylor <ian@cygnus.com> - - * configure: If CC is set but CFLAGS is not, and CC is gcc, make - CFLAGS default to -O2. - - * ltmain.sh: Add some hacks to make SunOS --enable-shared work - when using GNU ld. - -Fri Jul 10 13:18:23 1998 Ian Lance Taylor <ian@cygnus.com> - - * ltmain.sh: Correct install when using a different shell. - -Tue Jul 7 15:24:38 1998 Ian Lance Taylor <ian@cygnus.com> - - * ltconfig, ltmain.sh: Update to libtool 1.2b. - -Thu Jul 2 13:57:36 1998 Klaus Kaempf <kkaempf@rmi.de> - - * makefile.vms: Update to build binutils/makefile.vms. Add install - target. - -Wed Jul 1 16:45:21 1998 Ian Lance Taylor <ian@cygnus.com> - - * ltconfig: Update to correct AIX handling. - -Sat Jun 27 22:46:32 1998 Jeffrey A Law (law@cygnus.com) - - * Makefile.in (BASE_FLAGS_TO_PASS): Add TARGET_SUBDIR. - - * configure.in (target_subdir): Set to ${target_alias} instead - of "libraries". - -1998-06-26 Manfred Hollstein <manfred@s-direktnet.de> - - * Makefile.in (BASE_FLAGS_TO_PASS): Add gcc_version_trigger. - (Makefile): Depend on $(gcc_version_trigger). - - * configure (gcc_version): Change default initializer to empty - string. - (gcc_version_trigger): New variable; pass this variable down - to subdir configures to enable them checking gcc's version - themselves. Emit make macros for both gcc_version vars. - (topsrcdir): Initialize reliably. - (recursion line): Remove --with-gcc-version=${gcc_version}. - -1998-06-24 Manfred Hollstein <manfred@s-direktnet.de> - - * configure (enable_version_specific_runtime_libs): Implement new flag - --enable-version-specific-runtime-libs which installs C++ runtime stuff - in $(libsubdir); emit definition in each generated Makefile. - (gxx_include_dir): Initialize depending on - $enable_version_specific_runtime_libs. - -1998-06-24 Manfred Hollstein <manfred@s-direktnet.de> - - * configure (gcc_version): Initialize properly depending on - how and where configure is started. - (recursion line): Pass a --with-gcc-version=${gcc_version} - to configures in subdirs. - -Wed Jun 24 16:01:59 1998 John Metzler <jmetzler@cygnus.com> - - * configure.in (noconfigdirs): Add configure pattern for mips tx39 - cygmon - -Tue Jun 23 22:42:32 1998 Mark Alexander <marka@cygnus.com> - - * configure.in: Add cygmon and libstub support for mn10200. - -1998-06-19 Manfred Hollstein <manfred@s-direktnet.de> - - * configure (gcc_version): Add new variable describing the - particular gcc version we're building. - * Makefile.in (libsubdir): Add new macro for the directory - in which the compiler finds executables, libraries, etc. - (BASE_FLAGS_TO_PASS): Pass down gcc_version, target_alias - and libsubdir. - -Fri Jun 19 02:36:59 1998 Alexandre Oliva <oliva@dcc.unicamp.br> - - * Makefile.in (local-clean): Remove *.log. - (warning.log): Built with warn_summary from build.log. - (mail-report.log): Run test_summary. - (mail-report-with-warnings.log): Run test_summary including - warning.log in the report. +2002-05-26 Jakub Jelinek <jakub@redhat.com> -Thu Jun 18 11:26:03 1998 Robert Lipe <robertl@dgii.com> + * cse.c (fold_rtx): Don't optimize if SUBREG changes mode class. - * config.guess: Detection of Pentium II for *-sco-3.2v5*. +2002-05-25 Richard Henderson <rth@redhat.com> -Mon Jun 15 14:53:54 1998 Andrew Cagney <cagney@b1.cygnus.com> + PR target/6788 + * config/sparc/sparc.c (sparc_output_mi_thunk): New implementation + using rtl instead of fprintf. + * config/sparc/sparc.h (ASM_OUTPUT_MI_THUNK): Use it. + * config/sparc/sparc-protos.h: Update. - * Makefile.in (grep): Grep no longer depends on libiberty. +2002-05-25 Marek Michalkiewicz <marekm@amelek.gda.pl> -Fri Jun 12 14:03:34 1998 Syd Polk <spolk@cygnus.com> + * config/avr/avr.c (avr_handle_progmem_attribute): Handle TYPE_DECL. - * Makefile.in: all-snavigator needs all-libgui. + * config/avr/avr.c (machine_dependent_reorg): Sign extend the + CONST_INT operand to the correct mode after adding 1 to it. -Thu Jun 11 19:43:47 1998 Mark Alexander <marka@cygnus.com> +2002-05-24 Roman Lechtchinsky <rl@cs.tu-berlin.de> - * configure.in: Add cygmon and libstub support for mn10300. + * config/alpha/unicosmk.h (REAL_VALUE_TO_TARGET_SINGLE, + REAL_VALUE_TO_TARGET_DOUBLE): Define for native builds. -Wed Jun 10 11:19:47 1998 Ian Lance Taylor <ian@cygnus.com> +2002-05-24 Jakub Jelinek <jakub@redhat.com> - * missing: Update to version from automake 1.3. + PR other/6782 + * final.c (get_mem_expr_from_op): Return 0 if op is NULL. - * ltmain.sh: On installation, don't get confused if the same name - appears more than once in the list of library names. +2002-05-24 David Edelsohn <edelsohn@gnu.org> -Wed Jun 3 14:51:42 1998 Ian Lance Taylor <ian@cygnus.com> + * config/rs6000/aix43.h (LINK_SPEC): Add PE initializer. + (STARTFILE_SPEC): Delete PE crt0.o. + * config/rs6000/aix51.h: Same. + * config/rs6000/rs6000.h (ASM_WEAKEN_DECL): Append [DS] to + function descriptor symbol. Use RS6000_OUTPUT_BASENAME. + (ASM_OUTPUT_DEF_FROM_DECLS): Use RS6000_OUTPUT_BASENAME. + * config/rs6000/xcoff.h (ASM_OUTPUT_DEF): Define. - * config.sub: Accept m68060 and m5200 as CPU names. +2002-05-24 Richard Henderson <rth@redhat.com> -Mon Jun 1 17:25:16 1998 Ian Lance Taylor <ian@cygnus.com> + * varasm.c (asm_output_bss): Always output one byte. + * config/alpha/elf.h (ASM_OUTPUT_ALIGNED_LOCAL): Likewise. - * configure: Use && rather than using -a in test, because odd - strings can confuse test. - * configure.in: Likewise. +2002-05-24 Neil Booth <neil@daikokuya.demon.co.uk> -Thu May 28 19:31:13 1998 Ian Lance Taylor <ian@cygnus.com> + PR preprocessor/6780 + * cppmacro.c (enter_macro_context): Clear state.angled_headers. - * ltconfig, ltmain.sh: Bring in Visual C++ support. +2002-05-21 Richard Earnshaw <rearnsha@arm.com> -Sat May 23 23:44:13 1998 Alexandre Oliva <oliva@dcc.unicamp.br> + * bitmap.c (bitmap_find_bit): Return early if we have the correct + element cached. - * Makefile.in (boostrap2-lean, bootstrap3-lean, - bootstrap4-lean): New targets. +2002-05-24 Neil Booth <neil@daikokuya.demon.co.uk> -Mon May 11 23:55:56 1998 Jeffrey A Law (law@cygnus.com) + * cppinit.c (mark_named_operators): Split out from init_builtins. + (struct builtin): Remove operator. + (CPLUS, OPERATOR, O): Kill + (struct named_op): New. + (cpp_finish_options): Call it from here instead. + (init_builtins): Don't do named operators. - * mpw-* Delete. Not used. +2002-05-20 David S. Miller <davem@redhat.com> -Mon May 11 23:11:34 1998 Jeffrey A Law (law@cygnus.com) + * cselib.c (max_value_regs): New. + (cselib_lookup, cselib_invalidate_regno): Initialize it when + adding new entries to the REG_VALUES table and we are dealing with + a hard register. + (clear_table): Initialize it. + (cselib_invalidate_regno): Use it to determine which hard + registers to scan when mode is not VOIDmode. - * COPYING.LIB: Update FSF address. +2002-05-24 Alan Modra <amodra@bigpond.net.au> -Fri May 8 01:30:20 1998 Ian Lance Taylor <ian@cygnus.com> + * config/rs6000/rs6000.c (output_toc): Mask longs to 32 bits. - * ltconfig, ltmain.sh: Update to libtool 1.2a. +2002-05-23 Hans Boehm <Hans_Boehm@hp.com> + * config/ia64/linux.h (IA64_GATE_AREA_END): Adjust for 64K + pages. - * Makefile.in (GASB_SUPPORT_DIRS): Remove intl; already included via - GAS_SUPPORT_DIRS. +2002-05-23 Neil Booth <neil@daikokuya.demon.co.uk> -Thu May 7 17:27:35 1998 Ian Lance Taylor <ian@cygnus.com> + PR preprocessor/6517 + * Makefile.in: Update. + * c-common.c (c_common_post_options): Add preprocessor + errors to the error count. + * c-lang.c (c_post_options): Kill. + (LANG_HOOKS_POST_OPTIONS): Use c_common_post_options. + * hooks.h: Add header guards. + * langhooks-def.h: Include hooks.h. + (LANG_HOOKS_POST_OPTIONS): Update. + * langhooks.h (struct lang_hooks): Update post_options. + * toplev.c (parse_options_and_default_flags): Update. +objc: + * objc-lang.c (objc_post_options): Kill. + (LANG_HOOKS_POST_OPTIONS): Use c_common_post_options. - * ltconfig, ltmain.sh: Avoid producing a version number if - -version-info was not used. +2002-05-23 Jakub Jelinek <jakub@redhat.com> -Tue May 5 18:02:24 1998 Ian Lance Taylor <ian@cygnus.com> + PR target/6753 + * config/i386/i386.md (sse_movdfcc, sse_movdfcc_eq): Use Y instead + of x in constraints for clarity. + (sse_mov?fcc split): abort if op2 == op3. + (sse_movsfcc_const0_1, sse_movsfcc_const0_2, sse_movsfcc_const0_3, + sse_movsfcc_const0_4): Add earlyclobber. + (sse_movdfcc_const0_1, sse_movdfcc_const0_2, sse_movdfcc_const0_3, + sse_movdfcc_const0_4): Likewise. Use DFmode, not SFmode. + Use Y instead of x in constraints. - * configure.in: Add --with-newlib to CONFIG_ARGUMENTS if we are - building with newlib. +2002-05-23 Jakub Jelinek <jakub@redhat.com> -1998-04-30 Paul Eggert <eggert@twinsun.com> + PR c/6643 + * emit-rtl.c (widen_memory_access): Only call compare_tree_int + if DECL_SIZE_UNIT is INTEGER_CST. - * Makefile.in (EXTRA_GCC_FLAGS): Remove backslash at end; - Solaris `make' causes it to continue to next definition. +2002-05-23 Jakub Jelinek <jakub@redhat.com> -Tue Apr 28 16:24:24 1998 Jason Molenda (crash@bugshack.cygnus.com) + * combine.c (force_to_mode): Use gen_int_mode. + Don't clear CONST_INT bits outside of mode. - * Makefile.in (install-gdbtk): Call this 'install-gdb' so that - the right GUI libraries and files are installed along with GDB. +2002-05-23 Jakub Jelinek <jakub@redhat.com> -Tue Apr 28 18:11:24 1998 Ian Lance Taylor <ian@cygnus.com> + * configure.in: Fix as version test for binutils 2.12.1 releases + (without dates). + * configure: Rebuilt. - * configure.in: Change alpha to alpha* in several places. +Wed May 22 14:16:07 CEST 2002 Jan Hubicka <jh@suse.cz> -Tue Apr 28 07:42:00 1998 Mark Alexander <marka@cygnus.com> + * i386.c (expand_movstr, expand_clrstr): Fix inline-all-stringops + sequence. + (ix86_expand_clrstr): Fix typo. - * config.sub: Recognize sparc86x. +2002-05-22 Duraid Madina <duraid@fl.net.au> -Tue Apr 28 07:35:02 1998 Michael Meissner <meissner@cygnus.com> + * tradcpp.c (fixup_newlines): Use old-style function header. - * configure.in (--enable-target-optspace): Remove debug echo. +2002-05-21 Richard Henderson <rth@redhat.com> -Thu Apr 23 21:31:16 1998 Jim Wilson <wilson@cygnus.com> + * system.h (BLOCK_PROFILER, BLOCK_PROFILER_CODE, + FUNCTION_BLOCK_PROFILER, FUNCTION_BLOCK_PROFILER_EXIT, + MACHINE_STATE_SAVE, MACHINE_STATE_RESTORE): Poison. - * configure: Set CXXFLAGS from CXXFLAGS, not CFLAGS. + * toplev.c (display_help): Kill -a -ax help. -Thu Apr 23 12:26:38 1998 Ian Lance Taylor <ian@cygnus.com> + * config/1750a/1750a.h, config/alpha/alpha.h, + config/clipper/clipper.h, config/dsp16xx/dsp16xx.h, + config/h8300/h8300.h, config/i960/i960.h, config/m68k/tower-as.h, + config/m88k/m88k.h, config/vax/vax.h, config/we32k/we32k.h: + (FUNCTION_BLOCK_PROFILER, BLOCK_PROFILER): Kill. - * ltconfig: Update cygwin32 support. + * libgcc2.c [L_bb] (BLOCK_PROFILER_CODE): Kill. + * config/m68k/sun3.h (BLOCK_PROFILER_CODE): Kill. - * Makefile.in (GAS_SUPPORT_DIRS): Add intl. - (BINUTILS_SUPPORT_DIRS, GASB_SUPPORT_DIRS): Likewise. - (GDB_SUPPORT_DIRS): Likewise. + * config/i386/i386-protos.h (ix86_output_block_profiler): Kill. + (ix86_output_function_block_profiler): Kill. + * config/m68hc11/m68hc11.c (m68hc11_block_profiler): Kill. + (m68hc11_function_block_profiler): Kill. + * config/m68hc11/m68hc11-protos.h: Update. + * config/m88k/m88k.c (output_block_profiler): Kill. + (output_function_block_profiler): Kill. + * config/m88k/m88k-protos.h: Update. -Wed Apr 22 12:30:10 1998 Michael Meissner <meissner@cygnus.com> +2002-05-21 NIIBE Yutaka <gniibe@m17n.org> - * configure.in (target_makefile_frag): If --enable-target-optspace, - use -Os to compile target libraries rather than -O2. Default to - using -Os for d10v and m32r if --{enable,disable}-target-optspace is - not used. - * configure.in (target_cflags): Ditto for d30v. + * reload1.c (do_output_reload): Run delete_output_reload + only if optimizing. -Tue Apr 21 23:06:54 1998 Tom Tromey <tromey@cygnus.com> +2002-05-20 Richard Henderson <rth@redhat.com> - * Makefile.in (all-bfd): Depend on all-intl. - (all-binutils): Likewise. - (all-gas): Likewise. - (all-gprof): Likewise. - (all-ld): Likewise. + * cse.c (canon_hash): Reorder do_not_record test. Always + allow pic_offset_table_rtx. -1998-04-19 Brendan Kehoe <brendan@cygnus.com> +2002-05-19 Neil Booth <neil@daikokuya.demon.co.uk> - * configure.in (host_tools): Fix typo, lbtool -> libtool. + * doc/contrib.texi: Update my entry. -Fri Apr 17 16:20:42 1998 Ian Lance Taylor <ian@cygnus.com> +2002-05-19 Kaveh R. Ghazi <ghazi@caip.rutgers.edu> - * Makefile.in (all-bfd): Depend upon all-libiberty. + * mips/iris6.h (CPLUSPLUS_CPP_SPEC): Define. - * ltconfig, ltmain.sh: Bring in newer cygwin32 support. +2002-05-19 Marek Michalkiewicz <marekm@amelek.gda.pl> -Fri Apr 17 12:22:22 1998 Bob Manson <manson@charmed.cygnus.com> + 2002-02-28 Marek Michalkiewicz <marekm@amelek.gda.pl> + * config/avr/avr.c (avr_hard_regno_mode_ok): Do not allow r29 + which may overwrite the high byte of the frame pointer. - * Makefile.in: Add libstub. +2002-03-19 Lars Brinkhoff <lars@nocrew.org> - * configure.in: Ditto. Build libstub for targets that have cygmon - support. + * emit-rtl.c (gen_int_mode): New function. + * rtl.h: Prototype for it. -Tue Apr 14 18:01:55 1998 Ian Lance Taylor <ian@cygnus.com> +Sat May 18 23:09:19 CEST 2002 Jan Hubicka <jh@suse.cz> - * configure.in: Don't set PICFLAG on ix86-cygwin32. + * i386.md (pushqi2, ashrqi_*): Fix constraint. -Tue Apr 14 12:24:45 1998 J. Kean Johnston <jkj@sco.com> +2002-05-18 Aldy Hernandez <aldyh@redhat.com> - * configure.in: Recognise i[3456]96-*-sysv5* as a valid host, and - use mh-sysv5 if specified. Support gprof on SCO Open Server. + * config/rs6000/altivec.h: Cleanups. -Tue Apr 14 11:33:51 1998 Krister Walfridsson <cato@df.lth.se> +2002-05-17 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE> - * configure: Define DEFAULT_M4 by searching PATH. - * Makfile.in: Use DEFAULT_M4. + * doc/install.texi (Specific, mips-sgi-irix6): Document need to + bootstrap with -mips3. -Mon Apr 13 15:37:24 1998 Ian Lance Taylor <ian@cygnus.com> +2002-05-17 David S. Miller <davem@redhat.com> - * ltconfig: Add cygwin32 support. + PR c/6689, PR optimization/6615 + * local-alloc.c (struct equivalence): Rename 'src' to 'src_p' + and make it a pointer to rtx. Update comments. + (update_equiv_regs): When scanning for equivalences, record + address of SET_SRC (set) in reg_equiv[].src_p. Dereference + it while making the equiv replacements. - * Makefile.in, configure.in: Add libtool as a native only directory - to configure and build. +2002-05-17 Kurt Wall <kwall@kurtwerks.com> -Sun Apr 12 20:58:46 1998 Jeffrey A Law (law@cygnus.com) + * doc/install.texi (Testing): Mention two common DejaGnu warnings + that can be ignored. - * Makefile.in (INSTALL_MODULES): Remove texinfo. +2002-05-16 Gerald Pfeifer <pfeifer@dbai.tuwien.ac.at> -Wed Apr 8 13:18:56 1998 Philippe De Muyter <phdm@macqel.be> + * doc/install.texi (Final install): Recommend to install into a + "clean" target directory. - * Makefile.in (EXTRA_GCC_FLAGS): XFOO lines shortened. +2002-05-17 Andreas Schwab <schwab@suse.de> -Thu Apr 2 14:48:44 1998 Geoffrey Noer <noer@cygnus.com> + * config/ia64/sysv4.h (DO_SELECT_SECTION): Factored out of + SELECT_SECTION. + (UNIQUE_SECTION): Define to get small data correctly. - * Makefile.in: add ash make rules - * configure.in: add ash to native_only and host_tools lists + * varasm.c (resolve_unique_section): Add third parameter + flag_function_or_data_sections and use it instead of + flag_function_sections. + (assemble_start_function): Pass flag_function_sections. + (asm_emit_uninitialised): Pass flag_data_sections. + (assemble_variable): Likewise. -Thu Mar 26 12:53:20 1998 Tom Tromey <tromey@cygnus.com> +2002-05-15 Eric Botcazou <ebotcazou@multimania.com> - * Makefile.in (all-gettext, all-intl): New targets. - (ALL_MODULES): Added all-gettext, all-intl. - (CROSS_CHECK_MODULES): Added check-gettext, check-intl. - (INSTALL_MODULES): Added install-gettext, install-intl. - (CLEAN_MODULES): Added clean-gettext, clean-intl. + * fold-const.c (fold) [LT_EXPR]: Move the transformation of a + comparison against the highest or lowest integer value before + the 'X >= CST to X > (CST - 1)' and 'X < CST to X <= (CST - 1)' + transformation and that of an unsigned comparison against 0 + right after. - * configure.in (host_tools): Added gettext. - (native_only): Likewise. - (noconfigdirs) [various cases]: Likewise. - (host_libs): Added intl. +2002-05-16 Richard Henderson <rth@redhat.com> -Thu Mar 26 15:00:11 1998 Keith Seitz <keiths@onions.cygnus.com> + PR c/3467 + * c-decl.c (grokdeclarator): Don't pedwarn variable sized arrays + for c99. - * configure: Do not disable building gdbtk for cygwin32 hosts. +2002-05-16 Mark Mitchell <mark@codesourcery.com> -Wed Mar 25 10:04:18 1998 Nick Clifton <nickc@cygnus.com> + * cfgrtl.c (purge_dead_edges): Correct handling of EDGE_EH. - * configure.in: Add thumb-coff target. - * config.sub: Add thumb-coff target. +2002-05-09 David S. Miller <davem@redhat.com> -Wed Mar 25 11:49:12 1998 Jason Molenda (crash@bugshack.cygnus.com) + * config/sparc/sol2.h (ASM_CPU_SPEC): Handle -mcpu=v9. - * Makefile.in: Revert yesterday's change. - (all-target-winsup): all-target-librx stays out of here. +2002-05-07 David S. Miller <davem@redhat.com> -Tue Mar 24 16:58:29 1998 Jason Molenda (crash@bugshack.cygnus.com) + PR target/6103 + * config/sparc/sparc.h (TARGET_BUGGY_QP_LIB): Define to zero. + * config/sparc/sol2.h (TARGET_BUGGY_QP_LIB): Override to one. + * config/sparc/sparc.c (emit_soft_tfmode_libcall): If the Qp + library implementation clobbers the output before the inputs + are fully consumed, use stack temporary for the output. - * Makefile.in (TARGET_CONFIGDIRS, ALL_TARGET_MODULES, - CONFIGURE_TARGET_MODULES, CHECK_TARGET_MODULES, - INSTALL_TARGET_MODULES, CLEAN_TARGET_MODULES, all-target-winsup): - Remove references to librx and libg++. +Wed May 15 10:38:27 CEST 2002 Jan Hubicka <jh@suse.cz> -Tue Mar 24 18:28:12 1998 Eric Mumpower <nocturne@cygnus.com> + * invoke.texi (-malign-double): Re-add lost warning. - * Makefile.in (BASE_FLAGS_TO_PASS): Pass $(lispdir) down to - recursive makes +2002-05-14 Gerald Pfeifer <pfeifer@dbai.tuwien.ac.at> -Tue Mar 24 11:37:45 1998 Ian Lance Taylor <ian@cygnus.com> + * doc/install.texi: Remove special markup originally required for + HTML generation with texi2html. - * Makefile.in (CC_FOR_TARGET): Use $(TARGET_SUBDIR) when passing -B - for newlib directory. - (CXX_FOR_TARGET): Likewise. +2002-05-14 Gerald Pfeifer <pfeifer@dbai.tuwien.ac.at> -Mon Mar 23 11:30:21 1998 Jeffrey A Law (law@cygnus.com) + * doc/install.texi (Specific, *-*-solaris2*): Update passus on + setting CONFIG_SHELL to /bin/ksh and remove alternate trick to + (possibly) work around broken /bin/sh. - * ltconfig: Update after libtool/ltconfig.in change for - hpux11. +2002-05-08 Jason Merrill <jason@redhat.com> -Fri Mar 20 18:51:43 1998 Ian Lance Taylor <ian@cygnus.com> + PR c++/6381 + * dwarf2out.c (rtl_for_decl_location): Only expand INTEGER_CST and + REAL_CST. - * ltconfig, ltmain.sh: Update to libtool 1.2. - -Fri Mar 20 09:32:14 1998 Manfred Hollstein <manfred@s-direktnet.de> - - * Makefile.in (install-gcc): Don't specify LANGUAGES here. - (install-gcc-cross): Instead, override LANGUAGES here. - -1998-03-18 Dave Love <d.love@dl.ac.uk> - - * Makefile.in ($(CONFIGURE_TARGET_MODULES)): Set CONFIG_SITE to a - non-existent file since /dev/null loses with bash 2.0/autoconf 2.12. - -Wed Mar 18 09:24:59 1998 Nick Clifton <nickc@cygnus.com> - - * configure.in: Add Thumb-pe target. - -Tue Mar 17 16:59:00 1998 Syd Polk <spolk@cygnus.com> - - * Makefile.in - changed sn targets to snavigator - * configure.in - changed sn targets to snavigator - -Tue Mar 17 10:33:28 1998 Manfred Hollstein <manfred@s-direktnet.de> - - * config-ml.in: After building symlink tree call make distclean - if a Makefile got linked into ${ml_dir}/${ml_libdir}; this happens - to be the case for libiberty. - -Tue Mar 17 10:22:37 1998 H.J. Lu (hjl@gnu.ai.mit.edu) - - * configure: When making link, also check the current - directory. The configure scripts may create one. - -Fri Mar 6 01:02:03 1998 Richard Henderson <rth@cygnus.com> - - * config.sub: Accept alphapca56 and alphaev6 properly. - -Fri Mar 6 00:14:55 1998 Franz Sirl <Franz.Sirl-kernel@lauterbach.com> - - * configure.in: Revert 3 Jan change for powerpc-linux-gnulibc1. - -Mon Feb 23 15:09:18 1998 Bruno Haible <bruno@linuix.mathematik.uni-karlsruhe.de - - * config.sub (sco5): Fix typo. - -Mon Feb 23 14:46:06 1998 Ian Lance Taylor <ian@cygnus.com> - - * Makefile.in (INSTALL_MODULES): Move install-tcl before - install-itcl. - (install-itcl): Remove dependency on install-tcl. - -Mon Feb 23 09:53:28 1998 Mark Alexander <marka@cygnus.com> - - * configure.in: Remove libgloss from noconfigdirs for MN10300. - -Thu Feb 19 13:40:41 1998 Ian Lance Taylor <ian@cygnus.com> - - * configure.in: Don't build libgui for a cygwin32 target when not on - a cygwin32 host. - -Wed Feb 18 12:29:00 1998 Jason Molenda (crash@bugshack.cygnus.com) - - * configure (redirect): Set to null, so default behavior of - configure is now --verbose. - -1998-02-16 Dave Love <d.love@dl.ac.uk> - - * Makefile.in ($(CONFIGURE_TARGET_MODULES)): Run configure with - CONFIG_SITE=/dev/null to forestall lossage with site configuration. - -Mon Feb 16 12:23:53 1998 Manfred Hollstein <Manfred.Hollstein@ks.sel.alcatel.de> - - * Makefile.in (BASE_FLAGS_TO_PASS, EXTRA_TARGET_FLAGS): Really add - this change to sync Makefile.in with its ChangeLog entries. - -Thu Feb 12 15:03:08 1998 H.J. Lu <hjl@gnu.org> - - * ltmain.sh (mkdir): Check that the directory doesn't exist - before we exit with error, so that we don't get races during - parallel builds. - -Sat Feb 7 15:19:18 1998 Ian Lance Taylor <ian@cygnus.com> - - * ltconfig, ltmain.sh: Update from libtool 1.0i. - -Fri Feb 6 01:33:52 1998 Manfred Hollstein <manfred@s-direktnet.de> - - * Makefile.in (BASE_FLAGS_TO_PASS): Don't pass PICFLAG and - PICFLAG_FOR_TARGET. - (EXTRA_TARGET_FLAGS): Don't pass PICFLAG_FOR_TARGET. - - * configure: Emit a definition for the new macro enable_shared - into each Makefile. - - * config/mh-sparcpic (PICFLAG): Define to properly according - to current multilib configuration. - * config/mt-sparcpic (PICFLAG_FOR_TARGET): Define to properly - according to current multilib configuration. - -Thu Feb 5 17:01:12 1998 Jason Molenda (crash@bugshack.cygnus.com) - - * configure.in (host_tools, native_only): Add libtool. - -Wed Feb 4 16:53:58 1998 Geoffrey Noer <noer@cygnus.com> - - * configure.in: add target-gperf to noconfigdirs for Cygwin32. - Fix typo in ming config comment. - -Wed Feb 4 18:56:13 1998 Ian Lance Taylor <ian@cygnus.com> - - * ltconfig, ltmain.sh: Update from libtool 1.0h. - -Mon Feb 2 19:38:19 1998 Ian Lance Taylor <ian@cygnus.com> - - * config.sub: Add tic30 cases, and map c30 to tic30. - -Sun Feb 1 02:40:41 1998 Richard Henderson <rth@cygnus.com> - - * Makefile.in (TARGET_CONFIGDIRS): Add libf2c. - (ALL_TARGET_MODULES, CONFIGURE_TARGET_MODULES): Similarly - (CHECK_TARGET_MODULES, INSTALL_TARGET_MODULES): Similarly - (CLEAN_TARGET_MODULES): Similarly - (all-target-libf2c): Add dependences. - * configure.in (target_libs): Add libf2c. - -Fri Jan 30 17:18:32 1998 Geoffrey Noer <noer@cygnus.com> - - * configure.in: Remove expect from noconfigdirs when target - is cygwin32. OK to build expect and dejagnu with Canadian - Cross. - -Wed Jan 28 12:58:49 1998 Ian Lance Taylor <ian@cygnus.com> - - * configure.in: Do build expect, dejagnu, and cvssrc for a cygwin32 - host. - - * config.guess: Use ${UNAME_MACHINE} rather than i386 for cygwin32 - and mingw32. - -Wed Jan 28 10:26:37 1998 Manfred Hollstein <manfred@s-direktnet.de> - - * Makefile.in (BASE_FLAGS_TO_PASS): Remove passing $(local_prefix) - here as it is not defined in the toplevel Makefile. - -Tue Jan 27 23:25:06 1998 Manfred Hollstein <manfred@s-direktnet.de> - - * configure (package_makefile_rules_frag): New variable, which names - a file with generic rules, ... - Change comment to mention we now have FIVE parts. - * configure: Undo last change. - -Tue Jan 27 23:15:55 1998 Lassi A. Tuura <lat@iki.fi> - - * config.guess: More accurate determination of HP processor types. - * config.sub: More accurate determination of HP processor types. - -Sat Jan 24 01:59:45 1998 Manfred Hollstein <manfred@s-direktnet.de> - - * configure (package_makefile_frag): Move inserting the - ${package_makefile_frag} to where it should be according - to the comment. - -Fri Jan 23 00:29:28 1998 Philip Blundell <pb@nexus.co.uk> - - * config.guess: Add support for Linux/ARM. - -Thu Jan 22 15:14:01 1998 Fred Fish <fnf@cygnus.com> - - * .cvsignore: Remove *-info and *-install since they match - release-info and mpw-install, which we don't want to just ignore. - -Thu Jan 22 01:38:33 1998 Richard Henderson <rth@cygnus.com> - - * configure.in: Revert 3 Jan change for alpha-linux-gnulibc1. - -Sat Jan 17 21:28:08 1998 Pieter Nagel <pnagel@epiuse.co.za> - - * Makefile.in (FLAGS_TO_PASS): Pass down gcc_include_dir and - local_prefix to sub-make invocations. - -Sat Jan 17 21:04:59 1998 H.J. Lu (hjl@gnu.org) - - * configure.in: Check makefile fragments in the source - directory. - -Fri Jan 16 00:41:37 1998 Alexandre Oliva <oliva@dcc.unicamp.br> - - * configure.in: Check whether host and target makefile - fragments exist before adding them to *_makefile_frag. - -Wed Jan 14 23:39:10 1998 Bob Manson <manson@charmed.cygnus.com> - - * configure.in (target_configdirs): Add cygmon for sparc64-elf. - -Wed Jan 14 12:48:07 1998 Keith Seitz <keiths@pizza.cygnus.com> - - * configure.in: Make sure we only replace RPATH_ENVVAR on - lines which begin with RPATH_ENVVAR, i.e. add "^" to the - regexp to sed. - - * Makefile.in (BASE_FLAGS_TO_PASS): Pass RRPATH_ENVVAR down - to sub-makes. - -1998-01-13 Lee Iverson (leei@ai.sri.com) - - * config-ml.in (multi-do): LDFLAGS must include multilib - designator. - -Tue Jan 13 01:13:24 1998 Robert Lipe (robertl@dgii.com) - - * config.guess: Recognize i[3456]-i586-UnixWare7-sysv5. - -Sun Jan 4 01:06:55 1998 Mumit Khan <khan@xraylith.wisc.edu> - - * config.sub: Add mingw32 support. - * configure.in: Likewise. - * config/mh-mingw32: New file. - -Sat Jan 3 12:11:05 1998 Franz Sirl <franz.sirl-kernel@lauterbach.com> - - * configure.in: Finalize support for {alpha|powerpc}*-*-linux-gnulibc1 - -Sun Dec 28 11:28:58 1997 Jeffrey A Law (law@cygnus.com) - - * Makefile.in (INSTALL_TARGET): Do install-gcc first. - * configure (gxx_include_dir): Provide a definition for subdirs - which do not use autoconf. - -Wed Dec 24 22:46:55 1997 Jeffrey A Law (law@cygnus.com) - - * config.guess: Sync with egcs. Picks up new alpha support, - BeOS & some additional linux support. - -Tue Dec 23 12:44:24 1997 Jeffrey A Law (law@cygnus.com) - - * config.guess: HP 9000/803 is a PA1.1 machine. - -Mon Dec 22 02:39:24 1997 Richard Henderson <rth@cygnus.com> - - * configure.in: It's alpha*-... - -Sun Dec 21 16:53:12 1997 H.J. Lu (hjl@gnu.ai.mit.edu) - - * configure.in (host_makefile_frag, target_makefile_frag): - Handle multiple config files. - (alpha-*-linux*): Treat alpha-*-linux* as alpha-*-linux* and - alpha-*-*. - -Thu Dec 18 13:13:03 1997 Doug Evans <devans@canuck.cygnus.com> - - * mkdep: New file. - -Wed Dec 17 09:53:02 1997 Michael Meissner <meissner@cygnus.com> - - * configure.in (d30v-*-*): Allow configuring of libide, vmake, etc. - -Tue Dec 16 17:36:05 1997 Ian Lance Taylor <ian@cygnus.com> - - * Makefile.in: Add libgui directory. - (GDB_TK): Add all-libgui. - * configure.in: Add libgui directory. - * configure: Add all-libgui to GDB_TK. - -Mon Dec 15 16:12:28 1997 Nick Clifton <nickc@cygnus.com> - - * config-ml.in (multidirs): Add m32r to multilib list. - -Fri Dec 12 10:43:31 1997 Brendan Kehoe <brendan@canuck.cygnus.com> - - * Makefile.in (all-target-gperf): Change dependency to - all-target-libstdc++. - -Thu Dec 11 23:30:51 1997 Fred Fish <fnf@ninemoons.com> - - * config.guess: Add BeOS support. - -Wed Dec 10 15:10:38 1997 Ian Lance Taylor <ian@cygnus.com> - - Source directory cvs renamed to cvssrc: - * configure.in (host_tools): Change cvs to cvssrc. - (native_only): Likewise. - (noconfigdirs) [various cases]: Likewise. - * Makefile.in (ALL_MODULES): Change all-cvs to all-cvssrc. - (CROSS_CHECK_MODULES): Change check-cvs to check-cvssrc. - (INSTALL_MODULES): Change install-cvs to install-cvssrc. - (CLEAN_MODULES): Change clean-cvs to clean-cvssrc. - (all-cvssrc): Rename target from all-cvs. - -Wed Dec 3 07:55:59 1997 Jeffrey A Law (law@cygnus.com) - - * configure (gxx_include_dir): Fix thinko. - -Tue Dec 2 10:55:34 1997 Jeffrey A Law (law@cygnus.com) - - * Makefile.in (INSTALL_TARGET_CROSS): Define. - (install-cross, install-gcc-cross): New targets. - -Tue Dec 2 10:08:31 1997 Nick Clifton <nickc@cygnus.com> - - * configure.in (noconfigdirs): Add support for Thumb target. - - * config.sub (maybe_os): Add support for Thumb target. - -Sun Nov 30 16:12:27 1997 Bob Manson <manson@charmed.cygnus.com> - - * Makefile.in: Add rules for cygmon. - - * configure.in: Build cygmon for sparc-elf and sparclite-aout. - -Thu Nov 27 01:31:30 1997 Jeffrey A Law (law@cygnus.com) - - * Makefile.in (INSTALL_TARGET): Do install-gcc first. - * configure (gxx_include_dir): Provide a definition for subdirs - which do not use autoconf. - -Wed Nov 26 11:53:33 1997 Keith Seitz <keiths@onions.cygnus.com> - - * Makefile.in, configure, configure.in, ChangeLog: merge with foundry's - 11/18/97 build - -Wed Nov 26 16:08:50 1997 Jeffrey A Law (law@cygnus.com) - - * From Franz Sirl. - * config.guess (powerpc*-*-linux): Handle glibc2 beta release - found on RedHat Linux systems. - -Fri Nov 21 09:51:01 1997 Jeffrey A Law (law@cygnus.com) - - * config.guess (alpha stuff): Merge with FSF to avoid incorrect - guesses. - -Thu Nov 13 11:38:37 1997 Jeffrey A Law (law@cygnus.com) - - * configure.in (i[3456]86-ncr-sysv4.3*): Tweak. - -Mon Nov 10 15:23:21 1997 H.J. Lu <hjl@gnu.ai.mit.edu> - - * ltmain.sh: If mkdir fails, check whether the directory was created - anyhow by some other process. - -Mon Nov 10 14:38:03 1997 Michael Meissner <meissner@cygnus.com> - - * configure.in (d30v-*-*): Configure all directories. - -Sun Nov 9 17:36:20 1997 Michael Meissner <meissner@cygnus.com> - - * configure.in (d30v-*-*): Configure newlib, libiberty directories - for the D30V. - -Sat Nov 8 14:42:59 1997 Michael Meissner <meissner@cygnus.com> - - * configure.in (d30v-*-*): Configure target-libgloss on the D30V. - -Fri Nov 7 10:34:09 1997 Rob Savoye <rob@darkstar.cygnus.com> - - * include/libiberty.h: Add extern "C" { so it can be used with C++ - progrms. - * include/remote-sim.h: Add extern "C" { so it can be used with C++ - programs. - -Thu Oct 30 11:09:29 1997 Michael Meissner <meissner@cygnus.com> +2002-05-14 Release Manager - * configure.in (d30v-*-*): Configure GCC now. + * GCC 3.1 Released. -Mon Oct 27 13:17:24 1997 Stan Shebs <shebs@andros.cygnus.com> +2002-05-10 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE> - * configure.in: Remove a "second pass" of tweaking noconfigdirs, - is no longer needed. + * config/mips/t-iris6 (SHLIB_SLIBDIR_SUFFIXES): Use mabi=64 and + . as N64/N32 libgcc_s.so subdirs. -Mon Oct 27 12:03:53 1997 Jason Merrill <jason@yorick.cygnus.com> +2002-05-09 Mark Mitchell <mark@codesourcery.com> - * Makefile.in: check-target-libio depends on all-target-libstdc++. + * config/rs6000/rs6000.h: Revert previous patch. -Sun Oct 26 11:48:27 1997 Manfred Hollstein (manfred@s-direktnet.de) +2002-05-09 Joel Sherrill <joel@OARcorp.com> - * Makefile.in (bootstrap-lean): Combined with `normal' bootstrap - targets using "$@" to provide support for similar but not identical - targets without having to duplicate code. + * config/rs6000/rs6000.h CPP_CPU_SPEC): Correct + 403 and 405 arguments for binutils 2.12. -Mon Oct 20 15:28:49 1997 Klaus K"ampf <kkaempf@progis.de> +Thu May 9 12:21:48 2002 Jeffrey A Law (law@redhat.com) - * makefile.vms: Fix to work with DEC C. + * pa.c (hppa_profile_hook): Use force_reg to get the address + of the profile hook into an appropriate pseudo register. -Tue Oct 7 23:58:57 1997 Gavin Koch <gavin@cygnus.com> +2002-05-09 Jakub Jelinek <jakub@redhat.com> - * config.sub: Add mips-tx39-elf to marketing names. + * mklibgcc.in: Set shlib_slibdir_qual to empty string if + SHLIB_SLIBDIR_SUFFIXES is empty. -Tue Oct 7 14:24:41 1997 Ian Lance Taylor <ian@cygnus.com> +2002-05-09 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE> - * ltmain.sh: Handle symlinks in generated script. + * config/mips/t-iris6 (SHLIB_SLIBDIR_SUFFIXES): Define. + (SHLIB_LINK, SHLIB_INSTALL): Adjust. -Wed Oct 1 13:11:27 1997 Ian Lance Taylor <ian@cygnus.com> +2002-05-09 Jakub Jelinek <jakub@redhat.com> - * configure: Handle autoconf style directory options: --bindir, - --datadir, --includedir, --infodir, --libdir, --libexecdir, - --mandir, --oldincludedir, --sbindir, --sharedstatedir, - --sysconfdir. - * Makefile.in (sbindir, libexecdir, sysconfdir): New variables. - (sharedstatedir, localstatedir, oldincludedir): New variables. - (BASE_FLAGS_TO_PASS): Pass down bindir, datadir, includedir, - infodir, libdir, libexecdir, localstatedir, mandir, oldincludedir, - sbindir, sharedstatedir, and sysconfdir. + * config/sparc/t-linux64 (SHLIB_MAPFILES): Set. + * config/sparc/libgcc-sparc-glibc.ver: New file. + * config/i386/t-linux64 (SHLIB_MAPFILES): Add libgcc-x86_64-glibc.ver. + * config/i386/libgcc-x86_64-glibc.ver: New file. + * config/cris/t-linux (SHLIB_MAPFILES): Remove. + * mklibgcc.in: Preprocess SHLIB_MAPFILES with ml flags. -Mon Sep 29 00:38:08 1997 Aaron Jackson <jackson@negril.msrce.howard.edu> +2002-05-09 Jakub Jelinek <jakub@redhat.com> - * Makefile.in (bootstrap-lean): New target. + PR target/6429 + * Makefile.in (libgcc.mk): Pass SHLIB_SLIBDIR_SUFFIXES to mklibgcc. + * mklibgcc.in: If SHLIB_SLIBDIR_SUFFIXES is defined, put libgcc_s + shared libraries into multilib dirs, with SONAME libgcc_s.so.1 for + base multilibs. + * config/t-slibgcc-elf-ver (SHLIB_LINK): Adjust for the above. + * config/t-slibgcc-sld (SHLIB_LINK): Likewise. + * config/i386/t-linux64 (SHLIB_SLIBDIR_SUFFIXES): Define. + * config/sparc/t-linux64 (SHLIB_SLIBDIR_SUFFIXES): Define. + * config/sparc/t-sol2-64 (SHLIB_SLIBDIR_SUFFIXES): Define. -Wed Sep 24 18:06:27 1997 Stu Grossman <grossman@babylon-5.cygnus.com> +2002-05-08 Mark Mitchell <mark@codesourcery.com> - * configure.in (d30v): Remove tcl, tk, expect, gdb, itcl, tix, db, - sn, and gnuserv from noconfigdirs. + PR c/6569. + * varasm.c (mark_weak): New function. + (merge_weak): Use it. Do not call declare_weak. + (declare_weak): Use merge_weak. -Wed Sep 24 15:18:32 1997 Ian Lance Taylor <ian@cygnus.com> +2002-05-07 Geoffrey Keating <geoffk@redhat.com> - * ltmain.sh: Tweak shell pattern to avoid bug in NetBSD /bin/sh. + * configure.in: Don't pass -Wno-long-long to a ADA compiler + that doesn't support it. + * configure: Regenerate. -Thu Sep 18 23:58:27 1997 Jeffrey A Law (law@cygnus.com) +2002-05-07 Jason Merrill <jason@redhat.com> - * Makefile.in (cross): New target. + * dwarf2out.c (rtl_for_decl_location): Don't try to extract a + constant value from DECL_INITIAL. -Thu Sep 18 21:43:23 1997 Alexandre Oliva <oliva@dcc.unicamp.br> - Jeff Law <law@cygnus.com> +2002-05-07 Richard Henderson <rth@redhat.com> - * Makefile.in (bootstrap2, bootstrap3): New targets. - (all-bootstrap): Remove outdated and confusing target. - (bootstrap, bootstrap2, bootstrap3): Don't pass BOOT_CFLAGS down. + PR c++/6212 + * expr.c (highest_pow2_factor_for_type): New. + (expand_assignment): Use it. -Thu Sep 18 15:37:42 1997 Andrew Cagney <cagney@b1.cygnus.com> +2002-05-07 Jakub Jelinek <jakub@redhat.com> - * configure (tooldir): enable_gdbtk=YES for cygwin32, NO for - windows. Consistent with gdb/configure. + * configure.in: If as or ld segfaults, don't clutter with it stdout. + * configure: Rebuilt. -1997-09-15 02:37 Ulrich Drepper <drepper@cygnus.com> +2002-05-05 Jakub Jelinek <jakub@redhat.com> - * config/mt-linux: Define CXXFLAGS to make sure -fvtable-thunks is - used. - * configure.in: Name Linux target fragment. + PR target/6561 + * config/sparc/sparc.md (muldi3_v8plus): Handle %1 equal to %2. - * configure: Rewrite so that project Makefile fragment is inserted - first and appears last in the resulting Makefile. +2002-05-05 Franz Sirl <Franz.Sirl-kernel@lauterbach.com> -Tue Sep 16 09:55:07 1997 Andrew Cagney <cagney@b1.cygnus.com> + * doc/install.texi (powerpc-*-linux-gnu*): Update build requirements. - * Makefile.in (install-itcl): Install tcl first. +2002-05-04 David Edelsohn <edelsohn@gnu.org> -Sun Sep 14 20:53:42 1997 Geoffrey Noer <noer@cygnus.com> + PR c/6543 + * config/rs6000/rs6000.md (sCC pattern and splitter): Remove + clobber and use result as temporary value. - * config/mh-cygwin32: ok to build split texinfo files +2002-05-03 Jakub Jelinek <jakub@redhat.com> -Fri Sep 12 16:19:20 1997 Geoffrey Noer <noer@cygnus.com> + PR target/6542 + * config/sparc/sparc.h (leaf_reg_remap): Remove const. + (CONDITIONAL_REGISTER_USAGE): For TARGET_FLAT make + fill leaf_reg_remap with identity. + * config/sparc/sparc.c (leaf_reg_remap): Remove const. - * configure.in: remove bison from noconfigdirs for Cygwin32 host +2002-05-03 Jakub Jelinek <jakub@redhat.com> -Thu Sep 11 16:40:46 1997 H.J. Lu (hjl@gnu.ai.mit.edu) + PR target/6522 + * dwarf2out.c (simple_decl_align_in_bits): Renamed to... + (simple_field_decl_align_in_bits): this. Apply + BIGGEST_FIELD_ALIGNMENT and ADJUST_FIELD_ALIGN if defined. - * Makefile.in (local-distclean): Also remove mh-frag mt-frag. +2002-05-03 Richard Henderson <rth@redhat.com> - * configure.in (skipdirs): Add target-librx for Linux. - (alpha-*-linux*): Use config/mh-elfalphapic and config/mt-elfalphapic. + PR opt/6534 + * ifcvt.c (noce_try_store_flag, noce_try_store_flag_constants, + noce_try_store_flag_inc, noce_try_store_flag_mask, noce_try_cmove, + noce_try_cmove_arith, noce_try_minmax, noce_try_abs): Insert new + code before JUMP, not EARLIEST. -Wed Sep 10 21:29:54 1997 Jeffrey A Law (law@cygnus.com) +2002-05-03 Jakub Jelinek <jakub@redhat.com> - * Makefile.in (bootstrap): New target. + PR preprocessor/6489 + * tradcpp.c (fixup_newlines): New. + (main, finclude): Use it. -Wed Sep 10 15:19:22 1997 Jeffrey A Law (law@cygnus.com) +2002-05-03 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE> - * config.sub: Accept 'amigados' for backward compatibility. + * doc/install.texi (Installing): Mention GCC 3.1 buildstats. + (Specific): Removed buildstats references. + (Specific, hppa*-hp-hpux11): Adjust for GCC versions > 3.0. + (Specific, sparc-sun-solaris2*): Update 64-bit hints for GCC 3.1. + Accomodate Solaris versions beyond 8. + (Specific, sparc-sun-solaris2.7): Update as path for GCC 3.1. + (Specific, *-*-solaris2.8): Removed, obsolete. -Mon Sep 8 20:46:20 1997 Ian Lance Taylor <ian@cygnus.com> +2002-05-02 Jason Merrill <jason@redhat.com> - * config.guess: Merge with FSF. + * defaults.h (BOOL_TYPE_SIZE): Move default here from cp/decl.c. + * c-decl.c (c_init_decl_processing): Use it. + * config/rs6000/darwin.h (BOOL_TYPE_SIZE): Define to INT_TYPE_SIZE. + * config/i960/i960.h (BOOL_TYPE_SIZE): Don't define. + * config/mcore/mcore.h (BOOL_TYPE_SIZE): Don't define. -Sun Sep 7 23:18:32 1997 Fred Fish <fnf@ninemoons.com> +2002-05-02 Loren J. Rittle <ljrittle@acm.org> - * config.sub: Change 'amigados' to 'amigaos' to match current usage. + * doc/install.texi (*-*-freebsd*): Update to latest status. -Sun Sep 7 15:55:28 1997 Gavin Koch <gavin@cygnus.com> +2002-05-02 Jakub Jelinek <jakub@redhat.com> - * config.sub: Add "marketing-names" patch. + PR target/6540 + * config.gcc (sparc*-*-solaris2*): Set float_format to i128. + * config/float-sparc.h: Assume 128-bit long double if + __LONG_DOUBLE_128__ is defined. -Fri Sep 5 16:11:28 1997 Joel Sherrill (joel@OARcorp.com) + PR target/6512, PR target/5628 + * config/sparc/sparc.md (movdf_insn_v9only_novis): Don't allow >= %f32 + when memory is not aligned. + (movdf_insn_v9only_vis): Likewise. + * config/sparc/sparc.h (SECONDARY_INPUT_RELOAD_CLASS): Request a FP_REGS + temporary for EXTRA_FP_REGS DFmode load from unaligned memory. + (SECONDARY_OUTPUT_RELOAD_CLASS): Similarly. - * configure.in (*-*-rtems*): Do not build libgloss for rtems. +2002-05-02 Joseph S. Myers <jsm28@cam.ac.uk> -Fri Sep 5 12:27:17 1997 Jeffrey A Law (law@cygnus.com) + * doc/install.texi: State GNAT version requirements. - * config.sub: Handle v850-elf. +2002-05-01 Jeff Law <law@redhat.com> -Wed Sep 3 22:01:58 1997 Fred Fish <fnf@ninemoons.com> + * pa.h (EXTRA_CONSTRAINT): Don't accept PIC addresses for the + 'T' constraint. - * .cvsignore (*-install): Remove. +2002-05-01 Joel Brobecker <brobecker@gnat.com> -Wed Sep 3 12:15:24 1997 Chris Provenzano <proven@cygnus.com> + * dbxout.c (dbxout_type): Emit size information for range types, + as well, but only when using GDB extensions. - * ltconfig: Set CONFIG_SHELL in libtool. - * ltmain.sh: Use CONFIG_SHELL instead of /bin/sh +2002-05-01 Richard Henderson <rth@redhat.com> -Mon Sep 1 16:45:44 1997 Jim Wilson <wilson@cygnus.com> + * configure.in (HAVE_GAS_HIDDEN): Replace SPARC feature test with + target-independent gnu binutils date test. - * configure.in (target_subdir): Set to libraries if enable_multilib. +2002-05-01 Jakub Jelinek <jakub@redhat.com> -Wed Aug 27 16:15:11 1997 Jim Wilson <wilson@cygnus.com> + * cppinit.c (cpp_handle_option) [-dM]: Don't set no_output here... + (cpp_post_options): ...but here. Disable -dD, -dN and -dI when + -M -or -MM is in effect. - * config.guess: Update from gcc directory. +2002-05-01 Zack Weinberg <zack@codesourcery.com> -Tue Aug 26 16:46:46 1997 Andrew Cagney <cagney@b1.cygnus.com> + * config.gcc: Correct test of --enable-obsolete. Obsolete all + A29k configurations. + * doc/install.texi: Update to match. - * Makefile.in (all-sim): Depends on all-readline. +2002-05-01 Franz Sirl <Franz.Sirl-kernel@lauterbach.com> -Wed Aug 20 19:57:37 1997 Jason Merrill <jason@yorick.cygnus.com> + PR bootstrap/6514 + * varasm.c (globalize_decl): Compare DECL_ASSEMBLER_NAME to check + for duplicates. Always loop over whole list. - * Makefile.in (BISON, YACC): Use $$s. - (all-bison): Depend on all-texinfo. +Wed May 1 10:32:37 2002 Richard Kenner <kenner@vlsi1.ultra.nyu.edu> -Tue Aug 19 01:41:32 1997 Jason Merrill <jason@yorick.cygnus.com> + * reload.c (find_reloads, case 'p'): Set BADOP to 0. - * Makefile.in (BISON): Add -L flag. - (YACC): Likewise. +2002-05-01 Joel Sherrill <joel@OARcorp.com> -Mon Aug 18 11:30:50 1997 Nick Clifton <nickc@cygnus.com> + * config/sparc/t-elf (sparc-rtems, sparc-elf): Build assembly + support routines. - * configure.in (noconfigdirs): Add support for v850e target. +2002-05-01 Joseph S. Myers <jsm28@cam.ac.uk> - * config.sub (maybe_os): Add support for v850e target. + * doc/install.texi: Update Texinfo version requirement + documentation. -Mon Aug 18 11:30:50 1997 Nick Clifton <nickc@cygnus.com> +2002-04-30 Richard Henderson <rth@redhat.com> - * configure.in (noconfigdirs): Add support for v850ea target. + * config/sparc/sol27-sld.h: Rename from sol26-sld.h. + (PREFERRED_DEBUGGING_TYPE, ASM_DEBUG_SPEC): Undef. + * config.gcc (sparc-solaris): Adjust test for native ld bug. + Add it after the biarch headers. - * config.sub (maybe_os): Add support for v850ea target. +2002-04-30 Richard Henderson <rth@redhat.com> -Mon Aug 18 09:24:06 1997 Gavin Koch <gavin@cygnus.com> + PR opt/6516 + * toplev.c (rest_of_compilation): Don't run cross-jump before + bb-reorder. - * config.sub: Add mipstx39. Delete r3900. +2002-04-30 Joel Sherrill <joel@OARcorp.com> -Mon Aug 18 17:20:10 1997 Jason Molenda (crash@godzilla.cygnus.co.jp) + * config/arm/rtems-elf.h: Add #undef TARGET_VERSION to prevent warning. - * Makefile.in (all-autoconf): Depends on all-texinfo. +2002-04-30 Richard Henderson <rth@redhat.com> -Fri Aug 15 23:09:26 1997 Michael Meissner <meissner@cygnus.com> + * config/sparc/sparc.c (emit_soft_tfmode_libcall, + emit_soft_tfmode_binop, emit_soft_tfmode_unop, emit_soft_tfmode_cvt, + emit_hard_tfmode_operation, emit_tfmode_binop, emit_tfmode_unop, + emit_tfmode_cvt): New. + * config/sparc/sparc.md (extendsftf2, extenddftf2, trunctfsf2, + trunctfdf2, floatsitf2, floatunssitf2, floatditf2, floatunsditf2, + fix_trunctfsi2, fixuns_trunctfsi2, fix_trunctfdi2, fixuns_trunctfdi2, + addtf3, subtf3, multf3, divtf3, sqrttf2): Use them. + * config/sparc/sparc-protos.h: Update. - * config-ml.in ({powerpc,rs6000}*-*-*): Update to current AIX and - eabi targets. +2002-04-30 John David Anglin <dave@hiauly1.hia.nrc.ca> -Thu Aug 14 14:42:17 1997 Ian Lance Taylor <ian@cygnus.com> + * config.gcc (hppa1.1-*-pro*, hppa1.1-*-osf*, hppa1.1-*-rtems*, + hppa1.0-*-osf*, hppa1.1-*-bsd*, hppa1.1-*-hpux10*, hppa2*-*-hpux10*, + hppa1.0-*-hpux10*, hppa*64*-*-hpux11*, hppa1.1-*-hpux11*, + hppa2*-*-hpux11*, hppa1.0-*-hpux11*, hppa*-*-lites*): Define xmake_file. + * ada/Make-lang.in (ADA_FLAGS_TO_PASS): Don't pass ADA_CFLAGS. + * pa/t-linux, pa/t-pa, pa/t-pa64, t-pro (T_ADAFLAGS): Delete. + * pa/x-ada: New file. Define ADA_CFLAGS. - * configure: Get CFLAGS and CXXFLAGS from Makefile, if possible. +2002-04-30 Janis Johnson <janis187@us.ibm.com> - * configure: When handling a Canadian Cross, handle YACC as well as - BISON. Just set BISON to bison. When setting YACC, prefer bison. - * Makefile.in (all-bison): Depend upon all-texinfo. + * doc/install.texi (Final install): Add to the list of info to include + in a report of a successful bootstrap, and add link to 3.1 list. -Tue Aug 12 20:09:48 1997 Jason Merrill <jason@yorick.cygnus.com> +2002-04-30 Jakub Jelinek <jakub@redhat.com> - * Makefile.in (BISON): bison, not byacc or bison -y. - (YACC): bison -y or byacc or yacc. - (various): Add *-bison as appropriate. - (taz): No need to mess with BISON anymore. + PR c++/6396 + * toplev.c (rest_of_compilation): Only run regrename and copy + propagation if optimizing. -Tue Aug 12 22:33:08 1997 Ian Lance Taylor <ian@cygnus.com> +2002-04-30 Gerald Pfeifer <pfeifer@dbai.tuwien.ac.at> - * configure: If OSTYPE matches *win32*, try to find a good value for - CONFIG_SHELL. + * doc/contrib.texi (Contributors): Use MIPS instead of Mips and + mips. Add two missing commas. -Sun Aug 10 14:41:11 1997 Ian Lance Taylor <ian@cygnus.com> +2002-04-30 Paolo Carlini <pcarlini@unitus.it> - * Makefile.in (taz): Get the version number from AM_INIT_AUTOMAKE in - configure.in if it is present. + * doc/contrib.texi (Contributors): Update Paolo Carlini's + and Benjamin Kosnik's entries. -Sat Aug 9 00:58:01 1997 Ian Lance Taylor <ian@cygnus.com> +2002-04-29 Franz Sirl <Franz.Sirl-kernel@lauterbach.com> - * Makefile.in (LD_FOR_TARGET): Change ld.new to ld-new. + * combine.c (find_split_point): Use trunc_int_for_mode. -Fri Aug 8 16:30:13 1997 Doug Evans <dje@canuck.cygnus.com> +Mon Apr 29 17:19:10 2002 Richard Kenner <kenner@vlsi1.ultra.nyu.edu> - * config.sub: Recognize `arc' cpu. - * configure.in: Likewise. - * config-ml.in: Likewise. + * reload1.c (eliminate_regs, case SUBREG): Fix typo in + adjust_address_nv call. -Thu Aug 7 11:02:34 1997 Ian Lance Taylor <ian@cygnus.com> +2002-04-29 Janis Johnson <janis187@us.ibm.com> - * Makefile.in ($(INSTALL_X11_MODULES)): Depend upon installdirs. + * doc/install.texi (Testing): Provide additional information, and + a stronger encouragement, for running the testsuites. -Wed Aug 6 16:27:29 1997 Chris Provenzano <proven@cygnus.com> +2002-04-29 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE> - * configure: Changed sed delimiter from ':' to '|' when - attempting to substitute ${config_shell} for SHELL. On - NT ${config_shell} may contain a ':' in it. + * fixinc/inclhack.def (solaris_widec): Include <wchar.h> in + Solaris 2 <widec.h> if missing. + * fixinc/fixincl.x: Regenerate. + * fixinc/tests/base/widec.h: New file. -Wed Aug 6 12:29:05 1997 Jason Merrill <jason@yorick.cygnus.com> +2002-04-29 Jakub Jelinek <jakub@redhat.com> - * Makefile.in (EXTRA_GCC_FLAGS): Fix for non-bash shells. + PR target/6476 + * configure.in: Check whether linker eh_frame optimizations work + properly. + * configure: Rebuilt. -Wed Aug 6 00:42:35 1997 Ian Lance Taylor <ian@cygnus.com> +Mon Apr 29 17:08:09 CEST 2002 Jan Hubicka <jh@suse.cz> - * Makefile.in (AS_FOR_TARGET): Change as.new to as-new. + * i386.c (dbx64_register_map): Fix typo. -Tue Aug 5 14:08:51 1997 Ian Lance Taylor <ian@cygnus.com> +Mon Apr 29 14:48:33 CEST 2002 Jan Hubicka <jh@suse.cz> - * Makefile.in (NM_FOR_TARGET): Change nm.new to nm-new. + * i386.md (sse_mov?fcc*): Revert patch of Apr 18th. - * ylwrap: If the program is a relative path, force it to be - absolute. +2002-04-29 Gerald Pfeifer <pfeifer@dbai.tuwien.ac.at> -Tue Aug 5 12:12:44 1997 Andrew Cagney <cagney@b1.cygnus.com> + * doc/contrib.texi (Contributors): Add Paolo Carlini and + Janis Johnson. + Update Richard Henderson, Jakub Jelinek, and Mark Mitchell. + Refer to Objective-C instead of ObjC, SPARC instead of sparc, + and CPU instead of cpu. - * configure (tooldir): Set BISON to `bison -y' and not just bison. +2002-04-29 Alexandre Oliva <aoliva@redhat.com> -Mon Aug 4 22:59:02 1997 Andrew Cagney <cagney@b1.cygnus.com> + * config.gcc: Revert i386 changes inadvertently brought in + from mainline along with 2002-04-04's change. - * Makefile.in (CC_FOR_TARGET): When winsup/Makefile present, - correctly specify the target build directory $(TARGET_SUBDIR)/winsup - for libraries. +2002-04-28 David S. Miller <davem@redhat.com> -Mon Aug 4 12:40:24 1997 Jason Merrill <jason@yorick.cygnus.com> + PR target/6496 + * config/sparc/sparc.md (call followed by jump peephole): Do not + match for TARGET_V9, kill TARGET_ARCH64 variants. - * Makefile.in (EXTRA_GCC_FLAGS): Fix handling of macros with values - separated by spaces. + PR target/6500 + * config/sparc/sparc.md (prefetch): Emit properly for 32-bit vs. + 64-bit TARGET_V9. Do not use prefetch page, use prefetch for + several {reads,writes} instead. + * config/sparc/sparc.h (PREFETCH_BLOCK, SIMULTANEOUS_PREFETCHES): + Define. -Thu Jul 31 19:49:49 1997 Ian Lance Taylor <ian@cygnus.com> +2002-04-27 David S. Miller <davem@redhat.com> - * ylwrap: New file. - * Makefile.in (DEVO_SUPPORT): Add ylwrap. + PR target/6494 + * config/sparc/linux64.h (MD_FALLBACK_FRAME_STATE_FOR): Be mindful + of the stack bias. - * ltmain.sh: Handle /bin/sh at start of install program. + * config/sparc/linux.h, config/sparc/linux64.h: Don't bother + including signal.h and sys/ucontext.h, not needed. - * Makefile.in (DEVO_SUPPORT): Add ltconfig, ltmain.sh, and missing. +2002-04-28 Richard Henderson <rth@redhat.com> - * ltconfig, ltmain.sh: New files, from libtool 1.0. - * missing: New file, from automake 1.2. + PR c/5154 + * ggc-common.c (ggc_mark_rtx_children_1): Rename from... + (ggc_mark_rtx_children): New. -Thu Jul 24 12:57:56 1997 Ian Lance Taylor <ian@cygnus.com> +2002-04-28 Franz Sirl <Franz.Sirl-kernel@lauterbach.com> - * Makefile.in: Treat tix like tk, putting it in X11_MODULES. Add - check-tk to CHECK_X11_MODULES. + PR c/6497 + * config/rs6000/rs6000.md (sCC patterns): Remove clobber and use + result as temporary value. -Wed Jul 23 17:03:29 1997 Ian Lance Taylor <ian@cygnus.com> +2002-04-28 Jakub Jelinek <jakub@redhat.com> - * config.sub: Merge with FSF. + PR optimization/6475 + * reload1.c (alter_reg): Only call set_mem_expr if I is home pseudo + register of REGNO_DECL (i). + * Makefile.in (reload1.o): Add $(TREE_H). -Tue Jul 22 19:08:29 1997 Ian Lance Taylor <ian@cygnus.com> +2002-04-28 Bruce Korb <bkorb@gnu.org> - * config.guess: Merge with FSF. + * fixinc/check.tpl (set-writable): verify that it exists before + invoking. -Tue Jul 22 14:50:42 1997 Robert Hoehne <robert.hoehne@Mathematik.TU-Chemnitz.DE> +2002-04-28 Franz Sirl <Franz.Sirl-kernel@lauterbach.com> - * configure: Treat msdosdjgpp like go32. - * configure.in: Likewise. Don't remove gprof for go32. + PR c/6343 + * c-decl.c (duplicate_decls): Call merge_weak. + * c-pragma.c (apply_pragma_weak): Warn about misuse. + * output.h (merge_weak): Prototype merge_weak. + * varasm.c (merge_weak): New function. + (declare_weak): Make sure we don't give an error on VAR_DECLs. + Mark RTL with SYMBOL_REF_WEAK. - * configure: Change Makefile.tem2 to Makefile.tm2. +2002-04-25 David S. Miller <davem@redhat.com> -Mon Jul 21 10:31:26 1997 Stephen Peters <speters@cygnus.com> + PR target/6422 + * reorg.c (optimize_skip): Do not allow exception causing + instructions to be considered for delay slots. + (fill_simply_delay_slots, fill_slots_from_thread): Likewise. + (relax_delay_slots): Do not try to consider exception causing + instructions as redundant. - * configure.in (noconfigdirs): For alpha-dec-osf*, don't ignore grep. +2002-04-26 Alexandre Oliva <aoliva@redhat.com> -Tue Jul 15 14:33:03 1997 Brendan Kehoe <brendan@lisa.cygnus.com> + * tree.c (tree_int_cst_lt): Compare constants whose types differ + in unsigned-ness correctly. - * install-sh (chmodcmd): Set to null if the DST directory already - exists. Same as Nov 11th change. +2002-04-26 Chris Demetriou <cgd@broadcom.com> -Mon Jul 14 11:01:15 1997 Martin M. Hunt <hunt@cygnus.com> + * config/mips/mips.h (SUBTARGET_CPP_SIZE_SPEC): Get closer to + correct for MEABI (used by mipsisa32-elf). - * configure (GDB_TK): Needs itcl and tix. +2002-04-26 Mark Mitchell <mark@codesourcery.com> -Mon Jul 14 00:32:10 1997 Jason Merrill <jason@yorick.cygnus.com> + PR bootstrap/6445 + * config/i386/i386.md (untyped_call): Return the value in a float + register if TARGET_FLOAT_RETURNS_IN_80387, not just if + TARGET_80387. - * config.guess: Update from FSF. +2002-04-26 Ulrich Weigand <uweigand@de.ibm.com> -Fri Jul 11 11:57:11 1997 Martin M. Hunt <hunt@cygnus.com> + * config/s390/linux.h: Revert 2002-04-22 change. - * Makefile.in (GDB_TK): Depend on itcl and tix. +2002-04-26 John David Anglin <dave@hiauly1.hia.nrc.ca> -Fri Jul 4 13:25:31 1997 Ian Lance Taylor <ian@cygnus.com> + * pa.h (FUNCTION_OK_FOR_SIBCALL): Don't do sibcalls when using the + portable runtime model. - * Makefile.in (INSTALL_PROGRAM_ARGS): New variable. - (INSTALL_PROGRAM): Use $(INSTALL_PROGRAM_ARGS). - (INSTALL_SCRIPT): New variable. - (BASE_FLAGS_TO_PASS): Pass down INSTALL_SCRIPT. - * configure.in: If host is *-*-cygwin32*, set INSTALL_PROGRAM_ARGS - to -x. - * install-sh: Add support for -x option. +2002-04-26 David Edelsohn <edelsohn@gnu.org> + Richard Henderson <rth@redhat.com> -Mon Jun 30 15:51:30 1997 Ian Lance Taylor <ian@cygnus.com> + * config/rs6000/rs6000.md (sCC pattern): Remove clobber and use + result as temporary value. - * configure.in, Makefile.in: Treat tix like itcl. +2002-04-26 Richard Henderson <rth@redhat.com> -Thu Jun 26 13:59:19 1997 Ian Lance Taylor <ian@cygnus.com> + PR c/3581 + * c-common.c (combine_strings): Use xmalloc, not alloca. - * Makefile.in (WINDRES): New variable. - (WINDRES_FOR_TARGET): New variable. - (BASE_FLAGS_TO_PASS): Add WINDRES_FOR_TARGET. - (EXTRA_HOST_FLAGS): Add WINDRES. - (EXTRA_TARGET_FLAGS): Add WINDRES. - (EXTRA_GCC_FLAGS): Add WINDRES. - ($(DO_X)): Pass down WINDRES. - ($(CONFIGURE_TARGET_MODULES)): Set WINDRES when configuring. - * configure: Treat WINDRES like DLLTOOL, and WINDRES_FOR_TARGET like - DLLTOOL_FOR_TARGET. + * c-common.c (combine_strings): Tweak __FUNCTION__ warning text. -Wed Jun 25 15:01:26 1997 Felix Lee <flee@cygnus.com> +2002-04-26 Bo Thorsen <bo@suse.co.uk> - * configure.in: configure sim before gdb for win32-x-ppc + * config/i386/linux64.h (MD_FALLBACK_FRAME_STATE_FOR): Define for + x86-64. -Wed Jun 25 12:18:54 1997 Brendan Kehoe <brendan@lisa.cygnus.com> +2002-04-25 David S. Miller <davem@redhat.com> - Move gperf into the toplevel, from libg++. - * configure.in (target_tools): Add target-gperf. - (native_only): Add target-gperf. - * Makefile.in (all-target-gperf): New target, depend on - all-target-libg++. - (configure-target-gperf): Empty rule. - (ALL_TARGET_MODULES): Add all-target-gperf. - (CONFIGURE_TARGET_MODULES): Add configure-target-gperf. - (CHECK_TARGET_MODULES): Add check-target-gperf. - (INSTALL_TARGET_MODULES): Add install-target-gperf. - (CLEAN_TARGET_MODULES): Add clean-target-gperf. + * config/sparc/sparc.h (FUNCTION_OK_FOR_SIBCALL): Add back check + for DECL being NULL. -Mon Jun 23 10:51:53 1997 Jeffrey A Law (law@cygnus.com) +2002-04-25 Eric Botcazou <ebotcazou@multimania.com> - * config.sub (mn10200): Recognize new basic machine. + * c-decl.c (grokdeclarator): Remove outdated ??? note + on invalid declaration of flexible array members. -Thu Jun 19 14:16:42 1997 Brendan Kehoe <brendan@lisa.cygnus.com> +2002-04-25 Richard Henderson <rth@redhat.com> - * configure.in: Don't set ENABLE_MULTILIB, so we'll be passing - --enable-multilib down to subdirs; setting TARGET_SUBDIR was enough. + * doc/invoke.texi: Document -gdwarf{,-2} vs debug level. -Tue Jun 17 15:31:20 1997 Brendan Kehoe <brendan@lisa.cygnus.com> +2002-04-25 Ulrich Weigand <uweigand@de.ibm.com> + + * config/s390/s390.c (s390_emit_epilogue): Always restore registers + needed by the compiler, even if they are used as global regs. + +2002-04-25 Steven Bosscher <S.Bosscher@student.tudelft.nl> + + * doc/c-tree.texi: Fix typo in introduction. + +2002-04-24 Richard Henderson <rth@redhat.com> + + * configure.in (HAVE_GAS_HIDDEN): Detect sparc binutils 2.12 + linker bug. + +2002-04-24 Jason Merrill <jason@redhat.com> + + * dwarf2.h (enum dwarf_attribute): Add DW_AT_GNU_vector. + * dwarf2out.c (dwarf_attr_name): Support it. + (gen_array_type_die): Emit it. + (lookup_type_die): No special handling for VECTOR_TYPE. + (gen_type_die): Hand VECTOR_TYPE off to gen_array_type_die. + +2002-04-24 Richard Henderson <rth@redhat.com> + + * config/mips/mips.md (movdi_usd): Renumber. + +2002-04-24 Robert Lipe <robertlipe@usa.net> + + * config/i386/sco5.h(i386.h, att.h): Eliminate double inclusion. + +2002-04-24 David S. Miller <davem@redhat.com> + + * config/sparc/sparc.h (FUNCTION_OK_FOR_SIBCALL): Return false if + 32-bit Sparc and current_function_returns_struct is true. + +2002-04-24 Aldy Hernandez <aldyh@redhat.com> + + * config/rs6000/altivec.h: Cleanup file. Add non individual + variants. + (vec_vaddubm): New. + (vec_vadduhm): New. + (vec_vadduwm): New. + (vec_vaddfp): New. + (vec_vaddcuw): New. + (vec_vaddubs): New. + (vec_vaddsbs): New. + (vec_vadduhs): New. + (vec_vadduws): New. + (vec_vaddsws): New. + (vec_vand): New. + (vec_vandc): New. + (vec_vavgub): New. + (vec_vavgsb): New. + (vec_vavguh): New. + (vec_vavgsh): New. + (vec_vavguw): New. + (vec_vavgsw): New. + (vec_vrfip): New. + (vec_vcmpbfp): New. + (vec_vcmpequb): New. + (vec_vcmpequh): New. + (vec_vcmpequw): New. + (vec_vcmpeqfp): New. + (vec_vcmpgefp): New. + (vec_vcmpgtub): New. + (vec_vcmpgtsb): New. + (vec_vcmpgtuh): New. + (vec_vcmpgtsh): New. + (vec_vcmpgtuw): New. + (vec_vcmpgtsw): New. + (vec_vcmpgtfp): New. + (vec_vcmpgefp): New. + (vec_vcfux): New. + (vec_vcfsx): New. + (vec_vctsxs): New. + (vec_vctuxs): New. + (vec_vexptefp): New. + (vec_vrfim): New. + (vec_lvx): New. + (vec_lvebx): New. + (vec_lvehx): New. + (vec_lde): Add vector float variant. + (vec_lvewx): New. + (vec_lvxl): New. + (vec_vlogefp): New. + (vec_vmaddfp): New. + (vec_vmhaddshs): New. + (vec_vmaxub): New. + (vec_vmaxsb): New. + (vec_vmaxuh): New. + (vec_vmaxsh): New. + (vec_vmaxuw): New. + (vec_vmaxsw): New. + (vec_vmaxsw): New. + (vec_vmaxfp): New. + (vec_vmrghb): New. + (vec_vmrghh): New. + (vec_vmrghw): New. + (vec_vmrglb): New. + (vec_vmrglh): New. + (vec_vmrglw): New. + (vec_vminub): New. + (vec_vminsb): New. + (vec_vminuh): New. + (vec_vminsh): New. + (vec_vminuw): New. + (vec_vminsw): New. + (vec_vminfp): New. + (vec_vmladduhm): New. + (vec_vmhraddshs): New. + (vec_msumubm): New. + (vec_vmsummbm): New. + (vec_vmsumuhm): New. + (vec_vmsumshm): New. + (vec_vmsumuhs): New. + (vec_vmsumshs): New. + (vec_vmuleub): New. + (vec_vmulesb): New. + (vec_vmuleuh): New. + (vec_vmulesh): New. + (vec_vmuloub): New. + (vec_mulosb): New. + (vec_vmulouh): New. + (vec_vmulosh): New. + (vec_vnmsubfp): New. + (vec_vnor): New. + (vec_vor): New. + (vec_vpkuhum): New. + (vec_vpkuwum): New. + (vec_vpkpx): New. + (vec_vpkuhus): New. + (vec_vpkshss): New. + (vec_vpkuwus): New. + (vec_vpkswss): New. + (vec_vpkshus): New. + (vec_vpkswus): New. + (vec_vperm): New. + (vec_vrefp): New. + (vec_vrlb): New. + (vec_vrlh): New. + (vec_vrlw): New. + (vec_vrfin): New. + (vec_vrsqrtefp): New. + (vec_vsel): New. + (vec_vslb): New. + (vec_vslh): New. + (vec_vslw): New. + (vec_vsldoi): New. + (vec_vsl): New. + (vec_vslo): New. + (vec_vspltb): New. + (vec_vsplth): New. + (vec_vspltw): New. + (vec_vspltisb): New. + (vec_vspltish): New. + (vec_vspltisw): New. + (vec_vsrb): New. + (vec_vsrh): New. + (vec_vsrw): New. + (vec_vsrab): New. + (vec_vsrah): New. + (vec_vsraw): New. + (vec_vsr): New. + (vec_vsro): New. + (vec_stvx): New. + (vec_stvebx): New. + (vec_stvehx): New. + (vec_stvewx): New. + (vec_stvxl): New. + (vec_vsububm): New. + (vec_vsubuhm): New. + (vec_vsubuwm): New. + (vec_vsubfp): New. + (vec_vsubcuw): New. + (vec_vsububs): New. + (vec_vsubsbs): New. + (vec_vsubuhs): New. + (vec_vsubshs): New. + (vec_vsubuws): New. + (vec_vsubsws): New. + (vec_vsum4ubs): New. + (vec_vsum4sbs): New. + (vec_vsum4shs): New. + (vec_vsum2sws): New. + (vec_vsumsws): New. + (vec_vrfiz): New. + (vec_vupkhsb): New. + (vec_vupkhpx): New. + (vec_vupkhsh): New. + (vec_vupklsb): New. + (vec_vupklpx): New. + (vec_vupklsh): New. + (vec_vxor): New. + +2002-04-23 Zack Weinberg <zack@codesourcery.com> + + * doc/install.texi: Clarify which versions of alpha*-dec-osf* + are obsoleted. + +2002-04-23 Eric Botcazou <ebotcazou@multimania.com> + + PR c/5430 + * fold-const.c (split_tree): Add MINUS_LITP parameter; separate + added literals from substracted literals. + (associate_trees): Don't convert MINUS_EXPR into PLUS_EXPR. + (fold) [associate]: Preserve MINUS_EXPR if needed. + +2002-04-23 Tom Tromey <tromey@redhat.com> + + * gcc.c: Added --resource. For PR java/6314. + +2002-04-23 David O'Brien <obrien@FreeBSD.org> + + * config/freebsd.h(OBJECT_FORMAT_ELF): Define. + +2002-04-23 David O'Brien <obrien@FreeBSD.org> + + * cp/g++spec.c: Use profiled libstdc++ and libm with -p/-pg. + * config/freebsd.h (MATH_LIBRARY_PROFILE): Use the _p verions of + these libraries. + +2002-04-23 Alan Modra <amodra@bigpond.net.au> + + PR target/6413 + * function.h: (struct function): Add profile_label_no field. + (current_function_profile_label_no): Define. + * function.c: (profile_label_no): New static var. + (expand_function_start): Increment it, and copy to + current_function_profile_label_no. + * output.h (profile_label_no): Delete. + * final.c (profile_label_no): Delete. + (profile_function): Use current_function_profile_label_no. + (final_end_function): Don't increment profile_label_no here. + * config/i386/i386.c (ix86_osf_output_function_prologue): Replace + profile_label_no with current_function_profile_label_no. + * config/pa/pa.c (current_function_number): Delete. + (pa_output_function_prologue): Don't output profile label here. + (hppa_profile_hook): Use label_no param rather than + current_function_number. + (FUNC_BEGIN_PROLOG_LABEL): Move to .. + * config/pa/pa.h: .. here. + (FUNCTION_PROFILER): Output profile label here. + +2002-04-23 Aldy Hernandez <aldyh@redhat.com> + + * config/rs6000/altivec.h (vec_step): Remove extraneous + parentheses. + (vec_ctu): Cast return. + +2002-04-22 Aldy Hernandez <aldyh@redhat.com> + + * config/rs6000/rs6000.md ("*movv4si_internal"): Change 'm' + constraint to 'o' for m=r and r=m alternatives. + ("*movv8hi_internal1"): Same. + ("*movv16qi_internal1"): Same. + ("*movv4sf_internal1"): Same. + +2002-04-22 Zack Weinberg <zack@codesourcery.com> + + * c-lex.c (lex_charconst): Call convert to get constant in + proper type; don't just smash the type field. + Fixes PR c/6300. + + * config.gcc: Add list of obsolete configurations. Disallow + building these without --enable-obsolete. + * doc/install.texi: Document --enable-obsolete and obsoletion + policy. Mention obsoletion of individual targets in + appropriate places. + +2002-04-22 Richard Henderson <rth@redhat.com> + + * config/sparc/sol2-bi.h (ASM_DEBUG_SPEC): New. + +2002-04-22 Mark Mitchell <mark@codesourcery.com> + + PR f/6138. + * function.c (fixup_memory_subreg): Add promoted_mode parameter. + (walk_fixup_memory_subreg): Likewise. + (fixup_var_refs_insn): Adjust accordingly. + (fixup_var_refs_1): Likewise. - * configure.in: If we're building mips-sgi-irix6* native, turn on - ENABLE_MULTILIB and set TARGET_SUBDIR. +2002-04-22 Joel Sherrill <joel@OARcorp.com> -Tue Jun 17 12:20:59 1997 Tom Tromey <tromey@cygnus.com> + * gthr-rtems.h: Correct prototypes to remove warnings. - * Makefile.in (all-sn): Depend on all-grep. +2002-04-22 Richard Henderson <rth@redhat.com> -Mon Jun 16 11:11:10 1997 Ian Lance Taylor <ian@cygnus.com> + PR c/6344 + * alias.c (canon_true_dependence): Special case (mem:blk (scratch)). - * configure.in: Use mh-ppcpic and mt-ppcpic for powerpc*-* targets. + * gcse.c (free_insn_expr_list_list): New. + (clear_modify_mem_tables): Use it. Fix bit set usage. + (canon_list_insert): Use EXPR_LISTs for expressions. + (record_last_mem_set_info): Factor BLOCK_NUM (insn). - * configure: Set CFLAGS and CXXFLAGS, and substitute them into - Makefile. From Jeff Makey <jeff@cts.com>. - * Makefile.in: Add comment for CFLAGS and CXXFLAGS. +2002-04-22 Ulrich Weigand <uweigand@de.ibm.com> - * Makefile.in (DISTBISONFILES): Remove. - (taz): Don't futz with DISTBISONFILES. Change BISON to use - $(DEFAULT_YACC). + * config/s390/linux.h: (LIBPATH_SPEC, LIBPATH_ARCH31_SPEC, + LIBPATH_ARCH64_SPEC): Define. + (EXTRA_SPECS): Add libpath, libpath_arch31, libpath_arch64. + (STARTFILE_SPEC, ENDFILE_SPEC): Define; use libpath. + (LINK_ARCH31_SPEC): Add libpath_arch31 to search path. + (LINK_ARCH64_SPEC): Add libpath_arch64 to search path. - * configure.in: Build itl, db, sn, etc., when building for native - cygwin32. +2002-04-22 Aldy Hernandez <aldyh@redhat.com> - * Makefile.in (LD): New variable. - (EXTRA_HOST_FLAGS): Pass down LD. - ($(DO_X)): Likewise. + * config/rs6000/altivec.h (vec_xor): Add variant for both args + being vector signed int. + (vec_andc): Same. + (vec_xor): Add variant for both args being vector signed char. + Remove redundant variant. + (vec_andc): Same. -Mon Jun 16 11:10:35 1997 Philip Blundell <Philip.Blundell@pobox.com> +2002-04-21 David S. Miller <davem@redhat.com> - * Makefile.in (INSTALL): Use $(SHELL) when executing install-sh. + * config/sparc/sparc.md (set then compare DI mode peephole2): Fix + compare mode in output RTL. -Fri Jun 13 10:22:56 1997 Bob Manson <manson@charmed.cygnus.com> +2002-04-22 David Edelsohn <edelsohn@gnu.org> - * configure.in (targargs): Strip out any supplied --build argument - before adding our own. Always add --build. + * config/rs6000/rs6000.c (rs6000_override_options): Correct + style and formatting of previous patch. -Thu Jun 12 21:12:28 1997 Bob Manson <manson@charmed.cygnus.com> +2002-04-22 Alan Modra <amodra@bigpond.net.au> - * configure.in (targargs): Pass --build if we're doing - a cross-compile. + * config/rs6000/rs6000.c (rs6000_override_options): Always clear + flag_pic for ABI_AIX. -Fri Jun 6 21:38:40 1997 Rob Savoye <rob@chinadoll.cygnus.com> +2002-04-21 Neil Booth <neil@daikokuya.demon.co.uk> - * configure: Use '|' instead of ":" as the separator in - sed. Otherwise sed chokes on NT path names with drive - designators. Also look for "?:*" as the leading characters in an - absolute pathname. + * cppmacro.c (funlike_invocation_p): Don't step back + over CPP_EOF. -Mon Jun 2 13:05:20 1997 Gavin Koch <gavin@cygnus.com> +2002-04-21 David Edelsohn <edelsohn@gnu.org> - * config.sub: Support for r3900. + * config/rs6000/rs6000.c (output_profile_hook): Do not increment + labelno. -Wed May 21 17:33:31 1997 Ian Lance Taylor <ian@cygnus.com> +2002-04-20 Joseph S. Myers <jsm28@cam.ac.uk> - * configure.in: Use install-sh, not install.sh. + * doc/invoke.texi: Remove Chill references. + * doc/gcc.texi: Update last modified date. -Wed May 14 16:06:51 1997 Ian Lance Taylor <ian@cygnus.com> +2002-04-19 David S. Miller <davem@redhat.com> - * Makefile.in (taz): Improve check for BISON so it doesn't try to - apply it twice. + * config/sparc/linux.h (MD_FALLBACK_FRAME_STATE_FOR): Define. + * config/sparc/linux64.h (MD_FALLBACK_FRAME_STATE_FOR): Likewise. -Fri May 9 17:22:05 1997 Ian Lance Taylor <ian@cygnus.com> +Sat Apr 20 02:17:38 CEST 2002 Jan Hubicka <jh@suse.cz> - * Makefile.in (INSTALL_MODULES): Put install-opcodes before - install-binutils. + * i386.md (movsi_1, movhi_1): Force reload to use more flexible + alternative. -Thu May 8 17:29:50 1997 Ian Lance Taylor <ian@cygnus.com> +2002-04-19 Jakub Jelinek <jakub@redhat.com> - * Makefile.in: Add automake targets. - * configure.in (host_tools): Add automake. + PR c/6358 + * function.c: Reapply patch for c/6358. + (expand_function_end): Copy decl_rtl's mode, not + current_function_return_rtx mode. -Tue May 6 15:49:52 1997 Ian Lance Taylor <ian@cygnus.com> +2002-04-19 Joel Sherrill <joel@OARcorp.com> - * configure: Default CXX to c++, not gcc. - * Makefile.in (CXX): Set to c++, not gcc. - (CXX_FOR_TARGET): When cross, transform c++, not gcc. + * config/rtems.h (STARTFILE_SPEC, ENDFILE_SPEC): Fix for non-ELF + targets. -Thu May 1 10:11:43 1997 Geoffrey Noer <noer@cygnus.com> +2002-04-19 Tom Tromey <tromey@redhat.com> - * install-sh: try appending a .exe if source file doesn't - exist + * doc/install.texi (Specific): Update status of Solaris 2.8. + For PR libgcj/6158. -Wed Apr 30 12:05:36 1997 Jason Merrill <jason@yorick.cygnus.com> +2002-04-19 Dan Nicolaescu <dann@godzilla.ics.uci.edu> + Gerald Pfeifer <pfeifer@dbai.tuwien.ac.at> - * configure.in: Turn on multilib by default. - (cross_only): Remove target-libiberty. + * doc/install.texi (Specific, sparc-sun-solaris2*): Mention that + binutils 2.11.2 and higher generate smaller binaries than Sun's + native tools. - * Makefile.in (all-gcc): Don't depend on libiberty. +2002-04-19 Mark Mitchell <mark@codesourcery.com> -Mon Apr 28 18:39:45 1997 Michael Snyder <msnyder@cleaver.cygnus.com> + PR c++/6352 + * toplev.c (rest_of_compilation): Do not defer functions for which + TREE_SYMBOL_REFERENCED has already been set. - * config.guess: improve algorithm for recognizing Gnu Hurd x86. +2002-04-18 Richard Henderson <rth@redhat.com> -Thu Apr 24 19:30:07 1997 Ian Lance Taylor <ian@cygnus.com> + * function.c: Revert patch for c/6358. - * Makefile.in (DEVO_SUPPORT): Add mpw-install. - (DISTBISONFILES): Add ld/Makefile.in +2002-04-18 Richard Henderson <rth@redhat.com> -Tue Apr 22 17:17:28 1997 Geoffrey Noer <noer@pizza.cygnus.com> + * ifcvt.c (find_cond_trap): Handle cases with no proper THEN or JOIN + blocks. Handle multiple references to the TRAP block. Handle + non-adjacent THEN and OTHER blocks. - * configure.in: if target is cygwin32 but host isn't cygwin32, - don't configure gdb tcl tk expect, not just gdb. +2002-04-18 Richard Henderson <rth@redhat.com> -Mon Apr 21 13:33:39 1997 Tom Tromey <tromey@cygnus.com> + * config/ia64/ia64.c (ia64_function_arg_pass_by_reference): Don't + crash with no type for by-mode libcalls. - * configure.in: Added gnuserv everywhere sn appears. + * config/ia64/ia64.md (conditional_trap): Fix predicate polarity. - * Makefile.in (ALL_MODULES): Added all-gnuserv. - (CROSS_CHECK_MODULES): Added check-gnuserv. - (INSTALL_MODULES): Added install-gnuserv. - (CLEAN_MODULES): Added clean-gnuserv. - (all-gnuserv): New target. +2002-04-18 David S. Miller <davem@redhat.com> -Thu Apr 17 13:57:06 1997 Per Fogelstrom <pefo@openbsd.org> + * config/sparc/sparc.h (BRANCH_COST): Define. - * config.guess: Fixes for MIPS OpenBSD systems. + * fold-const.c (BRANCH_COST): Don't provide default here, expr.h + does it. -Tue Apr 15 12:21:07 1997 Ian Lance Taylor <ian@cygnus.com> +2002-04-18 Richard Henderson <rth@redhat.com> - * Makefile.in (INSTALL_XFORM): Remove. - (BASE_FLAGS_TO_PASS): Remove INSTALL_XFORM. + * config/ia64/ia64.c (ia64_function_arg_pass_by_reference): New. + (ia64_va_arg): Expect variable sized types by reference. + * config/ia64/ia64-protos.h: Update. + * config/ia64/ia64.h (FUNCTION_ARG_PASS_BY_REFERENCE): Use + ia64_function_arg_pass_by_reference. - * mkinstalldirs: New file, copied from automake. - * Makefile.in (installdirs): Rename from install-dirs. Use - mkinstalldirs. Change all users. - (DEVO_SUPPORT): Add mkinstalldirs. +2002-04-18 Hans-Peter Nilsson <hp@bitrange.com> -Mon Apr 14 11:21:38 1997 Ian Lance Taylor <ian@cygnus.com> + * flow.c (update_life_info): Ignore return value of cleanup_cfg. + Mask out PROP_SCAN_DEAD_CODE | PROP_KILL_DEAD_CODE in + propagate_block calls after relaxation loop using new variable + stabilized_prop_flags. - * install-sh: Rename from install.sh. - * Makefile.in (INSTALL): Change install.sh to install-sh. - (DEVO_SUPPORT): Likewise. +2002-04-18 Richard Henderson <rth@redhat.com> - * configure: Use ${config_shell} with ${moveifchange}. From Thomas - Graichen <graichen@rzpd.de>. + * ifcvt.c: Include except.h. + (block_has_only_trap): Break out from find_cond_trap. + (find_cond_trap): Use it. Always delete the trap block. + (merge_if_block): Allow then block null. Be less simplistic about + what insns can end a block. + * Makefile.in (ifcvt.o): Depend on except.h. -Fri Apr 11 16:37:10 1997 Niklas Hallqvist <niklas@appli.se> + * config/ia64/ia64.md (trap, conditional_trap): New. - * config.guess: Recognize OpenBSD systems correctly. +2002-04-18 Jakub Jelinek <jakub@redhat.com> -Fri Apr 11 17:07:04 1997 Jason Molenda (crash@godzilla.cygnus.co.jp) + PR c/6358 + * function.c (assign_parms): Assign hard current_function_return_rtx + register here... + (expand_function_end): ...not here. - * README, Makefile.in (ETC_SUPPORT): Remove references to - cfg-paper*, configure.{texi,man,info*}._ +2002-04-18 Gerald Pfeifer <pfeifer@dbai.tuwien.ac.at> -Sun Apr 6 18:47:57 1997 Andrew Cagney <cagney@kremvax.cygnus.com> + * doc/install.texi (Downloading the source): Do not mention Chill + any longer, but mention Ada. + (Configuration): Do not mention Chill any longer. - * Makefile.in (all.normal): Ensure that gcc is built after all - the x11 - ie gdb - targets. +2002-04-18 Hans-Peter Nilsson <hp@axis.com> -Tue Apr 1 16:28:50 1997 Klaus Kaempf <kkaempf@progis.de> + * config/cris/cris.h (TARGET_VERSION): Remove local version number. - * makefile.vms: Don't run conf-a-gas. +Thu Apr 18 15:49:12 CEST 2002 Jan Hubicka <jh@suse.cz> -Mon Mar 31 16:26:55 1997 Joel Sherrill <joel@oarcorp.com> + * i386.h (SSE_FLOAT_MODE_P): Kill bogus TARGET_SSE_MATH check. + * i386.md (sse_mov?fcc*): Swap operands for cases they will be swapped + later. - * configure.in (hppa1.1-*-rtems*): New target, like hppa-*-*elf*. +2002-04-18 Jakub Jelinek <jakub@redhat.com> -Sun Mar 30 12:38:27 1997 Fred Fish <fnf@cygnus.com> + PR middle-end/6205 + * config/i386/i386.md (movsf_1): Use pxor only if TARGET_SSE2, + otherwise xorps. - * configure.in: Remove noconfigdirs case since gdb also - configures and builds for tic80-coff. +2002-04-18 Loren J. Rittle <ljrittle@acm.org> -Fri Mar 28 18:28:52 1997 Ian Lance Taylor <ian@cygnus.com> + Revert this change: - * configure: Set cache_file to config.cache. - * Makefile.in (local-distclean): Remove config.cache. + * doc/install.texi (Installing GCC: Configuration): Clarify + the only supported ways to configure gcc. -Wed Mar 26 18:49:39 1997 Ian Lance Taylor <ian@cygnus.com> +2002-04-17 Dale Johannesen <dalej@apple.com> - * COPYING: Update FSF address. + * config/rs6000/rs6000.c (rs6000_emit_cmove): Fail if modes of + comparison operands do not match each other or if modes of + conditions do not match result. + (rs6000_output_function_prologue): Compute instruction addresses. + (rs6000_output_function_epilogue): Likewise. -Wed Mar 26 10:38:25 1997 Michael Meissner <meissner@cygnus.com> +2002-04-17 Ulrich Weigand <uweigand@de.ibm.com> - * configure.in (tic80-*-*): Remove G++ libraries and libgloss from - noconfigdirs. + * config/s390/s390.c (legitimize_pic_address): Do not generate + illegal address constant without CONST. -Mon Mar 24 15:02:39 1997 Ian Lance Taylor <ian@cygnus.com> +2002-04-17 Kaveh R. Ghazi <ghazi@caip.rutgers.edu> - * Makefile.in (install-dirs): Don't crash if prefix, and hence - MAKEDIRS, is empty. + * sparc/linux64.h (CC1_SPEC): Error for -m32 and -m64. + * sparc/netbsd-elf.h (CC1_SPEC32, CC1_SPEC64): Likewise. -Mon Mar 24 12:40:55 1997 Doug Evans <dje@canuck.cygnus.com> +2002-04-17 Ulrich Weigand <uweigand@de.ibm.com> - * config.sub: Tweak mn10300 entry. + PR optimization/6305 + * config/s390/s390.c (s390_expand_plus_operand): Use find_replacement + to make sure previous reloads are taken into account. Generate + better code if one operand is an in-range immediate constant. -Fri Mar 21 15:35:27 1997 Michael Meissner <meissner@cygnus.com> +2002-04-16 Andrew Haley <aph@cambridge.redhat.com> - * configure.in (host_tools): Put sim before gdb, so gdb's - configure.tgt can determine if the simulator was configured. + * doc/install.texi (Building): libgcj requires GNU make. -Sun Mar 16 16:07:08 1997 Fred Fish <fnf@cygnus.com> +2002-04-17 Jakub Jelinek <jakub@redhat.com> - * config.sub: Move BeOS $os case to be with other Cygnus - local cases. + PR bootstrap/6315 + * config/sparc/sparc.md (movtf reg<-reg split): Allow spliting + even if hard quad and register is not floating. + (movtf reg<-mem split): Disallow splitting if hard quad and + register is floating. + (movtf mem<-reg split): Likewise. + * config/sparc/sparc.c (fp_register_operand): New predicate. + * config/sparc/sparc.h (PREDICATE_CODES): Add fp_register_operand. -Sun Mar 16 01:34:55 1997 Martin Hunt <hunt@cygnus.com> +2002-04-17 Zack Weinberg <zack@codesourcery.com> - * config.sub: Remove misplaced comment that broke Linux. + * Makefile.in (PROTO_OBJS): Add cppdefault.o. + (protoize.o): Take $(PREPROCESSOR_DEFINES) off command line. + (unprotoize.o): Ditto. Build from protoize.c. Define + UNPROTOIZE on command line. + * protoize.c: Include cppdefault.h. Delete include_defaults. + (in_system_include_dir): Use cpp_include_defaults (defined in + cppdefault.o). + * unprotoize.c: Delete file. -Sat Mar 15 22:50:15 1997 Fred Fish <fnf@cygnus.com> +2002-04-17 Aldy Hernandez <aldyh@redhat.com> - * config.sub: Add BeOS support. + * config/rs6000/altivec.h (vec_ld): Add array variants. + (vec_lde): Same. + (vec_ldl): Same. -Mon Mar 10 13:30:11 1997 Tom Tromey <tromey@cygnus.com> +2002-04-17 Alan Matsuoka <alanm@redhat.com> + Aldy Hernandez <aldyh@redhat.com> - * Makefile.in (CHECK_X11_MODULES): Don't run check-tk. + * config/rs6000/altivec.h: Define __ALTIVEC__. + (bool): New. + (__pixel): New. + (pixel): New. + (vec_cfux): New. + (vec_vmaddfp): New. + (vec_vsldoi): New. + Add parentheses to all macro arguments. -Wed Mar 5 12:09:29 1997 Martin <hunt@cygnus.com> +2002-04-16 Richard Henderson <rth@redhat.com> - * configure.in (noconfigdirs): Remove tcl and tk from - noconfigdirs for cygwin32 builds. + PR c++/6320 + * except.c (remove_eh_handler): Insert inner regions at beginning + of sibling chain. Refactor expressions. -Fri Feb 28 18:20:15 1997 Fred Fish <fnf@cygnus.com> +2002-04-16 Mark Mitchell <mark@codesourcery.com> - * configure.in (tic80-*-*): Remove ld from noconfigdirs. + * c-common.h (STMT_EXPR_NO_SCOPE): New macro. + * c-common.c (c_expand_expr): Respect STMT_EXPR_NO_SCOPE. + * tree.h (expand_start_stmt_expr): Update prototype. + * stmt.c (expand_start_stmt_expr): Add has_scope parameter. + * tree-inline.c (expand_call_inline): Set STMT_EXPR_NO_SCOPE + on the STMT_EXPR created for the inline function. -Thu Feb 27 14:57:26 1997 Ken Raeburn <raeburn@cygnus.com> +2002-04-16 Richard Henderson <rth@redhat.com> - * Makefile.in (GAS_SUPPORT_DIRS, BINUTILS_SUPPORT_DIRS): Remove - make-all.com, use makefile.vms instead. + * config/sparc/sol2-bi.h (AS_SPARC64_FLAG): New. + * config/sparc/sol2-gas-bi.h: New file. + * config.gcc (sparc*-solaris): Add it as needed. + * configure.in (AS_SPARC64_FLAG): Remove check. + * config.in, configure: Regenerate. -Tue Feb 25 18:46:14 1997 Stan Shebs <shebs@andros.cygnus.com> + * config/sparc/sol2-bi.h (CC1_SPEC): Error for -m32 and -m64. - * config.sub: Accept -lnews*. +2002-04-16 Richard Henderson <rth@redhat.com> -Tue Feb 25 13:19:14 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au> + * config/mips/mips.c (override_options): Don't override N32 for + a 64-bit ISA. - * configure.in (noconfigdirs): Disable target-newlib, - target-examples and target-libiberty for d30v. + PR c/6202 + * config/mips/mips.md (can_delay): Split out of existing define_delays. + (HILO_delay): Set can_delay false. -Fri Feb 21 17:56:25 1997 Martin M. Hunt <hunt@pizza.cygnus.com> +2002-04-16 Paolo Carlini <pcarlini@unitus.it> - * configure.in (noconfigdirs): Enable ld for d30v. + * c-parse.in (poplevel, compstmt_start, compstmt_primary_start): + Add ending ';', in accordance with POSIX. -Fri Feb 21 20:58:51 1997 Michael Meissner <meissner@cygnus.com> +2002-04-16 Richard Henderson <rth@redhat.com> - * configure.in (tic80-*-*): Build compiler. + * config.gcc (sparcv9-solaris): Configure for 64-bit default. + Adjust tm_file order to get TARGET_DEFAULT set properly. + (sparc-solaris): Configure 2.[78] for 64-bit multilibs. + * doc/install.texi (sparc-solaris): Update. -Sun Feb 16 15:41:09 1997 Andrew Cagney <cagney@critters.cygnus.com> +2002-04-16 Hartmut Penner <hpenner@de.ibm.com> - * configure.in (d30v-*): Remove sim directory from list of - unsupported d30v directories + PR target/6305 + * config/s390/s390.md (mulsidi3): Set both subregs of the + multiword register. -Tue Feb 18 17:32:42 1997 Martin M. Hunt <hunt@pizza.cygnus.com> +2002-04-16 Aldy Hernandez <aldyh@redhat.com> - * config.sub, configure.in: Add d30v target cpu. + * config/rs6000/altivec.h (vec_addc): Type check. -Thu Feb 13 22:04:44 1997 Klaus Kaempf <kkaempf@progis.de> +2002-04-16 Jakub Jelinek <jakub@redhat.com> - * makefile.vms: New file. - * make-all.com: Remove. + PR middle-end/6279 + * expr.c (store_expr): Don't copy if DECL_RTL (exp) == target. -Wed Feb 12 12:54:18 1997 Jim Wilson <wilson@cygnus.com> + * expr.c (safe_from_p): Cleanup: use DECL_RTL_IF_SET. - * Makefile.in (EXTRA_GCC_FLAGS): Add LIBGCC2_DEBUG_CFLAGS. +2002-04-15 Richard Henderson <rth@redhat.com> -Sat Feb 8 20:36:49 1997 Michael Meissner <meissner@cygnus.com> + * config/mips/abi64.h (SUBTARGET_CONDITIONAL_REGISTER_USAGE): Set + call_really_used_regs too. - * Makefile.in (all-itcl): The rule is all-itcl, not all-tcl. +2002-04-15 David S. Miller <davem@redhat.com> -Tue Feb 4 11:39:29 1997 Tom Tromey <tromey@cygnus.com> + * rtlanal.c (note_stores): Don't present PARALLEL SET_DESTs + as being CLOBBERed. - * Makefile.in (ALL_MODULES): Added all-db. - (CROSS_CHECK_MODULES): Addec check-db. - (INSTALL_MODULES): Added install-db. - (CLEAN_MODULES): Added clean-db. +2002-04-16 Jakub Jelinek <jakub@redhat.com> -Mon Feb 3 13:29:36 1997 Ian Lance Taylor <ian@cygnus.com> + PR c/6290 + * config/rs6000/rs6000.c (easy_vector_constant): Return 1 if the + CONST_VECTOR is { 0, ... 0 }. - * config.guess: Merge with latest FSF sources. +2002-04-15 Loren J. Rittle <ljrittle@acm.org> -Tue Jan 28 09:20:37 1997 Tom Tromey <tromey@cygnus.com> + * doc/install.texi (Installing GCC: Configuration): Clarify + the only supported ways to configure gcc. - * Makefile.in (ALL_MODULES): Added all-itcl. - (CROSS_CHECK_MODULES): Added check-itcl. - (INSTALL_MODULES): Added install-itcl. - (CLEAN_MODULES): Added clean-itcl. +2002-04-15 Richard Henderson <rth@redhat.com> -Thu Jan 23 01:44:27 1997 Geoffrey Noer <noer@cygnus.com> + * config/alpha/linux.h, config/arm/linux-elf.h, config/i370/linux.h, + config/i386/linux-aout.h, config/i386/linux-oldld.h, + config/i386/linux.h, config/i386/linux64.h, config/ia64/linux.h, + config/m68k/linux-aout.h, config/m68k/linux.h, config/mips/linux.h, + config/pa/pa-linux.h, config/pj/linux.h, config/s390/linux.h, + config/sh/linux.h, config/sparc/linux-aout.h, config/sparc/linux.h, + config/sparc/linux64.h, config/xtensa/linux.h (CPP_PREDEFINES): + Define __gnu_linux__, not gnu_linux. + * config/rs6000/sysv4.h (CPP_OS_GNU_SPEC): Likewise for gnu_hurd. - * configure.in: build gdb for mn10200 +2002-04-15 Mark Mitchell <mark@codesourcery.com> -Fri Jan 17 15:32:15 1997 Doug Evans <dje@canuck.cygnus.com> + Remove Chill front end. + * gcc.c (default_compilers): Remove Chill entries. + * ch: Remove directory. + * doc/frontends.texi: Remove information about Chill. + * doc/sourcebuild.texi: Likewise. + * doc/standards.texi: Likewise. - * Makefile.in (all-target-winsup): Depend on all-target-libio. +2002-04-15 Douglas B Rupp <rupp@gnat.com> -Mon Jan 13 22:46:54 1997 Michael Meissner <meissner@tiktok.cygnus.com> + * config/alpha/vms.h (INCLUDE_DEFAULTS): Add /gnu/lib/gcc-lib/include. + (LONGLONG_STANDALONE): Define. - * configure.in (tic80-*-*): Turn off most targets right now. +2002-04-15 David S. Miller <davem@redhat.com> -Fri Jan 3 16:04:03 1997 Ian Lance Taylor <ian@cygnus.com> + * config/sparc/sparc.c (sparc_emit_float_lib_cmp): + Call emit_library_call with LCT_NORMAL. + (sparc_initialize_trampoline): Use LCT_foo instead of + magic constant in emit_library_call invocations. + (sparc64_initialize_trampoline): Likewise. + (sparc_profile_hook): Likewise. + * config/sparc/sparc.md: Likewise. - * Makefile.in (MAKEINFO): Check for the existence of the Makefile, - rather than the makeinfo program. - (do-info): Depend upon all-texinfo. + * config/sparc/sparc.c (sparc_extra_constraint_check): + Fix type of argument 'c'. + * config/sparc/sparc-protos.h (sparc_extra_constraint_check): + Likewise. -Tue Dec 31 16:00:31 1996 Ian Lance Taylor <ian@cygnus.com> +2002-04-14 Andreas Schwab <schwab@suse.de> - * configure.in: Remove uses of config/mh-linux. + * config/ia64/linux.h (CPP_PREDEFINES): Fix missing backslash. - * config.sub, config.guess: Merge with latest FSF sources. +2002-04-14 Jeroen Dobbelaere <jeroen.dobbelaere@acunia.com> -Fri Dec 27 23:04:33 1996 Fred Fish <fnf@cygnus.com> + * config/arm/linux-elf.h (CPLUSPLUS_CPP_SPEC): Define. - * config.sub (case $basic_machine): Add tic80 entries. +2002-04-13 Mark Mitchell <mark@codesourcery.com> -Fri Dec 27 12:07:59 1996 Ian Lance Taylor <ian@cygnus.com> + * config/alpha/linux.h (CPP_PREDEFINES): Fix typo. + * config/i386/gnu.h (CPP_PREDEFINES): Define __gnu_hurd__, + not gnu_hurd. - * config.sub, config.guess: Merge with latest FSF sources. +2002-04-13 Hans-Peter Nilsson <hp@axis.com> -Wed Dec 18 22:46:39 1996 Stan Shebs <shebs@andros.cygnus.com> + * config/cris/linux.h (CRIS_CPP_SUBTARGET_SPEC): Fix typo. - * mpw-build.in: Build ld before gcc, use NewFolderRecursive. - * mpw-config.in: Test for NewFolderRecursive. - * mpw-install: Use symbolic name for startup filename. - * mpw-README: Add various additional details. +2002-04-13 Joel Sherrill <joel@OARcorp.com> -Wed Dec 18 13:11:46 1996 Jim Wilson <wilson@cygnus.com> + * config/sparc/t-elf: Enable v8 multilibs. Impacts + sparc-elf and sparc-rtems targets. - * configure.in (mips*-sgi-irix6*): Remove binutils from noconfigdirs. +2002-04-13 Mark Mitchell <mark@codesourcery.com> -Wed Dec 18 10:29:31 1996 Jeffrey A Law (law@cygnus.com) + * alpha/linux.h: Define __gnu_linux__ wherever __linux__ is + defined, and __gnu_hurd__ wherever __GNU__ is defined. + * arm/linux-elf.h: Likewise. + * cris/aout.h: Likewise. + * cris/linux.h: Likewise. + * i370/linux.h: Likewise. + * i386/gnu.h: Likewise. + * i386/linux-aout.h: Likewise. + * i386/linux-oldld.h: Likewise. + * i386/linux.h: Likewise. + * i386/linux64.h: Likewise. + * ia64/linux.h: Likewise. + * m68k/linux-aout.h: Likewise. + * m68k/linux.h: Likewise. + * mips/linux.h: Likewise. + * pa/pa-linux.h: Likewise. + * pj/linux.h: Likewise. + * rs6000/sysv4.h: Likewise. + * s390/linux.h: Likewise. + * sh/linux.h: Likewise. + * sparc/linux-aout.h: Likewise. + * sparc/linux.h: Likewise. + * sparc/linux64.h: Likewise. + * xtensa/linux.h: Likewise. - * configure.in: Do build gcc and the target libraries for - the mn10200. +2002-04-13 Andreas Schwab <schwab@suse.de> -Wed Dec 4 16:53:05 1996 Geoffrey Noer <noer@cygnus.com> + * config/ia64/ia64.h (CPP_SPEC): Include %(cpp_cpu). - * configure.in: don't avoid building gdb for mn10300 any more - * Makefile.in: double-quote GCC_FOR_TARGET line in EXTRA_GCC_FLAGS - instead of single-quoting it. +2002-04-12 Mark Mitchell <mark@codesourcery.com> -Tue Dec 3 23:26:50 1996 Jason Merrill <jason@yorick.cygnus.com> + Revert these changes: - * configure.in: Don't use --with-stabs on IRIX 6. + 2002-04-06 Mark Mitchell <mark@codesourcery.com> -Tue Dec 3 09:05:25 1996 Doug Evans <dje@canuck.cygnus.com> + PR c++/5571 + * stor-layout.c (layout_decl): Reset the RTL for the decl. - * configure.in (m32r): Build gdb, libg++ now. + 2002-03-15 Mark Mitchell <mark@codesourcery.com> -Sun Dec 1 00:18:59 1996 Peter Schauer (pes@regent.e-technik.tu-muenchen.de) + * expr.c (expand_expr): Tidy. - * configure.in (mips*-sgi-irix6*): Remove gdb and related - directories from noconfigdirs. +2002-04-12 Richard Henderson <rth@redhat.com> -Tue Nov 26 11:45:33 1996 Kim Knuttila <krk@cygnus.com> + * config.gcc (sparcv9-*-solaris2): Default to 32-bit code. + (sparc*-*-solaris): Clean up header files. + * configure.in (AS_SPARC64_FLAG): Error out if can't find it + and plan on generating 64-bit code. + * toplev.c (decode_g_option): Remove LINKER_DOES_NOT_WORK_WITH_DWARF2. + * config/sparc/sol2-64.h: Delete and reuse for default 64-bit code. + * config/sparc/sol2-sld-64.h: Rename ... + * config/sparc/sol2-bi.h: ... here. Remove the bits that checked + for AS_SPARC64_FLAG not defined. + * config/sparc/sol2-gld-bi.h: New. + * config/sparc/sol2-sld.h: Remove. + * config/sparc/sol26-sld.h: New. + * config/sparc/sol2.h: Tidy comments. + * doc/install.texi: Document sparc-solaris configury changes. - * config.sub (basic_machine): added mips16 configuration +2002-04-12 Richard Henderson <rth@redhat.com> -Sat Nov 23 19:26:22 1996 Michael Meissner <meissner@tiktok.cygnus.com> + * recog.c (offsettable_address_p): Match the logic in adjust_address. - * config.sub: Handle d10v-unknown. + * config/sparc/sparc.h (LEGITIMIZE_RELOAD_ADDRESS): Handle TFmode + in 64-bit mode only. Use only for 32-bit or MEDLOW. -Sat Nov 23 10:23:01 1996 Gavin Koch <gavin@cygnus.com> +2002-04-12 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE> - * config.sub: Handle v850-unknown. + * config/alpha/osf.h (LINK_SPEC): Pass -S to silence ld warnings. -Thu Nov 21 16:19:44 1996 Geoffrey Noer <noer@cygnus.com> +Fri Apr 12 15:42:59 2002 Jeffrey A Law (law@redhat.com) - * Makefile.in: add findutils - * configure.in: add findutils to list of host_tools + * pa.c (pa_can_combine_p): Call extract_insn before calling + constrain_operands. -Wed Nov 20 10:09:01 1996 Jeffrey A Law (law@cygnus.com) +2002-04-12 Douglas B Rupp <rupp@gnat.com> - * config.sub: Handle mn10200 and mn10300. + * hwint.h (HAVE___INT64): Correct spelling. -Tue Nov 19 16:35:14 1996 Michael Meissner <meissner@tiktok.cygnus.com> + * config/i386/i386-interix.h (EH_FRAME_IN_DATA_SECTION): Define. + (TARGET_ASM_NAMED_SECTION, RETURN_IN_MEMORY) Define. + (DEFAULT_PCC_STRUCT_RETURN): Define as 0. + (CPP_PREDEFINES): Handle __declspec. + * config/i386/t-interix (USER_H): Remove. - * configure.in (d10v-*): Do not build librx. +2002-04-12 DJ Delorie <dj@redhat.com> -Mon Nov 18 13:28:41 1996 Jeffrey A Law (law@cygnus.com) + * integrate.c (compare_blocks): Make comparisons safe for when + sizeof(int) < sizeof(char *). + (find_block): Likewise. - * configure.in (mn10300): Build everything except gdb & libgloss. +2002-04-12 Andreas Schwab <schwab@suse.de> -Wed Nov 13 14:59:46 1996 Per Bothner <bothner@deneb.cygnus.com> + * config/ia64/ia64.h (ASM_SPEC): Moved from here ... + * config/ia64/sysv4.h (ASM_SPEC): ... to here, so that it + overrides the definition in config/svr4.h. - * config.guess: Patch for Dansk Data Elektronik servers, - from Niels Skou Olsen <nso@dde.dk>. +2002-04-12 Eric Norum <eric.norum@usask.ca> - For ncr, use /bin/uname rather than uname, since GNU uname does not - support -p. Suggested by Mark Mitchell <mmitchell@usa.net>. + * config/rtems.h, config/a29k/rtems.h, config/arm/rtems-elf.h, + config/c4x/rtems.h, config/h8300/rtems.h, config/i386/rtems.h, + config/i386/rtemself.h, config/i960/rtems.h, config/m68k/rtems.h, + config/m68k/rtemself.h, config/mips/rtems.h, config/mips/rtems64.h, + config/pa/rtems.h, config/rs6000/rtems.h, config/sh/rtems.h, + config/sh/rtemself.h, config/sparc/rtems.h, config/sparc/rtemself.h, + config/v850/rtems.h (*-rtems*): Cleanup pass to move common + definitions to config/rtems.h and make the targets more similar. - Patch for MIPS R4000 running System V, - from Eric S. Raymond <esr@snark.thyrsus.com>. +Fri Apr 12 08:06:54 2002 Richard Kenner <kenner@vlsi1.ultra.nyu.edu> - Fix thinko for nextstep. + * expr.c (expand_assigment): Remove duplicate conversions #ifdef + POINTERS_EXTEND_UNSIGNED. + (store_constructor, expand_expr, case COMPONENT_REF): Likewise. + (store_expr): Use TYPE_MODE (sizetype), not ptr_mode. - Patch for OSF1 in i?86, from Dan Murphy <dlm@osf.org> via Harlan Stenn. + * emit-rtl.c (widen_memory_access): Don't do anything if MEMOFFSET + not specified. - Sat Jun 24 18:58:17 1995 Morten Welinder <terra+@cs.cmu.edu> - * config.guess: Guess mips-dec-mach_bsd4.3. +2002-04-12 Hans-Peter Nilsson <hp@bitrange.com> - Thu Oct 10 04:07:04 1996 Harlan Stenn <harlan@pfcs.com> - * config.guess (i?86-ncr-sysv*): Emit just enough of the minor - release numbers. - * config.guess (mips-mips-riscos*): Emit just enough of the - release number. + * function.c (fixup_var_refs_1) <SET, handling VAR in SET_SRC>: + For paradoxical (subreg VAR), replace VAR, don't try the subreg. - Tue Oct 8 10:37:22 1996 Frank Vance <fvance@waii.com> - * config.guess (sparc-auspex-sunos*): Added. - (f300-fujitsu-*): Added. +2002-04-12 Andreas Schwab <schwab@suse.de> - Wed Sep 25 22:00:35 1996 Jeff Woolsey <woolsey@jlw.com> - * config.guess: Recognize a Tadpole as a sparc. + * config/ia64/ia64.h (EXTRA_SPECS): Fix missing backslash. -Wed Nov 13 00:53:09 1996 David J. MacKenzie <djm@churchy.gnu.ai.mit.edu> +2002-04-12 Richard Henderson <rth@redhat.com> - * config.guess: Don't assume that NextStep version is either 2 or - 3. NextStep 4 (aka OpenStep 4) has come out now. + PR bootstrap/4191 + * config/d30v/d30v.h (INIT_SECTION_ASM_OP): Don't undef. -Mon Nov 11 23:52:03 1996 David J. MacKenzie <djm@churchy.gnu.ai.mit.edu> + * flow.c (mark_used_reg): Manage reg_cond_dead properly for + modes spanning multiple hard regs. - * config.guess: Support Cray T90 that reports itself as "CRAY TS". - From Rik Faith <faith@cs.unc.edu>. + * recog.c (peephole2_optimize): Rebuild jump labels as needed. -Fri Nov 8 11:34:58 1996 David J. MacKenzie <djm@geech.gnu.ai.mit.edu> +2002-04-11 John David Anglin <dave@hiauly1.hia.nrc.ca> - * config.sub: Contributions from bug-gnu-utils to: - Support plain "hppa" (no version given) architecture, reported by - OpenStep. - OpenBSD like NetBSD. - LynxOs is not a hardware supplier. + * pa.c (output_millicode_call): Check attribute type as well as length + when length is 28. - * config.guess: Contributions from bug-gnu-utils to add support for: - OpenBSD like NetBSD. - Stratus systems. - More Pyramid systems. - i[n>4]86 Intel chips. - M680[n>4]0 Motorola chips. - Use unknown instead of lynx for hardware manufacturer. +2002-04-11 David O'Brien <obrien@FreeBSD.org> -Mon Nov 11 10:09:08 1996 Brendan Kehoe <brendan@lisa.cygnus.com> + * config/freebsd.h (NO_IMPLICIT_EXTERN_C, SCCS_DIRECTIVE): Give value. + (DEFAULT_PCC_STRUCT_RETURN) Do not redefine. + (USER_LABEL_PREFIX, HANDLE_SYSV_PRAGMA, IDENT_ASM_OP, + DWARF2_DEBUGGING_INFO, DBX_DEBUGGING_INFO, PREFERRED_DEBUGGING_TYPE): + elfos.h and dbxelf.h values are fine now. + * config/i386/freebsd.h, config/alpha/freebsd.h + (DEFAULT_PCC_STRUCT_RETURN): Define to 0. - * install.sh (chmodcmd): Set to null if the DST directory already - exists. +2002-04-11 David O'Brien <obrien@FreeBSD.org> -Mon Nov 11 10:43:41 1996 Michael Meissner <meissner@tiktok.cygnus.com> + * config/ia64/aix.h (CPP_PREDEFINES): Do not define _LP64/__LP64__ + or set Acpu or Amachine. Reformat. + (ASM_SPEC, DONT_USE_BUILTIN_SETJMP, PROFILE_BEFORE_PROLOGUE): Do not + define. + (LINK_SPEC): Do not need to undef. + * config/ia64/elf.h (ASM_EXTRA_SPEC): Define. + * config/ia64/freebsd.h (LINK_SPEC): Do not need to undef. + (ASM_SPEC, DONT_USE_BUILTIN_SETJMP, PROFILE_BEFORE_PROLOGUE): Do not + define. + * config/ia64/hpux.h (ASM_EXTRA_SPEC): Define. + (ASM_SPEC): Do not define, use ASM_EXTRA_SPEC instead. + (LINK_SPEC): Do not need to undef. + (DONT_USE_BUILTIN_SETJMP): Do not define. + * config/ia64/ia64.h (ASM_SPEC, ASM_EXTRA_SPEC): Add. + (CPP_CPU_SPEC): Define _LP64, set Acpu and Amachine. Remove -Dia64. + (DONT_USE_BUILTIN_SETJMP, PROFILE_BEFORE_PROLOGUE): Define. + Remove trailing spaces. + * config/ia64/linux.h (CPP_PREDEFINES): Do not define _LP64/__LP64__, + __ELF__, or set Acpu or Amachine. Reformat. + (ASM_SPEC, DONT_USE_BUILTIN_SETJMP, PROFILE_BEFORE_PROLOGUE): Do not + define. - * configure.in (powerpc*-{eabi,elf,linux,rtem,sysv,solaris}*): Do - not use mt-ppc target Makefile fragment any more. +2002-04-11 David O'Brien <obrien@FreeBSD.org> -Sun Nov 3 19:17:07 1996 Stu Grossman (grossman@critters.cygnus.com) + * config.gcc (ia64-*-freebsd*): Fix ordering of tm_files to match + all other *-*-freebsd* targets. - * configure.in (*-*-windows): Exclude everything but those dirs - needed to build windows. +2002-04-11 Richard Sandiford <rsandifo@redhat.com> -Tue Oct 29 16:41:31 1996 Doug Evans <dje@canuck.cygnus.com> + * doc/extend.texi: Remove old claim that typedefs cannot have + an alignment attribute. - * Makefile.in (all-target-winsup): Depend on all-target-librx. +2002-04-11 Jakub Jelinek <jakub@redhat.com> -Mon Oct 28 17:32:46 1996 Stu Grossman (grossman@critters.cygnus.com) + PR optimization/6177 + * expr.c (expand_expr) [COMPONENT_REF]: Handle op0 CONCAT if + bitpos is 0 and bitsize CONCAT size. - * configure.in: Exclude mmalloc from i386-windows. - * config/mh-windows: Add rules for building MSVC makefiles. +2002-04-11 Jakub Jelinek <jakub@redhat.com> -Thu Oct 24 09:22:46 1996 Stu Grossman (grossman@critters.cygnus.com) + PR c/6223 + * combine.c (if_then_else_cond): Use trunc_int_for_mode on nz. - * Undo my previous change. +2002-04-11 David O'Brien <obrien@FreeBSD.org> -Thu Oct 24 12:12:04 1996 Ian Lance Taylor <ian@cygnus.com> + * config/alpha/freebsd.h: Minor reformatting. + (CPP_SPEC): Define ELF and add cpp_subtarget. + (ASM_SPEC): No longer needed. - * Makefile.in (EXTRA_GCC_FLAGS): Pass down GCC_FOR_TARGET - unconditionally. - (MAKEOVERRIDES): Define (revert this part of October 18 change). +2002-04-11 Richard Henderson <rth@redhat.com> -Thu Oct 24 09:02:07 1996 Stu Grossman (grossman@critters.cygnus.com) + * config/sparc/sparc.md (movdi_insn_sp32): Add o/J alternative. + (movdi_insn_sp32_v9): Likewise. Only allow stx with aligned memory. + (dimode mem/zero splitter): New. - * Makefile.in (FLAGS_TO_PASS): Add $(HOST_FLAGS) to allow the - host to add it's own flags. - * config/mh-windows (HOST_FLAGS): Set srcroot, which is needed - for MSVC build procedure. +2002-04-11 Hans-Peter Nilsson <hp@axis.com> -Tue Oct 22 15:20:26 1996 Ian Lance Taylor <ian@cygnus.com> + * config/cris/cris.c (cris_override_options): Tweak error message + for PIC not implemented. - * configure: Handle GCC_FOR_TARGET like CC_FOR_TARGET. + * config/cris/cris.h: Tweak comments related to parameter-passing. -Fri Oct 18 13:37:13 1996 Ian Lance Taylor <ian@cygnus.com> + * config/cris/t-cris (TARGET_LIBGCC2_CFLAGS): Don't -Dinhibit_libc here. - * Makefile.in (CC_FOR_TARGET): Check for xgcc, not Makefile. - (CXX_FOR_TARGET): Likewise. - (GCC_FOR_TARGET): Define. - (BASE_FLAGS_TO_PASS): Remove GCC_FOR_TARGET. - (EXTRA_GCC_FLAGS): Define GCC_FOR_TARGET based on whether - CC_FOR_TARGET was specified on the command line. - (MAKEOVERRIDES): Don't define. + * config/cris/cris.c (cris_target_asm_function_prologue): Cast + uses of PIC_OFFSET_TABLE_REGNUM to int to silence warnings. + (cris_target_asm_function_epilogue): Ditto. + (cris_initial_frame_pointer_offset): Ditto. + (cris_simple_epilogue): Ditto. + (cris_expand_builtin_va_arg): Variable-size types come in + by-reference. -Thu Oct 17 10:27:56 1996 Doug Evans <dje@canuck.cygnus.com> +2002-04-10 Richard Henderson <rth@redhat.com> - * configure.in (m32r): Fix spelling of libg++ libs. + * except.c (add_ehl_entry): Allow duplicates after landing pad + creation. -Thu Oct 10 10:37:17 1996 Stan Shebs <shebs@andros.cygnus.com> +2002-04-10 David Edelsohn <edelsohn@gnu.org> - * config.sub (-apple*): Remove, now redundant. + * config/rs6000/t-aix43 (SHLIB_NM_FLAGS): Add -X32_64. -Thu Oct 10 12:30:54 1996 Ian Lance Taylor <ian@cygnus.com> +2002-04-10 Ulrich Weigand <uweigand@de.ibm.com> - * configure: Don't get confused by CPU-VENDOR-linux-gnu. + * reload1.c (choose_reload_regs): HARD_FRAME_POINTER_REGNUM + is only used as frame pointer when frame_pointer_needed is true. - * configure: Rework yesterday's sed script patch. +2002-04-10 Richard Earnshaw <rearnsha@arm.com> - * config.sub: Merge with FSF. + PR target/817 + * arm.md (arm_movdi): Adjust neg_pool_range attribute to allow + for the fact that the pool entry uses two words. + (movdf_hard_insn): Similarly. Also, ADR instruction can span + 1k bytes. + (movdf_soft_insn): Similarly. + (movxf_hard_insn): Adjust neg_pool_range attribute to allow + for the fact that the pool entry uses three words. -Wed Oct 9 17:24:59 1996 Per Bothner <bothner@deneb.cygnus.com> +2002-04-10 Richard Henderson <rth@redhat.com> - * config.guess: Merge from FSF. + * expr.c (expand_expr) [INTEGER_CST]: Don't force into registers + if EXPAND_INITIALIZER. - 1996-09-12 Richard Stallman <rms@ethanol.gnu.ai.mit.edu> - * config.guess: Use pc instead of unknown, for pc clone systems. - Change linux to linux-gnu. +2002-04-10 Alan Modra <amodra@bigpond.net.au> - Mon Jul 15 23:51:11 1996 Karl Heuer <kwzh@gnu.ai.mit.edu> - * config.guess: Avoid non-portable tr syntax. + PR optimization/6233 + * rtlanal.c (pure_call_p): New function. + * rtl.h (pure_call_p): Declare. + * loop.c (prescan_loop): Use it to set has_nonconst_call. + * gcse.c (store_killed_in_insn): Use pure_call_p here too. -Wed Oct 9 06:06:46 1996 Jeffrey A Law (law@cygnus.com) +2002-04-09 Richard Henderson <rth@redhat.com> - * test-build.mk (HOLES): Add "xargs" for gdb. + * config/alpha/alpha.md (movdi_er_maybe_g): New. + * config/alpha/alpha.c (alpha_expand_mov): Use it. - * configure: Avoid hpux10.20 sed bug. +2002-04-09 Richard Henderson <rth@redhat.com> -Tue Oct 8 08:32:48 1996 Stu Grossman (grossman@critters.cygnus.com) + PR c/5078 + * expr.c (expand_expr) [INTEGER_CST]: Force overflows into registers. - * configure.in config/mh-windows: Add support for windows host - (that is a build done under the Microsoft build environment). +2002-04-09 Andrew MacLeod <amacleod@redhat.com> -Tue Oct 8 10:39:08 1996 Ian Lance Taylor <ian@cygnus.com> + * expr.c (expand_expr): A RESULT_DECL is part of a call. - * Makefile.in: Replace all uses of srcroot with s, to shrink - command line lengths. +2002-04-09 Richard Henderson <rth@redhat.com> - Patches from Geoffrey Noer <noer@cygnus.com>: - * configure.in: If configuring for newlib, pass --with-newlib to - subdirectories. - * Makefile.in (CC_FOR_TARGET): If winsup/Makefile exists, pass a - -Bnewlib/ and -Lwinsup to gcc. - (CXX_FOR_TARGET): Likewise. + * cfg.c (expunge_block): Decrement num_elements here ... + (expunge_block_nocompact): ... not here. + * cfgcleanup.c (delete_unreachable_blocks): Set num_elements. -Mon Oct 7 10:59:35 1996 Ian Lance Taylor <ian@cygnus.com> +2002-04-09 Richard Henderson <rth@redhat.com> - * Makefile.in (ETC_SUPPORT): Add configure. + * basic-block.h (flow_delete_block_noexpunge): Declare. + (expunge_block_nocompact): Declare. + * cfg.c (expunge_block_nocompact): Split out from ... + (expunge_block): ... here. + * cfgrtl.c (can_delete_label_p): Don't use exception_handler_labels. + (flow_delete_block_noexpunge): Split out from ... + (flow_delete_block): ... here. + * cfgcleanup.c (delete_unreachable_blocks): Compact while + removing dead blocks. + * except.c (exception_handler_labels): Remove. + (exception_handler_label_map): New. + (struct eh_region): Add aka member. + (mark_ehl_map_entry, mark_ehl_map, free_region): New. + (ehl_hash, ehl_eq, ehl_free, add_ehl_entry): New. + (for_each_eh_label, for_each_eh_label_1): New. + (init_eh): Register exception_handler_label_map. + (free_eh_status): Use free_region. + (find_exception_handler_labels): Use the map, not the list. + (remove_exception_handler_label): Likewise. + (maybe_remove_eh_handler): Likewise. + (remove_eh_handler): Use the region aka bitmap. + * except.h (exception_handler_labels): Remove. + (for_each_eh_label): Declare. + * jump.c (rebuild_jump_labels): Don't check exception_handler_labels. + * loop.c (invalidate_loops_containing_label): New. + (find_and_verify_loops): Use it. Use for_each_eh_label. + * sched-rgn.c (is_cfg_nonregular): Use + current_function_has_exception_handlers. -Fri Oct 4 12:22:58 1996 Angela Marie Thomas (angela@cygnus.com) +2002-04-08 Richard Henderson <rth@redhat.com> - * configure.in: Use config/mh-dgux386 for i[345]86-dg-dgux - host configuration file. + * reorg.c (get_branch_condition): Use reversed_comparison_code. -Thu Oct 3 09:28:25 1996 Jeffrey A Law (law@cygnus.com) +2002-04-08 Stephane Carrez <Stephane.Carrez@worldnet.fr> - * configure.in: Break mn10x00 support into separate - mn10200 and mn10300 configurations. - * config.sub: Likewise. + * config/m68hc11/larith.asm (__map_data_section): Fix condition + and optimize for size. + (__do_global_ctors): Fix pointer comparison. + (__do_global_dtors): Likewise. -Wed Oct 2 22:27:52 1996 Jeffrey A Law (law@cygnus.com) +2002-04-09 David S. Miller <davem@redhat.com> - * configure.in: Add lots of stuff to noconfigdirs for - the mn10x00 targets. + * config/sparc/sparc.c (sparc_extra_constraint_check): New + function, implementing EXTRA_CONSTRAINTS. For memory constraints, + allow reloading pseudos. + * config/sparc/sparc.h (EXTRA_CONSTRAINTS): Use it. + * config/sparc/sparc-protos.h: Declare it. - * config.sub, configure.in: Add mn10x00 support. + * config/sparc/sparc.c (const64_is_2insns): Kill signed vs. + unsigned comparison warning. + (output_restore_regs): Mark leaf_function as unused. -Wed Oct 2 15:52:36 1996 Klaus Kaempf <kkaempf@progis.de> +Tue Apr 9 09:35:45 2002 Richard Kenner <kenner@vlsi1.ultra.nyu.edu> - * make-all.com: Call conf-a-gas, not config-a-gas. + * expr.c (is_aligning_offset): New function. + (expand_expr, case COMPONENT_EXPR): Call it. -Tue Oct 1 01:28:41 1996 James G. Smith <jsmith@cygnus.co.uk> +2002-04-09 Alan Modra <amodra@bigpond.net.au> - * configure.in (noconfigdirs): Don't build libgloss for arm-coff - targets. + * configure.in (auto-build.h): Use target_alias and build_alias + when running configure. + (gcc_cv_as): Use $target_alias in directory searchs rather than + $target. Heed program_prefix and program_transform_name. Search + for gas in cross-compiler case too. "test -x" rather than "test -f". + (gcc_cv_ld): Likewise. + (gcc_cv_nm): Set for cross compilers too. Heed program_prefix and + program_transform_name. + (gcc_cv_objdump): Likewise. + * configure: Regenerate. -Mon Sep 30 14:24:01 1996 Stan Shebs <shebs@andros.cygnus.com> +2002-04-08 Hans-Peter Nilsson <hp@bitrange.com> - * mpw-README: Add much more detail for native PowerMac. - * mpw-install: New file. - * mpw-configure: Add --norecursion and --help options. - * mpw-config.in: Translate readme and install files when - copying to objdir. - * mpw-build.in: Don't always depend on byacc and flex. - (install-only-top): New action. + * config/mmix/t-mmix (TARGET_LIBGCC2_CFLAGS): Don't -Dinhibit_libc + here. -Fri Sep 27 17:39:44 1996 Stu Grossman (grossman@critters.cygnus.com) + * config/mmix/mmix.h (INITIAL_ELIMINATION_OFFSET): Remove spurious + semicolon. - * configure.in: You can now configure GDB for the v850. + * config/mmix/mmix.c (mmix_expand_builtin_va_arg): Variable-size + types come in by-reference. Fix typo in comment. -Tue Sep 24 19:05:12 1996 Stan Shebs <shebs@andros.cygnus.com> +2002-04-08 Richard Henderson <rth@redhat.com> - * configure.in (noconfigdirs): Don't configure any C++ dirs - if targeting D10V. + PR opt/6007 + * toplev.c (rest_of_compilation): Disable cross-jumping for + highly connected graphs. -Tue Sep 17 12:15:31 1996 Ian Lance Taylor <ian@cygnus.com> +2002-04-08 David S. Miller <davem@redhat.com> - * config.sub: Recognize mips64vr5000. + PR target/6082 + * config/sparc/freebsd.h (SPARC_DEFAULT_CMODEL): Set to CM_MEDLOW -Mon Sep 16 17:00:52 1996 Ian Lance Taylor <ian@cygnus.com> + Make init_priority work on Sparc when using GNU ld. + * config/sparc/linux.h, config/sparc/linux64.h, + config/sparc/netbsd-elf.h, config/sparc/freebsd.h + (CTORS_SECTION_ASM_OP, DTORS_SECTION_ASM_OP): Undefine. + * config/sparc/sol2-gld.h: New file to do the same. + * config.gcc (sparc*-*-solaris2*): If gnu_ld=yes add + sparc/sol2-gld.h to tm_file. - * configure.in: Use a single line for host_tools and native_only. + PR optimization/4328 + * config/sparc/sparc.h (EXTRA_CONSTRAINT): Add new constraint 'W'. + * doc/md.texi: Document it. + * config/sparc/sparc.md (movdi_insn_sp64_novis, + movdi_insn_sp64_vis, movdf_insn_sp32, movdf_insn_v9only_novis, + movdf_insn_v9only_vis, movdf_insn_sp64_novis, + movdf_insn_sp64_vis): Use it as MEM constraing with 'e' registers. + * config/sparc/sparc.c (mem_min_alignment): Fix comment. -Tue Sep 16 09:55:07 1997 Andrew Cagney <cagney@b1.cygnus.com> +2002-04-08 Gerald Pfeifer <pfeifer@dbai.tuwien.ac.at> - * Makefile.in (install-itcl): Install tcl first. + * doc/contrib.texi (Contributors): Add John David Anglin and Loren + J. Rittle (the latter also to Testers). Update David O'Brien's entry. -Sun Sep 14 20:53:42 1997 Geoffrey Noer <noer@cygnus.com> +2002-04-07 David S. Miller <davem@redhat.com> - * config/mh-cygwin32: ok to build split texinfo files + * config.gcc (sparc64-*-linux*): Add t-crtfm to tmake_file. -Fri Sep 12 16:19:20 1997 Geoffrey Noer <noer@cygnus.com> +2002-04-07 John David Anglin <dave@hiauly1.hia.nrc.ca> - * configure.in: remove bison from noconfigdirs for Cygwin32 host + PR 5933 + * pa.h (ASM_OUTPUT_MI_THUNK): Use indirect jump to target function when + generating 32-bit pic code. -Mon Sep 9 12:21:30 1996 Doug Evans <dje@canuck.cygnus.com> +2002-04-07 Franz Sirl <Franz.Sirl-kernel@lauterbach.com> - * config.sub, configure.in: Add entries for m32r. + * config/rs6000/rs6000.h (RS6000_PIC_OFFSET_TABLE_REGNUM): New. + (PIC_OFFSET_TABLE_REGNUM): Use it and return INVALID_REGNUM if + !flag_pic. + (CONDITIONAL_REGISTER_USAGE): Adjust accordingly. + * config/rs6000/rs6000.h: Use RS6000_PIC_OFFSET_TABLE_REGNUM instead + of PIC_OFFSET_TABLE_REGNUM thruout. + * config/rs6000/rs6000.md: Likewise. + * config/rs6000/darwin.h: Likewise. -Mon Sep 8 20:46:20 1997 Ian Lance Taylor <ian@cygnus.com> +2002-04-06 John David Anglin <dave@hiauly1.hia.nrc.ca> - * config.guess: Merge with FSF. + * reorg.c (dbr_schedule): Don't reposition prologue and epilogue notes. -Thu Sep 5 13:52:47 1996 Tom Tromey <tromey@creche.cygnus.com> +2002-04-06 Mark Mitchell <mark@codesourcery.com> - * Makefile.in (inet-install): Don't run install-gzip. + PR c++/5571 + * stor-layout.c (layout_decl): Reset the RTL for the decl. -Wed Sep 4 17:26:13 1996 Stu Grossman (grossman@critters.cygnus.com) + PR opt/5120 + * sibcall.c (optimize_sibling_and_tail_recursive_call): Clear + RTX_UNCHANGING_P for the functions arguments when a tail call + is made. - * configure.in: Don't config lots of things for *-*-windows*. +2002-04-06 Jason Merrill <jason@redhat.com> -Sat Aug 31 11:45:57 1996 Stan Shebs <shebs@andros.cygnus.com> + * toplev.c (flag_no_inline, flag_really_no_inline): Default to 2. + (parse_options_and_default_flags): Set them appropriately. + * c-common.c (c_common_post_options): Don't set flag_really_no_inline. - * mpw-config.in: Test for mpw-true, true, and null-command scripts. - (host_libs, host_tools): Copy from configure.in. - * mpw-configure: Don't complain about directories not found. +Sat Apr 6 18:26:32 CEST 2002 Jan Hubicka <jh@suse.cz> -Thu Aug 29 16:44:58 1996 Michael Meissner <meissner@tiktok.cygnus.com> + * ifcvt.c (if_convert): Clear aux fields of blocks. - * configure.in (i[345]86): Recognize i686 for pentium pro. - (i[3456]86-*-dgux*): Use config/mh-sysv for the host configuration - file. +2002-04-05 David S. Miller <davem@redhat.com> - * config.guess (i[345]86): Ditto. + * config/sparc/freebsd.h (ENDFILE_SPEC): Add crtfastmath bits. + * config.gcc (sparc64-wrs-vxworks, sparc-*-chorusos, + sparc-*-rtems*, sparclite-*-elf* sparc86x-*-elf*, sparc64-*-elf*, + {sparc64,ultrasparc}-*-freebsd*): Add sparc/t-crtfm to tmake_file. -Mon Aug 26 18:34:42 1996 Martin M. Hunt <hunt@pizza.cygnus.com> +2002-04-05 Jan Hubicka <jh@suse.cz> - * configure.in (noconfigdirs): Removed gdb for D10V. + * optabs.c (emit_no_conflict_block, emit_libcall_block): Avoid nesting + of libcall regions. -Thu Aug 22 17:13:52 1996 Jeffrey A Law (law@cygnus.com) +2002-04-05 David S. Miller <davem@redhat.com> - * configure.in: Remove ld, target-libio, target-libg++, and - target-libstdc++ from noconfigdirs. + * config/sparc/sparc.c (sparc_nonflat_function_epilogue): If we + are not going to emit return instructions, emit at least a nop + for the sake of sane backtraces. -Wed Aug 21 18:56:38 1996 Fred Fish <fnf@cygnus.com> +2002-04-05 Jakub Jelinek <jakub@redhat.com> - * configure: Fix three locations where shell scripts were - being run directly rather than with config_shell. + * mklibgcc.in: Use separate libgcc.map for each multilib. + * Makefile.in (distclean): Don't remove libgcc.map here. -Tue Aug 20 13:08:47 1996 J.T. Conklin <jtc@hippo.cygnus.com> +2002-04-05 Jakub Jelinek <jakub@redhat.com> - * configure.in (v850-*-*): Set up initial $noconfigdirs. - * config.sub (basic_machine): Recognize v850. + * Makefile.in (s-mlib): Handle --disable-multilib by separate + genmultilib invocation. -Thu Aug 15 12:19:33 1996 Stan Shebs <shebs@andros.cygnus.com> +2002-04-04 David S. Miller <davem@redhat.com> - * mpw-configure: Handle multiple enable/disable options and - pass them down recursively, handle -c and -s flags appropriately - depending on choice of compiler, add escape mechanism for - quoted arguments to gC. + * config/sparc/crtfastmath.c: New file. + * config/sparc/t-crtfm: New file. + * config/sparc/linux.h (ENDFILE_SPEC): Use crtfastmath.o + * config/sparc/linux64.h (ENDFILE_SPEC): Likewise. + * config/sparc/sol2.h (ENDFILE_SPEC): Likewise. + * config/sparc/sp64-elf.h (ENDFILE_SPEC): Likewise. + * config/sparc/elf.h (ENDFILE_SPEC): Likewise. + * config.gcc (sparc*-*-{elf*,linux*,solaris2*}): Add + sparc/t-crtfm to tmake_file. -Mon Aug 12 13:15:13 1996 Michael Meissner <meissner@tiktok.cygnus.com> +2002-04-05 Alan Modra <amodra@bigpond.net.au> - * configure.in (powerpc*-*-*): For eabi, system V.4, Linux, and - solaris targets, use config/mt-ppc to set C{,XX}FLAGS_FOR_TARGETS - so that -mrelocatable-lib and -mno-eabi are used. + * config/rs6000/t-linux64 (EXTRA_MULTILIB_PARTS): Add crtsavres.o + Add rules to make null object file. - * Makefile.in (CONFIGURE_TARGET_MODULES): If target compiler does - not support --print-multi-lib, don't abort. +2002-04-04 David S. Miller <davem@redhat.com> -Sun Aug 11 20:51:50 1996 Stu Grossman (grossman@critters.cygnus.com) + * calls.c (store_one_arg): If ECF_SIBCALL, use tail_call_reg. - * config/mh-cygwin32 (CFLAGS): Define _WIN32 to be compatible - with normal Windows compilation environment. +2002-04-04 Richard Henderson <rth@redhat.com> -Thu Aug 8 12:18:59 1996 Klaus Kaempf <kkaempf@progis.de> + PR opt/6165 + * alias.c (true_dependence): Force (mem:blk (scratch)) to conflict. + (write_dependence_p): Likewise. - * make-all.com: Run config-a-gas. - * setup.com: Don't copy subdirectory files around. +2002-04-04 Richard Henderson <rth@redhat.com> -Tue Jul 30 17:49:31 1996 Brendan Kehoe <brendan@cygnus.com> + * predict.c (estimate_bb_frequencies): Do frequency calculation + with a volatile temporary. - * configure.in (*-*-ose): Remove exclusion of libgloss for this - target, it now compiles correctly. +2002-04-04 Ulrich Weigand <uweigand@de.ibm.com> -Sat Jul 27 15:10:43 1996 Stan Shebs <shebs@andros.cygnus.com> + * config/s390/linux.h (LOCAL_LABEL_PREFIX): Define. - * mpw-config.in: Generate Mac include for elf/dwarf2.h. +2002-04-04 Jakub Jelinek <jakub@redhat.com> -Tue Jul 23 10:47:04 1996 Martin M. Hunt <hunt@pizza.cygnus.com> + PR c++/6119 + * final.c (final_start_function): Don't bump profile_label_no here... + (final_end_function): ...but here. - * configure.in (d10v-*-*): Remove ld from $noconfigdirs. +2002-04-04 Jakub Jelinek <jakub@redhat.com> -Mon Jul 22 13:28:51 1996 Brendan Kehoe <brendan@lisa.cygnus.com> + * config/sparc/sparc.md (pic): New attribute. + (do_builtin_setjmp_setup): Save %fp, %i7 and %l7 for TARGET_V9 + into stack slots. + (split after do_builtin_setjmp_setup): New. - * configure.in (native_only): Add prms. +2002-04-04 Jakub Jelinek <jakub@redhat.com> -Mon Jul 22 12:27:58 1996 Ian Lance Taylor <ian@cygnus.com> + PR fortran/6106 + * config/sparc/sparc.h (MIN_UNITS_PER_WORD): Backout 2001-01-01 + change. - * Makefile.in (GAS_SUPPORT_DIRS): Add make-all.com and setup.com. - (BINUTILS_SUPPORT_DIRS): Likewise. +2002-04-04 Jakub Jelinek <jakub@redhat.com> -Thu Jul 18 12:55:40 1996 Michael Meissner <meissner@tiktok.cygnus.com> + * config/sparc/sparc.c (sparc_va_arg): Adjust va_list by + UNITS_PER_WORD for zero sized aggregates. - * configure.in (d10v-*-*): Don't configure ld or gdb until the - d10v support is added. +2002-04-04 Gerald Pfeifer <pfeifer@dbai.tuwien.ac.at> -Wed Jul 17 14:33:09 1996 Martin M. Hunt <hunt@pizza.cygnus.com> + * doc/contrib.texi (Contributors): Add David O'Brien. - * configure.in (d10v-*-*): New target. +2002-04-03 David S. Miller <davem@redhat.com> -Mon Jul 15 11:53:00 1996 Jeffrey A Law (law@cygnus.com) + * gcc.c (LINK_GCC_C_SEQUENCE_SPEC): No need for a new + one-character spec for this, just use %(link_gcc_c_sequence). - * config.guess (HP 9000/811): Recognize this as a PA1.1 - machine. +2002-04-04 Alan Modra <amodra@bigpond.net.au> -Fri Jul 12 23:21:17 1996 Ken Raeburn <raeburn@cygnus.com> + * config/rs6000/t-linux64 (EXTRA_MULTILIB_PARTS): Define. - * Makefile.in (do-tar-gz): New target, split out from tail end of - taz target. Run each command separately, don't use pipes. - (taz): Use it. +2002-04-03 David S. Miller <davem@redhat.com> -Fri Jul 12 12:08:04 1996 Stan Shebs <shebs@andros.cygnus.com> + * gcc.c (LINK_GCC_C_SEQUENCE_SPEC): New spec to override the gcc/c + library sequence passed to the linker. + (LINK_COMMAND_SPEC): Use it. + * doc/tm.texi: Document it, and mention from LINK_COMMAND_SPEC as + a macro a target can use to avoid overriding LINK_COMMAND_SPEC. + * config/sparc/sparc.h (LINK_GCC_C_SEQUENCE_SPEC): Define. - * mpw-configure: Look for g-mpw-make.sed in config/mpw. - * mpw-build.in: No builds should depend on building byacc or flex, - they are assumed to be installed already. +2002-04-03 Jason Merrill <jason@redhat.com> -Fri Jul 12 09:52:52 1996 Michael Meissner <meissner@tiktok.cygnus.com> + PR c++/5636 + * tree.h (CLEANUP_EH_ONLY): New macro. + * stmt.c (expand_decl_cleanup_eh): New fn. + (expand_cleanups): Check CLEANUP_EH_ONLY. + * c-semantics.c (genrtl_decl_cleanup): Just take the CLEANUP_STMT. + Use expand_decl_cleanup_eh. + (expand_stmt): Adjust. + * c-common.h: Adjust prototype. - * Makefile.in (CONFIGURE_TARGET_MODULES): Set r environment - variable that CC_FOR_TARGET needs. +2002-04-03 Jakub Jelinek <jakub@redhat.com> -Thu Jul 11 10:09:45 1996 Michael Meissner <meissner@tiktok.cygnus.com> + * configure.in (HAVE_SPARC_UA_PCREL_HIDDEN): Test whether %r_disp32() + works properly with .hidden symbols. + * configure: Rebuilt. + * config.in: Rebuilt. + * config/sparc/sparc.h (ASM_PREFERRED_EH_DATA_FORMAT): Use + DW_EH_PE_absptr for flag_pic && GLOBAL if %r_disp32() doesn't work + properly with .hidden symbols. - * Makefile.in (CONFIGURE_TARGET_MODULES): Determine if the multlib - options have changed since the last time the subdirectory was - configured, and if it has, reconfigure. - (CLEAN_TARGET_MODULES): Delete multilib.out and tmpmulti.out, which - CONFIGURE_TARGET_MODULES uses to remember the old multilib options. +2002-04-03 Jakub Jelinek <jakub@redhat.com> -Wed Jul 10 18:56:59 1996 Doug Evans <dje@canuck.cygnus.com> + PR middle-end/6102 + * df.c (df_insn_refs_record): Use XEXP not SET_DEST to access + USE argument. - * Makefile.in (ALL_MODULES,CROSS_CHECK_MODULES,INSTALL_MODULES, - CLEAN_MODULES): Add bash. - (all-bash): New target. +2002-04-03 Richard Henderson <rth@redhat.com> -Mon Jul 8 17:33:14 1996 Jim Wilson <wilson@cygnus.com> + PR opt/4120 + * sched-rgn.c (sets_likely_spilled): New. + (sets_likely_spilled_1): New. + (add_branch_dependences): Use it. - * configure.in (mips-sgi-irix6*): Use mh-irix6 instead of mh-irix5. +2002-04-02 Richard Henderson <rth@redhat.com> -Mon Jul 1 13:31:35 1996 Michael Meissner <meissner@tiktok.cygnus.com> + PR opt/4311 + * loop.h (LOOP_FIRST_PASS): New. + * loop.c (strength_reduce): Mind it when deciding to unroll. + * toplev.c (rest_of_compilation): Set it. - * config.sub (basic_machine): Recognize d10v as a valid processor. +2002-04-02 David S. Miller <davem@redhat.com> -Fri Jun 28 12:14:35 1996 Stan Shebs <shebs@andros.cygnus.com> + * config/sparc/sparc.md (ldd peephole2s): Fix final arg to + mems_ok_for_ldd_peep when the order of the loads being examined + is reversed. + * config/sparc/sparc.c (mems_ok_for_ldd_peep): Expand upon + existing comment to increase comprehension of this situation. - * mpw-configure: Add support for --bindir. - * mpw-build.in: Use a GCC-specific build script for GCC actions. +2002-04-02 Richard Henderson <rth@redhat.com> -Wed Jun 26 17:20:12 1996 Geoffrey Noer <noer@cygnus.com> + * libgcc2.c (__bb_exit_func): Revert 03-31 change. - * configure.in: add bash, time, gawk to list of hosttools and things - to only build for native toolchains +2002-04-02 Eric Botcazou <ebotcazou@multimania.com> + Richard Henderson <rth@redhat.com> -Tue Jun 25 23:09:03 1996 Jason Molenda (crash@godzilla.cygnus.co.jp) + PR c/5484 + * function.c (assign_temp): Accept either type or decl argument. + Detect variables whose size is too large to fit into an integer. + * stmt.c (expand_decl): Pass the decl, not the type. - * Makefile.in (docdir): Remove. +2002-04-02 David O'Brien <obrien@FreeBSD.org> -Tue Jun 25 19:00:08 1996 Jason Molenda (crash@godzilla.cygnus.co.jp) + * protoize.c: Match include directory usage with cppdefault.c. - * Makefile.in (datadir): Set to $(prefix)/share. +2002-04-03 Jeffrey A Law (law@redhat.com) + Hans-Peter Nilsson <hp@bitrange.com> -Mon Jun 24 23:26:07 1996 Geoffrey Noer <noer@cygnus.com> + * combine.c (simplify_comparison): Avoid narrowing a comparison + with a paradoxical subreg when doing so would drop signficant bits. - * configure.in: build diff and patch for cygwin32-hosted - toolchains. +2002-04-02 David Edelsohn <edelsohn@gnu.org> -Mon Jun 24 15:01:12 1996 Joel Sherrill <joel@merlin.gcs.redstone.army.mil> + * config/rs6000/rs6000.h (WIDEST_HARDWARE_FP_SIZE): Define. - * config.sub: Accept -rtems*. +2002-04-02 Alan Modra <amodra@bigpond.net.au> -Sun Jun 23 22:41:54 1996 Geoffrey Noer <noer@cygnus.com> + * config/rs6000/rs6000.md (ctrdi*): Add FPR constraint and + associated splitter. Remove MQ constraint. + (ctrdi_internal4): Correct CCmode clobber. - * configure.in: enable dosrel for cygwin32-hosted builds, - remove diff from the list of things not buildable - via Canadian Cross +2002-04-03 Hans-Peter Nilsson <hp@bitrange.com> -Sat Jun 22 11:39:01 1996 Jason Merrill <jason@yorick.cygnus.com> + * config/mmix/mmix.md (define_constants): Remove misleading + FIXME. Add MMIX_fp_rO_OFFSET. + ("nonlocal_goto_receiver"): Don't have stack-frame address of + saved rO as part of the pattern. Remove FIXME. + ("*nonlocal_goto_receiver_expanded"): Similar. Generate address + here, at output-time. + * config/mmix/crti.asm (_init): Register _fini with atexit. + * config/mmix/crtn.asm (_fini): Add omitted "POP 0,0". + * config/mmix/mmix.c (mmix_target_asm_function_prologue): Correct + unwind information when frame_pointer_needed. + (mmix_assemble_integer): Tweak wording in comment. - * Makefile.in (TARGET_SUBDIR): Move comment to previous line so we - don't get ". ". +2002-04-02 Richard Henderson <rth@redhat.com> -Fri Jun 21 17:24:48 1996 Jim Wilson <wilson@cygnus.com> + PR opt/3967 + * local-alloc.c (contains_replace_regs): LO_SUM may contain + replace regs. - * configure.in (mips*-sgi-irix6*): Set noconfigdirs appropriately. +2002-04-02 Richard Henderson <rth@redhat.com> -Thu Jun 20 16:57:40 1996 Ken Raeburn <raeburn@cygnus.com> + * doc/standards.texi: Document required freestanding libc entry points. - * Makefile.in (taz): Handle case where tex3patch didn't even get - checked out. Also, if it was found, put the symlink in a new util - subdirectory. +2002-04-02 Alexandre Oliva <aoliva@redhat.com> -Thu Jun 20 12:20:33 1996 Michael Meissner <meissner@tiktok.cygnus.com> + * config/mips/mips.c (mips_va_arg): Apply big-endianness address + offset before loading address of argument passed by transparent + reference. - * config.guess (*:Linux:*:*): Add support for PowerPC Linux. +2002-04-02 Richard Henderson <rth@redhat.com> -Tue Jun 18 14:24:12 1996 Klaus Kaempf (kkaempf@progis.de) + * fixinc/inclhack.def (AAB_solaris_sys_varargs_h): Move and + rename solaris_sys_varargs_h. - * config.sub: Recognize -openvms. - * configure.in (alpha*-*-*vms*): Set noconfigdirs. - * make-all.com, setup.com: New files. +Tue Apr 2 06:47:40 2002 Richard Kenner <kenner@vlsi1.ultra.nyu.edu> -Mon Jun 17 16:34:46 1996 Jason Merrill <jason@yorick.cygnus.com> + * stor-layout.c (layout_type, case ARRAY_TYPE): Give one-element array + the same mode as its component. - * Makefile.in (taz): tex3patch moved to texinfo/util. +2002-04-02 Richard Henderson <rth@redhat.com> -Sat Jun 15 17:13:25 1996 Geoffrey Noer <noer@cygnus.com> + PR opt/420 + * config/m68k/m68k.md (dbcc peepholes): Match four forms of dbra. - * configure: enable_gdbtk=no for cygwin32-hosted toolchains - * configure.in: remove make from disable-if-Can-Cross list - enable gdb if ${host} and ${target} are cygwin32 +2002-04-01 Richard Henderson <rth@redhat.com> -Fri Jun 7 18:16:52 1996 Harlan Stenn <harlan@pfcs.com> + PR target/1538 + * fixinc/inclhack.def (solaris_sys_varargs_h): New. + * fixinc/fixincl.x: Rebuild. - * config.guess (i?86-ncr-sysv*): Emit minor release numbers. - Recognize the NCR 4850 machine and NCR Pentium-based platforms. +2002-04-01 Richard Henderson <rth@redhat.com> -Wed Jun 5 00:09:17 1996 Per Bothner <bothner@wombat.gnu.ai.mit.edu> + * config/ia64/unwind-ia64.c: Include ia64intrin.h. + (atomic_alloc, atomic_free): New. + (SIZE, MASK_FOR, PTR_IN): New. + (emergency_reg_state, emergency_reg_state_free): New. + (emergency_labeled_state, emergency_labeled_state_free): New. + (reg_state_alloced, labeled_state_alloced): New. + (alloc_reg_state, free_reg_state): New. + (alloc_label_state, free_label_state, free_label_states): New. + (push, pop, dup_state_stack, free_state_stack): Use them. + (desc_label_state): Likewise. + (uw_frame_state_for): Free label states and state stack. + (uw_update_reg_address): Eliminate warnings. - * config.guess: Combine mips-mips-riscos cases, and use cpp to - distinguish sysv/svr4/bsd variants. - Based on a patch from Harlan Stenn <harlan@pfcs.com>. +2002-04-01 Loren J. Rittle <ljrittle@acm.org> -Fri Jun 7 14:24:49 1996 Tom Tromey <tromey@creche.cygnus.com> + * doc/install.texi (*-*-freebsd*): Update. - * configure.in: Added copyright notice. - * move-if-change: Added copyright notice. +2002-04-01 Phil Edwards <pme@gcc.gnu.org> -Thu Jun 6 16:27:05 1996 Michael Meissner <meissner@tiktok.cygnus.com> + * version.c: Fix misplaced leading blanks on first line. - * configure.in (powerpcle-*-solaris*): Until we get shared - libraries working, don't build gdb, sim, make, tcl, tk, or - expect. +2002-04-01 Vladimir Makarov <vmakarov@redhat.com> -Tue Jun 4 20:41:45 1996 Per Bothner <bothner@deneb.cygnus.com> + * config/pa/pa-pro-end.h (ASM_OUTPUT_ALIGNED_COMMON, + ASM_OUTPUT_ALIGNED_LOCAL): Redefine them. - * config.guess: Merge with FSF: +2002-04-01 Jim Blandy <jimb@redhat.com> - Mon Jun 3 08:49:14 1996 Karl Heuer <kwzh@gnu.ai.mit.edu> - * config.guess (*:Linux:*:*): Add guess for sparc-unknown-linux. + * cppmacro.c (cpp_macro_definition): Do not emit spaces after + macro formal parameter names. - Fri May 24 18:34:53 1996 Roland McGrath <roland@delasyd.gnu.ai.mit.edu> - * config.guess (AViiON:dgux:*:*): Fix typo in recognizing mc88110. +2002-04-01 Bob Wilson <bob.wilson@acm.org> - Fri Apr 12 20:03:59 1996 Per Bothner <bothner@spiff.gnu.ai.mit.edu> - * config.guess: Combine two OSF1 rules. - Also recognize field test versions. From mjr@zk3.dec.com. - * config.guess (dgux): Use /usr/bin/uname rather than uname, - because GNU uname does not support -p. From pmr@pajato.com. + * config/xtensa/xtensa.c (xtensa_va_arg): Fix compiler warning + in previous change. -Tue Jun 4 11:07:25 1996 Tom Tromey <tromey@csk3.cygnus.com> +2002-04-01 Bob Wilson <bob.wilson@acm.org> - * Makefile.in (MAKEDIRS): Removed $(tooldir). + * config/xtensa/xtensa.c (xtensa_va_arg): Fix to handle arguments + for which MUST_PASS_IN_STACK is true (e.g., variable-sized types). -Tue May 28 12:30:50 1996 Stan Shebs <shebs@andros.cygnus.com> +2002-03-31 Richard Henderson <rth@redhat.com> - * mpw-README: Document GCCIncludes. + * config/ia64/unwind-ia64.c (alloc_spill_area): Fix offset. + (desc_frgr_mem): Fix reference to f16-f31. -Sun May 26 15:16:27 1996 Fred Fish <fnf@cygnus.com> +Sun Mar 31 14:43:24 2002 Richard Kenner <kenner@vlsi1.ultra.nyu.edu> - * configure.in (alpha-*-linux*): Set enable_shared to yes. + * emit-rtl.c (adjust_address_1, offset_address): Cast value to + unsigned HOST_WIDE_INT, not unsigned int. -Tue May 21 15:41:39 1996 Stan Shebs <shebs@andros.cygnus.com> +2002-03-31 Jakub Jelinek <jakub@redhat.com> - * mpw-configure: Handle --enable-FOO and --disable-FOO. + PR middle-end/6096, middle-end/6098, middle-end/6099 + * reorg.c (emit_delay_sequence): Only increment LABEL_NUSES for + CODE_LABELs. + (fill_slots_from_thread): Likewise. -Mon May 20 10:12:29 1996 Geoffrey Noer <noer@cygnus.com> +2002-03-31 Jakub Jelinek <jakub@redhat.com> - * configure.in (*-*-cygwin32): Configure make. + * config/sparc/sparc.c (function_arg_record_value_1): Pass complex + floating fields in float regs. + (function_arg_record_value_2): Likewise. -Tue May 7 14:19:42 1996 Tom Tromey <tromey@snuffle.cygnus.com> +2002-03-31 Jakub Jelinek <jakub@redhat.com> - * Makefile.in (inet-install): Quote value of INSTALL_MODULES. + PR middle-end/6100 + * config/sparc/sparc.c (output_cbranch): Use REG_BR_PROB, not + REG_BR_PRED. + (output_v9branch): Likewise. -Fri May 3 08:57:17 1996 Tom Tromey <tromey@lisa.cygnus.com> +2002-03-31 Alexandre Oliva <aoliva@redhat.com> - * Makefile.in (all-inet): Depend on all-perl. + * gcc.c: Revert previous patch for now. + * config/i386/djgpp.h: Likewise. - * Makefile.in (inet-install): New target. +2002-03-31 Richard Henderson <rth@redhat.com> - * Makefile.in (all-inet): Depend on all-tcl. - (all-inet): Depend on all-send-pr. + PR target/3997 + * config/alpha/elf.h (ASM_OUTPUT_DEF): Tidy. + (ASM_OUTPUT_DEF_FROM_DECLS): New. -Tue Apr 30 13:55:51 1996 Michael Meissner <meissner@tiktok.cygnus.com> +2002-03-31 Richard Henderson <rth@redhat.com> - * configure.in (powerpcle-*-solaris*): Turn off tk and tcl - temporarily. + * libgcc2.c (__bb_exit_func): Make static. -Thu Apr 25 11:48:20 1996 Ian Lance Taylor <ian@cygnus.com> + * config/alpha/alpha.md (trap): New. - * configure.in: Don't configure --with-gnu-ld on AIX. +2002-03-31 Alexandre Oliva <aoliva@redhat.com> -Thu Apr 25 06:33:36 1996 Michael Meissner <meissner@wogglebug.tiac.net> + * gcc.c (LIBGCC_SPEC): Folded %L and duplicate %G here... + (LINK_COMMAND_SPEC): ... from here. + (init_gcc_specs): Duplicate it here too, omitting + shared_name in the second copy. + (init_spec): Test for duplicate + * config/i386/djgpp.h (LINK_COMMAND_SPEC): Remove `%L %G'. - * configure.in (powerpcle-*-solaris*): Turn off gdb temporarily. +2002-03-31 Richard Henderson <rth@redhat.com> -Tue Apr 23 09:07:39 1996 Tom Tromey <tromey@creche.cygnus.com> + * builtins.c (expand_builtin_va_arg): Give warnings not errors for + promoted argument types; build trap. + (expand_builtin_trap): New. + (expand_builtin): Use it. + * stmt.c (expand_nl_goto_receivers): Likewise. + * expr.h (expand_builtin_trap): Declare. + * libfuncs.h (LTI_abort, abort_libfunc): New. + * optabs.c (init_optabs): Init abort_libfunc. - * Makefile.in (ALL_MODULES): Added all-inet. - (CROSS_CHECK_MODULES): Added check-inet. - (INSTALL_MODULES): Added install-inet. - (CLEAN_MODULES): Added clean-inet. - (all-indent): New target. +2002-03-30 David S. Miller <davem@redhat.com> - * configure.in (host_tools): Added inet. - (native_only): Added inet. - (noconfigdirs): Added inet. + * config/sparc/linux.h (HANDLE_PRAGMA_PACK_PUSH_POP): Define. + * config/sparc/linux64.h (HANDLE_PRAGMA_PACK_PUSH_POP): Likewise. -Fri Apr 19 15:35:29 1996 Ian Lance Taylor <ian@cygnus.com> +2002-03-30 Roger Sayle <roger@eyesopen.com> + Richard Henderson <rth@redhat.com> - * configure.in: Don't configure libgloss if we are not configuring - newlib. + * regmove.c (combine_stack_adjustments_for_block): Avoid + emitting a stack adjustment of zero bytes. Let delete_insn + update bb->head. -Wed Apr 17 19:30:01 1996 Rob Savoye <rob@chinadoll.cygnus.com> +2002-03-30 Richard Henderson <rth@redhat.com> - * configure.in: Don't configure libgloss for unsupported - architectures. + * config/sparc/sparc.c: Remove all references to TARGET_EPILOGUE. + (sparc_emitting_epilogue): New. + (leaf_label, output_return, sparc_return_peephole_ok): Remove. + * config/sparc/sparc-protos.h: Update. + * config/sparc/sparc.h (MASK_EPILOGUE, TARGET_EPILOGUE): Remove. + (TARGET_SWITCHES): Update. + * config/sparc/sparc.md (return): Remove. + (return_*): Use sparc_emitting_epilogue, not !TARGET_EPILOGUE. + * config/sparc/freebsd.h, config/sparc/linux64.h, config/sparc/lite.h, + config/sparc/liteelf.h, config/sparc/netbsd-elf.h, + config/sparc/sol2-sld-64.h, config/sparc/sol2.h, + config/sparc/sp64-aout.h, config/sparc/sp64-elf.h, + config/sparc/sp86x-aout.h, config/sparc/sp86x-elf.h, + config/sparc/splet.h, config/sparc/vxsparc64.h (TARGET_DEFAULT): + Remove MASK_EPILOGUE. + * doc/invoke.texi: Update. -Tue Apr 16 11:17:05 1996 Michael Meissner <meissner@tiktok.cygnus.com> +2002-03-30 Daniel Berlin <dan@dberlin.org> - * Makefile.in (CLEAN_MODULES): Add clean-apache. + * dwarf2out.c (dwarf2out_define): Remove start_source_file call, + CPP will start the file for us. -Mon Apr 15 15:09:05 1996 Tom Tromey <tromey@creche.cygnus.com> +2002-03-30 Richard Henderson <rth@redhat.com> - * Makefile.in (ALL_MODULES): Include all-apache. - (CROSS_CHECK_MODULES): Include check-apache. - (INSTALL_MODULES): Include install-apache. - (all-apache): New target. + PR target/5446 + * config/ia64/ia64.c (group_barrier_needed_p): Special case + prologue_allocate_stack. + (ia64_single_set): Use insn codes for recognition of special + cases, not rtl matching. + * config/ia64/ia64.md (prologue_allocate_stack): Op 3 is in-out. - * configure.in: Added apache everywhere perl is seen. +2002-03-30 Richard Henderson <rth@redhat.com> -Mon Apr 15 14:59:13 1996 Michael Meissner <meissner@tiktok.cygnus.com> + PR target/6032 + * config/sparc/sparc.h (OVERRIDE_OPTIONS): Don't override -fpic + or -fomit-frame-pointer with profiling. + (SUBTARGET_OVERRIDE_OPTIONS): Remove. + (FUNCTION_PROFILER): Do nothing. + (PROFILE_HOOK): New. + * config/sparc/sparc.c (sparc_override_options): Don't check + code models for profiling. + (sparc_function_profiler): Remove. + (sparc_profile_hook): New. + * config/sparc/sparc-protos.h: Update. - * Makefile.in: Add support for clean-{module} and - clean-target-{module} rules. +2002-03-30 Jakub Jelinek <jakub@redhat.com> -Wed Apr 10 21:37:41 PDT 1996 Marilyn E. Sander <msander@cygnus.com> + PR optimization/6086 + * combine.c (combine_simplify_rtx): If simplify_rtx failed because + of SUBREG of volatile MEM or because the MEM was mode dependent, + return CLOBBER instead of unmodified SUBREG. - * configure.in (*-*-ose) do not build libgloss. +2002-03-30 David O'Brien <obrien@FreeBSD.org> -Mon Apr 8 16:16:20 1996 Michael Meissner <meissner@tiktok.cygnus.com> + * config/i370/linux.h: Update copyright. - * config.guess (prep*:SunOS:5.*:*): Turn into - powerpele-unknown-solaris2. +2002-03-30 Alexandre Oliva <aoliva@redhat.com> -Mon Apr 8 14:45:41 1996 Ian Lance Taylor <ian@cygnus.com> + * config/mips/mips.c (function_arg_pass_by_reference): Force to 0 + in o32 and o64 ABIs. + * config/mips/abi64.h (MUST_PASS_IN_STACK): Define as in expr.h, + but getting fixed-size structs passed in registers regardless of + padding in o32 and o64 ABIs. - * configure.in: Permit --enable-shared to specify a list of - directories. +2002-03-29 Richard Henderson <rth@redhat.com> -Fri Apr 5 08:17:57 1996 Jason Molenda (crash@phydeaux.cygnus.com) + PR target/5672 + * expr.c (expand_expr): Pass along EXPAND_INITIALIZER one more place. - * configure.in (host==solaris): Pass only the first word of $CC - to /usr/bin/which when checking if we're using /usr/ccs/bin/cc. +2002-03-29 Franz Sirl <Franz.Sirl-kernel@lauterbach.com> -Fri Apr 5 03:16:13 1996 Jason Molenda (crash@phydeaux.cygnus.com) + * config/rs6000/rs6000.c (rs6000_va_arg): Correctly set register count + for aggregate and TFmode types. - * Makefile.in (BASE_FLAGS_TO_PASS): pass down $(MAKE). +2002-03-29 Richard Henderson <rth@redhat.com> -Thu Mar 28 14:11:11 1996 Tom Tromey <tromey@creche.cygnus.com> + PR target/5886 + * config/ia64/aix.h (CPP_PREDEFINES): Add -D_LP64. + * config/ia64/hpux.h, config/ia64/linux.h: Likewise. - * Makefile.in (ALL_MODULES): Include all-perl. - (CROSS_CHECK_MODULES): Include check-perl. - (INSTALL_MODULES): Include install-perl. - (ALL_X11_MODULES): Include all-guile. - (CHECK_X11_MODULES): Include check-guile. - (INSTALL_X11_MODULES): Include install-guile. - (all-perl): New target. - (all-guile): New target. +2002-03-29 Loren J. Rittle <ljrittle@acm.org> - * configure.in (host_tools): Include perl and guile. - (native_only): Include perl and guile. - (noconfigdirs): Don't build guile and perl; no ports have been - done. + * doc/install.texi (*-*-freebsd*): Fix last commit. -Tue Mar 26 21:18:50 1996 Andrew Cagney <cagney@kremvax.highland.com.au> +2002-03-29 Richard Henderson <rth@redhat.com> - * configure (--enable-*): Handle quoted option lists such as - --enable-sim-cflags='-g0 -O' better. + PR target/6041 + * config/i386/i386.c (x86_arch_always_fancy_math_387): New. + (override_options): Disable NO_FANCY_MATH_387 if the arch allows. + * config/i386/i386.h (x86_arch_always_fancy_math_387): New. + * config/i386/i386.md (sqrtxf2, sqrtextendsfxf2, sinxf2): Fix + conditional. + * docs/invoke.texi: Update -mno-fancy-math-387 docs. -Thu Mar 21 11:53:08 1996 Michael Meissner <meissner@tiktok.cygnus.com> +2002-03-29 Loren J. Rittle <ljrittle@acm.org> - * Makefile.in ({,inst}all-target): New rule so we can make and - install all of the target directories easily. + * config.gcc (*-*-freebsd*): Enable creation of libgcc_s.so. + * config/t-slibgcc-elf-ver (SHLIB_LC): Add macro and use it. + No functional change except ... + * config/t-slibgcc-nolc-override (SHLIB_LC): Override it. New file. + * doc/install.texi (*-*-freebsd*): Document port configuration. -Wed Mar 20 18:10:57 1996 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de> +2002-03-29 Jakub Jelinek <jakub@redhat.com> - * configure.in: Add missing global flag in sed substitution when - deleting `target-' from ${configdirs}. + PR c++/5964 + * config/sparc/sparc.md (empty_delay_slot, branch_type): New + attributes. + (length): Compute variable length for branches/calls/jumps here. + (branch, inverted_branch, normal_fp_branch, inverted_fp_branch, + normal_fpe_branch, inverted_fpe_branch): Remove length attribute, + define branch_type attribute. + (divsi3_sp32): Maximum length is 6 not 7. + (call_address_struct_value_sp32, call_symbolic_struct_value_sp32, + call_address_untyped_struct_value_sp32, + call_symbolic_untyped_struct_value_sp32): Set length to 3 not 2. + * config/sparc/sparc.c (empty_delay_slot): New function. + * config/sparc/sparc.h (ADJUST_INSN_LENGTH): Remove. + * config/sparc/sparc-protos.h (empty_delay_slot): Add prototype. -Thu Mar 14 19:15:06 1996 Ian Lance Taylor <ian@cygnus.com> +2002-03-29 Jakub Jelinek <jakub@redhat.com> - * Makefile.in (DO_X): Don't get confused if CC contains `=' in an - option. + * combine.c (set_nonzero_bits_and_sign_copies): Don't call + nonzero_bits if not needed. + (nonzero_bits) [XOR]: Likewise. + (nonzero_bits) [REG]: Use reg_last_set_nonzero_bits even if + reg_last_set_mode and mode are both MODE_INT, but not equal. + (record_value_for_reg): Compute reg_last_set_nonzero_bits + in nonzero_bits_mode for MODE_INT modes. - * configure.in (mips*-nec-sysvr4*): Use a host_makefile_frag of - config/mh-necv4. +2002-03-28 Richard Henderson <rth@redhat.com> - * install.sh: Correct misspelling of transformbasename. + PR target/5715 + * config/alpha/osf.h (ASM_SPEC): Don't pass any special options + to GAS. Correct drift between alternatives. - * config.guess: Recognize mips-*-sysv*. +2002-03-28 Richard Henderson <rth@redhat.com> -Mon Mar 11 15:36:42 1996 Dawn Perchik <dawn@critters.cygnus.com> + PR target/6087 + * reload1.c (fixup_abnormal_edges): Move insn to edge via sequence. - * config.sub: Recognize mon960. +2002-03-28 Alexandre Oliva <aoliva@redhat.com> -Sun Mar 10 13:18:38 1996 Ian Lance Taylor <ian@cygnus.com> + * config/i386/freebsd.h (LINK_SPEC): Don't pass default + emulation to the linker. - * configure: Restore Canadian Cross handling of BISON and LEX, - removed in Feb 20 change. +2002-03-28 Loren J. Rittle <ljrittle@acm.org> -Fri Mar 8 20:07:09 1996 Per Bothner <bothner@kalessin.cygnus.com> + * config/alpha/freebsd.h (LINK_SPEC): Likewise. + * config/sparc/freebsd.h (LINK_SPEC): Likewise. - * README: Suggestions from Torbjorn Granlund <tege@matematik.su.se>: - Mention make install. Remove the old copyright date as well the - clumsy and rather pointless copyright on the README file. +2002-03-28 John David Anglin <dave@hiauly1.hia.nrc.ca> -Fri Mar 8 17:51:35 1996 Ian Lance Taylor <ian@cygnus.com> + * pa-linux.h (LOCAL_LABEL_PREFIX): Define. - * Makefile.in ($(CONFIGURE_TARGET_MODULES)): If there is a - Makefile after running symlink-tree, then run `make distclean' to - avoid clobbering any generated files in srcdir. +Thu Mar 28 16:33:13 2002 Jeffrey A Law (law@redhat.com) -Tue Mar 5 08:21:44 1996 J.T. Conklin <jtc@rtl.cygnus.com> + * combine.c (simplify_and_const_int): Make sure to apply mask + when force_to_mode returns a constant integer. PR3311. - * configure.in (m68k-*-netbsd*): Build everything now. +2002-03-28 Gerald Pfeifer <pfeifer@dbai.tuwien.ac.at> -Wed Feb 28 12:25:46 1996 Jason Merrill <jason@yorick.cygnus.com> + * doc/invoke.texi (Warning Options): Refer to C++ Dialect Options + and Objective-C Dialect Options. - * Makefile.in (taz): Fix quoting. +2002-03-28 Richard Henderson <rth@redhat.com> -Tue Feb 27 11:33:57 1996 Doug Evans <dje@charmed.cygnus.com> + * config/alpha/alpha.c (alpha_emit_conditional_branch): TFmode NE + comparison should be done vs !=0 not >0 return code. Tidy cases. - * configure.in (sparclet-*-*): Build everything now. +2002-03-28 Richard Henderson <rth@redhat.com> -Tue Feb 27 14:31:51 1996 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de> + * c-decl.c (finish_function): New arg can_defer_p. Pass it + on to c_expand_body. + * c-tree.h (finish_function): Update decl. + * c-objc-common.c, c-parse.in, objc/objc-act.c: Update calls. - * configure.in (m68k-*-linux*): New host. +2002-03-27 Andreas Schwab <schwab@suse.de> -Mon Feb 26 14:32:44 1996 Ian Lance Taylor <ian@cygnus.com> + * config/i386/i386.c (classify_argument): Also check for + QUAL_UNION_TYPE. - * configure: Check for bison before byacc. +2002-03-27 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE> -Tue Feb 20 23:12:35 1996 Stu Grossman (grossman@critters.cygnus.com) + * doc/install.texi (alpha*-dec-osf*): Don't need --enable-libgcj + any more. - * Makefile.in configure: Change the way LEX and BISON/YACC are - set. configure now defines DEFAULT_LEX and DEFAULT_YACC by - searching PATH. These are used as fallbacks by Makefile.in if - flex/bison/byacc aren't in objdir. +Wed Mar 27 22:52:02 CET 2002 Zdenek Dvorak <rakdver@atrey.karlin.mff.cuni.cz> -Mon Feb 19 11:45:30 1996 Ian Lance Taylor <ian@cygnus.com> + * cfgrtl.c (merge_blocks_nomove): Use set_block_for_insn instead of + assigning to BLOCK_FOR_INSN directly. - * Makefile.in: Make everything which depends upon all-bfd also - depend upon all-opcodes, in case --with-commonbfdlib is used. +Wed Mar 27 22:46:04 CET 2002 Jan Hubicka <jh@suse.cz> -Thu Feb 15 19:50:50 1996 Michael Meissner <meissner@tiktok.cygnus.com> + * i386.c (ix86_output_addr_diff_elt): Remove binutils bug workaround. - * configure.in (host *-*-cygwin32): Don't build gdb if we are - building NT native compilers on Unix. +2002-03-27 Richard Henderson <rth@redhat.com> -Thu Feb 15 17:42:25 1996 Ian Lance Taylor <ian@cygnus.com> + * toplev.c (rest_of_compilation): Don't compile if we've had errors. - * configure.in: Don't get CC from the host Makefile fragment if we - can find gcc in PATH, or if this is a Canadian Cross. Move the - Solaris test for /usr/ucb/cc to the post target script, just after - the compiler sanity test. +2002-03-27 Richard Henderson <rth@redhat.com> -Wed Feb 14 16:57:40 1996 Ian Lance Taylor <ian@cygnus.com> + * config/sparc/freebsd.h, config/sparc/linux.h, config/sparc/linux64.h, + config/sparc/netbsd-elf.h, config/sparc/pbd.h, config/sparc/sol2.h, + config/sparc/vxsim.h (LOCAL_LABEL_PREFIX): Define. - * config.sub: Merge with FSF. +2002-03-27 Richard Henderson <rth@redhat.com> -Tue Feb 13 14:27:48 1996 Ian Lance Taylor <ian@cygnus.com> + PR target/6054 + * config/ia64/ia64.c (ia64_expand_call): Use pic patterns for + TARGET_CONST_GP. Simplify conditions. - * Makefile.in (RPATH_ENVVAR): New variable. - (REALLY_SET_LIB_PATH): Use it. - * configure.in: On HP/UX, set RPATH_ENVVAR to SHLIB_PATH. +2002-03-26 Vladimir Makarov <vmakarov@redhat.com> -Mon Feb 12 15:28:49 1996 Doug Evans <dje@charmed.cygnus.com> + * pa/pa-pro-end.h (CPP_PREDEFINES): Add -D__pro__. - * config.sub, configure.in: Recognize sparclet cpu. + * pa/lib2funcs.asm: Don't use .SPACE and .SUBSPACE if __pro__ + or __rtems_ is defined. -Mon Feb 12 15:33:59 1996 Christian Bauernfeind <chrisbfd@theorie3.physik.uni-erlangen.de> +2002-03-26 Richard Henderson <rth@redhat.com> - * config.guess: Support m68k-cbm-sysv4. + * config/alpha/alpha.c (alpha_emit_set_const): Add a REG_EQUAL note + if a non-trivial load was emitted. + (alpha_emit_set_const_1): Remove obsolete extension. Fix thinko + in high+extra+low case. -Sat Feb 10 12:06:42 1996 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de> +2002-03-26 Richard Henderson <rth@redhat.com> - * config.guess (*:Linux:*:*): Guess m68k-unknown-linux and - m68k-unknown-linuxaout from linker help string. Put quotes around - $ld_help_string. + * config.gcc (sparc*-solaris): Use float_format=sparc. -Thu Dec 7 09:03:24 1995 Tom Horsley <Tom.Horsley@mail.hcsc.com> +2002-03-26 Richard Henderson <rth@redhat.com> - * config.guess (powerpc-harris-powerunix): Add guess for port - to new target. + * config/sparc/sparc.h (MAX_WCHAR_TYPE_SIZE): Don't define. + * config/sparc/linux-aout.h (MAX_WCHAR_TYPE_SIZE): Don't undef. + * config/sparc/linux.h, config/sparc/linux64.h: Likewise. + * config/sparc/sol2.h (WCHAR_TYPE, WCHAR_TYPE_SIZE): Redefine. + (WINT_TYPE_SIZE): Fix at 32. -Thu Feb 8 15:37:52 1996 Brendan Kehoe <brendan@lisa.cygnus.com> +2002-03-26 Richard Henderson <rth@redhat.com> - * config.guess (UNAME_VERSION): Recognize X4.x as an OSF version. + * toplev.c (rest_of_compilation): Delay emit_initial_value_sets + until after eh landing pad generation. + * config/alpha/alpha.c (alpha_gp_save_rtx): Use gen_mem_addressof. + * config/alpha/alpha.md (exception_receiver_2): Only accept MEMs. -Mon Feb 5 16:36:51 1996 Ian Lance Taylor <ian@cygnus.com> +2002-03-26 Richard Henderson <rth@redhat.com> - * configure.in: If --enable-shared was used, set SET_LIB_PATH to - $(REALLY_SET_LIB_PATH) in Makefile. - * Makefile.in (SET_LIB_PATH): New variable. - (REALLY_SET_LIB_PATH): New variable. - ($(DO_X)): Use $(SET_LIB_PATH). - (install.all, gcc-no-fixedincludes, $(ALL_MODULES)): Likewise. - ($(NATIVE_CHECK_MODULES), $(CROSS_CHECK_MODULES)): Likewise. - ($(INSTALL_MODULES), $(CONFIGURE_TARGET_MODULES)): Likewise. - ($(ALL_TARGET_MODULES), $(CHECK_TARGET_MODULES)): Likewise. - ($(INSTALL_TARGET_MODULES), $(ALL_X11_MODULES)): Likewise. - ($(CHECK_X11_MODULES), $(INSTALL_X11_MODULES)): Likewise. - (all-gcc, all-bootstrap, check-gcc, install-gcc): Likewise. - (install-dosrel): Likewise. - (all-opcodes): Depend upon all-libiberty. + * expr.h (ADD_PARM_SIZE): One more convert for INC. -Sun Feb 4 16:51:11 1996 Steve Chamberlain <sac@slash.cygnus.com> +2002-03-26 David Edelsohn <edelsohn@gnu.org> - * config.guess (*:CYGWIN*): New + * config/rs6000/aix51.h (WCHAR_TYPE): Define. -Sat Feb 3 10:42:35 1996 Michael Meissner <meissner@tiktok.cygnus.com> +2002-03-26 Hans Boehm <Hans_Boehm@hp.com> - * Makefile.in (all-target-winsup): All all-target-libiberty. + * config/ia64/linux.h (MD_FALLBACK_FRAME_STATE_FOR): + Restore more of the signal context. Set no_reg_stack_frame. + * config/ia64/unwind-ia64.c (unw_state_record): + Add no_reg_stack_frame, comments. + (uw_frame_state_for): Initialize when field to UNW_WHEN_NEVER. + (uw_update_context): Adjust bsp when unwinding from leaf, + but not signal frame. -Fri Feb 2 17:58:56 1996 Michael Meissner <meissner@tiktok.cygnus.com> +2002-03-26 Bob Wilson <bob.wilson@acm.org> - * configure.in (noconfigdirs): Add missing # in front of comment. + * config/xtensa/xtensa.c (xtensa_va_arg): Handle variable-sized types. -Thu Feb 1 14:38:13 1996 Geoffrey Noer <noer@cygnus.com> +2002-03-26 Richard Earnshaw <rearnsha@arm.com> - * configure.in: add second pass to things added to noconfigdirs - so *-gm-magic can exclude libgloss properly. + PR target/5621 + * arm.md (define_asm_attributes): Reapply patch of Thu Sep 9, 1999: + "Add a pool_range attribute", which was lost during the ARM/Thumb + merge. -Thu Feb 1 11:10:16 1996 Stan Shebs <shebs@andros.cygnus.com> +2002-03-26 Bob Wilson <bob.wilson@acm.org> - * mpw-configure (extralibs_name, rez_name): Set correctly - for MWC68K compiler. + * config/xtensa/xtensa.c (xtensa_valid_move): Allow move from + a register into the MAC16 accumulator. - * mpw-README: Add more info on the necessary build tools. +2002-03-26 Hartmut Penner <hpenner@de.ibm.com> -Thu Feb 1 10:22:38 1996 Steve Chamberlain <sac@slash.cygnus.com> + * config/s390/s390.c (s390_emit_epilogue): Change epilogue + code to not restoring global registers. - * configure.in, config.sub: Recognize cygwin32. +2002-03-26 Richard Henderson <rth@redhat.com> -Wed Jan 31 14:17:10 1996 Richard Henderson <rth@tamu.edu> + * expr.h (ADD_PARM_SIZE): Cast INC to ssizetype. + (SUB_PARM_SIZE): Cast DEC to ssizetype. - * config.guess, config.sub: Recognize A/UX. + * config/alpha/alpha.c (alpha_va_arg): Read MUST_PASS_IN_STACK + types from the normal argument frame. -Wed Jan 31 13:52:14 1996 Ian Lance Taylor <ian@cygnus.com> + * config/sparc/sparc.c (function_arg_pass_by_reference): Pass + variable sized objects by reference. + (sparc_va_arg): Receive them by reference too. - * config.sub: Merge with gcc/config.sub. +2002-03-25 Bruce Korb <bkorb@gnu.org> -Thu Jan 25 11:01:10 1996 Raymond Jou <rjou@mexican.cygnus.com> + * Makefile.in(check-fixinc): run "$(MAKE) check" in the fixinc + directory when autogen is detected. - * mpw-build.in (do-binutils): Add build of stamps. +2002-03-25 Richard Henderson <rth@redhat.com> -Thu Jan 25 17:05:26 1996 James G. Smith <jsmith@cygnus.co.uk> + * recog.c (peephole2_optimize): Distribute EH_REGION -1 notes + anywhere in the block. Don't refer to insns that have been + removed from the chain. Iterate backward through the new insns. + Don't refer to edges that have been removed. - * config.sub: Add recognition for mips64vr4100*-* targets. +2002-03-26 Alan Modra <amodra@bigpond.net.au> -Wed Jan 24 12:47:55 1996 Brendan Kehoe <brendan@lisa.cygnus.com> + * combine.c (simplify_comparison <ASHIFTRT, LSHIFTRT>): Correct + test for overflow of constant. - * test-build.mk: Add checking of `hpux9' rather than just `hpux'. - Add creation of gconfigargs with `--enable-shared' turned on. - ($(host)-stamp-stage2-configured): Pass $(gconfigargs). - ($(host)-stamp-stage3-configured): Likewise. - (HOLES): Add chatr and ldd. - (i386-ncr-sysv4.3*): Add use of /usr/ccs/bin in the PATH and HOLE_DIRS. +2002-03-25 Richard Earnshaw <rearnsha@arm.com> -Wed Jan 24 20:32:30 1996 Torbjorn Granlund <tege@noisy.matematik.su.se> + PR target/2623 + * arm.md (loadhi_preinc, loadhi_predec, loadhi_shiftpreinc) + (loadhi_shiftpredec, loadhi-with-writeback peephole): Don't use + these patterns on arm_archv4. - * configure: Pass --nfp to recursive configures. +2002-03-22 Nick Clifton <nickc@cambridge.redhat.com> -Mon Jan 22 10:41:56 1996 Steve Chamberlain <sac@slash.cygnus.com> + * config/mcore/mcore.h (CC1_SPEC): Define only if not already + defined. Do not disable exceptions or rtti. + * config/mcore/mcore-pe.h (CC1_SPEC): Define before including + mcore.h. Disable exceptions and rtti, since they are not + supported by EPOC. - * Makefile.in (DLLTOOL): New. - (DLLTOOL_FOR_TARGET): New. - (EXTRA_HOST_FLAGS): Pass down DLLTOOL. - (EXTRA_TARGET_FLAGS): Ditto. - (EXTRA_GCC_FLAGS): Ditto. - (CONFIGURE_TARGET_MODULES): Ditto. - (DO_X): Ditto. - * configure: Add DLLTOOL. +2002-03-25 Jakub Jelinek <jakub@redhat.com> -Fri Jan 19 13:30:15 1996 Stan Shebs <shebs@andros.cygnus.com> + * regrename.c (build_def_use): Move recog_memoized + before extract_insn. - SCO OpenServer 5 changes from Robert Lipe <robertl@dgii.com>: - * configure.in (i[345]86-*-sco3.2v5*): Use mh-sysv instead of - mh-sco, since old workarounds no longer needed, and don't - build ld, since libraries have weak symbols in COFF. +2002-03-25 Jakub Jelinek <jakub@redhat.com> -Sun Jan 14 23:01:31 1996 Fred Fish <fnf@cygnus.com> + PR target/6043 + * expr.c (emit_group_store): Handle storing into CONCAT. - * Makefile.in (CONFIGURE_TARGET_MODULES): Add missing ';'. +2002-03-25 Jakub Jelinek <jakub@redhat.com> -Fri Jan 12 15:25:35 1996 Ian Lance Taylor <ian@cygnus.com> + * regrename.c (build_def_use): Share RTL between MATCH_OPERATOR and + corresponding MATCH_DUP. - * configure.in: Make sure that ${CC} can be used to compile an - executable. +2002-03-24 Richard Henderson <rth@redhat.com> -Sat Jan 6 07:23:33 1996 Michael Meissner <meissner@wogglebug.tiac.net> + * unroll.c (unroll_loop): Zero label_map. - * Makefile.in (all-gdb): Depend on $(GDB_TK). - * configure (GDB_TK): Set GDB_TK to either "all-tcl all-tk" or - nothing depending on whether gdbtk is being built. + * gcse.c: Include except.h. + * Makefile.in (gcse.o): Update. -Wed Jan 3 17:54:41 1996 Doug Evans <dje@canuck.cygnus.com> +2002-03-24 Richard Henderson <rth@redhat.com> - * Makefile.in (newlib.tar.gz): Delete building of newlib's info files. + * varasm.c (asm_emit_uninitialised): Revert 2002-03-14 change. + Do resolve_unique_section before shared data clause. -Mon Jan 1 19:09:14 1996 Brendan Kehoe <brendan@rtl.cygnus.com> +2002-03-24 Richard Henderson <rth@redhat.com> - * configure.in (noconfigdirs): Put ld or gas in this early, if the - user specifically used --with-gnu-ld=no or --with-gnu-as=no. + * config/alpha/elf.h (STARTFILE_SPEC): Use crtbeginT with -static. -Sat Dec 30 16:08:57 1995 Doug Evans <dje@canuck.cygnus.com> +2002-03-24 Richard Henderson <rth@redhat.com> - * config-ml.in: Add support for - --disable-{softfloat,m68881,m68000,m68020} on m68*-*-*. - Simplify setting of multidirs from --disable-foo. + * recog.c (peephole2_optimize): Split blocks when EH insns are + generated in the middle of a block. Do global life update if + zapped EH edges. -Fri Dec 29 07:56:11 1995 Michael Meissner <meissner@tiktok.cygnus.com> +2002-03-24 Richard Henderson <rth@redhat.com> - * Makefile.in (EXTRA_GCC_FLAGS): If any of the make variables - LANGUAGES, BOOT_CFLAGS, STMP_FIXPROTO, LIMITS_H_TEST, - LIBGCC1_TEST, LIBGCC2_CFLAGS, LIBGCC2_INCLUDES, and ENQUIRE are - non-empty, pass them on to the GCC make. - (all-bootstrap): New rule that is like all-gcc, except it executes - the GCC bootstrap rule instead of the GCC all rule. + * mips.c (mips_function_value): Only promote_mode for non-libcalls. -Wed Dec 27 15:51:48 1995 Doug Evans <dje@canuck.cygnus.com> +2002-03-24 Neil Booth <neil@daikokuya.demon.co.uk> - * config-ml.in (ml_realsrcdir): New, to account for ${subdir}. + preprocessor/3951 + * gcc.c (cpp_options): Pass -MD through as -MD not -M -MF. + * cppinit.c (cpp_handle_option): Set no_ouput if -MD or -MMD. + (init_dependency_output): Don't make no_output decision here. -Tue Dec 26 11:45:31 1995 Michael Meissner <meissner@tiktok.cygnus.com> +2002-03-24 Stephane Carrez <Stephane.Carrez@worldnet.fr> - * config.guess (AViiON:dgux:*:*): Update from FSF to add pentium - DG/UX support. + * config/m68hc11/m68hc11.c (m68hc11_autoinc_compatible_p): New function. + (m68hc11_split_move): Call it to see if the source and destination + operands use the same direction auto inc/dec mode, otherwise make the + source an offsetable memory operand and generate an add. -Fri Dec 15 10:01:27 1995 Stan Cox <coxs@dg-rtp.dg.com> +2002-03-24 Stephane Carrez <Stephane.Carrez@worldnet.fr> - * config.sub (i*86*) Change [345] to [3456] + * config/m68hc11/m68hc11.md ("*subsi3_zero_extendhi"): Allow address + register for operand 2. + ("*subsi3_zero_extendqi"): Likewise. + ("*iorhi3_gen"): Do the operation on the upper bits and then lower + bits so that it is compatible with a pop. + ("*andhi3_gen"): Likewise. + ("xorhi3"): Likewise. -Wed Dec 20 17:41:40 1995 Brendan Kehoe <brendan@lisa.cygnus.com> +2002-03-24 Richard Henderson <rth@redhat.com> - * configure.in (noconfigdirs): Add gas or ld if --with-gnu-as=no or - --with-gnu-ld=no. + PR optimization/5742 + * machmode.def: Add inner mode field to complex modes. + * config/mips/mips.c (mips_function_value): Always define. Add + new argument to handle libcalls. + * config/mips/mips.h (LIBCALL_VALUE): Use mips_function_value. + (FUNCTION_VALUE): Likewise. + * config/mips/abi64.h (FUNCTION_VALUE): Remove. + * config/mips/mips-protos.h: Update. -Wed Dec 20 15:15:35 1995 Michael Meissner <meissner@tiktok.cygnus.com> +2002-03-23 Richard Henderson <rth@redhat.com> - * config-ml.in (rs6000*, powerpc*): Add switches to control which - AIX multilibs get built. + * config/sparc/sparc.c (sparc_emit_floatunsdi): New. + * config/sparc/sparc-protos.h: Update. + * config/sparc/sparc.md (floatunsdisf2, floatunsdidf2): New. -Mon Dec 18 17:55:46 1995 Jason Molenda (crash@phydeaux.cygnus.com) +2002-03-23 Richard Henderson <rth@redhat.com> - * configure.in (i386-win32): Don't build expect if we're not - building the tcl subdir. + * config/sparc/gmon-sol2.c (internal_mcount): Assume either + _start or _init begins the text segment. -Mon Dec 18 11:47:19 1995 Stan Shebs <shebs@andros.cygnus.com> +2002-03-23 Alan Modra <amodra@bigpond.net.au> - * Makefile.in: (configure-target-examples, all-target-examples): - New targets, configure and build example programs. + * combine.c (simplify_comparison): When widening modes, ignore + sign extension on CONST_INTs. -Fri Dec 15 16:13:03 1995 Stan Shebs <shebs@andros.cygnus.com> +2002-03-22 Bob Wilson <bob.wilson@acm.org> - * mpw-configure: If an mpw-config.in generated a file mk.sed, - use it as input to sedit the generated MPW makefile. - * mpw-README: Add a suggestion about Gestalt.h. + * config/xtensa/xtensa.c (print_operand): Fix incorrect mode + passed to adjust_address. Fix comment formatting. -Wed Dec 13 16:43:51 1995 Ian Lance Taylor <ian@cygnus.com> +2002-03-22 Alexandre Oliva <aoliva@redhat.com> - * config.sub: Accept *-*-ieee*. + * config/mips/mips.h (MASK_RETURN_ADDR): Define. + (TARGET_PTRMEMFUNC_VBIT_LOCATION): Define. -Tue Dec 12 11:52:57 1995 Ian Lance Taylor <ian@cygnus.com> +2002-03-22 Richard Henderson <rth@redhat.com> - * Makefile.in (local-distclean): Remove $(TARGET_SUBDIR). From - Ronald F. Guilmette <rfg@monkeys.com>. + * c-pragma.c (maybe_apply_renaming_pragma): New. + (handle_pragma_redefine_extname, pending_redefine_extname): New. + (handle_pragma_extern_prefix, pragma_extern_prefix): New. + (init_pragma): Register them. + * c-pragma.h (maybe_apply_renaming_pragma): Declare. + * c-decl.c (finish_decl): Call it. + * cp/decl.c (cp_finish_decl): Likewise. + * doc/extend.texi: Document the new pragmas. -Mon Dec 11 15:31:58 1995 Jason Molenda (crash@phydeaux.cygnus.com) + * config/alpha/osf.h (CPP_SUBTARGET_SPEC): Add __EXTERN_PREFIX. + (HANDLE_PRAGMA_EXTERN_PREFIX): New. - * configure.in (host==powerpc-pe): Add many directories to noconfigdirs - for powerpc-pe native. - (target==i386-win32): add tcl, make to noconfigdirs if canadian cross. - (target==powerpc-pe): duplicate i386-win32 entry. + * config/i386/sol2.h (CPP_PREDEFINES): Add __PRAGMA_REDEFINE_EXTNAME. + (HANDLE_PRAGMA_REDEFINE_EXTNAME): New. + * config/sparc/sol2.h: Likewise. -Sat Dec 9 14:58:28 1995 Jim Wilson <wilson@chestnut.cygnus.com> +2002-03-22 Bob Wilson <bob.wilson@acm.org> - * configure.in (noconfigdirs): Exclude target-newlib for all versions - of vxworks, not just vxworks5.1. + * config/xtensa/xtensa-protos.h (non_acc_reg_operand): Remove. + (xtensa_valid_move, xtensa_preferred_reload_class): Define. + * config/xtensa/xtensa.c (non_acc_reg_operand): Remove. + (xtensa_valid_move, xtensa_preferred_reload_class): Define to + prevent use of sp as a reload register. + (xtensa_emit_move_sequence): Use xtensa_valid_move instead of + non_acc_reg_operand. + * config/xtensa/xtensa.h (PREDICATE_CODES): Remove non_acc_reg_operand. + (PREFERRED_RELOAD_CLASS): Move code to xtensa_preferred_reload_class. + * config/xtensa/xtensa.md (movsi_internal, movhi_internal, + movqi_internal): Use xtensa_valid_move instead of non_acc_reg_operand. -Mon Dec 4 12:05:40 1995 Stan Shebs <shebs@andros.cygnus.com> +2002-03-22 Jakub Jelinek <jakub@redhat.com> - * mpw-configure: Add support for exec-prefix. + PR optimization/5854 + * config/m68hc11/m68hc11.h (CONST_OK_FOR_LETTER_VALUE_P): Use K for 0. + Shut up warnings. + (CONST_DOUBLE_OK_FOR_LETTER_P): Use G for 0.0. + (EXTRA_CONSTRAINT): Use S for non-push memory operand. + * config/m68hc11/m68hc11.c (m68hc11_split_move): Handle setting from + const0 if scratch register was not allocated. + (m68hc11_reload_operands, m68hc11_gen_lowpart, m68hc11_gen_highpart, + m68hc11_z_replacement): Replace gen_rtx (CONST_INT, VOIDmode, ...) + with GEN_INT (...). + (m68hc11_reorg): Compute BLOCK_FOR_INSN before reload_cse_regs. + * config/m68hc11/m68hc11.md: Replace gen_rtx (CONST_INT, VOIDmode, ...) + with GEN_INT (...) everywhere. Remove constraints in define_split + patterns. + (movdi_internal, movdf_internal, movsi_internal, movsf_internal): Don't + require scratch register for setting 0 into regs/non-pushable memory. -Mon Dec 4 10:22:50 1995 Jeffrey A. Law <law@rtl.cygnus.com> +2002-03-22 Alexandre Oliva <aoliva@redhat.com> - * config.guess: Recognize HP model 816 machines as having - a PA1.1 processor. + * flow.c (calculate_global_regs_live): Clear aux fields of + ENTRY and EXIT. -Mon Dec 4 12:38:15 1995 Ian Lance Taylor <ian@cygnus.com> +2002-03-22 Jakub Jelinek <jakub@redhat.com> - * configure: Ignore new autoconf configure options. + * config/v850/v850.c (v850_reorg): Only call alter_subreg on + REG or MEM subregs, pass rtx * instead of rtx to it. + * config/i860/i860.c (output_delayed_branch, output_delay_insn): Pass + rtx * instead of rtx to alter_subreg. + * config/m32r/m32r.c (gen_split_move_double): Likewise. + * config/pj/pj.c (pj_output_rval): Likewise. -Thu Nov 30 14:45:25 1995 J.T. Conklin <jtc@rtl.cygnus.com> +2002-03-22 Richard Henderson <rth@redhat.com> - * config/mt-v810 (CC_FOR_TARGET): Add -ansi flag. NEC compiler - defaults to K&R mode, but doesn't have varargs.h, so we have to - compile in ANSI mode. + PR target/3177 + * config/ia64/ia64.h (CUMULATIVE_ARGS): Add int_regs. + (INIT_CUMULATIVE_ARGS, INIT_CUMULATIVE_INCOMING_ARGS): Update. + * config/ia64/ia64.c (ia64_function_arg_advance): Set int_regs. + (ia64_expand_prologue): Look at int_regs, not words, for number + of incomming int regs. -Thu Nov 30 16:57:33 1995 Per Bothner <bothner@wombat.gnu.ai.mit.edu> +Fri Mar 22 16:00:06 CET 2002 Jan Hubicka <jh@suse.cz> - * config.guess: Recognize Pentium under SCO. - From Robert Lipe <robertl@arnet.com>. + * cfgcleanup.c (outgoing_edges_math): Fix condition; relax + frequencies match; avoid match on different loop depths. + (try_crossjump_to_bb): Kill tests that no longer brings time + savings. + * cfgrtl.c (force_nonfallthru_and_redirect): Fix loop_depth + updating code. + (split_edge): Likewise. -Wed Nov 29 13:49:08 1995 J.T. Conklin <jtc@rtl.cygnus.com> +2002-03-21 Richard Henderson <rth@redhat.com> - * configure.in (noconfigdirs): Disable target-libio on v810-*-*. - * config/mt-v810 (CC_FOR_TARGET, AS_FOR_TARGET, AR_FOR_TARGET, - RANLIB_FOR_TARGET): Set as appropriate for NEC v810 toolchain. + PR target/5996 + * fixinc/inclhack.def (solaris_stdio_tag): New. + * fixinc/fixincl.x: Regenerate. -Wed Nov 29 12:12:01 1995 Ian Lance Taylor <ian@cygnus.com> +2002-03-21 Eric Botcazou <ebotcazou@multimania.com> - * configure.in: Don't configure gas for alpha-dec-osf*. + PR c/5597 + * c-typeck.c (process_init_element): Flag non-static + initialization of a flexible array member as illegal. -Tue Nov 28 17:16:48 1995 Ian Lance Taylor <ian@cygnus.com> +2002-03-22 Alan Modra <amodra@bigpond.net.au> - * configure.in: Default to --with-stabs for some targets for which - it makes sense: mips*-*-*, alpha*-*-osf*, i[345]86*-*-sysv4* and - i[345]86*-*-unixware*. + * config/rs6000/t-linux64: New. + * config.gcc (powerpc64-*-linux* <tmake_file>): Drop t-ppcos and + t-ppccomm. Use t-rs6000 and t-linux64. + (powerpc64-*-gnu* <tmake_file>): Likewise. + * mklibgcc.in (SHLIB_MKMAP_OPTS): New variable. + * mkmap-symver.awk (dotsyms): If set, output .foo as well as foo. + * Makefile.in (SHLIB_MKMAP_OPTS): Pass to mklibgcc. -Mon Nov 27 13:44:15 1995 Ian Lance Taylor <ian@cygnus.com> +2002-03-21 Aldy Hernandez <aldyh@redhat.com> - * config-ml.in: Get list of multidirs using gcc --print-multi-lib - rather than basing it on the target. Simplify handling of options - controlling which directories to configure. Remove extraneous - slash in multi-clean target. + * langhooks.c (lhd_tree_inlining_cannot_inline_tree_fn): Check + flag_really_no_inline instead of optimize == 0. -Fri Nov 24 17:29:29 1995 Doug Evans <dje@deneb.cygnus.com> + * c-objc-common.c (c_cannot_inline_tree_fn): Same. - * config-ml.in: Prefix more variables with ml_ so they don't collide - with configure's. + * cp/tree.c (cp_cannot_inline_tree_fn): Same. -Wed Nov 22 11:27:02 1995 Ian Lance Taylor <ian@cygnus.com> + * flags.h (flag_really_no_inline): New. - * configure: Don't turn -v into --v. + * c-common.c (c_common_post_options): Initialzie + flag_really_no_inline. -Tue Nov 21 16:48:02 1995 Doug Evans <dje@deneb.cygnus.com> + * toplev.c (flag_really_no_inline): New. - * configure.in (targargs): Fix typo. +2002-03-21 Jakub Jelinek <jakub@redhat.com> - * Makefile.in (DEVO_SUPPORT): Add symlink-tree. + * config/avr/avr.md (length): Fix length computation for + conditional branches. -Tue Nov 21 14:08:28 1995 Ian Lance Taylor <ian@cygnus.com> +2002-03-21 Richard Henderson <rth@redhat.com> - * configure.in: Strip --host and --target options from - CONFIG_ARGUMENTS, and always configure for --host only. Add - --with-cross-host option when building with a cross-compiler. - * configure: Canonicalize the arguments put into config.status by - always using `=' for an option with an argument. Pass a presumed - --host or --target explicitly. + * config/rs6000/rs6000.c (rs6000_select_rtx_section): Put symbolic + constants in .data when -fpic. -Fri Nov 17 17:50:30 1995 Stan Shebs <shebs@andros.cygnus.com> +2002-03-21 Tom Tromey <tromey@redhat.com> - * config.sub: Merge -macos*, -magic*, -pe*, and -win32 cases - into general OS recognition case. + * config/i386/sol2.h (ASM_QUAD): Undef. Fixes PR bootstrap/5948. -Fri Nov 17 17:42:25 1995 Jason Molenda (crash@phydeaux.cygnus.com) +2002-03-21 Gerald Pfeifer <pfeifer@dbai.tuwien.ac.at> - * configure.in (target_configdirs): add target-winsup only - for win32 target systems. + * doc/contrib.texi (Contributors): Use GNU/Linux instead of Linux + where appropriate. -Thu Nov 16 14:04:47 1995 Ian Lance Taylor <ian@cygnus.com> +Thu Mar 21 09:50:48 2002 Richard Kenner <kenner@vlsi1.ultra.nyu.edu> - * Makefile.in (all-target-libgloss): Depend upon - configure-target-newlib, since when libgloss is built it looks to - see if the newlib directory exists. + * config/ia64/ia64.c (hfa_element_mode, case ARRAY_TYPE): Recurse. -Wed Nov 15 14:47:52 1995 Ken Raeburn <raeburn@cygnus.com> + * expr.c (emit_group_store): Don't copy const0_rtx to a CONCAT. - * Makefile.in (DEVO_SUPPORT): Use config-ml.in instead of - cfg-ml-*.in. +2002-03-21 Eric Botcazou <ebotcazou@multimania.com> + Richard Henderson <rth@redhat.com> -Wed Nov 15 11:45:23 1995 Ian Lance Taylor <ian@cygnus.com> + PR c/5354: + * c-common.c (c_expand_expr): Preserve result of a statement + expression if needed. - * configure: Handle LD and LD_FOR_TARGET when configuring a - Canadian Cross. +2002-03-21 Jakub Jelinek <jakub@redhat.com> -Tue Nov 14 15:03:12 1995 Jason Molenda (crash@phydeaux.cygnus.com) + PR bootstrap/4195 + * genrecog.c (maybe_both_true_mode): Remove. + (maybe_both_true_2, write_switch): Revert 2001-07-17 changes. + * machmode.def (Pmode): Likewise. - * config/mh-i386win32: add LD_FOR_TARGET. +2002-03-21 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE> -Tue Nov 14 14:56:11 1995 Jason Molenda (crash@phydeaux.cygnus.com) + * fixinc/inclhack.def (alpha_assert): Fix assert macro in Tru64 + UNIX assert.h. + * fixinc/fixincl.x: Regenerate. - * configure.in (target_libs): add target-winsup. - (target==i386-win32): add patch diff flex make to $noconfigdirs. - (target==ppcle-pe): remove ld from $noconfigdirs. +2002-03-20 Jason Merrill <jason@redhat.com> -Tue Nov 14 01:25:50 1995 Doug Evans <dje@canuck.cygnus.com> + * config/i386/cygwin.h (DWARF2_UNWIND_INFO): Define to 0. - * Makefile.in (CONFIGURE_TARGET_MODULES): Pass --with-target-subdir. - Preserve relative path names in $srcdir. Build symlink tree if - configuring cross target dir and srcdir=. (= no VPATH support). - (configure-target-libg++): Depend on configure-target-librx. - * cfg-ml-com.in, cfg-ml-pos.in: Deleted. - * config-ml.in: New file. - * symlink-tree: New file. - * configure: Ensure srcdir="." if that's what it is. +2002-03-20 Bob Wilson <bob.wilson@acm.org> -Mon Nov 13 12:34:20 1995 Stan Shebs <shebs@andros.cygnus.com> + * config/xtensa/xtensa.h (ASM_OUTPUT_POOL_PROLOGUE): Emit a + ".literal_position" directive before the constant pool. - * mpw-README: Clarify some phrasing, add notes about CodeWarrior - includes and FLEX_SKELETON setting. - * mpw-configure (--with-gnu-ld): New option, controls whether - to use PPCLink or ld with PowerMac GCC. - * mpw-build.in (all-grez, do-grez, install-grez): New targets. - * mpw-config.in: Configure grez if targeting Mac. +2002-03-20 Gerald Pfeifer <pfeifer@dbai.tuwien.ac.at> - * config.sub: Accept pmac and pmac-mpw as names for PowerMacs, - accept mpw and mac-mpw as names for m68k Macs, change macos7 to - just macos. - * configure.in: Configure grez resource compiler if targeting Mac. - * Makefile.in (all-grez, install-grez): New targets. + * doc/contrib.texi (Contributors): Update Geoffrey Keating. + Add Craig Rodrigues. + Add Brad Lucier to testers. -Wed Nov 8 17:33:51 1995 Jason Merrill <jason@yorick.cygnus.com> +2002-03-20 Jakub Jelinek <jakub@redhat.com> - * configure: CXX defaults to gcc, not g++. If we find - gcc in the path, set CC to gcc -O2. + PR target/4792 + * config/arc/arc.md (movsicc, movdicc, movsfcc, movdfcc): Add mode + to if_then_else. + (movsicc_insn, movdicc_insn, movsfcc_insn, movdfcc_insn): Likewise. + * config/arc/arc.c (arc_final_prescan_insn): Use extract_insn_cached + instead of insn_extract. -Tue Nov 7 15:45:17 1995 Ian Lance Taylor <ian@cygnus.com> +2002-03-20 Jakub Jelinek <jakub@redhat.com> - * configure: Default ${build} correctly. Avoid picking up extra - spaces when reading CC and CXX from Makefile. When doing a - Canadian Cross, use plausible default values for numerous - variables. - * configure.in: When doing a Canadian Cross, don't try to - configure tools whose configure script can't handle it. + PR bootstrap/4192 + * config/fr30/fr30.md (jump): Remove clobber of fixed register. -Mon Nov 6 19:32:17 1995 Jim Wilson <wilson@chestnut.cygnus.com> + * genemit.c (output_added_clobbers_hard_reg_p): Only output return + stmt if some case has been output. - * cfg-ml-com.in (sh-*-*): Add m2 and ml/m2 to multidirs. +2002-03-20 Jakub Jelinek <jakub@redhat.com> -Sun Nov 5 00:15:41 1995 Per Bothner <bothner@kalessin.cygnus.com> + PR c/5972 + * config/i386/i386.md (movdicc_c_rex64, movsicc_noc, movhicc_noc, + movsfcc_1, movdfcc_1): Add %O2. + * config/i386/i386.c (print_operand): Handle %ON. + Print . before float condition codes in Sun as cmov syntax. + * config/i386/sol2.h (CMOV_SUN_AS_SYNTAX): Define for Sun as. + * config.gcc (i[34567]86-*-solaris2*): Remove comment which is + no longer true. - * configure: Remove dubious bug reporting address. +2002-03-20 Philip Blundell <pb@nexus.co.uk> -Fri Nov 3 08:17:54 1995 Per Bothner <bothner@kalessin.cygnus.com> + * config/arm/arm.c (arm_output_epilogue): Don't generate separate + return instruction if PC was popped. - * Makefile.in ($(CONFIGURE_TARGET_MODULES)): If subdir has - configure script, run that instead of this directory's configure. - In either case, print a message that we're configuring the sub-dir. +2002-03-20 Hans-Peter Nilsson <hp@bitrange.com> -Thu Nov 2 23:23:36 1995 Per Bothner <bothner@kalessin.cygnus.com> + * config/mmix/mmix.md ("fixuns_truncdfdi2"): Use (unsigned_fix:DI + (unsigned_fix:DF op1)), not (unsigned_fix:DI (fix:DF op1)). + ("truncdfsf2"): Correct operator is float_truncate, not fix. + ("*truncdfsf2_real"): Ditto. + ("*nonlocal_goto_receiver_expanded"): Fix output template formatting. - * configure.in: Before checking for the existence of various files, - use sed to filter out "target-". + * config/mmix/mmix.h (WCHAR_TYPE, WCHAR_TYPE_SIZE): Don't define. -Thu Nov 2 13:24:56 1995 Ian Lance Taylor <ian@cygnus.com> +2002-03-19 Jim Blandy <jimb@redhat.com> - * Makefile.in (DO_X): Split rule to decrease command line length - for systems with small ARG_MAX values. From phdm@info.ucl.ac.be - (Philippe De Muyter). + * c-lex.c (cb_file_change): Pass the #inclusion's line number to + the start_source_file debug hook, not the current line number. -Wed Nov 1 15:18:35 1995 Jason Molenda (crash@phydeaux.cygnus.com) + * cppmacro.c (cpp_macro_definition): Emit a space after the macro + name, even if the replacement list contains no tokens, as required + by Dwarf. - * Makefile.in (all-patch): depend on all-libiberty. +2002-03-19 David Edelsohn <edelsohn@gnu.org> -Wed Nov 1 12:23:20 1995 Ian Lance Taylor <ian@cygnus.com> + * config/rs6000/rs6000.c (rs6000_override_options): Only warn + about -fpic/-fPIC if extra_warnings set. - * configure.in: If the only directory in target_configdirs which - actually exists is libiberty, then set target_configdirs to empty, - to avoid trying to build a target libiberty in a gas or gdb - distribution. +2002-03-19 Richard Henderson <rth@redhat.com> -Tue Oct 31 17:52:39 1995 J.T. Conklin <jtc@slave.cygnus.com> + * flow.c (EH_USES): Provide default. + (calculate_global_regs_live): Use it for EH edges and noreturn calls. + * doc/tm.texi (EH_USES): New. - * configure.in (host_makefile_frag): Use m68k-sun-sunos* instead - of m68k-sun-* when selecting mh-sun3 to avoid matching NetBSD/sun3 - systems. + * config/ia64/ia64.c (ia64_eh_uses): New. + * config/ia64/ia64-protos.h: Update. + * config/ia64/ia64.h (EH_USES): New. -Tue Oct 31 16:57:32 1995 Jim Wilson <wilson@chestnut.cygnus.com> +2002-03-20 Alan Modra <amodra@bigpond.net.au> - * configure.in (copy_dirs): Use sys-include instead of include - for --with-headers option. + * defaults.h (SUPPORTS_WEAK): Set if ASM_WEAKEN_DECL. + * varasm.c (assemble_alias): Use ASM_WEAKEN_DECL. + * doc/tm.texi (ASM_WEAKEN_DECL): Document. + (ASM_WEAKEN_LABEL): Mention ASM_WEAKEN_DECL. + (SUPPORTS_WEAK): Likewise. -Tue Oct 31 10:29:36 1995 steve chamberlain <sac@slash.cygnus.com> +2002-03-19 Richard Henderson <rth@redhat.com> - * Makefile.in, configure.in: Make winsup builds work with - new scheme. + PR 5879 + * except.c (current_function_has_exception_handlers): New. + * except.h: Declare it. + * sibcall.c (optimize_sibling_and_tail_recursive_call): Use it. + Combine tests that disable all sibcalls for the function. -Mon Oct 30 18:57:09 1995 Ian Lance Taylor <ian@cygnus.com> +2002-03-19 Richard Henderson <rth@redhat.com> - * configure.in: Build the linker on AIX. + PR 5977, 5991 + * config/ia64/ia64.c: Revert 2002-03-01 patch. + * config/ia64/ia64.h (INIT_EXPANDERS): New. -Mon Oct 30 12:27:16 1995 Per Bothner <bothner@kalessin.cygnus.com> +2002-03-19 Olivier Hainque <hainque@act-europe.fr> - * Makefile.in (CC_FOR_TARGET, CXX_FOR_TARGET): Add $(TARGET_SUBDIR) - where needed. + * varasm.c (output_constant_def): Don't call ENCODE_SECTION_INFO + for INTEGER_CST. -Mon Oct 30 12:45:25 1995 Doug Evans <dje@cygnus.com> +2002-03-19 Jason Merrill <jason@redhat.com> - * Makefile.in (all-gcc): Fix typo. + * varasm.c (globalize_decl): Get the name from the RTL, not + DECL_ASSEMBLER_NAME. -Sat Oct 28 10:27:59 1995 Per Bothner <bothner@kalessin.cygnus.com> + * Makefile.in (LIBGCC2_DEBUG_CFLAGS): Set to -g. - * Makefile.in ($(CHECK_TARGET_MODULES)): Fix typo. +2002-03-19 Dale Johannesen <dalej@apple.com> -Fri Oct 27 23:14:12 1995 Per Bothner <bothner@kalessin.cygnus.com> + PR optimization/5999, middle-end/5731 + * expr.c (expand_expr) [RDIV_EXPR]: Only convert real divisions into + multiplications by reciprocals. - * configure.in: Rename libFOO to target-libFOO, and xiberty - to target-xiberty, to provide more flexibility. - (target_subdir): Define. Create if cross. - Set TARGET_SUBDIR in Makefile to ${target_subdir}. - * Makefile.in: Rename all-libFOO -> all-target-libFOO, all-xiberty - -> all-target-libiberty, configure-libFOO -> configure-target-libFOO, - check-libFOO -> check-target-libFOO, etc. - ($(DO_X)): Iterate over TARGET_CONFIGDIRS after SUBDIRS. - ($(CONFIGURE_TARGET_MODULES), $(CHECK_TARGET_MODULES), - $(ALL_TARGET_MODULES), $(INSTALL_TARGET_MODULES)): Update accordingly. - (configure-target-XXX): Depend on $(ALL_GCC), not all-gcc, to - allow ALL_GCC="" to only configure. - (DEVO_SUPPORT): Add cfg-ml-com.in and cfg-ml-pos.in. - (ETC_SUPPORT, ETC_SUPPORT_PFX): Merge; update 'taz' accordingly. - (LIBGXX_SUPPORT_DIRS): Remove xiberty. +2002-03-19 Bob Wilson <bob.wilson@acm.org> -Sat Oct 28 01:53:49 1995 Ken Raeburn <raeburn@cygnus.com> + * config/xtensa/xtensa.md (adddi3, adddi_carry, subdi3, + subdi_carry): Define. - * Makefile.in (taz): Build "info" in etc explicitly. +Tue Mar 19 14:12:32 2002 Richard Kenner <kenner@vlsi1.ultra.nyu.edu> -Fri Oct 27 09:32:30 1995 Stu Grossman (grossman@cygnus.com) + * config/sparc/sparc.h (CAN_ELMINIATE): Can only eliminate FP + in favor of SP if FRAME_POINTER_REQUIRED is false. - * configure.in: Make sure that CC is undefined (as opposed to - null) if toplevel/config/mh-{host} doesn't define it. Fixes a - problem with autoconf trying to configure on a host without GCC. +2002-03-19 Jakub Jelinek <jakub@redhat.com> -Thu Oct 26 22:35:01 1995 Stan Shebs <shebs@andros.cygnus.com> + PR c/5656 + * langhooks.h (struct lang_hooks_for_tree_inlining): Add + convert_parm_for_inlining. + * c-lang.c (LANG_HOOKS_TREE_INLINING_CONVERT_PARM_FOR_INLINING): + Define. + * langhooks-def.h: Likewise. + * objc/objc-lang.c: Likewise. + * langhooks.c (lhd_tree_inlining_convert_parm_for_inlining): New + function. + * tree-inline.c (initialize_inlined_parameters): + Call convert_parm_for_inlining lang hook if needed. + * c-typeck.c (c_convert_parm_for_inlining): New function. + * c-tree.h (c_convert_parm_for_inlining): Add prototype. - * mpw-configure: Set host alias from choice of host compiler, - only use generic MPW Makefile sed if present, edit a file - named "hacked_Makefile.in" instead of "Makefile.in" if present. - * mpw-README: Add problem notes about CW6 and CW7. +2002-03-18 Kaveh R. Ghazi <ghazi@caip.rutgers.edu> -Thu Oct 26 05:45:10 1995 Ken Raeburn <raeburn@kr-pc.cygnus.com> + * gcse.c (insert_insn_end_bb): Fix typo in last change. - * Makefile.in (taz): Use ";" instead of ";;". +2002-03-18 Mark Mitchell <mark@codesourcery.com> -Wed Oct 25 15:18:24 1995 Per Bothner <bothner@kalessin.cygnus.com> + * calls.c (precompute_arguments): Do not assume that temporaries + can be destroyed after expanding the argument. + (expand_call): Likewise. - * Makefile.in (taz): Grep for '^diststuff:' or '^info:' in - sub-directory Makefiles, instead of using DISTSTUFFDIRS and - DISTDOCDIRS. - (DISTSTUFFDIRS, DISTDOCDIRS): Removed - no longer used. - (newlib.tar.gz): Don't pass DISTDOCDIRS to recursive make. +2002-03-18 Ashif Harji <asharji@uwaterloo.ca> -Wed Oct 25 14:43:55 1995 Per Bothner <bothner@kalessin.cygnus.com> + * gcc.c (struct compiler default_compilers): Add + -no-integrated-cpp flag to invoke an external cpp. + (struct option_map option_map[]): Likewise. + * objc/lang-specs.h (struct compiler default_compilers): Add + -no-integrated-cpp flag to invoke an external cpp. + * doc/invoke.texi: Document -no-integrated-cpp flag. - * Makefile.in (DISTDOCDIRS): Remove ld gprof bnutils gas libg++ gdb - and gnats, because they are now subsumed by DISTSTUFFDIRS. - Move bfd to DISTSTUFFDIRS. +2002-03-18 Alan Modra <amodra@bigpond.net.au> + David Edelsohn <edelsohn@gnu.org> -Tue Oct 24 18:19:09 1995 Jason Molenda (crash@phydeaux.cygnus.com) + * c-pragma.h (HANDLE_PRAGMA_WEAK): Define if ASM_WEAKEN_DECL too. + * config/rs6000/linux64.h (ASM_DECLARE_FUNCTION_NAME): Don't emit + .weak for code sym. Do emit .size for descriptor sym. + (ASM_DECLARE_FUNCTION_SIZE): Define. + * config/rs6000/rs6000.h (ASM_WEAKEN_DECL): Define. + (ASM_OUTPUT_DEF_FROM_DECLS): Don't emit .weak here. Don't output + .lglobl unless TARGET_XCOFF. Formatting fixes. + (PREDICATE_CODES): Add any_operand and zero_constant. + (HANDLE_PRAGMA_PACK): Delete. + * config/rs6000/xcoff.h (ASM_DECLARE_FUNCTION_NAME): Don't emit + .weak for code sym. + (HANDLE_PRAGMA_WEAK): Remove. + (ASM_WEAKEN_LABEL): Remove. + (COLLECT_EXPORT_LIST): Delete. + * config/rs6000/aix.h (HANDLE_SYSV_PRAGMA): Define. + * config/rs6000/darwin.h (HANDLE_SYSV_PRAGMA): Define. - * Makefile.in (X11_LIB): Removed. - (X11_FLAGS_TO_PASS): pass only X11_EXTRA_CFLAGS and X11_EXTRA_LIBS. +2002-03-18 Bob Wilson <bob.wilson@acm.org> - * configure.in (host_makefile_frag): mh-aix & mh-sun removed. + * config/xtensa/xtensa.h (GO_IF_MODE_DEPENDENT_ADDRESS): Treat + constant-pool addresses as "mode-dependent". -Sun Oct 22 13:04:42 1995 Michael Meissner <meissner@tiktok.cygnus.com> +Mon Mar 18 18:12:48 CET 2002 Jan Hubicka <jh@suse.cz> - * cfg-ml-com.in (powerpc*): Shorten some of the multilib directory - names. + * i386.c (override_options): Disallow preferred_stack_boundary to be + less than 16 bytes + (construct_container): Fix end of array check. + (ix86_va_start): Force alignemnt to be 16 bytes. -Fri Oct 20 18:02:10 1995 Michael Meissner <meissner@tiktok.cygnus.com> + * linux64.h (MULTILIB_DEFAULTS): Set to "m64". + (t-linux64): Add multilibing - * cfg-ml-com.in (powerpc*-eabi*): Add mcall-aixdesc varients. + * i386.h (PROMOTE_PROTOTYPES): Set to 0 for x86_64. -Thu Oct 19 10:40:57 1995 steve chamberlain <sac@slash.cygnus.com> + * gcse.c (hash_scan_set): Refuse instructions with EH edges. - * configure.in (i[345]86-*-win32): Always build newlib. - Don't configure cvs, autoconf or texinfo. - * Makefile.in (LD_FOR_TARGET): New. - (BASE_FLAGS_TO_PASS, EXTRA_TARGET_FLAGS, CONFIGURE_TARGET_MODULES): - Pass down LD_FOR_TARGET. + * basic-block.h (fixup_abnormal_edges): Declare. + * reload1.c (fixup_abnormal_edges): Make global. + * reg-stack.c (convert_regs): Use it. -Wed Oct 18 15:53:56 1995 steve chamberlain <sac@slash.cygnus.com> + * gcse.c (insert_insn_end_bb): Handle trapping insns. - * winsup: New directory. - * Makefile.in: Build winsup. - * configure.in: Winsup is configured when target is win32. - Can only build win32 target GDB when native. + * reload1.c (reload_cse_delete_noop_set): Purge dead edges. -Mon Oct 16 09:42:31 1995 Jeffrey A Law (law@cygnus.com) + * recog.c (peephole2_optimize): Re-distribute EH edges. - * config.guess: Recognize HP model 819 machines as having - a PA 1.1 processor. +2002-03-18 Jason Merrill <jason@redhat.com> -Mon Oct 16 10:49:43 1995 Ian Lance Taylor <ian@cygnus.com> + * configure.in: Disable checking by default on release branch. - * configure: Fix sed loop which substitutes for CC and CXX to - avoid bug found in various sed implementations. +2002-03-18 Jakub Jelinek <jakub@redhat.com> -Wed Oct 11 16:16:20 1995 Michael Meissner <meissner@tiktok.cygnus.com> + PR target/5740 + * expr.c (emit_group_load): Use extract_bit_field if + needed for CONCAT arguments. - * cfg-ml-com.in (powerpc-*-eabisim): Delete separate rule for - simulator. Use standard powerpc-*-eabi*. +2002-03-18 Richard Earnshaw <rearnsha@arm.com> + + PR target/4863 + * arm.md (tablejump): Make this a define_expand. For PIC add the + offset to the base of the table. + (thumb_tablejump): Matcher for Thumb tablejump insn. + * config/arm/aout.h (ASM_OUTPUT_ADDR_DIFF_ELT): Output thumb entries + as the difference of two labels. + * config/arm/aof.h (ASM_OUTPUT_ADDR_DIFF_ELT): Likewise. + * config/arm/elf.h (JUMP_TABLES_IN_TEXT_SECTION): Only put ARM jump + tables in the code. + * config/arm/coff.h (JUMP_TABLES_IN_TEXT_SECTION): Likewise. + * arm.c (get_jump_table_size): If the table is not in the text + section, return zero. -Mon Oct 9 17:21:56 1995 Ian Lance Taylor <ian@cygnus.com> +2002-03-17 Richard Henderson <rth@redhat.com> - * configure.in: Stop putting gas and binutils in noconfigdirs for - powerpc-*-aix* and rs6000-*-*. + * config/alpha/alpha.c (alpha_emit_set_const_1): Build add insns + explicitly. -Mon Oct 9 12:38:40 1995 Michael Meissner <meissner@cygnus.com> +2002-03-17 Kaveh R. Ghazi <ghazi@caip.rutgers.edu> - * cfg-ml-com.in (powerpc*-*-eabisim*): Add support for building - -mcall-aixdesc libraries. + * ifcvt.c (dead_or_predicable): Fix uninitialized variable. -Fri Oct 6 16:17:57 1995 Ken Raeburn <raeburn@cygnus.com> +2002-03-17 David Edelsohn <edelsohn@gnu.org> - Mon Sep 25 22:49:32 1995 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de> + * expr.c (expand_expr): Sign-extend CONST_INT generated from + TREE_STRING_POINTER. + +2002-03-16 Richard Henderson <rth@redhat.com> + + * config/ia64/ia64.c (ia64_attribute_table): Move before + targetm definition. Make static. + +2002-03-16 Neil Booth <neil@daikokuya.demon.co.uk> + + * cppinit.c (print_help): Display -MD and -MMD. + Don't display usage string. Update assertion syntax and + typo. + +2002-03-16 Stephane Carrez <Stephane.Carrez@worldnet.fr> + + * config/m68hc11/m68hc11.c (m68hc11_override_options): Don't use + soft registers by default for 68HC12. + (m68hc11_conditional_register_usage): Don't use Z register for 68HC12 + when compiling with -fomit-frame-pointer. + (expand_prologue): Use push/pop to allocate 4-bytes of locals on 68HC12. + (expand_epilogue): Likewise. + (m68hc11_gen_rotate): Use exg when rotating by 8. + +2002-03-16 Stephane Carrez <Stephane.Carrez@worldnet.fr> + + * config/m68hc11/m68hc11-protos.h (ix_reg): Declare. + * config/m68hc11/m68hc11.md ("addsi3"): Use general_operand for sources. + (splits): Remove unused add splits. + ("*addhi3_68hc12"): Tune constraints. + ("addhi_sp"): Try to use X instead of Y in all cases and if the + constant fits in 8-bits and D is dead use abx/aby instructions. + ("*addhi3"): Remove extern declaration of ix_reg. + ("*subsi3"): Optimize and provide new split. + ("subhi3"): Cleanup. + ("*subhi3_sp"): Avoid saving X if we know it is dead. + (arith splits): For 68hc12 save the address register on the stack + and do the arithmetic operation with a pop. + +2002-03-16 Stephane Carrez <Stephane.Carrez@worldnet.fr> + + * config/m68hc11/m68hc11.md ("*movqi_68hc12"): Fix constraints, avoid + allocating QImode in address registers. + ("*movqi_m68hc11"): Likewise. + +2002-03-15 Mark Mitchell <mark@codesourcery.com> + + * expr.c (expand_expr): Revert previous change. + + * c-common.c (statement_code_p): Handle CLEANUP_STMT. + * c-common.def (CLEANUP_STMT): New tree node. + * c-common.h (CLEANUP_DECL): New macro. + (CLEANUP_EXPR): Likewise. + * c-semantics.c (expand_stmt): Handle CLEANUP_STMT. + * expr.c (expand_expr): Tidy. + * tree-dump.c (dequeue_and_dump): Handle CLEANUP_STMT. + * tree-inline.c (initialize_inlined_parameters): Clean up + new local variables. + +2002-03-15 Richard Henderson <rth@redhat.com> + + * c-decl.c: Include c-pragma.h. + (start_decl, start_function): Invoke maybe_apply_pragma_weak. + (finish_function): Tidy. + * c-pragma.c: Include c-common.h. + (pending_weaks, apply_pragma_weak, maybe_apply_pragma_weak): New. + (handle_pragma_weak): Use them. + (init_pragma): Register pending_weaks. + * c-pragma.h (maybe_apply_pragma_weak): Declare. + * print-tree.c (print_node): Print DECL_WEAK. + * varasm.c (mark_weak_decls): Remove. + (remove_from_pending_weak_list): Remove. + (add_weak): Remove. + (asm_emit_uninitialised): Call globalize_decl for weak commons. + (weak_decls): Make a tree_list. + (declare_weak): Cons weak_decls directly. + (globalize_decl): Remove weak_decls elements directly. + (weak_finish): Simplify weak_decls walk. Don't weaken unused + symbols. Don't pretend to handle aliases. + (init_varasm_once): Update weak_decls registry. + * Makefile.in: Update dependencies. + +2002-03-15 Richard Henderson <rth@redhat.com> + + * config/alpha/alpha.c (alpha_va_arg): Manipulate the type + size as a tree. + +2002-03-15 Stephane Carrez <Stephane.Carrez@worldnet.fr> + + * config/m68hc11/m68hc11.md ("tstqi_1"): Try to use ldab instead of tst. + ("tstqi" split): Avoid using memory for tstqi on address register. + (splits): Remove constraints. + ("cmphi_1_hc12"): New from "cmphi_1" and tuned for 68HC12. + ("cmpdf", "cmpsf"): Remove since not used. + ("*tbeq", "*tbne", "*tbeq8", "*tbne8"): Also look in cc_status.value2. + (peephole2): New peepholes to optimize tstqi and pre inc/dec addressing. + +2002-03-15 Stephane Carrez <Stephane.Carrez@worldnet.fr> + + * config/m68hc11/m68hc11.md ("negsi2"): Optimize inline case. + ("neghi2"): Tighten constraints. + ("one_cmplsi2"): Optimize and simplify split. + * config/m68hc11/larith.asm (__negsi2): Likewise for library. + +2002-03-15 Stephane Carrez <Stephane.Carrez@worldnet.fr> + + * config/m68hc11/m68hc11.md ("logicalsi3_zexthi"): Fix constraints + and split of AND operation to clear the upper bits. + ("*logicalsi3_zextqi"): Likewise. + ("*logicallhi3_zexthi_ashift8"): Likewise. + ("*logicalsi3_silshr16"): Likewise. + ("logicalsi3_silshl16"): Likewise. + ("anddi3", "iordi3", "xordi3" splits): Remove constraints. + +2002-03-15 Stephane Carrez <Stephane.Carrez@worldnet.fr> + + * config/m68hc11/m68hc11.c (m68hc11_symbolic_p): New function. + (m68hc11_indirect_p): New function. + (m68hc11_override_options): Must set MASK_NO_DIRECT_MODE for 68HC12. + (m68hc11_gen_highpart): Use TARGET_NO_DIRECT_MODE instead of + TARGET_M6812. + (asm_print_register): Likewise. + * config/m68hc11/m68hc11-protos.h (m68hc11_symbolic_p): Declare. + (m68hc11_indirect_p): Declare. + * config/m68hc11/m68hc11.h (EXTRA_CONSTRAINT): New constraint 'R', 'Q'. + (TARGET_NO_DIRECT_MODE, TARGET_RELAX): New. + (TARGET_SWITCHES): New option -mrelax. + * config/m68hc11/m68hc11.md ("andsi3"): Allow soft register for + destination. + ("iorsi3", "xorsi3"): Likewise. + ("andhi3", "andqi3", "iorhi3", "iorqi3"): Use a define_expand. + ("*andhi3_mem"): New to handle destination in memory with bclr + and a scratch register. + ("*andqi3_mem", "*iorhi3_mem", "*iorqi3_mem"): Likewise. + ("*andhi3_const"): New when operand2 is constant. + ("*andqi3_const", "*iorhi3_const", "*iorqi3_const"): Likewise. + ("*andhi3_gen"): Cleanup of the old "andhi3". + ("*andqi3_gen", "*iorhi3_gen", "*iorqi3_gen"): Likewise. + ("xorqi3"): Update constraints. + +2002-03-15 Stephane Carrez <Stephane.Carrez@worldnet.fr> + + * config/m68hc11/m68hc11.c (m68hc11_small_indexed_indirect_p): Look + for reg_equiv_memory_loc when the operand is a register that does + not get a hard register (stack location). + (tst_operand): After reload, accept all memory operand. + (symbolic_memory_operand): Fix detection of symbolic references. + * config/m68hc11/m68hc11.h (VALID_CONSTANT_OFFSET_P): For 68HC12 + accept symbols and any constant. + +2002-03-15 Stephane Carrez <Stephane.Carrez@worldnet.fr> + + * config/m68hc11/m68hc11.c (emit_move_after_reload): Add a REG_INC + note on the insn that sets the soft frame register. + (must_parenthesize): ix and iy are also reserved names. + (print_operand_address): One more place where parenthesis are required + to avoid confusion with register names. + (m68hc11_gen_movhi): Allow push of stack pointer. + (m68hc11_check_z_replacement): Fix handling of parallel with a + clobber. + (m68hc11_z_replacement): Must update the REG_INC notes to tell what + the replacement register is. + * config/m68hc11/m68hc11.h (REG_CLASS_CONTENTS): Switch Z_REGS + and D8_REGS classes. + (MODES_TIEABLE_P): All modes are tieable except QImode. + +2002-03-15 Stephane Carrez <Stephane.Carrez@worldnet.fr> + + * config/m68hc11/larith.asm (___adddi3): Optimize saving of result. + (___subdi3): Likewise. + (__mulsi3, __mulhi32): Avoid using _.tmp scratch location. + (__map_data_section): Optimize 68hc11 case. + +2002-03-15 Stephane Carrez <Stephane.Carrez@worldnet.fr> + + * config/m68hc11/m68hc11.c (m6812_cost): Make cost of add higher + than a shift to avoid adding a register with itself. + (m68hc11_memory_move_cost): Take into account NO_REGS. + (m68hc11_register_move_cost): Update and use memory move cost + for soft registers. + (m68hc11_address_cost): Make cost of valid offset not 0 so that + it gives more opportunities to cse to optimize. + * config/m68hc11/m68hc11.h (REGISTER_MOVE_COST): Pass the mode. + * config/m68hc11/m68hc11-protos.h (m68hc11_register_move_cost): Update. + +2002-03-15 Jason Merrill <jason@redhat.com> + + * varasm.c (globalize_decl): New fn. + (assemble_start_function): Use it. + (asm_emit_uninitialized): Use it. + (assemble_alias): Use it. + (assemble_variable): Use it. + +2002-03-15 Jason Merrill <jason@redhat.com> + + * varasm.c (assemble_variable): Use zeros for a decl with DECL_INITIAL + of error_mark_node. + +2002-03-15 Jakub Jelinek <jakub@redhat.com> + + PR bootstrap/4128 + * config/sparc/sparc.c (gen_v9_scc): Move early clobber test + before movrXX only, use reg_overlap_mentioned_p. + Only special case NE if just one insn can be generated. + +2002-03-15 Richard Earnshaw <rearnsha@arm.com> + + PR target/5712 + * arm.md (movaddr, movaddr_insn): Delete. + +2002-03-15 Jason Merrill <jason@redhat.com> + + * toplev.c (wrapup_global_declarations): Clarify variable handling. + -fkeep-static-consts doesn't apply to comdats. + +2002-03-14 Richard Henderson <rth@redhat.com> + + PR target/5312 + * config/ia64/ia64.c: Include tm_p.h last. + (gen_nop_type): Remove duplicate definition. + (cycle_end_fill_slots): Set sched_data for second L slot. + (maybe_rotate): Call cycle_end_fill_slots to fill in nop slots. + (nop_cycles_until): Fix typos. + +2002-03-15 Jakub Jelinek <jakub@redhat.com> + + PR optimization/5891 + * unroll.c (copy_loop_body) [CALL_INSN]: Copy SIBLING_CALL_P flag. + +2002-03-14 David Mosberger <davidm@hpl.hp.com>, Hans Boehm <Hans_Boehm@hp.com> + + * config/ia64/unwind-ia64.c: Handle copy_state and label_state + descriptors correctly. + +2002-03-14 Zack Weinberg <zack@codesourcery.com> + + * cpphash.h (struct lexer_state): Remove line_extension member. + * cpplib.c (dequote_string, do_linemarker): New functions. + (linemarker_dir): New data object. + (DIRECTIVE_TABLE): No longer need to interpret #line in + preprocessed source. Delete obsolete comment about return + values of handlers. + (end_directive, directive_diagnostics, _cpp_handle_directive): + Don't muck with line_extension. + (directive_diagnostics): No need to issue warnings for + linemarkers here. + (_cpp_handle_directive): Issue warnings for linemarkers here, + when appropriate. Dispatch linemarkers to do_linemarker, not + do_line. + (do_line): Code to handle linemarkers split out to do_linemarker. + Convert escape sequences in filename argument, both places. + + * cppmacro.c (quote_string): Rename cpp_quote_string and + export. All callers changed. + * cpplib.h (cpp_quote_string): Prototype. + * cppmain.c (print_line): Call cpp_quote_string on to_file + before printing it. - * config.sub (arm | armel | armeb): Fix shell syntax. + * doc/cpp.texi: Document that escapes are now interpreted in + #line and in linemarkers, and that non-printing characters are + converted to octal escapes when linemarkers are generated. -Fri Oct 6 14:40:28 1995 Michael Meissner <meissner@tiktok.cygnus.com> +2002-03-14 Richard Earnshaw <rearnsha@arm.com> + Jeroen Dobbelaere <jeroen.dobbelaere@acunia.com> - * cfg-ml-com.in ({powerpc,rs6000}-ibm-aix*): Add multilibs for - -msoft-float and -mcpu=common support. - (powerpc*-*-eabisim*): Add support for building -mcall-aix - libraries. + PR target/5828 + * arm.c (arm_output_epilogue): Fix floating-point register save + adjustment when using a frame pointer. -Thu Oct 5 13:26:37 1995 Brendan Kehoe <brendan@lisa.cygnus.com> +2002-03-13 Hans-Peter Nilsson <hp@bitrange.com> - * configure.in: Allow configuration and build of emacs19 for the alpha. + * config/mmix/mmix.c: Improve comments. + (mmix_target_asm_function_prologue): Drop variable + empty_stack_frame. Don't allocate unused slot above fp. + (mmix_target_asm_function_epilogue): Mirror prologue changes. + (mmix_expand_builtin_va_arg): Do all computations on trees. + * config/mmix/mmix.h (MMIX_GNU_ABI_REG_ALLOC_ORDER): Don't have + brace in first column. + (enum reg_class): Ditto. + (FIRST_PARM_OFFSET): Now 0. + (USER_LABEL_PREFIX): Remove #if 0:d definition. + (LINK_SPEC): Don't defsym __.MMIX.start..text if linking + relocatably. Always produce ELF, not mmo if linking relocatably. -Wed Oct 4 22:05:36 1995 Jason Molenda (crash@phydeaux.cygnus.com) +2002-03-13 David Edelsohn <edelsohn@gnu.org> - * configure.in (CC): Get ^CC, not just any old CC, from - ${host_makefile_frag}. + * config/rs6000/rs6000.h (PAD_VARARGS_DOWN): Define. + * config/rs6000/rs6000.c (rs6000_va_arg): Use + std_expand_builtin_va_arg if not ABI_V4. -Wed Oct 4 21:55:00 1995 Jason Molenda (crash@phydeaux.cygnus.com) +2002-03-13 Jakub Jelinek <jakub@redhat.com> - * configure.in (CC): Try to get CC from - ${srcdir}/${host_makefile_frag}, not ${host_makefile_frag}. + PR target/5626 + * config/sparc/sparc.md (normal_branch, inverted_branch, + normal_fp_branch, inverted_fp_branch, normal_fpe_branch, + inverted_fp_branch): Adjust calls to output_cbranch. + Set length attribute. + (normal_int_branch_sp64, inverted_int_branch_sp64): Adjust calls to + output_v9branch. Set length attribute. + * config/sparc/sparc.c (fcc0_reg_operand, noov_compare64_op): New + predicates. + (noov_compare_op): Handle CCX_NOOVmode the same way as CC_NOOVmode. + (output_cbranch): Likewise. Handle far branches. + (output_v9branch): Handle far branches. + * config/sparc/sparc-protos.h (output_cbranch, output_v9branch): + Adjust prototypes. + * config/sparc/sparc.h (PREDICATE_CODES): Add fcc0_reg_operand and + noov_compare64_op predicates. -Wed Oct 4 21:44:12 1995 Jason Molenda (crash@phydeaux.cygnus.com) +2002-03-13 Jason Merrill <jason@redhat.com> - * Makefile.in (TARGET_CONFIGDIRS): configure targetdirs - only if it exists in $(srcdir). + * gthr-posix.h (__gthread_active_p): Move __gthread_active_ptr + into the function and constify it. + * gthr-dce.h, gthr-solaris.h: Likewise. -Wed Oct 4 11:52:31 1995 Ian Lance Taylor <ian@cygnus.com> +2002-03-12 Hans-Peter Nilsson <hp@axis.com> - * configure: If CC and CXX are not set in the environment, set - them, based on either an existing Makefile or on searching for gcc - in PATH. Substitute for CC and CXX in Makefile. - * configure.in: Remove libm from target_libs. Separate - target_configdirs from configdirs. If CC is not set in - environment, try to get it from a host Makefile fragment. Rewrite - changes of configdirs to use skipdirs instead. A few minor - tweaks. Take directories out of target_configdirs as they are - taken out of configdirs. Remove existing Makefile files from - subdirectories. Substitute for TARGET_CONFIGDIRS and - CONFIG_ARGUMENTS in Makefile. - * Makefile.in (TARGET_CONFIGDIRS): New variable, automatically set - by configure.in. - (CONFIG_ARGUMENTS): Likewise. - (CONFIGURE_TARGET_MODULES): New variable. - ($(DO_X)): Loop over TARGET_CONFIGDIRS as well as SUBDIRS. - ($(CONFIGURE_TARGET_MODULES)): New target. - (configure-libg++, configure-libio): New targets. - (all-libg++): Depend upon configure-libg++. - (all-libio): Depend upon configure-libio. - (configure-libgloss, all-libgloss): New targets. - (configure-libstdc++): New target. - (all-libstdc++): Depend upon configure-libstdc++. - (configure-librx, all-librx): New targets. - (configure-newlib): New target. - (all-newlib): Depend upon configure-newlib - (configure-xiberty): New target. - (all-xiberty): Depend upon configure-xiberty. + * config/cris/cris.c (cris_print_operand): Avoid + traditional-warning for 0xffffffff. + (cris_expand_builtin_va_arg): Do all computations on trees. -Sat Sep 30 04:32:59 1995 Jason Molenda (crash@phydeaux.cygnus.com) +2002-03-13 Ulrich Weigand <uweigand@de.ibm.com> - * configure.in (host i[345]86-*-win32): Expand the - noconfigdirs again. + * expr.c (expand_expr, case NE_EXPR): Do not call copy_to_reg with + VOIDmode operand. Add compile-time optimization for constant results. -Thu Sep 28 21:18:49 1995 Stan Shebs <shebs@andros.cygnus.com> +2002-03-13 Hartmut Penner <hpenner@de.ibm.com> + + * config/s390/s390.h (PROFILE_BEFORE_PROLOGUE): Emit profile code + before prologue, to avoid scheduling problems. + +2002-03-13 Jakub Jelinek <jakub@redhat.com> + + * config/sparc/sparc.h (INITIAL_FRAME_POINTER_OFFSET): Remove. + (ELIMINABLE_REGS): Add sfp->sp. + (INITIAL_ELIMINATION_OFFSET): Compute sfp->sp offset too. + +2002-03-13 Jakub Jelinek <jakub@redhat.com> + + PR optimization/5892 + * config/ia64/ia64.c (rotate_one_bundle): Update current packet. + +2002-03-13 Jakub Jelinek <jakub@redhat.com> + + * loop.c (basic_induction_var): Don't call convert_modes if mode + classes are different. - * mpw-configure: Fix sed command file name. +2002-03-12 Richard Henderson <rth@redhat.com> -Thu Sep 28 17:39:56 1995 steve chamberlain <sac@slash.cygnus.com> + PR optimization/5901 + * function.c (reposition_prologue_and_epilogue_notes): Position + the markers after/before the last/first insn not deleted. - * configure.in (host i[345]86-*-win32): Reduce the - noconfigdirs again. +2002-03-12 Richard Henderson <rth@redhat.com> -Wed Sep 27 12:24:00 1995 Ian Lance Taylor <ian@cygnus.com> + PR optimization/5878 + * config/arc/arc.h, config/cris/cris.h, config/i386/i386.h, + config/m68k/m68k.h, config/s390/s390.h, config/sparc/sparc.h + (PIC_OFFSET_TABLE_REGNUM): Conditionalize on flag_pic. - * configure.in: Don't configure ld and gdb for powerpc*-*-winnt* - or powerpc*-*-pe*, since they are not yet supported. + * config/arm/arm.h config/i386/i386.h, config/m68k/m68k.h, + config/sparc/sparc.h (CONDITIONAL_REGISTER_USAGE): Set + PIC_OFFSET_TABLE_REGNUM based on INVALID_REGNUM not flag_pic. -Tue Sep 26 14:30:01 1995 Stan Shebs <shebs@andros.cygnus.com> + * config/arc/arc.h (CONDITIONAL_REGISTER_USAGE): New. + * config/arm/arm.c (arm_pic_register): Init to INVALID_REGNUM. + (arm_override_options): Set arm_pic_register if TARGET_APCS_STACK + also. Don't set it if not flag_pic. + * config/i386/i386.c (ix86_save_reg): Trust PIC_OFFSET_TABLE_REGNUM + to be INVALID_REGNUM when not used. - Add PowerMac support and many other enhancements. - * mpw-configure: New option --cc to select compiler to use, - paste options set according to --cc into the generated - Makefile, generate the Makefile by sed'ing the Unix Makefile.in - if mpw-make.sed is present. - * mpw-config.in: Don't test for gC1, test for mpw-touch, - add forward includes for PowerPC include files. - * mpw-build.in: Build using Makefile.PPC if present. - (do-byacc, etc): Remove separate version resource builds. - (do-gas): Build "stamps" before "all". - (do-gcc): Build "stamps-h" and "stamps-c" before "all". - * mpw-README: Update to reflect --cc option, PowerMac support, - and recently-reported compatibility problems. +2002-03-13 Aldy Hernandez <aldyh@redhat.com> -Fri Sep 22 12:15:42 1995 Doug Evans <dje@deneb.cygnus.com> + * expmed.c (store_bit_field): Reset alias set for memory. + (extract_bit_field): Same. - * cfg-ml-com.in (m68*-*-*): Only build multilibs for - embedded m68k systems (-aout, -coff, -elf, -vxworks). - (--with-multilib-top): Pass to recursive invocations. +2002-03-12 Chris Meyer <cmeyer@gatan.com> -Tue Sep 19 13:51:05 1995 J.T. Conklin <jtc@blues.cygnus.com> + * genflags.c (gen_insn): Use IS_VSPACE. + * genoutput.c (output_insn_data): Likewise. + (process_template): Likewise. - * configure.in (noconfigdirs): Disable libg++ and libstdc++ on - v810-*-*. +2002-03-12 Bob Wilson <bob.wilson@acm.org> -Mon Sep 18 23:08:26 1995 J.T. Conklin <jtc@rtl.cygnus.com> + * config/xtensa/xtensa.c (xtensa_expand_block_move): Use + validize_mem() instead of change_address to avoid clobbering + memory attributes. - * configure.in (noconfigdirs): Disable bfd, binutils, gas, gcc, - gdb, ld and opcodes on v810-*-*. +2002-03-12 Jakub Jelinek <jakub@redhat.com> -Sat Sep 16 18:31:08 PDT 1995 Angela Marie Thomas <angela@cygnus.com> + * c-lex.c (cb_ident, c_lex): Remove unnecessary cast. + (lex_string): Use unsigned char pointers. - * config/mh-ncrsvr43: Removed AR_FLAGS +2002-03-12 Ulrich Weigand <uweigand@de.ibm.com> -Tue Sep 12 18:03:31 1995 Ian Lance Taylor <ian@cygnus.com> + * reload1.c (reload): Ignore MEM REG_EQUIV notes if the equivalent + is not a valid memory_operand. - * Makefile.in (DO_X): Change do-realclean to do-maintainer-clean. - (local-maintainer-clean): New target. - (maintainer-clean): New target. - (realclean): Just depend upon maintainer-clean. +2002-03-12 Bob Wilson <bob.wilson@acm.org> -Fri Sep 8 17:11:14 1995 J.T. Conklin <jtc@rtl.cygnus.com> + * config/xtensa/xtensa-config.h: Define XCHAL_HAVE_LOOPS. + * config/xtensa/lib1funcs.asm: Fix copyright to include + special case for libgcc files. + (__udivsi3): Avoid loop instructions when XCHAL_HAVE_LOOPS is 0. + (__divsi3): Likewise. + (__umodsi3): Likewise. + (__modsi3): Likewise. + * config/xtensa/lib2funcs.S: Fix copyright to include + special case for libgcc files. - * configure.in (noconfigdirs): Disable gdb on m68k-*-netbsd*. +2002-03-12 Michael Matz <matz@suse.de> -Fri Sep 8 16:46:29 1995 Ian Lance Taylor <ian@cygnus.com> + * config/rs6000/rs6000.md (ne0+4): Add extra CLOBBER. + (ne0+5): Use new clobber to generate proper shift pattern. - * configure.in: Build ld in mips*-*-bsd* case. +2002-03-12 Bob Wilson <bob.wilson@acm.org> -Thu Sep 7 20:03:41 1995 Ken Raeburn <raeburn@cygnus.com> + * config/xtensa/t-xtensa (CRTSTUFF_T_CFLAGS_S): Define. - * config.sub: Accept -lites* OS. From Ian Dall. +2002-03-12 Bob Wilson <bob.wilson@acm.org> -Fri Sep 1 08:06:58 1995 James G. Smith <jsmith@beauty.cygnus.com> + * config/xtensa/xtensa.h (ASM_OUTPUT_POOL_PROLOGUE): Switch + to function_section before writing out the constant pool. - * config.sub: recognise mips64vr4300 and mips64vr4300el as valid - targets. +2002-03-12 Zack Weinberg <zack@codesourcery.com> -Wed Aug 30 21:06:50 1995 Jason Molenda (crash@phydeaux.cygnus.com) + * Makefile.in: Give texi2pod its input file as a command + line argument, not on stdin. - * configure.in: treat i386-win32 canadian cross the same as - i386-go32 canadian cross. +2002-03-12 Andrew MacLeod <amacleod@redhat.com> -Thu Aug 24 14:53:20 1995 Michael Meissner <meissner@tiktok.cygnus.com> + * config/sparc/sparc.h (RETURN_ADDR_RTX): Include v9 stack bias in + address calculation. - * cfg-ml-com.in (powerpc*-*-eabisim): Add support for PowerPC - running under the simulator to build a reduced set of libraries. - (powerpc-*-eabiaix): Add fine grained multilib support added to - other powerpc targets yesterday. +2002-03-12 Ulrich Weigand <uweigand@de.ibm.com> -Wed Aug 23 09:41:56 1995 Michael Meissner <meissner@tiktok.cygnus.com> + * config/s390/s390.md (reload_insi, reload_indi): Change mode of + scratch register to DImode / TImode. + config/s390/s390.c (s390_expand_plus_operand): Make sure scratch + register used does not overlap the target. - * cfg-ml-com.in (powerpc*): Add support for -disable-biendian, - -disable-softfloat, -disable-relocatable, -disable-aix, and - -disable-sysv to control which multilib libraries get built. +2002-03-11 Neil Booth <neil@daikokuya.demon.co.uk> -Thu Aug 17 16:03:41 1995 Ken Raeburn <raeburn@kr-laptop.cygnus.com> + * Makefile.in: Update. +doc: + * cppenv.texi, cppopts.texi: Split out of cpp.texi and gcc.texi. + Update documentation. + * gcc.texi: Include cppopts.texi and cppenv.texi. + * cpp.texi: Include cppopts.texi and cppenv.texi. - * configure: Add Makefile.tem to list of files to remove in trap - handler. +2002-03-11 Ulrich Weigand <uweigand@de.ibm.com> -Mon Aug 14 19:27:56 1995 Per Bothner <bothner@kalessin.cygnus.com> + * config/s390/s390.h (REG_ALLOC_ORDER): Add missing register. - * config.guess (*Linux*): Add missing "exit"s. - Also, need specific check for alpha-unknown-linux (uses COFF). +2002-03-11 Douglas B Rupp <rupp@gnat.com> -Fri Aug 11 15:38:20 1995 Per Bothner <bothner@kalessin.cygnus.com> + * toplev.c (vms_fopen): Remove, not needed. - * config.guess: Merge with FSF: + * vmsdbgout.c (lookup_filename): Adjust creation date for GMT. - Wed Jun 28 17:57:27 1995 David Edelsohn <edelsohn@mhpcc.edu> - * config.guess (AIX4): More robust release numbering discovery. + * config/alpha/xm-vms.h (__UNIX_FWRITE): Define. - Thu Jun 22 19:01:24 1995 Kenneth Stailey (kstailey@eagle.dol-esa.gov) - * config.guess (i386-sequent-ptx): Properly get version number. + * config/alpha/alpha.c (alpha_sa_size, VMS): Don't reserve space + for FP, already done later. - Thu Jun 22 18:36:42 1995 Uwe Seimet (seimet@iris1.chemie.uni-kl.de) - * config.guess (mips:*:4*:UMIPS): New case. + * toplev.c (debug_args): Add entry for VMS_DEBUG. + * vmsdbgout.c (vmsdbgout_init): Fix typo in call to xmalloc. -Mon Aug 7 09:21:35 1995 Doug Evans <dje@canuck.cygnus.com> +2002-03-10 Richard Henderson <rth@redhat.com> - * configure.in (i386-go32 host): Fix typo (deja-gnu -> dejagnu). - (i386-win32 host): Likewise. Don't build readline. + PR 5693 + * reload.c (copy_replacements_1): New. + (copy_replacements): Use it to recurse through the rtx. -Sat Aug 5 09:51:49 1995 Fred Fish <fnf@rtl.cygnus.com> +2002-03-10 Richard Henderson <rth@redhat.com> - * Makefile.in (GDBTK_SUPPORT_DIRS): Define and pass as part of - SUPPORT_FILES to submakes. + * sched-rgn.c (add_branch_dependences): Don't allow insns that throw + to move away from the end of the block. -Fri Aug 4 13:04:36 1995 Fred Fish <fnf@cygnus.com> +2002-03-10 Neil Booth <neil@daikokuya.demon.co.uk> - * Makefile.in (GDB_SUPPORT_DIRS): Add utils. - (DEVO_SUPPORT): Add mpw-README, mpw-build.in, mpw-config.h and - mpw-configure. + PR preprocessor/5899 + * cppinit.c (init_dependency_output): Don't ignore -dM etc. -Wed Aug 2 16:32:40 1995 Ken Raeburn <raeburn@cygnus.com> +2002-03-10 Kaveh R. Ghazi <ghazi@caip.rutgers.edu> - * configure.in (appdirs): Use =, not ==, in test expression when - trying to build the text to print in the warning message for - Solaris users. + * combine.c (make_extraction): Fix error in last change. -Mon Jul 31 09:56:18 1995 steve chamberlain <sac@slash.cygnus.com> +2002-03-09 Jakub Jelinek <jakub@redhat.com> - * cfg-ml-com.in (z8k-*-coff): Add 'std' multilib build. + PR optimization/5172, optimization/5200 + * gcse.c (gcse_main): Disable store_motion. -Fri Jul 28 00:16:31 1995 Jeffrey A. Law <law@rtl.cygnus.com> +2002-03-09 Andreas Schwab <schwab@suse.de> - * config.guess: Recognize lynx-2.3. + * gcc.c (validate_all_switches): Also handle `%W{...}'. -Thu Jul 27 15:47:59 1995 steve chamberlain <sac@slash.cygnus.com> +2002-03-09 Jakub Jelinek <jakub@redhat.com> - * config.sub (z8ksim): Deleted - (z8k-*-coff): New, this is the one true name of the target. + PR middle-end/5877 + * expr.c (highest_pow2_factor): Check TREE_INT_CST_LOW + even for non-representable constants. -Thu Jul 27 14:33:33 1995 Doug Evans <dje@canuck.cygnus.com> +Sat Mar 9 07:20:01 2002 Richard Kenner <kenner@vlsi1.ultra.nyu.edu> - * cfg-ml-pos.in (dotdot): Work around SunOS sed bug. + * emit-rtl.c (copy_most_rtx): Accept EXPR_LIST for may_share. + * function.c (fixup_var_refs): Add MAY_SHARE parameter. + (fixup_var_refs_insns, fixup_var_refs_insns_with_has): Likewise. + (fixup_var_refs_insn, fixup_var_refs_1): Likewise. + (pop_function_context): Compute MAY_SHARE parameter for + fixup_var_refs. + (fixup_var_refs_1, case MEM): Pass MAY_SHARE to copy_most_rtx, not VAR. + (gen_mem_addressof): Call fixup_var_refs with new parm. -Thu Jul 27 13:31:05 1995 Fred Fish (fnf@cygnus.com) + * combine.c (make_extraction): Don't make extension of CONST_INT. - * config.guess (*:Linux:*:*): First try asking the linker what the - default object file format is (elf, aout, or coff). Then if this - fails, try previous methods. +2002-03-08 Kaveh R. Ghazi <ghazi@caip.rutgers.edu> -Thu Jul 27 11:28:17 1995 J.T. Conklin <jtc@rtl.cygnus.com> + * sparc.c (arith_4096_operand): Fix error in last change. - * configure.in: Don't build newlib for *-*-vxworks5.1. +2002-03-08 Aldy Hernandez <aldyh@redhat.com> -Thu Jul 27 11:18:47 1995 Brendan Kehoe <brendan@lisa.cygnus.com> + * config/rs6000/rs6000.c (rs6000_va_arg): Fix alignment for + vectors. - * configure.in: Don't build newlib for a29k-*-vxworks5.1. - * test-build.mk: Add setting of --with-headers for a29k-vxworks5.1. +2002-03-08 Aldy Hernandez <aldyh@redhat.com> -Tue Jul 25 21:25:39 1995 Doug Evans <dje@canuck.cygnus.com> + * config/rs6000/sysv4.h (BIGGEST_ALIGNMENT): Change for altivec. - * cfg-ml-pos.in (MULTITOP): Trim excess trailing "/.". +2002-03-08 Craig Rodrigues <rodrigc@gcc.gnu.org> -Fri Jul 21 10:41:12 1995 Doug Evans <dje@canuck.cygnus.com> + * doc/install.texi (--with-libiconv-prefix): Document. - * cfg-ml-com.in: New file. - * cfg-ml-pos.in: New file. +2002-03-08 Michael Y. Brukman <myb2@cornell.edu> -Wed Jul 19 00:37:27 1995 Jeffrey A. Law <law@rtl.cygnus.com> + * doc/sourcebuild.texi: Fix typo. - * COPYING.NEWLIB: Add HP free copyright to list. +2002-03-08 Jakub Jelinek <jakub@redhat.com> -Tue Jul 18 10:58:51 1995 Michael Meissner <meissner@tiktok.cygnus.com> + PR c/3711 + * builtins.c (std_expand_builtin_va_arg): Do all computations on + trees. - * config.sub: Recognize -eabi* for the system, not just -eabi. +Fri Mar 8 06:48:45 2002 Richard Kenner <kenner@vlsi1.ultra.nyu.edu> -Mon Jul 3 13:44:51 1995 Steve Chamberlain <sac@slash.cygnus.com> + * rtl.c (copy_most_rtx): Move from here ... + * emit-rtl.c (copy_most_rtx): ... to here. - * Makfile.in (DLLTOOL_FOR_TARGET): New name, pass it down. - * config.sub, configure.in (win32): New target and host. +2002-03-08 Richard Earnshaw <rearnsha@arm.com> -Wed Jun 28 23:57:08 1995 Steve Chamberlain <sac@slash.cygnus.com> + * combine.c (simplify_comparison): If simplifying a logical shift + right and compare with constant, force the comparison to unsigned. - * configure.in: Add i386-pe configuration. +2002-03-07 Ulrich Weigand <uweigand@de.ibm.com> -Fri Jun 23 14:28:44 1995 Stan Shebs <shebs@andros.cygnus.com> + * genextract.c (walk_rtx): Recurse into MATCH_PAR_DUP. + genoutput.c (scan_operands): Recurse into MATCH_PAR_DUP + and MATCH_OP_DUP. - * mpw-build.in (install): Install GDB after LD. +2002-03-07 Aldy Hernandez <aldyh@redhat.com> -Thu Jun 22 17:10:53 1995 Stan Shebs <shebs@andros.cygnus.com> + * doc/invoke.texi: Add documentation for -mabi=no-altivec. - * mpw-config.in (elf/mips.h): Always forward-include, needed - for GDB to build. + * config/rs6000/rs6000.c (rs6000_parse_abi_options): Add + -mabi=no-altivec + (alt_reg_names): Remove % for vrsave. -Wed Jun 21 15:17:30 1995 Rob Savoye <rob@darkstar.cygnus.com> +2002-03-06 Jeffrey A Law (law@redhat.com) - * testsuite: New directory for customer acceptance and whole tool - chain tests. + * ssa-ccp.c (ssa_fast_dce): Update the DF def-use chains + after completing fast dead code elimination. -Wed Jun 21 16:50:29 1995 Ken Raeburn <raeburn@cujo.cygnus.com> +2002-03-06 Richard Henderson <rth@redhat.com> - * configure: If per-host line isn't found, but AC_OUTPUT is found - and a configure script exists, run it instead. + PR optimization/5844 + * genemit.c (gen_exp): New argument used. Invoke copy_rtx + if used indicates we've already emitted one copy of an operand. + (gen_insn, gen_expand, output_add_clobbers): Supply a null used. + (gen_split): Supply a non-null used. -Thu Jun 15 21:09:24 1995 Per Bothner <bothner@kalessin.cygnus.com> +2002-03-06 Ulrich Weigand <uweigand@de.ibm.com> - * config.guess: Update from FSF, for alpha-dec-winnt3.5 and Crays. + * simplify-rtx.c (simplify_plus_minus): Do not abort, + but simply fail if the expression is too complex to simplify. + (simplify_gen_binary): Handle simplify_plus_minus failures. -Tue Jun 13 21:43:27 1995 Rob Savoye <rob@darkstar.cygnus.com> +2002-03-06 Ulrich Weigand <uweigand@de.ibm.com> - * configure: Set build_{cpu,vendor,os,alias} to host values when - --build isn't specified. + * reload1.c (reload): Unshare all rtl after reload is done. -Mon Jun 5 18:26:36 1995 Jason Merrill <jason@phydeaux.cygnus.com> +2002-03-06 Jakub Jelinek <jakub@redhat.com> - * Makefile.in (PICFLAG, PICFLAG_FOR_TARGET): New macros. - (FLAGS_TO_PASS): Pass them. - (EXTRA_TARGET_FLAGS): Ditto. + * ssa-ccp.c (ssa_ccp_substitute_constants): Backout 2002-03-05 + patch. - * config/m?-*pic: Define PICFLAG* instead of LIB*FLAGS*. +2002-03-05 Zack Weinberg <zack@codesourcery.com> -Wed May 31 22:27:42 1995 Jim Wilson <wilson@chestnut.cygnus.com> + * cppmain.c (setup_callbacks): Disable #pragma and #ident + callbacks when processing assembly language. - * Makefile.in (all-libg++): Depend on all-libstdc++. +2002-03-06 John David Anglin <dave@hiauly1.hia.nrc.ca> -Thu May 25 22:40:59 1995 J.T. Conklin <jtc@rtl.cygnus.com> + * pa.h (ASM_FILE_END): Define. + * som.h (ASM_FILE_END): Delete. - * configure.in (noconfigdirs): Enable all packages for - i386-unknown-netbsd. + * pa.c (function_arg): Don't pass floats in general registers in + indirect calls if TARGET_ELF32. -Sat May 20 13:22:31 1995 Angela Marie Thomas <angela@cirdan.cygnus.com> +2002-03-05 Richard Henderson <rth@redhat.com> - * configure.in (noconfigdirs): Don't configure tk for i386-go32 - hosted builds (DOS builds) + * config/i386/i386.md (floatsidf2): Conditionalize on hard-float. -Thu May 18 18:08:49 1995 Ken Raeburn <raeburn@kr-laptop.cygnus.com> +2002-03-05 Jakub Jelinek <jakub@redhat.com> - Changes for ARM based on patches from Richard Earnshaw: - * config.sub: Handle armeb and armel. - * configure.in: Omit arm linker only for riscix. + * mklibgcc.in: Prepend a tab before .hidden, add $flags to gcc + -r command line. Don't hide any symbols if not building + shared libgcc. -Thu May 11 17:23:26 1995 Per Bothner <bothner@kalessin.cygnus.com> +2002-03-05 Jakub Jelinek <jakub@redhat.com> - * config.guess: Update from FSF. + * expmed.c (emit_store_flag): Don't test BITS_PER_WORD * 2 + wide volatile memory by parts. -Tue May 9 15:52:05 1995 Michael Meissner <meissner@cygnus.com> +2002-03-05 Jakub Jelinek <jakub@redhat.com> - * config.sub: Recognize powerpcle as the little endian variant of - the PowerPC. Recgonize ppc as a PowerPC variant, and ppcle as a - powerpcle variant. Convert pentium into i586, not i486. Add p5 - alias for i586. Map new x86 variants p6, k5, nexgen into i586 - temporarily. + * ssa-ccp.c (ssa_ccp_substitute_constants): Don't crash if def + is NULL. -Tue May 2 16:29:41 1995 Jeff Law (law@snake.cs.utah.edu) +2002-03-05 Richard Henderson <rth@redhat.com> - * configure.in (hppa*-*-lites*): Treat like hppa*-*-*elf*. + * config/rs6000/rs6000.h (TOTAL_ALTIVEC_REGS): Fix off-by-one error. -Sun Apr 30 21:38:09 1995 Jeff Law (law@snake.cs.utah.edu) +2002-03-04 Krister Walfridsson <cato@df.lth.se> - * config.sub: Accept -lites* as a basic system type. + * config.gcc (*-*-netbsd*): Add t-slibgcc-elf-ver to tmake_file. -Thu Apr 27 11:33:29 1995 Michael Meissner (meissner@cygnus.com) +2002-03-05 Joseph S. Myers <jsm28@cam.ac.uk> - * config.guess (*:Linux:*:*): Check for whether the pre-BFD linker is - installed, and if so return linuxoldld as the system name. + * configure.in: Increase required makeinfo version to 4.1. + * configure: Regenerate. -Wed Apr 26 10:59:02 1995 Jeff Law (law@snake.cs.utah.edu) +2002-03-04 Joseph S. Myers <jsm28@cam.ac.uk> - * config.guess: Add hppa1.1-hp-lites support. + * doc/include/texinfo.tex: Update to version 2002-03-01.06. + * doc/invoke.texi: Fix @math uses. -Tue Apr 25 11:08:11 1995 Rob Savoye <rob@darkstar.cygnus.com> +2002-03-02 Per Bothner <per@bothner.com> - * configure.in: Don't build newlib for m68k-vxworks5.1. + * gcc.c (option_map): Suport new --bootclasspath option. + --CLASSPATH is now just an alias for --classpath. -Wed Apr 19 17:02:43 1995 Jim Wilson <wilson@chestnut.cygnus.com> +Sat Mar 2 06:30:14 2002 Richard Kenner <kenner@vlsi1.ultra.nyu.edu> - * configure.in (mips-sgi-irix6): Use mh-irix5. + * config/sparc/sparc.c (sparc_initialize_trampoline): Use + trunc_int_for_mode. -Fri Apr 14 15:21:17 1995 Doug Evans <dje@chestnut.cygnus.com> + * emit-rtl.c (offset_address): Call update_temp_slot_address. - * Makefile.in (all-gcc): Depend on all-ld (for libgcc1-test). +2002-03-01 Richard Henderson <rth@redhat.com> -Wed Apr 12 16:06:01 1995 Jason Merrill <jason@phydeaux.cygnus.com> + * config/ia64/ia64.c (ia64_initial_elimination_offset): Do not + adjust argument_pointer by pretend_args_size. + (ia64_va_start): Adjust va_start address by -pretend_args_size. - * test-build.mk: Enable building of shared libraries on IRIX 5 and - OSF/1. Fix compiler flags. - * build-all.mk: Support Linux and OSF/1 3.0. Fix compiler flags. +2002-03-01 Zack Weinberg <zack@codesourcery.com> -Tue Apr 11 18:55:40 1995 Doug Evans <dje@canuck.cygnus.com> + * doc/cpp.texi: Clarify documentation of relationship between + #line and #include. - * configure.in: Recognize --with-newlib. - (sparc-*-sunos4*): Build sim, dejagnu, expect, tcl if cross target. +2002-02-28 Richard Henderson <rth@redhat.com> -Mon Apr 10 14:38:20 1995 Jason Molenda (crash@phydeaux.cygnus.com) + * expmed.c (store_bit_field): Prevent generation of CONCATs; + pun complex values as integers; use gen_lowpart instead of + gen_rtx_SUBREG. + (extract_bit_field): Likewise. - * Makefile.in: move {all,check,install}-gdb from *_MODULES - to *_X11_MODULES due to gdbtk needing X include files et al. +2002-02-28 David O'Brien <obrien@FreeBSD.org> -Mon Apr 10 11:42:22 1995 Stan Shebs <shebs@andros.cygnus.com> + * config.gcc (sparc64-*-freebsd): Explicitly accept a cpu specification + of "ultrasparc". + * config/sparc/freebsd.h: Do not use MASK_FASTER_STRUCTS. It appears + to be broken. - Merge in support for Mac MPW as a host. - (Old change descriptions retained for informational value.) +2002-02-28 Alexandre Oliva <aoliva@redhat.com> - * mpw-config.in: Add generic include forwards for cpu-specific - include files in aout and elf directories. + * gcc.c (init_gcc_specs): Get -static and -static-libgcc to + override -shared and -shared-libgcc. - * mpw-configure: Added copyright. - * mpw-config.in: Check for presence of required build tools. - (target_libs): Add newlib. - (target_tools): Add examples. - (Read Me): Generate as "Read Me for MPW" instead. - * mpw-build.in: Base sub-builds on all-foo instead of do-foo. - (all-byacc, do-byacc, all-flex, do-flex, do-newlib): New actions. - (do-gas, do-gcc, do-gdb, do-ld): Build Version.r first. +2002-02-28 Andrew MacLeod <amacleod@redhat.com> - * mpw-configure: Remove subdir-specific makefile hackery, - delete mk.tmp after using it. + * dwarf2out.c (stack_adjust_offset): Add support for POST_INC, + POST_DEC, and POST_MODIFY. - * mpw-build.in (all): Display start and end times. +2002-02-28 Joseph S. Myers <jsm28@cam.ac.uk> - * mpw-configure (host_canonical): Set. - (target_cpu): Always add to makefiles. - (ARCHDEFS, EMUL): Add to makefile only if nonempty. - (TM_FILE, XM_FILE, NM_FILE): No longer add to makefile. - (mpw-mh-mpw): Look for in srcdir and srcroot. - Use sed instead of mpw-edit-prefix to edit prefix definitions. + * doc/invoke.texi, doc/standards.texi: Link to + gcc-3.1/c99status.html. - * mpw-build.in: (install-only): New target. +2002-02-28 Richard Henderson <rth@redhat.com> - * mpw-configure (host_alias, target_alias): Rename from hostalias - and targetalias, add into generated Makefile. - (mk.tmp): If present, add into generated Makefile. - * mpw-build.in (all-gas): Build config.h first before gas proper. + * config/ia64/ia64.c (ia64_adjust_cost): All non-MM consumers have + 4 cycle latency from MM producers. + (ia64_internal_sched_reorder): Likewise with pipeline flush. - * mpw-configure (config.status): Write only if changed. - * mpw-config.in (readline): Configure it (not built, just used for - definitions). +2002-02-28 Jakub Jelinek <jakub@redhat.com> - * mpw-config.in (elf/mips.h): Add a forward include. + * mklibgcc.in: Don't use GNU make extension. - * mpw-config.in: Forward-include most .h files in include into - extra-include. - (readline): Don't build. - mpw-build.in (install): Install GDB. +2002-02-28 Richard Henderson <rth@redhat.com> - * mpw-configure (prefix, mpw_prefix): Handle it. - * mpw-config.in (mmalloc, readline): Don't configure. - * mpw-build.in (thisscript): Rename to ThisScript. - Use mpw-build instead of BuildProgram everywhere. - (mmalloc, readline): Don't build. - * mpw-README: New file, basic documentation about the MPW port. + * haifa-sched.c (sched_emit_insn): New. + (schedule_block): Use last_scheduled_insn to track last insn. + * sched-int.h (sched_emit_insn): Prototype. + * config/ia64/ia64.c (last_issued): Remove. + (ia64_variable_issue): Don't set it. + (nop_cycles_until): Use sched_emit_insn. - * mpw-config.in: Use forward-include to create include files. +2002-02-28 Bo Thorsen <bo@suse.de> - * mpw-configure: Add more things to the top of each configured - Makefile, including contents of config/mpw-mh-mpw. - * mpw-config.in (extra-include): Create this directory and fill it - with Posix-like include files when configuring. + * config/i386/linux64.h (LINK_SPEC): Fix 32/64 bit compilation. + (STARTFILE_SPEC): Add 64 bit files. + (ENDFILE_SPEC): Likewise. - * config.sub (apple, mac, mpw): Add various aliases. +Don Feb 28 16:41:19 CET 2002 Jan Hubicka <jh@suse.cz> - * mpw-build.in: New file, top-level build script fragment for MPW. - * mpw-configure: New file, configure script for MPW. - * mpw-config.in: New file, config fragment for MPW. + * cfgrtl.c (purge_dead_edges): Fix handling of EH edges. -Fri Apr 7 19:33:16 1995 Jim Kingdon (kingdon@lioth.cygnus.com) + * i386.h (CONDITIONAL_REGISTER_USAGE): Do not write to + PIC_OFFSET_TABLE_REGNUM when it is INVALID_REGNUM - * configure.in (host_libs): Remove glob, since it is gone from the - sources. + * x86-64.h (ASM_OUTPUT_MAX_SKIP_ALIGN): Always define. -Fri Mar 31 11:36:17 1995 Jason Molenda (crash@phydeaux.cygnus.com) +2002-02-28 David Edelsohn <edelsohn@gnu.org> - * Makefile.in: define empty GDB_NLM_DEPS var. + * config/rs6000/aix43.h (THREAD_MODEL_SPEC): Delete. + * config/rs6000/aix51.h (THREAD_MODEL_SPEC): Delete. - * configure.in(target_makefile_frag): use config/mt-netware - for netware targets. +2002-02-28 Alan Modra <amodra@bigpond.net.au> -Thu Mar 30 13:51:43 1995 Ian Lance Taylor <ian@cygnus.com> + * config/rs6000/rs6000.md (load_toc_aix_di): Handle TARGET_RELOCATABLE. - * config.sub: Merge in recent FSF changes. Remove linux special - cases. +2002-02-28 Jason Merrill <jason@redhat.com> -Tue Mar 28 14:47:34 1995 Jason Molenda (crash@phydeaux.cygnus.com) + * c-decl.c (finish_function): Only warn about missing return + statement with -Wreturn-type. - build-all.mk,config/mh-solaris: revert these two changes: +2002-02-27 Zack Weinberg <zack@codesourcery.com> - Tue Mar 30 10:03:09 1993 Ian Lance Taylor (ian@cygnus.com) + * mklibgcc.in: Don't use \n in a line subject to + interpretation by echo. - * build-all.mk: Use CC=cc -Xs on Solaris. +2002-02-27 Ulrich Weigand <uweigand@de.ibm.com> - Mon Mar 29 19:59:26 1993 david d `zoo' zuhn (zoo at cirdan.cygnus.com) + * config/s390/s390.c (s390_chunkify_pool): Do not confuse + insn UIDs with insn addresses. - * config/mh-solaris: SunPRO C needs -Xs to be able to get a - working xmakefile for Emacs. +2002-02-27 Graham Stott <grahams@redhat.com> -Tue Mar 21 10:43:32 1995 Jim Kingdon (kingdon@lioth.cygnus.com) + * config/rs6000/rs6000.h (ASM_OUTPUT_DEF_FROM_DECL): + Constify NAME. - * glob/*: Removed. Schauer's 24 Feb 1994 readline change made us - stop using it. - * Makefile.in: Nuke all references to glob subdirectory. + * loop.c (prescan_loop): Handle PARALLEL. -Thu Mar 16 13:35:30 1995 Jason Merrill <jason@phydeaux.cygnus.com> + * unroll.c (loop_iterations): Return 0 if the add_val for + a BIV is REG. - * configure.in: Fix --enable-shared logic in per-host. + * final.c (output_operand_lossage): Constify PFX_STR. -Mon Mar 13 12:33:15 1995 Ian Lance Taylor <ian@cygnus.com> + * df.c (df_insn_refs_record): Use XEXP (x, 0) for USE. - * configure.in (*-hp-hpux[78]*): Use mh-hpux8. +2002-02-26 Richard Henderson <rth@redhat.com> -Mon Mar 6 10:21:58 1995 Jim Kingdon (kingdon@lioth.cygnus.com) + * config/alpha/alpha.md (ashldi_se): Re-enable. - * configure.in (noconfigdirs): Don't build gas on AIX, for - powerpc*-*-aix* as well as for rs6000*-*-aix*. +2002-02-26 Kelley Cook <kelleycook@comcast.net> -Wed Mar 1 12:51:53 1995 Ian Lance Taylor <ian@cygnus.com> + * config/i386/i386.c (print_operand): Don't append ATT-style + length suffixs to x87 opcodes when in Intel mode. - * configure: Fix --cache-file to work if the file argument is a - relative path. +2002-02-26 Ryan T. Sammartino <ryants@shaw.ca> -Tue Feb 28 17:36:07 1995 Ian Lance Taylor <ian@cygnus.com> + * emit-rtl.c (gen_const_vector_0): Remove TYPE argument. + (init_emit_once): Update calls. + * fixinc/gnu-regex.c (_GNU_SOURCE): Remove. + (init_syntax_once): Prototype. - * configure: If the --cache-file is used, pass it down to - configure in subdirectories. +2002-02-26 John David Anglin <dave@hiauly1.hia.nrc.ca> -Mon Feb 27 12:52:46 1995 Kung Hsu <kung@mexican.cygnus.com> + * pa-linux.h (LIB_SPEC): Update definition. + * pa32-linux.h (LINK_COMMAND_SPEC): Delete. - * config.sub: add vxworks29k configuration. +2002-02-26 Alexandre Oliva <aoliva@redhat.com> -Fri Feb 10 16:12:26 1995 Ken Raeburn <raeburn@cujo.cygnus.com> + * dwarf2out.c (gen_inlined_subroutine_die): If block is abstract, + generate a die for the lexical block. - * Makefile.in (taz): Do "diststuff" part quietly. +2002-02-26 Richard Henderson <rth@redhat.com> -Sun Feb 5 14:16:35 1995 Doug Evans <dje@canuck.cygnus.com> + * expr.c (expand_expr) [MULT_EXPR]: Do not apply distributive law + in EXPAND_SUM case. Use host_integerp/tree_low_cst. - * config.sub: Mini-merge with gcc/config.sub. +2002-02-26 Richard Henderson <rth@redhat.com> -Sat Feb 4 12:11:35 1995 Jim Wilson <wilson@chestnut.cygnus.com> + * config/ia64/ia64.c (nop_cycles_until): Do init_insn_group_barriers + if we emitted a stop bit. - * config.guess (IRIX): Sed - to _. +2002-02-26 Jakub Jelinek <jakub@redhat.com> -Fri Feb 3 11:54:42 1995 J.T. Conklin <jtc@rtl.cygnus.com> + * configure.in (libgcc_visibility): Substitute. + * configure: Rebuilt. + * mklibgcc.in: If libgcc_visibility = yes, make libgcc.a global + defined symbols .hidden. - * Makefile.in (source-vault, binary-vault): New targets. +2002-02-26 Jakub Jelinek <jakub@redhat.com> -Thu Jan 26 13:00:11 1995 Michael Meissner <meissner@cygnus.com> + PR debug/5770 + * dwarf2out.c (rtl_for_decl_location): Return CONST_STRING for + STRING_CST initializer spanning the whole variable without + embedded zeros. + If expand_expr returned MEM, don't use it. - * config.sub: Recognize -eabi as a basic system type. +2002-02-25 Jakub Jelinek <jakub@redhat.com> -Thu Jan 12 13:13:23 1995 Jason Merrill <jason@phydeaux.cygnus.com> + PR target/5755 + * config/i386/i386.c (ix86_return_pops_args): Only pop + fake structure return argument if it was passed on the stack. - * configure.in (enable_shared stuff): Fix typo. +2002-02-25 Jason Merrill <jason@redhat.com> -Thu Jan 12 01:36:51 1995 deanm@medulla.LABS.TEK.COM (Dean Messing) + * attribs.c (decl_attributes): Also re-layout PARM_DECL and + RESULT_DECL. - * Makefile.in (BASE_FLAGS_TO_PASS): Fix typo in passing LIBCXXFLAGS*. +2002-02-25 Alexandre Oliva <aoliva@redhat.com> -Wed Jan 11 16:29:53 1995 Jason Merrill <jason@phydeaux.cygnus.com> + * gcc.c (init_gcc_specs): Get -shared-libgcc along with -shared to + link with shared_name only. + * doc/invoke.texi (Link Options): Document new behavior. - * Makefile.in (LIBCXXFLAGS_FOR_TARGET): Add -fno-implicit-templates. +2002-02-25 Aldy Hernandez <aldyh@redhat.com> -Mon Jan 9 12:48:01 1995 Jim Kingdon <kingdon@lioth.cygnus.com> + * c-typeck.c (push_init_level): Handle vectors. - * configure.in (rs6000-*-*): Don't build gas. +2002-02-25 Alexandre Oliva <aoliva@redhat.com> -Wed Jan 4 23:53:49 1995 Ian Lance Taylor <ian@tweedledumb.cygnus.com> + * config/sparc/sparc.c (const64_high_operand): Zero-extend + operands of SPARC_SETHI_P. + (input_operand): Likewise. + (sparc_emit_set_const32): Likewise. + * config/sparc/sparc.h (SPARC_SETHI_P): Disregard TARGET_ARCH64. + (SPARC_SETHI32_P): Zero-extend operand from 32 bits. + (CONST_OK_FOR_LETTER_P): Use SETHI32 for `K'. Add `N' as SETHI. + * config/sparc/sparc.md (movdi_insn_sp64_novis): Use `N'. + (movdi_insn_sp64_vis): Likewise. + (movdi split, movdf split): Use SETHI32. + * doc/md.texi: Document SPARC constraints L, M and N. - * Makefile.in: Use /x/x/ instead of /brokensed/brokensed/, to - reduce command line length. - (AS_FOR_TARGET): Check for as.new, not Makefile. - (NM_FOR_TARGET): Check for nm.new, not Makefile. +2002-02-25 Aldy Hernandez <aldyh@redhat.com> -Wed Jan 4 13:02:39 1995 Per Bothner <bothner@kalessin.cygnus.com> + * config/rs6000/rs6000.md ("get_vrsave_internal"): New. + ("*set_vrsave_internal"): use mfspr for Darwin. - * config.guess: Merge from FSF. + * config/rs6000/rs6000.c (rs6000_emit_prologue): Call + gen_get_vrsave_internal. -Thu Dec 15 17:11:37 1994 Ian Lance Taylor <ian@sanguine.cygnus.com> +Sun Feb 24 16:38:56 2002 Richard Kenner <kenner@vlsi1.ultra.nyu.edu> - * configure: Don't use $ when handling program_suffix. + * optabs.c (widen_operand): Properly handle CONST_INT for NO_EXTEND. -Mon Dec 12 12:09:37 1994 Stu Grossman (grossman@cygnus.com) +2002-02-24 Neil Booth <neil@daikokuya.demon.co.uk> - * configure.in: Configure tk for hppa/hpux. + * cpplex.c (cpp_interpret_charconst): Get signedness or + otherwise of wide character constants correct. + * cppexp.c (lex): Get signedness of wide charconsts correct. -Fri Dec 2 15:55:38 1994 Per Bothner <bothner@kalessin.cygnus.com> +Sun Feb 24 07:41:31 2002 Richard Kenner <kenner@vlsi1.ultra.nyu.edu> - * Makefile.in (LIBGXX_SUPPORT_DIRS): Add libstdc++. + * optabs.c (widen_operand): Only call convert_modes for + promoted SUBREG if signedness matches. + * config/alpha/alpha.md (*addsi_se2, *subsi_se2): New patterns. -Tue Nov 29 19:37:56 1994 Per Bothner <bothner@kalessin.cygnus.com> +2002-02-23 Neil Booth <neil@daikokuya.demon.co.uk> - * Makefile.in: Move -fno-implicit-template from CXXFLAGS - to LIBCXXFLAGS. Tests are better run without it. + * cpplib.c (glue_header_name): Use local buffer to build up + header name. -Wed Nov 23 10:29:25 1994 Brendan Kehoe (brendan@lisa.cygnus.com) +2002-02-23 Neil Booth <neil@daikokuya.demon.co.uk> - * Makefile.in (all-ispell): Depend on all-emacs19 instead of all-emacs. + * doc/cpp.texi, doc/invoke.texi: Update documentation for -MM. -Mon Nov 21 11:14:01 1994 J.T. Conklin <jtc@rtl.cygnus.com> +2002-02-23 Kazu Hirata <kazu@hxi.com> - * configure.in (*-*-netware*): Don't configure xiberty. + * config/h8300/h8300.c (output_simode_bld): Handle H8/300 and + H8/300[HS] separately. + * config/h8300/h8300.md: Remove the early clobber constraint + from bit field patterns. -Mon Nov 14 08:49:15 1994 Stu Grossman (grossman@cygnus.com) +2002-02-23 Kazu Hirata <kazu@hxi.com> - * configure.in: Remove tk from native_only list. + * config/h8300/h8300.md (mulqihi3): Tighten predicates to + register_operand. + (mulhisi3): Likewise. + (umulqisi3): Likewise. + (umulhisi3): Likewise. -Fri Nov 11 15:31:26 1994 Bill Cox (bill@rtl.cygnus.com) +2002-02-23 Neil Booth <neil@daikokuya.demon.co.uk> - * build-all.mk: Add mips-ncd-elf target to sun4 targets - for special NCD build. + * cppinit.c (output_deps): Correct test for stdout output. + (init_dependency_output): Cure warning. -Mon Nov 7 20:58:17 1994 Ken Raeburn <raeburn@cujo.cygnus.com> +Sat Feb 23 08:42:47 2002 Richard Kenner <kenner@vlsi1.ultra.nyu.edu> - * Makefile.in (DEVO_SUPPORT): Remove configure.bat and - makeall.bat, they're only useful for binutils snapshots. - (binutils.tar.gz, gas+binutils.tar.gz): Add configure.bat and - makeall.bat to specified SUPPORT_FILES. + * expr.c (store_expr): When converting expression to promoted + equivalent type, allow using SUBREG_REG of TARGET as the target + of the expansion of EXP. + * loop.c (basic_induction_var, case SUBREG): Always look inside. + * config/alpha/alpha.c (rtx_equiv_function_matters): Delete decl. + (alpha_emit_set_const): Handle SImode when can't make new pseudos. + (alpha_emit_set_const_1, alpha_sa_mask): Use no_new_pseudos. + * config/alpha/alpha.md (addsi3, subsi3): Don't use if optimizing. -Mon Nov 7 17:25:18 1994 Bill Cox (bill@cirdan.cygnus.com) +2002-02-23 Joseph S. Myers <jsm28@cam.ac.uk> - * build-all.mk: Add Ericsson targets to sun4 and solaris - hosts. Add BNR's sun4 target to solaris host, so their - build-from-source will be tested in-house first. + * doc/contribute.texi, doc/extend.texi, doc/install.texi, + doc/invoke.texi, doc/md.texi, doc/passes.texi, doc/rtl.texi, + doc/standards.texi, doc/tm.texi: Remove trailing whitespace. -Sat Nov 5 18:43:30 1994 Jason Merrill (jason@phydeaux.cygnus.com) +2002-02-23 Jakub Jelinek <jakub@redhat.com> - * Makefile.in (LIBCFLAGS): New variable. - (CFLAGS_FOR_TARGET): Ditto. - (LIBCFLAGS_FOR_TARGET): Ditto. - (LIBCXXFLAGS): Ditto. - (CXXFLAGS_FOR_TARGET): Ditto. - (LIBCXXFLAGS_FOR_TARGET): Ditto. - (BASE_FLAGS_TO_PASS): Pass them. - (EXTRA_TARGET_FLAGS): Ditto. + PR optimization/5747 + * loop.c (scan_loop): Update reg info if move_movables created new + pseudos. - * configure.in, config/m[th]-*pic: Support --enable-shared. +2002-02-23 David Edelsohn <edelsohn@gnu.org> -Sat Nov 5 15:44:00 1994 Per Bothner <bothner@kalessin.cygnus.com> + * gcc.c (init_gcc_spec): Revert last change. - * configure.in (target_libs): Include libstdc++ again. - * config.guess: Update from FSF (for FreeBSD). +2002-02-23 David Edelsohn <edelsohn@gnu.org> -Thu Nov 3 16:32:30 1994 Ken Raeburn <raeburn@cujo.cygnus.com> + * config/rs6000/rs6000.md (load_toc_aix_{si,di}): Use + gpc_reg_operand constraint. - * Makefile.in (DEVO_SUPPORT): Include configure.bat and - makeall.bat. - (DISTDOCDIRS): Add `etc'. - (ETC_SUPPORT_PFX): New variable. - (taz): Include anything from etc starting with a word in - ETC_SUPPORT_PFX. +2002-02-23 Alan Modra <amodra@bigpond.net.au> -Wed Oct 26 16:19:35 1994 Ian Lance Taylor <ian@sanguine.cygnus.com> + * config/rs6000/rs6000.c (num_insns_constant): Fix formatting. + Simplify comparison of `low'. + (add_operand): Fix formatting. + (non_add_cint_operand): Use CONST_OK_FOR_LETTER_P. + (mask_operand): Disallow mask to wrap in 64-bit mode. + (rs6000_stack_info): Remove redundant test setting push_p. + (output_toc): Fix formatting. + * config/rs6000/rs6000.md (boolsi3, boolcsi3 splitters): Use + cc_reg_not_cr0_operand constraint. + (booldi3, boolcdi3 splitters): Same. - * config.sub: Update for recent FSF changes. Remove obsolete - h8300hds entry. Add -windows* and -osx as basic os. Minor - spacing changes. +2002-02-23 Aldy Hernandez <aldyh@redhat.com> -Thu Oct 20 18:41:56 1994 Per Bothner <bothner@kalessin.cygnus.com> + * config/rs6000/altivec.h: Add extra level of parentheses on casts. - * configure.in (target_libs): Remove libstdc++ for libg++-2.6.1. +2002-02-22 David Edelsohn <edelsohn@gnu.org> - * config.guess: Merge with FSF. - * configure.in: Match on i?86-ncr-sysv4.3, not i?86-ncr-sysv43. + * gcc.c (init_gcc_spec): Do not link with static libgcc.a if + gcc invoked with -shared-libgcc. -Thu Oct 20 19:26:56 1994 Ken Raeburn <raeburn@cujo.cygnus.com> +2002-02-22 Jakub Jelinek <jakub@redhat.com> - * configure: Since the "trap 0" handler will override the exit - status on many systems, only use it for "exit 1", and make it set - a non-zero exit status; reset it before "exit 0". Also, check - exit status of config.sub, and error out if it failed. + PR c++/5748 + * stmt.c (expand_anon_union_decl): Set TREE_USED on the anon union + decl if any of elements was TREE_USED. -Wed Oct 19 18:49:55 1994 Rob Savoye (rob@cygnus.com) +2002-02-22 Alexandre Oliva <aoliva@redhat.com> - * Makefile.in: (ALL_TARGET_MODULES,INSTALL_TARGET_MODULES) Build - and install libgloss. + * config/sparc/sol2.h: Don't include sys/mman.h. + * config/sparc/sparc.c (arith_operand): Use SMALL_INT32. + (arith_4096_operand): Don't throw high bits away. + (const64_operand): Take sign extension of CONST_INTs into account. + (const64_high_operand, sparc_emit_set_const32): Likewise. + (GEN_HIGHINT64): Likewise. + (sparc_emit_set_const64_quick1): Likewise. + (const64_is_2insns): Likewise. + (print_operand): Use trunc_int_for_mode for sign extension. + * config/sparc/sparc.h (SMALL_INT32): Likewise. + * config/sparc/sparc.md (movqi): Sign-extend CONST_DOUBLE + chars. Assume CONST_INT is already properly sign-extended. + (movdi split): Sign-extend each SImode part. + (andsi3 split): Don't mask high bits off, so that result + remains properly sign-extend. + (iorsi3 split): Likewise. + (xorsi3 split): Likewise. -Tue Oct 18 15:25:24 1994 Ian Lance Taylor <ian@sanguine.cygnus.com> +2002-02-22 Richard Sandiford <rsandifo@redhat.com> - * Makefile.in (all-binutils): Depend upon all-byacc. + * fold-const.c (fold): Fix typo in comments. - * configure.in: Don't build emacs on Irix 5. +2002-02-21 Diego Novillo <dnovillo@redhat.com> -Mon Oct 17 16:22:12 1994 J.T. Conklin (jtc@phishhead.cygnus.com) + * Makefile.in (langhooks.o): Update dependencies. - * configure.in (*-*-netware*): Add libio. +2002-02-21 Diego Novillo <dnovillo@redhat.com> -Thu Oct 13 15:51:20 1994 Jason Merrill (jason@phydeaux.cygnus.com) + * langhooks.c: Include flags.h. - * Makefile.in (ALL_TARGET_MODULES): Add libstdc++. - (CHECK_TARGET_MODULES): Ditto. - (INSTALL_TARGET_MODULES): Ditto. - (TARGET_LIBS): Ditto. - (all-libstdc++): Note dependencies. +2002-02-21 Aldy Hernandez <aldyh@redhat.com> -Thu Oct 13 01:43:08 1994 Ken Raeburn <raeburn@cujo.cygnus.com> + * testsuite/gcc.dg/attr-alwaysinline.c: New. - * Makefile.in (BINUTILS_SUPPORT_DIRS): Add gas. + * c-common.c (c_common_post_options): Set inline trees by + default. -Tue Oct 11 12:12:29 1994 Jason Merrill (jason@phydeaux.cygnus.com) + * doc/extend.texi (Function Attributes): Document always_inline + attribute. + Update documentation about inlining when not optimizing. - * Makefile.in (CXXFLAGS): Use -fno-implicit-templates instead of - -fexternal-templates. + * cp/decl.c (duplicate_decls): Merge always_inline attribute. - * configure.in (target_libs): Add libstdc++. - (noconfigdirs): Add libstdc++ as appropriate. + * cp/tree.c (cp_cannot_inline_tree_fn): Do not inline at -O0 + unless DECL_ALWAYS_INLINE. -Thu Oct 6 18:00:54 1994 Per Bothner (bothner@kalessin.cygnus.com) + * c-objc-common.c (c_cannot_inline_tree_fn): Do not inline at -O0 + unless DECL_ALWAYS_INLINE. + (c_disregard_inline_limits): Disregard if always_inline set. - * config.guess: Update from FSF. + * langhooks.c (lhd_tree_inlining_disregard_inline_limits): + Disregard if always_inline set. + (lhd_tree_inlining_cannot_inline_tree_fn): Do not inline at -O0 + unless DECL_ALWAYS_INLINE. -Tue Oct 4 12:05:42 1994 Ian Lance Taylor <ian@sanguine.cygnus.com> + * attribs.c (handle_always_inline_attribute): New. + (c_common_attribute_table): Add always_inline. - * configure: Use ${config_shell} when running ${configsub}. + * config/rs6000/altivec.h: Add prototypes for builtins + requiring the always_inline attribute. -Mon Oct 3 14:28:34 1994 Doug Evans <dje@canuck.cygnus.com> +2002-02-21 Eric Christopher <echristo@redhat.com> - * config.sub: No longer recognize h8300h. + * expmed.c (store_bit_field): Try to simplify the subreg + before generating a new one when when the mode size of + value is less than maxmode. -Mon Oct 3 12:40:54 1994 Ian Lance Taylor <ian@sanguine.cygnus.com> +2002-02-21 Richard Henderson <rth@redhat.com> - * config.sub: Remove extraneous differences between config.sub and - gcc/config.sub. + * emit-rtl.c (offset_address): Use simplify_gen_binary rather + than gen_rtx_PLUS to form the sum. + * explow.c (force_reg): Rearrange to not allocate new pseudo + when force_operand returns a register. + * expr.c (expand_assignment): Allow offset_rtx expansion to + return a sum. Do not force addresses into registers. + (expand_expr): Likewise. + * simplify-rtx.c (simplify_gen_binary): Use simplify_plus_minus + to canonicalize arithmetic that didn't simpify. + (simplify_plus_minus): New argument force; update + all callers. Don't split CONST unless we can do something with it, + and wouldn't lose the constness of the operands. -Sat Oct 1 00:23:12 1994 Ken Raeburn <raeburn@cujo.cygnus.com> + * config/i386/i386.c (legitimize_pic_address): Recognize UNSPECs + that we generated earlier. - * Makefile.in (DISTSTUFFDIRS): Add gas. +2002-02-21 Tom Tromey <tromey@redhat.com> -Thu Sep 22 19:04:55 1994 Doug Evans (dje@canuck.cygnus.com) + * dwarf2out.c (DWARF_LINE_MIN_INSTR_LENGTH): Removed. + (output_line_info): Use constant `1', with a long explanatory + comment. + * system.h (DWARF_LINE_MIN_INSTR_LENGTH): Poison. - * COPYING.NEWLIB: New file. +Thu Feb 21 22:43:44 2002 J"orn Rennecke <joern.rennecke@superh.com> -Mon Sep 19 18:25:40 1994 Per Bothner (bothner@kalessin.cygnus.com) + * jump.c (redirect_jump): If old label has no UID, don't try to + delete it. - * config.guess (HP-UX): Patch from Harlan Stenn - <harlan@landmark.com> to also emit release level. +Thu Feb 21 21:17:21 2002 J"orn Rennecke <joern.rennecke@superh.com> -Wed Sep 7 13:15:25 1994 Jim Wilson (wilson@sphagnum.cygnus.com) + * sh.md (insv): Provide byte offsets for gen_rtx_SUBREG. + If input is constant, do shifts at compile time. - * config.guess (sun4*:SunOS:*:*): Change '-JL' to '_JL'. +2002-02-21 Joseph S. Myers <jsm28@cam.ac.uk> -Tue Sep 6 23:23:18 1994 Per Bothner (bothner@kalessin.cygnus.com) + * doc/extend.texi: Fix some more overfull hboxes. - * config.sub: Merge nextstep cleanup from FSF. +2002-02-21 Jakub Jelinek <jakub@redhat.com> -Mon Sep 5 05:01:30 1994 Ken Raeburn (raeburn@kr-pc.cygnus.com) + PR optimization/4994 + * config/i386/i386.md (movsi_1, movsf_1): Support MMX -> MMX + register moves. - * configure.in (arm-*-*): Don't configure ld for this target. +2002-02-21 Jakub Jelinek <jakub@redhat.com> -Thu Sep 1 09:35:00 1994 J.T. Conklin (jtc@phishhead.cygnus.com) + PR c++/4574 + * expr.h (expand_and): Add mode argument. + * expmed.c (expand_and): Add mode argument. + (expand_mult_highpart_adjust, emit_store_flag): Adjust callers. + * expr.c (store_field, expand_expr, do_store_flag): Likewise. + * except.c (expand_builtin_extract_return_addr): Likewise. + * config/alpha/alpha.c (alpha_initialize_trampoline): Likewise. + * config/sparc/sparc.c (sparc_initialize_trampoline): Likewise. + * config/c4x/c4x.h (INITIALIZE_TRAMPOLINE): Likewise. + Use GEN_INT (x) instead of gen_rtx (CONST_INT, VOIDmode, x). + * config/c4x/c4x.md: Use GEN_INT (x) instead of + gen_rtx (CONST_INT, VOIDmode, x). - * configure.in (*-*-netware): don't configure libg++, libio, - librx, or newlib. +2002-02-21 Jakub Jelinek <jakub@redhat.com> -Wed Aug 31 13:52:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com) + PR c/4697: + * stmt.c (warn_if_unused_value): Move side effects test once more. - * configure.in (alpha-dec-osf*): Use osf*, not osf1*. Don't - configure ld--it works, but it doesn't support shared libraries. +2002-02-20 Torbjorn Granlund <tege@swox.com> -Sun Aug 28 18:13:45 1994 Per Bothner (bothner@kalessin.cygnus.com) + * config/avr/avr.md: Add more patterns for mized-mode add and subtract + (addsi3_zero_extend, subhi3_zero_extend1, subsi3_zero_extend). - * config.guess (*-unknown-freebsd*): Get rid of possible - trailing "(Release)" in version string. - Patch from Paul Richards <paul@isl.cf.ac.uk>. +Thu Feb 21 16:20:46 2002 Alexandre Oliva <aoliva@redhat.com> -Sat Aug 27 15:00:49 1994 Per Bothner (bothner@kalessin.cygnus.com) + * rtlanal.c (replace_rtx): Don't make a CONST_INT the operand of + SUBREG or ZERO_EXTEND. - * config.guess: Fix i486-ncr-sysv43 -> i486-ncr-sysv4.3. - Fix type: *-next-neststep -> *-next-nextstep. +Thu Feb 21 15:35:46 2002 J"orn Rennecke <joern.rennecke@superh.com> - * config.guess: Merge from FSF: + * sh.h (current_function_anonymous_args): Remove. + (SETUP_INCOMING_VARARGS): Don't set it - just check that one + of current_function_varargs and current_function_stdarg is set. + * sh.c (sh_expand_prologue): Check current_function_varargs / + current_function_stdarg / TARGET_SH5 instead of + current_function_anonymous_args. - Fri Aug 26 18:45:25 1994 Philippe De Muyter (phdm@info.ucl.ac.be) + * sh64.h (TARGET_VERSION): Define. - * config.guess: Recognize powerpc-ibm-aix3.2.5. +2002-02-20 David Edelsohn <edelsohn@gnu.org> - Wed Apr 20 06:36:32 1994 Philippe De Muyter (phdm@info.ucl.ac.be) + * config/rs6000/rs6000.h (EPILOGUE_USES): Conditionalize + VRSAVE_REGNO on TARGET_ALTIVEC. - * config.guess: Recognize UnixWare 1.1 (UNAME_SYSTEM is SYSTEM_V - instead of UNIX_SV for UnixWare 1.0). +2002-02-20 Alan Modra <amodra@bigpond.net.au> -Sat Aug 27 01:56:30 1994 Stu Grossman (grossman@cygnus.com) + * config/rs6000/rs6000.c (includes_lshift_p): Mask irrelevant + bits of SImode const_int. + (includes_rshift_p): Likewise. + (print_operand): Call mask_operand and mask64_operand with correct + mode. + (rs6000_output_function_epilogue): Pad traceback table to word. + * config/rs6000/rs6000.h (MASK_64BIT): Correct comment. + (EXTRA_CONSTRAINT, 'S' and 'T'): Call mask_operand and + mask64_operand with correct mode. + (FUNCTION_ARG_REGNO_P): Correct parentheses. - * Makefile.in (all-gdb): Add dependencies on all-gcc and all-ld - to make gdb/nlm/* build after the compiler and linker. +2002-02-20 Jakub Jelinek <jakub@redhat.com> -Fri Aug 26 14:30:05 1994 Per Bothner (bothner@kalessin.cygnus.com) + PR debug/4461 + * varasm.c (get_pool_constant_mark): New. + * rtl.h (get_pool_constant_mark): Add prototype. + * dwarf2out.c (mem_loc_descriptor): A pool constant cannot + be represented if it has not been output. - * config.guess (netbsd, freebsd, linux): Accept any machine, - not just i[34]86. - (m68k-atari-sysv4): Relocate to match FSF version. +2002-02-20 Alexandre Oliva <aoliva@redhat.com> - * config.guess: More merges from the FSF: + * combine.c (do_SUBST): Sanity check substitutions of + CONST_INTs, and reject them in SUBREGs and ZERO_EXTENDs. + (subst): Simplify SUBREG or ZERO_EXTEND instead of SUBSTing a + CONST_INT into its operand. + (known_cond): Likewise, for ZERO_EXTEND. + * simplify-rtx.c (simplify_unary_operation): Fix condition to + allow for simplification of wide modes. Reject CONST_INTs in + ZERO_EXTEND when their actual mode is not given. - Add a space before function call or macro invocation. +2002-02-20 Alexandre Oliva <aoliva@redhat.com> - Tue May 10 16:53:55 1994 Roland McGrath (roland@churchy.gnu.ai.mit.edu) + * c-decl.c (pushdecl): If no global declaration is found for an + extern declaration in block scope, try a limbo one. - * config.guess: Add trap cmd to remove dummy.c and dummy when - interrupted. +2002-02-20 Jakub Jelinek <jakub@redhat.com> - Wed Apr 20 18:07:13 1994 Roland McGrath (roland@churchy.gnu.ai.mit.edu) + PR c++/4401 + * c-common.c (pointer_int_sum): Moved from... + * c-typeck.c (pointer_int_sum): ...here. + * c-common.h (pointer_int_sum): Add prototype. - * config.guess (dummy.c): Redirect stderr for `hostinfo' command. - (dummy): Redirect stderr from compilation of dummy.c. +2002-02-20 Jakub Jelinek <jakub@redhat.com> - Sat Apr 9 14:59:28 1994 Christian Kranz (kranz@sent5.uni-duisburg.de) + PR c++/5713 + * c-decl.c (duplicate_decls): Return 0 if issued error about + redeclaration. - * config.guess: Distinguish between NeXTStep 2.1 and 3.x. +2002-02-20 Roger Sayle <roger@eyesopen.com> + Jakub Jelinek <jakub@redhat.com> -Fri Aug 26 13:42:20 1994 Ken Raeburn (raeburn@kr-laptop.cygnus.com) + PR c/4389 + * tree.c (host_integerp): Ensure that the constant integer is + representable in a HOST_WIDE_INT or an unsigned HOST_WIDE_INT + when pos is zero or non-zero respectively. Clarify comment. + * c-format.c (check_format_info_recurse): Fix host_integerp + usage; the pos argument should be zero when assigning to a + signed HOST_WIDE_INT. - * configure: Accept and ignore --cache*, for compatibility with - new autoconf. +2002-02-20 Richard Henderson <rth@redhat.com> -Fri Aug 26 13:05:27 1994 Per Bothner (bothner@kalessin.cygnus.com) + * config/i386/i386.c (ix86_expand_vector_move): Use the mode + of the operand, rather than assuming TImode. + (ix86_expand_binop_builtin): Cope with commutative patterns + using nonimmediate_operand for both operands. + (ix86_expand_timode_binop_builtin): Likewise. + (ix86_expand_store_builtin): Validate operand 1. + (ix86_expand_unop1_builtin): Likewise. - * config.guess: Merge from FSF: +2002-02-20 Philip Blundell <philb@gnu.org> - Thu Aug 25 20:28:51 1994 Richard Stallman <rms@mole.gnu.ai.mit.edu> + PR 5705 + * config/arm/arm.h (HARD_REGNO_RENAME_OK): New macro. - * config.guess (Pyramid*:OSx*:*:*): New case. - (PATH): Add /.attbin at end for finding uname. - (dummy.c): Handle i860-alliant-bsd. Follow whitespace conventions. +2002-02-20 Richard Henderson <rth@redhat.com> - Wed Aug 17 18:21:02 1994 Tor Egge (tegge@pvv.unit.no) + PR c/5615 + * expr.h (ARGS_SIZE_TREE): Convert size.var to ssizetype. - * config.guess (M88*:DolphinOS:*:*): New case. +2002-02-20 Tom Tromey <tromey@redhat.com> - Thu Aug 11 17:00:13 1994 Stan Cox (coxs@dg-rtp.dg.com) + * config/fr30/fr30.h (DWARF_LINE_MIN_INSTR_LENGTH): Removed. + * config/sh/sh.h (DWARF_LINE_MIN_INSTR_LENGTH): Removed. + * config/pj/pj.h (DWARF_LINE_MIN_INSTR_LENGTH): Removed. + * config/cris/cris.h (DWARF_LINE_MIN_INSTR_LENGTH): Removed. + * dwarf2out.c (DWARF_LINE_MIN_INSTR_LENGTH): Define + unconditionally. - * config.guess (AViiON:dgux:*:*): Use TARGET_BINARY_INTERFACE - to select whether to use ELF or COFF. +Wed Feb 20 00:03:25 EST 2002 Alan Matsuoka <alanm@redhat.com> - Sun Jul 24 16:20:53 1994 Richard Stallman <rms@mole.gnu.ai.mit.edu> + * config/rs6000/rs6000.h (LEGITIMATE_OFFSET_ADDRESS_P): Look + for (const_int 0) in X not just INTVAL. - * config.guess: Recognize i860-stardent-sysv and i860-unknown-sysv. +2002-02-20 Joseph S. Myers <jsm28@cam.ac.uk> - Sun May 1 10:23:10 1994 Richard Stallman (rms@mole.gnu.ai.mit.edu) + * doc/extend.texi: Avoid or reduce overfull hboxes. - * config.guess: Guess the OS version for HPUX. +2002-02-20 Diego Novillo <dnovillo@redhat.com> - Tue Mar 1 21:53:03 1994 Karl Heuer (kwzh@hal.gnu.ai.mit.edu) + * expmed.c (store_bit_field): Do not store bit fields using SUBREG + operations if the field does not start at a mode boundary. - * config.guess (UNAME_VERSION): Recognize aix3.2.4 and aix3.2.5. +2001-02-20 Joel Sherrill <joel@OARcorp.com> -Fri Aug 26 11:19:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com) + * config/a29k/rtems.h, config/arm/rtems-elf.h, config/h8300/rtems.h, + config/mips/rtems.h: Use new style of -Asystem= rather than -Asystem(). + Also done for -Acpu and -Amachine. - * configure.in: Recognize --with-headers, --with-libs, and - --without-newlib. - * Makefile.in (all-xiberty): Depend upon all-ld. +2002-02-20 Neil Booth <neil@daikokuya.demon.co.uk> -Wed Aug 24 12:36:50 1994 Ian Lance Taylor (ian@sanguine.cygnus.com) + * cppinit.c (init_dependency_output): Take deps output file + from -o if none given with -MF. Suppress normal output. + * gcc.c (cpp_unique_options): Have -M and -MM imply -E. + * doc/cpp.texi, doc/invoke.texi: Update. - * configure.in: Change i[34]86 to i[345]86. +2002-02-19 Zack Weinberg <zack@codesourcery.com> -Mon Aug 22 10:58:33 1994 Ian Lance Taylor (ian@sanguine.cygnus.com) + * toplev.c (output_quoted_string): Write unprintable + characters with octal escapes. - * configure (version): A few more tweaks to help message. +2002-02-19 David Edelsohn <edelsohn@gnu.org> -Fri Aug 19 12:40:25 1994 Per Bothner (bothner@kalessin.cygnus.com) + * config/rs6000/rs6000.h (CONDITIONAL_REGISTER_USAGE): Set + really_call_used[VRSAVE_REGNO] if not Altivec. - * Makefile.in: Remove (for now) librx as a host library, - now that we're building it for target. +2002-02-19 Alan Modra <amodra@bigpond.net.au> -Fri Aug 19 10:49:17 1994 Ian Lance Taylor (ian@sanguine.cygnus.com) + * config/rs6000/rs6000.c (u_short_cint_operand): Mask op with + MODE_MASK. + (constant_pool_expr_1): Fix formatting. + (rs6000_legitimize_reload_address): Likewise. - * configure: Fix up help message; from karl@owl.hq.ileaf.com - (Karl Berry). +Tue Feb 19 20:13:57 2002 Richard Kenner <kenner@vlsi1.ultra.nyu.edu> -Tue Aug 16 16:11:08 1994 Per Bothner (bothner@kalessin.cygnus.com) + * config/sparc/sparc.md (nonlocal_goto): Use hard_frame_pointer_rtx + now that we have one. - * configure.in: Also configure librx. +2002-02-19 Zack Weinberg <zack@codesourcery.com> -Mon Aug 15 16:51:45 1994 Per Bothner (bothner@kalessin.cygnus.com) + * tree.h (struct tree_common): Remove aux. Add unused_0 at + end of first block of bitfields (which was only seven bits); + rename dummy to unused_1; remove comment which is no longer true. - * Makefile.in: Update various rules to reflect that librx - is now needed for libg++. +2002-02-19 Gaute B Strokkenes <gs234@cam.ac.uk> -Fri Aug 12 18:07:21 1994 Ian Lance Taylor (ian@sanguine.cygnus.com) + * doc/c-tree.texi (Classes, TYPE_BINFO): Fix typo. - * config.sub: Accept mips64orion and mips64orionel as a CPU name. +2002-02-19 Philip Blundell <pb@nexus.co.uk> -Mon Aug 8 11:36:17 1994 Stan Shebs (shebs@andros.cygnus.com) + PR 5399 + * config/arm/arm.h (THUMB_LEGITIMATE_CONSTANT_P): Accept anything + if generating PIC. - * configure.in: Configure the examples directory. + PR 5054 + * config/arm/arm.md (call_insn) [TARGET_THUMB]: Use + arm_is_longcall_p rather than inspecting call-type cookie + directly. + (call_value_insn) [TARGET_THUMB]: Likewise. -Thu Aug 4 16:12:36 1994 Ian Lance Taylor (ian@sanguine.cygnus.com) +2002-02-19 Graham Stott <grahams@redhat.com> - * configure: Simplify Jun 2 1994 change. + * config/i386/i386.c (ix86_expand_builtin): Fix typo. -Wed Aug 3 04:58:16 1994 D. V. Henkel-Wallace (gumby@cygnus.com) +2002-02-19 David Edelsohn <edelsohn@gnu.org> - * change CC to /usr/latest/bin/gcc for lynx host builds, since - /bin/gcc isn't good enough to build gcc. + * config/rs6000/linux64.h (LINK_OS_LINUX_SPEC): Look in /lib64. + ({STARTFILE,ENDFILE}_LINUX_SPEC): Define. + (FP_SAVE_INLINE): Delete. -Wed Jul 27 09:07:14 1994 Fred Fish (fnf@cygnus.com) + * config/rs6000/sysv4.h (ENDFILE_SPEC): Add crtsaveres.o. + * config/rs6000/eabi.asm: Remove ABI save restore routines. + * config/rs6000/t-ppccomm: Build crtsavres.o. + * config/rs6000/crtsavres.asm: New file. - * Makefile.in (GDB_SUPPORT_FILES): Remove - (setup-dirs-gdb, gdb.tar.gz, make-gdb.tar.gz): Remove old rules. - (gdb.tar.gz): Add new rule to use standard distribution building - mechanism. +2002-02-19 Philip Blundell <philb@gnu.org> -Mon Jul 25 11:10:06 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com) + * config/arm/arm.c (use_return_insn): Don't reject interrupt + functions. + (arm_compute_save_reg_mask): Save LR for interrupt functions too. + (output_return_instruction): Allow interrupt functions to return with + ldmfd sp!, {... pc}^. Use LDR to restore any single register. + (arm_expand_prologue): Subtract 4 before stacking LR in an + interrupt function. - * configure.in: Warn about use of /usr/ucb/cc on Solaris. From - Bill Cox <bill@cygnus.com>. +2002-02-19 Philip Blundell <pb@nexus.co.uk> -Sat Jul 23 12:19:46 1994 Per Bothner (bothner@kalessin.cygnus.com) + * config/arm/arm.c (arm_encode_call_attribute): Operate on any + decl, not just FUNCTION_DECL. + (legitimize_pic_address): Handle local SYMBOL_REF like LABEL_REF. + (arm_assemble_integer): Likewise. + * config/arm/arm.h (ARM_ENCODE_CALL_TYPE): Allow any decl to be + marked local. - * config.guess: Recognize ISC. Patch from kwzh@gnu.ai.mit.edu. +2002-02-19 matthew green <mrg@eterna.com.au> -Fri Jul 22 17:53:59 1994 Stu Grossman (grossman@cygnus.com) + * config.gcc (sparc-*-netbsdelf*): Enable target. + (sparc64-*-netbsd*): New target. + * config/sparc/netbsd-elf.h: New file. + * config/sparc/t-netbsd64: New file. - * configure: Search current dir first in .gdbinit. +2002-02-19 Gaute B Strokkenes <gs234@cam.ac.uk> -Fri Jul 22 11:28:30 1994 Per Bothner (bothner@kalessin.cygnus.com) + * doc/rtl.texi (Flags, MEM_SCALAR_P): Fix typo. - * config.sub: Recognize freebsd (merged from gcc config.sub). +2002-02-19 Ryan T. Sammartino <ryants@shaw.ca> -Thu Jul 21 14:10:52 1994 Per Bothner (bothner@kalessin.cygnus.com) + * doc/invoke.texi: explicitly list the style guidelines that + -Weffc++ checks for. - * config.sub: Refer to NeXT's operating system as nextstep. +Tue Feb 19 12:37:23 CET 2002 Jan Hubicka <jh@suse.cz> - * config.sub (case $basic_machine): Re-order the cases, to match - the order in the FSF version (which is mostly alphabethical). - Merge in some additions and changes from the FSF. + * regmove.c (regmove_optimize): Avoid increasing of register pressure. -Sat Jul 16 12:03:08 1994 Stan Shebs (shebs@andros.cygnus.com) +2002-02-19 Neil Booth <neil@daikokuya.demon.co.uk> - * config.guess: Recognize m68k-atari-sysv4 and m88k-harris-csux7. - * config.sub: Recognize cxux7. - * configure.in: Use mh-cxux for m88k-harris-cxux*. + PR other/5718 + * gcc.c (cpp_unique_options): Treat -o as indicating object file + only if not -E. If -E, pass -o through to the preprocessor. -Mon Jul 11 14:37:39 1994 Per Bothner (bothner@kalessin.cygnus.com) +2002-02-19 Kazu Hirata <kazu@hxi.com> - * config.sub: Fix typo powerpc -> powerpc-*. + * config/h8300/h8300.h (REGNO_REG_CLASS): Replace a literal + register number with an appropriate macro. -Sat Jul 9 13:03:43 1994 Michael Tiemann (tiemann@blues.cygnus.com) +2002-02-19 Bryce McKinlay <bryce@waitaki.otago.ac.nz> - * Makefile.in: `all-emacs19' depends on `all-byacc'. + * doc/rtl.texi (Constants): Close @code tag. - * Makefile.in: Add all-emacs19 and install-emacs19 rules (in - parallel with all-emacs and install-emacs). Top-level command - `make all-emacs19 CC=gcc' now behaves as `make all-emacs CC=gcc'. +2002-02-19 Aldy Hernandez <aldyh@redhat.com> -Thu Jun 30 16:53:42 1994 Ian Lance Taylor (ian@sanguine.cygnus.com) + * config/i386/i386.md ("mmx_uavgv8qi3"): Use const_vector. + ("mmx_uavgv4hi3"): Same. + ("pmulhrwv4hi3"): Same. - * test-build.mk ($(host)-stamp-stage2-installed): Remove - $(relbindir)/make before doing ``make install'', and use - $(GNU_MAKE) while doing it. Avoids problem on SunOS with - installing over running make binary. - ($(host)-stamp-stage3-installed): Likewise. + * tree-inline.c (walk_tree): Handle vectors. -Tue Jun 28 13:43:25 1994 Jim Kingdon (kingdon@lioth.cygnus.com) + * c-common.c (constant_expression_warning): Handle vectors. + (overflow_warning): Same. - * config.guess: Recognize Mach. + * sched-deps.c (sched_analyze_2): Handle vectors. -Mon Jun 27 16:41:14 1994 Ian Lance Taylor (ian@sanguine.cygnus.com) + * rtlanal.c (rtx_unstable_p): Handle vectors. + (rtx_varies_p): Same. + (count_occurrences): Same. + (regs_set_between_p): Same. + (modified_between_p): Same. + (modified_in_p): Same. + (volatile_insn_p): Same. + (volatile_refs_p): Same. + (side_effects_p): Same. + (may_trap_p): Same. + (inequality_comparisons_p): Same. + (replace_regs): Same. + (computed_jump_p_1): Same. - * configure: Check ${exec_prefixoption}, not ${exec_prefix}, to - see whether --exec-prefix was used. + * rtl.c (DEF_MACHMODE): Change all definitions to accept 8th + argument. + (inner_mode_array): New. + (copy_rtx): Handle vectors. + (copy_most_rtx): Same. + (rtx_equal_p): Same. + (get_mode_alignment): Adjust for vectors. -Sun Jun 26 21:15:54 1994 Per Bothner (bothner@kalessin.cygnus.com) + * resource.c (mark_referenced_resources): Handle vectors. + (mark_set_resources): Same. - * README: Explicitly mention libg++/README. (Zoo's idea.) + * reload1.c (eliminate_regs): Handle vectors. + (elimination_effects): Same. + (scan_paradoxical_subregs): Same. -Tue Jun 21 12:45:55 1994 Jim Kingdon (kingdon@lioth.cygnus.com) + * reload.c (subst_reg_equivs): Handle vectors. - * Makefile.in: Add all-librx target similar to all-libproc. + * regrename.c (scan_rtx): Handle vectors. -Wed Jun 8 23:11:55 1994 Stu Grossman (grossman@cygnus.com) + * regclass.c (reg_scan_mark_refs): Handle vectors. - * config.guess: Rearrange tests for Alpha-OSF1 to properly deal - with post 1.2 uname bogosity. + * recog.c (find_single_use_1): Handle vectors. -Thu Jun 9 00:27:59 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com) + * local-alloc.c (equiv_init_varies_p): Handle vectors. + (contains_replace_regs): Same. + (memref_referenced_p): Same. - * configure: Remove temporary files on receipt of a signal. + * integrate.c (copy_rtx_and_substitute): Handle vectors. + (subst_constants): Same. -Tue Jun 7 12:06:24 1994 Ian Lance Taylor (ian@cygnus.com) + * genattrtab.c (attr_copy_rtx): Handle vectors. + (encode_units_mask): Same. + (clear_struct_flag): Same. + (count_sub_rtxs): Same. - * configure: If there is a package_makefile_frag, remove - ${subdir}/Makefile.tem after copying it in. + * gcse.c (want_to_gcse_p): Handle vectors. + (oprs_unchanged_p): Same. + (hash_expr_1): Same. + (oprs_not_set_p): Same. + (expr_killed_p): Same. + (compute_transp): Same. + (store_ops_ok): Same. -Mon Jun 6 21:35:02 1994 D. V. Henkel-Wallace (gumby@cygnus.com) + * function.c (purge_addressof_1): Do not allow paradoxical subregs + of vectors. + (fixup_var_refs_1): Same. + (instantiate_virtual_regs_1): Same. - * build_all.mk: support rs6000 lynx identifies itself as - rs6000-lynx-lynxos2.2.2. Also, use /usr/cygnus/progressive/bin/gcc - since /bin/gcc is too feeble to compile a modern gcc. + * fold-const.c (operand_equal_p): Handle vectors. + (fold): Same. + (rtl_expr_nonnegative_p): Same. -Mon Jun 6 16:06:34 1994 Karen Christiansen (karen@cirdan.cygnus.com) + * flow.c (mark_used_regs): Handle vectors. - * brought devo/test-build.mk update-to-date with progressive/ - test-build.mk. Add lynx targets and hppa flag info. + * df.c (df_uses_record): Handle vectors. -Sat Jun 4 17:23:54 1994 Per Bothner (bothner@kalessin.cygnus.com) + * cselib.c (cselib_subst_to_values): Handle vectors. + (cselib_mem_conflict_p): Same. + (hash_rtx): Same. - * configure.in: Use mh-ncrsvr43. Patch from - Tom McConnell <tmcconne@sedona.intel.com>. + * cse.c (canon_reg): Handle vectors. + (fold_rt): Same. + (cse_process_notes): Same. + (count_reg_usage): Same. + (canon_hash): Same. -Fri Jun 3 17:47:24 1994 Per Bothner (bothner@kalessin.cygnus.com) + * alias.c (nonlocal_mentioned_p): Add case for CONST_VECTOR. - * config.guess (i386-unknown-bsdi): No longer need to - check #if defined(__bsdi__) && defined(__i386__). + * combine.c (mark_used_regs_combine): Add case for CONST_VECTOR. -Thu Jun 2 18:56:46 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com) + * emit-rtl.c (init_emit_once): Generate const0_rtx for vectors. + (gen_rtx): Handle CONST_VECTOR. + (gen_const_vector_0): New. + (copy_rtx_if_shared): CONST_VECTORs can be shared. + (reset_used_flags): Same. + (copy_insn_1): Same. + (initializer_constant_valid_p): Handle VECTOR_CST. - * configure: Set program_transform_nameoption correctly. + * doc/c-tree.texi (Expression trees): Document VECTOR_CST. -Thu Jun 2 10:57:06 1994 Karen Christiansen (karen@cirdan.cygnus.com) + * doc/rtl.texi (Constants): Document const_vector. + (CONST0_RTX): Update for vectors. + (RTL sharing): Same. - * brought build-all.mk update-to-date with progressive build-all.mk, - added new targets and hppa info. + * print-tree.c (print_node): Add case for VECTOR_CST. -Thu Jun 2 00:12:44 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com) + * tree.h (TREE_VECTOR_CST_ELTS): New. + (struct tree_vector): New. + (union tree_node): Add vector node. + (build_vector): Add prototype. - * configure: If config.guess result is a prefix of the user - specified target, assume a native build and use the user specified - target as the host alias. Remove SunOS patch suffix removal hack. - * configure.in: Remove SunOS patch suffix removal hack. + * tree.def (VECTOR_CST): New. - * Makefile.in (CROSS_CHECK_MODULES): Remove check-flex, since it's - in NATIVE_CHECK_MODULES. + * tree.c (build_vector): New. -Wed Jun 1 10:49:41 1994 Bill Cox (bill@rtl.cygnus.com) + * expmed.c (make_tree): Handle CONST_VECTOR. - * Makefile.in: Rename HOST_ONLY to NATIVE. - * configure: Delete SunOs patch suffix from host_canonical - and build_canonical variables that are prepended to Makefiles. - * configure.in: Add comments for easier maintenance. + * rtl.h (CONSTANT_P): CONST_VECTORs are constants too. + (CONST_VECTOR_ELT): New. + (CONST_VECTOR_NUNITS): New. -Tue May 31 19:39:47 1994 Jim Kingdon (kingdon@lioth.cygnus.com) + * machmode.h (GET_MODE_INNER): New. + (DEF_MACHMODE): Accept 8th arg. - * Makefile.in: Add all-libproc target similar to all-gui. + * machmode.def: Add 8th argument for vector inner mode. + Add inner vector modes for vectors. -Tue May 31 17:16:33 1994 Tom Lord (lord@cygnus.com) + * rtl.def (VEC_CONST): Remove. + (CONST_VECTOR): New. - * Makefile.in (CHECK_MODULES): split into - HOST_ONLY_CHECK_MODULES and CROSS_CHECK_MODULES. + * expr.c (clear_storage): Allow vectors. + (is_zeros_p): Handle VECTOR_CST. -Tue May 31 16:36:36 1994 Paul Eggert (eggert@twinsun.com) + * varasm.c (output_constant_pool): Handle vectors. + (rtx_const): Add veclo and vechi fields. + (kind): Add RTX_VECTOR. + (decode_rtx_const): Add case for vector. - * config.guess (i386-unknown-bsdi): New system to guess. + * config/rs6000/rs6000-protos.h: Add zero_constant. -Wed May 25 16:47:10 1994 Jim Kingdon (kingdon@lioth.cygnus.com) + * config/rs6000/rs6000.c (rs6000_emit_move): Handle vector + constants. Force easy vector constants into memory. + (easy_vector_constant): New. + (emit_easy_vector_constant): New. + (rs6000_legitimize_reload_address): Do not generate bad reloads on + darwin. - * Makefile.in: Add all-gui target (but not yet build by "all"). + * config/rs6000/rs6000.md ("altivec_lvx"): Reflect what + instruction does. + ("altivec_lvxl"): Same. + (altivec_lvebx): Same. + (altivec_lvehx): Same. + (altivec_lvewx): Same. + ("*movv4si_const0"): New. + ("*movv4sf_const0"): New. + ("*movv8hi_const0"): New. + ("*movv16qi_const0"): New. -Thu May 26 08:53:19 1994 Bill Cox (bill@rtl.cygnus.com) +2002-02-18 Kazu Hirata <kazu@hxi.com> - * config.sub: Move deletion of patch suffix from here... - * configure.in: To here, at Ian's suggestion. The top- - level scripts might need to know of a patch level. + * config/h8300/h8300.c (notice_update_cc): Use + cc_status.value2. -Wed May 25 09:15:54 1994 Bill Cox (bill@rtl.cygnus.com) +2002-02-18 Kazu Hirata <kazu@hxi.com> - * config.sub: Strip off patch suffix so rtl is recognized - as a sunos4.1.3 machine, even though it's been patched. + * config/h8300/h8300.md (divmod patterns): Change the + constraints for operands[1] to register_operand. -Fri May 20 08:25:49 1994 Steve Chamberlain (sac@deneb.cygnus.com) +2002-02-18 Kazu Hirata <kazu@hxi.com> - * Makefile.in (INSTALL_LAST): Delete. - (INSTALL_DOSREL): New. + * config/h8300/h8300-protos.h: Remove the prototype for + p_operand. + * config/h8300/h8300.c (p_operand): Remove. + * config/h8300/h8300.md: Replace p_operand with + const_int_operand. -Thu May 19 17:12:12 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com) +2002-02-18 Philip Blundell <pb@nexus.co.uk> - * configure.in: Use ld for i[34]86-*-sysv4* and sparc-*-solaris2*. - Don't set use_gnu_ld to no for *-*-sysv4; that only controls - whether we pass down --with-gnu-ld anyhow. + * config/arm/arm.c (arm_compute_save_reg_mask): Fix typo in + comment. + (output_return_instruction): Allow use of LDR to unstack + return addresss even for interrupt handlers or when + interworking. If compiling for ARMv5, use interworking-safe + return instructions by default. Remove duplicated code and + lengthy "strcat" sequences. -Thu May 19 09:29:12 1994 Steve Chamberlain (sac@cygnus.com) +2002-02-18 Franz Sirl <Franz.Sirl-kernel@lauterbach.com> - * Makefile.in (INSTALL_LAST): Change operation so it works - on more flavors of make. - * configure.in (go32): Don't build libg++ or libio. + * config/rs6000/sysv4.h (STARTFILE_SPEC): Use crtbeginT.o for -static. + (LINK_EH_SPEC): Define. + * config/rs6000/t-ppccomm (EXTRA_MULTILIB_PARTS): Add crtbeginT.o. -Fri May 13 13:28:34 1994 Steve Chamberlain (sac@cygnus.com) +2002-02-18 Ulrich Weigand <uweigand@de.ibm.com> - * Makefile.in (Move HOST_PREFIX_1 and friends up so - they can be overriden by templates. + * config/s390/s390.c (s390_emit_prologue): Do not set the + frame_related flag for call-clobbered registers. -Sat May 7 16:46:44 1994 Steve Chamberlain (sac@cygnus.com) +Mon Feb 18 15:07:35 CET 2002 Jan Hubicka <jh@suse.cz> - * configure.in (target==go32): Don't build gdb. - * dosrel: New directory. + * i386.c (classify_argument): Properly classify SSE/MMX modes and VOIDmode. + (construct_container): Fix handling of SSE operands. + (ix86_expand_builtin): Fix handling of 64bit pointers. + (mmx_maskmovq_rex): New pattern. -Fri May 6 14:19:25 1994 Steve Chamberlain (sac@cygnus.com) +Mon Feb 18 11:55:55 CET 2002 Jan Hubicka <jh@suse.cz> - * configure.in (host==go32): Configure dosrel too. - * Makefile.in (INTALL_TARGET): Call INSTALL_LAST last. - (HOST_CC, HOST_PREFIX, HOST_PREFIX_1): Undefine, they should - be set by incoming names or templates. - (INSTALL_LAST): New rule. - * config/mh-go32: New fragment. + * regrename.c (kill_set_value): Handle subregs properly. -Thu May 5 17:35:05 1994 Stan Shebs (shebs@andros.cygnus.com) +2002-02-18 David Billinghurst <David.Billinghurst@riotinto.com> - * config.sub (sparclitefrw, sparclitefrwcompat): Don't set the os. + * objc/objc-act.c (handle_impent): Remove leading '*' + from objc_class_name. -Thu May 5 20:06:45 1994 Ken Raeburn (raeburn@cujo.cygnus.com) +2002-02-17 Richard Henderson <rth@redhat.com> - * config/mh-lynxrs6k: Renamed from mh-lynxosrs6k, to make it - unique in 8.3 naming schemes. - * configure.in (appdirs): New variable. Currently empty, but will - be used in gas distribution. If nonempty, lists a set of - directories at least one of which must get configured, or top - level configuration is considered to have failed. - (rs6000-*-lynxos*): Use new file name. + * config/alpha/alpha.c (some_small_symbolic_operand, + some_small_symbolic_operand_1, split_small_symbolic_operand, + split_small_symbolic_operand_1): Rename from *symbolic_mem_op*. + Handle small SYMBOL_REFs anywhere, not just inside memories. + * config/alpha/alpha-protos.h: Update. + * config/alpha/alpha.h (PREDICATE_CODES): Update. + * config/alpha/alpha.md (small symbolic operand splitter): Update. -Thu May 5 13:38:36 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com) +2002-02-17 Roland McGrath <roland@frob.com> - Eliminate XTRAFLAGS. - * Makefile.in (CC_FOR_TARGET): If newlib exists, refer to the - newlib include files using -idirafter, and also use -nostdinc. - (CXX_FOR_TARGET): Likewise. - (XTRAFLAGS): Removed. - (BASE_FLAGS_TO_PASS): Remove XTRAFLAGS_FOR_TARGET. - (EXTRA_HOST_FLAGS): Remove XTRAFLAGS. - (EXTRA_TARGET_FLAGS, EXTRA_GCC_FLAGS): Likewise. - ($(DO_X)): Don't pass down XTRAFLAGS. + * config.gcc (powerpc-*-gnu-gnualtivec*, + powerpc-*-gnu*, powerpc64-*-gnu*): New configurations. + * config/rs6000/gnu.h: New file. + * config/rs6000/sysv4.h (SUBTARGET_OVERRIDE_OPTIONS): + Grok "gnu" in rs6000_abi_name. + (ASM_SPEC, CC1_SPEC, LINK_START_SPEC, LINK_OS_SPEC, + CPP_ENDIAN_SPEC, CPP_SPEC, STARTFILE_SPEC, LIB_SPEC, ENDFILE_SPEC): + Grok -mcall-gnu analogous to -mcall-linux et al. + (LIB_GNU_SPEC, STARTFILE_GNU_SPEC, ENDFILE_GNU_SPEC, + LINK_START_GNU_SPEC, LINK_OS_GNU_SPEC, CPP_OS_GNU_SPEC): New macros. + (SUBTARGET_EXTRA_SPECS): Add *_os_gnu specs using them. -Thu May 5 00:16:36 1994 Ken Raeburn (raeburn@kr-pc.cygnus.com) +2002-02-17 Jakub Jelinek <jakub@redhat.com> - * configure.in (mips*-dec-bsd*): New target; do build linker. - (mips*-*-bsd*): New target; don't build linker. + PR c/3444: + * c-typeck.c (build_binary_op) [BIT_XOR_EXPR]: Remove explicit + shortening. -Wed May 4 20:10:10 1994 D. V. Henkel-Wallace (gumby@cygnus.com) +2002-02-17 Philipp Thomas <pthomas@suse.de> - * configure.in: support rs6000-*-lynxos* configuration. - support sunos4 as a cross target. + * config/cris/cris.h: Undefine STARTFILE_SPEC and + ENDFILE_SPEC before (re)defining them. - * config.sub: look for lynx*, not lynx since the OS version may - legitimately be part of the name. +2002-02-17 Kazu Hirata <kazu@hxi.com> -Tue May 3 21:48:11 1994 Ken Raeburn (raeburn@cujo.cygnus.com) + * config/h8300/h8300.c: Fix formatting. + * config/h8300/h8300.h: Likewise. - * configure.in (i[34]86-*-sco*): Move to be with other i386 - targets. - (romp-*-*): New target. Skip various binary utilities. - (vax-*-*): New target. Don't build newlib. - (vax-*-vms): Renamed from *-*-vms. Don't build opcodes or newlib. +2002-02-17 Philipp Thomas <pthomas@suse.de> -Thu Apr 28 15:03:05 1994 David J. Mackenzie (djm@rtl.cygnus.com) + * doc/tm.texi: Explain why empty strings should not be + marked for translation. - * configure.in: Only set host_makefile_frag if config - directory exists. +2002-02-17 Philipp Thomas <pthomas@suse.de> -Wed Apr 27 12:14:30 1994 David J. Mackenzie (djm@rtl.cygnus.com) + * final.c (output_operand_lossage): Changed to accept + printf style arguments. Change calls where necessary. + * output.h (output_operand_lossage): Change declaration + accordingly. Update copyright. + * config/arc/arc.c config/fr30/fr30.c config/m32r/m32r.c + config/m88k/m88k.c : Adapt all calls to output_operand_lossage. + Update copyright date where necessary. - * install.sh: If $dstdir exists, don't check whether each - component does. + * config/i386/i386.c (print_operand): Likewise. Remove use of + sprintf. -Tue Apr 26 18:11:33 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com) + * config/cris/cris.c (cris_operand_lossage): Likewise. + Rename parameter so that exgettext recognizes it as + translatable message. + (LOSE_AND_RETURN): Rename parameter to msgid. - * test-build.mk (HOLES): Add sleep; used by rcs/src/conf.sh. +2002-02-17 Kazu Hirata <kazu@hxi.com> -Mon Apr 25 15:06:34 1994 Stan Shebs (shebs@andros.cygnus.com) + * config/h8300/h8300.h (CONDITIONAL_REGISTER_USAGE): Replace a + hard coded register number with an appropriate macro. + (HARD_REGNO_MODE_OK): Likewise. + (ARG_POINTER_REGNUM): Likewise. + (STATIC_CHAIN_REGNUM): Likewise. + (RETURN_ADDRESS_POINTER_REGNUM): Likewise. + * config/h8300/h8300.md (define_constants): Define more + register numbers. - * configure.in (*-*-lynxos*): Don't configure newlib for either - native or cross Lynx. +2002-02-17 Philipp Thomas <pthomas@suse.de> -Sat Apr 16 11:58:16 1994 Doug Evans (dje@canuck.cygnus.com) + * config/i386/i386.h: Don't mark empty strings for translation. - * config.sub (sparc64-elf): Fix os. - (z8k): Remove duplicate. +2002-02-16 H.J. Lu <hjl@gnu.org> -Thu Apr 14 23:33:17 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com) + * config/mips/linux.h (ASM_PREFERRED_EH_DATA_FORMAT): New. - * Makefile.in (gcc-no-fixedincludes): Touch gcc/include/fixed, not - gcc/stmp-fixproto, to try to prevent fixproto from being run. +2002-02-16 Zack Weinberg <zack@codesourcery.com> -Wed Apr 13 15:14:52 1994 Bill Cox (bill@cygnus.com) + * cppinit.c (merge_include_chains): Check for brack being + NULL before attempting to merge it with qtail. - * configure: Make file links cleanly even if Lynx fails on - an NFS symlink (at least fail cleanly). +2002-02-16 Andrew Cagney <ac131313@redhat.com> -Mon Apr 11 10:58:56 1994 Jim Wilson (wilson@sphagnum.cygnus.com) + * config/rs6000/netbsd.h (PREFERRED_DEBUGGING_TYPE): Set to + DBX_DEBUG. - * test-build.mk (CC): For mips-sgi-irix4, change -XNh1500 to - -XNh2000. +2002-02-16 John David Anglin <dave@hiauly1.hia.nrc.ca> -Sat Apr 9 15:10:45 1994 David J. Mackenzie (djm@rtl.cygnus.com) + * pa/t-pa, pa/t-pro, som.h: Revert last patch. - * configure: Unknown options are fatal again. +2002-02-16 John David Anglin <dave@hiauly1.hia.nrc.ca> -Fri Apr 8 12:01:41 1994 David J. Mackenzie (djm@cygnus.com) + * pa/t-pa (LIB2FUNCS_EXTRA): Don't build lib2funcs.asm. + * pa/t-pro (LIB2FUNCS_EXTRA): Likewise. + * som.h (DO_GLOBAL_DTORS_BODY): Delete define. - * configure: Ignore --x-includes and --x-libraries, for Autoconf - compatibility. +Sat Feb 16 13:48:50 2002 Richard Kenner <kenner@vlsi1.ultra.nyu.edu> -Thu Apr 7 17:31:43 1994 Doug Evans (dje@canuck.cygnus.com) + * config/alpha/alpha.md (*movsi_nt_vms_nofix): Was *movsi_nt_vms; + now only if !TARGET_FIX. + (*movsi_nt_vms_fix): New pattern. - * build-all.mk: Add `clean' target. +2002-02-16 Douglas B Rupp <rupp@gnat.com> -Wed Apr 6 20:44:56 1994 Peter Schauer (pes@regent.e-technik.tu-muenchen.de) + * config/alpha/alpha.c: Implement null frame procedure types on VMS. + (alpha_procedure_type): Replaces alpha_is_stack_procedure. + (alpha_sa_mask, alpha_sa_size): Reflect above change. + (alpha_pv_save_size, alpha_expand_prologue): Likewise. + (alpha_start_function, alpha_expand_epilogue): Likewise. + (unicosmk_gen_dsib): Likewise. - * config.guess: Add SINIX support. - * configure.in: Add mips-*-sysv4* support. +Sat Feb 16 13:39:09 2002 Richard Kenner <kenner@vlsi1.ultra.nyu.edu> -Mon Apr 4 17:41:44 1994 Doug Evans (dje@canuck.cygnus.com) + * expr.c (store_constructor): Handle target REG case for ARRAY_TYPE. - * build-all.mk: Document all useful targets. - If canonhost is sparc-sun-solaris2.3, change it to sparc-sun-solaris2. - If canonhost is mips-sgi-irix4.0.5H, change it to mips-sgi-irix4. +2002-02-16 Ulrich Weigand <uweigand@de.ibm.com> -Thu Mar 31 04:55:57 1994 David J. Mackenzie (djm@rtl.cygnus.com) + * config/s390/s390.c (pool_stop_uid, other_chunk, far_away, + check_and_change_labels, s390_final_chunkify): Delete. + (s390_split_branches, s390_chunkify_pool): New functions. + (s390_function_prologue): Call them. - * configure: Support --silent, --quiet. + * config/s390/s390.h (S390_REL_MAX): Delete. + (S390_CHUNK_MAX, S390_CHUNK_OV): Adjust values. -Wed Mar 30 21:37:38 1994 David J. Mackenzie (djm@rtl.cygnus.com) + * config/s390/s390.md (cjump, icjump, jump): Fix length + attribute calculation. - * configure: Support --disable-FEATURE. -Tue Mar 29 19:15:05 1994 Jim Kingdon (kingdon@lioth.cygnus.com) +2002-02-15 David Edelsohn <edelsohn@gnu.org> - * config.guess: Recognize NCR running SVR4.3. + * config/rs6000/linux64.h (STRIP_NAME_ENCODING): Delete. + * config/rs6000/ppc-asm.h (JUMP_TARGET): Define for powerpc64. -Mon Mar 28 14:55:15 1994 Per Bothner (bothner@kalessin.cygnus.com) +2002-02-15 John David Anglin <dave@hiauly1.hia.nrc.ca> - * config.guess: Make BSDI generate i386-unknown-bsd386. - Patch from Paul Eggert <eggert@twinsun.com>. + * gcc.c (init_gcc_specs): Revert patch from 2002-02-15. + * config/pa/pa-linux.h (LIB_SPEC): Likewise. + * config/pa/pa32-linux.h (LINK_COMMAND_SPEC): Likewise. -Mon Mar 28 12:54:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com) +2002-02-15 Richard Sandiford <rsandifo@redhat.com> - * configure.in (powerpc-*-aix*): Treat like rs6000-*-*. + * c-decl.c (grokdeclarator): Prevent a segfault on unnamed decls. -Sat Mar 26 11:25:48 1994 David J. Mackenzie (djm@rtl.cygnus.com) +2002-02-15 Richard Sandiford <rsandifo@redhat.com> - * configure: Make unrecognized options give nonfatal warnings - instead of fatal errors, and pass them to any subdirectory - configures in case they recognize them. - Make --x equivalent to --with-x. + * reload.c (find_dummy_reload): Check that an output register + is valid for its mode. -Fri Mar 25 21:52:10 1994 David J. Mackenzie (djm@rtl.cygnus.com) +2002-02-14 Alexandre Oliva <aoliva@redhat.com> - * configure: Add --enable-* options. Clean up usage message and - some comments. + * combine.c (known_cond): After replacing the REG of a SUBREG, try + to simplify it. -Thu Mar 24 09:12:53 1994 Doug Evans (dje@canuck.cygnus.com) + * function.c (assign_parms): Demote promoted argument passed by + transparent reference. - * Makefile.in (NM_FOR_TARGET): Build tree version is now nm.new. +2001-02-14 Joel Sherrill <joel@OARcorp.com> -Sun Mar 20 11:28:22 1994 Jeffrey A. Law (law@snake.cs.utah.edu) + * config/arm/rtems-elf.h, config/h8300/rtems.h: Removed redundant + -Acpu() and -Amachine() to eliminate warnings. - * configure.in (hppa*-*-*): Enable binutils. +2002-02-14 Ulrich Weigand <uweigand@de.ibm.com> -Sat Mar 19 11:50:16 1994 Jim Kingdon (kingdon@lioth.cygnus.com) + * config/s390/linux.h (ASM_OUTPUT_ALIGNED_BSS): New. - * config.sub: Recognize cisco. +2002-02-14 Kazu Hirata <kazu@hxi.com> -Fri Mar 18 16:42:32 1994 Jason Merrill (jason@deneb.cygnus.com) + * config/h8300/h8300-protos.h: Update the prototype for + const_costs. + * config/h8300/h8300.c (const_costs): Treat SET as a little + more expensive operation. + * config/h8300/h8300.h (DEFAULT_RTX_COSTS): Update the + reference to const_costs. - * Makefile.in (CXXFLAGS): Add -fexternal-templates. +2002-02-14 Hans-Peter Nilsson <hp@axis.com> -Tue Mar 15 11:25:55 1994 Jim Kingdon (kingdon@lioth.cygnus.com) + * config.gcc (c4x-*-rtems*): Fix typo in tm_file setting. - * config.guess: about target *-hitachi-hiuxwe2, don't print more - than one configuration name. Add comment. +2002-02-14 Jakub Jelinek <jakub@redhat.com> -Sun Mar 6 23:13:38 1994 Hisashi MINAMINO (minamino@sra.co.jp) + PR c/5503: + * c-decl.c (duplicate_decls): If builtin type has TYPE_ARG_TYPES NULL, + use arguments from newtype. - * config.guess: about target *-hitachi-hiuxwe2, fixed - machine guessing order. [Hitachi's CPU_IS_HP_MC68K - macro is incorrect.] +2002-02-13 Eric Christopher <echristo@redhat.com> -Sun Mar 13 09:10:08 1994 Jim Kingdon (kingdon@lioth.cygnus.com) + * config/mips/mips.c (override_options): Add check for march/mipsX + on the same command line. Fix error message in cpu processing. + Remove architecture and ISA checks. - * Makefile.in (TAGS): Just build TAGS in each subdirectory, rather - than the "make ls" stuff which used to be here. +2002-02-14 Aldy Hernandez <aldyh@redhat.com> -Fri Mar 11 12:52:39 1994 Per Bothner (bothner@kalessin.cygnus.com) + * config/rs6000/darwin.h (ROUND_TYPE_ALIGN): Adjust for vectors. - * config.guess: Recognize i[34]86-unknown-freebsd. - From Shawn M Carey <smcarey@rodan.syr.edu>. + * config/rs6000/sysv4.h (ROUND_TYPE_ALIGN): Add MAX. -Thu Mar 3 14:24:21 1994 Per Bothner (bothner@kalessin.cygnus.com) +2002-02-14 Aldy Hernandez <aldyh@redhat.com> - * configure.in (noconfigdirs for alpha): Remove libg++ and libio. + * config/rs6000/rs6000.md ("*movv4si_internal"): Add m<-r and r<-r + alternatives. + ("*movv8hi_internal1"): Same. + ("*movv16qi_internal1"): Same. + ("*movv4sf_internal1"): Same. -Wed Mar 2 13:28:48 1994 Jim Kingdon (kingdon@deneb.cygnus.com) + * config/rs6000/rs6000.c (rs6000_legitimize_reload_address): Do + not push_reload for altivec modes. - * config.guess: Check for ptx. +2002-02-13 Joel Sherrill <joel@OARcorp.com> -Mon Feb 28 16:46:50 1994 Kung Hsu (kung@mexican.cygnus.com) + * config.gcc (a29k-*-rtems), config/a29k/rtems.h: General cleanup across + all RTEMS targets including removal of #includes from config/*/rtems*.h + file and adding them to tm_file setting. Added xm_defines=POSIX to + many targets. + * config.gcc (c4x-*-rtems), config/c4x/rtems.h: Ditto. + * config.gcc (h8300-*-rtems), config/h8300/rtems.h: Ditto. + * config.gcc (hppa1.1-*-rtems), config/pa/rtems.h: Ditto. + * config.gcc (i960-*-rtems), config/i960/rtems.h: Ditto. + * config.gcc (m68k-*-rtems*), config/m68k/rtems.h, + config/m68k/rtemself.h: Ditto. + * config.gcc (mips*-*-rtems*), config/mips/rtems.h, + config/mips/rtems64.h: Ditto. + * config.gcc (powerpc-*-rtems*), config/rs6000/rtems.h: Ditto. + * config.gcc (sh-*-rtems*), config/sh/rtems.h, config/sh/rtemself.h: + Ditto. + * config.gcc (sparc-*-rtems*), config/sparc/rtems.h, + config/sparc/rtemself.h: Ditto. + * config.gcc (v850-*-rtems*), config/v850/rtems.h: Ditto. + * config.gcc (arm-rtems), config/arm/rtems-elf.h: Ditto plus moved + arm-rtems stanza closer to other arm-elf targets and made arm-rtems + more like arm-elf. + * config.gcc (i[34567]86-*-rtems*), config/i386/djgpp-rtems.h, + config/i386/rtems.h, config/i386/rtemself.h: Ditto plus i386-rtemself + target made more similar to i386-elf. + * config/i386/t-rtems-i386: Added soft float support and multilibs. + * config/m68k/t-m68kbare: Add 68040 and 68060 as multilib alternatives to + be similar to config/m68k/t-m68kelf. + * gthr-rtems.h: Encapsulate with extern "C" for C++. - * config.sub: Add os9k checking. +Wed Feb 13 23:41:15 CET 2002 Jan Hubicka <jh@suse.cz> -Thu Feb 24 07:09:04 1994 Jeffrey A. Law (law@snake.cs.utah.edu) + * regmove.c (kill_value): Handle subregs. - * config.guess: Handle OSF1 running on HPPA processors +Wed Feb 13 23:34:30 CET 2002 Jan Hubicka <jh@suse.cz> -Fri Feb 18 14:14:00 1994 Ken Raeburn (raeburn@rtl.cygnus.com) + * i386.md (mul patterns): Allow memory operand to be first; + add expanders where needed; fix constraints. + (min?f_nonieee, max?f_nonieee, SSE TImode patterns): + Allow memory operand to be the first. - * configure: If subdir configure fails, print out a message with - subdirectory name, in case subdir's configure code didn't identify - itself. + * i386.c (ix86_prepare_fp_compare_args): Fix condition for swapping + operands. -Fri Feb 18 12:50:15 1994 Doug Evans (dje@cygnus.com) +2002-02-13 Jakub Jelinek <jakub@redhat.com> - * configure.in: Remove embedded newlines from configdirs. - Avoid mismatches of substrings. Fix matching strings at end - of configdirs. + PR c/5681: + * expr.c (safe_from_p): Pass VOIDmode to true_dependence instead of + GET_MODE (x). -Fri Feb 11 15:33:33 1994 Stu Grossman (grossman at cygnus.com) +2002-02-13 Jakub Jelinek <jakub@redhat.com> - * config.guess: Add Lynx/rs6000 config support. + PR optimization/5547: + * config/i386/i386.c (i386_simplify_dwarf_addr): Simplify + all valid IA-32 address modes involving non-scaled %ebx and + GOT/GOTOFF as displacement. -Tue Feb 8 13:41:09 1994 Ken Raeburn (raeburn@rtl.cygnus.com) +2002-02-13 Ulrich Weigand <uweigand@de.ibm.com> - * configure.in (alpha-dec-osf1*, alpha*-*-*): Build gas. + * config/s390/s390.c (s390_final_chunkify): Re-run shorten_branches + after emitting ltorg insns. -Mon Feb 7 15:42:36 1994 Jeffrey A. Law (law@cygnus.com) + * config/s390/s390.md (*cmpdf_ccs_0, *cmpdf_ccs, *cmpsf_ccs_0, + *cmpsf_ccs, truncdfsf2_ieee, *adddf3, *addsf3, *subdf3, *subsf3, + *muldf3, *mulsf3, *divdf3, *divsf3, *negdf2, *negsf2, *absdf2, + *abssf2): Fix "op_type" attribute. - * configure.in (hppa*-*-osf*): Treat this just like most other - PA configurations (eg no binutils or ld). - (hppa*-*-*elf*): These configurations have binutils and ld. +2002-02-13 Douglas B Rupp <rupp@gnat.com> -Sun Feb 6 16:35:07 1994 Jeffrey A. Law (law@snake.cs.utah.edu) + * mkconfig.sh: Avoid using a subshell redirect. + ($output.T): Change to $(output)T. + (ENABLE_NLS): Remove unneeded undef. - * config.sub (hiux): Fix typo. From m-kasahr@sramhc.sra.co.JP. + * config/alpha/vms.h (MD_EXEC_PREFIX, MD_STARTFILE_PREFIX): Define. + * config/alpha/x-vms (libsubdir): Define. -Sat Feb 5 01:00:33 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com) + * config/alpha/vms.h (MD_FALLBACK_FRAME_STATE_FOR): Handle + register frame procedures. Optimize retrieving context. - * configure.in (rs6000-*-*): Build gas. + * config/alpha/t-vms (MULTILIB_OPTIONS): Define. + (MULTILIB_DIRNAME, LIBGCC, INSTALL_LIBGCC): Likewise. + * config/alpha/vms.h (ASM_FILE_START): Write .arch directive. -Wed Feb 2 13:57:57 1994 Jeffrey A. Law (law@snake.cs.utah.edu) +Wed Feb 13 09:45:08 2002 Richard Kenner <kenner@vlsi1.ultra.nyu.edu> - * Makefile.in: Avoid bug in losing hpux sed. + * alias.c (find_base_term, case ZERO_EXTEND, case SIGN_EXTEND): + Make same change as for find_base_value. -Wed Feb 2 14:53:05 1994 Jim Kingdon (kingdon@lioth.cygnus.com) +2002-02-13 Kazu Hirata <kazu@hxi.com> - * Makefile.in, test-build.mk: Remove MUNCH_NM; it was only needed - for GDB and GDB has been fixed to not need it. + * config/h8300/h8300.h (MODES_TIEABLE_P): Accept a combination + of QImode and SImode. -Mon Jan 31 18:40:55 1994 Stu Grossman (grossman at cygnus.com) +2002-02-13 Kazu Hirata <kazu@hxi.com> - * config/mh-lynxosrs6k: Account for lack of ranlib! + * config/h8300/h8300.c (h8300_adjust_insn_length): Correct the + length computation of movsi. + * config/h8300/h8300.md (movsi_h8300hs): Correct the length. -Sun Jan 30 17:58:06 1994 Ken Raeburn (raeburn@cujo.cygnus.com) +2002-02-13 Kazu Hirata <kazu@hxi.com> - * config.guess: Recognize vax hosts. + * config/h8300/h8300.md (subqi3): Tighten the predicate for + operands[2] to register_operand. -Fri Jan 28 15:29:38 1994 Ken Raeburn (raeburn@cujo.cygnus.com) +Wed Feb 13 10:35:56 CET 2002 Jan Hubicka <jh@suse.cz> - * configure (while loop): Don't use "break 2" inside case - statement -- the case statement isn't an enclosing loop. + * i386.md (fop_*_comm_*): allow nonimmediate in the first operand. -Mon Jan 24 18:40:06 1994 Per Bothner (bothner@kalessin.cygnus.com) +2002-02-12 Aldy Hernandez <aldyh@redhat.com> - * config.guess: Clean up NeXT support, to allow nextstep - on Intel machines. Make OS be nextstep. + * config/rs6000/rs6000.md: Use predicate altivec_register_operand + for altivec_lvx* and altivec_stvx*. + ("*movv4si_internal"): Add constraint for loading from GPRs. + ("*movv8hi_internal1"): Same. + ("*movv16qi_internal1"): Same. + ("*movv4sf_internal1"): Same. -Sun Jan 23 18:47:22 1994 Richard Kenner (kenner@vlsi1.ultra.nyu.edu) + * config/rs6000/rs6000.c (altivec_register_operand): New. - * config.guess: Add alternate forms for Convex. + * config/rs6000/rs6000.h (PREDICATE_CODES): Add + altivec_register_operand. -Thu Jan 20 16:13:41 1994 Stu Grossman (grossman at cygnus.com) +2002-02-13 Hans-Peter Nilsson <hp@bitrange.com> - * configure: Completely rewrite option processing. Take - advantage of pattern-matching to avoid invoking test frequently. - Also clean up host and target defaulting logic. + * config/mmix/mmix.c (mmix_assemble_integer) <case 4>: Don't + handle SYMBOL_REF. -Mon Jan 17 15:06:56 1994 Ken Raeburn (raeburn@cujo.cygnus.com) +2002-02-13 Stan Shebs <shebs@apple.com> - * Makefile.in: Replace all occurrances of "rootme" with "r" and - "$${rootme}" with "$$r", to increase the likelihood that the do-* - commands (plus user environment) will fit SCO limits. + * c-typeck.c (digest_init): Handle vectors. + (really_start_incremental_init): Same. + (pop_init_level): Same. + (process_init_element): Same. -Thu Jan 6 11:20:57 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com) + * varasm.c (output_constant): Same. - * configure.in: Don't issue warnings about directories which are - not being configured if -norecursion is set. Correct test for - --with-gnu-as and --with-gnu-ld to not get confused by substring - matches. + * expr.c (clear_storage): Same. + (store_constructor): Same. - * configure.in: Don't build gas for alpha-dec-osf1*. +2002-02-12 Eric Christopher <echristo@redhat.com> -Tue Jan 4 17:10:19 1994 Stu Grossman (grossman at cygnus.com) + * explow.c (hard_function_value): Add comment explaining + signed/unsigned comparison. - * configure: Back out Per's change of 12/19/1993. It changes the - behavior of configure in unexpected and confusing ways. +2002-02-12 Jakub Jelinek <jakub@redhat.com> - Also, use different delim char when calculating - program_transform_name so that the name can contain slashes. + * jump.c (never_reached_warning): Add finish argument. + If finish is NULL, stop on CODE_LABEL, otherwise stop before first + real insn after end. + * rtl.h (never_reached_warning): Adjust prototype. + * cse.c (cse_insn): Pass NULL as finish to never_reached_warning. + * cfgrtl.c (flow_delete_block): Pass b->end as finish to + never_reached_warning. -Sat Jan 1 13:45:31 1994 Rob Savoye (rob@darkstar.cygnus.com) +2002-02-12 Graham Stott <grahams@redhat.com> - * configure.in, config.sub: Add support for VSTa micro-kernel. + * config/hp/pa.h (GO_IF_LEGITIMATE_ADDRESS): Fix typos. -Sat Dec 25 20:00:47 1993 Jeffrey A. Law (law@snake.cs.utah.edu) +2002-02-12 Kazu Hirata <kazu@hxi.com> - * configure.in: Nuke hacks which were used to get a special - version of GAS for HPPA configurations. + * config/h8300/h8300.c (shift_alg_hi): Improve the 15-bit + logical shifts on H8/300. + (shift_alg_si): Improve several shifts on H8/300. + (get_shift_alg): Likewise. -Sun Dec 19 20:40:44 1993 Per Bothner (bothner@kalessin.cygnus.com) +2002-02-12 Graham Stott <grahams@redhat.com> - * configure: If only ${target_alias} is given, use that - as the default for ${host_alias}. - * configure: Add missing back-slashes before nested quotes. + * config/pa/pa.c (compute_movstrsi_length): Fix typos. -Wed Dec 15 18:07:18 1993 david d `zoo' zuhn (zoo@andros.cygnus.com) +Tue Feb 12 10:12:56 2002 Richard Kenner <kenner@vlsi1.ultra.nyu.edu> - * Makefile.in (BASE_FLAGS_TO_PASS): add YACC=$(BISON) + * alias.c (find_base_value, case ZERO_EXTEND, case SIGN_EXTEND): + Handle #ifdef POINTERS_EXTEND_UNSIGNED. -Tue Dec 14 21:25:33 1993 Per Bothner (bothner@cygnus.com) +2002-02-11 Hans-Peter Nilsson <hp@bitrange.com> - * config.guess: Recognize some Tektronix configurations. - From Kaveh R. Ghazi <ghazi@noc.rutgers.edu>. + * config/mmix/mmix.c (mmix_assemble_integer) <case 1, 2>: Handle + non-CONST_INT through default_assemble_integer. + <case 4>: Likewise, for non-CONST_INT, non-SYMBOL_REF. + <case 8>: Abort for CONST_DOUBLE. -Sat Dec 11 11:18:00 1993 Steve Chamberlain (sac@thepub.cygnus.com) +2002-02-11 John David Anglin <dave@hiauly1.hia.nrc.ca> - * config.sub: Match any flavor of SH. + * gcc.c (init_gcc_specs): Add static libgcc to link when "-shared" + is specified. + * config/pa/pa-linux.h (LIB_SPEC): Delete. + * config/pa/pa32-linux.h (LINK_COMMAND_SPEC): Delete. -Thu Dec 2 17:16:58 1993 Ken Raeburn (raeburn@cujo.cygnus.com) +2002-02-11 Andrew Haley <aph@cambridge.redhat.com> - * configure.in: Don't try to configure newlib for Alpha. + * config/stormy16/stormy16.md (zero_extendqihi2): New. -Thu Dec 2 14:35:54 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com) +2002-02-11 Alexandre Oliva <aoliva@redhat.com> - * configure.in: Don't build ld for Irix 5. Don't build gas, - libg++ or libio for any Alpha target. + * regrename.c (regrename_optimize): Don't accept a + part-clobbered register if the replaced register is not part + clobbered. - * configure.in (mips*-sgi-irix5*): New target; use mh-irix5. - * config/mh-irix5. New file for Irix 5. + * calls.c (store_one_arg): In the non-BLKmode non-partial case, + take padding into account when computing the argument value. -Wed Dec 1 17:00:33 1993 Jason Merrill (jason@deneb.cygnus.com) + * config/sh/sh.h (FUNCTION_ARG_REGNO_P): Fix parenthesizing error. - * Makefile.in (GZIPPROG): Renamed from GZIP, which gzip uses for - default arguments -- so it tried to compress itself. + * combine.c (try_combine): Apply substitutions in + CALL_INSN_FUNCTION_USAGE too. -Tue Nov 30 13:45:15 1993 david d `zoo' zuhn (zoo@andros.cygnus.com) +2002-02-11 Aldy Hernandez <aldyh@redhat.com> - * configure.in (notsupp): ensure that a space is always at the end - of the configdirs list, since the grep checks for an explicit space + * config/rs6000/rs6000.c (altivec_init_builtins): Handle + __builtin_altivec_abs*. + (bdesc_abs): New. -Tue Nov 16 15:04:27 1993 david d `zoo' zuhn (zoo@rtl.cygnus.com) + * config/rs6000/rs6000.h (rs6000_builtins): Add + ALTIVEC_BUILTIN_ABS*. - * configure.in (target i386-sysv4.2): don't build ld, since static - versions of many libraries are not available. + * config/rs6000/altivec.h: Use const char for builtins expecting + literals. + (vec_abs): New versions for C and C++. + (vec_abss): Same. -Tue Nov 16 14:28:12 1993 Jim Kingdon (kingdon@lioth.cygnus.com) +2002-02-10 Kazu Hirata <kazu@hxi.com> - * config.guess: Recognize Apollos (using environment variables). - * configure.in: Don't configure ld, binutils, or gprof for Apollo. + * config/h8300/h8300.h (INITIALIZE_TRAMPOLINE): Simplify by + using Pmode. -Thu Nov 11 12:03:50 1993 Jim Kingdon (kingdon@lioth.cygnus.com) +2002-02-10 Kazu Hirata <kazu@hxi.com> - * config.guess: Recognize Sony news mips running newsos. + * config/h8300/h8300.h (STACK_POINTER_REGNUM): Use the + constant definition from h8300.md. + (FRAME_POINTER_REGNUM): Likewise. + * config/h8300/h8300.md (define_constants): Add FP_REG. -Wed Nov 10 16:57:00 1993 Mark Eichin (eichin@cygnus.com) +2002-02-10 Kazu Hirata <kazu@hxi.com> - * Makefile.in (all-cygnus, build-cygnus): "fi else" needs to be - "fi ; else" for bash. + * config/h8300/h8300.c (print_operand): Remove redundant code. -Tue Nov 9 15:54:01 1993 Mark Eichin (eichin@cygnus.com) +2002-02-10 Kazu Hirata <kazu@hxi.com> - * Makefile.in (BASE_FLAGS_TO_PASS): pass SHELL. + * config/h8300/h8300-protos.h: Remove the prototype for byte_reg. + * config/h8300/h8300.c (byte_reg): Make it static. -Fri Nov 5 08:07:27 1993 D. V. Henkel-Wallace (gumby@blues.cygnus.com) +2002-02-10 Richard Henderson <rth@redhat.com> - * config.sub: accept unixware as an alias for svr4.2. - Fix some inconsistancies with the gcc version. + PR c/5623 + * c-typeck.c (incomplete_type_error): Handle flexible array members. -Fri Nov 5 15:14:12 1993 Jim Kingdon (kingdon@lioth.cygnus.com) +2002-02-10 Richard Henderson <rth@redhat.com> - * Makefile.in (DISTDOCDIRS): Add gdb. + PR c++/5624 + * tree.c (append_random_chars): Don't abort if main_input_filename + does not exist. -Fri Nov 5 11:59:42 1993 Per Bothner (bothner@kalessin.cygnus.com) +2002-02-10 Hans-Peter Nilsson <hp@bitrange.com> - * Makefile.in (DISTDOCDIRS): Add libg++ and libio. + * config/mmix/t-mmix (MULTILIB_EXTRA_OPTS): Disable. -Fri Nov 5 10:35:05 1993 Ken Raeburn (raeburn@rover.cygnus.com) +2002-02-10 Kazu Hirata <kazu@hxi.com> - * Makefile.in (taz): Only build "info" in DISTDOCDIRS. - (DISTDOCDIRS): Don't assume libg++ and gdb folks necessarily want - this now. + * config/h8300/h8300.md (pushhi1_h8300): Correct the mode used. + (pushhi1): Likewise. -Thu Nov 4 18:58:23 1993 Jim Kingdon (kingdon@lioth.cygnus.com) +2002-02-10 John David Anglin <dave@hiauly1.hia.nrc.ca> - * config.sub: Accept hiux* as an OS name. + * pa.c (reg_before_reload_operand): Don't accept a SUBREG operand. + * pa.h (PREDICATE_CODES): Adjust codes for reg_before_reload_operand. - * Makefile.in: Change RUNTEST_FLAGS back to RUNTESTFLAGS per - etc/make-stds.texi. The underscore came from gcc, and dje now - agrees that RUNTESTFLAGS is the correct name. +2002-02-09 David O'Brien <obrien@FreeBSD.org> -Thu Nov 4 10:49:01 1993 Per Bothner (bothner@kalessin.cygnus.com) + * config/sparc/freebsd.h(TARGET_DEFAULT): Add MASK_EPILOGUE setting and + remove MASK_VIS. + (ASM_CPU_DEFAULT_SPEC): Remove. Default setting is fine. - * install.sh: Remove 'set -e'. It makes any conditionals - in the script useless. +2002-02-09 Kazu Hirata <kazu@hxi.com> - * config.guess: Automatically recognize arm-acorn-riscix - Patch from Richard Earnshaw (rwe11@cl.cam.ac.uk). + * config/h8300/h8300.c (output_logical_op): Use sub.w to clear + a half of an SImode register on H8/300. -Thu Nov 04 08:08:04 1993 Jeffrey Wheat (cassidy@cygnus.com) +Sat Feb 9 18:28:02 CET 2002 Jan Hubicka <jh@suse.cz> - * Makefile.in: Change RUNTESTFLAGS to RUNTEST_FLAGS + * i386.md (movdi_2): Add missing '!'. -Wed Nov 3 22:09:46 1993 Ken Raeburn (raeburn@rtl.cygnus.com) +2002-02-09 Kazu Hirata <kazu@hxi.com> - * Makefile.in (DISTDOCDIRS): New variable. - (taz): Edit local Makefile.in sooner, instead of proto-toplev - Makefile.in later. Build "info" and "dvi" in DISTDOCDIRS. + * config/h8300/h8300.h: Fix formatting. Remove commented-out + definitions. -Wed Nov 3 21:31:52 1993 david d `zoo' zuhn (zoo@rtl.cygnus.com) +2002-02-09 Kazu Hirata <kazu@hxi.com> - * configure.in (hppa target): check the source directory for the - pagas sub-directory + * config/h8300/h8300.md (length): Correct the distance valid + for the short branch. -Wed Nov 3 11:12:22 1993 Doug Evans (dje@canuck.cygnus.com) +2002-02-09 Kazu Hirata <kazu@hxi.com> - * config.sub: Allow -aout* and -elf*. + * config/h8300/h8300.md (iorhi3): Tighten the predicates. -Wed Nov 3 11:08:33 1993 Ken Raeburn (raeburn@rtl.cygnus.com) +2002-02-09 Alexandre Oliva <aoliva@redhat.com> - * configure.in: Don't build ld on i386-solaris2, same as for - sparc-solaris2. + * config/sh/sh.h (REGISTER_NATURAL_MODE): Save part-clobbered + registers in SImode. + (HARD_REGNO_CALL_PART_CLOBBERED) [TARGET_SHMEDIA32]: Set r18 as + part-clobbered. -Tue Nov 2 14:21:25 1993 Per Bothner (bothner@kalessin.cygnus.com) + * config/sh/sh.c (expand_prologue): Fix mis-applied 2001-11-09's + patch. - * Makefile.in (taz): Add texinfo/lgpl.texinfo (for libg++). + Contribute sh64-elf. + 2002-02-09 Alexandre Oliva <aoliva@redhat.com> + * config/sh/sh.c (TARGET_CANNOT_MODIFY_JUMPS_P): Define to... + (sh_cannot_modify_jumps_p): New function. + 2002-02-05 Alexandre Oliva <aoliva@redhat.com> + * config/sh/sh.c (TARGET_MS_BITFIELD_LAYOUT_P): Define to... + (sh_ms_bitfield_layout_p): New function. + 2002-02-04 Alexandre Oliva <aoliva@redhat.com> + Zack Weinberg <zack@codesourcery.com> + * config/sh/sh.h (TRAMPOLINE_ADJUST_ADDRESS): Use + expand_simple_binop instead of expand_binop. + 2002-02-03 Alexandre Oliva <aoliva@redhat.com> + * config/sh/sh.h (OVERRIDE_OPTIONS) [! TARGET_SH5]: Disable + use of .quad and .uaquad. + * config/sh/sh.c (TARGET_ASM_UNALIGNED_DI_OP, + TARGET_ASM_ALIGNED_DI_OP): Add comment pointing to the above. + 2002-01-24 Alexandre Oliva <aoliva@redhat.com> + * config/sh/sh.md (movdi_const, movdi_const_32bit, + movdi_const_16bit): Make sure all CONSTs have modes. + (sym2PIC): Ditto, but by adjusting all callers. + * config/sh/sh.c (calc_live_regs) [TARGET_SHCOMPACT]: Set pr_live + if the prologue calls the SHmedia argument decoder or register + saver. + 2002-01-24 Alexandre Oliva <aoliva@redhat.com> + * config/sh/sh.c (TARGET_ASM_UNALIGNED_DI_OP): Define. + (TARGET_ASM_ALIGNED_DI_OP): Likewise. + (sh_expand_epilogue): Don't emit USE of return target register. + (prepare_move_operands): Legitimize DImode PIC addresses. + (sh_media_register_for_return): Skip tr0, used to initialize the + PIC register. + (sh_expand_prologue): Remove explicit USE of return register. + (nonpic_symbol_mentioned_p): PC is non-PIC. Don't recurse in + CONST_DOUBLEs. UNSPEC_GOTPLT is PIC. + * config/sh/sh.h (ASM_OUTPUT_DOUBLE_INT): Removed, obsolete. + (OVERRIDE_OPTIONS): Don't disable PIC on SH5. + (EXTRA_CONSTRAINT_S): Use MOVI_SHORI_BASE_OPERAND_P instead of + EXTRA_CONSTRAINT_T. + (GOT_ENTRY_P, GOTPLT_ENTRY_P, GOTOFF_P, PIC_ADDR_P): New. + (MOVI_SHORI_BASE_OPERAND_P): New. + (NON_PIC_REFERENCE_P, PIC_REFERENCE_P): New. + (EXTRA_CONSTRAINT_T): Define in terms of them. + (OUTPUT_ADDR_CONST_EXTRA): Handle UNSPEC_GOTPLT. + * config/sh/sh.md (movsi_media, movsi_media_nofpu, + movdi_media, movdi_media_nofpu): Add SIBCALL_REGS class to + alternatives supporting TARGET_REGS. + (UNSPEC_GOTPLT): New constant. + (movdi split): Move incrementing of LABEL_NUSES... + (movdi_const, movdi_const_32bit): Here. Use + MOVI_SHORI_BASE_OPERAND_P instead of EXTRA_CONSTRAINT_T. + (movdi_const_16bit): New. + (call, call_value) [flag_pic]: Use GOTPLT. + (call_pop, call_value_pop): New expands. + (call_pop_compact, call_pop_rettramp): New insns. + (call_value_pop_compact, call_value_pop_rettramp): New insns. + (sibcall) [flag_pic]: Use GOT. + (builtint_setjmp_receiver): Remove bogus, unused expand. + (GOTaddr2picreg): Implement for SHcompact and SHmedia. + (*pt, *ptb, ptrel): New insns. + (sym2GOT): Handle DImode GOT. + (sym2GOTPLT, symGOTPLT2reg): New expands. + (sym2PIC): New expand. + (shcompact_return_tramp): Use GOTPLT to return trampoline. + (shcompact_return_tramp_i): Use return register explicitly. + * config/sh/sh.h (OVERRIDE_OPTIONS) [TARGET_SHMEDIA]: Don't + disable flag_reorder_blocks. + 2002-01-19 Alexandre Oliva <aoliva@redhat.com> + * config/sh/sh.md (sibcall_compact): Reorder return, uses and + clobbers, for clarity. + (sibcall_epilogue) [TARGET_SHCOMPACT]: Mark saving and + restoring of r0 in macl as MAYBE_DEAD. + 2002-01-18 Alexandre Oliva <aoliva@redhat.com> + * config/sh/sh.h (LONG_DOUBLE_TYPE_SIZE): Define. + * config/sh/sh.md (movv4sf_i, movv16sf_i): Fix uses of + alter_subreg all over. + (jump) [TARGET_SHMEDIA]: FAIL to create new jumps after + reload, instead of emitting instructions that would require + reloading. + (casesi_load_media): Add missing modes. + 2001-11-09 Alexandre Oliva <aoliva@redhat.com> + * config/sh/sh.c (sh_expand_prologue): Mark the PIC register + as used if the argument decoder is called. + 2001-08-28 Alexandre Oliva <aoliva@redhat.com> + * config/sh/sh.md (udivsi3, divsi3): Load libcall symbol name in + Pmode, then extend it to DImode if necessary. + 2001-08-28 Stephen Clarke <Stephen.Clarke@st.com> + * config/sh/sh.h (LEGITIMATE_CONSTANT_P): Don't accept DFmode + constants in FPU-enabled SHmedia, let them be loaded from memory. + 2001-08-28 Alexandre Oliva <aoliva@redhat.com> + * config/sh/sh.md (cmpeqdi_media, cmpgtdi_media, cmpgtudi_media): + Adjust whitespace in assembly output templates. + 2001-08-28 Stephen Clarke <Stephen.Clarke@st.com> + * config/sh/sh.md (movdicc_false, movdicc_true, movdicc): Adjust + mode of if_then_else. + 2001-08-04 Alexandre Oliva <aoliva@redhat.com> + * config/sh/sh64.h (CPP_DEFAULT_CPU_SPEC): Override definition in + sh.h. + 2001-07-26 Andrew Haley <aph@cambridge.redhat.com> + Joern Rennecke <amylaar@redhat.com> + * config/sh/sh64.h (CPP_DEFAULT_CPU_SPEC): New. + (SUBTARGET_CPP_PTR_SPEC): New. + (SUBTARGET_CPP_SPEC): Remove. + 2001-07-06 Chandrakala Chavva <cchavva@redhat.com> + * config/sh/sh.md (movsf_media_nofpu+1, movdf_media_nofpu+1): + Fix typo in previous checkin. + 2001-07-11 Chandrakala Chavva <cchavva@redhat.com> + * config/sh/sh.h (MODES_TIEABLE_P): Fix redact indentations. + 2001-07-10 Chandrakala Chavva <cchavva@cygnus.com> + Alexandre Oliva <aoliva@redhat.com> + * config/sh/sh.h (MODES_TIEABLE_P): Don't tie modes wider than + what single FP register can hold for SHmedia target. + 2001-07-06 Chandrakala Chavva <cchavva@redhat.com> + Alexandre Oliva <aoliva@redhat.com> + * config/sh/sh.md (movsf_media_nofpu+1, movdf_media_nofpu+1): + Do not split into SUBREG. + 2001-06-14 Alexandre Oliva <aoliva@redhat.com> + * config/sh/ushmedia.h, config/sh/sshmedia.h: Updated signatures + and added new functions as specified in SH5 ABI r9. + 2001-06-04 Alexandre Oliva <aoliva@redhat.com> + * config/sh/lib1funcs.asm (GCC_nested_trampoline): Align to an + 8-byte boundary. + 2001-06-03 Alexandre Oliva <aoliva@redhat.com> + * config/sh/sh.c (dump_table): Add const0_rtx in calls of + gen_consttable_4 and gen_consttable_8. Emit multiple labels + and consttable_window_ends. + 2001-06-03 Graham Stott <grahams@redhat,com> + * config/sh/sh.md (movdi split): Remove unused variable last_insn. + 2001-05-16 Alexandre Oliva <aoliva@redhat.com> + * config/sh/sh.c (print_operand): Handle floating-point pair, + vector and matrix registers. + * config/sh/sh.h (REGISTER_MOVE_COST): Take floating-pointer + vector modes into account. + * config/sh/sh.md (movv2sf): Split move between registers into + movdf. + (movv4sf, movv16sf): Introduce insns that get split only after + reload. + * config/sh/shmedia.h: Fix Copyright dates. + * config/sh/ushmedia.h: Likewise. Move loop counter + declarations into conditionals that uses them. + (sh_media_FVADD_S, sh_media_FVSUB_S): Fix off-by-one error in + loop boundary. + * config/sh/sshmedia.h: Fix Copyright dates. + (sh_media_PUTCFG): Fix constraints. + 2001-05-12 Alexandre Oliva <aoliva@redhat.com> + * config/sh/sh.h (TARGET_PTRMEMFUNC_VBIT_LOCATION): Define to + ptrmemfunc_vbit_in_delta for SH5. + 2001-05-08 Alexandre Oliva <aoliva@redhat.com> + * config/sh/sh.h (TARGET_SWITCHES): Document -m5-*. + * invoke.texi: Likewise. + 2001-04-14 Alexandre Oliva <aoliva@redhat.com> + * config/sh/lib1funcs.asm (GCC_push_shmedia_regs, + GCC_push_shmedia_regs_nofpu, GCC_pop_shmedia_regs, + GCC_pop_shmedia_regs_nofpu): New global symbols. + * config/sh/t-sh64 (LIB1ASMFUNCS): Add them. + * config/sh/sh.h (SHMEDIA_REGS_STACK_ADJUST): New macro. + * config/sh/sh.c (calc_live_regs): Account for PR's saving in + compact function with nonlocal labels. + (sh_expand_prologue) [SHcompact]: Push SHmedia regs if needed. + (sh_expand_epilogue) [SHcompact]: Pop them when appropriate. + (initial_elimination_offset): Account for their stack space. + * config/sh/sh.md (shmedia_save_restore_regs_compact): New insn. + * config/sh/sh.md (movsi_media, movsi_media_nofpu, movqi_media, + movhi_media, movdi_media, movdi_media_nofpu, movdf_media, + movdf_media_nofpu, movsf_media, movsf_media_nofpu): Require at + least one of the operands to be a register. + (movv2sf): Likewise. Renamed to movv2sf_i. + (movdi, movdf, movv2sf, movv4sf, movv16sf, movsf): + prepare_move_operands() before emitting SHmedia insns. + 2001-04-03 Alexandre Oliva <aoliva@redhat.com> + * config/sh/crti.asm (init, fini) [__SH5__ && ! __SHMEDIA__]: + Don't save nor initialize r12. Don't mis-align the stack. + Pad the code with a nop. + * config/sh/crti.asm: Don't restore r12. Don't mis-align the + stack. + 2001-03-13 Alexandre Oliva <aoliva@redhat.com> + * gcc/longlong.h (__umulsidi3, count_leading_zeros) + [__SHMEDIA__]: Implement. + 2001-03-11 Alexandre Oliva <aoliva@redhat.com> + * config/sh/sh.md: Set latency of `pt' closer to reality. + (movsi_media, movsi_media_nofpu, movdi_media, movdi_media_nofpu, + movdf_media, movdf_media_nofpu, movsf_media, movsf_media_nofpu): + Set move, load and store type attributes. + * config/sh/sh.c (sh_loop_align) [TARGET_SH5]: Set to 3. + * config/sh/sh.h (OVERRIDE_OPTIONS) [TARGET_SH5]: Disable + profiling. + * config/sh/sh.h (PROMOTE_MODE): Sign-extend SImode to DImode. + * config/sh/sh-protos.h (sh_media_register_for_return): Declare. + * config/sh/sh.c (sh_media_register_for_return): New function. + (sh_expand_prologue) [TARGET_SHMEDIA]: Copy r18 to an available + branch-target register. + (sh_expand_epilogue) [TARGET_SHMEDIA]: Explicitly USE it. + * config/sh/sh.md (return_media_i): Use any call-clobbered + branch-target register. + (return_media): If r18 wasn't copied in the prologue, copy it + here. + * config/sh/sh.h (CONDITIONAL_REGISTER_USAGE) [TARGET_SHMEDIA]: + Clear class FP0_REGS. + * config/sh/sh64.h (LINK_SPEC): Removed incorrect default copied + from elf.h. + 2001-03-08 DJ Delorie <dj@redhat.com> + * config/sh/sh.h (OVERRIDE_OPTIONS): Disable relaxing for SHMEDIA. + 2001-02-09 Alexandre Oliva <aoliva@redhat.com> + * config/sh/sh.md (sibcall_compact): Set fp_mode to single. + 2001-02-07 Alexandre Oliva <aoliva@redhat.com> + * config/sh/sh.h (INT_ASM_OP) [SHMEDIA64]: Use `.quad'. + 2001-02-03 Alexandre Oliva <aoliva@redhat.com> + * config/sh/sh.h (INIT_CUMULATIVE_ARGS): Compute size of BLKmode + return value correctly for call_cookie. + 2001-02-01 Alexandre Oliva <aoliva@redhat.com> + * config/sh/crt1.asm (start): Modified so as to call + ___setup_argv_and_call_main. + 2001-01-26 Alexandre Oliva <aoliva@redhat.com> + * config/sh/sh.h (FUNCTION_ARG_ADVANCE): Don't count stack_regs in + SHmedia mode. + 2001-01-20 Alexandre Oliva <aoliva@redhat.com> + * config/sh/sh.h (STRIP_DATALABEL_ENCODING): New macro. + (STRIP_NAME_ENCODING): Use it. + (ASM_OUTPUT_LABELREF): Likewise. Don't call assemble_name(). + 2001-01-19 Alexandre Oliva <aoliva@redhat.com> + * config/sh/sh.md (sgeu) [! SHMEDIA]: Fix invocation of + prepare_scc_operands(). + * config/sh/sh.h (SH_DATALABEL_ENCODING): Change to "#"... + (DATALABEL_SYMNAME_P): ... so that we don't need memcmp here. + 2001-01-17 Alexandre Oliva <aoliva@redhat.com> + * config/sh/sh.h (STRIP_NAME_ENCODING): Strip leading `*'. + 2001-01-13 Alexandre Oliva <aoliva@redhat.com> + * config/sh/sh.md (shcompact_incoming_args): Use R0_REG. + * config/sh/sh.md (R7_REG, R8_REG, R9_REG): Define as constants, + used in shcompact_incoming_args. + * config/sh/sh.c (sh_expand_epilogue): Fix thinko in previous + change. + * config/sh/crt1.asm (start) [SH5]: Switch to single-precision + mode. + * config/sh/lib1funcs.asm (sdivsi3_i4, udivsi3_i4, set_fpscr): + Adjust accordingly. + * config/sh/sh.c (sh_expand_prologue, sh_expand_epilogue): + Simplify. Adjust. Add sanity check. + * config/sh/sh.h (TARGET_SWITCHES) [5-compact]: Set + FPU_SINGLE_BIT. + * config/sh/sh.md (udivsi3_i4_single, divsi3_i4_single): Match + TARGET_SHCOMPACT. + (udivsi3, divsi3): Use them. + (force_mode_for_call): New insn. + (call, call_value, sibcall_value): Emit it before SHcompact + calls. + 2001-01-11 Alexandre Oliva <aoliva@redhat.com> + * config/sh/sh.md (call, call_value, sibcall): Make sure the + call cookie is non-NULL before taking its value. + 2001-01-10 Alexandre Oliva <aoliva@redhat.com> + * config.gcc (sh64): Set target_requires_64bit_host_wide_int. + 2001-01-09 Alexandre Oliva <aoliva@redhat.com> + * config/sh/sh.md (shcompact_incoming_args): Set argument memory + block. + * config/sh/sh.h (STATIC_CHAIN_REGNUM) [SH5]: Use r1. + * config/sh/sh.c (sh_expand_prologue) [SH5]: Use r0 as + temporary for stack adjusts. Use MACL and MACH to pass + arguments to shcompact_incoming_args. + * config/sh/sh.md (shcompact_incoming_args): Adjust. Don't + clobber r1. + * config/sh/lib1funcs.asm (shcompact_incoming_args): Likewise. + (nested_trampoline): Load static chain address into r1. + * config/sh/sh.md (movdi_media splits): Fix sign-extension. + 2001-01-07 Alexandre Oliva <aoliva@redhat.com + * config/sh/sh.c (fpul_operand) [SHMEDIA]: Just call + fp_arith_reg_operand(). + 2001-01-06 Alexandre Oliva <aoliva@redhat.com> + * config/sh/sh.md (casesi): Sign-extend the first two operands, + and use signed compares for them. + * config/sh/sh.c (dump_table): Don't emit 8-byte constants after + 4-byte ones. Instead, inter-leave them, maintaining the 8-byte + ones properly aligned. + (find_barrier): Account for extra alignment needed for 8-byte wide + constants. + (machine_dependent_reorg): Require a label for the second 4-byte + constant after an 8-byte one. + * config/sh/lib1funcs.asm (sdivsi3): Fix typo in yesterday's + change. + 2001-01-05 Alexandre Oliva <aoliva@redhat.com> + * config/sh/sh.c (machine_dependent_reorg) [SHCOMPACT]: Reset + last_float when switching float modes. + * config/sh/sh.md (movdf) [SH5]: Don't use stack-pointer + auto-increment for general-purpose registers. + * config/sh/lib1funcs.asm (sdivsi3) [SHMEDIA]: Sign-extend the + result. + * config/sh/sh.c (sh_expand_prologue) [SH5]: Use r1 as temporary + for stack adjust. + * config/sh/sh.c (sh_builtin_saveregs): Support using all + registers for varargs. + 2001-01-01 Alexandre Oliva <aoliva@redhat.com> + * config/sh/sh.h (FUNCTION_ARG_ADVANCE): Simplify. + * config/sh/sh.h (CALL_COOKIE_STACKSEQ, + CALL_COOKIE_STACKSEQ_SHIFT, CALL_COOKIE_STACKSEQ_GET): New macros. + (CALL_COOKIE_INT_REG_SHIFT): Adjust. + (FUNCTION_ARG_ADVANCE): Use SHCOMPACT_FORCE_ON_STACK. Adjust + call_cookie accordingly. + (FUNCTION_ARG): Test SHCOMPACT_FORCE_ON_STACK. + (SHCOMPACT_BYREF): Likewise. + (SHCOMPACT_FORCE_ON_STACK): New macro. + * config/sh/sh.c (sh_expand_prologue): Use new call_cookie format. + (sh_builtin_saveregs): Likewise. + * config/sh/lib1funcs.asm (shcompact_call_trampoline, + shcompact_incoming_args): Use new shift values. Support + sequences of consecutive and non-consecutive pushes/pops. + * config/sh/sh.md (return): Don't explicitly use PR_REG. + 2001-01-05 Hans-Peter Nilsson <hpn@cygnus.com> + * config/sh/sh.h (TEXT_SECTION): Define. + * config/sh/elf.h (ASM_FILE_START): Output TEXT_SECTION_ASM_OP. + 2001-01-05 Alexandre Oliva <aoliva@redhat.com> + * config/sh/sh.h (INIT_CUMULATIVE_LIBCALL_ARGS): New macro. + * config/sh/sh.h (BASE_RETURN_VALUE_REG): Use FP regs for + return values on FPU-enabled SHmedia. + (FUNCTION_VALUE_REGNO_P): Mark FIRST_FP_RET_REG as used on + FPU-enabled SHmedia. + (INIT_CUMULATIVE_ARGS): Set up return trampoline only if + value is returned in a non-FP reg and is not returned by + reference. + * config/sh/sh.md (shcompact_return_tramp_i): Change type to + jump_ind. + 2000-01-04 Alexandre Oliva <aoliva@redhat.com> + * config/sh/sh.h (SH_MIN_ALIGN_FOR_CALLEE_COPY): New. + (FUNCTION_ARG_CALLEE_COPIES): Require argument to be + quad-aligned to be passed by callee-copy reference. + 2001-01-03 Alexandre Oliva <aoliva@redhat.com> + * config/sh/elf.h (MAX_WCHAR_TYPE_SIZE): Define. + * config/sh/sh64.h (MAX_WCHAR_TYPE_SIZE): Undefine. + 2001-01-02 Alexandre Oliva <aoliva@redhat.com> + * config/sh/lib1funcs.asm (shcompact_call_trampoline): Fix error in + copying low-numbered FP regs to r7 and r8. + * config/sh/sh.h (FUNCTION_ARG_ADVANCE): Don't request copying of + FP regs to general-purpose regs only if the copy was passed on the + stack. + * config/sh/lib1funcs.asm (shcompact_call_trampoline): Fix typo in + copying FP reg to r9. + * config/sh/sh.h (FUNCTION_ARG_ADVANCE): Use trampoline to + copy FP regs to general-purpose regs only in outgoing calls. + * config/sh/sh.md (movdf_media, movsf_media): Revert incorrect + change from 2000-10-30. Adjust for 64-bit (or 32-bit) + HOST_WIDE_INT. + * config/sh/sh.h (struct sh_args): Document all fields. + (FUNCTION_OK_FOR_SIBCALL): Functions that receive arguments + passed partially on the stack should not consider making + sibcalls. + * config/sh/sh.h (FUNCTION_ARG_ADVANCE): Add byref regs to + stack_regs only for incoming calls. When passing FP args, + make sure there are FP regs available before modifying + call_cookie. + (SHCOMPACT_BYREF): Pass double args in general-purpose + registers by reference. + 2000-12-30 Alexandre Oliva <aoliva@redhat.com> + * config/sh/sh.h (FUNCTION_OK_FOR_SIBCALL) [SHCOMPACT]: Don't + attempt to generate sibcalls if the caller got any arguments + by reference. + * config/sh/lib1funcs.asm (set_fpscr) [SH5]: Default to double. + * config/sh/sh.c (dump_table) [SHCOMPACT]: Align DImode and DFmode + to 8-byte boundaries. + * config/sh/sh.md (shcompact_preserve_incoming_args): New insn. + * config/sh/sh.h (CALL_COOKIE_INT_REG_GET): New macro. + * config/sh/sh.c (sh_expand_prologue): Preserve args that will be + stored in the stack. + * config/sh/lib1funcs.asm (ct_main_table, ia_main_table): Arrange + for the offsets to have the ISA bit set. + (shcompact_call_trampoline): Document. Swap r0 and r1, to match + invocation. Use beq instead of bgt to mark end of sequence of + loads. + (shcompact_incoming_args): Fix store of r2. Use beq instead of + bgt to mark end of sequence of stores. + * config/sh/sh.c (arith_operand): Don't check whether + CONST_OK_FOR_J for now. + * config/sh/sh.md (movdf_media, movsf_media): Use HOST_WIDE_INT + instead of long for conversion. + 2000-12-29 Alexandre Oliva <aoliva@redhat.com> + * config/sh/sh.c (print_operand_address): Convert INTVAL to int + before passing it to fprintf. + 2000-12-28 Alexandre Oliva <aoliva@redhat.com> + * config/sh/crt1.asm (start): Reset SR.FD, to enable the FP unit. + Call set_fpscr before reading/writing SR. + * config/sh/crt1.asm (start): Set SR.SZ and SR.PR, but not SR.FR. + Call set_fpscr. + * config/sh/lib1funcs.asm: Add `.align 2' directives before + SHmedia code. + (FMOVD_WORKS): Define on SH5 with FPU. + (set_fpscr): Define on SH5. Remove separate _fpscr_values + setting. + * config/sh/t-sh64 (LIB1ASMFUNCS): Add _set_fpscr instead of + _fpscr_values. + 2000-12-28 Hans-Peter Nilsson <hpn@cygnus.com> + * config/sh/lib1funcs.asm (ct_main_table): Align contents to even + address. + (ia_main_table): Ditto. + 2000-12-27 Alexandre Oliva <aoliva@redhat.com> + * config/sh/sh.h (MAX_WCHAR_TYPE_SIZE): Don't define. + * config/sh/sh64.h (WCHAR_TYPE, WCHAR_TYPE_SIZE): Reinstate + the definitions from sh.h. + * config/sh/sh.h (PTRDIFF_TYPE): Define as conditional on + TARGET_SH5. + (SUBTARGET_CPP_SPEC): Arrange for __PTRDIFF_TYPE__ to be defined. + * config/sh/elf.h (PTRDIFF_TYPE): Likewise. + * config/sh/sh64.h (SUBTARGET_CPP_SPEC): Likewise. + 2000-12-26 Alexandre Oliva <aoliva@redhat.com> + * config/sh/sh.md (movdi_media split): Don't add REG_LABEL notes. + Increment LABEL_NUSES. + + * config/sh/sh.h (SIZE_TYPE): Define as conditional on + TARGET_SH5. + (SUBTARGET_CPP_SPEC): Arrange for __SIZE_TYPE__ to be always + defined. + * config/sh/elf.h (SIZE_TYPE): Likewise. + * config/sh/sh64.h (SUBTARGET_CPP_SPEC): Likewise. + * config/sh/lib1funcs.asm (shcompact_call_trampoline, + shcompact_incoming_args): Load switch table addresses using + datalabel. + * config/sh/sh.h (SUBTARGET_CPP_SPEC): Define __SIZE_TYPE__. + (NO_BUILTIN_SIZE_TYPE): Define. + (SIZE_TYPE): Don't define. + * config/sh/sh64.h (SUBTARGET_CPP_SPEC): Define __SIZE_TYPE__. + * config/sh/sh.h (CPP_SPEC): Fixed typo that prevented the + definition of __SH5__=32 for -m5-compact-nofpu. + * config/sh/sh.c (barrier_align): Ensure 32-bit alignment after + ADDR_DIFF_VEC. + 2000-12-24 Alexandre Oliva <aoliva@redhat.com> + * config/sh/sh.h (FUNCTION_ARG_PADDING): Removed. + 2000-12-23 Alexandre Oliva <aoliva@redhat.com> + * config/sh/sh.h (TARGET_CACHE32): Enable on SH5. + (FUNCTION_BOUNDARY): Ensure 32-bit alignment for SHmedia. + (INSN_LENGTH_ALIGNMENT): Likewise. + 2000-12-22 Alexandre Oliva <aoliva@redhat.com> + * config/sh/sh.md (call, call_value, sibcall): Simplify + copying of non-branch-target register. + 2000-12-22 Alexandre Oliva <aoliva@redhat.com> + * glimits.h (__LONG_MAX__): Revert 2000-12-13's patch. + * config/sh/sh.h (CPP_SPEC): Define it here for 64-bit SHmedia. + 2000-12-22 Alexandre Oliva <aoliva@redhat.com> + * config/sh/sh.h (GET_SH_ARG_CLASS): Handle complex + floating-point values as structs. + (FUNCTION_ARG): Use SH5_PROTOTYPED_FLOAT_ARG. + (SH5_PROTOTYPELESS_FLOAT_ARG): List FP registers before + general-purpose register. + (SH5_PROTOTYPED_FLOAT_ARG): New macro. + 2000-12-20 Alexandre Oliva <aoliva@redhat.com> + * config/sh/sh.md (addsi3): Force operand1 to reg for SHmedia. + * config/sh/sh.md (movsi_media): Split CONST_DOUBLE loads too. + * config/sh/sh.h (DATALABEL_REF_P): Don't require the CONST. + (ENCODE_SECTION_INFO): Enclose variables and constants in + DATALABEL unspecs. + (SH_DATALABEL_ENCODING, DATALABEL_SYMNAME_P): Define. + (STRIP_NAME_ENCODING): Strip SH_DATALABEL_ENCODING off. + (ASM_OUTPUT_LABELREF, AMS_OUTPUT_SYMBOL_REF): Define. + * config/sh/sh.c (gen_datalabel_ref): Use UNSPEC_DATALABEL + only for LABEL_REFs. For SYMBOL_REFs, prepend + SH_DATALABEL_ENCODING to the symbol name. + * config/sh/sh.md (indirect_jump): Use SUBREG instead of + convert_mode(). + 2000-12-20 Alexandre Oliva <aoliva@redhat.com> + * config/sh/sh.md (casesi): Enclose ADDR_DIFF_VEC address in + UNSPEC_DATALABEL. + * config/sh/sh.c (gen_datalabel_ref): Accept LABEL_REFs. + * config/sh/sh.h (DATALABEL_REF_NO_CONST_P): Likewise. + (DATALABEL_REF_P): Don't require CONST. + (ASM_OUTPUT_ADDR_DIFF_ELT): On SH5, output datalabel before + REL label. + 2000-12-19 Alexandre Oliva <aoliva@redhat.com> + * config/sh/sh.md (extendhidi2, extendqidi2): Use arithmetic shift + right. + 2000-12-18 Alexandre Oliva <aoliva@redhat.com> + * config/sh/sh.md (movsi_media, call, call_value, sibcall): + Use shallow_copy_rtx and PUT_MODE to change the mode of + SYMBOL_REFs, LABEL_REFs, CONSTs, etc. + * config/sh/sh.h (PREFERRED_RELOAD_CLASS): Reload SYMBOL_REFs + on SHmedia using GENERAL_REGs. + * config/sh/sh.md (ble_media_i, blt_media_i, bleu_media_i, + bltu_media_i): Fix reversion of conditions. + 2000-12-18 Alexandre Oliva <aoliva@redhat.com> + * config/sh/sh.md (zero_extendhidi2): Use logical shift right. + * config/sh/sh.c (output_far_jump): Save r13 in macl. + 2000-12-17 Alexandre Oliva <aoliva@redhat.com> + * config/sh/sh.c (gen_datalabel_ref): Fix mode of the UNSPEC. + 2000-12-16 Alexandre Oliva <aoliva@redhat.com> + * config/sh/lib1funcs.asm (ic_invalidate): Define for SH5. + (GCC_nested_trampoline): Likewise. + * config/sh/sh-protos.h (gen_datalabel_ref): Declare. + * config/sh/sh.c (gen_datalabel_ref): Define. + * config/sh/sh.h (TRAMPOLINE_SIZE): Adjust for SH5. + (INITIALIZE_TRAMPOLINE): Likewise. + (TRAMPOLINE_ADJUST_ADDRESS): Define. + (DATALABEL_REF_NO_CONST_P, DATALABEL_REF_P): Define. + (EXTRA_CONSTRAINT_T): Match DATALABEL unspecs. + (OUTPUT_ADDR_CONST_EXTRA): Handle DATALABEL unspecs. + * config/sh/sh.md (UNSPEC_DATALABEL): New constant. + (ic_invalidate): Adjust for SH5. + (ic_invalidate_line_media, ic_invalidate_line_compact): New insns. + * config/sh/t-sh64 (LIB1ASMFUNCS): Added _ic_invalidate and + _nested_trampoline. + 2000-12-15 Alexandre Oliva <aoliva@redhat.com> + * config/sh/sh.h (MOVE_MAX): Set to 8 for SHmedia, 4 elsewhere. + (MOVE_MAX_PIECES): Set to 8 on SHmedia too. + 2000-12-14 Alexandre Oliva <aoliva@redhat.com> + * config/sh/sh.h (DBX_REGISTER_NUMBER): Adjust for sh64-elf-gdb. + * config/sh/elf.h (DBX_REGISTER_NUMBER): Likewise. + 2000-12-14 Alexandre Oliva <aoliva@redhat.com> + * config/sh/sh.c (target_reg_operand): Match only target-branch + registers and pseudos that aren't virtual registers. + * config/sh/sh.md (call, call_value, sibcall) [TARGET_SHMEDIA]: + Copy operands that don't match target_reg_operand to pseudos. + (call_media, call_value_media, sibcall_media): Use + target_reg_operand instead of target_operand. + 2000-12-13 Alexandre Oliva <aoliva@redhat.com> + * glimits.h (__LONG_MAX__) [SH5 == 64]: Adjust for 64 bits. + * config/sh/sh.c (target_reg_operand): Match hardware registers + other than branch-target registers. + * config/sh/sh.md (zero_extendqidi2): Input operand is %1. + * config/sh/lib1funcs.asm (sdivsi3) [SH5]: Make it global. + (fpscr_values) [SH5 == 32]: Define. + * config/sh/t-sh64 (LIB1ASMFUNCS): Add fpscr_values. + * config/sh/sh.md (call, call_value, sibcall) [TARGET_SHMEDIA]: + Handle function addresses coming in SUBREGs. + 2000-12-12 Alexandre Oliva <aoliva@redhat.com> + * config/sh/lib1funcs.asm (shcompact_call_trampoline, + shcompact_return_trampoline): Use datalabel where appropriate. + 2000-12-09 Alexandre Oliva <aoliva@redhat.com> + * config/sh/sh.h (SECONDARY_OUTPUT_RELOAD_CLASS): Use a + general-purpose register to copy one branch-target register to + another. + 2000-12-06 Alexandre Oliva <aoliva@redhat.com> + * config/sh/sh.c (target_operand): Accept LABEL_REFs and + SYMBOL_REFs with VOIDmode. + * config/sh/sh.md (ble_media_i, blt_media_i, bleu_media_i, + bltu_media_i): New insns. + 2000-12-06 Alexandre Oliva <aoliva@redhat.com> + * config/sh/sh.h (RETURN_IN_MEMORY): Adjust for SH5 ABI. + (INIT_CUMULATIVE_ARGS): Likewise. + 2000-12-01 Alexandre Oliva <aoliva@redhat.com> + * machmode.def (V16SFmode): New mode. + * c-common.c (type_for_mode): Support V2SF and V16SF. + * tree.c (build_common_tree_nodes_2): Likewise. + * tree.h (tree_index): Likewise. + * calls.c (emit_call_1): Take args_so_far. Adjust all + callers. Introduce CALL_POPS_ARGS. + * tm.texi (CALL_POPS_ARGS): Document. + * config/sh/crt1.asm: Implement in SHmedia mode. + * config/sh/crti.asm, config/sh/crtn.asm: Likewise + * config/sh/elf.h (ASM_SPEC, LINK_SPEC): Support SH5 flags. + (DBX_REGISTER_NUMBER): Renumber registers for SH5. + * config/sh/lib1funcs.asm: Disable functions unused in SH5. + Implement divsi and udivsi in SHmedia mode. Introduce + SHcompact trampolines. + * config/sh/sh.c (GEN_MOV, GEN_ADD3, GEN_SUB3): Use DImode + only in SHmedia64. + (regno_reg_class): Rewrite. + (fp_reg_names): Remove. + (sh_register_names, sh_additional_register_names): New. + (print_operand): Added `u'. Support SUBREGs in addresses. + Add parentheses around shifted CONSTs. + (output_file_start): Output .mode and .abi directives. + (shiftcosts, addsubcosts, multcosts): Adjust. + (output_stack_adjust): Compute alignment. Sanity-check SIZE. + (push_regs): Take array of HOST_WIDE_INTs. Adjust callers. + (calc_live_regs): Output to array of HOST_WIDE_INTs. Count + bytes, not registers. Take into account the need for the + SHcompact incoming args trampoline. Adjust all callers. + (sh_expand_prologue): Take stack_regs into account. Call + incoming args trampoline. Keep stack aligned as per SH5 ABI. + (sh_expand_epilogue): Take stack_regs into accoutn. Keep + stack aligned as per SH5 ABI. + (sh_builtin_saveregs): Support SH5 ABI. + (sh_build_va_list, sh_va_start): Likewise. + (initial_elimination_offset): Take alignment into account. + Compute location of PR according to the SH5 stack frame. + (arith_reg_operand): Reject branch-target registers. + (shmedia_6bit_operand): New. + (logical_operand): Use CONST_OK_FOR_P on SHmedia. + (target_reg_operand): Match DImode only. Accept SUBREGs. + (target_operand): New. + * config/sh/sh.h (CPP_SPEC, SUBTARGET_CPP_SPEC): Support SH5 flags. + (CONDITIONAL_REGISTER_USAGE): Implement SH5 ABI. Initialize + SIBCALL_REGS for SHmedia. + (TARGET_SH3E, TARGET_SH4): Only if SH1_BIT is set too. + (TARGET_FPU_DOUBLE, TARGET_FPU_ANY): New. + (TARGET_SHMEDIA32, TARGET_SHMEDIA64): New. + (TARGET_SWITCHES): New SH5 flags. + (OVERRIDE_OPTIONS): Set SH5-specific options. Use + VALID_REGISTER_P to disable unsupported registers. + (LONG_TYPE_SIZE, LONG_LONG_TYPE_SIZE): Set. + (POINTER_SIZE, PARM_BOUNDARY): Adjust. + (FUNCTION_ARG_PADDING): Define. + (FASTEST_ALIGNMENT): Adjust. + (SH_REGISTER_NAMES_INITIALIZER): New. + (sh_register_names): Declare. + (DEBUG_REGISTER_NAMES): Define. + (REGISTER_NAMES): Define based on sh_register_names. + (SH_ADDITIONAL_REGISTER_NAMES_INITIALIZER): New. + (sh_additional_register_names): Declare. + (LAST_GENERAL_REG, LAST_FP_REG, LAST_XD_REG): Adjust for SHmedia. + (FIRST_TARGET_REG, LAST_TARGET_REG): Define. + (TARGET_REGISTER_P, SHMEDIA_REGISTER_P, VALID_REGISTER_P): Define. + (REGISTER_NATURAL_MODE): Define. + (FIRST_PSEUDO_REGISTER): Adjust. + (FIXED_REGISTERS, CALL_USED_REGISTERS): Adjust. + (HARD_REGNO_CALL_PART_CLOBBERED): Define. + (HARD_REGNO_NREGS, HARD_REGNO_MODE_OK): Adjust. + (VECTOR_MODE_SUPPORTED_P): Define. + (REG_CLASS_CONTENTS): Adjust. + (SMALL_REGISTER_CLASSES): Adjust. + (REG_ALLOC_ORDER): Adjust. + (INDEX_REG_CLASS): Adjust. + (CONST_OK_FOR_O, CONST_OK_FOR_P): New. + (CONST_OK_FOR_LETTER_P): Adjust. + (PREFERRED_RELOAD_CLASS): Adjust. + (SECONDARY_OUTPUT_RELOAD_CLASS): Adjust. + (SECONDARY_INPUT_RELOAD_CLASS): Adjust. + (NPARM_REGS, FIRST_PARM_REG, FIRST_RET_REG): Adjust. + (FIRST_FP_PARM_REG): Adjust. + (CALL_POPS_ARGS): Define. + (FUNCTION_ARG_REGNO_P): Adjust. + (struct sh_args): New fields. + (GET_SH_ARG_CLASS): Adjust. + (INIT_CUMULATIVE_ARGS): Adjust. + (INIT_CUMULATIVE_INCOMING_ARGS): Define. + (FUNCTION_ARG_ADVANCE): Adjust. + (FUNCTION_ARG): Adjust. + (FUNCTION_ARG_PASS_BY_REFERENCE, SHCOMPACT_BYREF): Define. + (FUNCTION_ARG_CALLEE_COPIES): Define. + (SH5_PROTOTYPELESS_FLOAT_ARG): Define. + (STRICT_ARGUMENT_NAMING): Define. + (PRETEND_OUTGOING_VARARGS_NAMED): Adjust. + (FUNCTION_ARG_PARTIAL_NREGS): Adjust. + (SH5_WOULD_BE_PARTIAL_NREGS): Define. + (SETUP_INCOMING_VARARGS): Adjust. + (HAVE_POST_INCREMENT, HAVE_PRE_DECREMENT): Adjust. + (USE_LOAD_POST_INCREMENT, USE_STORE_PRE_DECREMENT): Adjust. + (REGNO_OK_FOR_INDEX_P, REG_OK_FOR_INDEX_P): Adjust. + (SUBREG_OK_FOR_INDEX_P): Adjust. + (EXTRA_CONSTRAINT_S): Update. + (EXTRA_CONSTRAINT_T): New. + (EXTRA_CONSTRAINT): Adjust. + (GO_IF_LEGITIMATE_INDEX): Adjust. + (GO_IF_LEGITIMATE_ADDRESS): Adjust. + (LEGITIMIZE_ADDRESS, LEGITIMIZE_RELOAD_ADDRESS): Adjust. + (MOVE_MAX): Adjust. + (MAX_MOVE_MAX): Define. + (Pmode): Adjust. + (CONST_COSTS): Adjust. + (REGISTER_MOVE_COST): Adjust. + (BRANCH_COST): Adjust. + (TEXT_SECTION_ASM_OP): Adjust. + (DBX_REGISTER_NUMBER): Adjust. + (ASM_OUTPUT_DOUBLE_INT): New. + (UNALIGNED_DOUBLE_INT_ASM_OP): New. + (PREDICATE_CODES): Adjust. + (PROMOTE_MODE): Adjust. + (CRT_CALL_STATIC_FUNCTION): Do not define for SHmedia. + * config/sh/sh.md (AP_REG, PR_REG, T_REG, GBR_REG): Renumber. + (MACH_REG, MACL_REG, FPUL_REG, RAP_REG, FPSCR_REG): Renumber. + (PR_MEDIA_REG, T_MEDIA_REG, R10_REG): New. + (DR0_REG, DR2_REG, DR4_REG): Renumber. + (TR0_REG, TR1_REG, TR2_REG): New. + (XD0_REG): Renumber. + (UNSPEC_COMPACT_ARGS): New. + (type): Added pt and ptabs. + (length): Default to 4 on SHmedia. Default pt length to 12 + and 20 on SHmedia32 and SHmedia64, respectively. + (pt): New function unit. + (movdi, movsi): Add types pt and ptabs. Don't increment LABEL_NUSES. + Add whitespace between operands of SHmedia instructions. + (movdicc): Fix. + (adddi3_media, addsi3_media): Adjust constraints. + (subsi3) [SHmedia]: Force operand 1 into a register. + (udivsi3_i1_media, udivsi3_i4_media): New. + (udivsi3): Support SHmedia. + (divsi3_i1_media, divsi3_i4_media): New. + (divsi3): Support SHmedia. + (anddi3, iordi3, xordi3): Adjust constraints. + (zero_extendhidi2, zero_extendqidi2): New. + (extendsidi2, extendhidi2, extendqidi2): New. + (push, pop, push_e, push_fpul, push_4): Disable on SH5. + (pop_e, pop_fpul, pop_4): Likewise. + (movsi_media): Support FP and BT registers. + (movsi_media_nofpu): New. Adjust splits to DImode. + (lduw, ldub): Renamed to zero_extend* above. + (movqi_media): Fix typo. + (movdi_media): Support FP and BT registers. + (movdi_media_nofpu): New. Adjust splits for SHmedia32. + (movdi_const_32bit): New. + (shori_media): Require immediate operand. Use `u' for output. + (movdf_media, movsf_media): Simplified. + (movdf_media_nofpu, movsf_media_nofpu): New. + (movdf, movsf): Adjust + (movv2sf, movv2sf, movv16sf): New. + (beq_media, beq_media_i): Adjust constraints. Don't use + scratch BT register. + (bne_media, bne_media_i): Likewise. + (bgt_media, bgt_media_i): Likewise. + (bge_media, bge_media_i): Likewise. + (bgtu_media, bgtu_media_i): Likewise. + (bgeu_media, bgeu_media_i): Likewise. + (beq, bne, bgt, blt, ble, bge, bgtu, bltu, bgeu, bleu, + bunordered): Emit jump insn. Force operands to registers when + needed. + (jump_media, jump): Simplify. + (call_compact, call_compact_rettramp): New. + (call_value_compact, call_value_compact_rettramp): New. + (call_media, call_value_media): Simplify. + (sibcall_compact, sibcall_media): New. + (call, call_value): Adjust for SHmedia and SHcompact. + (sibcall, sibcall_value, untyped_call): Likewise. + (sibcall_epilogue): Preserve r0 across epilogue for SHcompact. + (indirect_jump): Adjust for SHmedia. + (casesi_jump_media): New. + (nop): Re-enable for SHmedia. + (call_site): Restrict to SH1. + (casesi): Adjust for SHmedia. + (casesi_shift_media, casesi_load_media): New. + (return): Explicitly use PR register. Call return trampoline + on SHcompact. + (return_i): Explicitly use PR register. + (shcompact_return_tramp, shcompact_return_tramp_i): New. + (return_media): Adjust. + (shcompact_incoming_args): New. + (epilogue): Adjust. + (seq, slt, sle, sgt, sge, sgtu, sltu, sleu, sgeu, sne): Adjust. + (movstrsi): Disable on SH5. + (fpu_switch0, fpu_switch1, movpsi): Enable on SH4. + (addsf3, addsf3_media): Test TARGET_SHMEDIA_FPU. + (subsf3, subsf3_media): Likewise. + (mulsf3, mulsf3_media, mac_media): Likewise. + (divsf3, divsf3_media): Likewise. + (floatdisf2, floatsisf2_media): Likewise. Adjust constraints. + (floatsisf2, fux_truncsfsi2): Likewise. + (fix_truncsfdi2, fix_truncsfsi2_media): Likewise. Adjust + constraints. + (cmpeqsf_media, cmpgtsf_media, cmpgesf_media): Likewise. + (cmpunsf_media, cmpsf): Likewise. + (negsf2, negsf2_media, sqrtsf2, sqrtsf2_media): Likewise. + (abssf2, abssf2_media): Likewise. + (adddf3, adddf3_media, subdf3, subdf3_media): Likewise. + (muldf3, muldf3_media, divdf3, divdf3_media): Likewise. + (floatdidf2, floatsidf2_media): Likewise. Adjust constraints. + (floatsidf2, fix_truncdfsi2): Likewise. + (fix_truncdfdi2, fix_truncdfsi2_media): Likewise. Adjust + constraints. + (cmpeqdf_media, cmpgtdf_media): Likewise. + (cmpgedf_media, cmpundf_media, cmpdf): Likewise. + (negdf2, negdf2_media, sqrtdf2, sqrtdf2_media): Likewise. + (absdf2, absdf2_media): Likewise. + (extendsfdf2, extendsfdf2_media): Likewise. + (truncsfdf2, truncsfdf2_media): Likewise. + * config/sh/sh64.h: New file. + * config/sh/t-sh64: New file. + * config/sh/shmedia.h: New file. + * config/sh/ushmedia.h: New file. + * config/sh/sshmedia.h: New file. + * configure.in: Added sh64-*-elf. + * configure: Rebuilt. + 2000-10-10 Alexandre Oliva <aoliva@redhat.com> + * config/sh/sh.c (GEN_MOV, GEN_ADD3, GEN_SUB3): New macros. + (reg_class_from_letter): Use `b' for TARGET_REGS. + (print_operand): Support `%M', `%m', `AND' and + `ASHIFTRT'. Do not precede constants with `#' on SHmedia. + (andcosts): Adjust for SHmedia. + (output_stack_adjust, sh_expand_prologue, sh_expand_epilogue): + Likewise. + (target_reg_operand): New function. + * config/sh/sh-protos.h (target_reg_operand): Declare. + * config/sh/sh.h (CONDITIONAL_REGISTER_USAGE): Don't disable + FP registers on SH5. + (HARD_REGNO_MODE_OK): Accept them whenever they're acceptable + on SH4. + (TARGET_REGISTER_P): New macro. + (reg_class, REG_CLASS_NAMES, REG_CLASS_CONTENTS): Added TARGET_REGS. + (FUNCTION_VALUE): Use DImode for promoted types on SHmedia. + (EXTRA_CONSTRAINT_S): New macro. + (EXTRA_CONSTRAINT): Adjust. + (FLOAT_TYPE_SIZE): Define to 32. + (Pmode): DImode on SHmedia. + (CONST_COSTS): Adjust for SHmedia literals. + (PREDICATE_CODES): Added target_reg_operand. + (PROMOTE_MODE): Promote signed types to DImode on SHmedia. + * config/sh/sh.md: Remove all attrs from SHmedia insns. + (cmpeqdi_media, cmpgtdi_media, cmpgtudi_media): New insns. + (cmpdi): Accept SHmedia. + (movdicc_false, movdicc_true): New insns. + (movdicc): New expand. + (adddi3): Accept arith_operand for op2, but FAIL on SH1 if + no_new_pseudos. + (addsi3_media): Match `S' constraint. + (anddi3, andcdi3, iordi3, xordi3, negdi_media): New insns. + (negdi2): Expand for SHmedia. + (one_cmpldi2): New expand. + (zero_extendsidi2): Change from expand to insn. + (extendsidi2): Add constraints. + (movdi_media, movsi_media): Change `%x' to `%M'. Use `%m' for + LD/ST address. Fix SI immediate loading split. + (movhi_media, movqi_media, lduw, ldub): New insns. + (movhi, movqi): Accept SHmedia. + (shori_media, movdi_media): Relax input constraints. Split + symbolic constants. + (movdf_media, movsf_media): New insn. New split to movdi. + (movdf, movsf): Match on SHmedia. + (beq_media, bne_media, bgt_media, bge_media, bgtu_media, + bgeu_media): New insns and splits. New insns with `_i' suffix. + (beq, bne, bgt, blt, ble, bge, bgtu, bltu, bgeu, bleu): Adjust. + (bunordered): New expand. + (jump_compact): Renamed from `jump'. + (jump_media): New insn. + (jump): New expand. + (call_media, call_value_media): New insns. + (call, call_value): Adjust. + (indirect_jump_compact): Renamed from `indirect_jump'. + (indirect_jump_media): New insn. + (indirect_jump): New expand. + (untyped_call, return): Accept SHmedia. + (return_media): New insn. + (prologue, epilogue, blockage): Accept SHmedia. + (seq, slt, sle, sgt, sge, sgtu, sltu, sleu, sgeu, sne): Adjust. + (sunordered): New expand. + (addsf3, subsf3, mulsf3, divsf3, floatsisf2, fix_truncsfsi2, + cmpsf, negsf2, sqrtsf2, abssf2): Adjust for SHmedia. + (addsf3_media, subsf3_media, mulsf3_media, mac_media, + divsf3_media, floatdisf2, floatsisf2_media, fix_truncsfdi2, + fix_truncsfsi2_media, cmpeqsf_media, cmpgtsf_media, + cmpgesf_media, cmpunsf_media, negsf2_media, sqrtsf2_media, + abssf2_media): New insns. + (adddf3, subdf3, muldf3, divdf3, floatsidf2, fix_truncdfsi2, + cmpdf, negdf2, sqrtdf2, absdf2): Adjust for SHmedia. + (adddf3_media, subdf3_media, muldf3_media, divdf3_media, + floatdidf2, floatsidf2_media, fix_truncdfdi2, + fix_truncdfsi2_media, cmpeqdf_media, cmpgtdf_media, + cmpgedf_media, cmpundf_media, negdf2_media, sqrtdf2_media, + absdf2_media): New insns. + (extendsfdf2, truncdfsf2): Adjust for SHmedia. + (extendsfdf2_media, truncdfsf2_media): New insns. + 2000-09-14 Alexandre Oliva <aoliva@redhat.com> + * config/sh/sh.c (machine_dependent_reorg): On shmedia, skip for now. + * config/sh/sh.h (CONST_OK_FOR_J): Document. + (LEGITIMATE_CONSTANT_P): Accept CONST_DOUBLEs on shmedia. + * config/sh/sh.md (adddi3): New expand. + (adddi3_media, adddi3z_media): New insns. + (adddi3_compact): Renamed from adddi3. + (addsi3_media): Use add.l r63 to add constant zero. + (subdi3): New expand. + (subdi3_media): New insn. + (subdi3_compact): Renamed from subdi3. + (mulsidi3): New expand. + (mulsidi3_media): New insn. + (mulsidi3_compact): Renamed from mulsidi3. + (umulsidi3): New expand. + (umulsidi3_media): New insn. + (umulsidi3_compact): Renamed from umulsidi3. + (ashlsi3_media, ashrsi3_media, lshrsi3_media): New insns. + (ashlsi3, ashrsi3, lshrsi3): Use them. + (ashldi3_media, ashrdi3_media, lshrdi3_media): New insns. + (ashldi3, ashrdi3, lshrdi3): Use them. + (zero_extendsidi2): New expand. + (extendsidi2): New insn. + (movsi_media): New insn. Split to movdi to load constants. + (movsi): Enable for shmedia. + (movdi_media): New insn. Use shori_media to load wide constants. + (short_media): New insn. + (movdi): Enable for shmedia. + 2000-09-08 Alexandre Oliva <aoliva@redhat.com> + * config/sh/sh.h (CPP_SPEC): Added `m5'. + (SUBTARGET_CPP_SPEC): Added `!m5'. + (SH5_BIT, TARGET_SH5, TARGET_SHMEDIA, TARGET_SHCOMPACT): New macros. + (TARGET_SWITCHES): Added `5' and `5-compact'. Added SH1_BIT + to all other SH variants. + (TARGET_DEFAULT): Set to SH1_BIT. + (OVERRIDE_OPTIONS): Recognize sh5 CPU. + (BITS_PER_WORD): Raise to 64 on shmedia. + (MAX_BITS_PER_WORD): Change to 64. + (MAX_LONG_TYPE_SIZE, MAX_WCHAR_TYPE_SIZE): Set to MAX_BITS_PER_WORD. + (INT_TYPE_SIZE): Keep as 32. + (UNITS_PER_WORD): Raise to 8 on shmedia. + (MIN_UNITS_PER_WORD): Keep as 4. + (POINTER_SIZE): Raise to 64 on shmedia. + (CONST_OK_FOR_J): New macro. + (CONST_OK_FOR_LETTER_P): Use it. + (processor_type): Add PROCESSOR_SH5. + * config/sh/sh.md: Conditionalize all expands, insns and + splits to TARGET_SH1. + (cpu): Added sh5. + (addsi3_compact): Renamed from... + (addsi3): Now an expand. + (addsi3_media, subsi3_media): New insns. + (subsi3): Don't negate constants with SHmedia. + + * hooks.c: New file. + * hooks.h: New file. + * Makefile.in (HOOKS_H): New. + (TARGET_DEF_H): Added $(HOOKS_H). + (OBJS): Added hooks.o. + (cfgcleanup.o, bb-reorder.o): Added target.h. + (hooks.o): Added dependencies. + * target-def.h (TARGET_CANNOT_MODIFY_JUMPS_P): New, added to... + (TARGET_INITIALIZER): this. + * doc/tm.texi (TARGET_CANNOT_MODIFY_JUMPS_P): Document. + * target.h (struct gcc_target): Added cannot_modify_jumps_p. + * bb-reorder.c: Include target.h. + (reorder_basic_blocks): Skip if cannot modify jumps. + * cfgcleanup.c: Include target.h. + (try_optimize_cfg): Skip merge blocking if cannot modify jumps. -Tue Nov 2 13:38:30 1993 Peter Schauer (pes@regent.e-technik.tu-muenchen.de) +2002-02-08 Chris Demetriou <cgd@broadcom.com> - * configure.in: Configure gdb for alpha. + * config/mips/mips.md (casesi_internal, casesi_internal_di): + Protect jump delay slot instructions with .set noreorder and + .set nomacro. -Mon Nov 1 10:42:54 1993 Jim Kingdon (kingdon@lioth.cygnus.com) +2002-02-08 Chris Demetriou <cgd@broadcom.com> - * Makefile.in (CXXFLAGS): Add -O. + * config/mips/mips.md (casesi_internal_di): Calculate + the index into the target offset table correctly. -Wed Oct 27 10:45:06 1993 david d `zoo' zuhn (zoo@rtl.cygnus.com) +2002-02-08 Richard Henderson <rth@redhat.com> - * config.guess: added support for DG Aviion + * expr.c (expand_expr): Mind EXPAND_INITIALIZER for truncation also. + * final.c (output_addr_const): Accept and discard SUBREG. + * varasm.c (decode_addr_const): Don't abort on unknown expressions -- + mark them unknown instead. + (simplify_subtraction): Handle RTX_UNKNOWN. + (initializer_constant_valid_p): Strip NOP_EXPRs that narrow the mode. -Tue Oct 26 14:37:37 1993 Ken Raeburn (raeburn@rover.cygnus.com) +2002-02-08 David Edelsohn <edelsohn@gnu.org> - * configure.in: Produce warning message for subdirectories not - configurable for this host/target combination. Don't try to - configure gdb for vms. + * doc/invoke.texi (RS/6000 and PowerPC Options): Fix typo. -Mon Oct 25 11:22:15 1993 Ken Raeburn (raeburn@rover.cygnus.com) +2002-02-08 Richard Henderson <rth@redhat.com> - * Makefile.in (taz): Replace "byacc" with "bison -y" in the - appropriate files before making "diststuff". - (DISTBISONFILES): New var: list of files to be edited. - (DISTSTUFFDIRS): Add binutils. + * config/alpha/elf.h (ASM_OUTPUT_ALIGNED_BSS): New. -Fri Oct 22 20:32:15 1993 david d `zoo' zuhn (zoo@rtl.cygnus.com) +2002-02-08 Andreas Jaeger <aj@suse.de> - * config.sub: also handle mipsel and mips64el (for little endian mips) + * config.gcc (x86_64-*-linux): Add t-linux64 makefile fragment. + * config/i386/t-linux64: New file. -Fri Oct 22 07:59:20 1993 Jim Kingdon (kingdon@lioth.cygnus.com) +2002-02-08 Jakub Jelinek <jakub@redhat.com> - * configure.in: Add * to end of all OS names. + * c-common.c (c_expand_expr): Revert 2002-02-06 patch. + * c-parse.in (compstmt): Clear last_expr_type. -Thu Oct 21 11:38:28 1993 Stan Shebs (shebs@rtl.cygnus.com) +2002-02-07 Richard Henderson <rth@redhat.com> - * configure.in: Build newlib for LynxOS native. + * loop.c (strength_reduce): Sink final_value when not + eliminating a biv. -Wed Oct 20 09:56:12 1993 Jim Kingdon (kingdon@lioth.cygnus.com) +2002-02-07 David O'Brien <obrien@FreeBSD.org> - * config.guess: Add support for delta 88k running SVR3. + * config/sparc/freebsd.h: Fix mismatched spec {. - * configure.in: Add comment about HP compiler vs. emacs. +2002-02-07 Richard Henderson <rth@redhat.com> -Tue Oct 19 16:02:22 1993 david d `zoo' zuhn (zoo@rtl.cygnus.com) + * cfgrtl.c: Include recog.h and insn-config.h. + (keep_with_call_p): Fix general_operand invocation. + * Makefile.in (cfgrtl.o): Update dependencies. - * configure.in: don't build ld on solaris2 (not a viable option - due to bugs in getpwnam & getpwuid) +2002-02-07 Kazu Hirata <kazu@hxi.com> -Tue Oct 19 15:13:56 1993 Ken Raeburn (raeburn@rtl.cygnus.com) + * config/h8300/h8300.c (two_insn_adds_subs_operand): Revise a + comment. Accept HImode only if TARGET_H8300. - * configure.in: Accept alpha-dec-osf1*, not just -osf1, since - config.guess will produce a full version number. +2002-02-07 Eric Christopher <echristo@redhat.com> -Tue Oct 19 15:58:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com) + * config/mips/crtn.asm: Cleanup #ifdefs. - * configure.in: Build linker and binutils for alpha-dec-osf1. +2002-02-07 Eric Christopher <echristo@redhat.com> -Tue Oct 19 11:41:55 1993 Jim Kingdon (kingdon@lioth.cygnus.com) + * config/mips/crti.asm: Add changes for mips16. mips16 uses + register 7 as RA instead of $31. + * config/mips/crtn.asm: Ditto. + * config/mips/mips.c (mips_move_2words): Add case for + TARGET_MIPS16 when HOST_BITS_PER_WIDE_INT >= 64. + (compute_frame_size): Fix typo. + (save_restore_insns): Ditto. Make documentation about using + register $7 as return register more precise. + (mips_expand_epilogue): Fix comment. Add code to work around not + being able to add to the stack pointer directly. + * config/mips/mips.h (EH_RETURN_DATA_REGNO): Change register number + to 2 for TARGET_MIPS16 as we need 6 and 7 as clobbers in the + epilogue. - * Makefile.in: Remove -O from CXXFLAGS for consistency with CFLAGS, - and gdb/testsuite/Makefile.in. +2002-02-07 Tom Rix <trix@redhat.com> -Sat Oct 9 18:39:07 1993 david d `zoo' zuhn (zoo@rtl.cygnus.com) + * config/rs6000/rs6000.c (reg_or_aligned_short_operand): New. For + immediates in ldu and stdu DS opcode field. + * config/rs6000/rs6000.md (movdi_update, movdi_update1): Use. + * config/rs6000/rs6000-protos.h: Add reg_or_aligned_short_operand. + * config/rs6000/rs6000.h (PREDICATE_CODES): Same. - * configure.in: recognize mips*- instead of mips- +2002-02-07 Jeff Sturm <jsturm@one-point.com> -Fri Oct 8 14:15:39 1993 Ken Raeburn (raeburn@cygnus.com) + * config/sparc/sparc.c (compute_frame_size): Don't correct frame + offset for stack bias. - * config.sub: Accept linux*coff and linux*elf as operating - systems. +2002-02-07 H.J. Lu <hjl@gnu.org> -Tue Oct 7 14:24:41 1997 Ian Lance Taylor <ian@cygnus.com> + * config/mips/linux.h (SUBTARGET_ASM_DEBUGGING_SPEC): Defined. - * ltmain.sh: Handle symlinks in generated script. +2002-02-07 Ulrich Weigand <uweigand@de.ibm.com> -Thu Oct 7 12:57:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com) + * testsuite/gcc.dg/cpp/charconst-2.c: Add -fsigned-char option. - * config.sub: Recognize mips64, and mips3 as an alias for it. +Thu Feb 7 12:14:17 CET 2002 Jan Hubicka <jh@suse.cz> -Wed Oct 6 13:54:21 1993 Peter Schauer (pes@regent.e-technik.tu-muenchen.de) + * i386-protos.h (x86_order_regs_for_local_alloc): Declare + * i386.c (x86_order_regs_for_local_alloc): New global function. + * i386.h (REG_ALLOC_ORDER): CLeanup. + (ORDER_REGS_FOR_LOCAL_ALLOC): New. - * configure.in: Remove alpha-dec-osf*, no longer necessary now that - gdb knows how to handle OSF/1 shared libraries. +2002-02-07 Richard Henderson <rth@redhat.com> -Tue Oct 5 11:55:04 1993 Jim Kingdon (kingdon@lioth.cygnus.com) + PR optimization/2463 + * alias.c (find_base_value): Recall base values for fixed hard regs. + * loop.c (loop_regs_update): Don't use single_set on non-insns. - * configure.in: Recognize hppa*-*-hiux* (currently synonym for hpux). - * config.guess: Recognize Hitachi's HIUX. - * config.sub: Recognize h3050r* and hppahitachi. - Remove redundant cases for hp9k[23]*. +2002-02-07 Alexandre Oliva <aoliva@redhat.com> -Mon Oct 4 16:15:09 1993 david d `zoo' zuhn (zoo@rtl.cygnus.com) + * config/mips/mips.md (define_delay) [mips16]: Adjust required + length. - * configure.in: default to '--with-gnu-as' and '--with-gnu-ld' - if gas and ld are in the source tree and are in ${configdirs}. - If ${use_gnu_as} or ${use_gnu_ld} are 'no', then don't set the - --with options (but still pass them down on the command line, - if they were explicitly specified). +2002-02-06 Richard Henderson <rth@redhat.com> -Wed Oct 1 13:11:27 1997 Ian Lance Taylor <ian@cygnus.com> + PR c/5609 + * stmt.c (resolve_operand_name_1): Take more care with mixed + named and unnamed operands. - * configure: Handle autoconf style directory options: --bindir, - --datadir, --includedir, --infodir, --libdir, --libexecdir, - --mandir, --oldincludedir, --sbindir, --sharedstatedir, - --sysconfdir. - * Makefile.in (sbindir, libexecdir, sysconfdir): New variables. - (sharedstatedir, localstatedir, oldincludedir): New variables. - (BASE_FLAGS_TO_PASS): Pass down bindir, datadir, includedir, - infodir, libdir, libexecdir, localstatedir, mandir, oldincludedir, - sbindir, sharedstatedir, and sysconfdir. +2002-02-06 Janis Johnson <janis187@us.ibm.com> + Jan Hubicka <jh@suse.cz> -Fri Sep 24 19:11:13 1993 david d `zoo' zuhn (zoo@rtl.cygnus.com) + * loop.c (remove_constant_addition): Avoid clobbering a shared + CONST expression. - * configure: substitute SHELL value in Makefile.in with - ${CONFIG_SHELL} +2002-02-06 Ulrich Weigand <uweigand@de.ibm.com> -Wed Sep 24 15:18:32 1997 Ian Lance Taylor <ian@cygnus.com> + * config.gcc (s390x-*-linux*): Add t-linux64 makefile fragment. + * config/s390/t-linux64: New file. + * config/s390/libgcc-glibc.ver: New file. - * ltmain.sh: Tweak shell pattern to avoid bug in NetBSD /bin/sh. +2002-02-06 Ulrich Weigand <uweigand@de.ibm.com> -Thu Sep 23 18:05:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com) + * config/s390/linux64.h: Delete file. + * config/s390/s390x.h: New file. + * config.gcc (s390x-*-linux*): Use s390x.h instead of linux64.h + as target header file. + * config/s390/linux.h (TARGET_VERSION): Define depending on + DEFAULT_TARGET_64BIT. + (CPP_SPEC, ASM_SPEC, LINK_SPEC): Likewise. + (SIZE_TYPE, PTRDIFF_TYPE): Likewise. + (NO_BUILTIN_SIZE_TYPE, NO_BUILTIN_PTRDIFF_TYPE): Define. + (CPP_ARCH31_SPEC, CPP_ARCH64_SPEC): New defines. + (LINK_ARCH31_SPEC, LINK_ARCH64_SPEC): New defines. + (EXTRA_SPEC): New define. + * config/s390/s390.h (TARGET_VERSION): Define depending on + DEFAULT_TARGET_64BIT. + (MASK_RETURN_ADDR): Add run-time check for TARGET_64BIT. - * configure.in: Build gas, ld, and binutils for *-*-sysv4* and - *-*-solaris2* targets. +2002-02-06 Jason Merrill <jason@redhat.com> + + * c-decl.c (finish_function): Warn about a non-void function with + no return statement and no abnormal exit. + (current_function_returns_abnormally): New variable. + (start_function): Clear it. + (struct c_language_function): Add returns_abnormally. + (push_c_function_context): Save it. + (pop_c_function_context): Restore it. + (builtin_function): Set TREE_THIS_VOLATILE on return fns. + (grokdeclarator): Set C_FUNCTION_IMPLICIT_INT on functions without + an explicit return type. + * c-tree.h: Declare current_function_returns_abnormally. + (C_FUNCTION_IMPLICIT_INT): New macro. + * c-typeck.c (build_function_call): Set it. + (c_expand_return): Set current_function_returns_value even if the + value is erroneous. + +2002-02-06 Jakub Jelinek <jakub@redhat.com> + + PR c/5420: + * c-common.c (c_unsafe_for_reeval): Make COMPOUND_LITERAL_EXPR + unsafe for reevaluation. + +2002-02-06 Jakub Jelinek <jakub@redhat.com> + + PR c/5482: + * c-common.c (c_expand_expr) [STMT_EXPR]: If last expression is not + EXPR_STMT, but COMPOUND_STMT, recurse into it. + +2002-02-06 Richard Henderson <rth@redhat.com> + + * cfganal.c (keep_with_call_p): Source for fixed_reg dest must + be a general_operand. Dest for function value must be a pseudo. + +2002-02-06 Nick Clifton <nickc@cambridge.redhat.com> + + * dbxout.c (dbxout_symbol_location): Accept LABEL_REFs as well + as SYMBOL_REFs from the constant pool. + +2002-02-06 Alexandre Oliva <aoliva@redhat.com> + + * dbxout.c (dbxout_parms): Apply DEBUGGER_ARG_OFFSET to parameters + passed by invisible reference. + +2002-02-05 Richard Henderson <rth@redhat.com> + + * config/sparc/sparc.h (ARG_POINTER_CFA_OFFSET): No stack bias. + +2002-02-06 Hans-Peter Nilsson <hp@bitrange.com> + + Implement using "base addresses" in insn operands as default. + * config/mmix/mmix.c (mmix_conditional_register_usage): if + -mabi=gnu, modify fixed_regs to fit the GNU ABI. + (mmix_extra_constraint): Use 'R' to indicate that GETA should be + used to read the rtx value. + (mmix_target_asm_function_epilogue): Fix spacing. + (mmix_constant_address_p): Handle TARGET_BASE_ADDRESSES. + (mmix_legitimate_address): Ditto. + (mmix_encode_section_info): Set SYMBOL_REF_FLAG on rtx:es that + should be loaded with a GETA insn. Don't allocate needless extra + char for nul termination and fix misleading comment. + (mmix_print_operand_address): Handle constants if + TARGET_BASE_ADDRESSES. + (mmix_output_register_setting): Use base addressing if + TARGET_BASE_ADDRESSES and the number of insns is 3. + * config/mmix/t-mmix (MULTILIB_EXTRA_OPTS): New. + * config/mmix/mmix.md ("movdi"): Change the alternative with GETA + to use R as constraint, add LDA to match s. + * config/mmix/mmix.h (TARGET_BASE_ADDRESSES): New. + (TARGET_DEFAULT): Add TARGET_MASK_BASE_ADDRESSES. + (TARGET_SWITCHES): Add -mbase-addresses, -mno-base-addresses. + (FIXED_REGISTERS): Make registers $231..$246 fixed by default. + (MMIX_MMIXWARE_ABI_REG_ALLOC_ORDER): Move $231..$246 last, in + order with other fixed registers. + (MMIX_GNU_ABI_REG_ALLOC_ORDER): Put forward $231, in order with + other parameter/call-clobbered registers. + * doc/invoke.texi (Option Summary) <MMIX Options>: Add + -mbase-addresses, -mno-base-addresses. + (MMIX Options): Ditto. + +2002-02-05 John David Anglin <dave@hiauly1.hia.nrc.ca> + + * pa.h (PREDICATE_CODES): Add reg_before_reload_operand. + +2002-02-06 Aldy Hernandez <aldyh@redhat.com> + + * config/rs6000/altivec.h: Change elem to _S_elem. + +2002-02-05 Jason Thorpe <thorpej@wasabisystems.com> -Sun Sep 19 17:01:41 1993 david d `zoo' zuhn (zoo@rtl.cygnus.com) + * config/netbsd.h (WCHAR_TYPE): Define. + (WCHAR_TYPE_SIZE): Ditto. + (WINT_TYPE): Ditto. + * config/alpha/netbsd.h (WCHAR_TYPE): Remove. + (WCHAR_UNSIGNED): Ditto. + (WCHAR_TYPE_SIZE): Ditto. + (WINT_TYPE): Ditto. + * config/arm/netbsd.h: Likewise. + * config/i386/netbsd-elf.h: Likewise. + * config/i386/netbsd.h: Likewise. + * config/m68k/netbsd-elf.h: Likewise. + * config/m68k/netbsd.h: Likewise. + * config/ns32k/netbsd.h: Likewise. + * config/sparc/netbsd.h: Likewise. + * config/vax/netbsd.: Likewise. - * Makefile.in: define M4, and pass it down to sub-makes; - all-autoconf now depends on all-m4 +2002-02-05 Alexandre Oliva <aoliva@redhat.com> -Sat Sep 18 00:38:23 1993 david d `zoo' zuhn (zoo@rtl.cygnus.com) + * target.h (struct gcc_target): Added ms_bitfield_layout_p. + * target-def.h (TARGET_MS_BITFIELD_LAYOUT_P): New. Added to... + (TARGET_INITIALIZER): this. + * doc/tm.texi (TARGET_MS_BITFIELD_LAYOUT_P): Document. + (BITFIELD_NBYTES_LIMITED): Markup fix. + * tree.h (default_ms_bitfield_layout_p): Declare. + (record_layout_info): Added prev_field. + * tree.c (default_ms_bitfield_layout_p): New fn. + * c-decl.c (finish_struct): Disregard EMPTY_FIELD_BOUNDARY and + PCC_BITFIELD_TYPE_MATTERS for MS bit-field layout. + * stor-layout.c: Include target.h. + (start_record_layout): Initialize prev_field. + (place_field): Handle MS bit-field layout, and disregard + EMPTY_FIELD_BOUNDARY, BITFIELD_NBYTES_LIMITED and + PCC_BITFIELD_TYPE_MATTERS in this case. Update prev_field. + * Makefile.in (stor-layout.o): Adjust dependencies. - * Makefile.in ({AR,RANLIB}_FOR_TARGET): make contingent on - presence of {ar,ranlib} instead of a configured directory +2002-02-05 Jason Merrill <jason@redhat.com> -Wed Sep 15 08:41:44 1993 Jim Kingdon (kingdon@cirdan.cygnus.com) + * collect2.c (dump_file): Pass DMGL_VERBOSE to cplus_demangle. - * config.guess: Accept 34?? as well as 33?? for NCR. +2002-02-05 Andreas Jaeger <aj@suse.de> -Mon Sep 13 12:28:43 1993 david d `zoo' zuhn (zoo@rtl.cygnus.com) + * crtstuff.c: Fix comments. - * configure.in: grab mt-hppa for HPPA targets; use 'gas ' instead - of 'gas' in sed commands, since 'gash' is now in the tree as well. +2002-02-05 Richard Henderson <rth@redhat.com> -Fri Sep 10 11:23:52 1993 david d `zoo' zuhn (zoo@rtl.cygnus.com) + PR fortran/3393 + * loop.c (loop_iv_add_mult_emit_before): Copy multiplier as well. + (loop_iv_add_mult_sink, loop_iv_add_mult_hoist): Likewise. - * configure: grab values for $(CC) and $(CXX) from the - environment, so that someone can do "CC=gcc configure; make" and - have it work right (matching the way that autoconf works now) + PR fortran/3392 + * config/mips/mips.c (function_arg): Handle TImode. + (function_arg_advance): Likewise. - * configure.in, Makefile.in: add support for gash, the tcl - interface to Galaxy +2002-02-05 Aldy Hernandez <aldyh@redhat.com> - * config.guess: add NetBSD variants (hp300, x86) + * config/rs6000/altivec.h (vec_step_help): Rename to + __vec_step_help. -Thu Sep 9 16:48:52 1993 Jason Merrill (jason@deneb.cygnus.com) +2002-02-05 Aldy Hernandez <aldyh@redhat.com> - * install.sh: Support -d option (in the manner of SunOS 4 install, - as it is more deterministic than that of GNU install) - (chmodcmd): Set file to mode 755 by default (should also do default - chgrp and chown, but I don't feel like dealing with that now) + * config/rs6000/altivec.h: Fix typos. -Tue Sep 7 11:59:39 1993 Doug Evans (dje@canuck.cygnus.com) +2002-02-05 Jason Thorpe <thorpej@wasabisystems.com> - * config.sub: Remove h8300hhms alias. + * config/arm/netbsd.h: Correct a comment. -Tue Aug 31 11:00:09 1993 Jim Kingdon (kingdon@lioth.cygnus.com) +2002-02-05 Aldy Hernandez <aldyh@redhat.com> - * configure.in: Match *-*-solaris2* not *-sun-solaris2*. + * config/rs6000/rs6000.c (altivec_init_builtins): Fix typo + building void typed builtins. -Mon Aug 30 18:29:10 1993 david d `zoo' zuhn (zoo@rtl.cygnus.com) + * config/rs6000/altivec.h (vec_ld*): Fix typos. + (vec_step): Implement for C++. - * Makefile.in (gcc-no-fixedincludes): touch stmp-fixproto as well - as stmp-fixinc +Mon Feb 4 19:23:19 2002 Richard Kenner <kenner@vlsi1.ultra.nyu.edu> -Wed Aug 25 16:35:59 1993 K. Richard Pixley (rich@sendai.cygnus.com) + * final.c (final_scan_insn): Add case for NOTE_INSN_LOOP_END_TOP_COND. - * config.sub: recognize m88110-bug-coff. +2002-02-04 Richard Henderson <rth@redhat.com> -Tue Aug 24 10:23:24 1993 david d `zoo' zuhn (zoo@rtl.cygnus.com) + * combine.c (nonzero_bits): Re-introduce special case for + sp/fp/ap wrt REGNO_POINTER_ALIGN. - * Makefile.in (all-libio): all dependencies on the toolchain used - to build this (gcc, gas, ld, etc) +2002-02-05 Aldy Hernandez <aldyh@redhat.com> -Fri Aug 20 17:24:24 1993 Jim Kingdon (kingdon@lioth.cygnus.com) + * doc/extend.texi: Warn about unsupported usage of altivec + builtins. - * config.guess: Deal with OSF/1 1.3 on alpha. + * config/rs6000/rs6000.md (altivec_vcmp*_p): Remove. + (altivec_predicate_*): New. -Thu Aug 19 11:43:04 1993 david d `zoo' zuhn (zoo@rtl.cygnus.com) + * config/rs6000/altivec.h: Rewrite predicates to use new builtins. + Add C++ version of vec_*() functions. - * install.sh: add some 'else true' clauses for portability + * config/rs6000/rs6000.c (bdesc_altivec_preds): New. + (bdesc_2arg): Remove altivec predicates. + (altivec_expand_builtin): Handle predicates. + (altivec_init_builtins): Handle predicates. + (altivec_expand_predicate_builtin): New. - * configure.in: don't build libio for h8[35]00-*-* targets +2002-02-04 John David Anglin <dave@hiauly1.hia.nrc.ca> + + * pa.c (DO_FRAME_NOTES): Move forward. + (store_reg): Revise handling of frame notes. + (load_reg): Likewise. + (set_reg_plus_d): Likewise. + (hppa_expand_prologue): Likewise. + (hppa_expand_epilogue): Likewise. -Tue Aug 17 19:02:31 1993 Per Bothner (bothner@kalessin.cygnus.com) +2002-02-04 John David Anglin <dave@hiauly1.hia.nrc.ca> - * Makefile.in: Add support for new libio. + * unwind-dw2-fde-glibc.c: Define _GNU_SOURCE if not defined. -Sun Aug 15 20:48:55 1993 Jim Kingdon (kingdon@lioth.cygnus.com) +2002-02-04 Jakub Jelinek <jakub@redhat.com> - * install.sh: If one command fails, don't try the rest. Don't try - to remove $dsttmp (via trap) unless we have already created it. - If $src doesn't exist, detect it and exit with an error. + PR c/4475, c++/3780: + * c-common.def (SWITCH_STMT): Add SWITCH_TYPE operand. + * c-common.h (SWITCH_TYPE): Define. + * c-typeck.c (c_start_case): Set SWITCH_TYPE. + * stmt.c (all_cases_count): Set lastval to thisval at end of loop. + Rename spareness variable to sparseness. + (expand_end_case_type): Renamed from expand_end_case, use orig_type + if non-NULL instead of TREE_TYPE (orig_index). + * tree.h (expand_end_case_type): Renamed from expand_end_case. + (expand_end_case): Define using expand_end_case_type. + * c-semantics.c (genrtl_switch_stmt): Pass SWITCH_TYPE + to expand_end_case_type. + * doc/c-tree.texi (SWITCH_STMT): Document SWITCH_TYPE. - * config.guess: Recognize BSD on hp300. +2002-02-04 John David Anglin <dave@hiauly1.hia.nrc.ca> -Wed Aug 11 18:35:13 1993 Per Bothner (bothner@kalessin.cygnus.com) + * pa.h (PREFERRED_STACK_BOUNDARY): Define to match standard rounding. + (BIGGEST_ALIGNMENT): Change to 128. - * config.guess: Map (9000/[34]??:HP-UX:*:*) to m68k-hp-hpux. - Bug report from "Hamish (H.I.) Macdonald" <hamish@bnr.ca>. +2002-02-04 John David Anglin <dave@hiauly1.hia.nrc.ca> -Wed Aug 11 15:37:51 1993 Jason Merrill (jason@deneb.cygnus.com) + * pa32-linux.h (LINK_COMMAND_SPEC): Define. - * Makefile.in (all-send-pr): depends on all-prms +2002-02-04 John David Anglin <dave@hiauly1.hia.nrc.ca> -Wed Aug 11 16:56:03 1993 Jim Kingdon (kingdon@lioth.cygnus.com) + * pa.md (call_internal_reg_64bit): Remove unused variable. - * config.guess: Fix typo (9000/8??:4.3bsd -> 9000/7??:4.3bsd). +2002-02-04 Nick Clifton <nickc@cambridge.redhat.com> -Fri Aug 6 14:45:02 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com) + * config/arm/arm.h (machine_function): Add uses_anonymous_args + field. + (SETUP_INCOMING_VARARGS): Set uses_anonymous_args. + * config/arm/arm.c (current_function_anonymous_args): Delete, + replace uses with cfun->machine->uses_anonymous_args. + (arm_reorg): Do not reset uses_anonymous_args. - * config.guess: From michael@mercury.cs.mun.ca (Michael Rendell): - Added test for mips-mips-riscos5. + * config/arm/arm.c (arm_hard_regno_mode_ok): Allow any value in + any geenral register. -Thu Aug 5 15:45:08 1993 david d `zoo' zuhn (zoo@rtl.cygnus.com) +2001-02-04 Bernd Schmidt <bernds@redhat.com> - * configure.in: use mh-hp300 for 68k HP hosts + * cfgrtl.c (force_nonfallthru_and_redirect): Don't try to redirect + the entry block. -Mon Aug 2 11:56:53 1993 david d `zoo' zuhn (zoo@rtl.cygnus.com) +2002-02-04 Richard Henderson <rth@redhat.com> - * configure: add support for CONFIG_SHELL, so that you can use - some alternate shell for evaluating configure scripts + * combine.c (force_to_mode): Remove STACK_BIAS code. + (nonzero_bits): Likewise. Replace sp/fp special case with + REGNO_POINTER_ALIGN. -Sun Aug 1 11:36:27 1993 Fred Fish (fnf@deneb.cygnus.com) + * config/sparc/sparc.h (FRAME_POINTER_REGNUM): Change to SFP. + (HARD_FRAME_POINTER_REGNUM): New. + (FIRST_PSEUDO_REGISTER, REG_CLASS_CONTENTS): Update. + (FIXED_REGS, CALL_USED_REGS): Update. + (REG_ALLOC_ORDER, REGISTER_NAMES): Update. + (CONDITIONAL_REGISTER_USAGE): Update for HFP. + (HARD_REGNO_NREGS): Update for SFP. + (STACK_POINTER_OFFSET): Include bias here ... + (FIRST_PARM_OFFSET): ... not here. + (STACK_BIAS): Remove. + (INIT_EXPANDERS): New. + (STARTING_FRAME_OFFSET): Do not include bias. + (ELIMINABLE_REGS, CAN_ELIMINATE, INITIAL_ELIMINATION_OFFSET): New. + (REGNO_OK_FOR_INDEX_P, REGNO_OK_FOR_BASE_P): Update for SFP. + (REG_OK_FOR_INDEX_P, REG_OK_FOR_BASE_P): Likewise. + * config/sparc/aout.h (DBX_REGISTER_NUMBER): Update for HFP. + * config/sparc/litecoff.h, config/sparc/sol2.h: Likewise. + * config/sparc/sparc.c (mem_min_alignment): Update for HFP. + (sparc_nonflat_function_prologue, epilogue_renumber): Likewise. + (MUST_SAVE_REGISTER): Likewise. + (sparc_flat_function_prologue): Likewise. + (sparc_flat_function_epilogue): Likewise. + (HARD_FRAME_POINTER_MASK): Rename from FRAME_POINTER_MASK. + (sparc_init_modes): SFP is GENERAL_REGS. + (sparc_builtin_saveregs): SFP does not have bias applied. - * Makefile.in (make-gdb.tar.gz): Sed bug reporting address - in configure script to bug-gdb@prep.ai.mit.edu when building - distribution archive. - * Makefile.in (COMPRESS): Remove def. - * Makefile.in (gdb.tar.gz, make-gdb.tar.gz): Renamed from - gdb.tar.Z and make-gdb.tar.Z respectively. - * Makefile.in (make-gdb.tar.gz): Now only build gzip'd archive. - * Makefile.in (make-gdb.tar.gz): Minor changes to move closer - to convergence with 'taz' target in Makefile.in. +2002-02-04 Richard Henderson <rth@redhat.com> -Fri Jul 30 12:34:57 1993 david d `zoo' zuhn (zoo@rtl.cygnus.com) + * config/alpha/alpha.c (current_function_is_thunk): Don't check + current_function_is_thunk. + (alpha_sa_mask): Distinguish between current_function_is_thunk + called from ASM_OUTPUT_MI_THUNK and not. + (alpha_does_function_need_gp): Thunks always need gp. + (alpha_start_function, alpha_output_function_end_prologue): Likewise. + (alpha_output_mi_thunk_osf): New. + * config/alpha/alpha-protos.h: Update. + * config/alpha/alpha.h (ASM_OUTPUT_MI_THUNK): New. - * install.sh (dsttmp): use trap to ensure that tmp files go - away on error conditions +2002-02-04 Richard Sandiford <rsandifo@redhat.com> -Wed Jul 28 11:57:36 1993 david d `zoo' zuhn (zoo@rtl.cygnus.com) + * c-typeck.c (build_c_cast): Warn when qualifiers are added to + function types, not when they're taken away. - * Makefile.in (BASE_FLAGS_TO_PASS): remove LOADLIBES +Mon Feb 4 09:05:58 2002 Jeffrey A Law (law@redhat.com) -Tue Jul 27 12:43:40 1993 Jim Kingdon (kingdon@lioth.cygnus.com) + * cfgrtl.c (try_redirect_by_replacing_jump): Remove associated + CODE_LABEL and jump table when replacing a table jump with a + simple jump. - * Makefile.in (install-dirs): Deal with a prefix like /gnu; - its parent is '/' not ''. +2002-02-04 Ulrich Weigand <uweigand@de.ibm.com> - * Makefile.in (DEVO_SUPPORT): Add comments about ChangeLog. + * config/s390/s390-protos.h (legitimize_la_operand, + s390_secondary_input_reload_class, s390_plus_operand, + s390_expand_plus_operand): Add prototypes. -Fri Jul 23 09:53:37 1993 Jason Merrill (jason@wahini.cygnus.com) + config/s390/s390.c (s390_secondary_input_reload_class, + s390_plus_operand, s390_expand_plus_operand): New functions. - * configure: if ${newsrcdir}/configure doesn't exist, don't assume - that ${newsrcdir}/configure.in does. + (struct s390_address): New member 'pointer'. + (s390_decompose_address): Compute it. + (legitimate_la_operand_p): Use it. + (legitimize_la_operand): New function. + (movti, movdi, movdf splitters): Call it. -Tue Jul 20 11:28:50 1993 david d `zoo' zuhn (zoo@rtl.cygnus.com) + config/s390/s390.h (SECONDARY_INPUT_RELOAD_CLASS): Define. + (PREDICATE_CODES): Add s390_plus_operand. - * test-build.mk: support for CONFIG_SHELL + config/s390/s390.md (adddi3_inv_64, addaddr_ccclobber): Delete. + (la_ccclobber): Allow GENERAL_REGS as output operand. -Mon Jul 19 21:54:46 1993 Fred Fish (fnf@deneb.cygnus.com) + (reload_load_address, *reload_load_address_reg_0, *la, *do_la_reg_0, + *reload_la_64, *reload_la_31 and splitters): Delete, replace by ... + (*la_64, *la_31, reload_indi, reload_insi): ... these. - * config.sub (netware): Add as a basic system type. +2002-02-04 Ulrich Weigand <uweigand@de.ibm.com> -Wed Jul 14 12:03:11 1993 K. Richard Pixley (rich@sendai.cygnus.com) + * gcc/config/s390/s390.h (CRT_CALL_STATIC_FUNCTION): Fixed + register names for regular asm () construct. - * Makefile.in (Makefile): depend on configure.in. Also drop the - $(srcdir)/ from the dependency on Makefile.in. +2002-02-04 Jakub Jelinek <jakub@redhat.com> -Tue Jul 13 20:10:58 1993 Doug Evans (dje@canuck.cygnus.com) + * config/i386/i386.md (movsf_1): Allow moving SF values in MMX + registers. - * config.sub: Recognize h8300hhms as h8300h-hitachi-hms. - (h8300hhms is temporary until multi-libraries are implemented). - * configure.in: Handle h8300h too. +2002-02-04 Jakub Jelinek <jakub@redhat.com> -Sun Jul 11 17:35:27 1993 Jim Kingdon (kingdon@lioth.cygnus.com) + * combine.c (recog_for_combine): Create a dummy insn with PATTERN + pat for recog. - * config.guess: Recognize dpx/2 as m68k-bull-sysv3. +2002-02-04 Hartmut Penner <hpenner@de.ibm.com> -Thu Jul 8 18:26:12 1993 John Gilmore (gnu@cygnus.com) + * varasm.c (decode_rtx_const): Allow unspec (symbol_ref) in + constant pool to be identical by string address and index. - * configure: Remove extraneous output when guessing host type. - * config.guess: Remove extraneous output when guessing using C - compiler rather than uname, or when guessing fails. +2002-02-04 Anthony Green <green@redhat.com> -Wed Jul 7 17:58:14 1993 david d `zoo' zuhn (zoo at rtl.cygnus.com) + * output.h (SECTION_OVERRIDE): Define. + * varasm.c (named_section): Obey SECTION_OVERRIDE. - * Makefile.in: remove all.cross and install.cross targets +2002-02-03 Jason Thorpe <thorpej@wasabisystems.com> - * configure: remove CROSS=-DCROSS_COMPILE and ALL=all.cross - definitions + * config.gcc (arm*-*-netbsdelf*): Placeholder to prevent match + by existing arm*-*-netbsd* (a.out) target. + (ns32k-*-netbsdelf*): Likewise. + (sparc-*-netbsdelf*): Likewise. + (vax-*-netbsdelf*): Likewise. -Tue Jul 6 10:39:44 1993 Steve Chamberlain (sac@phydeaux.cygnus.com) +2002-02-03 Danny Smith <dannysmith@users.sourceforge.net> - * configure.in (target sh): Build gprof. + * gthr-win32.h: Protect against conflicting typedef for BOOL in windows + headers and libobjc headers. -Thu Jul 1 16:52:56 1993 david d `zoo' zuhn (zoo at cirdan.cygnus.com) +2002-02-03 Mumit Khan <khan@nanotech.wisc.edu> - * config.sub: change -solaris to -solaris2 + * gthr-win32.h (__mingwthr_key_dtor): Use extern "C" linkage for C++. + (_mingw.h): Remove duplicate include. -Thu Jul 1 15:46:16 1993 Jim Kingdon (kingdon@lioth.cygnus.com) +2002-02-03 Jason Thorpe <thorpej@wasabisystems.com> - * configure.in: Use config/mh-riscos for mips-*-sysv*. + * config.gcc: Set cpu_type to m68k for 68010, as well. + (m68010-*-netbsdelf*): New... + (m68k*-*-netbsdelf*): ...targets. + * config/m68k/netbsd-elf.h: New file. -Wed Jun 30 09:31:58 1993 Ian Lance Taylor (ian@cygnus.com) +2002-02-02 Kazu Hirata <kazu@hxi.com> - * configure: Correct error message for missing Makefile.in to - print correct directory. + * config/h8300/h8300.c (hand_list): Move inside function_arg. -Tue Jun 29 13:52:16 1993 david d `zoo' zuhn (zoo at cirdan.cygnus.com) +2002-02-02 Kazu Hirata <kazu@hxi.com> - * install.sh: kludge around 386BSD shell bug + * config/h8300/h8300.c (h8_push_ops): Move inside + h8300_init_once. + (h8_pop_ops): Likewise. + (h8_move_ops): Likewise. -Tue Jun 29 13:06:49 1993 Per Bothner (bothner@rtl.cygnus.com) +2002-02-02 Kazu Hirata <kazu@hxi.com> - * config.guess: Recognize NeXT. - * config.guess: Recognize i486-ncr-sysv4. - * Makefile.in (taz): rm $(TOOL)-$$VER before linking. + * config/h8300/h8300.c (os_task): Make it static. + (monitor): Likewise. + (pragma_saveall): Likewise. -Tue Jun 29 12:50:57 1993 Ian Lance Taylor (ian@cygnus.com) +2002-02-02 Alexandre Oliva <aoliva@redhat.com> - * Makefile.in (MAKEINFOFLAGS): New variable. - (FLAGS_TO_PASS): Pass MAKEINFO as MAKEINFO MAKEINFOFLAGS. - * build-all.mk, test-build.mk: Pass down --no-split as - MAKEINFOFLAGS when hosted on DOS. Compile DOS hosted without -g. + * config/sh/sh.md (ic_invalidate_line): Make sure the immediate + constant is a valid sign-extension for Pmode. -Thu Jun 24 13:39:11 1993 Per Bothner (bothner@rtl.cygnus.com) +2002-02-02 Kazu Hirata <kazu@hxi.com> - * Makefile.in (DEVO_SUPPORT): Add COPYING COPYING.LIB install.sh. + * config/h8300/h8300.c: Fix formatting. -Wed Jun 23 12:59:21 1993 Per Bothner (bothner@rtl.cygnus.com) +2002-02-02 Kazu Hirata <kazu@hxi.com> - * Makefile.in (libg++.tar.z): New rule. - * Makefile.in (taz): Replace 'configure -rm' by 'make distclean'. - * Makefile.in (taz): Only do a single chmod. + * config/h8300/h8300.md: Fix formatting. -Fri Jun 18 12:03:10 1993 david d `zoo' zuhn (zoo at majipoor.cygnus.com) +2002-02-02 Kazu Hirata <kazu@hxi.com> - * install.sh: don't use dirname anymore (replaced with sed usage) + * config/h8300/h8300.md (one_cmpl patterns): Tighten the + predicates of operands[1]. Split the patterns for each + processor variant. -Thu Jun 17 18:43:42 1993 Fred Fish (fnf@cygnus.com) +2002-02-02 Kazu Hirata <kazu@hxi.com> - * Makefile.in: Change extension for gzip'd files from '.z' to - '.gz' per new FSF standard usage. + * config/h8300/h8300.md (xor patterns): Tighten the predicates + of operands[1] to register_operand. -Thu Jun 17 16:58:50 1993 david d `zoo' zuhn (zoo at majipoor.cygnus.com) +2002-02-02 Neil Booth <neil@daikokuya.demon.co.uk> - * configure: put quotes around the final value of program_transform_name + * cpphash.h (struct spec_nodes): Remove n__CHAR_UNSIGNED__. + * cpphash.c (_cpp_init_hashtable): Similarly. + * cppinit.c (cpp_create_reader): Default the signed_char flag. + (init_builtins): Define __CHAR_UNSIGNED__ appropriately. + (COMMAND_LINE_OPTIONS): Recognise -f{un,}signed-char. + (cpp_handle_option): Handle the new options. + * cpplex.c (cpp_interpret_charconst): Use new flag. + * cpplib.h (struct cpp_options): New member signed_char. + * gcc.c (cpp_unique_options): Remove %c spec and documentation. + (cpp_options): Handle -fsigned-char and -funsigned-char. + (static_specs): Remove signed_char_spec. + (do_spec1): Don't handle %c. + * system.h: Poison SIGNED_CHAR_SPEC. + * tradcif.y (yylex): Use flag_signed_char. + * tradcpp.h (flag_signed_char): New. + * tradcpp.c (flag_signed_char): New. + (main): Handle new command-line options. + (initialize_builtins): Define __CHAR_UNSIGNED__ if appropriate. +config: + * alpha/alpha.h (SIGNED_CHAR_SPEC): Remove. + * avr/avr.h: Remove old comments. + * i960/i960.h (CPP_SPEC): Pass -fsigned-char if -mic*. + (CC1_SPEC): Pass -fsigned-char if -mic*. + (SIGNED_CHAR_SPEC): Remove. +doc: + * tm.texi (SIGNED_CHAR_SPEC): Remove documentation. -Tue Jun 15 16:48:51 1993 david d `zoo' zuhn (zoo at cirdan.cygnus.com) +2002-02-01 Eric Christopher <echristo@redhat.com> - * Makefile.in: new install.sh support; update install-info rules + From Daniel Jacobowitz <dmj+@andrew.cmu.edu> + * config/mips/mips.h (FUNCTION_PROFILER): Fix function profiling. + * config/mips/linux.h (ASM_OUTPUT_REG_PUSH): Undefine. + (ASM_OUTPUT_REG_POP): Ditto. -Wed Jun 9 12:31:34 1993 Ian Lance Taylor (ian@cygnus.com) +2002-02-02 Neil Booth <neil@daikokuya.demon.co.uk> - * configure.in: Build diff for crosses, but not for go32 host. + * c-decl.c, tree.c, tree.h, objc/objc-act.c: Revert bitfield + patch. - * configure.in: Build gprof only for native, and don't build it - for mips-*-*, rs6000-*-*, or i[34]86-*-sco*. +2002-02-02 Jakub Jelinek <jakub@redhat.com> -Mon Jun 7 13:12:11 1993 david d `zoo' zuhn (zoo at deneb.cygnus.com) + * config/i386/i386.h (CPP_CPUCOMMON_SPEC): Add missing | separators. - * configure.in: don't build gas,ld,binutils on for *-*-sysv4 +2002-02-02 Jakub Jelinek <jakub@redhat.com> -Mon Jun 7 11:40:11 1993 Brendan Kehoe (brendan@lisa.cygnus.com) + PR c/5304: + * expmed.c (expand_mult_highpart): Use immed_double_const for wide_op1 + unconditionally. - * configure.in (host_tools): Add prms. +2002-02-01 Janis Johnson <janis187@us.ibm.com> -Fri Jun 4 13:30:42 1993 david d `zoo' zuhn (zoo at cirdan.cygnus.com) + * cfganal.c: Include tm_p.h. + (keep_with_call_p): Fix the test that determines if a register holds + the return value of a call. - * Makefile.in: install gcc, do installation of $(INSTALL_MODULES) - with $(FLAGS_TO_PASS) on the command line +2002-02-01 DJ Delorie <dj@redhat.com> - * config.sub: Recognize lynx and lynxos + * config/sparc/sparc.c (sparc_emit_set_symbolic_const64): If + we are given conflicting registers, switch to the other one we + had allocated for us. + * config/sparc/sparc.md (reload_indi, reload_outdi): Pass op[2] + as TImode so we know when the "other" register is available. -Fri Jun 4 10:59:56 1993 Ian Lance Taylor (ian@cygnus.com) +2002-02-01 David O'Brien <obrien@FreeBSD.org> - * config.sub: Accept -ecoff*, not just -ecoff. + * config/sparc/sol2-sld-64.h: Include sparc/biarch64.h rather than + sparc/sparc_bi.h. -Thu Jun 3 17:38:54 1993 Ken Raeburn (raeburn@cambridge.cygnus.com) +2002-02-01 Janis Johnson <janis187@us.ibm.com> - * Makefile.in (taz): Use .gz suffix instead of .z. - (binutils.tar.gz, gas+binutils.tar.gz, gas.tar.gz): Fixed target - names. + * cfganal.c (keep_with_call_p): New function. + (flow_call_edges_add): Prevent splitting a block between a call and + a single-set instruction that should be kept in the same block. -Thu Jun 3 00:27:06 1993 david d `zoo' zuhn (zoo at cirdan.cygnus.com) +2002-02-01 Craig Rodrigues <rodrigc@gcc.gnu.org> - * Makefile.in (vault-install): add an 'else true' (for Ultrix) + * doc/install.texi (avr): Update outdated URL. -Wed Jun 2 18:19:16 1993 david d `zoo' zuhn (zoo at cirdan.cygnus.com) +2002-01-30 Andrew Haley <aph@cambridge.redhat.com> - * Makefile.in (install-no-fixedincludes): install gcc last, so - that rebuilds that might happen during 'make install' don't get - bogus gcc include files + * config/stormy16/stormy16.md (pushqi): New. + (popqi): New. + (pushhi): New. + (pophi): New. + (movhi): Remove stack operands. + (movqi): Likewise. + * config/stormy16/stormy16.h (PREDICATE_CODES): Add + nonimmediate_nonstack_operand. + * config/stormy16/stormy16.c (nonimmediate_nonstack_operand): + New. + * config/stormy16/stormy16-protos.h (nonimmediate_nonstack_operand) + New. -Wed Jun 2 16:14:10 1993 Ken Raeburn (raeburn@cambridge.cygnus.com) +2002-01-31 Jason Merrill <jason@redhat.com> - Change from Utah for HPPA support: - * config.guess: Recognize hppa1.x-hp-bsd. + * Makefile.in (c-parse.c): Handle .output file. + * objc/Make-lang.in (objc-parse.c): Likewise. -Wed Jun 2 11:53:33 1993 Per Bothner (bothner@rtl.cygnus.com) +2002-02-01 Alexandre Oliva <aoliva@redhat.com> - * config.guess: Add support for Motorola Delta 68k, up to r3v7. - Patch from pot@fly.cnuce.cnr.it (Francesco Potorti`). + * config/mips/mips.h (ENDIAN_SPEC): Output the endianness flag if + the -me[lb] option is given. Don't output the default flag + twice. -Tue Jun 1 17:48:42 1993 Rob Savoye (rob at darkstar.cygnus.com) +2002-01-31 Zack Weinberg <zack@codesourcery.com> - * config.sub: Add support for rom68k and bug boot monitors. + * c-lex.c (yyparse): Call debug_hooks->start_source_file for + the primary source file; this has not been done yet. + * c-decl.c (c_expand_body): Reset input_filename from + DECL_SOURCE_FILE (fndecl) before calling init_function_start. -Mon May 31 09:36:37 1993 Jim Kingdon (kingdon@cygnus.com) +2002-01-31 Kazu Hirata <kazu@hxi.com> - * Makefile.in: Make all-opcodes depend on all-bfd. + * rtlanal.c (subreg_regno_offset): Do not use + SUBREG_REGNO_OFFSET. + * system.h: Add SUBREG_REGNO_OFFSET to the GCC poison list. + * doc/tm.texi (SUBREG_REGNO_OFFSET): Remove. -Thu May 27 08:05:31 1993 Ian Lance Taylor (ian@cygnus.com) +2002-01-31 Joseph S. Myers <jsm28@cam.ac.uk> - * config.guess: Added special check for i[34]86-univel-sysv4*. + * gccbug.in: Follow GNU Coding Standards for --version. Use GCC + version rather than GNATS version in --version output. -Wed May 26 16:33:40 1993 Ian Lance Taylor (ian@cygnus.com) +2002-01-31 Richard Sandiford <rsandifo@redhat.com> - * config.guess: For i[34]86-unknown-sysv4 use UNAME_MACHINE for - the processor rather than assuming i486. + * ifcvt.c (noce_process_if_block): Make a copy of the destination + when copying back from a temporary. -Wed May 26 09:40:18 1993 Jim Kingdon (kingdon@lioth.cygnus.com) +2002-01-30 Richard Henderson <rth@redhat.com> - * config.guess: Recognize SunOS6 as Solaris3. + * ifcvt.c (dead_or_predicable): Handling merging when other_bb + and new_dest are the same. -Tue May 25 23:03:11 1993 Per Bothner (bothner@cygnus.com) +2002-01-30 Richard Henderson <rth@redhat.com> - * config.guess: Fix typo. Avoid #elif (not in K&R 1). - Recognize SunOS 5.* only (and not [6-9].*) as being Solaris2. + PR opt/5076 + * rtl.h (NOTE_INSN_LOOP_END_TOP_COND): New. + * rtl.c (note_insn_name): Update. + * emit-rtl.c (remove_unnecessary_notes): Kill it. + * stmt.c (expand_end_loop): Kill jump opt code. Use LOOP_END_TOP_COND + to perform loop rotation. + (expand_exit_loop_top_cond): New. + * tree.h (expand_exit_loop_top_cond): Declare it. + * c-semantics.c (genrtl_while_stmt): Use it. + (genrtl_for_stmt): Likewise. -Tue May 25 12:44:18 1993 Ian Lance Taylor (ian@cygnus.com) +2002-01-30 Alexandre Oliva <aoliva@redhat.com> - * build-all.mk (all-cross): New target for Canadian Cross. - Added Q2 go32 targets. - * test-build.mk: Configure go32 cross sparclite-aout and - mips-idt-ecoff -with-gnu-ld. Moved build binary directory from - PARTIAL_HOLE_DIRS to BUILD_HOLES_DIRS. + * config/mips/mips.h (PARM_BOUNDARY): Guarantee alignment of + arguments to 64-bit boundaries on 64-bit ABIs. -Mon May 24 15:30:06 1993 david d `zoo' zuhn (zoo at cirdan.cygnus.com) +2002-01-30 Steve Ellcey <sje@cup.hp.com> - * configure.in: fix Alpha GDB typo; also, don't build DejaGnu for - GO32 hosted toolchains + * loop.c (loop_invariant_p): Special case pic_offset_table_rtx. -Mon May 24 14:18:41 1993 Rob Savoye (rob at darkstar.cygnus.com) +2002-01-31 Joseph S. Myers <jsm28@cam.ac.uk> - * configure: change so "-exec-prefix" gets passed down rather - than "-exec_prefix" so autoconf generated Makefiles get the - exec_prefix set right. + * c-decl.c (grokdeclarator): Handle type being a typedef for an + invalid type. -Fri May 21 10:42:25 1993 david d `zoo' zuhn (zoo at cirdan.cygnus.com) +2002-01-30 David O'Brien <obrien@FreeBSD.org> - * config.guess: get the Solaris2 minor version number + * config.gcc: Include sparc/biarch64.h rather than sparc/sparc_bi.h. + * config/sparc/sparc_bi.h: Remove file. + * config/sparc/biarch64.h: New file (rename of sparc_bi.h). - * Makefile.in: add standards.texi and make-stds.texi to ETC_SUPPORT +2002-01-30 Richard Henderson <rth@redhat.com> -Fri May 21 06:20:52 1993 Brendan Kehoe (brendan@lisa.cygnus.com) + * sched-deps.c (sched_analyze): Make a call read the frame pointer. - * config.guess: Recognize some Sequent platforms. +2002-01-30 Zack Weinberg <zack@codesourcery.com> -Thu May 20 14:33:48 1993 david d `zoo' zuhn (zoo at cirdan.cygnus.com) + * expmed.c (emit_store_flag): Call protect_from_queue on op0 and op1. - * Makefile.in: added the vault-install target +2002-01-30 Jason Merrill <jason@redhat.com> - * configure.in: actually use the Sun3 makefile fragment that's in - config, also added the release dir to configdirs + * dwarf2out.c (dwarf_cfi_name): Add other DWARF 3 codes. + (output_cfi): Likewise. Disable DW_CFA_GNU_negative_offset_extended. + (reg_save): Use DW_CFA_offset_extended_sf instead. -Thu May 20 14:19:18 1993 Ken Raeburn (raeburn@cambridge.cygnus.com) + * dwarf2out.c (dwarf2out_finish): Don't abort if there were errors. - * Makefile.in (taz): Fix modes on stuff in $(TOOL) dir also. +2002-01-29 Jakub Jelinek <jakub@redhat.com> -Tue May 18 20:26:41 1993 david d `zoo' zuhn (zoo at cirdan.cygnus.com) + * cselib.c (cselib_record_sets): Use IF_THEN_ELSE result + in cselib_lookup. - * configure.in: remove some program from Alpha targetted toolchains +2002-01-29 Aldy Hernandez <aldyh@redhat.com> -Tue May 18 15:23:19 1993 Ken Raeburn (raeburn@cygnus.com) + * rs6000.md ("*call_value_local32"): Remove constraints. + ("*call_value_local64"): Same. + ("*call_value_indirect_nonlocal_aix32"): Same. + ("*call_value_nonlocal_aix32"): Same. + ("*call_value_indirect_nonlocal_aix64"): Same. + ("*call_value_nonlocal_aix64"): Same. + ("*call_value_nonlocal_sysv"): Same. - * Makefile.in (DISTSTUFFDIRS): Renamed from PROTODIRS. Add ld and - gprof. - (taz): Run "make diststuff" in those directories instead of "make - proto-dir". Look for "VERSION=" only at start of line in subdir - Makefile. Use "gzip -9" for compression. - (TEXINFO_SUPPORT, DIST_SUPPORT, BINUTILS_SUPPORT_DIRS): New vars. - (binutils.tar.z): New target. +2002-01-29 Richard Henderson <rth@redhat.com> -Mon May 17 17:01:15 1993 Ken Raeburn (raeburn@deneb.cygnus.com) + * config/alpha/elf.h (SDB_DEBUGGING_INFO): Undef. - * Makefile.in (taz): Include gpl.texinfo. +2002-01-29 Richard Henderson <rth@redhat.com> -Fri May 14 06:48:38 1993 Ken Raeburn (raeburn@deneb.cygnus.com) + * expr.c (force_operand): Ignore flag_pic for detecting pic + address loads. + * regclass.c (init_reg_sets_1): Test fixed_regs not flag_pic + for determining if PIC_OFFSET_TABLE_REGNUM is call-clobbered. + * resource.c (mark_target_live_regs): Use regs_invalidated_by_call + instead of open-coded loop. + * doc/tm.texi (PIC_OFFSET_TABLE_REGNUM): Clarify that it must + be fixed when in use. - * Makefile.in (setup-dirs): Merged into "taz" target. - (taz): Only do `proto-dir' stuff if a directory is actually needed - for this target. +2002-01-29 Richard Henderson <rth@redhat.com> -Wed May 12 13:09:44 1993 Ian Lance Taylor (ian@cygnus.com) + * sched-int.h (struct deps_reg): Add uses_length, clobbers_length. + * sched-rgn.c (propagate_deps): Update them. + * sched-deps.c (sched_analyze_insn): Update them. Flush the + clobbers list when either gets too long. - * Makefile.in (MUNCH_NM): New variable, defined to be $(NM). - (FLAGS_TO_PASS): Pass down MUNCH_NM. - (HOST_CC, HOST_PREFIX, HOST_PREFIX_1): New variables. - (EXTRA_GCC_FLAGS): Pass down HOST_* variables. - (gcc-no-fixedincludes): Correct for current gcc Makefile. +2002-01-29 Jakub Jelinek <jakub@redhat.com> -Tue May 11 10:14:25 1993 Fred Fish (fnf@cygnus.com) + * config/i386/i386.h (LIMIT_RELOAD_CLASS): Handle LEGACY_REGS + and INDEX_REGS the same as GENERAL_REGS. + (SECONDARY_OUTPUT_RELOAD_CLASS): Likewise. - * Makefile.in (make-gdb.tar.Z): Add configure, config.guess, - config.sub, and move-if-change to gdb testsuite distribution - archive, so the testsuite can be extracted, configured, and - run separately from the gdb distribution. Blow away the Chill - tests that require a Chill compiled executable, since GNU Chill - is not yet publically available. +2002-01-29 Neil Booth <neil@daikokuya.demon.co.uk> -Mon May 10 17:22:26 1993 david d `zoo' zuhn (zoo at cirdan.cygnus.com) + * tree.c (build_nonstandard_integer_type): Correct prototype. - * test-build.mk: set environment variables in a single command, - instead of a list of assignments and exports +2002-01-29 Ulrich Weigand <uweigand@de.ibm.com> - * config.guess: recognize Alpha/OSF1 systems + * config/s390/s390.md (movstrsico, movstrdix_64, + movstrsix_31): Remove, replace by ... + (movstrdi_short, movstrsi_short, movstrdi_long, + movstrsi_long): ... these. New. + (movstrdi, movstrsi): Adapt. -Mon May 10 14:55:51 1993 K. Richard Pixley (rich@rtl.cygnus.com) + (rotldi3, rotlsi3, ashldi3, *ashldi3_31, *ashldi3_64, + ashlsi3, lshrdi3, *lshrdi3_31, *lshrdi3_64, lshrsi3): + Remove unnecessary CC clobber. + (*ashrdi3_cc_31, *ashrdi3_cconly_31, *ashrdi3_cc_64, + *ashrdi3_cconly_64, *ashrsi3_cc, *ashrsi3_cconly): New. - * configure: Change help message to prefer --options rather than - -options. + (divmoddi4): Don't partially initialize TImode register. -Mon May 10 05:58:35 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com) +2002-01-29 Geoffrey Keating <geoffk@redhat.com> - * config.sub: Convergent Tech. "miniframe" uses m68010, sez - zippy@ecst.csuchico.edu. - * config.guess: Recognize miniframe. + * doc/sourcebuild.texi (C Tests): Document gcc.dg/debug directory. -Sun May 9 17:47:57 1993 Rob Savoye (rob at darkstar.cygnus.com) +2002-01-29 Richard Henderson <rth@redhat.com> - * Makefile.in: Use srcroot to find runtest rather than rootme. - Pass RUNTESTFLAGS and EXPECT down in BASE_FLAGS_TO_PASS. + * flow.c (print_rtl_and_abort): Remove. + (print_rtl_and_abort_fcn): Remove. + (verify_local_live_at_start): Use dump_bb instead. + (verify_wide_reg): Likewise. Take a basic_block, not rtl endpoints. + (verify_wide_reg_1): Return 2 on mode test failure. -Fri May 7 14:55:59 1993 Ian Lance Taylor (ian@cygnus.com) +2002-01-29 Neil Booth <neil@daikokuya.demon.co.uk> - * test-build.mk: Extensive additions to support building on a - machine other than the host. + PR c/3325, c/3326, c/2511, c/3347 + * c-decl.c (enum_decl_context): Remove BITFIELD. + (grokdeclarator): Take bitfield width as an input. + Ensure bitfields are given the correct type. Perform + bitfield width validation with build_bitfield_integer_type + rather than waiting for finish_struct. + (grok_typename, grok_typename_in_parm_context, start_decl, + push_parmdecl, grokfield, start_function): Update calls to + grokdeclarator. + (build_bitfield_integer_type): New function. + (finish_struct): Move bitfield validation to grokdeclarator + and build_bitfield_integer_type. + * tree.c (build_nonstandard_integer_type): New function. + * tree.h (build_nonstandard_integer_type): New prototype. +objc: + * objc-act.c (objc_copy_list): Remove DECL_INITIAL kludge. -Wed May 5 08:35:04 1993 Ken Raeburn (raeburn@deneb.cygnus.com) +2002-01-29 Jakub Jelinek <jakub@redhat.com> - * configure (tooldir): Fix for i386-aix again. + PR other/1502: + * cppinit.c (cpp_handle_option): Add ignore argument, if it is zero, + don't ignore unrecognized -W* options. + (cpp_handle_options): Pass 1 as last argument to cpp_handle_option. + * cpplib.h (cpp_handle_option): Adjust prototype. + * c-decl.c (c_decode_options): Pass 0 as last argument to + cpp_handle_option. -Mon May 3 19:00:27 1993 Per Bothner (bothner@cygnus.com) + PR c/2896: + * gcc.c (cpp_unique_options): Split from cpp_options. + (cpp_options): Source cpp_unique_options. + (default_compilers): Use cpp_unique_options instead of cpp_options + when used together with cc1_options. + (static_specs): Add cpp_unique_options. + * objc/lang-specs.h: Use cpp_unique_options instead of cpp_options + when used together with cc1_options. - * configure, Makefile.in: Change definition of $(tooldir) - to match the FSF. +2002-01-29 Kazu Hirata <kazu@hxi.com> -Fri Apr 30 15:55:21 1993 Fred Fish (fnf@cygnus.com) + * config/h8300/h8300-protos.h: Update the prototype of + output_a_shift. + * config/h8300/h8300.c (output_a_shift): Remove an unused + argument 'insn'. Remove redundant code. + * config/h8300/h8300.md: Adust to the new prototype of + output_a_shift. - * config.guess: Recognize i[34]86/SVR4. +2002-01-29 Kazu Hirata <kazu@hxi.com> -Fri Apr 30 15:52:46 1993 Steve Chamberlain (sac@thepub.cygnus.com) + * config/h8300/h8300-protos.h: Update the prototypes of + emit_a_rotate and expand_a_rotate. + * config/h8300/h8300.c (emit_a_rotate): Change the type of the + first argument to 'enum rtx_code'. + (expand_a_rotate): Likewise. - * Makefile.in (all-gdb): gdb depends on sim. +2002-01-28 Kazu Hirata <kazu@hxi.com> -Thu Apr 29 23:30:48 1993 Fred Fish (fnf@cygnus.com) + * config/h8300/h8300-protos.h: Update the prototype of + output_simode_bld. + * config/h8300/h8300.c (output_simode_bld): Remove an argumen + 'log2'. + * config/h8300/h8300.md: Adjust to the new prototype. - * Makefile.in (gdb.tar.Z): Make prototype gdb testsuite directory - at the same time we make the prototype gdb directory. - * Makefile.in (make-gdb.tar.Z): Make the testsuite distribution - files at the same time as the gdb base release distribution. +2002-01-28 Kazu Hirata <kazu@hxi.com> -Thu Apr 29 12:50:37 1993 Ian Lance Taylor (ian@cygnus.com) + * conifg/h8300/h8300.c (h8300_adjust_insn_length): Remove + redundant code. - * Makefile.in (check): Use individual check targets rather than - DO_X rule. - (check-gcc): Added. +2002-01-28 John David Anglin <dave@hiauly1.hia.nrc.ca> -Thu Apr 29 09:50:07 1993 Jim Kingdon (kingdon@cygnus.com) + * emit-rtl.c (gen_rtx_REG): Check that the PIC_OFFSET_TABLE_REGNUM + is a fixed register before returning pic_offset_table_rtx. + * loop.c (scan_loop): Don't hoist insns that set pic_offset_table_rtx + when PIC_OFFSET_TABLE_REG_CALL_CLOBBERED is defined. - * config.sub: Use sysv3.2 not sysv32 for canonical OS - for System V release 3.2. +2002-01-28 Jason Merrill <jason@redhat.com> -Thu Apr 29 10:33:22 1993 Ken Raeburn (raeburn@cambridge.cygnus.com) + * dwarf2.h: Sync with src version. - * config.sub: Recognize hppaosf. - * configure.in: Do configure ld/binutils/gas for it. +2002-01-28 Paul Koning <pkoning@equallogic.com> -Tue Apr 27 06:25:34 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com) + * builtin-types.def (BT_FN_VOID_CONST_PTR_VAR): Replace + BT_FN_VOID_PTR_VAR. + * builtins.def (BUILT_IN_PREFETCH): Change first argument to be const. + * doc/extend.texi (__builtin_prefetch): Update documentation: + first argument is now const void ptr. - * configure (tooldir): Alter syntax used to set this, for systems - where "\$" isn't handled right, like i386-aix. +2002-01-28 Kazu Hirata <kazu@hxi.com> -Thu Apr 22 08:17:35 1993 Ian Lance Taylor (ian@cygnus.com) + * config/h8300/h8300-protos.h: Remove an unused prototype. - * configure: Pass program-transform-name, not - program_transform_name, to recursive configures. +2002-01-28 Roman Zippel <zippel@linux-m68k.org> -Thu Apr 22 02:58:21 1993 Ken Raeburn (raeburn@cygnus.com) + * toplev.c (lang_independent_init): Round up identifier size. - * Makefile.in (gas+binutils.tar.z): New rule for building snapshots - of gas+ld+binutils. +2002-01-28 Richard Earnshaw <rearnsha@arm.com> -Mon Apr 19 17:41:30 1993 Per Bothner (bothner@cygnus.com) + * config.gcc: Revert previous change. - * config.guess: Recognize AIX3.2 as distinct from 3.1. +2002-01-28 Andris Pavenis <pavenis@latnet.lv> -Sat Apr 17 17:19:50 1993 david d `zoo' zuhn (zoo at cirdan.cygnus.com) + * config/i386/djgpp.h: Use STRIP_NAME_ENCODING in macro UNIQUE_SECTION - * configure.in: rename m88k-motorola-m88kbcs to m88k-motorola-sysv +2002-01-28 Richard Earnshaw <rearnsha@arm.com> - * config/mh-delta88: remove extraneous GCC references + * config.gcc (*-*-netbsdelf*): Set up generic parameters. + (*-*-netbsd*): Always use collect2. Remove collect2 settings from + other non-elf netbsd config frags. + * config/netbsd-aout.h (STARTFILE_SPEC): Don't pull in c++rt0 since + collect2 will does that. + * config/netbsd.h (LIBGCC_SPEC): Add white space before -lgcc, so that + shared-lib frobbing will work. -Tue Apr 13 16:52:16 1993 Brendan Kehoe (brendan@lisa.cygnus.com) +2002-01-28 Kazu Hirata <kazu@hxi.com> - * Makefile.in (PRMS): Set back to all-prms. + * config/h8300/h8300.h: Fix formatting. + * config/h8300/h8300.md: Likewise. -Sat Apr 10 12:04:07 1993 Ian Lance Taylor (ian@cygnus.com) +2002-01-28 Loren J. Rittle <ljrittle@acm.org> - * test-build.mk: Pass -with-gnu-as for known MIPS native and MIPS - targets, rather than for MIPS hosts. + * fixinc/inclhack.def (strict_ansi_not): Add a bypass based on + the old, removed AAA_standards fix. + * fixinc/fixincl.x: Rebuilt. -Fri Apr 9 13:51:06 1993 david d `zoo' zuhn (zoo at cirdan.cygnus.com) +2002-01-28 Hans-Peter Nilsson <hp@axis.com> - * configure.in: add comment for --with-x default values + * config/cris/cris.h (CRT_CALL_STATIC_FUNCTION): Change to emit + atexit call in crtbegin, hooked in after call to frame_dummy; + register EH before registering __fini__start. - * config.guess: handle Motorola Delta88 box for SVR3 and SVR4. +2002-01-28 Aldy Hernandez <aldyh@redhat.com> - * Makefile.in: add check-* targets for each of the directories in - the tree. Add a definition of RUNTEST that will use the one we - just built, if it exists. Pass this down via FLAGS_TO_PASS. + * config/rs6000/altivec.h: Remove spurious semicolons. -Thu Apr 8 09:21:30 1993 Ian Lance Taylor (ian@cygnus.com) +2002-01-27 Kazu Hirata <kazu@hxi.com> - * configure.in: Removed obsolete references to bfd_target and - target_makefile_frag. + * config/h8300/h8300.md: Replace dead bit extraction patterns + with ones that work. - * build-all.mk: Set assorted targets for Q2. - * config.sub: Recognize z8k-sim and h8300-hms. - * test-build.mk: Really don't pass host to configure. - (HOLES): Added uname. +Sun Jan 27 13:23:40 2002 Richard Kenner <kenner@vlsi1.ultra.nyu.edu> -Wed Apr 7 15:48:19 1993 Ian Lance Taylor (ian@cygnus.com) + * emit-rtl.c (get_mem_attrs): Don't default alignment for non-BLKmode + if not STRICT_ALIGNMENT. + * rtl.h (MEM_ALIGN): Likewise. - * configure: Handle an empty program-prefix, program-suffix or - program-transform-name correctly. +2002-01-27 Craig Rodrigues <rodrigc@gcc.gnu.org> -Tue Apr 6 13:48:41 1993 Ian Lance Taylor (ian@cygnus.com) + * doc/invoke.texi (-fdump-translation-unit): Revert this + patch: 2001-10-21 Craig Rodrigues <rodrigc@gcc.gnu.org> - * build-all.mk: -G 8 no longer required for MIPS targets. - * test-build.mk: Don't pass host argument to configure; make it - guess. +2002-01-27 Kazu Hirata <kazu@hxi.com> -Tue Apr 6 10:36:53 1993 Fred Fish (fnf@cygnus.com) + * config/h8300/h8300.md (define_constants): New. + (anonymous patterns) Use defined constants appropriately. - * Makefile.in (gdb.tar.Z): Fix for building gzip'd distribution. - * Makefile.in (COMPRESS): New macro, like GZIP. +2002-01-27 Kazu Hirata <kazu@hxi.com> -Fri Apr 2 09:02:31 1993 Ian Lance Taylor (ian@cygnus.com) + * config/h8300/h8300.c (function_arg): Remove redundant code. - * test-build.mk: Use -with-gnu-as for mips-sgi-irix4 as well. +2002-01-26 Richard Henderson <rth@redhat.com> - * build-all.mk: Set GCC to gcc -O -G 8 for MIPS targets, since gcc - with gas currently defaults to -G 0. + * sched-deps.c (reg_pending_uses_head): New. + (reg_pending_barrier): Rename from reg_pending_sets_all. + (find_insn_list): Don't mark inline. + (find_insn_mem_list): Remove. + (add_dependence_list, add_dependence_list_and_free): New. + (flush_pending_lists): Replace only_write param with separate + for_read and for_write parameters. Update all callers. Use + add_dependence_list_and_free. + (sched_analyze_1): Do not add reg dependencies here; just set + the pending bits. Use add_dependence_list. + (sched_analyze_2): Likewise. + (sched_analyze_insn): Replace schedule_barrier_found with + reg_pending_barrier. Add all dependencies for pending reg + uses, sets, and clobbers. + (sched_analyze): Don't add reg dependencies for calls, just + set pending bits. Use regs_invalidated_by_call. Treat + sched_before_next_call as a normal list, not a fake insn. + (init_deps): No funny init for sched_before_next_call. + (free_deps): Free pending mems lists. Don't zero reg_last. + (init_deps_global): Init reg_pending_uses. + (finish_deps_global): Free it. + * sched-int.h (deps): Make in_post_call_group_p boolean. Update docs. + (find_insn_mem_list): Remove. + * sched-rgn.c (concat_INSN_LIST, concat_insn_mem_list): New. + (propagate_deps): Use them. Zero temp mem lists. -Thu Apr 1 08:25:42 1993 Ian Lance Taylor (ian@cygnus.com) +2002-01-26 Richard Henderson <rth@redhat.com> - * Makefile.in (all-flex): flex depends on byacc. + * Makefile.in (CRTSTUFF_CFLAGS): New. + (crtbegin.o, crtend.o, crtbeginS.o, crtendS.o, crtbeginT.o): Use it. + * config.gcc (alpha-linux, alpha-freebsd, alpha-netbsd): Use plain + crtstuff.c instead of alpha assembly version. + * crtstuff.c (CRT_CALL_STATIC_FUNCTION): Rewrite to assume the + entire dummy function sequence. Use FORCE_CODE_SECTION_ALIGN + not FORCE_{INIT,FINI}_SECTION_ALIGN. + (__do_global_dtors_aux): Mark used. + (frame_dummy, __do_global_ctors_aux): Mark used. + (fini_dummy, init_dummy): Remove. - * build-all.mk: If host not specified, use config.guess. Pass TAG - to test-build.mk as RELEASE_TAG. - * test-build.mk (configargs): New variable containing arguments to - pass to configure. Set to -with-gnu-as on mips-dec-ultrix. - (FLAGS_TO_PASS): Pass down RELEASE_TAG. + * config/alpha/crtbegin.asm: Remove file. + * config/alpha/crtend.asm: Remove file. + * config/alpha/t-crtbe: Remove file. + * config/alpha/elf.h (CRT_CALL_STATIC_FUNCTION): New. + (LINK_EH_SPEC): New. - * config.guess: Use /bin/uname when checking -X argument on SCO, - to avoid invoking GNU uname which doesn't understand -X. + * config/cris/cris.h (CRT_CALL_STATIC_FUNCTION): Rewrite old + FORCE_INIT_SECTION_ALIGN hack. Register __fini_start before + calling constructors. + * config/cris/linux.h (CRT_CALL_STATIC_FUNCTION): Undef. - * test-build.mk: Don't use /usr/unsupported/bin/as on AIX. + * config/i386/i386.h (CRT_CALL_STATIC_FUNCTION): New. + * config/i386/linux.h (CRT_CALL_STATIC_FUNCTION): Replace old + CRT_END_INIT_DUMMY hack. + * config/i386/sol2.h (FORCE_CODE_SECTION_ALIGN): Replace + FORCE_{INIT,FINI}_SECTION_ALIGN. - * configure.in: Build gas for mips-*-*. + * config/mcore/mcore-elf.h (FORCE_CODE_SECTION_ALIGN): Replace + FORCE_{INIT,FINI}_SECTION_ALIGN. -Wed Mar 31 21:20:58 1993 K. Richard Pixley (rich@rtl.cygnus.com) + * config/s390/s390.h (CRT_CALL_STATIC_FUNCTION): Update for new + invocation sequence. + * config/sh/sh.h (CRT_CALL_STATIC_FUNCTION): Likewise. - * Makefile.in (all.normal): insert missing backslash. + * doc/tm.texi (CRT_CALL_STATIC_FUNCTION): Update. + (FORCE_CODE_SECTION_ALIGN): New. -Wed Mar 31 12:31:56 1993 Ian Lance Taylor (ian@cygnus.com) +2002-01-26 Richard Henderson <rth@redhat.com> - * build-all.mk, config/mh-irix4: Bump -XNh value to 1500 to match - gcc requirements. + * config/cris/cris.c (cris_print_operand): Handle 64-bit CONST_INT. - * Makefile.in: Complete overhaul to merge many almost identical - targets. +2002-01-26 Richard Henderson <rth@redhat.com> -Tue Mar 30 20:17:01 1993 Ken Raeburn (raeburn@cambridge.cygnus.com) + * config/alpha/alpha.c (alpha_sa_mask): Mark RA for unicos here too. + (alpha_sa_size): Use alpha_sa_mask to compute size of saved regs. - * Makefile.in (setup-dirs-gdb): Renamed from setup-dirs. - (gdb.tar.Z): Adjusted. +2002-01-26 Kazu Hirata <kazu@hxi.com> - * Makefile.in (setup-dirs, taz): New targets; should be general - enough to adapt for gdb sometime. Build only .z file. - (gas.tar.z): New target. + * config/h8300/h8300.md: Remove bit extraction patterns that + cannot be triggered. + Restrict each bit extraction pattern to a variant on which the + pattern is tested. -Tue Mar 30 10:03:09 1993 Ian Lance Taylor (ian@cygnus.com) +2002-01-26 Joseph S. Myers <jsm28@cam.ac.uk> - * build-all.mk: Use CC=cc -Xs on Solaris. + * doc/include/texinfo.tex: Update to version 2002-01-04.07. -Mon Mar 29 19:59:26 1993 david d `zoo' zuhn (zoo at cirdan.cygnus.com) +2002-01-26 Kazu Hirata <kazu@hxi.com> - * config/mh-sun3: cc needs -J to compile cp-parse.c correctly + * config/h8300/h8300.md: Remove bit test patterns that cannot + be triggered. + Restrict each bit test pattern to a variant on which the + pattern is tested. - * config/mh-solaris: SunPRO C needs -Xs to be able to get a - working xmakefile for Emacs. +2002-01-26 Kaveh R. Ghazi <ghazi@caip.rutgers.edu> -Thu Mar 25 15:14:30 1993 Fred Fish (fnf@cygnus.com) + * builtins.c (expand_builtin_strncat): Remove redundant check for + INTEGER_CST. - * Makefile.in: Incorporate changes suggested by wilson@cygnus.com - for handling BISON for FSF releases. +2002-01-25 David O'Brien <obrien@FreeBSD.org> -Thu Mar 25 06:19:48 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com) + * config/i386/x86-64.h (DEFAULT_PCC_STRUCT_RETURN): Do not overide + default setting. + * config/i386/freebsd64.h (DEFAULT_PCC_STRUCT_RETURN): Do not override + existing setting. - * configure: Actually implement the change zoo just documented. +2002-01-25 Geoffrey Keating <geoffk@redhat.com> -Wed Mar 24 13:02:44 1993 david d `zoo' zuhn (zoo at poseidon.cygnus.com) + * dbxout.c (dbxout_init): Use assemble_name rather than just + stripping off the first character. + (dbxout_source_file): Likewise. - * configure: when using config.guess, only set target_alias when - it's not already been set (ie, on the command line) +2002-01-25 DJ Delorie <dj@redhat.com> -Mon Mar 22 23:07:39 1993 david d `zoo' zuhn (zoo at cirdan.cygnus.com) + * config/sparc/sparc.c (sparc_emit_set_symbolic_const64): Compare + using rtx_equal_p, not by comparing pointers. - * Makefile.in: add installcheck target, set PRMS to install-prms +2002-01-25 Steve Ellcey <sje@cup.hp.com> -Sun Mar 21 16:46:12 1993 david d `zoo' zuhn (zoo at cirdan.cygnus.com) + * emit-rtl.c (gen_rtx_REG): Always return the same rtx + for PIC_OFFSET_TABLE_REGNUM. + (init_emit_once): Use gen_raw_REG to initialize pic_offset_table_rtx. - * configure: add support for package_makefile_fragment, handle the - case where a directory has a configure.in file but no Makefile.in - more gracefully (with an actual understandable error message, even); - add support for --without (and add this to the usage message); also - explicitly add a --host=${host_alias} to the command line when - config.guess is used +2002-01-25 David O'Brien <obrien@FreeBSD.org> -Sun Mar 21 12:11:58 1993 Jim Wilson (wilson@sphagnum.cygnus.com) + * config.gcc (x86_64-*-freebsd*): New target. + (x86_64-*-netbsd*,x86_64-*-linux*): Use ${tm_file} rather than its + value. + (i[34567]86-*-freebsd*): Don't include svr4.h. + * config/i386/freebsd64.h: New file. - * configure: Must use both --host and --target in recursive calls. +2002-01-25 Douglas B Rupp <rupp@gnat.com> -Thu Mar 18 12:31:35 1993 Ian Lance Taylor (ian@cygnus.com) + * config/alpha/x-vms (version): Make static. - * Makefile.in: Change deja-gnu to dejagnu. + * config/alpha/vms.h (MD_FALLBACK_FRAME_STATE_FOR): Fix error + in previous checkin. -Mon Mar 15 15:44:35 1993 Ian Lance Taylor (ian@cygnus.com) + * Makefile.in (install-headers-cp): New target. + * config.gcc (alpha-dec-*vms*): Install headers with + install-headers-cp - * configure.in (h8300-*-*, h8500-*-*): Don't build libg++. +Fri Jan 25 22:42:49 CET 2002 Jan Hubicka <jh@suse.cz> -Fri Mar 12 18:30:14 1993 david d `zoo' zuhn (zoo at cirdan.cygnus.com) + * unroll.c (unroll_loop): Lower final_value to nonmemory operand; + avoid it's copies. - * configure.in: canonicalize all instances to *-*-solaris2*, - also strip out a number of tools to not build for go32 host +Fri Jan 25 08:26:19 2002 Richard Kenner <kenner@vlsi1.ultra.nyu.edu> -Wed Mar 10 12:08:27 1993 K. Richard Pixley (rich@rtl.cygnus.com) + * builtins.c (expand_builtin_strncpy): Use integer_zerop instead + of compare_tree_int. + (expand_builtin_strncat): Likewise. + * c-decl.c (finish_struct): Use tree_low_cst. + * tree.h (compare_tree_int): Arg is unsigned HOST_WIDE_INT. + * tree.c (compare_tree_int): Likewise. - * config.guess: add GPL. +2002-01-25 Ulrich Weigand <uweigand@de.ibm.com> - * Makefile.in, config.guess, config.sub, configure: bump - copyrights to 93. + * reload1.c (eliminate_regs_in_insn): Recognize frame pointer + adjustments even if they are implemented by more than two insns. -Wed Mar 10 07:12:48 1993 Ian Lance Taylor (ian@cygnus.com) +Fri Jan 25 20:43:56 CET 2002 Jan Hubicka <jh@suse.cz> - * Makefile.in (do-info): Removed obsolete check for existence of - localenv file. + * df.c (df_ref_create, df_ref_record_1, df_ref_record): Kill BB arg. + * df.h (struct ref): Kill B. + (DF_REF_BB, DF_REF_BBNO): Use BLOCK_FOR_INSN. - * Makefile.in (MAKEOVERRIDES): Define to be empty. + * basic-block.h (PROP_EQUAL_NOTES): New flag. + * flow.c (propagate_one_insn): Use it. + (mark_used_regs): Handle NIL. -Wed Mar 10 03:11:56 1993 david d `zoo' zuhn (zoo at cirdan.cygnus.com) +2002-01-25 Geoffrey Keating <geoffk@redhat.com> - * Makefile.in: a couple of 'else true' for decstation, - support for TclX + * config/stormy16/stormy16.md (tablejump_pcrel): Use a MEM + to help folding. - * configure.in: configure tclX too; don't remove Tk on RS/6000 anymore +2002-01-25 David Edelsohn <edelsohn@gnu.org> -Tue Mar 9 16:06:12 1993 K. Richard Pixley (rich@cygnus.com) + * rs6000.md (prefetch): Make address V4SI mode so that the address + is restricted to legitimate form for instruction. - * Makefile.in (setup-dirs): change invocation of make to $(MAKE). +2002-01-25 Bob Wilson <bob.wilson@acm.org> -Mon Mar 8 14:52:11 1993 Ken Raeburn (raeburn@cambridge) + * doc/install.texi (xtensa-*-elf): New target. + (xtensa-*-linux*): New target. + * doc/contrib.texi: Add myself. - * config.guess: Recognize i386-ibm-aix (PS/2). - * configure.in: Use config/mh-aix386 file for it. +2002-01-25 Nick Clifton <nickc@cambridge.redhat.com> -Mon Mar 8 11:12:43 1993 Ian Lance Taylor (ian@cygnus.com) + * config/arm/arm.c (arm_hard_regno_mode_ok): Allow any general + purpose register to hold an SImode (or smaller) value. - * Makefile.in (GCC_FOR_TARGET): Eliminated definition; use - CC_FOR_TARGET instead. - (BASE_FLAGS_TO_PASS): Pass GCC_FOR_TARGET=$(CC_FOR_TARGET). +2002-01-25 Jakub Jelinek <jakub@redhat.com> -Wed Mar 3 16:00:28 1993 Steve Chamberlain (sac@ok.cygnus.com) + * unwind-dw2-fde-glibc.c: If inhibit_libc, use __register_frame* + registry only. + * crtstuff.c: Likewise. - * Makefile.in: Add sim to list of directories sent with gdb +2002-01-25 Kazu Hirata <kazu@hxi.com> -Wed Mar 3 11:42:39 1993 Ken Raeburn (raeburn@cygnus.com) + * config/h8300/h8300.md (negation patterns): Tighten + predicates to register_operand. - * configure.in: Put back mips-dec-bsd* case. +2002-01-24 Aldy Hernandez <aldyh@redhat.com> -Tue Mar 2 21:15:58 1993 Fred Fish (fnf@cygnus.com) + * loop.c (emit_prefetch_instructions): Use the prefetch insn's + mode, not Pmode. - (Ultrix 2.2 support from Michael Rendell <michael@mercury.cs.mun.ca>) - * configure.in (vax-*-ultrix2*): Add Ultrix 2.2 triplet. - * config.guess: Change 'VAX*:ULTRIX:*:*' to 'VAX*:ULTRIX*:*:*'. - * config/mh-vaxult2: New file. + * builtins.c (expand_builtin_prefetch): Same. -Tue Mar 2 18:11:03 1993 david d `zoo' zuhn (zoo at cirdan.cygnus.com) +2002-01-24 Alexandre Oliva <aoliva@redhat.com> - * configure.in: remove no-op mips-dec-bsd* in "case $target" + * config/sh/sh.md (sym_label2reg): Make sure all CONSTs have + modes. - * Makefile.in (dir.info): only run gen-info-dir if it exists, - (install-info): install dir.info only if it exists, - (all-expect, install-expect): pass along X11_FLAGS_TO_PASS +2002-01-24 Kazu Hirata <kazu@hxi.com> -Tue Mar 2 09:01:30 1993 Ken Raeburn (raeburn@cygnus.com) + * config/h8300/h8300.c (print_operand): Remove support for + operand character 'A'. + * config/h8300/h8300.md (three anonymous patterns): Replace + operand character 'A' with either 'T' or 'S'. - * configure.in: For vms target, skip bfd, ld, binutils. Do build - gas for mips-dec-bsd. +2002-01-24 Kazu Hirata <kazu@hxi.com> -Tue Mar 2 08:35:24 1993 Ian Lance Taylor (ian@cygnus.com) + * config/h8300/h8300.c (print_operand): Remove support for + operand character 'U'. - * configure (makesrcdir): If ${srcdir} is relative and not ".", - and ${subdir} is not ".", set makesrcdir based on ${invsubdir}. +2002-01-24 Andris Pavenis <pavenis@latnet.lv> -Tue Feb 23 14:18:28 1993 Mike Werner (mtw@poseidon.cygnus.com) + * config/i386/t-djgpp: Use NATIVE_SYSTEM_HEADER_DIR. - * configure.in: Added "dejagnu" to hosttools list. +2002-01-24 Nick Clifton <nickc@cambridge.redhat.com> -Mon Feb 22 23:28:38 1993 Per Bothner (bothner@rtl.cygnus.com) + * config/arm/arm.c (arm_hard_regno_mode_ok): Allow SImode + values to be assigned to the stack pointer. - * config.sub, configure.in, config.guess: Add support - for Bosx, an AIX variant from Bull. - Patches from F.Pierresteguy@frcl.bull.fr. +2002-01-14 Hartmut Penner <hpenner@de.ibm.com> -Sun Feb 21 11:15:22 1993 Mike Werner (mtw@poseidon.cygnus.com) + * emit_rtl.c (gen_lowpart_common): Conversion from const_int + to const_double needs to be done right for big-endian systems. - * devo/dejagnu: Initial creation of devo/dejagnu. - Migrated dejagnu testcases and support files for testing software - tools to reside as subdirectories, currently called "testsuite", - within the directory of the software tool. Migrated all programs, - support libraries, etc. beloging to dejagnu proper from - devo/deja-gnu to devo/dejagnu. These files were moved "as is" - with no modifications. The changes to these files which will - allow them to configure, build, and execute properly will be made - in a future update. +2002-01-24 Jason Merrill <jason@redhat.com> -Fri Feb 19 20:19:39 1993 Brendan Kehoe (brendan@lisa.cygnus.com) + PR c++/2432 + * config/sparc/sparc.md (call-jump peepholes): Pass the right insn + to can_throw_internal. - * Makefile.in: Change send_pr to send-pr. - * configure.in: Likewise. - * send_pr: Renamed directory to send-pr. +2002-01-23 Richard Henderson <rth@redhat.com> -Fri Feb 19 19:00:13 1993 Per Bothner (bothner@cygnus.com) + * fold-const.c (fold): Change UINT_MAX test to check vs precision + rather than TYPE_MAX_VALUE. Fix indentation and a bogus negation. - * Makefile.in: Add some extra semi-colons (needed if SHELL=bash). +2002-01-24 Alexandre Oliva <aoliva@redhat.com> -Fri Feb 19 00:59:33 1993 John Gilmore (gnu@cygnus.com) + * config/sh/sh.md (symGOT_load, sym2GOT, sym2GOTOFF): New expands. + (symGOT2reg): Use them, then set as GOT value as unchanging. + (symGOTOFF2reg): Set REG_EQUAL note. Use a different pseudo + as a temporary, if possible. + (symPLT_label2reg): Enclose (pc) in UNSPEC_PIC. Emit + sym@PLT-(.LPCS#+2-.) instead of sym@PLT+.-(.LPCS#+2). - * README: Update for gdb-4.8 release. - * Makefile.in (gdb.tar.Z): Add texinfo/tex3patch. Build - gdb-xxx.tar.z (gzip'd) file also. +2002-01-23 Kazu Hirata <kazu@hxi.com> -Thu Feb 18 09:16:17 1993 david d `zoo' zuhn (zoo at cirdan.cygnus.com) + * config/h8300/h8300.md: Fix xorqi and xorqi so that they will + accept to accept 0x80 as operands[2]. - * Makefile.in: make all-diff depend on all-libiberty +2002-01-24 Alexandre Oliva <aoliva@redhat.com> -Tue Feb 16 16:06:31 1993 K. Richard Pixley (rich@cygnus.com) + * config/sparc/sparc.md (fix_trunctfdi2): Correct typo in mode. - * config.guess: add vax-ultrix in the spirit of mips-ultrix. +2002-01-23 Richard Henderson <rth@redhat.com> -Tue Feb 16 05:57:15 1993 david d `zoo' zuhn (zoo at cirdan.cygnus.com) + * config/alpha/alpha.md (call_value_osf_1_er peepholes): Fix typo. - * configure.in, Makefile.in: add hello, tar, gzip, recode, indent +2002-01-23 Aldy Hernandez <aldyh@redhat.com> -Tue Feb 16 00:58:20 1993 John Gilmore (gnu@cygnus.com) + * c-parse.in (parmlist_or_identifiers): Add maybe_attribute. + (parmlist_or_identifiers_1): Verify that only a parmlist follows + an attribute. - * Makefile.in (DEVO_SUPPORT): Remove etc directory - (ETC_SUPPORT): Only add the files GDB wants from etc/. - (gdb.tar.Z): Use ETC_SUPPORT. Use byacc when building the file. +2002-01-23 Richard Henderson <rth@redhat.com> -Thu Feb 11 20:14:28 1993 david d `zoo' zuhn (zoo at cirdan.cygnus.com) + * expr.c (move_by_pieces_1): Extend size before negation. - * Makefile.in: makeinfo binary is in a new location + * config/m68k/t-m68kbare (MULTILIB_OPTIONS): Add 68040 and 68060. + (MULTILIB_MATCHES): Remove 68040 and 68060 aliases. + (MULTILIB_EXCEPTIONS): Ignore 68881 and soft-float for 68040 and 68060. + * config/m68k/t-m68kelf: Likewise. -Tue Feb 9 12:42:27 1993 Ian Lance Taylor (ian@cygnus.com) +2002-01-23 Bob Wilson <bob.wilson@acm.org> - * config.sub: Accept -ecoff as an OS. + * config/xtensa/elf.h: New file. + * config/xtensa/lib1funcs.asm: New file. + * config/xtensa/lib2funcs.S: New file. + * config/xtensa/linux.h: New file. + * config/xtensa/t-xtensa: New file. + * config/xtensa/xtensa-config.h: New file. + * config/xtensa/xtensa-protos.h: New file. + * config/xtensa/xtensa.c: New file. + * config/xtensa/xtensa.h: New file. + * config/xtensa/xtensa.md: New file. + * config.gcc (xtensa-*-elf*): New target. + (xtensa-*-linux*): New target. + * cse.c (canon_hash): Compare rtx pointers instead of register + numbers. This is required for the Xtensa port. + * integrate.c (copy_insn_list): Handle case where the static + chain is in memory and the memory address has to be copied to + a register. + * doc/invoke.texi (Option Summary): Add Xtensa options. + (Xtensa Options): New node. + * doc/md.texi (Machine Constraints): Add Xtensa machine constraints. - * Makefile.in: Various changes to eliminate a level of make - recursion and reduce the required command line length. - (BASE_FLAGS_TO_PASS): New variable holding flags passed to all - sub-makes. - (EXTRA_HOST_FLAGS, EXTRA_TARGET_FLAGS, EXTRA_GCC_FLAGS): New - variables holding settings for specific sub-makes. - (FLAGS_TO_PASS, TARGET_FLAGS_TO_PASS, GCC_FLAGS_TO_PASS): Rewrote - in terms of BASE_FLAGS_TO_PASS. - (TARGET_LIBS): New variable listing directories which use - TARGET_FLAGS_TO_PASS. - (subdir_do): Eliminated. - (do-*): New set of targets to replace subdir_do. - (various): All targets which used subdir_do now depend on do-*. - (local-clean): Renamed from do_clean. - (local-distclean): New target, dependency of distclean and - realclean. - (install-info): Don't create directories. Depend on dir.info - rather than calling make recursively. - (install-dir.info): Eliminated. - (install-info-dirs): Create all info directories here. - (dir.info): Depend upon do-install-info. +2002-01-23 Zack Weinberg <zack@codesourcery.com> - * test-build.mk (HOLES): Added false. + * diagnostic.c (internal_error): Do ICE suppression only + when ENABLE_CHECKING is not defined. -Sat Feb 6 14:05:09 1993 Per Bothner (bothner@rtl.cygnus.com) + * c-typeck.c (require_complete_type): Return error_mark_node + if type is error_mark_node. - * config.guess: Recognize BSDI and BSDJ (Jolitz 386bsd). +2002-01-23 Janis Johnson <janis187@us.ibm.com> -Thu Feb 4 20:49:18 1993 david d `zoo' zuhn (zoo at cirdan.cygnus.com) + * toplev.c (process_options): Disable -fprefetch-loop-arrays with + -Os and issue a warning. - * Makefile.in (info): remove dependency on all-texinfo. The - problem was really in texinfo/C, not at this level. +2002-01-23 Zack Weinberg <zack@codesourcery.com> -Thu Feb 4 13:38:41 1993 Ian Lance Taylor (ian@cygnus.com) + * doc/fragments.texi, doc/hostconfig.texi: Update to reflect + current (lack of) need for host configuration by hand. - * Makefile.in (info): Added dependency on all-texinfo (PR 2112). + * doc/gccint.texi, doc/rtl.texi, doc/tm.texi: Adjust cross + references. Documentation of some target macros moved from + hostconfig.texi to tm.texi. -Thu Feb 4 01:50:53 1993 John Gilmore (gnu@cygnus.com) +2002-01-23 Will Cohen <wcohen@redhat.com> - * Makefile.in (make-gdb.tar.Z): Change BISON to 'bison -y' for - GDB releases. + * config/arm/arm.h (THUMB_FUNCTION_PROFILER): Define if not currently + defined. -Wed Feb 3 17:22:16 1993 Ken Raeburn (raeburn@cambridge.cygnus.com) +2002-01-23 Kazu Hirata <kazu@hxi.com> - * configure: Include srcdir in message about target of link not - being found. Don't convert `-' to `_' in `with' options being - passed to subdirs. + * config/h8300/h8300.md (*andorhi3): Accept 0x8000 as an + operand[3]. -Tue Feb 2 18:57:59 1993 david d `zoo' zuhn (zoo at cirdan.cygnus.com) +2002-01-23 Jason Merrill <jason@redhat.com> - * configure.in: add uudecode to host_tools + * tree.c (build1): Don't set TREE_READONLY on INDIRECT_REF. - * Makefile.in: added {all,install}-uudecode targets, added them to - the appropriate lists + * function.c (assign_parms): Don't put args of inline functions + into registers when not optimizing. -Tue Feb 2 11:45:53 1993 Ian Lance Taylor (ian@cygnus.com) +2002-01-23 Nick Clifton <nickc@cambridge.redhat.com> - * Makefile.in (all-gcc): Added dependency on all-gas. + * config/arm/arm.md (UNSPEC_PROLOGUE_USE): New unspec constant. + (prologue_use): New pattern. + * config/arm/arm.c (expand_prologue): Use gen_prologue_use in + preference to gen_rtx_USE. + (thumb_expand_prologue): Use gen_prologue_use in preference to + gen_rtx_USE. + (thumb_expand_epilogue): Use gen_prologue_use in preference to + gen_rtx_USE. - * configure.in (mips-*-*): Build ld and binutils. +2002-01-23 Hans-Peter Nilsson <hp@bitrange.com> -Mon Feb 1 12:35:41 1993 K. Richard Pixley (rich@rtl.cygnus.com) + * loop.c [!HAVE_prefetch] (CODE_FOR_prefetch): Define to 0. - * configure: check return code from mkdir, print error message and - exit on failure. +2002-01-23 Neil Booth <neil@daikokuya.demon.co.uk> -Sat Jan 30 16:40:28 1993 John Gilmore (gnu@cygnus.com) + PR c/3504 + * doc/extend.texi: Correct documentation of __alignof__. - * Makefile.in (make-gdb.tar.Z): New location for texinfo.tex. +2002-01-22 Zack Weinberg <zack@codesourcery.com> -Thu Jan 28 15:09:59 1993 Ian Lance Taylor (ian@cygnus.com) + * params.h: Rename arguments of DEFPARAM so that it will be + recognized as a translation keyword. - * test-build.mk (HOLES): Added tar, cpio and uudecode. +2002-01-22 Aldy Hernandez <aldyh@redhat.com> -Wed Jan 27 16:50:32 1993 Jim Wilson (wilson@sphagnum.cygnus.com) + * extend.texi: Document altivec functions. + Fix N-bit adjectives in X86 builtin documentation. - * config.sub (h8500): Recognize this as a cpu type. +2002-01-22 Alexandre Oliva <aoliva@redhat.com> -Sat Jan 23 20:32:01 1993 david d `zoo' zuhn (zoo at cirdan.cygnus.com) + * reload.c (reg_overlap_mentioned_for_reload_p): Handle PLUS and + auto_inc_dec values. - * configure: source directory missing is no longer a warning +2002-01-22 Richard Earnshaw <rearnsha@arm.com> - * configure.in: recognize irix[34]* instead of irix[34] + * config/netbsd-aout.h (SWITCH_TAKES_ARG): Remove bogus white space + after backslash. + (ASM_DECLARE_OBJECT_NAME): Add missing backslash before final line. - * Makefile.in: define and pass down X11_LIB +2002-01-22 Alexandre Oliva <aoliva@redhat.com> - * config/mh-sco: define X11_LIB to the mess that SCO ODT requires + * config/i386/freebsd-aout.h (ASM_QUAD): Undefine. -Sat Jan 23 13:49:40 1993 Per Bothner (bothner@cygnus.com) +2002-01-22 Richard Henderson <rth@redhat.com> - * guess-systype: Renamed to ... - * config.guess: ... by popular request. - * configure.in, Makefile.in: Update accordingly. + * config/alpha/alpha.c (split_small_symbolic_mem_operand): Use + copy_insn not copy_rtx. -Thu Jan 21 12:20:55 1993 Per Bothner (bothner@cygnus.com) +2002-01-23 Alan Modra <amodra@bigpond.net.au> - * guess-systype: Patches from John Eaton <jwe@che.utexas.edu>: - + Add Convex, Cray/Unicos, and Encore/Multimax support. - + Execute ./dummy instead of assuming . is in PATH. + * combine.c (simplify_and_const_int): Don't trunc_int_for_mode + "nonzero" as that might add "1" bits. Ensure "constop" is + properly sign extened. + (force_to_mode): Tweak for sign extended constop. -Tue Jan 19 17:18:06 1993 Per Bothner (bothner@cygnus.com) +2002-01-22 Richard Henderson <rth@redhat.com> - * guess-systype: New shell script. Attempts to guess the - canonical host name of the executing host. - Only a few hosts are supported so far. - * configure: Call guess-systype if no host is specified. + * config/alpha/alpha.c (some_small_symbolic_mem_operand) Use + for_each_rtx instead of assuming we're already looking at the MEM. + (split_small_symbolic_mem_operand): Likewise. + * config/alpha/alpha.h (PREDICATE_CODES): Update. + * config/alpha/alpha.md (small symbolic memory splitters): Update. -Tue Jan 19 08:26:07 1993 Ian Lance Taylor (ian@cygnus.com) +2002-01-22 Richard Henderson <rth@redhat.com> - * Makefile.in (gcc-no-fixedincludes): Made to work with current - gcc Makefile. + * config/alpha/alpha.md (divmodsi_internal_er): Generate lituse + sequence number for the literal. + (divmoddi_internal_er): Likewise. +2002-01-22 Craig Rodrigues <rodrigc@gcc.gnu.org> -Fri Jan 15 10:27:02 1993 Ian Lance Taylor (ian@cygnus.com) + PR java/4972 + * aclocal.m4 (AM_ICONV): Put linking flags for libiconv + in LIBICONV variable. + * configure: Regenerated. - * Makefile.in (GCC_FLAGS_TO_PASS): New variable. - (all-gcc, install-gcc, subdir_do): Use it. +2002-01-22 Krister Walfridsson <cato@df.lth.se> -Wed Jan 13 17:06:45 1993 Jim Wilson (wilson@sphagnum.cygnus.com) + * dependence.c (build_def_use): Remove array_idx. - * Makefile.in: Rename uninstalled gcc driver from gcc to xgcc. + * dwarfout.c (last_filename): Remove. + (output_compile_unit_die): Remove last_filename. -Wed Jan 6 20:29:16 1993 Mike Werner (mtw@rtl.cygnus.com) +2002-01-22 Roger Sayle <roger@eyesopen.com> + Richard Henderson <rth@redhat.com> - * Makefile.in: Removed explicit setting of SUBDIRS. SUBDIRS is now - set exclusively by configure, using configure.in . + PR opt/3640 + * fold-const.c (fold): Optimize unsigned comparisons against + UINT_MAX (and similar unsigned constants). -Wed Jan 6 13:44:11 1993 david d `zoo' zuhn (zoo at cirdan.cygnus.com) +2002-01-22 Janis Johnson <janis187@us.ibm.com> - * test-build.mk: set $PATH for all builds + * Makefile.in (loop.o): Depend on OPTABS_H. + * loop.c (emit_prefetch_instructions): Check the prefetch operand + against the predicate. - * Makefile.in: pass TARGET_FLAGS_TO_PASS for xiberty and libm + PR target/5379 + * config/i386/i386.md (prefetch_sse): Specify "p" as a constraint + for the address operand. -Wed Jan 6 11:02:10 1993 Fred Fish (fnf@cygnus.com) +2002-01-22 Richard Henderson <rth@redhat.com> - * Makefile.in (GCC_FOR_TARGET): Supply a default that matches - the one used in gcc/Makefile.in, so that a null expansion doesn't - override the one needed to build gcc with a native cc. + * config/alpha/freebsd.h (FUNCTION_PROFILER): Remove. +2002-01-22 Craig Rodrigues <rodrigc@gcc.gnu.org> -Tue Jan 5 07:55:12 1993 Ken Raeburn (raeburn@cambridge.cygnus.com) + PR other/5450 + * config/i386/sysv4.h (CPP_SPEC): Define, and add CPU + preprocessor flags. - * configure: Accept -with arguments. +2002-01-22 Jason Thorpe <thorpej@wasabisystems.com> -Sun Jan 3 15:15:09 1993 Steve Chamberlain (sac@thepub.cygnus.com) + * config.gcc (x86_64-*-netbsd*): New target. + * config/i386/netbsd64.h: New file. - * Makefile.in: added h8300sim +2002-01-22 Aldy Hernandez <aldyh@redhat.com> -Tue Dec 29 15:06:00 1992 Ian Lance Taylor (ian@cygnus.com) + * regrename.c (kill_value): Fix typo. - * config/mh-sco: Don't override BISON definition. +2002-01-22 Aldy Hernandez <aldyh@redhat.com> - * build-all.mk: If canonhost is i386-unknown-sco3.2v4, change it - to i386-sco3.2v4. Set TARGETS and CFLAGS for i386-sco3.2v4. - (all-cygnus, native, build-cygnus): Make - $(canonhost)-stamp-3stage-done, not $(host).... - * test-build.mk (stamp-3stage-compared): Use tail +10c for - i386-sco3.2v4. Added else true to if command. + * doc/tm.texi: Remove STARTING_FRAME_PHASE. -Mon Dec 28 12:08:56 1992 Ken Raeburn (raeburn@cygnus.com) + * config/rs6000/rs6000.h: Same. - * config.sub: (from FSF) Sequent uses a BSD-like OS. + * function.c (instantiate_virtual_regs): Remove + STARTING_FRAME_PHASE. + (assign_stack_local_1): Same. + Calculate frame phase. + +2002-01-22 Nick Clifton <nickc@redhat.com> + + * config/arm/arm.h (CONDITIONAL_REGISTER_USAGE): Move 'regno' + variable declaration to outer scope in order to simplify + future extensions. + (HARD_REGNO_MODE_OK): Replace macro body with a with a call to + arm_hard_regno_mode_ok. + * config/arm/arm-protos.h: Add a prototype for + arm_hard_regno_mode_ok. + * config/arm/arm.c (soft_df_operand): Remove now redundant + check for DImode values using IP_REGNUM. + (nonimmediate_soft_df_operand): Remove now redundant check for + DImode values using IP_REGNUM. + (arm_hard_regno_mode_ok): New function. New check: make sure + that DImode values are not stored in IP_REGNUM. + + * config/arm/arm.c (arm_expand_prologue): Replace REG_MAYBE_DEAD + note with a USE. + (thumb_expand_prologue): Replace REG_MAYBE_DEAD note with a USE. + +2002-01-22 Jason Merrill <jason@redhat.com> + + * c-semantics.c (genrtl_compound_stmt): Only check nesting + consistency if this COMPOUND_STMT is scoped. + +2002-01-22 Kazu Hirata <kazu@hxi.com> + + * predict.c: Fix formatting. + * print-tree.c: Likewise. + * protoize.c: Likewise. + * real.h: Likewise. + * rtl.h: Likewise. + * sbitmap.h: Likewise. + * scan.c: Likewise. + * sched-deps.c: Likewise. + * sched-vis.c: Likewise. + * sdbout.c: Likewise. + * sibcall.c: Likewise. + * ssa.c: Likewise. + * ssa-ccp.c: Likewise. + * ssa-dce.c: Likewise. + * stmt.c: Likewise. + * stor-layout.c: Likewise. + * system.h: Likewise. + +Tue Jan 22 06:26:33 2002 Richard Kenner <kenner@vlsi1.ultra.nyu.edu> + + * tree.c (int_fits_type_p): If bounds of a subtype are variable, see + if fits in bounds of base type. + + * dwarf2out.c (equate_decl_number_to_die): Add "int" to decls. + (loc_descriptor_from_tree, case CALL_EXPR, case ADDR_EXPR): New. + (add_bound_info, default): If can't find a context, make a + SAVE_EXPR. + (dwarf2out_finish): Check for SAVE_EXPR in node->created_for. + +2002-01-22 Hans-Peter Nilsson <hp@axis.com> + + * c-typeck.c (parser_build_binary_op): If result from + build_binary_op is ERROR_MARK just return error_mark_node without + further processing. + +2002-01-21 Jason Thorpe <thorpej@wasabisystems.com> + + * config/netbsd.h (TARGET_HAS_F_SETLKW): define. + Split a.out-specific bits into... + * config/netbsd-aout.h: ...this. + * config/netbsd-elf.h: New file. + * config/alpha/netbsd-elf.h: Remove. + * config/alpha/netbsd.h: Rewrite for a NetBSD/alpha ELF target. + * config/i386/netbsd-elf.h (LIB_SPEC): Remove. + (STARTFILE_SPEC): Remove redundant definition. + (ENDFILE_SPEC): Likewise. + (LINK_SPEC): Likewise. + (CPP_SPEC): Likewise. + (ASM_SPEC): Likewise. + (LIB_SPEC): Likewise. + (SWITCH_TAKES_ARG): Likewise. + (TARGET_MEM_FUNCTIONS): Likewise. + (CPP_PREDEFINES): Redefine. + (ASM_FINAL_SPEC): Remove redefinition. + (ASM_COMMENT_START): Redefine. + (FUNCTION_PROFILER): Define. + (TARGET_VERSION): Redefine. + Comment and formatting cleanup. + * config/i386/netbsd.h: Include <netbsd-aout.h>. + * config/m68k/netbsd.h: Include <netbsd-aout.h>. + * config/mips/netbsd.h: Rewrite for NetBSD/mips ELF target, + big- or little-endian. + * config/ns32k/netbsd.h: Include <netbsd-aout.h>. + * config.gcc (*-*-netbsd*): Add definitions common to all + NetBSD configs. + (alpha*-*-netbsd*): Remove redundant xm_defines, gas, and + gnu_ld definitions. Add netbsd-elf.h to and remove + alpha/netbsd-elf.h from tm_file. Remove alpha/t-crtfm from + tmake_file, and don't lose previous tmake_file contents. + (arm*-*-netbsd*): Add netbsd-aout.h to tm_file. + (i[34567]86-*-netbsdelf*): Remove redundant xm_defines, gas, and + gnu_ld definitions. Add netbsd-elf.h to tm_file. + (mips-dec-netbsd*): Remove as alias for mipsel-*-netbsd*. + (mipsel-*-netbsd*): Rename this to... + (mips*-*-netbsd*): ...this. Add elfos.h to tm_file. Add + mips/little.h to tm_file for mips*el-*. + (powerpc-*-netbsd*): Remove redundant xm_defines definition. + (sparc-*-netbsd*): Add netbsd-aout.h to tm_file. + (vax-*-netbsd*): Add netbsd-aout.h to tm_file. + +2002-01-21 John David Anglin <dave@hiauly1.hia.nrc.ca> + + * pa-protos.h (reg_before_reload_operand): New function prototype. + * pa.c (reg_before_reload_operand): New function implementation. + * pa.md (decrement_and_branch_until_zero, movb): Use it. Change "!*m" + contraints to "*m". + +2002-01-21 Franz Sirl <Franz.Sirl-kernel@lauterbach.com> + + * combine.c (simplify_and_const_int): Properly sign-extend CONSTOP. + +2002-01-21 John David Anglin <dave@hiauly1.hia.nrc.ca> + + * pa64-hpux.h (MD_EXEC_PREFIX): Set to "/usr/ccs/bin". + (MD_STARTFILE_PREFIX): Set to "/usr/ccs/lib/pa20_64/". + (MD_STARTFILE_PREFIX_1): Set to "/opt/langtools/lib/pa20_64/". + (EH_FRAME_IN_DATA_SECTION): Define and update comment on init sections. + (ENDFILE_SPEC): Undefine. + (STARTFILE_SPEC): Redefine for PA. + +2002-01-21 Franz Sirl <Franz.Sirl-kernel@lauterbach.com> + + * config/rs6000/t-ppccomm (CRTSTUFF_T_CFLAGS_S): Re-add -fPIC. + +2002-01-21 Daniel Jacobowitz <drow@mvista.com> + + * config.gcc: Add entries to supported PowerPC --with-cpu + types. + +2002-01-21 Jakub Jelinek <jakub@redhat.com> + + * config/i386/i386.c (ix86_function_arg_regno_p): Never return + true for 64-bit mode only SSE registers in 32-bit mode. + +2002-01-21 Kazu Hirata <kazu@hxi.com> + + * unwind-dw2.c: Fix formatting. + * unwind-dw2-fde.c: Likewise. + * unwind-dw2-fde.h: Likewise. + * unwind-pe.h: Likewise. + * varasm.c: Likewise. + * varray.h: Likewise. -Mon Dec 28 08:32:06 1992 Minh Tran-Le (mtranle@paris.intellicorp.com) +2002-01-21 Hans-Peter Nilsson <hp@bitrange.com> - * configure.in (i[34]86-*-isc*): added; uses mh-sysv. + Remove workaround for register stack overwrite bug in mmix. + * config/mmix/mmix.c (mmix_target_asm_function_prologue): Remove + support for TARGET_REG_STACK_FILL_BUG. + * config/mmix/mmix.h: Remove member has_call_without_parameters. + (TARGET_MASK_REG_STACK_FILL_BUG, TARGET_REG_STACK_FILL_BUG): + Delete. + (TARGET_DEFAULT): Remove TARGET_MASK_REG_STACK_FILL_BUG. + (TARGET_SWITCHES): Remove -mreg-stack-fill-bug-workaround and + -mno-reg-stack-fill-bug-workaround. + * config/mmix/mmix.md ("call", "call_value"): Don't set struct + machine member has_call_without_parameters. + * doc/invoke.texi (Option Summary) <MMIX Options>: Remove + -mreg-stack-fill-bug-workaround and + -mno-reg-stack-fill-bug-workaround. + (MMIX Options): Ditto. -Thu Dec 24 17:26:24 1992 david d `zoo' zuhn (zoo at cirdan.cygnus.com) +2002-01-21 Kazu Hirata <kazu@hxi.com> - * configure.in: don't remove binutils from Solaris builds + * config/h8300/h8300.c (function_arg): Replace 0 with NULL_RTX + as appropriate. + Remove redundant code. -Thu Dec 24 14:08:38 1992 david d`zoo' zuhn (zoo@cygnus.com) +2002-01-21 Joseph S. Myers <jsm28@cam.ac.uk> - * Makefile.in: get rid of earlier definitions for *clean, - also handle the recursive info rule better + * config/alpha/alpha.h, config/arc/arc.h, config/avr/avr.h, + config/c4x/c4x.h, config/d30v/d30v.h, config/dsp16xx/dsp16xx.h, + config/fr30/fr30.h, config/ia64/ia64.h, config/m68hc11/m68hc11.h, + config/mips/mips.h, config/rs6000/rs6000.h, config/sparc/sparc.h, + config/stormy16/stormy16.h, config/v850/v850.h: Remove commented + out target macro definitions and non-target-specific comments + mostly taken from old versions of the manual. -Thu Dec 24 12:40:21 1992 Per Bothner (bothner@rtl.cygnus.com) +2002-01-20 Kazu Hirata <kazu@hxi.com> - * Makefile.in (mostlyclean, distclean, realclean): Fix to - do more-or-less the right thing. + * config/h8300/h8300.h: Fix comment formatting. + * config/ia64/aix.h: Likewise. + * config/ia64/ia64-protos.h: Likewise. + * config/ia64/ia64.c: Likewise. + * config/ia64/ia64.h: Likewise. + * config/ia64/ia64intrin.h: Likewise. + * config/ia64/linux.h: Likewise. + * config/ia64/unwind-aix.c: Likewise. + * config/ia64/unwind-ia64.c: Likewise. -Wed Dec 16 10:25:31 1992 Ian Lance Taylor (ian@cygnus.com) +2002-01-20 Kazu Hirata <kazu@hxi.com> - * Makefile.in: Add lines defining CC and CXX, and use CXX rather - than gcc in definitions of CXX_FOR_BUILD and CXX_FOR_TARGET. + * config/h8300/h8300.c: Revise comments about shift code. -Tue Dec 15 00:34:32 1992 david d `zoo' zuhn (zoo at cirdan.cygnus.com) +2002-01-20 Kazu Hirata <kazu@hxi.com> - * Makefile.in: change all $(host_cpu)-$(host_vendor)-$(host_os) to - $(host_canonical). + * config/h8300/h8300.c (function_arg): Update a comment. - * configure.in: split the configdirs list into 4 categories (native - v. cross, library v. tool) and handle the cross-only and native- - only in more reasonable (and correct!) way. +2002-01-20 Kazu Hirata <kazu@hxi.com> -Mon Dec 14 17:04:22 1992 Stu Grossman (grossman at cygnus.com) + * config/h8300/h8300.md: Update the comments at the beginning + of the file. - * configure.in (hppa*-*-*): Don't remove bfd and gdb from - configdirs anymore. +2002-01-20 Kazu Hirata <kazu@hxi.com> -Sun Dec 13 00:37:26 1992 david d `zoo' zuhn (zoo at cirdan.cygnus.com) + * config/i370/i370.c: Fix comment formatting. + * config/i370/i370.h: Likewise. + * config/i370/i370.md: Likewise. + * config/i370/linux.h: Likewise. - * Makefile.in: extensive cleanup:: removed all of the explicit - clean-* targets, collapsed many wrappers around subdir_do into - one, added additional targets to satisfy standards.texi, deleted - some old targets, some changes for consistency +Sun Jan 20 18:40:14 2002 Richard Kenner <kenner@vlsi1.ultra.nyu.edu> -Fri Dec 11 20:18:02 1992 david d `zoo' zuhn (zoo at cirdan.cygnus.com) + * reg-stack.c (subst_stack_regs): Properly check for deleted insn. - * configure.in: handle some programs as cross-only, and others as - native only + * dwarf2out.c (loc_descriptor_from_tree): Add TRUTH_*_EXPR cases. + (gen_struct_or_union_type_die): Don't SIGSEGV if no TYPE_STUB_DECL + in incomplete case. - * test-build.mk: handle partial holes in a more generic manner +2002-01-20 Graham Stott <grahams@redhat.com> - * Makefile.in: m4 depends on libiberty + * cfgloop.c (flow_loop_preheader_scan): Fix typo. -Mon Dec 7 06:43:27 1992 david d `zoo' zuhn (zoo at cirdan.cygnus.com) +2002-01-19 John David Anglin <dave@hiauly1.hia.nrc.ca> - * config/mh-sco: don't default $(CC) to gcc + * config.gcc (hppa*64*-*-hpux11*): Fix tmake_file. -Thu Dec 3 21:52:11 1992 david d `zoo' zuhn (zoo at cirdan.cygnus.com) +2002-01-19 Tom Rix <trix@redhat.com> - * configure.in: add m4, textutils, fileutils, sed, shellutils, - time, wdiff, and find to configdirs + * config/rs6000/rs6000.md: Fix DF split for 64 bit hosts. - * Makefile.in: all, clean, and install rules for the new programs - added to configure.in +2002-01-18 Aldy Hernandez <aldyh@redhat.com> -Mon Nov 30 14:54:34 1992 david d `zoo' zuhn (zoo at cirdan.cygnus.com) + * doc/tm.texi (STARTING_FRAME_PHASE): Document. - * configure.in: use mh-sun for all *-sun-* hosts + * function.c (assign_stack_local_1): Adjust x_frame_offset with + STARTING_FRAME_PHASE. + (STARTING_FRAME_PHASE): New. + (instantiate_virtual_regs): Check saneness of + STARTING_FRAME_PHASE. - * config/mh-solaris: rework standard X location to use - $OPENWINHOME, if defined. + * config/rs6000/rs6000.h (STARTING_FRAME_PHASE): New. - * config/mh-sun: handle X11 include locations +2002-01-19 Alexandre Oliva <aoliva@redhat.com> - * config/mh-decstation: define NeedFunctionPrototypes to 0, to - work around dain-bramaged DECwindows include files + * config/sh/sh.md (movdf_i4 split): Fix alter_subreg calls. -Fri Nov 27 18:35:54 1992 david d `zoo' zuhn (zoo at cirdan.cygnus.com) +2002-01-18 Craig Rodrigues <rodrigc@gcc.gnu.org> - * Makefile.in: define flags for X11 include files and library file - locations, pass them down to the programs that need this info + * doc/install.texi (hppa*-hp-hpux11): Clarify that GCC 2.95.x cannot + be used for bootstrapping GCC 3.0. - * build-all.mk: added a 'native' target, to 3stage the native toolchain +2002-01-18 Kazu Hirata <kazu@hxi.com> - * config/{mh-hpux,mh-solaris}: define the "standard" locations for - the vendor supplied X11 headers and libraries + * config/h8300/h8300.md: Fix an insn length. -Sun Nov 22 18:59:13 1992 david d `zoo' zuhn (zoo at cirdan.cygnus.com) +2002-01-18 Kazu Hirata <kazu@hxi.com> - * configure.in: start building libg++ for HP-UX targets + * bitmap.h: Fix comment formatting. + * combine.c: Likewise. + * cppfiles.c: Likewise. + * c-pragma.h: Likewise. + * c-typeck.c: Likewise. + * df.c: Likewise. + * dwarf2out.c: Likewise. + * function.c: Likewise. + * gcc.c: Likewise. + * genattrtab.c: Likewise. + * gthr-win32.h: Likewise. + * haifa-sched.c: Likewise. + * predict.c: Likewise. + * rtlanal.c: Likewise. + * rtl.h: Likewise. + * unwind-dw2-fde.h: Likewise. + * unwind-pe.h: Likewise. + * vmsdbgout.c: Likewise. -Wed Nov 18 19:33:11 1992 John Gilmore (gnu@cygnus.com) +Thu Jan 17 15:28:26 2002 Richard Kenner <kenner@vlsi1.ultra.nyu.edu> - * README: Update references to files moved into etc/. + * attribs.c (decl_attributes): Clear ATTR_FLAG_TYPE_IN_PLACE + if type_required and passed decl. -Sun Nov 15 09:36:08 1992 Fred Fish (fnf@cygnus.com) +2002-01-17 Aldy Hernandez <aldyh@redhat.com> - * config.sub (i386sol2, i486sol2): i[34]86-unknown-solaris2. - * configure.in (i[34]86-*-solaris2*): Use config/mh-sysv4. + * config.gcc (cpu_type): Include altivec.h in powerpc + extra_headers. + Same for darwin. -Thu Nov 12 08:50:42 1992 Ian Lance Taylor (ian@cygnus.com) + * config/rs6000/altivec.h: New. - * configure: accept dash as well as underscore in long option - names for FSF compatibility. +2002-01-17 David Edelsohn <edelsohn@gnu.org> -Wed Nov 11 08:04:37 1992 Ian Lance Taylor (ian@cygnus.com) + * doc/install.texi (*-ibm-aix*): Update assembler and exception + handling information. + * doc/trouble.texi (Interoperation): Add libstdc++ information + for AIX. + (Misunderstandings): Add template instantiation and static template + member information for AIX. - * config.sub: added -sco3.2v4 support from FSF. +2002-01-17 Jason Merrill <jason@redhat.com> -Sun Nov 8 21:14:30 1992 david d `zoo' zuhn (zoo at cirdan.cygnus.com) + * dbxout.c (dbxout_type): Support const and volatile. - * configure.in: expand the section that adds or removes - directories from the list of programs to build, to handle native - vs. cross in addition to host v. native + * except.c (add_partial_entry): Remove backwards compatibility code. + (end_protect_partials): Likewise. -Sat Nov 7 18:52:27 1992 Per Bothner (bothner@rtl.cygnus.com) +2002-01-17 Jakub Jelinek <jakub@redhat.com> - * Makefile.in: Replace C++ in macro names with CXX. - This is less likely to break ... + * config/ia64/ia64.md (prologue_use): New. + * config/ia64/ia64.c (ia64_expand_prologue): Use + gen_prologue_use instead of gen_rtx_USE. + (group_barrier_needed_p): Handle CODE_FOR_prologue_use the same way + as CODE_FOR_pred_rel_mutex. + (ia64_sched_reorder2): Likewise. -Sat Nov 7 15:16:58 1992 david d `zoo' zuhn (zoo at cirdan.cygnus.com) +2002-01-16 Eric Christopher <echristo@redhat.com> - * test-build.mk: add -w to GNU_MAKE + * config/mips/r3900.h: Reformat. + (SUBTARGET_CPP_SIZE_SPEC): Remove. + * config/mips/isa3264.h (SUBTARGET_CPP_SIZE_SPEC): Ditto. + * config/mips/mips.h (ABI_GAS_ASM_SPEC): Default to "". + (SUBTARGET_CPP_SIZE_SPEC): Rewrite. + * config/mips/t-elf: Remove mips3 multilib. -Fri Nov 6 23:10:37 1992 david d `zoo' zuhn (zoo at cirdan.cygnus.com) +2002-01-16 H.J. Lu <hjl@gnu.org> - * config.sub: remove 'sparc'-->'sparc-sun' default transformation, - add 'sparc' to list of recognized cpus. This needed to make - 'sparc-aout' expand to 'sparc-unknown-aout' instead of 'sparc-sun-aout'. - Delete some redundant ose68 variants. Recognize -wrs as an os, - then changes that into $CPU-wrs-vxworks. + * config/mips/linux.h: Include "mips/abi64.h". - * configure.in: remove most references to gdbtest, regularize - target based program removal +2002-01-16 H.J. Lu <hjl@gnu.org> - * test-build.mk: import from p3 tree (many fixes and changes) + * config/mips/t-linux: New. -Fri Nov 6 20:59:00 1992 david d `zoo' zuhn (zoo@cygnus.com) + * config.gcc: Add mips/t-linux to tmake_file for mips*-*-linux*. - * Makefile.in: added rules to handle tcl, tk, and expect + * config/mips/linux.h: Don't include "gofast.h". + (INIT_SUBTARGET_OPTABS): Removed. - * configure.in: handle those directories if they exist +2002-01-16 Kazu Hirata <kazu@hxi.com> -Thu Nov 5 14:35:41 1992 david d `zoo' zuhn (zoo at cirdan.cygnus.com) + * config/h8300/h8300-protos.h: Replace emit_a_shift with + output_a_shift. + * config/h8300/h8300.c: Likewise. + * config/h8300/h8300.md: Likewise. - * config.sub: removed bogus hppabsd and hppahpux names, since - "hppa" is not a valid cpu (hppa1.1 or hppa1.0 are, though) +2002-01-16 Kazu Hirata <kazu@hxi.com> -Thu Oct 29 00:12:41 1992 david d `zoo' zuhn (zoo at cirdan.cygnus.com) + * config/h8300/h8300.md (pushqi1_h8300): Use a tab instead of + spaces after an opcode name. + (pushqi1_h8300hs): Likewise. + (pushhi1_h8300hs): Likewise. - * Makefile.in: all-gcc now depends on all-binutils. all-libg++ - depends upon all-xiberty +2002-01-16 Kazu Hirata <kazu@hxi.com> - * Makefile.in: changes from p3, including: + * doc/extend.texi: Replace "option" with "attribute" + appropriately. - Thu Oct 8 15:00:17 1992 Ian Lance Taylor (ian@cygnus.com) +2002-01-16 Jakub Jelinek <jakub@redhat.com> - * Makefile.in (XTRAFLAGS): include newlib directories if - newlib/Makefile exists, rather than if host != target. + * config/alpha/alpha.c (some_small_symbolic_mem_operand): Look into + (and:DI () (const_int -8)). + (split_small_symbolic_mem_operand): Split + (mem (and:DI () (const_int -8)). - Fri Sep 25 13:41:52 1992 Ian Lance Taylor (ian@cygnus.com) +2002-01-16 Jakub Jelinek <jakub@redhat.com> - * Makefile.in: added -nostdinc to XTRAFLAGS if we are using gcc - from the same source tree and not building a cross-compiler. This - matters for the libg++ configuration if reconfiguring a tree that - has already been installed. + PR target/5309: + * config/sparc/sparc.c (ultrasparc_adjust_cost): Handle TYPE_IDIV the + same way as TYPE_IMUL. + (ultrasparc_sched_reorder): Likewise. + * config/sparc/sparc.md (type): Add comment to update + ultrasparc_sched_reorder when making changes. - Thu Sep 10 10:35:51 1992 Ian Lance Taylor (ian@cygnus.com) +2002-01-16 Kazu Hirata <kazu@hxi.com> - * Makefile.in: added -I for newlib/targ-include to XTRAFLAGS, to - pick up the machine and system specific header files. + * doc/invoke.texi: Change the dump file name of block + reordering pass from 28.bbro to 29.bbro. + Mention -dk option. + +Wed Jan 16 17:54:22 CET 2002 Jan Hubicka <jh@suse.cz> + + * i386.md (minsf splitter): Fix pasto. + +2002-01-16 Nick Clifton <nickc@cambridge.redhat.com> + + * config/arm/arm.c (arm_expand_prologue): Add REG_MAYBE_DEAD note + to frame pointer initialisation instruction. + (thumb_expand_prologue): Add REG_MAYBE_DEAD note to frame pointer + initialisation instruction. + (soft_df_operand): Do not accept the IP register. + (nonimmediate_soft_df_operand): Do not accept the IP register. + +2002-01-16 Jakub Jelinek <jakub@redhat.com> + + PR target/5357: + * config/sparc/sparc.c (sparc_override_options): Avoid MASK_V9 and + MASK_V8 being both set. + +2002-01-16 Ulrich Weigand <uweigand@de.ibm.com> - * Makefile.in: added AS_FOR_TARGET, passed down in - TARGET_FLAGS_TO_PASS. Added CC_FOR_BUILD, which is intended to be - the C compiler to use to create programs which are run in the - build environment, set it to default to $(CC), and passed it down - in FLAGS_TO_PASS and TARGET_FLAGS_TO_PASS. + * config/s390/s390.c (s390_emit_prologue): Do not emit USE + insn for GOT register; add REG_MAYBE_DEAD notes instead. + config/s390/s390.md (call, call_value): Add GOT register to + CALL_INSN_FUNCTION_USAGE where needed. + (call_exp, call_value_exp): New. + +2002-01-16 Nick Clifton <nickc@cambridge.redhat.com> + + * config/arm/arm.c: General formatting tidy up. + +2002-01-16 Graham Stott <grahams@redhat.com> + + * calls.c (try_to_integrate): Use "(size_t)" intermediate + cast and when casting an integer literal to "rtx" pointer. + (expand_call): Likewise. + * flow.c (try_pre_increment): Likewise. + (find_use_as_address): Likewise. + * integrate.c (expand_iline_function): Likewise. + * regmove.c (try_auto_increment): Likewise. + +2002-01-16 Graham Stott <grahams@redhat.com> + + * sched-rgn.c (passed): Use sbitmap_free. + (header): Likewise. + (inner): Likewise. + (in_queue): Likewise. + (in_stack): Likewise. + +2002-01-15 Eric Christopher <echristo@redhat.com> + + * flow.c (propagate_one_insn): Change to use fatal_insn. + +2002-01-15 Kazu Hirata <kazu@hxi.com> + + * expmed.c (extract_fixed_bit_field): Remove unused code. + * system.h: Poison SLOW_ZERO_EXTEND. + * doc/tm.texi: Remove. + * config/1750a/1750a.h (SLOW_ZERO_EXTEND): Remove. + * config/arm/arm.h: Likewise. + * config/avr/avr.h: Likewise. + * config/clipper/clipper.h: Likewise. + * config/convex/convex.h: Likewise. + * config/d30v/d30v.h: Likewise. + * config/dsp16xx/dsp16xx.h: Likewise. + * config/elxsi/elxsi.h: Likewise. + * config/fr30/fr30.h: Likewise. + * config/h8300/h8300.h: Likewise. + * config/i370/i370.h: Likewise. + * config/i386/i386.h: Likewise. + * config/m68k/m68k.h: Likewise. + * config/mips/mips.h: Likewise. + * config/ns32k/ns32k.h: Likewise. + * config/pdp11/pdp11.h: Likewise. + * config/pj/pj.h: Likewise. + * config/s390/s390.h: Likewise. + * config/sh/sh.h: Likewise. + * config/stormy16/stormy16.h: Likewise. + * config/v850/v850.h: Likewise. + * config/vax/vax.h: Likewise. + * config/we32k/we32k.h: Likewise. - Mon Sep 7 22:34:42 1992 Ian Lance Taylor (ian@cirdan.cygnus.com) +2002-01-15 Aldy Hernandez <aldyh@redhat.com> - * Makefile.in: add $(host) = $(target) tests back to *_FOR_TARGET. - We need them for unusual native builds, like systems without - ranlib. + * config/rs6000/rs6000.md (altivec_stvx): Add parallels to stvx. + (altivec_lvsl): Change constraint to b. + (altivec_lvsr): Same. + (altivec_lvebx): Same. + (altivec_lvehx): Same. + (altivec_lvewx): Same. + (altivec_lvxl): Same. + (altivec_lvx): Same. + (altivec_stvx): Add parallel. + (altivec_stvxl): Same. + (altivec_stvehx): Same. + (altivec_stvebx): Same. + (altivec_stvebx): Same. - * configure: also define $(host_canonical) and - $(target_canonical), which are the full, canonical names for the - given host and target +2002-01-15 Aldy Hernandez <aldyh@redhat.com> -Sun Nov 1 16:38:17 1992 Per Bothner (bothner@cygnus.com) + * config.gcc: Change altivec.h to altivec-defs.h. - * Makefile.in: Added separate definitions for C++. + * config/rs6000/altivec.h: Delete. -Fri Oct 30 11:37:52 1992 Fred Fish (fnf@cygnus.com) + * config/rs6000/altivec-defs.h: Add. - * configure.in (configdirs): Add deja-gnu. +2002-01-15 John David Anglin <dave@hiauly1.hia.nrc.ca> -Fri Oct 23 00:39:18 1992 John Gilmore (gnu@cygnus.com) + * vax.c (vax_rtx_cost): Return MAX_COST for unsupported MULT, UDIV + and UMOD modes. - * README: Update for configure.texi and gdb-4.7 release. + * vax.h (INDEX_TERM_P): Restrict indexing to modes which have a size + less than or equal to eight bytes. -Wed Oct 21 21:54:27 1992 John Gilmore (gnu@cygnus.com) + * vax.md (andsi3): Remove constraints and change SET destination + operand type to nonimmediate_operand. + (andhi3, andqi3): Likewise. Don't clear high order bits of operand 1 + when it is a CONST_INT. - * Makefile.in: Move "all" target to top of file. - Previously, first target was ".PHONY" which caused BSD4.4 make - to build .PHONY when make was run without arguments. +2002-01-15 Jason Merrill <jason@redhat.com> -Mon Oct 19 01:17:54 1992 John Gilmore (gnu@cygnus.com) + * c-common.def (FILE_STMT): New code. + * c-common.c (statement_code_p): It's a statement. + * c-common.h (stmt_tree_s): Add x_last_filename. + (FILE_STMT_FILENAME_NODE, FILE_STMT_FILENAME): New macros. + (last_expr_filename): New macro. + * c-semantics.c (begin_stmt_tree): Initialize it. + (add_stmt): If the filename changed, also insert a + FILE_STMT. + (expand_stmt): Handle seeing one. - * Makefile.in: Add COPYING.LIB to GDB releases, now that there's - Library-copylefted code in libiberty. +2002-01-15 Eric Christopher <echristo@redhat.com> -Tue Oct 13 01:22:32 1992 John Gilmore (gnu@cygnus.com) + * flow.c (propagate_one_insn): Add error message and print out + insn for debugging. - * config.sub: Replace m68kmote with plain old m68k. +2002-01-15 Joseph S. Myers <jsm28@cam.ac.uk> -Fri Oct 9 03:14:24 1992 John Gilmore (gnu@cygnus.com) + * system.h (ASM_IDENTIFY_GCC, STDC_VALUE, TRAMPOLINE_ALIGN, + ASM_IDENTIFY_GCC_AFTER_SOURCE): Poison. + * config/pdp11/pdp11.h (TRAMPOLINE_ALIGN): Rename to + TRAMPOLINE_ALIGNMENT. + * config/arm/arm.h, config/mcore/mcore.h: Likewise. Change value + to be in bits. + * config/i386/cygwin.h (PCC_BITFIELDS_TYPE_MATTERS): Rename to + PCC_BITFIELD_TYPE_MATTERS. + * config/interix.h (STDC_VALUE): Remove. Use + STDC_0_IN_SYSTEM_HEADERS. + * config/darwin.h (ASM_IDENTIFY_GCC), config/dsp16xx/dsp16xx.h + (ASM_IDENTIFY_GCC), config/stormy16/stormy16.h (ASM_IDENTIFY_GCC, + ASM_IDENTIFY_GCC_AFTER_SOURCE): Remove. - * Makefile.in: Remove space from blank line, avoid Make complaints. +2002-01-15 Craig Rodrigues <rodrigc@gcc.gnu.org> -Thu Oct 8 18:41:45 1992 Ken Raeburn (raeburn@cygnus.com) + * doc/install.texi (hppa*-hp-hpux11): --enable-threads does + not work on this platform currently. - * config.sub: Complain if no argument is given. Added support for - 386bsd as OS and target alias. +2002-01-15 Joseph S. Myers <jsm28@cam.ac.uk> -Thu Oct 8 15:07:22 1992 Ian Lance Taylor (ian@cygnus.com) + * c-typeck.c (build_unary_op): Don't wrap msgid argument of + readonly_warning in _(). - * Makefile.in (XTRAFLAGS): include newlib directories if - newlib/Makefile exists, rather than if host != target. +2002-01-15 Douglas B Rupp <rupp@gnat.com> -Mon Oct 5 03:00:09 1992 Mark Eichin (eichin at tweedledumber.cygnus.com) + * gcc.c (delete_if_ordinary): Backout previous change. - * config.sub: recognize sparclite-wrs-vxworks. +2002-01-15 Kazu Hirata <kazu@hxi.com> - * Makefile.in (install-xiberty): added *-xiberty make rules (from - p3.) Added clean-xiberty to clean. + * config/h8300/h8300.c (print_operand): Remove support for + unused operand characters. -Thu Oct 1 17:59:19 1992 david d `zoo' zuhn (zoo at cirdan.cygnus.com) + * read-rtl.c: Fix formatting. + * real.c: Likewise. + * recog.c: Likewise. + * regclass.c: Likewise. + * regmove.c: Likewise. + * reg-stack.c: Likewise. + * reload1.c: Likewise. + * rtlanal.c: Likewise. - * configure.in: use *-*-* instead of nested cases for host and target +2002-01-15 Kazu Hirata <kazu@hxi.com> -Tue Sep 29 14:11:18 1992 Ian Lance Taylor (ian@cygnus.com) + * config/i386/i386.c: Fix formatting. - * Makefile.in: added -nostdinc to XTRAFLAGS if we are using gcc - from the same source tree and not building a cross-compiler. This - matters for the libg++ configuration if reconfiguring a tree that - has already been installed. +2002-01-15 Jakub Jelinek <jakub@redhat.com> -Sep 20 08:53:10 1992 Fred Fish (fnf@cygnus.com) + * c-typeck.c (process_init_element): Don't save_expr + COMPOUND_LITERAL_EXPR if just its initializer will be used. - * config.sub (i486v/i486v4): Merge in from FSF version. +2002-01-15 David Edelsohn <edelsohn@gnu.org> -Fri Sep 18 00:32:00 1992 Mark Eichin (eichin@cygnus.com) + * config/rs6000/rs6000.c (rs6000_output_function_epilogue): Do not + emit optional traceback table if optimize_size or TARGET_ELF. + * config/rs6000/rs6000.md (prefetch): New. - * configure: only set PWD if it is already set. +2002-01-15 Andreas Jaeger <aj@suse.de> -Thu Sep 17 23:05:53 1992 Mark Eichin (eichin@cygnus.com) + * config.gcc (x86_64-*-*): Install mmintrin.h and xmmintrin.h. - * configure: just set PWD=`pwd` at the top, since Ultrix sh - doesn't have unset and all success paths (and most error paths) - out set it anyway. (Note: should change all uses of ${PWD=`pwd`} - to just ${PWD} to avoid confusion.) +2002-01-15 Kazu Hirata <kazu@hxi.com> -Tue Sep 15 16:00:54 1992 Ian Lance Taylor (ian@cygnus.com) + * mips-tfile.c: Fix formatting. - * configure: always set $(tooldir) to $(libdir)/$(target_alias), - even for a native compilation. +Tue Jan 15 00:56:11 CET 2002 Jan Hubicka <jh@suse.cz> -Tue Sep 15 02:22:56 1992 John Gilmore (gnu@cygnus.com) + * unroll.c (final_reg_note_copy): Fix previous commit. - Changes to make the gdb.tar.Z rule work better. +2002-01-14 Kazu Hirata <kazu@hxi.com> - * Makefile.in (GDB_SUPPORT_DIRS): Add opcodes. - (DEVO_SUPPORT): Add configure.texi. - (bfd-ilrt.tar.Z): Remove ancient rule. + * config/h8300/h8300-protos.h: Remove the prototype for + eq_operator. + * config/h8300/h8300.c (eq_operator): Remove. -Thu Sep 10 10:43:19 1992 Ian Lance Taylor (ian@cygnus.com) +2002-01-14 Richard Henderson <rth@redhat.com> - * Makefile.in: added -I for newlib/targ-include to XTRAFLAGS, to - pick up the machine and system specific header files. + * config/i386/i386.md (prefetch): Tidy. + (prefetch_3dnow): Fix locality operand. - * configure.in, config.sub: added new target m68010-adobe-scout, - with alias of adobe68k. Changed configure.in to check for - -scout before -sco* to avoid a false match. +2002-01-14 Richard Henderson <rth@redhat.com> - * Makefile.in: added AS_FOR_TARGET, passed down in - TARGET_FLAGS_TO_PASS. Added CC_FOR_BUILD, which is intended to be - the C compiler to use to create programs which are run in the - build environment, set it to default to $(CC), and passed it down - in FLAGS_TO_PASS and TARGET_FLAGS_TO_PASS. + * config/mips/mips.h (HI_AND_FP_REGS): New register class. + (CLASS_CANNOT_CHANGE_MODE): Disallow HI in little-endian mode. -Wed Sep 9 12:21:42 1992 Ian Lance Taylor (ian@cygnus.com) +2002-01-14 Hans-Peter Nilsson <hp@bitrange.com> - * Makefile.in: added TARGET_FLAGS_TO_PASS, CC_FOR_TARGET, - AR_FOR_TARGET, RANLIB_FOR_TARGET, NM_FOR_TARGET. Pass - TARGET_FLAGS_TO_PASS, which defines CC, AR, RANLIB and NM as the - FOR_TARGET variants, to newlib and libg++. + * reload1.c (reload_combine): Pass reg_sum replacement through + copy_rtx in loop performing multiple changes. -Tue Sep 8 17:28:30 1992 Ken Raeburn (raeburn@cambridge.cygnus.com) +2002-01-14 Jakub Jelinek <jakub@redhat.com> - * Makefile.in (all-gas, all-gdb): Require all-opcodes to be built - first. + * except.c (remove_unreachable_regions): New. + (free_eh_status): Clear exception_handler_labels. + (convert_from_eh_region_ranges): Call remove_unreachable_regions. + (find_exception_handler_labels): Don't add the same label more than + once. + (remove_exception_handler_label): Don't die if + find_exception_handler_labels hasn't been called for the current + function yet. -Wed Sep 2 02:50:05 1992 John Gilmore (gnu@cygnus.com) +Mon Jan 14 21:26:13 CET 2002 Jan Hubicka <jh@suse.cz> - * config.sub: Accept `elf' as an environment. + * toplev.c (rest_of_compilation): Rebuild jump labels after + gcse. -Tue Sep 1 15:48:30 1992 Steve Chamberlain (sac@thepub.cygnus.com) +2002-01-14 Joseph S. Myers <jsm28@cam.ac.uk> - * Makefile.in (all-opcodes): cd into the right directory + * doc/extend.texi: Move documentation of X86 built-in functions + here. + * doc/invoke.texi: From here. + * doc/sourcebuild.texi: Document location of documentation for + machine built-in functions. -Sun Aug 30 21:12:11 1992 Ian Lance Taylor (ian@cygnus.com) +2002-01-13 Christopher Faylor <cgf@redhat.com> - * configure: added -program_transform_name option, used as - argument to sed when installing programs. - configure.texi: added documentation for -program_prefix, - -program_suffix and -program_transform_name. + * cppfiles.c (TEST_THRESHOLD): New macro. + (SHOULD_MMAP): Ditto. + (read_include_file): Use SHOULD_MMAP macro to decide when mmap should + be used. -Thu Aug 27 21:59:44 1992 John Gilmore (gnu@cygnus.com) +Mon Jan 14 20:23:34 CET 2002 Jan Hubicka <jh@suse.cz> - * config.sub: Accept i486 where i386 ok. + * unroll.c (final_reg_note_copy): Properly handle + REG_LABEL + (unroll_loops): Fix LOOP_CONDITION heuristics. -Thu Aug 27 13:04:42 1992 Brendan Kehoe (brendan@rtl.cygnus.com) +2002-01-14 Geoffrey Keating <geoffk@redhat.com> - * config.sub: accept we32k + * doc/invoke.texi (Xstormy16 Options): Add xstormy16 option. + * doc/md.texi (Machine Constraints): Use @minus{} where appropriate. -Mon Aug 24 14:05:14 1992 Ian Lance Taylor (ian@cygnus.com) +Mon Jan 14 20:18:19 CET 2002 Jan Hubicka <jh@suse.cz> - * config.sub, configure.in: accept OSE68000 and OSE68k. + * cfgcleanup.c (try_forward_edges): Avoid infinite loop at infinite + threaded loop. - * Makefile.in: don't create all directories for ``make install''; - let the subdirectories create the ones they need. +2002-01-14 Tom Rix <trix@redhat.com> -Tue Aug 11 23:13:17 1992 david d `zoo' zuhn (zoo at cirdan.cygnus.com) + * config/rs6000/rs6000.md: Fix typo with sradi. - * COPYING: new file, GPL v2 +2002-01-14 Ulrich Weigand <uweigand@de.ibm.com> -Tue Aug 4 01:12:43 1992 david d `zoo' zuhn (zoo at cirdan.cygnus.com) + * config/s390/s390.md (movstrdix_64, movstrsix_31, movstrdi_64, + movstrsi_31, clrstrsi_64, clrstrsi_31): Improve RTL templates. + (clrstrdi, clrstrsi): Adapt callers. - * Makefile.in: use the new gen-info-dir, which needs a template - argument (which also lives in texinfo) + (extendsidi2, zero_extendsidi2): Remove no-conflict blocks. - * configure.texi, standards.texi: fix INFO-DIR-ENTRY + (movti splitter): Never use register 0 as base register. -Mon Aug 3 15:41:28 1992 david d `zoo' zuhn (zoo at cirdan.cygnus.com) +2002-01-14 Hartmut Penner <hpenner@de.ibm.com> - * config/mh-solaris: removed the -xs from CFLAGS (let the people - with Sun's C compiler deal with it themselved) + * combine.c (simplify_shift_const): Always generate new rtx + for shift expression instead of reusing given expression. -Mon Aug 3 00:34:17 1992 Fred Fish (fnf@cygnus.com) +Mon Jan 14 07:08:55 2002 Richard Kenner <kenner@vlsi1.ultra.nyu.edu> - * config.sub (ncr3000): Change i386 to i486. + * config/alpha/alpha.c (alpha_expand_mov): Don't call + alpha_legitimize_address unless mode is Pmode. -Thu Jul 23 00:12:17 1992 david d `zoo' zuhn (zoo at cirdan.cygnus.com) +2002-01-13 Geoffrey Keating <geoffk@redhat.com> - * Makefile.in: add install-rcs, install-grep to - install-no-fixedincludes, removed install-bison and install-libgcc + * doc/md.texi (Modifiers): Document the '*' constraint for the + user. -Tue Jul 21 01:01:50 1992 david d `zoo' zuhn (zoo@cygnus.com) + * doc/md.texi (Machine Constraints): Add constraints for xstormy16. + * doc/extend.texi (Function Attributes): 'interrupt' is valid + for xstormy16 too. - * configure.in: grab the HPUX makefile fragment if on HPUX +2002-01-13 Richard Henderson <rth@redhat.com> -Mon Jul 20 11:02:09 1992 D. V. Henkel-Wallace (gumby@cygnus.com) + * reload.c (find_reloads): Use a hard reg destination as reload reg + for an input reload of the source. - * Makefile.in: eradicate bison spoor (ditto libgcc). - configure.in: recognise m68{k,000}-ericsson-OSE. - es1800 is alias for m68k-ericsson-OSE +2002-01-13 Gerald Pfeifer <pfeifer@dbai.tuwien.ac.at> -Sun Jul 19 17:49:02 1992 david d `zoo' zuhn (zoo at cirdan.cygnus.com) + * doc/install.texi (Binaries): Make link to ftp.writtenword.com + more generic. - * configure.in: rearrange the parts that remove programs from - configdirs, based now on HOST==TARGET or by canonical triple. +Sun Jan 13 07:23:01 2002 Douglas B Rupp <rupp@gnat.com> -Fri Jul 17 22:52:49 1992 K. Richard Pixley (rich@rtl.cygnus.com) + * Makefile.in (LIB2FUNCS): Split into LIB2FUNCS_1 and LIB2FUNCS_2. + * mklibgcc.in (LIB2FUNCS): Split into LIB2FUNCS_1 and LIB2FUNCS_2. - * test-build.mk: recurse explicitly with -f test-build.mk when - appropriate. predicate stage3 and comparison on the existence - of gcc. That is, if gcc isn't around, we aren't three-staging. - On very clean, also remove ...stamp-co. Build in-place before - doing other builds. + * config/alpha/x-vms (USE_COLLECT2): Set to empty. -Thu Jul 16 18:33:09 1992 Steve Chamberlain (sac@thepub.cygnus.com) +Sun Jan 13 06:55:31 2002 Richard Kenner <kenner@vlsi1.ultra.nyu.edu> - * Makefile.in, configure.in: add tgas + * dwarf2out.c (mem_loc_descriptor, case ADDRESSOF): New case. -Thu Jul 16 16:05:28 1992 K. Richard Pixley (rich@rtl.cygnus.com) +2002-01-12 Tom Rix <trix@redhat.com> - * Makefile.in: a number of changes merged in from progressive. + * config/rs6000/rs6000.c (rs6000_emit_set_long_const): Use ior for + TARGET_POWERPC64. - * configure.in: add libm. +2002-01-12 Richard Henderson <rth@redhat.com> - * .cvsignore: ignore some stuff that comes from test-build.mk. + * config/i386/i386.c (bdesc_2arg): Mark psadbw MASK_3DNOW_A. -Wed Jul 8 00:01:30 1992 Stu Grossman (grossman at cygnus.com) + * doc/invoke.texi: Update Alpha options. - * config/mh-solaris: Use -xs when compiling so that Sun-C puts - a symbol-table into the executable. + * doc/invoke.texi: Update i386 built-in function lists. -Tue Jul 7 00:24:52 1992 Fred Fish (fnf@cygnus.com) +Sat Jan 12 17:38:11 CET 2002 Jan Hubicka <jh@suse.cz> - * config.sub: Add es1800 (m68k-ericsson-es1800). + * unroll.c (final_reg_note_copy): Avoid crash on REG_LABEL note + referencing outside. -Tue Jun 30 20:24:41 1992 D. V. Henkel-Wallace (gumby@cygnus.com) +Sat Jan 12 08:54:51 2002 Richard Kenner <kenner@vlsi1.ultra.nyu.edu> - * configure: Add program_suffix (parallel to program_prefix) - * Makefile.in: adjust directory-creating script for losing decstation + * diagnostic.c (warn_deprecated_use): Rework to lower indentation. + * expr.c (emit_move_insn_1): Remove warning, use HOST_WIDE_INT for + offsets, and change line folding. + * optabs.c (expand_binop): Remove warnings. + * sdbout.c (sdbout_record_type_name): Constify NAME to avoid warning. -Mon Jun 22 23:43:48 1992 Per Bothner (bothner@cygnus.com) +2002-01-12 Graham Stott <grahams@redhat.com> - * configure: Minor $subdir-related fixes. + * attribs.c (handle_deprecated_attribute): constify WHAT. + * diagnostic.c (warn_deprecated_use): Add braces, fixes + dangling else warning and constify WHAT. + * except.h (struct function, struct inline_remap): Move + struct tag forward defs before all prototypes. + (duplicate_eh_regions): Whitespace. -Mon Jun 22 18:30:26 1992 Steve Chamberlain (sac@thepub.cygnus.com) +2002-01-12 Nick Clifton <nickc@cambridge.redhat.com> - * configure: fix various problems with propogating - makefile_target_frag in subdirs. - * configure.in: config libgcc if its there + * config/arm/arm.h (ARM_LEGITIMIZE_RELOAD_ADDRESS): Use + MODE_BASE_REG_CLASS. + (THUMB_LEGITIMIZE_RELOAD_ADDRESS): Use MODE_BASE_REG_CLASS. -Fri Jun 19 15:19:40 1992 Stu Grossman (grossman at cygnus.com) +2002-01-12 Richard Henderson <rth@redhat.com> - * config.sub: HPPA merge. + * config/i386/i386.c (override_options): If SSE, enable sse prefetch. + (ix86_expand_vector_move): New. + (bdesc_2arg): Remove andps, andnps, orps, xorps. + (ix86_init_mmx_sse_builtins): Make static. Remove composite builtins. + Remove old prefetch builtins. Special case the logicals removed above. + (ix86_expand_builtin): Likewise. + (safe_vector_operand): Use V4SFmode, not TImode. + (ix86_expand_store_builtin): Remove shuffle arg. Update callers. + (ix86_expand_timode_binop_builtin): New. + * config/i386/i386-protos.h: Update. + * config/i386/i386.h (enum ix86_builtins): Update. + * config/i386/i386.md: Correct predicates on MMX/SSE patterns. + Use ix86_expand_vector_move in vector move expanders. + (movti_internal, movti_rex64): Add xorps alternative. + (sse_clrv4sf): Rename and adjust from sse_clrti. + (prefetch): Don't work so hard. + (prefetch_sse, prefetch_3dnow): Use PREFETCH rtx, not UNSPEC. + * config/i386/xmmintrin.h (__m128): Use V4SFmode. + (_mm_getcsr, _mm_setcsr): Fix typo in builtin name. -Mon Jun 15 12:31:52 1992 Fred Fish (fnf@cygnus.com) +2002-01-11 Richard Henderson <rth@redhat.com> - * config/mh-ncr3000 (INSTALL): Don't use /usr/ucb/install, - it is broken on ncr 3000's. + * config/i386/mmintrin.h: New file. + * config/i386/xmmintrin.h: New file. + * config.gcc (i?86-*-*): Add extra_headers. + * simplify-rtx.c (simplify_unary_operation): Handle saturating + truncation codes. + (simplify_binary_operation): Handle saturating arithmetic codes. + * config/i386/i386.c (ix86_expand_sse_comi): Return the full result, + not the lowpart subreg. + (ix86_expand_builtin): Return a TImode dummy register instead of 0 + on error. + * config/i386/i386.md (mmx_clrdi): Override memory attribute. -Sun Jun 14 10:29:19 1992 John Gilmore (gnu at cygnus.com) +2002-01-12 Michael Hayes <m.hayes@elec.canterbury.ac.nz> - * Makefile.in: Replace all-bison with all-byacc in all - dependency lines for other tools (which now use byacc). + * conflict.c (conflict_graph_compute): Free regsets when finished. + * ssa.c (compute_coalesced_reg_partition): Likewise. -Fri Jun 12 22:21:57 1992 John Gilmore (gnu at cygnus.com) +2002-01-12 Herman A.J. ten Brugge <Haj.Ten.Brugge@net.HCC.nl> - * config.sub: Add sun4sol2 => sparc-sun-solaris2. + * global.c (find_reg): Check for HARD_REGNO_CALL_PART_CLOBBERED + every where we allocate a register. -Tue Jun 9 17:18:11 1992 Fred Fish (fnf at cygnus.com) +2002-01-12 Michael Hayes <m.hayes@elec.canterbury.ac.nz> - * config/{mh-ncr3000, mh-sysv4}: Add INSTALL. + * gcse.c (compute_pre_data, pre_gcse): Use sbitmap_free. + * lcm.c (compute_earliest, compute_farthest): Likewise. -Thu Jun 4 12:07:32 1992 Mark Eichin (eichin@cygnus.com) +2002-01-11 Janis Johnson <janis187@us.ibm.com> - * Makefile.in: make gprof rules similar to byacc rules (instead of - vestigal $(unsubdir) that didn't work...) + * expr.c (expand_assignment): Fix misuse of MEM_KEEP_ALIAS_SET. -Thu Jun 4 00:37:05 1992 Per Bothner (bothner@rtl.cygnus.com) +2002-01-11 Janis Johnson <janis187@us.ibm.com> - * config.sub: Add support for Linux. - * Makefile.in: Use $(FLAGS_TO_PASS) more consistently - (at least for libg++). + * doc/rtl.texi (Insns): Fix 2 typos. -Tue Jun 02 20:03:00 1992 david d `zoo' zuhn (zoo@cygnus.com) +2002-01-11 Joseph S. Myers <jsm28@cam.ac.uk> - * configure.texi: fix doc for the -nfp option to configure + * doc/invoke.texi: Avoid overfull hboxes. Add summary of D30V + options. Use @table @gcctabopt for MMIX options. Add index + entries for MMIX options. Start new paragraph with first + heading of the machine-dependent options. -Tue Jun 2 17:20:52 1992 Michael Tiemann (tiemann@cygnus.com) +2002-01-11 Craig Rodrigues <rodrigc@gcc.gnu.org> - * Makefile.in (all-binutils): ar needs flex, so depend on all-flex. + PR other/5299 + * config/ns32k/ns32k.md: Fix spelling mistake of "than" in comments. + * combine.c (force_to_mode): Same. + * reload1.c (clear_reload_reg_in_use): Same. -Sun May 31 15:04:08 1992 Mark Eichin (eichin at cygnus.com) +2002-01-11 Nick Clifton <nickc@cambridge.redhat.com> - * config.sub: changed [^-]+ to [^-][^-]* so that it works under - Sun sed. (BSD 4.3 sed doesn't handle [^-]+ either.) - * configure.in: added solaris* host_makefile_frag hook. + * config/arm/arm.c (arm_gen_constant): Correct test of 'remainder' + and 'subtargets'. -Sun May 31 01:10:34 1992 david d `zoo' zuhn (zoo at cirdan.cygnus.com) +2002-01-11 Andreas Jaeger <aj@suse.de>, + Brad Lucier <lucier@math.purdue.edu> - * config.sub: changed recognition of m68000 so that various - m68k types can be specified via m680[01234]0 + * config/i386/i386.h (CPP_CPUCOMMON_SPEC): Remove wrong + mcpu. -Sat May 30 21:01:06 1992 david d `zoo' zuhn (zoo at cirdan.cygnus.com) +Fri Jan 11 07:35:12 2002 Douglas B Rupp <rupp@gnat.com> - * config.sub (basic_machine): fix sed so that '-foo' isn't - completely substituted out while .+'-foo' loses the '-foo' + * config/alpha/vms.h: (MD_FALLBACK_FRAME_STATE_FOR): Fix errors. + Protect with IN_LIBGCC. + (LINK_EH_SPEC): Add required trailing space. -Wed May 27 23:18:52 1992 Michael Tiemann (tiemann@rtl.cygnus.com) +Fri Jan 11 09:25:05 2002 Nicola Pero <n.pero@mi.flashnet.it> - * config.sub ($os): Add -aout. + * c-tree.h: Move function declarations so that they are listed + under the filename which contains them. + (check_identifier, finish_decl_top_level, + lookup_name_current_level_global, shadow_record_fields): Remove. -Fri May 22 14:00:02 1992 Per Bothner (bothner@cygnus.com) +2002-01-11 Andreas Jaeger <aj@suse.de> - * configure: If host_makefile_frag is absolute, don't - prefix ${invsubdir} (relevant to libg++ auto-configure). + * config/i386/i386.h (CPP_CPUCOMMON_SPEC): Remove duplicated + march. -Thu May 21 18:00:09 1992 Michael Tiemann (tiemann@rtl.cygnus.com) +2002-01-10 Richard Henderson <rth@redhat.com> - * Makefile.in (tooldir): Define it. - (all-ld): Depend on all-flex. + * config/alpha/alpha.c (print_operand): Add 'J'. + * config/alpha/alpha.md (call_osf_1_er, call_value_osf_1_er): Take a + new operand with the sequence number for the lituse. When splitting + the insns, use gen_movdi_er_high_g and generate a sequence number. + (gen_movdi_er_high_g): Print the sequence number if non-zero. -Sun May 10 21:45:59 1992 Per Bothner (bothner@rtl.cygnus.com) +2002-01-10 Aldy Hernandez <aldyh@redhat.com> - * Makefile.in (check): Fix libg++ special case. + * config/rs6000/rs6000.c (altivec_init_builtins): Add support for + lvebx, lvehx, lvewx, lvxl, lvx, stvx, stvebx, stvehx, stvewx, + stvxl. + (altivec_expand_builtin): Same. + (altivec_expand_stv_builtin): New. -Fri May 8 08:31:41 1992 K. Richard Pixley (rich@cygnus.com) + * config/rs6000/rs6000.h (rs6000_builtins): Same. - * configure: do not bury `pwd` into config.status, thus do fewer - pwd's. + * config/rs6000/rs6000.md ("altivec_lvebx"): New. + ("altivec_lvehx"): New. + ("altivec_lvewx"): New. + ("altivec_lvxl"): New. + ("altivec_lvx"): New. + ("altivec_stvx"): New. + ("altivec_stvebx"): New. + ("altivec_stvehx"): New. + ("altivec_stvewx"): New. + ("altivec_stvxl"): New. - * configure: print the "Building in" message only when building in - other than "." AND verbose. +2002-01-10 Richard Henderson <rth@redhat.com> - * configure: remove -s, rework -v to better accommodate guested - configures. + * cfgrtl.c (delete_insn): Assert insn hasn't been deleted yet. + * reload1.c (delete_output_reload): Zap spill_reg_store. Take + care not to delete instructions twice. - * standards.texi: updated to 3 may, fixed librid <-> libdir typo. +2002-01-10 Zack Weinberg <zack@codesourcery.com> -Fri May 1 18:00:50 1992 K. Richard Pixley (rich@cygnus.com) + * toplev.c: Don't declare environ (it's not used anywhere). + * configure.in: Don't check for declaration of environ. + * config/i386/xm-mingw32.h: Don't #define environ. + * config.in, configure: Regenerate. - * Makefile.in: macroize flags passed on recursion. remove - fileutils. +2002-01-10 Zack Weinberg <zack@codesourcery.com> -Thu Apr 30 08:56:20 1992 K. Richard Pixley (rich@cygnus.com) + * configure.in: Set stage1_cflags for powerpc-*-darwin*. + * configure: Regenerate. - * configure: get makesrcdir right for subdirs deeper than 1. + * config/interix.h: Set DO_GLOBAL_CTORS_BODY and + DO_GLOBAL_DTORS_BODY here, not in xm-interix.h. + * config/alpha/vms.h: Set INCLUDE_DEFAULTS here, not in + alpha/xm-vms.h. + * config/m68k/t-next: Set OTHER_FIXINCLUDES_DIRS and + LIMITS_H_TEST here, not in m68k/x-next. + * config/rs6000/beos.h: Set STANDARD_INCLUDE_DIR and + SYSTEM_INCLUDE_DIR here, not in rs6000/xm-beos.h. + + * config/x-interix: Don't set RANLIB, RANLIB_TEST, SHELL, + LIBGCC2_INCLUDES, or SYSTEM_HEADER_DIR. + * config/alpha/x-vms: Don't set USE_COLLECT2. Add comments. + + * config/i386/x-djgpp: Renamed i386/t-djgpp. + * config/m88k/x-dolph: Renamed m88k/t-dolph. + * config/m88k/x-texXD88: Renamed m88k/t-texXD88. + * config/pa/x-pa-mpeix: Renamed pa/t-mpeix. Update for + replacement of quadlib.asm with quadlib.c. + + * config/x-interix3, config/xm-interix.h, config/i386/x-beos, + config/i386/xm-osf1elf.h, config/rs6000/x-darwin, + config/rs6000/xm-beos.h: Delete file. - * Makefile.in: pass INSTALL, INSTALL_DATA, INSTALL_PROGRAM on - install. + * config.gcc: Update to match above changes. -Fri Apr 24 15:51:51 1992 K. Richard Pixley (rich@cygnus.com) +2002-01-10 Kazu Hirata <kazu@hxi.com> + + * config/h8300/h8300.h: Fix comment typos. + * config/h8300/h8300.md: Likewise. + * config/h8300/lib1funcs.asm: Likewise. + +2002-01-10 Dale Johannesen <dalej@apple.com> + + PR optimization/5269 + * unroll.c (precondition_loop_p): Make *increment be the correct + sign when n_iterations known, to avoid confusing caller. - * Makefile.in: don't print subdir_do or recursion lines. +2002-01-10 Kazu Hirata <kazu@hxi.com> + + * doc/extend.texi (deprecated): Fix a typo. -Fri Apr 24 15:22:04 1992 K. Richard Pixley (rich@cygnus.com) +Thu Jan 10 22:35:54 CET 2002 Jan Hubicka <jh@suse.cz> - * standards.texi: added menu item. + * basic-block.h (update_br_prob_note): Declare. + * cfgcleanup.c (try_simplify_condjump): Call update_br_prob_note. + (try_forward_edges): Care negative frequencies and update note. + (outgoing_edges_match): Tweek conditional merging heuristics. + (try_crossjump_to_edge): use update_br_prob_note. + * cfglayout.c (fixup_reorder_chain): Likewise. + * cfrtl.c (update_br_prob_note): New. + * ifcvt.c (dead_or_predicable): Call update_br_prob_note. + + * i386.c (ix86_decompose_address): Return -1 if address contains + shift. + (legitimate_address_p): Require ix86_decompose_address to return 1. + + * gcse.c (hash_scan_set): Use CONSTANT_INSN_P. + (cprop_insn): Likewise. + +2002-01-10 Kazu Hirata <kazu@hxi.com> - * Makefile.in: build and install standards.info. + * toplev.c: Fix formatting. + * tree.c: Likewise. + * tree-dump.c: Likewise. + * unroll.c: Likewise. + * unwind-dw2.c: Likewise. + * unwind-dw2-fde.c: Likewise. + * unwind-dw2-fde-glibc.c: Likewise. + * unwind-sjlj.c: Likewise. - * standards.texi: new file. +2002-01-10 Joseph S. Myers <jsm28@cam.ac.uk> -Wed Apr 22 18:06:55 1992 K. Richard Pixley (rich@rtl.cygnus.com) + * doc/invoke.texi: Document PDP-11 options. - * configure: test for and move config.status pieces from - ${subdir}/. +2002-01-10 Kazu Hirata <kazu@hxi.com> -Wed Apr 22 14:38:34 1992 Fred Fish (fnf@cygnus.com) + * config/h8300/h8300.h: Fix formatting. - * config/mh-delta88, config/mh-ncr3000: Replace MINUS_G with - CFLAGS per new configuration strategy. - * configure: Test for existance of files before trying to mv - them, to avoid numerous non-existance messages. +2002-01-10 Ira Ruben <ira@apple.com> -Tue Apr 21 12:31:33 1992 K. Richard Pixley (rich@cygnus.com) + Add __attribute__ ((deprecated)). + * extend.texi: Document __attribute__ ((deprecated)). + * invoke.texi: Document -Wno-deprecated-declarations. + * testsuite/g++.dg/other/deprecated.C: New C++ test. + * testsuite/gcc.dg/deprecated.c: New C test. + * attribs.c (enum attrs): Declare handle_deprecated_attribute(). + (c_common_attribute_table): Add "deprecated" entry. + (handle_deprecated_attribute): New function. + * c-decl.c (deprecated_states): New enum. + deprecated_state: State of "deprecated" handling. + (start_decl): Set deprecated_state based on attributes. + (grokdeclarator): Test for deprecated uses, propagate attribute. + * c-typeck.c (build_component_ref): Test for deprecated fields. + (build_external_ref): Test for deprecated primaries. + * diagnostic.c (warn_deprecated_use) New function to issue + warnings about __attribute__ ((depricated)) references. + * flags.h (warn_deprecated_decl): Extern declared for + -W[no-]deprecated-declarations option. + * print-tree.c (print_node): Show deprecated flag status. + * toplev.c (warn_deprecated_decl): Defined. + (W_options): Added "deprecated-declaration". + * toplev.h (warn_deprecated_use): Extern declared. + * tree.h (struct tree_common): Define deprecated_flag. + (TREE_DEPRECATED): New macro to access flag. + * cp/call.c (build_call): Test for deprecated calls. + * cp/class.c (add_implicitly_declared_members): Set global + flag to tell grokdeclarator to not issue deprecated warnings. + * cp/cp-tree.h: Add extern for adding_implicit_members. + * cp/decl.c (deprecated_states): New enum. + (start_decl): Set deprecated_state based on attributes. + (grokdeclarator): Test for deprecated uses, propagate attribute. + * cp/lex.c (do_identifier): Test for deprecated primaries. + * cp/typeck.c (build_component_ref): Test for deprecated fields. - * configure: correct final line of config.status. +2002-01-10 Ira Ruben <ira@apple.com> - * configure: patch from eggert. Avoids a protection problem if - the original Makefile.in is read only. + Fix to assign attributes to inline member functions. + * cp/decl.c (start_method): Handle attrlist. - * configure: use move-if-change from gcc to create config.status. - Some makefiles depend on config.status to tell if a directory - has been reconfigured for a different host. This change - prevents those directories from remaking everything in the case - where the reconfig was only intended to rebuild a Makefile. +2002-01-10 Kazu Hirata <kazu@hxi.com> - * configure: test for config.sub with "config.sub sun4" rather - than "config.sub ${host_alias}". Otherwise we can't tell a bad - host alias from a missing config.sub. + * combine.c (expand_field_assignment): Use subreg_lsb(). -Mon Apr 20 18:16:36 1992 K. Richard Pixley (rich@rtl.cygnus.com) +2002-01-10 David Edelsohn <edelsohn@gnu.org> - * Makefile.in: explicitly pass CFLAGS on recursion. no longer pass - MINUS_G (this can be done with CFLAGS). Default CFLAGS to -g. + * alias.c (find_base_value): Add cases for HIGH, PRE_INC, PRE_DEC, + POST_INC, POST_DEC, PRE_MODIFY, and POST_MODIFY. + (find_base_term): Add cases for TRUNCATE, PRE_MODIFY, and POST_MODIFY. + Recurse for any operand of AND as long as constant is non-zero. -Fri Apr 17 18:27:51 1992 Per Bothner (bothner@cygnus.com) +2002-01-10 Kazu Hirata <kazu@hxi.com> - * configure: mkdir ${subdir} as needed. + * config/h8300/h8300.md: Remove constraints from expanders. -Wed Apr 15 17:37:22 1992 K. Richard Pixley (rich@cygnus.com) +2002-01-10 Kazu Hirata <kazu@hxi.com> - * Makefile.in,configure.in: added autoconf. + * varasm.c: Fix formatting. + * varray.c: Likewise. + * vmsdbgout.c: Likewise. + * xcoffout.c: Likewise. -Wed Apr 15 17:27:34 1992 K. Richard Pixley (rich@rtl.cygnus.com) +Thu Jan 10 17:19:12 CET 2002 Jan Hubicka <jh@suse.cz> - * Makefile.in: no longer pass against on recursion. + * cfgcleanup.c (try_forward_edges): Properly initialize nthreaded_edges; + update edge probabilities to match. - * Makefile.in: added .NOEXPORT: so that stray makefile_frag - definitions are not inherited. +2002-01-10 Joseph S. Myers <jsm28@cam.ac.uk> - * configure: correct makesrcdir when subdir is . + * Makefile.in ($(docdir)/gccint.info, gccint.dvi): Add additional + dependencies. + * doc/languages.texi, doc/sourcebuild.texi: New files. + * doc/configfiles.texi: Make a subsubsection. Update. + * doc/configterms.texi: Add @node. Remove warning that this isn't + instructions for building GCC. + * doc/makefile.texi: Make a subsection. + * doc/gccint.texi: Update. -Tue Apr 14 11:56:09 1992 Per Bothner (bothner@cygnus.com) +Thu Jan 10 16:39:58 CET 2002 Jan Hubicka <jh@suse.cz> - * configure: Add support for 'subdirs' variable, which is - like 'configdirs', except that configure doesn't re-invoke - itself for subdirs, it just creates a Makefile for each subdir. - * configure.texi: Document subdirs. + * i386.md (sse_mov?fcc_const0_?): Fix constraints. -Mon Apr 13 18:50:16 1992 david d `zoo' zuhn (zoo at cirdan.cygnus.com) +Thu Jan 10 12:45:50 2002 Nicola Pero <n.pero@mi.flashnet.it> - * configure.in: added flex to configdirs + * doc/cpp.texi: Document the __OBJC__ preprocessor macro. -Mon Apr 13 18:43:55 1992 K. Richard Pixley (rich@cygnus.com) +Thu Jan 10 11:19:18 CET 2002 Jan Hubicka <jh@suse.cz> - * Makefile.in: remove clean-stamps from clean. + * optabs.c (expand_fix): Look for wider integer modes first. -Sat Apr 11 03:52:03 1992 John Gilmore (gnu at cygnus.com) + * i386.md (mov?f): Avoid the fake const double trick for medium + memory model. + (min?f*/max?f*): Prohibit memory operands for i387 variant. + (fop_df_4): Disable for SSE compilation. - * configure.in: Add gdbtest to configdirs. +2002-01-10 Graham Stott <grahams@redhat.com> -Fri Apr 10 23:11:49 1992 Fred Fish (fnf@cygnus.com) + * dwarf2out.c (indirect_string_alloc, output_indirect_string): + Move prototype into DWARF2_DEBUGGING_INFO conditional block. - * Makefile.in (MINUS_G): Add macro, default to -g, pass on - to recursive makes. - * configure.in: Recognize new ncr3000 config. +2002-01-10 Richard Henderson <rth@redhat.com> -Wed Apr 8 23:08:12 1992 K. Richard Pixley (rich@cygnus.com) + * config/alpha/alpha.md (extendsidi2_fix): Penalize f/f alternative. - * Makefile.in, configure.in: removed references to gdbm. +2002-01-10 Richard Henderson <rth@redhat.com> -Tue Apr 7 16:48:20 1992 Per Bothner (bothner@cygnus.com) + * regrename.c (find_oldest_value_reg): Fix typo in mode change check. + (copyprop_hardreg_forward_1): Likewise. Use mode_change_ok. - * config.sub: Don't canonicalize os value - newsos* to bsd (readline needs to check for newsos). - (This fix was earlier made Jan 31, but got re-broken.) +2002-01-10 Kazu Hirata <kazu@hxi.com> -Mon Apr 6 14:34:08 1992 Stu Grossman (grossman at cygnus.com) + * combine.c (can_combine_p): Fix a comment typo. - * configure.in: sco is an os, not a vendor! +2002-01-09 Zack Weinberg <zack@codesourcery.com> - * configure: Quote $( better. Keep various shells happy. + * Makefile.in (s-gencheck, s-options, s-specs): Handle an + empty list correctly. Change loop index $t to $f for + consistency with rest of Makefile. -Tue Mar 31 16:32:57 1992 K. Richard Pixley (rich@cygnus.com) +2002-01-08 Aldy Hernandez <aldyh@redhat.com> - * Makefile.in: eliminate stamp-files. + * testuite/gcc.dg/altivec-4.c: Add test for mtvscr, dssall, + mfvscr, dss, lvsl, lvsr, dstt, dstst, dststt, dst. -Mon Mar 30 22:20:23 1992 K. Richard Pixley (rich@cygnus.com) + * config/rs6000/rs6000.c (altivec_expand_builtin): Add support for + mtvscr, dssall, mfvscr, dss, lvsl, lvsr, dstt, dst, dstst, dststt. + (altivec_init_builtins): Same. + (altivec_expand_unop_builtin): Return NULL_RTX on error. + (altivec_expand_binop_builtin): Same. + (altivec_expand_ternop_builtin): Same. + (bdesc_dst): New. - * Makefile.in: add send_pr. remove "force" from .stmp-gprof rule. - Supress echoing of all the "if [ -d ... $(MAKE)" lines. + * config/rs6000/rs6000.md ("altivec_mtvscr"): New. + ("altivec_vctuxs"): Fix typo. + ("altivec_vnmsubfp"): Same. + ("altivec_dssall"): New. + ("altivec_mfvscr"): New. + ("altivec_dss"): New. + ("altivec_lvsl"): New. + ("altivec_lvsr"): New. + ("altivec_dstt"): New. + ("altivec_dstst"): New. + ("altivec_dststt"): New. + ("altivec_dst"): New. -Wed Mar 25 15:20:04 1992 Stu Grossman (grossman@cygnus.com) + * config/rs6000/rs6000.h (rs6000_builtins): Add mtvscr, dssall, + mfvscr, dss, lvsl, lvsr, dstt, dstst, dststt, dst. - * config.sub: fix iris/iris3. +2002-01-09 Richard Henderson <rth@redhat.com> -Wed Mar 25 10:34:19 1992 K. Richard Pixley (rich@cygnus.com) + * config/alpha/alpha.md (prologue_mcount): Remove lituse_jsr reloc. - * configure: re-add -rm. +2002-01-10 Hans-Peter Nilsson <hp@bitrange.com> -Tue Mar 24 23:50:16 1992 K. Richard Pixley (rich@cygnus.com) + * config/mmix/mmix.c (mmix_asm_identify_gcc): Remove unused + function. + * config/mmix/mmix-protos.h (mmix_asm_identify_gcc): Don't + prototype. + * config/mmix/mmix.h (ASM_IDENTIFY_GCC): Remove unused macro. - * Maskefile.in: add .stmp-rcs to all. +2002-01-09 Kazu Hirata <kazu@hxi.com> - * configure.in: remove gas from rs6000 build, use aix host fragment. + * read-rtl.c: Fix formatting. + * real.c: Likewise. + * regclass.c: Likewise. + * regrename.c: Likewise. + * reg-stack.c: Likewise. + * reload1.c: Likewise. + * reload.c: Likewise. + * rtl.c: Likewise. -Mon Mar 23 19:43:35 1992 K. Richard Pixley (rich@cygnus.com) +2002-01-09 Kazu Hirata <kazu@hxi.com> - * configure: pass down site_option during recursion. + * rtlanal.c (find_reg_fusage): Use XEXP instead of SET_DEST + to extract items in the expr_list chain. -Thu Mar 19 16:49:36 1992 Stu Grossman (grossman at cygnus.com) +2002-01-09 Richard Henderson <rth@redhat.com> - * Makefile.in (all.cross): Add .stmp-bfd .stmp-readline. + * config/vax/vax.c (vax_rtx_cost): Never abort. -Wed Mar 18 15:29:33 1992 Mike Stump (mrs@cygnus.com) + * config/vax/vax.h (REAL_ARITHMETIC): Define. - * configure: Change exec_prefix so that it really defaults to prefix. +2002-01-09 Jan Hubicka <jh@suse.cz> -Sat Mar 14 17:20:38 1992 Fred Fish (fnf@cygnus.com) + * gcse.c (cprop_jump): Delete insn if simplified jump is no-op. - * Makefile.in, configure.in: Add support for mmalloc library. +2002-01-09 Richard Henderson <rth@redhat.com> -Fri Mar 13 18:44:18 1992 K. Richard Pixley (rich@cygnus.com) + * config/arm/arm.c (arm_gen_constant): Use trunc_int_for_mode. + Unify code from various alternatives. - * Makefile.in: add stmp dependencies for a few more things. +2002-01-09 Richard Henderson <rth@redhat.com> -Thu Mar 12 04:56:24 1992 K. Richard Pixley (rich@cygnus.com) + * regrename.c (copy_value): Ignore the copy if the source register + is present in the value chain with a narrower mode. - * configure: adjusted error message on objdir/srcdir configure - collision, per john's suggestion. +2002-01-09 Herman A.J. ten Brugge <Haj.Ten.Brugge@net.HCC.nl> - * Makefile.in: add libiberty stmp to all and all.cross. + * real.c (c4xtoe, toc4x): Do some special conversion on long doubles + for the c4x target. Also improve layout. -Wed Mar 11 02:07:52 1992 K. Richard Pixley (rich@cygnus.com) +2002-01-09 Richard Henderson <rth@redhat.com> - * Makefile.in: remove force dependencies, add grep to all. + * config/m32r/m32r.c (move_src_operand): Fix 32-bit int test. + * config/m32r/m32r.md (and ior xor splitters): Swap operands + to match insn patterns. -Tue Mar 10 21:49:18 1992 K. Richard Pixley (rich@mars.cygnus.com) +2002-01-09 Richard Henderson <rth@redhat.com> - * Makefile.in: drop flex. make stamp files work. + * regrename.c (find_oldest_value_reg): Use gen_rtx_raw_REG. + (copyprop_hardreg_forward_1): Likewise. - * configure: added test for conflicting configuration in srcdir, - remove trailing slashes from srcdir. Otherwise emacs gdb mode - gets cranky. use relative paths for configure and srcdir - whenever possible. Send some error messages to stderr that were - going to stdout. +2002-01-09 John David Anglin <dave@hiauly1.hia.nrc.ca> -Tue Mar 10 18:01:55 1992 Per Bothner (bothner@cygnus.com) + * pa.md (decrement_and_branch_until_zero): Change predicate for + operand 0 from register_operand to reg_or_nonsymb_mem_operand. - * Makefile.in: Fix libg++ rule to check for gcc directory - before using gcc/gcc. Also pass XTRAFLAGS. +2002-01-09 Bryce McKinlay <bryce@waitaki.otago.ac.nz> -Thu Mar 5 21:45:07 1992 K. Richard Pixley (rich@sendai) + * ginclude/stddef.h: Define _BSD_WCHAR_T_DEFINED_ if _BSD_WCHAR_T_ + gets undefined. For Darwin. - * Makefile.in: added stmp-files so that directories aren't polled - when they are already built. +2002-01-09 Herman A.J. ten Brugge <Haj.Ten.Brugge@net.HCC.nl> - * configure.texi: fixed a node pointer problem. + * config/c4x/c4x.h: Use PUSH_ARGS and PUSH_ROUNDING for stack passing. -Thu Mar 5 12:05:58 1992 Stu Grossman (grossman at cygnus.com) +2002-01-09 Michael Hayes <m.hayes@elec.canterbury.ac.nz> - * config.sub configure.in config/mh-irix4 gdb/configure.in - gdb/mips-tdep.c gdb/mipsread.c gdb/procfs.c gdb/signame.h - gdb/tm-irix3.h gdb/tm-mips.h gdb/xm-irix4.h gdb/config/mt-irix3 - gdb/config/mh-irix4 texinfo/configure.in: Port to SGI Irix-4.x. + * config/c4x/c4x/md: Remove extraneous constraints from define_splits. -Wed Mar 4 02:57:46 1992 K. Richard Pixley (rich@rtl.cygnus.com) +2002-01-08 Richard Henderson <rth@redhat.com> - * configure: -recurring becomes -silent. corrected help message - for -site= option. + * regrename.c (copy_value): Ignore overlapping copies. - * Makefile.in: mkdir $(exec_prefix) and $(tooldir). +2002-01-08 Richard Henderson <rth@redhat.com> -Tue Mar 3 14:51:21 1992 K. Richard Pixley (rich@rtl.cygnus.com) + * config/alpha/alpha.c (alpha_split_conditional_move): Call copy_rtx + as needed to avoid shared structure. - * configure: when building Makefile for crosses, replace - tooldir and program_prefix. default srcdir from location of - config.sub. remove "for host in hosts" and "for target in - targets" loops. +2002-01-08 Kazu Hirata <kazu@hxi.com> -Wed Feb 26 19:48:25 1992 K. Richard Pixley (rich@rtl.cygnus.com) + * config/h8300/h8300.c (get_shift_alg): Fix 15-bit LSHIFTRT on + H8/300H and H8/S. - * Makefile.in: Do not pass bindir or mandir to cvs. +2002-01-08 Joseph S. Myers <jsm28@cam.ac.uk> -Wed Feb 26 18:04:40 1992 K. Richard Pixley (rich@cygnus.com) + * doc/tm.texi (EASY_DIV_EXPR, IMPLICIT_FIX_EXPR, + LONGJMP_RESTORE_FROM_STACK, MAX_INT_TYPE_SIZE): Remove + documentation of obsolete macros. + * system.h: Poison these macros. + * config/1750a/1750a.h, config/a29k/a29k.h, config/alpha/alpha.h, + config/arc/arc.h, config/arm/arm.h, config/avr/avr.h, + config/c4x/c4x.h, config/clipper/clipper.h, + config/convex/convex.h, config/cris/cris.h, config/d30v/d30v.h, + config/dsp16xx/dsp16xx.h, config/elxsi/elxsi.h, + config/fr30/fr30.h, config/h8300/h8300.h, config/i370/i370.h, + config/i386/i386.h, config/i860/i860.h, config/i960/i960.h, + config/ia64/ia64.h, config/m32r/m32r.h, config/m68hc11/m68hc11.h, + config/m68k/m68k.h, config/m88k/m88k.h, config/mcore/mcore.h, + config/mips/mips.h, config/mmix/mmix.h, config/mn10200/mn10200.h, + config/mn10300/mn10300.h, config/ns32k/ns32k.h, config/pa/pa.h, + config/pdp11/pdp11.h, config/pj/pj.h, config/romp/romp.h, + config/rs6000/rs6000.h, config/s390/s390.h, config/sh/sh.h, + config/sparc/sparc.h, config/stormy16/stormy16.h, + config/v850/v850.h, config/vax/vax.h, config/we32k/we32k.h: Remove + definitions and commented out definitions of obsolete macros. + * config/mips/iris5.h (MAX_WCHAR_TYPE_SIZE): Don't define in terms + of MAX_INT_TYPE_SIZE. - * Makefile.in, configure.in: removed traces of namesubdir, - -subdirs, $(subdir), $(unsubdir), some rcs triggers. Forced - copyrights to '92, changed some from Cygnus to FSF. +2002-01-08 Ulrich Weigand <uweigand@de.ibm.com> - * configure.texi: remove most references to multiple hosts, - multiple targets, subdirs, etc. + * config/s390/s390.c (s390_preferred_reload_class): Never + return ADDR_REGS if it isn't a subset of the given class. + * config/s390/s390.h (REGISTER_MOVE_COST): Penalize not just + FP_REGS, but all superclasses as well. - * configure.man: removed rcsid. reference config.sub not - config.subr. + * config/s390/s390.c (s390_function_profiler): Fix thinko. - * Makefile.in: mkdir $(infodir) on install-info. + * config/s390/s390.md (cmpdi_ccu_mem, cmpsi_ccu_mem, + cmphi_ccu_mem, cmpqi_ccu_mem): First operand of compare + must not be a const_int. -Wed Feb 19 15:41:13 1992 John Gilmore (gnu at cygnus.com) +2002-01-08 Richard Henderson <rth@redhat.com> - * configure.texi: Explain better about .gdbinit and about - the environment that configure.in sections run in. + * Makefile.in (toplev.o): Depend on options.h. + (gcc.o): Depend on specs.h. -Fri Feb 7 07:55:00 1992 John Gilmore (gnu at cygnus.com) +2002-01-08 Jakub Jelinek <jakub@redhat.com> - * configure.in: Ultrix is only a decstation if it's a MIPS. + * expr.c (store_expr): Convert VOIDmode constants back to target's + mode. -Fri Jan 31 21:54:51 1992 John Gilmore (gnu at cygnus.com) +2002-01-08 Gerald Pfeifer <pfeifer@dbai.tuwien.ac.at> - * README: DOC.configure => cfg-paper.texi. + * doc/invoke.texi: Markup gcc as @command. Refer to + http://gcc.gnu.org/onlinedocs/gcc/Contributors.html instead + of http://gcc.gnu.org/thanks.html. -Fri Jan 31 21:48:18 1992 Stu Grossman (grossman at cygnus.com) +2002-01-08 Dale Johannesen <dalej@apple.com> - * config.sub (near case $os): Don't convert newsos* to bsd! + * config/rs6000/rs6000.md: Add missing int register + target case to movdf_low. -Fri Jan 31 02:27:32 1992 John Gilmore (gnu at cygnus.com) +2002-01-08 Zack Weinberg <zack@codesourcery.com> - * Makefile.in: Reinstall change from gdb-4.3 that reduces - the number of copies of COPYING that go into the GDB tar file. + * Makefile.in (cs-tconfig.h): Don't depend on $(CONFIG_H) or + except.h. Remove commands to define USING_SJLJ_EXCEPTIONS. + (cppinit.o): Depend on except.h. + (gencheck.h, options.h, specs.h, s-gencheck, s-options, + s-specs): New rules. -Thu Jan 30 16:17:30 1992 Stu Grossman (grossman at cygnus.com) + * configure.in: Don't AC_DEFINE_UNQUOTED PACKAGE or VERSION. + Don't create specs.h/options.h/gencheck.h here. Remove + unnecessary variable settings from last argument of AC_OUTPUT. + * config.in, configure: Regenerate. + * intl.c: Hardcode package name as "gcc". - * bfd/configure.in, config/mh-sco, gdb/config/mh-i386sco, - gdb/config/mt-i386v32, gdb/configure.in, readline/configure.in: - Fix SCO configuration stuff. + * cppinit.c: Include except.h. + (builtin_array): Define __USING_SJLJ_EXCEPTIONS__ when + appropriate. + * unwind-dw2.c, unwind-sjlj.c, config/ia64/unwind-ia64.c: + Use #if(n)def __USING_SJLJ_EXCEPTIONS, not #if + (!)USING_SJLJ_EXCEPTIONS. + * doc/cpp.texi: Document __USING_SJLJ_EXCEPTIONS__. -Tue Jan 28 23:51:07 1992 Per Bothner (bothner at cygnus.com) +2002-01-08 Joseph S. Myers <jsm28@cam.ac.uk> - * Makefile.in: For libg++, make sure the -I pointing - to the gcc directory goes *after* all the libg++-local -I flags. - Also, move just-gcc dependency from just-libg++ to all-libg++. + * doc/tm.texi (ASM_OUTPUT_EH_REGION_BEG, ASM_OUTPUT_EH_REGION_END, + ASM_OUTPUT_LABELREF_AS_INT, DOESNT_NEED_UNWINDER, EH_TABLE_LOOKUP, + OBJC_SELECTORS_WITHOUT_LABELS, OMIT_EH_TABLE): Remove + documentation of obsolete macros. + * system.h: Poison these macros. + * config/d30v/d30v.h, config/ns32k/encore.h, + config/stormy16/stormy16.h: Remove definitions and commented out + definitions of obsolete macros. -Tue Jan 28 12:56:24 1992 Stu Grossman (grossman at cygnus.com) +Tue Jan 8 15:56:41 2002 Nicola Pero <nicola@brainstorm.co.uk> - * configure: Change -x to -f to keep Ultrix /bin/test happy. + * objc/objc-act.c (handle_class_ref): Mark the declaration of + %sobjc_class_ref_%s as used - to prevent unwanted compiler + warnings. -Sat Jan 18 17:45:11 1992 Stu Grossman (grossman at cygnus.com) +2002-01-08 Ulrich Weigand <uweigand@de.ibm.com> - * Makefile.in (make-gdb.tar.Z): Remove texinfo targets. + * config/s390/linux.h (ASM_OUTPUT_LABELREF): Remove. + * config/s390/s390.c (s390_emit_epilog): Add REG_FRAME_RELATED_EXPR + to insn adjusting stack/frame pointer. + * config/s390/s390.md (reload_la_64, reload_la_31): Do not + accept operands that cause the insn to be non-splittable. -Sat Jan 18 17:03:21 1992 Fred Fish (fnf at cygnus.com) +2002-01-08 Graham Stott <grahams@redhat.com> - * config.sub: Add stratus configuration frags. Also - submitted to FSF. + * c-tree.h (C_TYPE_FIELDS_READONLY): Uppercase macro parameter. + (C_TYPE_FIELDS_VOLATILE): Likewise. + (C_TYPE_BEING_DEFINED): Likewise. + (C_IS_RESERVED_WORD): Likewise. + (C_TYPE_VARIABLE_SIZE): Likewise. + (C_DECL_VARIABLE_SIZE): Likewise. + (C_MISSING_PROTOTYPE_WARNED): Likewise. + (C_SET_EXP_ORIGINAL_CODE): Likewise. + (C_TYPEDEF_EXPLICITLY_SIGNED): Uppercase macro parameter and remove + parenthesis. + (C_DECL_ANTICIPATED): Likewise. + (c_build_type_variant): Add parenthesis. -Sat Jan 18 15:35:29 1992 Stu Grossman (grossman at cygnus.com) +2002-01-08 Joseph S. Myers <jsm28@cam.ac.uk> - * Makefile.in (DEV_SUPPORT): add configure.man. + * gcc.c (option_map): Remove --version. + (process_command): Handle -fversion following the GNU Coding + Standards. Partially addresses PR other/704. - * config.sub(Decode manufacturer-specific): add -none*. +2002-01-08 Graham Stott <grahams@redhat.com> -Fri Jan 17 17:58:05 1992 Stu Grossman (grossman at cygnus.com) + * combine.c (combine_instructions): Fix typo. - * Makefile.in: remove form feeds to make Sun's make happy. - (DEVO_SUPPORT): DOC.configure => cfg-paper.texi. +2002-01-08 Graham Stott <grahams@redhat.com> -Sat Jan 4 16:11:44 1992 John Gilmore (gnu at cygnus.com) + * debug.h: Use "tree" and "rtx" throughout. - * Makefile.in (AR_FLAGS): Make quieter. + * debug.c: Likewise. -Thu Jan 2 22:57:12 1992 John Gilmore (gnu at cygnus.com) +2002-01-08 Nick Clifton <nickc@cambridge.redhat.com> - * configure.in: Add libg++. - * configure: When verbose, don't output the command line at each - level; it will be unremarkably the same as the previous version, - which will be the same as what the user typed. + * dbxout.c (dbxout_symbol_location): If a symbol ref is in the + constant pool, use the pool's version of the symbol instead. -Fri Dec 27 16:26:47 1991 K. Richard Pixley (rich at cygnus.com) +2002-01-07 Richard Henderson <rth@redhat.com> - * configure.in, Makefile.in: fix clean-info, add flex. add - fileutils. + * regrename.c (find_oldest_value_reg): Ignore the value chain if + the original register was copied in a mode with a fewer number of + hard registers than the desired mode. + (copyprop_hardreg_forward_1): Likewise. + (debug_value_data): Fix loop test. + * toplev.c (parse_options_and_default_flags): Reenable + -fcprop-registers at -O1. - * configure: be less sensitive to spaces in Makefile.in. Do not - look for sources in "..". Doing so breaks subdirectories that - might have their own configure. If a subdir has it's own - configure script, use it. +2002-01-07 Aldy Hernandez <aldyh@redhat.com> -Thu Dec 26 16:30:26 1991 K. Richard Pixley (rich at cygnus.com) + * config/rs6000/rs6000.c (bdesc_2arg): Add altivec predicates. + (altivec_init_builtins): New node v4si_ftype_v16qi_v16qi. - * cfg-paper.texi: some changes suggested by rms. + * config/rs6000/rs6000.h (rs6000_builtins): Add enums for altivec + predicates. -Thu Dec 26 10:13:36 1991 Fred Fish (fnf at cygnus.com) + * config/rs6000/rs6000.md: Add altivec predicate patterns. - * config.sub: Merge in some small additions from the FSF version, - taken from the gcc distribution, to bring the Cygnus and FSF - versions into closer sync. +2002-01-07 John David Anglin <dave@hiauly1.hia.nrc.ca> -Fri Dec 20 11:34:18 1991 Fred Fish (fnf at cygnus.com) + * pa.c (FUNC_BEGIN_PROLOG_LABEL, current_function_number): Define. + (pa_output_function_prologue): Output local label at the beginning of + the prologue when profiling. + (hppa_profile_hook): Use the local label rather than the function label. + * pa.h (PROFILE_BEFORE_PROLOGUE): Define. - * configure.in: Changed svr4 references to sysv4. +2002-01-07 Aldy Hernandez <aldyh@redhat.com> -Thu Dec 19 15:54:29 1991 K. Richard Pixley (rich at cygnus.com) + * config/rs6000/rs6000.c (print_operand): Remove extra space. + (altivec_expand_unop_builtin): Fix thinko. + (altivec_expand_binop_builtin): Same. + (altivec_expand_ternop_builtin): Same. + (altivec_expand_builtin): Same. + +2002-01-07 Richard Henderson <rth@redhat.com> + + * config/rs6000/xcoff.h (ASM_FILE_START): Reverted to profile_flag. + +2002-01-07 Jason Merrill <jason@redhat.com> + + * unwind-dw2.c (execute_cfa_program): Use < again. + +2002-01-07 Jakub Jelinek <jakub@redhat.com> + + * predict.c (combine_predictions_for_insn): Avoid division by zero. + +2002-01-07 Jakub Jelinek <jakub@redhat.com> + + * simplify-rtx.c (simplify_plus_minus): Bump n_ops for NOT. + Don't allow -1 - x -> ~x simplifications in the first pass. + +2002-01-07 Aldy Hernandez <aldyh@redhat.com> + + * rs6000.c (altivec_expand_ternop_builtin): Don't die on invalid + arguments. + (altivec_expand_binop_builtin): Same. + (altivec_expand_unop_builtin): Same. + (print_operand): Fix typo. + (bdesc_1arg): Add vupk* variants. + + * rs6000.h (rs6000_builtins): Add vupk* enums. + + * rs6000.md: Add altivec_vupk* variants. + +2002-01-07 Joseph S. Myers <jsm28@cam.ac.uk> + + * doc/gcc.texi, doc/gccint.texi, doc/cppinternals.texi, + doc/install.texi, doc/invoke.texi, doc/rtl.texi: Update copyright + and last update dates. + +2002-01-07 Janis Johnson <janis187@us.ibm.com> + + * doc/rtl.texi (Flags): Clean up documentation of RTL flags + +2002-01-07 Marek Michalkiewicz <marekm@amelek.gda.pl> + + * config/avr/avr.c (avr_mcu_types): Add new MCU types. + * config/avr/avr.h (CPP_SPEC): Likewise. + (LINK_SPEC): Likewise. + (CRT_BINUTILS_SPECS): Likewise. + * config/avr/t-avr (MULTILIB_MATCHES): Likewise. + * doc/invoke.texi (AVR Options): Document them. + +Mon Jan 7 11:59:34 CET 2002 Jan Hubicka <jh@suse.cz> + + * unroll.c (copy_loop_body): Always properly update JUMP_LABEL and + LABEL_NUSES. + +2002-01-07 Graham Stott <grahams@redhat.com> + + * config/i386/i386.h: Update copyright date. + (HALF_PIC_PTR): Add parenthesis. + (OPTIMIZATION_OPTIONS): Whitespace, add parenthesis and wrap. + (CONSTANT_ALIGNMENT): Add parenthesis. + (DATA_ALIGNMENT): Likewise. + (LOCAL_ALIGNMENT): Likewise. + (FUNCTION_ARG_BOUNDARY): Whitespace, add parenthesis and wrap. + (IS_STACK_MODE): Uppercase macro parameter, add parenthesis and wrap. + (CONDITIONAL_REGISTER_USAGE): Wrap in do {...} while (0). + (HARD_REGNO_NREGS): Add paranethesis. + (VALID_SSE_REG_MODE): Whitespace. + (VALID_MMX_REG_MODE): Whitespace. + (VALID_FP_MODE_P): Uppercase macros parameter and whitespace. + (ix86_hard_regno_mode_ok): Add parenthesis. + (HARD_REGNO_CALLER_SAVE_MODE): Whitespace. + (RETURN_IN_MEMORY): Whitespace. + (N_REG_CLASSES): Add parenthesis. + (INTEGER_CLASS_P): Add parenthesis and wrap. + (FLOAT_CLASS_P): Likewise. + (SSE_CLASS_P): Likewise. + (MMX_CLASS_P): Likewise. + (MAYBE_INTEGER_CLASS_P): Likewise. + (MAYBE_FLOAT_CLASS_P): Likewise. + (MAYBE_SSE_CLASS_P): Likewise. + (MAYBE_MMX_CLASS_P): Likewise. + (Q_CLASS_P): Likewise. + (GENERAL_REGNO_P): Uppercase macro parameter. + (REX_INT_REGNO_P): Uppercase macro parameter and wrap. + (FP_REGNO_P): Likewise. + (ANY_FP_REGNO_P): Uppercase macro parameter. + (SSE_REGNO_P): Likewise. + (SSE_REGNO): Likewise. + (SSE_REG_P): Likewise. + (SSE_FLOAT_MODE_P): Likewise. + (MMX_REGNO_P): Likewise. + (MMX_REG_P):Likewise. + (STACK_REG_P): Likewise. + (NON_STACK_REG_P): Likewise. + (STACK_TOP_P): Likewise. + (CONVERT_HARD_REGISTER_TO_SSA_P): Add parenthesis. + (PREFERRED_RELOAD_CLASS): Add parenthesis and whitespace. + (SECONDARY_MEMORY_NEEDED): Likewise. + (SECONDARY_OUTPUT_RELOAD_CLASS): Whitespace. + (MD_ASM_CLOBBERS): Whitespace and wrap. + (MUST_PASS_IN_STACK): Whitespace and wrap. + (RETURN_POPS_ARGS): Add parenthesis. + (INIT_CUMULATIVE_ARGS): Likewise. + (FUNCTION_ARG): Likewise. + (FUNCTION_OK_FOR_SIBCALL): Add parenthesis and whitespace. + (SETUP_INCOMING_VARARGS): Likewise. + (BUILD_VA_LIST_TYPE): Add parenthesis. + (EXPAND_BUILTIN_VA_START): Uppercase macro paremeters and add + parenthsis. + (EXPAND_BUILTIN_VA_ARG): Likewise. + (FUNCTION_PROFILER): Wrap in do { ... } while (0) and add parenthesis. + (INITIALIZE_TRAMPOLINE): Add parenthesis. + (INITIAL_ELIMINATION_OFFSET): Likewise. + (REGNO_OK_FOR_INDEX_P): Add parenthesis. + (REGNO_OK_FOR_BASE_P): Likewise. + (REGNO_OK_FOR_SIREG_P): Add parenthesis and wrap. + (REGNO_OK_FOR_DIREG_P): Likewise. + (REG_OK_FOR_INDEX_P): Whitespace. + (REG_OK_FOR_BASE_P): Whitespace. + (GO_IF_LEGITIMATE_ADDRESS): Wrap in do { ... } while (0) and add + parenthesis. + (FIND_BASE_TERM): Fix typo. + (LEGITIMIZE_ADDRESS): Wrap in { .. } while (0) and add parenthesis. + (REWRITE_ADDRESS): Uppercase macro parameter and whitespace. + (SYMBOLIC_CONST; Whitespace. + (GO_IF_MODE_DEPENDENT_ADDRESS):Wrap in { .. } while (0) and wrap. + (ENCODE_SECTION_INFO): Whitespace. + (FINALIZE_PIC): Remove do { ... } while (0). + (PROMOTE_MODE): Wrap in do { ... } while (0). + (CONST_COSTS): Whitespace. + (RTX_COSTS): Add paramethesis, whitespace and wrap. + (REGISTER_MOVE_COST): Add parenthesis. + (MEMORY_MOVE_COST): Likewise. + (EXTRA_CC_MODES): Whitespace. + (SELECT_CC_MODE): Add parenthesis and whitespace. + (DBX_REGISTER_NUMBER): Uppercase macro parameter and add parenthsis. + (ASM_PREFERRED_EH_DATA_FORMAT): Add parenthesis and whitespace. + (ASM_OUTPUT_LABEL): Add paramethesis. + (ASM_OUTPUT_REG_PUSH): Add parenthesis and whitespace. + (ASM_OUTPUT_REG_POP): Likewise. + (ASM_OUTPUT_ADDR_VEC_ELT): Add parenthesis. + (ASM_OUTPUT_ADDR_DIFF_ELT): Likewise. + + * config/i386/i386.c: Update copyright. + (CHECK_STACK_LIMIT): Add parenthesis. + (AT_BP): Uppercase macro parameter. + (x86_64_int_parameter_registers): Constify. + (x86_64_int_return_registers): Likewise. + (ix86_compare_op0): Use rtx. + (construct_container): Constify INTREG parameter. + (function_arg): Use rtx. + + * diagnostic.h: Update copyright date. + (output_buffer_state): Add parenthesis. + (output_buffer_format_args): Likewise. + + * combine.c (combine_instructions): Replace XEXP (links, 0) + with link. + +2002-01-06 H.J. Lu <hjl@gnu.org> + + * cfgcleanup.c (thread_jump): Fix 2 typos. + +2002-01-06 Aldy Hernandez <aldyh@redhat.com> + + * config.gcc: Add support for --enable-altivec. + +2002-01-06 Craig Rodrigues <rodrigc@gcc.gnu.org> + + * emit-rtl.c (gen_highpart): Add check for NULL_RTX. + +2002-01-06 Jakub Jelinek <jakub@redhat.com> + + * objc/objc-act.c (handle_impent): Use assemble_variable to emit + __objc_class_name_*. + +2002-01-06 Craig Rodrigues <rodrigc@gcc.gnu.org> + + * doc/install.texi (sparcv9-*-solaris2*): Add documentation. + +2002-01-06 Richard Henderson <rth@redhat.com> + + * reorg.c (emit_delay_sequence): Remove death notes, not merely + nop them out. Increment label reference count for REG_LABEL. + (fill_slots_from_thread): Frob label reference count around + delete_related_insns. + +2002-01-05 Richard Henderson <rth@redhat.com> + + * cfgcleanup.c (try_forward_edges): Detect infinite loops while + jump threading. + +2002-01-05 Richard Henderson <rth@redhat.com> + + * c-decl.c (c_expand_body): Don't call outlining_inline_function. + * integrate.c (output_inline_function): Likewise. + * toplev.c (rest_of_compilation): Do it here instead. Move call + to remove_unnecessary_notes after emitting abstract instance. + Force an emitted nested function to have its parent emited as well. + * dwarf2out.c (loc_descriptor_from_tree): Read mode after checking + for null. + (rtl_for_decl_location): Do not look at reload data structures + before reload has run. + +2002-01-05 Kazu Hirata <kazu@hxi.com> + + * cse.c: Fix formatting. + * dwarf2asm.c: Likewise. + * dwarf2out.c: Likewise. + * explow.c: Likewise. + * expmed.c: Likewise. + * function.c: Likewise. + * gcov.c: Likewise. + * gencheck.c: Likewise. + * genrecog.c: Likewise. + * ggc-common.c: Likewise. + * ggc-page.c: Likewise. + * global.c: Likewise. - * configure: added -V for version number option. +2002-01-05 Kazu Hirata <kazu@hxi.com> -Wed Dec 18 15:39:34 1991 K. Richard Pixley (rich at cygnus.com) + * combine.c: Fix formatting. - * DOC.configure, cfg-paper.texi: revised, updated, and texinfo'd. - renamed from DOC.configure to cfg-paper.texi. +2002-01-05 Craig Rodrigues <crodrigu@bbn.com> -Mon Dec 16 23:05:19 1991 K. Richard Pixley (rich at rtl.cygnus.com) + PR middle-end/1557 + * config/ia64/ia64.h (RENAME_EXTENDED_BLOCKS): Remove. - * configure, config.subr, config.sub: config.subr is now - config.sub again. +2002-01-05 David Edelsohn <edelsohn@gnu.org> -Fri Dec 13 01:17:06 1991 K. Richard Pixley (rich at cygnus.com) + * config/rs6000/rs6000.h (TARGET_POWERPC): For IN_LIBGCC2, define + as 1 for __powerpc64__ as well. - * configure.texi: new file, in progress. + * config/rs6000/t-aix43 (T_ADAFLAGS): Define. - * Makefile.in: build info file and install the man page for - configure. + * alias.c (find_base_value, PLUS/MINUS): If we found a base, + return it. - * configure.man: new file, first cut. +2002-01-05 Daniel Berlin <dan@dberlin.org> - * configure: find config.subr again now that configuration "none" - has gone. removed all traces of the -ansi option. removed all - traces of the -languages option. + * lcm.c: Revert change, due to performance regression it causes on + SPEC because it's slightly more conservative (sigh, I hate + edge-based LCM). - * config.subr: resync from rms. +Sat Jan 5 11:52:05 CET 2002 Jan Hubicka <jh@suse.cz> -Wed Dec 11 22:25:20 1991 K. Richard Pixley (rich at rtl.cygnus.com) + * cfgcleanup.c (try_forward_edges): Allow multiple jump threading. - * configure, config.sub, config.subr: merge config.sub into - config.subr, call the result config.subr, remove config.sub, use - config.subr. +2002-01-05 Neil Booth <neil@daikokuya.demon.co.uk> - * Makefile.in: revised install for dir.info. + * doc/cppinternals.texi: Update. -Tue Dec 10 00:04:35 1991 K. Richard Pixley (rich at rtl.cygnus.com) +2002-01-05 Hans-Peter Nilsson <hp@bitrange.com> - * configure.in: add decstation host makefile frag. + * doc/invoke.texi (Option Summary) <MMIX Options>: Document + -mbranch-predict, -mreg-stack-fill-bug-workaround and their + negatives. + (MMIX Options): Ditto. Fix item/itemx typo for -mno-zero-extend. + * config/mmix/mmix.c (mmix_target_asm_function_prologue): Rework + kludge for pre-october-14th mmix versions to handle new-found bug + with PUSHJ/PUSHGO and the register stack. + * config/mmix/mmix.h (struct machine_function): Rename member + has_call_value_without_parameters to has_call_without_parameters. + All referers changed. + (TARGET_MASK_REG_STACK_FILL_BUG, TARGET_DEFAULT + TARGET_MASK_BRANCH_PREDICT): New macros. + (TARGET_SWITCHES): New options -mreg-stack-fill-bug-workaround, + -mno-reg-stack-fill-bug-workaround. + * config/mmix/mmix.md ("call"): Set struct machine member + has_call_without_parameters. - * Makefile.in: BISON now bison -y again. also install-gcc on - install. clean-gdbm on clean. infodir belongs in datadir. - Make directories for info install. Build dir.info here then - install it. +Sat Jan 5 02:20:22 CET 2002 Jan Hubicka <jh@suse.cz> -Mon Dec 9 16:48:33 1991 K. Richard Pixley (rich at rtl.cygnus.com) + * cfgcleanup.c (thread_jump): Fix handling of reversed branches. - * Makefile.in: fix for bad directory tests. +Sat Jan 5 01:35:29 CET 2002 Jan Hubicka <jh@suse.cz> -Sat Dec 7 00:17:01 1991 K. Richard Pixley (rich at rtl.cygnus.com) + * cfgcleanup.c: Include tm_p.h + (mark_effect): Fix handling of hard register; fix handling of SET - * configure: \{1,2\} appears to be a sysv'ism. Use a different - regexp. -srcdir relative was being handled incorrectly. +2002-01-04 Kazu Hirata <kazu@hxi.com> - * Makefile.in: unwrapped some for loops so that parallel makes - work again and so one can focus one's attention on a particular - package. + * config/h8300/h8300.md (anonymous patterns): Check that + operands are registers before using REGNO on them. -Fri Dec 6 00:22:08 1991 K. Richard Pixley (rich at rtl.cygnus.com) +2002-01-03 Roland McGrath <roland@frob.com> - * configure: added PWD as a stand in for `pwd` (for speed). use - elif wherever possible. make -srcdir work without -objdir. - -objdir= commented out. + * doc/invoke.texi (RS/6000 and PowerPC Options): Add -mcall-gnu. -Thu Dec 5 22:46:52 1991 K. Richard Pixley (rich at rtl.cygnus.com) +2002-01-04 Jakub Jelinek <jakub@redhat.com> - * configure: +options become --options. -subdirs commented out. - added -host, -datadir. Renamed -destdir to -prefix. Comment in - Makefile now at top of generated Makefile. Removed cvs log - entries. added -srcdir. create .gdbinit only if there is one - in ${srcdir}. + * tree.h (expand_expr_stmt_value): Add maybe_last argument. + * c-common.h (genrtl_expr_stmt_value): Likewise. + * stmt.c (expand_expr_stmt): Pass 1 as maybe_last. + (expand_expr_stmt_value): Add maybe_last argument. + Don't warn about statement with no effect if it is the last statement + in expression statement. + * c-semantics.c (genrtl_expr_stmt): Pass 1 as maybe_last. + (genrtl_expr_stmt_value): Add maybe_last argument, pass it down to + expand_expr_stmt_value. + (expand_stmt) [EXPR_STMT]: Pass 1 as maybe_last to + genrtl_expr_stmt_value if t is the last EXPR_STMT in its scope. + * expr.c (expand_expr) [LABELED_BLOCK_EXPR, LOOP_EXPR]: Pass 1 + as maybe_last to expand_expr_stmt_value. - * Makefile.in: idestdir and ddestdir go away. Added copyrights - and shift gpl to v2. Added ChangeLog if it didn't exist. docdir - and mandir now keyed off datadir by default. +Fri Jan 4 11:45:05 2002 Jeffrey A Law (law@redhat.com) -Fri Nov 22 07:38:11 1991 K. Richard Pixley (rich at rtl.cygnus.com) + * c-common.c (c_expand_start_cond): Expect the IF_STMT node to + be passed in, do not build it. + (c_begin_if_stmt): New function. + (c_begin_while_stmt, c_finish_while_stmt_cond): Likewise. + * c-common.h (c_expand_start_cond): Update prototype. + (c_begin_if_stmt): Prototype new function. + (c_begin_while_stmt, c_finish_while_stmt_cond): Likewise. + * c-parse.in (if_prefix): Use c_begin_if_stmt, + c_begin_while_stmt and c_finish_while_stmt_cond. - * Freshly created ChangeLog. +2002-01-04 William Cohen <wcohen@redhat.com> - -Local Variables: -mode: change-log -left-margin: 8 -fill-column: 76 -version-control: never -End: + * config/pa/elf.h (ASM_FILE_START): Reverted to profile_flag. + * config/pa/pa-linux.h (ASM_FILE_START): Likewise. + * config/pa/pa64-hpux.h (ASM_FILE_START): Likewise. + * config/pa/som.h (ASM_FILE_START): Likewise. + +2002-01-04 Daniel Berlin <dan@cgsoftware.com> + + * lcm.c: Include df.h. + Add available_transfer_function prototype. + (compute_available): Rework to use iterative dataflow framework. + (struct bb_info): s/bb_info/lcm_bb_info/g to avoid conflict + with bb_info in df.h + (available_transfer_function): New function. + + * Makefile.in (lcm.o): add df.h to dependencies. + +2002-01-04 Richard Henderson <rth@redhat.com> + + * config/alpha/alpha.c (some_operand): Accept HIGH. + (input_operand): Likewise; accept simple references to globals. + (alpha_const_ok_for_letter_p): New, outlined from alpha.h. + (alpha_const_double_ok_for_letter_p): Likewise. + (alpha_extra_constraint): Likewise. + (alpha_preferred_reload_class): Likewise. Do not force + symbolic constants to memory. + (alpha_legitimate_address_p): Accept simple references + to small_symbolic_operand. + (alpha_legitimize_address): New arg scratch. Be prepared to be + called when no_new_pseudos. Emit simple symbolic references. + Split integers into low, high, and rest. + (alpha_expand_mov): Use alpha_legitimize_address. + (some_small_symbolic_mem_operand): New. + (split_small_symbolic_mem_operand): New. + * config/alpha/alpha-protos.h: Update. + * config/alpha/alpha.h (CONST_OK_FOR_LETTER_P): Out-line. + (CONST_DOUBLE_OK_FOR_LETTER_P): Likewise. + (EXTRA_CONSTRAINT): Likewise. + (PREFERRED_RELOAD_CLASS): Likewise. + (LEGITIMIZE_ADDRESS): Update for alpha_legitimize_address change. + (PREDICATE_CODES): Update. + * config/alpha/alpha.md: New post-reload splitters to convert + simplfied symbolic operands to the form that references $29. + (divide expanders): Use emit_move_insn, not gen_movdi_er_high_g. + (movdi_er_nofix, movdi_er_fix): Accept any symbolic operand. + +2002-01-03 Richard Henderson <rth@redhat.com> + + * local-alloc.c (function_invariant_p): Update commentary. + +2002-01-04 H.J. Lu <hjl@gnu.org> + + * toplev.c (rest_of_compilation): Fix a typo when calling + cleanup_cfg. + +2002-01-03 Kazu Hirata <kazu@hxi.com> + + * c-common.c: Fix formatting. + * diagnostic.c: Likewise. + * doloop.c: Likewise. + * dwarf2out.c: Likewise. + +2002-01-03 Kazu Hirata <kazu@hxi.com> + + * config/h8300/h8300.c (output_logical_op): Use 'not.w' instead + of 'neg.w' when xoring with 0x0000ffff or 0xffff0000. + +2002-01-03 Neil Booth <neil@daikokuya.demon.co.uk> + + * cpperror.c: Update comments and copyright. + * cppexp.c, cppfiles.c, cpphash.c, cpphash.h, cppinit.c, + cpplex.c, cpplib.c, cpplib.h, cppmacro.c, cppmain.c: Similarly. + +2002-01-03 John David Anglin <dave@hiauly1.hia.nrc.ca> + + * collect2.c (main): Use strcmp when testing for "-shared". + +2002-01-03 Neil Booth <neil@daikokuya.demon.co.uk> + + * cppmacro.c: Don't include intl.h. Update comments. + (new_number_token): Allocate enough buffer for 64-bit unsigned + integers; update prototype. + * cppmain.c: Update comments. + +2002-01-03 William Cohen <wcohen@redhat.com> + + * function.h (struct function): Add profile. + (current_function_profile): New. + doc/extend.texi: Update documentation. + * final.c (final_start_function): Use current_function_profile + instead of profile_flag. + (profile_after_prologue): Likewise. + * function.c (expand_function_start): Likewise. + (expand_function_start): Likewise. + * config/alpha/alpha.c (direct_call_operand): + (alpha_does_function_need_gp): Likewise. + (alpha_expand_prologue): Likewise. + * config/arm/arm.c (arm_expand_prologue): Likewise. + thumb_expand_prologue: Likewise. + * config/d30v/d30v.c (d30v_stack_info): Likewise. + * config/fr30/fr30.c (MUST_SAVE_RETURN_POINTER): Likewise. + (fr30_expand_prologue): Likewise. + * config/i386/cygwin.h (SUBTARGET_PROLOGUE): Likewise. + * config/i386/i386.c (ix86_osf_output_function_prologue): Likewise. + * config/i386/i386.h (FINALIZE_PIC): Likewise. + * config/i386/win32.h (SUBTARGET_PROLOGUE): Likewise. + * config/i960/i960.c (i960_output_function_prologue): Likewise. + * config/ia64/ia64.c (ia64_compute_frame_size): Likewise. + * config/m32r/m32r.c (MUST_SAVE_RETURN_ADDR): Likewise. + (m32r_expand_prologue): Likewise. + * config/m88k/m88k.c (m88k_layout_frame): Likewise. + (m88k_expand_prologue): Likewise. + * config/m88k/m88k.h (ADJUST_INSN_LENGTH): Likewise. + * config/mips/mips.c (compute_frame_size): Likewise. + (mips_expand_prologue): Likewise. + (mips_can_use_return_insn): Likewise. + * config/pa/elf.h (ASM_FILE_START): Likewise. + * config/pa/pa-linux.h (ASM_FILE_START): Likewise. + * config/pa/pa64-hpux.h (ASM_FILE_START): Likewise. + * config/pa/som.h (ASM_FILE_START): Likewise. + * config/romp/romp.c (romp_using_r14): Likewise. + * config/rs6000/rs6000.c (first_reg_to_save): Likewise. + (rs6000_stack_info): Likewise. + * config/rs6000/sysv4.h (ASM_DECLARE_FUNCTION_NAME): Likewise. + * config/rs6000/xcoff.h (ASM_FILE_START): Likewise. + * config/v850/v850.c (compute_register_save_size): Likewise. + +2002-01-03 Jakub Jelinek <jakub@redhat.com> + + * simplify-rtx.c (simplify_binary_operation) [DIV]: If + gen_lowpart_common fails, use gen_lowpart_SUBREG. + +2002-01-03 Turly O'Connor <turly@apple.com> + + * darwin.c (machopic_output_possible_stub_label): Don't generate + stub routines for pseudo-stubs which we've just defined. + +2002-01-03 Kazu Hirata <kazu@hxi.com> + + * builtins.c: Fix formatting. + * c-typeck.c: Likewise. + * combine.c: Likewise. + * expr.c: Likewise. + * loop.c: Likewise. + +2002-01-03 Andreas Schwab <schwab@suse.de> + + * cppfiles.c (_cpp_pop_file_buffer): Change return type to bool + and return true if _cpp_push_next_buffer pushed a new include + file. + * cpplib.c (_cpp_pop_buffer): Only call obstack_free if + _cpp_pop_file_buffer did not push a new file. + * cpphash.h (_cpp_pop_file_buffer): Update declaration. + +2002-01-02 Eric Christopher <echristo@redhat.com> + + * final.c (final_scan_insn): Change 0 -> NULL_RTX in + FIND_REG_INC_NOTE call. Update copyright. + * loop.c (canonicalize_condition): Ditto. + * reorg.c (delete_scheduled_jump): Ditto. + +2002-01-03 Kazu Hirata <kazu@hxi.com> + + * gcse.c: Fix formatting. + +2002-01-03 Graham Stott <grahams@redhat.com> + + * mkconfig.sh: Output to config.h, hconfig.h and tconfig.h + forward defs for struct tags rtx_def, union_tree, rtvec_def + also output corresponding typedefs for rtx, tree, and rtvec. + + * system.h: Move forward defs for struct tags rtx_def, union_tree, + rtvec_def along with corresponding typedefs for rtx, tree, and + rtvec to config.h, hconfig.h, tconfig.h. + +2002-01-03 Graham Stott <grahams@redhat.com> + + * tree.h: Update copyright date. + (IS_EXPR_CODE_CLASS): Add parenthesis. + (TREE_SET_CODE): Add whitespace. + (TREE_CHECK): Add parenthesis. + (TREE_CLASS_CODE): Add parenthesis and wrap long line. + (CST_OR_CONSTRUCTOR_CHECK): + (EXPR_CHECK): Add parenthis, whitespace and wrap line. + (TREE_SYMBOL_REFERENCED): Whitespace. + (INT_CST_LT): Likewise. + (INT_CST_LT_UNSIGNED): Likewise. + (tree_real_cst): Unwrap comment. + (tree_string): Likewise. + (tree_complex): Likewise. + (IDENTIFIER_POINTER): correct cast. + (SAVE_EXPR_CONTEXT): Whitespace. + (EXPR_WFL_FILENAME_NODE): Likewise. + (EXPR_WFL_FILENAME): Remove parenthesis. + (DECL_ORIGIN): Add parenthesis. + (DECL_FROM_INLINE): Use NULL_TREE. + (build_int_2): Whitespace. + (build_type_variant): Add parenthesis. + + * gcc/jcf-parse.c: Update copyright date. + (yyparse): Constify resource_filename. + +2002-01-03 Graham Stott <grahams@redhat.com> + + * rtl.h: Update copyright date. + (RTL_CHECK1): Wrap long line. + (RTL_CHECK2): Likewise. + (RTL_CHECKC1): Wrap long line and whitespace. + (RTL_CHECKC2): Likewise. + (XWINT): Whitespace. + (XINT): Likewise. + (XSTR): Likewise. + (XEXP): Likewise. + (XVEC): Likewise. + (XMODE): Likewise. + (XBITMAP): Likewise. + (XTREE): Likewise. + (XBBDEF): Likewise. + (XTMPL): Likewise. + (X0WINT): Likewise. + (X0INT):Likewise. + (X0UINT): Likewise. + (X0STR): Likewise. + (X0EXP): Likewise. + (X0VEC): Likewise. + (X0MODE): Likewise. + (X0BITMAP): Likewise. + (X0TREE): Likewise. + (X0BBDEF): Likewise. + (X0ADVFLAGS): Likewise. + (X0CSELIB): Likewise. + (X0MEMATTR): Likewise. + (XCWINT): Likewise. + (XCINT): Likewise. + (XCUINT): Likewise. + (XCSTR): Likewise. + (XCEXP): Likewise. + (XCVEC): Likewise. + (XCMODE): Likewise. + (XCBITMAP): Likewise. + (XCTREE): Likewise. + (XCBBDEF): Likewise. + (XCADVFLAGS): Likewise. + (XCCSELIB): Likewise. + (XC2EXP): Likewise. + (INSN_UID): Likewise. + (PREV_INSN): Likewise. + (PATTERN): Likewise. + (INSN_CODE): Likewise. + (PUT_REG_NOTE_KIND): Likewise. + (CODE_LABEL_NUMBER): Likewise. + (NOTE_SOURCE_FILE): Likewise. + (NOTE_BLOCK): Likewise. + (NOTE_EH_HANDLER): Likewise. + (NOTE_RANGE_INFO): Likewise. + (NOTE_LIVE_INFO): Likewise. + (NOTE_BASIC_BLOCK): Likewise. + (NOTE_EXPECTED_VALUE): Likewise. + (NOTE_LINE_NUMBER): Likewise. + (LABEL_NAME): Likewise. + (LABEL_NUSES): Likewise. + (LABEL_ALTERNATE_NAME): Likewise. + (ADDRESSOF_DECL): Likewise. + (JUMP_LABEL): Likewise. + (LABEL_NEXTREF): Likewise. + (REGNO): Likewise. + (ORIGINAL_REGNO: Likewise. + (HARD_REGISTER_NUM_P): Add parenthesis. + (SUBREG_REG): Whitespace. + (SUBREG_BYTE): Likewise. + (ASM_OPERANDS_TEMPLATE): Remove parenthesis. + (ASM_OPERANDS_OUTPUT_CONSTRAINT): Likewise. + (ASM_OPERANDS_OUTPUT_IDX): Likewise. + (ASM_OPERANDS_INPUT_VEC): Likewise. + (ASM_OPERANDS_INPUT_CONSTRAINT_VEC): Likewise. + (ASM_OPERANDS_INPUT): Likewise. + (ASM_OPERANDS_INPUT_LENGTH): Likewise. + (ASM_OPERANDS_INPUT_CONSTRAINT_EXP): Likewise. + (ASM_OPERANDS_INPUT_CONSTRAINT): Likewise. + (ASM_OPERANDS_INPUT_MODE): Likewise. + (ASM_OPERANDS_SOURCE_FILE): Likewise. + (ASM_OPERANDS_SOURCE_LINE): Likewise. + (MEM_SET_IN_STRUCT_P): Minor reformat. + (TRAP_CONDITION): Whitespace. + (TRAP_CODE): Likewise. + (COND_EXEC_TEST): Likewise. + (COND_EXEC_CODE): Likewise. + (FIND_REG_INC_NOTE): Uppercase macro args and add parenthesis. + (PHI_NODE_P): Add parenthesis. + (plus_constant): Whitespace and add parenthesis. + +2002-01-03 Kazu Hirata <kazu@hxi.com> + + * config/avr/avr.c: Fix comment typos. + * config/c4x/c4x.md: Likewise. + * config/dsp16xx/dsp16xx.h: Likewise. + * config/dsp16xx/dsp16xx.md: Likewise. + * config/i386/i386.md: Likewise. + * config/ia64/ia64.c: Likewise. + * config/m32r/m32r.h: Likewise. + * config/m68hc11/m68hc11.md: Likewise. + * config/mmix/mmix.c: Likewise. + * config/mn10200/mn10200.c: Likewise. + * config/romp/romp.c: Likewise. + * config/sh/sh.c: Likewise. + * config/stormy16/stormy16.c: Likewise. + * config/stormy16/stormy16.h: Likewise. + * config/stormy16/stormy16.md: Likewise. + +2002-01-03 Graham Stott <grahams@redhat.com> + + * loop.h: Update copyright date. + (LOOP_MOVABLES): Fix typo. + (LOOP_REGS): Likewise. + (LOOP_IVS): Likewise. + +2002-01-03 Graham Stott <grahams@redhat.com> + + * cppinit.c: Update copyright date. + Don't include output.h + * Makefile.in: Update copyright date. + Update dependency. + +2002-01-02 Craig Rodrigues <rodrigc@gcc.gnu.org> + + PR c/5226 + * invoke.texi (-mthreads): Remove from documented RS/6000 options. + (-pthread) Add to RS/6000 options. + +2002-01-02 Kazu Hirata <kazu@hxi.com> + + * except.c: Fix comment typos. + * loop.c: Likewise. + * varasm.c: Likewise. + * doc/tm.texi: Fix a typo. + +2002-01-02 Jakub Jelinek <jakub@redhat.com> + + * c-typeck.c (output_init_element): Allow initializing static storage + duration objects with compound literals. + +2002-01-02 Richard Henderson <rth@redhat.com> + + * objc/objc-act.c (hack_method_prototype): Clear current_function_decl + after abusing it. + +2002-01-02 Kaveh R. Ghazi <ghazi@caip.rutgers.edu> + + * gcc.c (default_compilers): Const-ify. + * mips-tdump.c (stab_names): Likewise. + * mips-tfile.c (map_coff_types, map_coff_storage, + map_coff_sym_type, map_coff_derived_type, stabs_symbol, + pseudo_ops_t, pseudo_ops): Likewise. + * protoize.c (default_include): Likewise + + * real.c (GET_REAL, PUT_REAL): Don't cast away const-ness. + (ezero, ehalf, eone, etwo, e32, elog2, esqrt2, epi): Const-ify. + Add array size in declaration. + (endian, emov, eisneg, eisinf, eisnan, eiisnan, eiisneg, emovi, + emovo, emovz, eiisinf, ecmpm, eaddm, esubm, m16m, edivm, emulm, + esub, eadd, eadd1, ediv, emul, e53toe, e64toe, e113toe, e24toe, + etoe113, etoe64, etoe53, etoe24, ecmp, eround, ltoe, ultoe, + eifrac, euifrac, e24toasc, e53toasc, e64toasc, e113toasc, etoasc, + efloor, efrexp, eldexp, eremain, dectoe, etodec, ibmtoe, etoibm, + c4xtoe, etoc4x, uditoe, ditoe, etoudi, etodi, esqrt, etens, + emtens, make_nan): Const-ify. + (TFbignan, TFlittlenan, XFbignan, XFlittlenan, DFbignan, + DFlittlenan, SFbignan, SFlittlenan): Make static and const-ify. + +2002-01-02 Joseph S. Myers <jsm28@cam.ac.uk> + + * config.gcc (ia64-*-*): Set extra_headers. + (alpha*-dec-osf*): Likewise. Don't use alpha/t-osf. + * config/alpha/t-osf: Remove. + * config/ia64/t-ia64 (EXTRA_HEADERS): Remove. + +2002-01-02 David Edelsohn <edelsohn@gnu.org> + + * config/rs6000/t-aix43: Revert previous change. + +2002-01-02 Jason Merrill <jason@redhat.com> + + * c-decl.c (c_expand_body): Call outlining_inline_function when + emitting an inline function out of line. + +2002-01-02 Richard Henderson <rth@redhat.com> + + * dwarf2out.c (limbo_die_node): Add created_for member. + (new_die): New argument created_for. Update all callers. + (mark_limbo_die_list): New. + (dwarf2out_init): Register limbo_die_list as a root. + (dwarf2out_finish): Force insert limbo dies into their function + context. + +2002-01-02 Nathan Sidwell <nathan@codesourcery.com> + + PR c++/5089 + * doc/invoke.texi (-Wold-style-cast): Only warn about non-void casts. + +2002-01-02 Kazu Hirata <kazu@hxi.com> + + * config/h8300/fixunssfsi.c: Update copyright. + Fix comment typos. + Fix formatting. + * config/h8300/h8300.c: Update copyright. + Eliminate warnings. + +2002-01-02 Kazu Hirata <kazu@hxi.com> + + * config/romp/romp.c: Fix comment formatting. + * config/romp/romp.h: Likewise. + * config/romp/romp.md: Likewise. + * config/s390/s390.c: Likewise. + * config/stormy16/stormy16.c: Likewise. + * config/stormy16/stormy16.h: Likewise. + +2002-01-02 Alexandre Oliva <aoliva@redhat.com> + + * c-common.h (genrtl_expr_stmt_value): Declare. + * c-semantics.c (genrtl_goto_stmt): Redirect to... + (genrtl_goto_stmt_value): ... this new function. Pass new + argument down to expand_expr_stmt_value, taking + TREE_ADDRESSABLE into account. + * c-common.c (c_expand_expr): Mark the last EXPR_STMT of a + STMT_EXPR as addressable, i.e., one whose result we want. + * expr.c (expand_expr): Don't save expression statement value + of labeled_blocks or loop_exprs. + * stmt.c (expand_expr_stmt): Redirect to... + (expand_expr_stmt_value): ... this new function. Use new + argument to tell whether to save expression value. + (expand_end_stmt_expr): Reset last_expr_type and + last_expr_value if we don't have either. + * tree-inline.c (declare_return_variable): Mark its use + statement as addressable. + * tree.h: Document new use of TREE_ADDRESSABLE. + (expand_expr_stmt_value): Declare. + +2002-01-01 Tom Rix <trix@redhat.com> + + * config/rs6000/rs6000.c (rs6000_emit_set_long_const): Fix for use by + rs6000_emit_allocate_stack. + +2002-01-01 Joseph S. Myers <jsm28@cam.ac.uk> + + * configure.in: Prepend ${srcdir}/config/${cpu_type}/ instead of + ${srcdir}/ginclude/ to every entry in extra_headers. + * configure: Regenerate. + * ginclude/math-3300.h: Rename to config/m68k/math-3300.h. + * ginclude/math-68881.h: Rename to config/m68k/math-68881.h. + * ginclude/ppc-asm.h: Rename to config/rs6000/ppc-asm.h. + * ginclude/proto.h: Rename to config/convex/proto.h. + +Tue Jan 1 17:12:56 2002 Richard Kenner <kenner@vlsi1.ultra.nyu.edu> + + * attribs.c (handle_vector_size_attribute): Use host_integerp + and tree_int_cst; remove warnings. + * caller-save.c (insert_restore): Add cast to get rid of warning. + (insert_save): Likewise. + * emit-rtl.c (adjust_address_1, offset_address): Likewise. + * regmove.c (find_matches): Add temporary var to kill a warning. + +2002-01-01 Douglas B Rupp <rupp@gnat.com> + + * config/alpha/vms.h (DWARF2_UNWIND_INFO, EH_RETURN_HANDLER_RTX, + LINK_EH_SPEC, MD_FALLBACK_FRAME_STATE_FOR): Define. + * config/alpha/t-vms (EXTRA_PARTS): Add vms-dwarf2eh.o + (vms-dwarf2eh.o): Add Makefile rule. + * config/alpha/vms-ld.c (main): Handle vms-dwarf2eh.o. + * config/alpha/vms-dwarf2eh.asm: New file. + + * gcc.c (delete_if_ordinary): Delete all versions. + +2002-01-01 Hans-Peter Nilsson <hp@bitrange.com> + + * config/mmix/mmix.md: Update FIXME to not mention + define_constants. + (MMIX_rJ_REGNUM): New define_constants constant. + ("movqi", "movsi", "movdi", "*movdicc_real_foldable", + "*movdicc_real"): Adjust contraints formatting. + ("*bCC_foldable"): Add %+ for P in output format and delete FIXME + for branch prediction. + ("*bCC", "*bCC_inverted_foldable", "*bCC_inverted"): Add %+ in + output template. + ("*call_real", "*call_value_real", "nonlocal_goto_receiver", + "*nonlocal_goto_receiver_expanded"): Use MMIX_rJ_REGNUM instead of + number. Delete related FIXMEs. + * config/mmix/mmix.h (MMIX_INCOMING_RETURN_ADDRESS_REGNUM): Change + from number to MMIX_rJ_REGNUM. + (TARGET_MASK_BRANCH_PREDICT): New. + (TARGET_DEFAULT): Change to TARGET_MASK_BRANCH_PREDICT. + (TARGET_SWITCHES): Update comment. Correct -mno-toplevel-symbols + value. Add -mbranch-predict and -mno-branch-predict. + (TARGET_VERSION): Drop date. + (ADDITIONAL_REGISTER_NAMES): Use MMIX_rJ_REGNUM, not number. + * config/mmix/mmix.c (mmix_encode_section_info): Correct condition + for finding out global symbols. + (mmix_asm_output_labelref): Revert condition for global symbol. + (mmix_print_operand): <case '+'>: Emit P for a likely branch. + (mmix_print_operand_punct_valid_p): A '+' is valid. + +See ChangeLog.6 for earlier changes. diff --git a/contrib/gcc/alias.c b/contrib/gcc/alias.c index 6d4104e..15f2d7b 100644 --- a/contrib/gcc/alias.c +++ b/contrib/gcc/alias.c @@ -1,5 +1,5 @@ /* Alias analysis for GNU C - Copyright (C) 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. + Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc. Contributed by John Carr (jfc@mit.edu). This file is part of GCC. @@ -321,8 +321,8 @@ objects_must_conflict_p (t1, t2) then they may not conflict. */ if ((t1 != 0 && readonly_fields_p (t1)) || (t2 != 0 && readonly_fields_p (t2)) - || (t1 != 0 && TYPE_READONLY (t1)) - || (t2 != 0 && TYPE_READONLY (t2))) + || (t1 != 0 && lang_hooks.honor_readonly && TYPE_READONLY (t1)) + || (t2 != 0 && lang_hooks.honor_readonly && TYPE_READONLY (t2))) return 0; /* If they are the same type, they must conflict. */ diff --git a/contrib/gcc/c-objc-common.c b/contrib/gcc/c-objc-common.c index 43ec820..d2bc5c1 100644 --- a/contrib/gcc/c-objc-common.c +++ b/contrib/gcc/c-objc-common.c @@ -131,6 +131,22 @@ inline_forbidden_p (nodep, walk_subtrees, fn) break; + case RECORD_TYPE: + case UNION_TYPE: + /* We cannot inline a function of the form + + void F (int i) { struct S { int ar[i]; } s; } + + Attempting to do so produces a catch-22 in tree-inline.c. + If walk_tree examines the TYPE_FIELDS chain of RECORD_TYPE/ + UNION_TYPE nodes, then it goes into infinite recursion on a + structure containing a pointer to its own type. If it doesn't, + then the type node for S doesn't get adjusted properly when + F is inlined, and we abort in find_function_data. */ + for (t = TYPE_FIELDS (node); t; t = TREE_CHAIN (t)) + if (variably_modified_type_p (TREE_TYPE (t))) + return node; + default: break; } diff --git a/contrib/gcc/c-parse.in b/contrib/gcc/c-parse.in index c7cbb16..2fc4359 100644 --- a/contrib/gcc/c-parse.in +++ b/contrib/gcc/c-parse.in @@ -1527,6 +1527,7 @@ initelt: if (pedantic) pedwarn ("obsolete use of designated initializer with `:'"); } initval + {} | initval ; @@ -2700,12 +2701,14 @@ classdecl: { objc_declare_class ($2); } + ; aliasdecl: ALIAS identifier identifier ';' { objc_declare_alias ($2, $3); } + ; classdef: INTERFACE identifier protocolrefs '{' diff --git a/contrib/gcc/calls.c b/contrib/gcc/calls.c index 449c933..a40b466 100644 --- a/contrib/gcc/calls.c +++ b/contrib/gcc/calls.c @@ -46,9 +46,11 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA #ifdef PUSH_ROUNDING +#ifndef PUSH_ARGS_REVERSED #if defined (STACK_GROWS_DOWNWARD) != defined (ARGS_GROW_DOWNWARD) #define PUSH_ARGS_REVERSED PUSH_ARGS #endif +#endif #endif @@ -2708,6 +2710,12 @@ expand_call (exp, target, ignore) if (pass == 0) { argblock = virtual_incoming_args_rtx; + argblock +#ifdef STACK_GROWS_DOWNWARD + = plus_constant (argblock, current_function_pretend_args_size); +#else + = plus_constant (argblock, -current_function_pretend_args_size); +#endif stored_args_map = sbitmap_alloc (args_size.constant); sbitmap_zero (stored_args_map); } @@ -4276,7 +4284,7 @@ store_one_arg (arg, argblock, flags, variable_size, reg_parm_stack_space) struct arg_data *arg; rtx argblock; int flags; - int variable_size ATTRIBUTE_UNUSED; + int variable_size; int reg_parm_stack_space; { tree pval = arg->tree_value; @@ -4351,14 +4359,22 @@ store_one_arg (arg, argblock, flags, variable_size, reg_parm_stack_space) emit_move_insn (arg->save_area, stack_area); } } + + /* Now that we have saved any slots that will be overwritten + by this store, mark all slots this store will use. We + must do this before we actually expand the argument since + the expansion itself may trigger library calls which might + need to use the same stack slot. We only do it if we can't + pass all arguments to a library call in registers. */ + if (arg->partial) + { + for (i = lower_bound; i < upper_bound; i++) + stack_usage_map[i] = 1; + + /* Set it so that we don't do it again. */ + variable_size = 1; + } } - /* Now that we have saved any slots that will be overwritten by this - store, mark all slots this store will use. We must do this before - we actually expand the argument since the expansion itself may - trigger library calls which might need to use the same stack slot. */ - if (argblock && ! variable_size && arg->stack) - for (i = lower_bound; i < upper_bound; i++) - stack_usage_map[i] = 1; } /* If this isn't going to be placed on both the stack and in registers, @@ -4586,6 +4602,11 @@ store_one_arg (arg, argblock, flags, variable_size, reg_parm_stack_space) arg->value = arg->stack_slot; } + if (ACCUMULATE_OUTGOING_ARGS && !(flags & ECF_SIBCALL) + && argblock && ! variable_size && arg->stack) + for (i = lower_bound; i < upper_bound; i++) + stack_usage_map[i] = 1; + /* Once we have pushed something, pops can't safely be deferred during the rest of the arguments. */ NO_DEFER_POP; diff --git a/contrib/gcc/cfganal.c b/contrib/gcc/cfganal.c index 6009d59..8aba231 100644 --- a/contrib/gcc/cfganal.c +++ b/contrib/gcc/cfganal.c @@ -56,7 +56,31 @@ static void flow_dfs_compute_reverse_finish static void remove_fake_successors PARAMS ((basic_block)); static bool need_fake_edge_p PARAMS ((rtx)); static bool keep_with_call_p PARAMS ((rtx)); +static bool flow_active_insn_p PARAMS ((rtx)); +/* Like active_insn_p, except keep the return value clobber around + even after reload. */ + +static bool +flow_active_insn_p (insn) + rtx insn; +{ + if (active_insn_p (insn)) + return true; + + /* A clobber of the function return value exists for buggy + programs that fail to return a value. It's effect is to + keep the return value from being live across the entire + function. If we allow it to be skipped, we introduce the + possibility for register livetime aborts. */ + if (GET_CODE (PATTERN (insn)) == CLOBBER + && GET_CODE (XEXP (PATTERN (insn), 0)) == REG + && REG_FUNCTION_VALUE_P (XEXP (PATTERN (insn), 0))) + return true; + + return false; +} + /* Return true if the block has no effect and only forwards control flow to its single destination. */ @@ -71,12 +95,12 @@ forwarder_block_p (bb) return false; for (insn = bb->head; insn != bb->end; insn = NEXT_INSN (insn)) - if (INSN_P (insn) && active_insn_p (insn)) + if (INSN_P (insn) && flow_active_insn_p (insn)) return false; return (!INSN_P (insn) || (GET_CODE (insn) == JUMP_INSN && simplejump_p (insn)) - || !active_insn_p (insn)); + || !flow_active_insn_p (insn)); } /* Return nonzero if we can reach target from src by falling through. */ diff --git a/contrib/gcc/cfgcleanup.c b/contrib/gcc/cfgcleanup.c index 32ae77a..12be4f5 100644 --- a/contrib/gcc/cfgcleanup.c +++ b/contrib/gcc/cfgcleanup.c @@ -1638,7 +1638,8 @@ try_optimize_cfg (mode) /* If the jump insn has side effects, we can't kill the edge. */ && (GET_CODE (b->end) != JUMP_INSN - || onlyjump_p (b->end)) + || (onlyjump_p (b->end) + && !tablejump_p (b->end))) && merge_blocks (s, b, c, mode)) changed_here = true; diff --git a/contrib/gcc/cfgrtl.c b/contrib/gcc/cfgrtl.c index bbcdfbb..e2cb773 100644 --- a/contrib/gcc/cfgrtl.c +++ b/contrib/gcc/cfgrtl.c @@ -665,6 +665,7 @@ try_redirect_by_replacing_jump (e, target) edge tmp; rtx set; int fallthru = 0; + rtx table; /* Verify that all targets will be TARGET. */ for (tmp = src->succ; tmp; tmp = tmp->succ_next) @@ -674,6 +675,13 @@ try_redirect_by_replacing_jump (e, target) if (tmp || !onlyjump_p (insn)) return false; + if (reload_completed && JUMP_LABEL (insn) + && (table = NEXT_INSN (JUMP_LABEL (insn))) != NULL_RTX + && GET_CODE (table) == JUMP_INSN + && (GET_CODE (PATTERN (table)) == ADDR_VEC + || GET_CODE (PATTERN (table)) == ADDR_DIFF_VEC)) + return false; + /* Avoid removing branch with side effects. */ set = single_set (insn); if (!set || side_effects_p (set)) diff --git a/contrib/gcc/config.gcc b/contrib/gcc/config.gcc index 80664e1..73441e8 100644 --- a/contrib/gcc/config.gcc +++ b/contrib/gcc/config.gcc @@ -1405,7 +1405,7 @@ i[34567]86-*-rtems*|i[34567]86-*-rtemself*) i[34567]86-*-sco3.2v5*) # 80386 running SCO Open Server 5 xm_defines=POSIX install_headers_dir=install-headers-cpio - tm_file=i386/sco5.h + tm_file="${tm_file} i386/att.h i386/sco5.h" if test x$gas = xyes then tm_file="usegas.h ${tm_file}" diff --git a/contrib/gcc/config.guess b/contrib/gcc/config.guess index 83c544d..fd7602d 100755 --- a/contrib/gcc/config.guess +++ b/contrib/gcc/config.guess @@ -1,1327 +1,4 @@ -#! /bin/sh -# Attempt to guess a canonical system name. -# Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, -# 2000, 2001, 2002 Free Software Foundation, Inc. - -timestamp='2002-01-30' - -# This file is free software; you can redistribute it and/or modify it -# under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -# -# As a special exception to the GNU General Public License, if you -# distribute this file as part of a program that contains a -# configuration script generated by Autoconf, you may include it under -# the same distribution terms that you use for the rest of that program. - -# Originally written by Per Bothner <per@bothner.com>. -# Please send patches to <config-patches@gnu.org>. Submit a context -# diff and a properly formatted ChangeLog entry. -# -# This script attempts to guess a canonical system name similar to -# config.sub. If it succeeds, it prints the system name on stdout, and -# exits with 0. Otherwise, it exits with 1. -# -# The plan is that this can be called by configure scripts if you -# don't specify an explicit build system type. - -me=`echo "$0" | sed -e 's,.*/,,'` - -usage="\ -Usage: $0 [OPTION] - -Output the configuration name of the system \`$me' is run on. - -Operation modes: - -h, --help print this help, then exit - -t, --time-stamp print date of last modification, then exit - -v, --version print version number, then exit - -Report bugs and patches to <config-patches@gnu.org>." - -version="\ -GNU config.guess ($timestamp) - -Originally written by Per Bothner. -Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001 -Free Software Foundation, Inc. - -This is free software; see the source for copying conditions. There is NO -warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE." - -help=" -Try \`$me --help' for more information." - -# Parse command line -while test $# -gt 0 ; do - case $1 in - --time-stamp | --time* | -t ) - echo "$timestamp" ; exit 0 ;; - --version | -v ) - echo "$version" ; exit 0 ;; - --help | --h* | -h ) - echo "$usage"; exit 0 ;; - -- ) # Stop option processing - shift; break ;; - - ) # Use stdin as input. - break ;; - -* ) - echo "$me: invalid option $1$help" >&2 - exit 1 ;; - * ) - break ;; - esac -done - -if test $# != 0; then - echo "$me: too many arguments$help" >&2 - exit 1 -fi - - -dummy=dummy-$$ -trap 'rm -f $dummy.c $dummy.o $dummy.rel $dummy; exit 1' 1 2 15 - -# CC_FOR_BUILD -- compiler used by this script. -# Historically, `CC_FOR_BUILD' used to be named `HOST_CC'. We still -# use `HOST_CC' if defined, but it is deprecated. - -set_cc_for_build='case $CC_FOR_BUILD,$HOST_CC,$CC in - ,,) echo "int dummy(){}" > $dummy.c ; - for c in cc gcc c89 ; do - ($c $dummy.c -c -o $dummy.o) >/dev/null 2>&1 ; - if test $? = 0 ; then - CC_FOR_BUILD="$c"; break ; - fi ; - done ; - rm -f $dummy.c $dummy.o $dummy.rel ; - if test x"$CC_FOR_BUILD" = x ; then - CC_FOR_BUILD=no_compiler_found ; - fi - ;; - ,,*) CC_FOR_BUILD=$CC ;; - ,*,*) CC_FOR_BUILD=$HOST_CC ;; -esac' - -# This is needed to find uname on a Pyramid OSx when run in the BSD universe. -# (ghazi@noc.rutgers.edu 1994-08-24) -if (test -f /.attbin/uname) >/dev/null 2>&1 ; then - PATH=$PATH:/.attbin ; export PATH -fi - -UNAME_MACHINE=`(uname -m) 2>/dev/null` || UNAME_MACHINE=unknown -UNAME_RELEASE=`(uname -r) 2>/dev/null` || UNAME_RELEASE=unknown -UNAME_SYSTEM=`(uname -s) 2>/dev/null` || UNAME_SYSTEM=unknown -UNAME_VERSION=`(uname -v) 2>/dev/null` || UNAME_VERSION=unknown - -# Note: order is significant - the case branches are not exclusive. - -case "${UNAME_MACHINE}:${UNAME_SYSTEM}:${UNAME_RELEASE}:${UNAME_VERSION}" in - *:NetBSD:*:*) - # NetBSD (nbsd) targets should (where applicable) match one or - # more of the tupples: *-*-netbsdelf*, *-*-netbsdaout*, - # *-*-netbsdecoff* and *-*-netbsd*. For targets that recently - # switched to ELF, *-*-netbsd* would select the old - # object file format. This provides both forward - # compatibility and a consistent mechanism for selecting the - # object file format. - # - # Note: NetBSD doesn't particularly care about the vendor - # portion of the name. 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- 2020:CLIX:*:* | 2430:CLIX:*:*) - echo clipper-intergraph-clix${UNAME_RELEASE} - exit 0 ;; - mips:*:*:UMIPS | mips:*:*:RISCos) - eval $set_cc_for_build - sed 's/^ //' << EOF >$dummy.c -#ifdef __cplusplus -#include <stdio.h> /* for printf() prototype */ - int main (int argc, char *argv[]) { -#else - int main (argc, argv) int argc; char *argv[]; { -#endif - #if defined (host_mips) && defined (MIPSEB) - #if defined (SYSTYPE_SYSV) - printf ("mips-mips-riscos%ssysv\n", argv[1]); exit (0); - #endif - #if defined (SYSTYPE_SVR4) - printf ("mips-mips-riscos%ssvr4\n", argv[1]); exit (0); - #endif - #if defined (SYSTYPE_BSD43) || defined(SYSTYPE_BSD) - printf ("mips-mips-riscos%sbsd\n", argv[1]); exit (0); - #endif - #endif - exit (-1); - } -EOF - $CC_FOR_BUILD $dummy.c -o $dummy \ - && ./$dummy `echo "${UNAME_RELEASE}" | sed -n 's/\([0-9]*\).*/\1/p'` \ - && rm -f $dummy.c $dummy && exit 0 - rm -f $dummy.c $dummy - echo mips-mips-riscos${UNAME_RELEASE} - exit 0 ;; - Motorola:PowerMAX_OS:*:*) - echo powerpc-motorola-powermax - exit 0 ;; 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- *:IRIX*:*:*) - echo mips-sgi-irix`echo ${UNAME_RELEASE}|sed -e 's/-/_/g'` - exit 0 ;; - ????????:AIX?:[12].1:2) # AIX 2.2.1 or AIX 2.1.1 is RT/PC AIX. - echo romp-ibm-aix # uname -m gives an 8 hex-code CPU id - exit 0 ;; # Note that: echo "'`uname -s`'" gives 'AIX ' - i*86:AIX:*:*) - echo i386-ibm-aix - exit 0 ;; - ia64:AIX:*:*) - if [ -x /usr/bin/oslevel ] ; then - IBM_REV=`/usr/bin/oslevel` - else - IBM_REV=${UNAME_VERSION}.${UNAME_RELEASE} - fi - echo ${UNAME_MACHINE}-ibm-aix${IBM_REV} - exit 0 ;; - *:AIX:2:3) - if grep bos325 /usr/include/stdio.h >/dev/null 2>&1; then - eval $set_cc_for_build - sed 's/^ //' << EOF >$dummy.c - #include <sys/systemcfg.h> - - main() - { - if (!__power_pc()) - exit(1); - puts("powerpc-ibm-aix3.2.5"); - exit(0); - } -EOF - $CC_FOR_BUILD $dummy.c -o $dummy && ./$dummy && rm -f $dummy.c $dummy && exit 0 - rm -f $dummy.c $dummy - echo rs6000-ibm-aix3.2.5 - elif grep bos324 /usr/include/stdio.h >/dev/null 2>&1; then - echo rs6000-ibm-aix3.2.4 - else - echo rs6000-ibm-aix3.2 - fi - exit 0 ;; - *:AIX:*:[45]) - IBM_CPU_ID=`/usr/sbin/lsdev -C -c processor -S available | head -1 | awk '{ print $1 }'` - if /usr/sbin/lsattr -El ${IBM_CPU_ID} | grep ' POWER' >/dev/null 2>&1; then - IBM_ARCH=rs6000 - else - IBM_ARCH=powerpc - fi - if [ -x /usr/bin/oslevel ] ; then - IBM_REV=`/usr/bin/oslevel` - else - IBM_REV=${UNAME_VERSION}.${UNAME_RELEASE} - fi - echo ${IBM_ARCH}-ibm-aix${IBM_REV} - exit 0 ;; - *:AIX:*:*) - echo rs6000-ibm-aix - exit 0 ;; - ibmrt:4.4BSD:*|romp-ibm:BSD:*) - echo romp-ibm-bsd4.4 - exit 0 ;; - ibmrt:*BSD:*|romp-ibm:BSD:*) # covers RT/PC BSD and - echo romp-ibm-bsd${UNAME_RELEASE} # 4.3 with uname added to - exit 0 ;; # report: romp-ibm BSD 4.3 - *:BOSX:*:*) - echo rs6000-bull-bosx - exit 0 ;; - DPX/2?00:B.O.S.:*:*) - echo m68k-bull-sysv3 - exit 0 ;; - 9000/[34]??:4.3bsd:1.*:*) - echo m68k-hp-bsd - exit 0 ;; - hp300:4.4BSD:*:* | 9000/[34]??:4.3bsd:2.*:*) - echo m68k-hp-bsd4.4 - exit 0 ;; - 9000/[34678]??:HP-UX:*:*) - HPUX_REV=`echo ${UNAME_RELEASE}|sed -e 's/[^.]*.[0B]*//'` - case "${UNAME_MACHINE}" in - 9000/31? ) HP_ARCH=m68000 ;; - 9000/[34]?? ) HP_ARCH=m68k ;; - 9000/[678][0-9][0-9]) - if [ -x /usr/bin/getconf ]; then - sc_cpu_version=`/usr/bin/getconf SC_CPU_VERSION 2>/dev/null` - sc_kernel_bits=`/usr/bin/getconf SC_KERNEL_BITS 2>/dev/null` - case "${sc_cpu_version}" in - 523) HP_ARCH="hppa1.0" ;; # CPU_PA_RISC1_0 - 528) HP_ARCH="hppa1.1" ;; # CPU_PA_RISC1_1 - 532) # CPU_PA_RISC2_0 - case "${sc_kernel_bits}" in - 32) HP_ARCH="hppa2.0n" ;; - 64) HP_ARCH="hppa2.0w" ;; - '') HP_ARCH="hppa2.0" ;; # HP-UX 10.20 - esac ;; - esac - fi - if [ "${HP_ARCH}" = "" ]; then - eval $set_cc_for_build - sed 's/^ //' << EOF >$dummy.c - - #define _HPUX_SOURCE - #include <stdlib.h> - #include <unistd.h> - - int main () - { - #if defined(_SC_KERNEL_BITS) - long bits = sysconf(_SC_KERNEL_BITS); - #endif - long cpu = sysconf (_SC_CPU_VERSION); - - switch (cpu) - { - case CPU_PA_RISC1_0: puts ("hppa1.0"); break; - case CPU_PA_RISC1_1: puts ("hppa1.1"); break; - case CPU_PA_RISC2_0: - #if defined(_SC_KERNEL_BITS) - switch (bits) - { - case 64: puts ("hppa2.0w"); break; - case 32: puts ("hppa2.0n"); break; - default: puts ("hppa2.0"); break; - } break; - #else /* !defined(_SC_KERNEL_BITS) */ - puts ("hppa2.0"); break; - #endif - default: puts ("hppa1.0"); break; - } - exit (0); - } -EOF - (CCOPTS= $CC_FOR_BUILD $dummy.c -o $dummy 2>/dev/null) && HP_ARCH=`./$dummy` - if test -z "$HP_ARCH"; then HP_ARCH=hppa; fi - rm -f $dummy.c $dummy - fi ;; - esac - echo ${HP_ARCH}-hp-hpux${HPUX_REV} - exit 0 ;; - ia64:HP-UX:*:*) - HPUX_REV=`echo ${UNAME_RELEASE}|sed -e 's/[^.]*.[0B]*//'` - echo ia64-hp-hpux${HPUX_REV} - exit 0 ;; - 3050*:HI-UX:*:*) - eval $set_cc_for_build - sed 's/^ //' << EOF >$dummy.c - #include <unistd.h> - int - main () - { - long cpu = sysconf (_SC_CPU_VERSION); - /* The order matters, because CPU_IS_HP_MC68K erroneously returns - true for CPU_PA_RISC1_0. CPU_IS_PA_RISC returns correct - results, however. */ - if (CPU_IS_PA_RISC (cpu)) - { - switch (cpu) - { - case CPU_PA_RISC1_0: puts ("hppa1.0-hitachi-hiuxwe2"); break; - case CPU_PA_RISC1_1: puts ("hppa1.1-hitachi-hiuxwe2"); break; - case CPU_PA_RISC2_0: puts ("hppa2.0-hitachi-hiuxwe2"); break; - default: puts ("hppa-hitachi-hiuxwe2"); break; - } - } - else if (CPU_IS_HP_MC68K (cpu)) - puts ("m68k-hitachi-hiuxwe2"); - else puts ("unknown-hitachi-hiuxwe2"); - exit (0); - } -EOF - $CC_FOR_BUILD $dummy.c -o $dummy && ./$dummy && rm -f $dummy.c $dummy && exit 0 - rm -f $dummy.c $dummy - echo unknown-hitachi-hiuxwe2 - exit 0 ;; - 9000/7??:4.3bsd:*:* | 9000/8?[79]:4.3bsd:*:* ) - echo hppa1.1-hp-bsd - exit 0 ;; - 9000/8??:4.3bsd:*:*) - echo hppa1.0-hp-bsd - exit 0 ;; - *9??*:MPE/iX:*:* | *3000*:MPE/iX:*:*) - echo hppa1.0-hp-mpeix - exit 0 ;; - hp7??:OSF1:*:* | hp8?[79]:OSF1:*:* ) - echo hppa1.1-hp-osf - exit 0 ;; - hp8??:OSF1:*:*) - echo hppa1.0-hp-osf - exit 0 ;; - i*86:OSF1:*:*) - if [ -x /usr/sbin/sysversion ] ; then - echo ${UNAME_MACHINE}-unknown-osf1mk - else - echo ${UNAME_MACHINE}-unknown-osf1 - fi - exit 0 ;; - parisc*:Lites*:*:*) - echo hppa1.1-hp-lites - exit 0 ;; - C1*:ConvexOS:*:* | convex:ConvexOS:C1*:*) - echo c1-convex-bsd - exit 0 ;; - C2*:ConvexOS:*:* | convex:ConvexOS:C2*:*) - if getsysinfo -f scalar_acc - then echo c32-convex-bsd - else echo c2-convex-bsd - fi - exit 0 ;; - C34*:ConvexOS:*:* | convex:ConvexOS:C34*:*) - echo c34-convex-bsd - exit 0 ;; - C38*:ConvexOS:*:* | convex:ConvexOS:C38*:*) - echo c38-convex-bsd - exit 0 ;; - C4*:ConvexOS:*:* | convex:ConvexOS:C4*:*) - echo c4-convex-bsd - exit 0 ;; - CRAY*X-MP:*:*:*) - echo xmp-cray-unicos - exit 0 ;; - CRAY*Y-MP:*:*:*) - echo ymp-cray-unicos${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' - exit 0 ;; - CRAY*[A-Z]90:*:*:*) - echo ${UNAME_MACHINE}-cray-unicos${UNAME_RELEASE} \ - | sed -e 's/CRAY.*\([A-Z]90\)/\1/' \ - -e y/ABCDEFGHIJKLMNOPQRSTUVWXYZ/abcdefghijklmnopqrstuvwxyz/ \ - -e 's/\.[^.]*$/.X/' - exit 0 ;; - CRAY*TS:*:*:*) - echo t90-cray-unicos${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' - exit 0 ;; - CRAY*T3D:*:*:*) - echo alpha-cray-unicosmk${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' - exit 0 ;; - CRAY*T3E:*:*:*) - echo alphaev5-cray-unicosmk${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' - exit 0 ;; - CRAY*SV1:*:*:*) - echo sv1-cray-unicos${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' - exit 0 ;; - CRAY-2:*:*:*) - echo cray2-cray-unicos - exit 0 ;; - F30[01]:UNIX_System_V:*:* | F700:UNIX_System_V:*:*) - FUJITSU_PROC=`uname -m | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz'` - FUJITSU_SYS=`uname -p | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz' | sed -e 's/\///'` - FUJITSU_REL=`echo ${UNAME_RELEASE} | sed -e 's/ /_/'` - echo "${FUJITSU_PROC}-fujitsu-${FUJITSU_SYS}${FUJITSU_REL}" - exit 0 ;; - i*86:BSD/386:*:* | i*86:BSD/OS:*:* | *:Ascend\ Embedded/OS:*:*) - echo ${UNAME_MACHINE}-pc-bsdi${UNAME_RELEASE} - exit 0 ;; - sparc*:BSD/OS:*:*) - echo sparc-unknown-bsdi${UNAME_RELEASE} - exit 0 ;; - *:BSD/OS:*:*) - echo ${UNAME_MACHINE}-unknown-bsdi${UNAME_RELEASE} - exit 0 ;; - *:FreeBSD:*:*) - echo ${UNAME_MACHINE}-unknown-freebsd`echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'` - exit 0 ;; - i*:CYGWIN*:*) - echo ${UNAME_MACHINE}-pc-cygwin - exit 0 ;; - i*:MINGW*:*) - echo ${UNAME_MACHINE}-pc-mingw32 - exit 0 ;; - i*:PW*:*) - echo ${UNAME_MACHINE}-pc-pw32 - exit 0 ;; - x86:Interix*:3*) - echo i386-pc-interix3 - exit 0 ;; - i*:Windows_NT*:* | Pentium*:Windows_NT*:*) - # How do we know it's Interix rather than the generic POSIX subsystem? - # It also conflicts with pre-2.0 versions of AT&T UWIN. Should we - # UNAME_MACHINE based on the output of uname instead of i386? - echo i386-pc-interix - exit 0 ;; - i*:UWIN*:*) - echo ${UNAME_MACHINE}-pc-uwin - exit 0 ;; - p*:CYGWIN*:*) - echo powerpcle-unknown-cygwin - exit 0 ;; - prep*:SunOS:5.*:*) - echo powerpcle-unknown-solaris2`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'` - exit 0 ;; - *:GNU:*:*) - echo `echo ${UNAME_MACHINE}|sed -e 's,[-/].*$,,'`-unknown-gnu`echo ${UNAME_RELEASE}|sed -e 's,/.*$,,'` - exit 0 ;; - i*86:Minix:*:*) - echo ${UNAME_MACHINE}-pc-minix - exit 0 ;; - arm*:Linux:*:*) - echo ${UNAME_MACHINE}-unknown-linux-gnu - exit 0 ;; - ia64:Linux:*:*) - echo ${UNAME_MACHINE}-unknown-linux - exit 0 ;; - m68*:Linux:*:*) - echo ${UNAME_MACHINE}-unknown-linux-gnu - exit 0 ;; - mips:Linux:*:*) - eval $set_cc_for_build - sed 's/^ //' << EOF >$dummy.c - #undef CPU - #undef mips - #undef mipsel - #if defined(__MIPSEL__) || defined(__MIPSEL) || defined(_MIPSEL) || defined(MIPSEL) - CPU=mipsel - #else - #if defined(__MIPSEB__) || defined(__MIPSEB) || defined(_MIPSEB) || defined(MIPSEB) - CPU=mips - #else - CPU= - #endif - #endif -EOF - eval `$CC_FOR_BUILD -E $dummy.c 2>/dev/null | grep ^CPU=` - rm -f $dummy.c - test x"${CPU}" != x && echo "${CPU}-pc-linux-gnu" && exit 0 - ;; - ppc:Linux:*:*) - echo powerpc-unknown-linux-gnu - exit 0 ;; - ppc64:Linux:*:*) - echo powerpc64-unknown-linux-gnu - exit 0 ;; - alpha:Linux:*:*) - case `sed -n '/^cpu model/s/^.*: \(.*\)/\1/p' < /proc/cpuinfo` in - EV5) UNAME_MACHINE=alphaev5 ;; - EV56) UNAME_MACHINE=alphaev56 ;; - PCA56) UNAME_MACHINE=alphapca56 ;; - PCA57) UNAME_MACHINE=alphapca56 ;; - EV6) UNAME_MACHINE=alphaev6 ;; - EV67) UNAME_MACHINE=alphaev67 ;; - EV68*) UNAME_MACHINE=alphaev68 ;; - esac - objdump --private-headers /bin/sh | grep ld.so.1 >/dev/null - if test "$?" = 0 ; then LIBC="libc1" ; else LIBC="" ; fi - echo ${UNAME_MACHINE}-unknown-linux-gnu${LIBC} - exit 0 ;; - parisc:Linux:*:* | hppa:Linux:*:*) - # Look for CPU level - case `grep '^cpu[^a-z]*:' /proc/cpuinfo 2>/dev/null | cut -d' ' -f2` in - PA7*) echo hppa1.1-unknown-linux-gnu ;; - PA8*) echo hppa2.0-unknown-linux-gnu ;; - *) echo hppa-unknown-linux-gnu ;; - esac - exit 0 ;; - parisc64:Linux:*:* | hppa64:Linux:*:*) - echo hppa64-unknown-linux-gnu - exit 0 ;; - s390:Linux:*:* | s390x:Linux:*:*) - echo ${UNAME_MACHINE}-ibm-linux - exit 0 ;; - sh*:Linux:*:*) - echo ${UNAME_MACHINE}-unknown-linux-gnu - exit 0 ;; - sparc:Linux:*:* | sparc64:Linux:*:*) - echo ${UNAME_MACHINE}-unknown-linux-gnu - exit 0 ;; - x86_64:Linux:*:*) - echo x86_64-unknown-linux-gnu - exit 0 ;; - i*86:Linux:*:*) - # The BFD linker knows what the default object file format is, so - # first see if it will tell us. cd to the root directory to prevent - # problems with other programs or directories called `ld' in the path. - # Export LANG=C to prevent ld from outputting information in other - # languages. - ld_supported_targets=`LANG=C; export LANG; cd /; ld --help 2>&1 \ - | sed -ne '/supported targets:/!d - s/[ ][ ]*/ /g - s/.*supported targets: *// - s/ .*// - p'` - case "$ld_supported_targets" in - elf32-i386) - TENTATIVE="${UNAME_MACHINE}-pc-linux-gnu" - ;; - a.out-i386-linux) - echo "${UNAME_MACHINE}-pc-linux-gnuaout" - exit 0 ;; - coff-i386) - echo "${UNAME_MACHINE}-pc-linux-gnucoff" - exit 0 ;; - "") - # Either a pre-BFD a.out linker (linux-gnuoldld) or - # one that does not give us useful --help. - echo "${UNAME_MACHINE}-pc-linux-gnuoldld" - exit 0 ;; - esac - # Determine whether the default compiler is a.out or elf - eval $set_cc_for_build - sed 's/^ //' << EOF >$dummy.c - #include <features.h> - #ifdef __ELF__ - # ifdef __GLIBC__ - # if __GLIBC__ >= 2 - LIBC=gnu - # else - LIBC=gnulibc1 - # endif - # else - LIBC=gnulibc1 - # endif - #else - #ifdef __INTEL_COMPILER - LIBC=gnu - #else - LIBC=gnuaout - #endif - #endif -EOF - eval `$CC_FOR_BUILD -E $dummy.c 2>/dev/null | grep ^LIBC=` - rm -f $dummy.c - test x"${LIBC}" != x && echo "${UNAME_MACHINE}-pc-linux-${LIBC}" && exit 0 - test x"${TENTATIVE}" != x && echo "${TENTATIVE}" && exit 0 - ;; - i*86:DYNIX/ptx:4*:*) - # ptx 4.0 does uname -s correctly, with DYNIX/ptx in there. - # earlier versions are messed up and put the nodename in both - # sysname and nodename. - echo i386-sequent-sysv4 - exit 0 ;; - i*86:UNIX_SV:4.2MP:2.*) - # Unixware is an offshoot of SVR4, but it has its own version - # number series starting with 2... - # I am not positive that other SVR4 systems won't match this, - # I just have to hope. -- rms. - # Use sysv4.2uw... so that sysv4* matches it. - echo ${UNAME_MACHINE}-pc-sysv4.2uw${UNAME_VERSION} - exit 0 ;; - i*86:*:4.*:* | i*86:SYSTEM_V:4.*:*) - UNAME_REL=`echo ${UNAME_RELEASE} | sed 's/\/MP$//'` - if grep Novell /usr/include/link.h >/dev/null 2>/dev/null; then - echo ${UNAME_MACHINE}-univel-sysv${UNAME_REL} - else - echo ${UNAME_MACHINE}-pc-sysv${UNAME_REL} - fi - exit 0 ;; - i*86:*:5:[78]*) - case `/bin/uname -X | grep "^Machine"` in - *486*) UNAME_MACHINE=i486 ;; - *Pentium) UNAME_MACHINE=i586 ;; - *Pent*|*Celeron) UNAME_MACHINE=i686 ;; - esac - echo ${UNAME_MACHINE}-unknown-sysv${UNAME_RELEASE}${UNAME_SYSTEM}${UNAME_VERSION} - exit 0 ;; - i*86:*:3.2:*) - if test -f /usr/options/cb.name; then - UNAME_REL=`sed -n 's/.*Version //p' </usr/options/cb.name` - echo ${UNAME_MACHINE}-pc-isc$UNAME_REL - elif /bin/uname -X 2>/dev/null >/dev/null ; then - UNAME_REL=`(/bin/uname -X|egrep Release|sed -e 's/.*= //')` - (/bin/uname -X|egrep i80486 >/dev/null) && UNAME_MACHINE=i486 - (/bin/uname -X|egrep '^Machine.*Pentium' >/dev/null) \ - && UNAME_MACHINE=i586 - (/bin/uname -X|egrep '^Machine.*Pent ?II' >/dev/null) \ - && UNAME_MACHINE=i686 - (/bin/uname -X|egrep '^Machine.*Pentium Pro' >/dev/null) \ - && UNAME_MACHINE=i686 - echo ${UNAME_MACHINE}-pc-sco$UNAME_REL - else - echo ${UNAME_MACHINE}-pc-sysv32 - fi - exit 0 ;; - i*86:*DOS:*:*) - echo ${UNAME_MACHINE}-pc-msdosdjgpp - exit 0 ;; - pc:*:*:*) - # Left here for compatibility: - # uname -m prints for DJGPP always 'pc', but it prints nothing about - # the processor, so we play safe by assuming i386. - echo i386-pc-msdosdjgpp - exit 0 ;; - Intel:Mach:3*:*) - echo i386-pc-mach3 - exit 0 ;; - paragon:*:*:*) - echo i860-intel-osf1 - exit 0 ;; - i860:*:4.*:*) # i860-SVR4 - if grep Stardent /usr/include/sys/uadmin.h >/dev/null 2>&1 ; then - echo i860-stardent-sysv${UNAME_RELEASE} # Stardent Vistra i860-SVR4 - else # Add other i860-SVR4 vendors below as they are discovered. - echo i860-unknown-sysv${UNAME_RELEASE} # Unknown i860-SVR4 - fi - exit 0 ;; - mini*:CTIX:SYS*5:*) - # "miniframe" - echo m68010-convergent-sysv - exit 0 ;; - M68*:*:R3V[567]*:*) - test -r /sysV68 && echo 'm68k-motorola-sysv' && exit 0 ;; - 3[34]??:*:4.0:3.0 | 3[34]??A:*:4.0:3.0 | 3[34]??,*:*:4.0:3.0 | 3[34]??/*:*:4.0:3.0 | 4850:*:4.0:3.0 | SKA40:*:4.0:3.0) - OS_REL='' - test -r /etc/.relid \ - && OS_REL=.`sed -n 's/[^ ]* [^ ]* \([0-9][0-9]\).*/\1/p' < /etc/.relid` - /bin/uname -p 2>/dev/null | grep 86 >/dev/null \ - && echo i486-ncr-sysv4.3${OS_REL} && exit 0 - /bin/uname -p 2>/dev/null | /bin/grep entium >/dev/null \ - && echo i586-ncr-sysv4.3${OS_REL} && exit 0 ;; - 3[34]??:*:4.0:* | 3[34]??,*:*:4.0:*) - /bin/uname -p 2>/dev/null | grep 86 >/dev/null \ - && echo i486-ncr-sysv4 && exit 0 ;; - m68*:LynxOS:2.*:* | m68*:LynxOS:3.0*:*) - echo m68k-unknown-lynxos${UNAME_RELEASE} - exit 0 ;; - mc68030:UNIX_System_V:4.*:*) - echo m68k-atari-sysv4 - exit 0 ;; - i*86:LynxOS:2.*:* | i*86:LynxOS:3.[01]*:* | i*86:LynxOS:4.0*:*) - echo i386-unknown-lynxos${UNAME_RELEASE} - exit 0 ;; - TSUNAMI:LynxOS:2.*:*) - echo sparc-unknown-lynxos${UNAME_RELEASE} - exit 0 ;; - rs6000:LynxOS:2.*:*) - echo rs6000-unknown-lynxos${UNAME_RELEASE} - exit 0 ;; - PowerPC:LynxOS:2.*:* | PowerPC:LynxOS:3.[01]*:* | PowerPC:LynxOS:4.0*:*) - echo powerpc-unknown-lynxos${UNAME_RELEASE} - exit 0 ;; - SM[BE]S:UNIX_SV:*:*) - echo mips-dde-sysv${UNAME_RELEASE} - exit 0 ;; - RM*:ReliantUNIX-*:*:*) - echo mips-sni-sysv4 - exit 0 ;; - RM*:SINIX-*:*:*) - echo mips-sni-sysv4 - exit 0 ;; - *:SINIX-*:*:*) - if uname -p 2>/dev/null >/dev/null ; then - UNAME_MACHINE=`(uname -p) 2>/dev/null` - echo ${UNAME_MACHINE}-sni-sysv4 - else - echo ns32k-sni-sysv - fi - exit 0 ;; - PENTIUM:*:4.0*:*) # Unisys `ClearPath HMP IX 4000' SVR4/MP effort - # says <Richard.M.Bartel@ccMail.Census.GOV> - echo i586-unisys-sysv4 - exit 0 ;; - *:UNIX_System_V:4*:FTX*) - # From Gerald Hewes <hewes@openmarket.com>. - # How about differentiating between stratus architectures? -djm - echo hppa1.1-stratus-sysv4 - exit 0 ;; - *:*:*:FTX*) - # From seanf@swdc.stratus.com. - echo i860-stratus-sysv4 - exit 0 ;; - *:VOS:*:*) - # From Paul.Green@stratus.com. - echo hppa1.1-stratus-vos - exit 0 ;; - mc68*:A/UX:*:*) - echo m68k-apple-aux${UNAME_RELEASE} - exit 0 ;; - news*:NEWS-OS:6*:*) - echo mips-sony-newsos6 - exit 0 ;; - R[34]000:*System_V*:*:* | R4000:UNIX_SYSV:*:* | R*000:UNIX_SV:*:*) - if [ -d /usr/nec ]; then - echo mips-nec-sysv${UNAME_RELEASE} - else - echo mips-unknown-sysv${UNAME_RELEASE} - fi - exit 0 ;; - BeBox:BeOS:*:*) # BeOS running on hardware made by Be, PPC only. - echo powerpc-be-beos - exit 0 ;; - BeMac:BeOS:*:*) # BeOS running on Mac or Mac clone, PPC only. - echo powerpc-apple-beos - exit 0 ;; - BePC:BeOS:*:*) # BeOS running on Intel PC compatible. - echo i586-pc-beos - exit 0 ;; - SX-4:SUPER-UX:*:*) - echo sx4-nec-superux${UNAME_RELEASE} - exit 0 ;; - SX-5:SUPER-UX:*:*) - echo sx5-nec-superux${UNAME_RELEASE} - exit 0 ;; - Power*:Rhapsody:*:*) - echo powerpc-apple-rhapsody${UNAME_RELEASE} - exit 0 ;; - *:Rhapsody:*:*) - echo ${UNAME_MACHINE}-apple-rhapsody${UNAME_RELEASE} - exit 0 ;; - *:Darwin:*:*) - echo `uname -p`-apple-darwin${UNAME_RELEASE} - exit 0 ;; - *:procnto*:*:* | *:QNX:[0123456789]*:*) - if test "${UNAME_MACHINE}" = "x86pc"; then - UNAME_MACHINE=pc - echo i386-${UNAME_MACHINE}-nto-qnx - else - echo `uname -p`-${UNAME_MACHINE}-nto-qnx - fi - exit 0 ;; - *:QNX:*:4*) - echo i386-pc-qnx - exit 0 ;; - NSR-[GKLNPTVW]:NONSTOP_KERNEL:*:*) - echo nsr-tandem-nsk${UNAME_RELEASE} - exit 0 ;; - *:NonStop-UX:*:*) - echo mips-compaq-nonstopux - exit 0 ;; - BS2000:POSIX*:*:*) - echo bs2000-siemens-sysv - exit 0 ;; - DS/*:UNIX_System_V:*:*) - echo ${UNAME_MACHINE}-${UNAME_SYSTEM}-${UNAME_RELEASE} - exit 0 ;; - *:Plan9:*:*) - # "uname -m" is not consistent, so use $cputype instead. 386 - # is converted to i386 for consistency with other x86 - # operating systems. - if test "$cputype" = "386"; then - UNAME_MACHINE=i386 - else - UNAME_MACHINE="$cputype" - fi - echo ${UNAME_MACHINE}-unknown-plan9 - exit 0 ;; - i*86:OS/2:*:*) - # If we were able to find `uname', then EMX Unix compatibility - # is probably installed. - echo ${UNAME_MACHINE}-pc-os2-emx - exit 0 ;; - *:TOPS-10:*:*) - echo pdp10-unknown-tops10 - exit 0 ;; - *:TENEX:*:*) - echo pdp10-unknown-tenex - exit 0 ;; - KS10:TOPS-20:*:* | KL10:TOPS-20:*:* | TYPE4:TOPS-20:*:*) - echo pdp10-dec-tops20 - exit 0 ;; - XKL-1:TOPS-20:*:* | TYPE5:TOPS-20:*:*) - echo pdp10-xkl-tops20 - exit 0 ;; - *:TOPS-20:*:*) - echo pdp10-unknown-tops20 - exit 0 ;; - *:ITS:*:*) - echo pdp10-unknown-its - exit 0 ;; - i*86:XTS-300:*:STOP) - echo ${UNAME_MACHINE}-unknown-stop - exit 0 ;; - i*86:atheos:*:*) - echo ${UNAME_MACHINE}-unknown-atheos - exit 0 ;; -esac - -#echo '(No uname command or uname output not recognized.)' 1>&2 -#echo "${UNAME_MACHINE}:${UNAME_SYSTEM}:${UNAME_RELEASE}:${UNAME_VERSION}" 1>&2 - -eval $set_cc_for_build -cat >$dummy.c <<EOF -#ifdef _SEQUENT_ -# include <sys/types.h> -# include <sys/utsname.h> -#endif -main () -{ -#if defined (sony) -#if defined (MIPSEB) - /* BFD wants "bsd" instead of "newsos". Perhaps BFD should be changed, - I don't know.... */ - printf ("mips-sony-bsd\n"); exit (0); -#else -#include <sys/param.h> - printf ("m68k-sony-newsos%s\n", -#ifdef NEWSOS4 - "4" -#else - "" -#endif - ); exit (0); -#endif -#endif - -#if defined (__arm) && defined (__acorn) && defined (__unix) - printf ("arm-acorn-riscix"); exit (0); -#endif - -#if defined (hp300) && !defined (hpux) - printf ("m68k-hp-bsd\n"); exit (0); -#endif - -#if defined (NeXT) -#if !defined (__ARCHITECTURE__) -#define __ARCHITECTURE__ "m68k" -#endif - int version; - version=`(hostinfo | sed -n 's/.*NeXT Mach \([0-9]*\).*/\1/p') 2>/dev/null`; - if (version < 4) - printf ("%s-next-nextstep%d\n", __ARCHITECTURE__, version); - else - printf ("%s-next-openstep%d\n", __ARCHITECTURE__, version); - exit (0); -#endif - -#if defined (MULTIMAX) || defined (n16) -#if defined (UMAXV) - printf ("ns32k-encore-sysv\n"); exit (0); -#else -#if defined (CMU) - printf ("ns32k-encore-mach\n"); exit (0); -#else - printf ("ns32k-encore-bsd\n"); exit (0); -#endif -#endif -#endif - -#if defined (__386BSD__) - printf ("i386-pc-bsd\n"); exit (0); -#endif - -#if defined (sequent) -#if defined (i386) - printf ("i386-sequent-dynix\n"); exit (0); -#endif -#if defined (ns32000) - printf ("ns32k-sequent-dynix\n"); exit (0); -#endif -#endif - -#if defined (_SEQUENT_) - struct utsname un; - - uname(&un); - - if (strncmp(un.version, "V2", 2) == 0) { - printf ("i386-sequent-ptx2\n"); exit (0); - } - if (strncmp(un.version, "V1", 2) == 0) { /* XXX is V1 correct? */ - printf ("i386-sequent-ptx1\n"); exit (0); - } - printf ("i386-sequent-ptx\n"); exit (0); - -#endif - -#if defined (vax) -# if !defined (ultrix) -# include <sys/param.h> -# if defined (BSD) -# if BSD == 43 - printf ("vax-dec-bsd4.3\n"); exit (0); -# else -# if BSD == 199006 - printf ("vax-dec-bsd4.3reno\n"); exit (0); -# else - printf ("vax-dec-bsd\n"); exit (0); -# endif -# endif -# else - printf ("vax-dec-bsd\n"); exit (0); -# endif -# else - printf ("vax-dec-ultrix\n"); exit (0); -# endif -#endif - -#if defined (alliant) && defined (i860) - printf ("i860-alliant-bsd\n"); exit (0); -#endif - - exit (1); -} -EOF - -$CC_FOR_BUILD $dummy.c -o $dummy 2>/dev/null && ./$dummy && rm -f $dummy.c $dummy && exit 0 -rm -f $dummy.c $dummy - -# Apollos put the system type in the environment. - -test -d /usr/apollo && { echo ${ISP}-apollo-${SYSTYPE}; exit 0; } - -# Convex versions that predate uname can use getsysinfo(1) - -if [ -x /usr/convex/getsysinfo ] -then - case `getsysinfo -f cpu_type` in - c1*) - echo c1-convex-bsd - exit 0 ;; - c2*) - if getsysinfo -f scalar_acc - then echo c32-convex-bsd - else echo c2-convex-bsd - fi - exit 0 ;; - c34*) - echo c34-convex-bsd - exit 0 ;; - c38*) - echo c38-convex-bsd - exit 0 ;; - c4*) - echo c4-convex-bsd - exit 0 ;; - esac -fi - -cat >&2 <<EOF -$0: unable to guess system type - -This script, last modified $timestamp, has failed to recognize -the operating system you are using. It is advised that you -download the most up to date version of the config scripts from - - ftp://ftp.gnu.org/pub/gnu/config/ - -If the version you run ($0) is already up to date, please -send the following data and any information you think might be -pertinent to <config-patches@gnu.org> in order to provide the needed -information to handle your system. - -config.guess timestamp = $timestamp - -uname -m = `(uname -m) 2>/dev/null || echo unknown` -uname -r = `(uname -r) 2>/dev/null || echo unknown` -uname -s = `(uname -s) 2>/dev/null || echo unknown` -uname -v = `(uname -v) 2>/dev/null || echo unknown` - -/usr/bin/uname -p = `(/usr/bin/uname -p) 2>/dev/null` -/bin/uname -X = `(/bin/uname -X) 2>/dev/null` - -hostinfo = `(hostinfo) 2>/dev/null` -/bin/universe = `(/bin/universe) 2>/dev/null` -/usr/bin/arch -k = `(/usr/bin/arch -k) 2>/dev/null` -/bin/arch = `(/bin/arch) 2>/dev/null` -/usr/bin/oslevel = `(/usr/bin/oslevel) 2>/dev/null` -/usr/convex/getsysinfo = `(/usr/convex/getsysinfo) 2>/dev/null` - -UNAME_MACHINE = ${UNAME_MACHINE} -UNAME_RELEASE = ${UNAME_RELEASE} -UNAME_SYSTEM = ${UNAME_SYSTEM} -UNAME_VERSION = ${UNAME_VERSION} -EOF - -exit 1 - -# Local variables: -# eval: (add-hook 'write-file-hooks 'time-stamp) -# time-stamp-start: "timestamp='" -# time-stamp-format: "%:y-%02m-%02d" -# time-stamp-end: "'" -# End: +#!/bin/sh +# Use the top-level config.guess so that we don't have two of them. +guesssys=`echo $0 | sed 's|config.guess|../config.guess|'` +exec ${guesssys} "$@" diff --git a/contrib/gcc/config/arm/arm.c b/contrib/gcc/config/arm/arm.c index f07a281..8c696c6 100644 --- a/contrib/gcc/config/arm/arm.c +++ b/contrib/gcc/config/arm/arm.c @@ -890,6 +890,7 @@ use_return_insn (iscond) { int regno; unsigned int func_type; + unsigned long saved_int_regs; /* Never use a return instruction before reload has run. */ if (!reload_completed) @@ -912,23 +913,31 @@ use_return_insn (iscond) && !frame_pointer_needed)) return 0; + saved_int_regs = arm_compute_save_reg_mask (); + /* Can't be done if interworking with Thumb, and any registers have been - stacked. Similarly, on StrongARM, conditional returns are expensive - if they aren't taken and registers have been stacked. */ - if (iscond && arm_is_strong && frame_pointer_needed) + stacked. */ + if (TARGET_INTERWORK && saved_int_regs != 0) return 0; - - if ((iscond && arm_is_strong) - || TARGET_INTERWORK) + + /* On StrongARM, conditional returns are expensive if they aren't + taken and multiple registers have been stacked. */ + if (iscond && arm_is_strong) { - for (regno = 0; regno <= LAST_ARM_REGNUM; regno++) - if (regs_ever_live[regno] && !call_used_regs[regno]) - return 0; + /* Conditional return when just the LR is stored is a simple + conditional-load instruction, that's not expensive. */ + if (saved_int_regs != 0 && saved_int_regs != (1 << LR_REGNUM)) + return 0; if (flag_pic && regs_ever_live[PIC_OFFSET_TABLE_REGNUM]) return 0; } - + + /* If there are saved registers but the LR isn't saved, then we need + two instructions for the return. */ + if (saved_int_regs && !(saved_int_regs & (1 << LR_REGNUM))) + return 0; + /* Can't be done if any of the FPU regs are pushed, since this also requires an insn. */ if (TARGET_HARD_FLOAT) diff --git a/contrib/gcc/config/i386/linux64.h b/contrib/gcc/config/i386/linux64.h index 8a0bfbe..34c6d3c 100644 --- a/contrib/gcc/config/i386/linux64.h +++ b/contrib/gcc/config/i386/linux64.h @@ -30,6 +30,12 @@ Boston, MA 02111-1307, USA. */ #undef CPP_SPEC #define CPP_SPEC "%(cpp_cpu) %{fPIC:-D__PIC__ -D__pic__} %{fpic:-D__PIC__ -D__pic__} %{posix:-D_POSIX_SOURCE} %{pthread:-D_REENTRANT} %{!m32:-D__LONG_MAX__=9223372036854775807L}" +/* The svr4 ABI for the i386 says that records and unions are returned + in memory. In the 64bit compilation we will turn this flag off in + override_options, as we never do pcc_struct_return scheme on this target. */ +#undef DEFAULT_PCC_STRUCT_RETURN +#define DEFAULT_PCC_STRUCT_RETURN 1 + /* Provide a LINK_SPEC. Here we provide support for the special GCC options -static and -shared, which allow us to link things in one of these three modes by applying the appropriate combinations of diff --git a/contrib/gcc/config/i386/mmintrin.h b/contrib/gcc/config/i386/mmintrin.h index 88e384f..bbfdd30 100644 --- a/contrib/gcc/config/i386/mmintrin.h +++ b/contrib/gcc/config/i386/mmintrin.h @@ -31,7 +31,7 @@ #define _MMINTRIN_H_INCLUDED /* The data type intended for user use. */ -typedef unsigned long long __m64 __attribute__ ((__aligned__ (8))); +typedef int __m64 __attribute__ ((__mode__ (__V2SI__))); /* Internal data types for implementing the intrinsics. */ typedef int __v2si __attribute__ ((__mode__ (__V2SI__))); @@ -49,14 +49,16 @@ _mm_empty (void) static __inline __m64 _mm_cvtsi32_si64 (int __i) { - return (unsigned int) __i; + long long __tmp = (unsigned int)__i; + return (__m64) __tmp; } /* Convert the lower 32 bits of the __m64 object into an integer. */ static __inline int _mm_cvtsi64_si32 (__m64 __i) { - return __i; + long long __tmp = (long long)__i; + return __tmp; } /* Pack the four 16-bit values from M1 into the lower four 8-bit values of @@ -269,7 +271,7 @@ _mm_mullo_pi16 (__m64 __m1, __m64 __m2) static __inline __m64 _mm_sll_pi16 (__m64 __m, __m64 __count) { - return (__m64) __builtin_ia32_psllw ((__v4hi)__m, __count); + return (__m64) __builtin_ia32_psllw ((__v4hi)__m, (long long)__count); } static __inline __m64 @@ -282,7 +284,7 @@ _mm_slli_pi16 (__m64 __m, int __count) static __inline __m64 _mm_sll_pi32 (__m64 __m, __m64 __count) { - return (__m64) __builtin_ia32_pslld ((__v2si)__m, __count); + return (__m64) __builtin_ia32_pslld ((__v2si)__m, (long long)__count); } static __inline __m64 @@ -293,22 +295,22 @@ _mm_slli_pi32 (__m64 __m, int __count) /* Shift the 64-bit value in M left by COUNT. */ static __inline __m64 -_mm_sll_pi64 (__m64 __m, __m64 __count) +_mm_sll_si64 (__m64 __m, __m64 __count) { - return (__m64) __builtin_ia32_psllq (__m, __count); + return (__m64) __builtin_ia32_psllq ((long long)__m, (long long)__count); } static __inline __m64 -_mm_slli_pi64 (__m64 __m, int __count) +_mm_slli_si64 (__m64 __m, int __count) { - return (__m64) __builtin_ia32_psllq (__m, __count); + return (__m64) __builtin_ia32_psllq ((long long)__m, (long long)__count); } /* Shift four 16-bit values in M right by COUNT; shift in the sign bit. */ static __inline __m64 _mm_sra_pi16 (__m64 __m, __m64 __count) { - return (__m64) __builtin_ia32_psraw ((__v4hi)__m, __count); + return (__m64) __builtin_ia32_psraw ((__v4hi)__m, (long long)__count); } static __inline __m64 @@ -321,7 +323,7 @@ _mm_srai_pi16 (__m64 __m, int __count) static __inline __m64 _mm_sra_pi32 (__m64 __m, __m64 __count) { - return (__m64) __builtin_ia32_psrad ((__v2si)__m, __count); + return (__m64) __builtin_ia32_psrad ((__v2si)__m, (long long)__count); } static __inline __m64 @@ -334,7 +336,7 @@ _mm_srai_pi32 (__m64 __m, int __count) static __inline __m64 _mm_srl_pi16 (__m64 __m, __m64 __count) { - return (__m64) __builtin_ia32_psrlw ((__v4hi)__m, __count); + return (__m64) __builtin_ia32_psrlw ((__v4hi)__m, (long long)__count); } static __inline __m64 @@ -347,7 +349,7 @@ _mm_srli_pi16 (__m64 __m, int __count) static __inline __m64 _mm_srl_pi32 (__m64 __m, __m64 __count) { - return (__m64) __builtin_ia32_psrld ((__v2si)__m, __count); + return (__m64) __builtin_ia32_psrld ((__v2si)__m, (long long)__count); } static __inline __m64 @@ -358,22 +360,22 @@ _mm_srli_pi32 (__m64 __m, int __count) /* Shift the 64-bit value in M left by COUNT; shift in zeros. */ static __inline __m64 -_mm_srl_pi64 (__m64 __m, __m64 __count) +_mm_srl_si64 (__m64 __m, __m64 __count) { - return (__m64) __builtin_ia32_psrlq (__m, __count); + return (__m64) __builtin_ia32_psrlq ((long long)__m, (long long)__count); } static __inline __m64 -_mm_srli_pi64 (__m64 __m, int __count) +_mm_srli_si64 (__m64 __m, int __count) { - return (__m64) __builtin_ia32_psrlq (__m, __count); + return (__m64) __builtin_ia32_psrlq ((long long)__m, (long long)__count); } /* Bit-wise AND the 64-bit values in M1 and M2. */ static __inline __m64 _mm_and_si64 (__m64 __m1, __m64 __m2) { - return __builtin_ia32_pand (__m1, __m2); + return (__m64) __builtin_ia32_pand ((long long)__m1, (long long)__m2); } /* Bit-wise complement the 64-bit value in M1 and bit-wise AND it with the @@ -381,21 +383,21 @@ _mm_and_si64 (__m64 __m1, __m64 __m2) static __inline __m64 _mm_andnot_si64 (__m64 __m1, __m64 __m2) { - return __builtin_ia32_pandn (__m1, __m2); + return (__m64) __builtin_ia32_pandn ((long long)__m1, (long long)__m2); } /* Bit-wise inclusive OR the 64-bit values in M1 and M2. */ static __inline __m64 _mm_or_si64 (__m64 __m1, __m64 __m2) { - return __builtin_ia32_por (__m1, __m2); + return (__m64)__builtin_ia32_por ((long long)__m1, (long long)__m2); } /* Bit-wise exclusive OR the 64-bit values in M1 and M2. */ static __inline __m64 _mm_xor_si64 (__m64 __m1, __m64 __m2) { - return __builtin_ia32_pxor (__m1, __m2); + return (__m64)__builtin_ia32_pxor ((long long)__m1, (long long)__m2); } /* Compare eight 8-bit values. The result of the comparison is 0xFF if the @@ -444,7 +446,7 @@ _mm_cmpgt_pi32 (__m64 __m1, __m64 __m2) static __inline __m64 _mm_setzero_si64 (void) { - return __builtin_ia32_mmx_zero (); + return (__m64)__builtin_ia32_mmx_zero (); } /* Creates a vector of two 32-bit values; I0 is least significant. */ diff --git a/contrib/gcc/config/i386/xmmintrin.h b/contrib/gcc/config/i386/xmmintrin.h index 9f9f2f9..409bf17 100644 --- a/contrib/gcc/config/i386/xmmintrin.h +++ b/contrib/gcc/config/i386/xmmintrin.h @@ -245,13 +245,21 @@ _mm_cmple_ss (__m128 __A, __m128 __B) static __inline __m128 _mm_cmpgt_ss (__m128 __A, __m128 __B) { - return (__m128) __builtin_ia32_cmpgtss ((__v4sf)__A, (__v4sf)__B); + return (__m128) __builtin_ia32_movss ((__v4sf) __A, + (__v4sf) + __builtin_ia32_cmpltss ((__v4sf) __B, + (__v4sf) + __A)); } static __inline __m128 _mm_cmpge_ss (__m128 __A, __m128 __B) { - return (__m128) __builtin_ia32_cmpgess ((__v4sf)__A, (__v4sf)__B); + return (__m128) __builtin_ia32_movss ((__v4sf) __A, + (__v4sf) + __builtin_ia32_cmpless ((__v4sf) __B, + (__v4sf) + __A)); } static __inline __m128 @@ -275,13 +283,21 @@ _mm_cmpnle_ss (__m128 __A, __m128 __B) static __inline __m128 _mm_cmpngt_ss (__m128 __A, __m128 __B) { - return (__m128) __builtin_ia32_cmpngtss ((__v4sf)__A, (__v4sf)__B); + return (__m128) __builtin_ia32_movss ((__v4sf) __A, + (__v4sf) + __builtin_ia32_cmpnltss ((__v4sf) __B, + (__v4sf) + __A)); } static __inline __m128 _mm_cmpnge_ss (__m128 __A, __m128 __B) { - return (__m128) __builtin_ia32_cmpngess ((__v4sf)__A, (__v4sf)__B); + return (__m128) __builtin_ia32_movss ((__v4sf) __A, + (__v4sf) + __builtin_ia32_cmpnless ((__v4sf) __B, + (__v4sf) + __A)); } static __inline __m128 @@ -1017,7 +1033,7 @@ _mm_prefetch (void *__P, enum _mm_hint __I) static __inline void _mm_stream_pi (__m64 *__P, __m64 __A) { - __builtin_ia32_movntq (__P, __A); + __builtin_ia32_movntq (__P, (long long)__A); } /* Likewise. The address must be 16-byte aligned. */ @@ -1049,8 +1065,8 @@ _mm_pause (void) do { \ __v4sf __r0 = (row0), __r1 = (row1), __r2 = (row2), __r3 = (row3); \ __v4sf __t0 = __builtin_ia32_shufps (__r0, __r1, 0x44); \ - __v4sf __t1 = __builtin_ia32_shufps (__r0, __r1, 0xEE); \ - __v4sf __t2 = __builtin_ia32_shufps (__r2, __r3, 0x44); \ + __v4sf __t2 = __builtin_ia32_shufps (__r0, __r1, 0xEE); \ + __v4sf __t1 = __builtin_ia32_shufps (__r2, __r3, 0x44); \ __v4sf __t3 = __builtin_ia32_shufps (__r2, __r3, 0xEE); \ (row0) = __builtin_ia32_shufps (__t0, __t1, 0x88); \ (row1) = __builtin_ia32_shufps (__t0, __t1, 0xDD); \ diff --git a/contrib/gcc/config/rs6000/rs6000.c b/contrib/gcc/config/rs6000/rs6000.c index ad9df44..2adb119 100644 --- a/contrib/gcc/config/rs6000/rs6000.c +++ b/contrib/gcc/config/rs6000/rs6000.c @@ -2011,6 +2011,7 @@ rs6000_legitimate_address (mode, x, reg_ok_strict) if (LEGITIMATE_INDIRECT_ADDRESS_P (x, reg_ok_strict)) return 1; if ((GET_CODE (x) == PRE_INC || GET_CODE (x) == PRE_DEC) + && !ALTIVEC_VECTOR_MODE (mode) && TARGET_UPDATE && LEGITIMATE_INDIRECT_ADDRESS_P (XEXP (x, 0), reg_ok_strict)) return 1; @@ -6920,7 +6921,7 @@ rs6000_reverse_condition (mode, code) { /* Reversal of FP compares takes care -- an ordered compare becomes an unordered compare and vice versa. */ - if (mode == CCFPmode) + if (mode == CCFPmode && !flag_unsafe_math_optimizations) return reverse_condition_maybe_unordered (code); else return reverse_condition (code); @@ -7073,7 +7074,14 @@ output_cbranch (op, label, reversed, insn) reverse_condition_maybe_unordered here always but this makes the resulting assembler clearer. */ if (really_reversed) - code = rs6000_reverse_condition (mode, code); + { + /* Reversal of FP compares takes care -- an ordered compare + becomes an unordered compare and vice versa. */ + if (mode == CCFPmode) + code = reverse_condition_maybe_unordered (code); + else + code = reverse_condition (code); + } switch (code) { diff --git a/contrib/gcc/config/s390/fixdfdi.h b/contrib/gcc/config/s390/fixdfdi.h new file mode 100644 index 0000000..4f1fb35 --- /dev/null +++ b/contrib/gcc/config/s390/fixdfdi.h @@ -0,0 +1,301 @@ +/* Definitions of target machine for GNU compiler, for IBM S/390 + Copyright (C) 1999, 2000, 2001 Free Software Foundation, Inc. + Contributed by Hartmut Penner (hpenner@de.ibm.com) and + Ulrich Weigand (uweigand@de.ibm.com). + +This file is part of GNU CC. + +GNU CC is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2, or (at your option) +any later version. + +GNU CC is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with GNU CC; see the file COPYING. If not, write to +the Free Software Foundation, 59 Temple Place - Suite 330, +Boston, MA 02111-1307, USA. */ + +#ifdef L_fixunsdfdi +#define EXPD(fp) (((fp.l.upper) >> 20) & 0x7FF) +#define EXCESSD 1022 +#define SIGNBIT 0x80000000 +#define SIGND(fp) ((fp.l.upper) & SIGNBIT) +#define MANTD_LL(fp) ((fp.ll & (HIDDEND_LL-1)) | HIDDEND_LL) +#define FRACD_LL(fp) (fp.ll & (HIDDEND_LL-1)) +#define HIDDEND_LL ((UDItype_x)1 << 52) + +typedef int DItype_x __attribute__ ((mode (DI))); +typedef unsigned int UDItype_x __attribute__ ((mode (DI))); +typedef int SItype_x __attribute__ ((mode (SI))); +typedef unsigned int USItype_x __attribute__ ((mode (SI))); + +union double_long { + double d; + struct { + SItype_x upper; + USItype_x lower; + } l; + UDItype_x ll; +}; + + +/* convert double to unsigned int */ +UDItype_x +__fixunsdfdi (double a1) +{ + register union double_long dl1; + register int exp; + register UDItype_x l; + + dl1.d = a1; + + /* +/- 0, denormalized, negativ */ + + if (!EXPD (dl1) || SIGND(dl1)) + return 0; + + exp = EXPD (dl1) - EXCESSD - 53; + + /* number < 1 */ + + if (exp < -53) + return 0; + + /* NaN */ + + if ((EXPD(dl1) == 0x7ff) && (FRACD_LL(dl1) != 0)) /* NaN */ + return 0x0ULL; + + /* Number big number & + inf */ + + if (exp >= 12) { + return 0xFFFFFFFFFFFFFFFFULL; + } + + l = MANTD_LL(dl1); + + /* shift down until exp < 12 or l = 0 */ + if (exp > 0) + l <<= exp; + else + l >>= -exp; + + return l; +} +#define __fixunsdfdi ___fixunsdfdi +#endif +#undef L_fixunsdfdi + +#ifdef L_fixdfdi +#define EXPD(fp) (((fp.l.upper) >> 20) & 0x7FF) +#define EXCESSD 1022 +#define SIGNBIT 0x80000000 +#define SIGND(fp) ((fp.l.upper) & SIGNBIT) +#define MANTD_LL(fp) ((fp.ll & (HIDDEND_LL-1)) | HIDDEND_LL) +#define FRACD_LL(fp) (fp.ll & (HIDDEND_LL-1)) +#define HIDDEND_LL ((UDItype_x)1 << 52) + +typedef int DItype_x __attribute__ ((mode (DI))); +typedef unsigned int UDItype_x __attribute__ ((mode (DI))); +typedef int SItype_x __attribute__ ((mode (SI))); +typedef unsigned int USItype_x __attribute__ ((mode (SI))); + +union double_long { + double d; + struct { + SItype_x upper; + USItype_x lower; + } l; + UDItype_x ll; +}; + +/* convert double to int */ +DItype_x +__fixdfdi (double a1) +{ + register union double_long dl1; + register int exp; + register DItype_x l; + + dl1.d = a1; + + /* +/- 0, denormalized */ + + if (!EXPD (dl1)) + return 0; + + exp = EXPD (dl1) - EXCESSD - 53; + + /* number < 1 */ + + if (exp < -53) + return 0; + + /* NaN */ + + if ((EXPD(dl1) == 0x7ff) && (FRACD_LL(dl1) != 0)) /* NaN */ + return 0x8000000000000000ULL; + + /* Number big number & +/- inf */ + + if (exp >= 11) { + l = (long long)1<<63; + if (!SIGND(dl1)) + l--; + return l; + } + + l = MANTD_LL(dl1); + + /* shift down until exp < 12 or l = 0 */ + if (exp > 0) + l <<= exp; + else + l >>= -exp; + + return (SIGND (dl1) ? -l : l); +} +#define __fixdfdi ___fixdfdi +#endif +#undef L_fixdfdi + +#ifdef L_fixunssfdi +#define EXP(fp) (((fp.l) >> 23) & 0xFF) +#define EXCESS 126 +#define SIGNBIT 0x80000000 +#define SIGN(fp) ((fp.l) & SIGNBIT) +#define HIDDEN (1 << 23) +#define MANT(fp) (((fp.l) & 0x7FFFFF) | HIDDEN) +#define FRAC(fp) ((fp.l) & 0x7FFFFF) + +typedef int DItype_x __attribute__ ((mode (DI))); +typedef unsigned int UDItype_x __attribute__ ((mode (DI))); +typedef int SItype_x __attribute__ ((mode (SI))); +typedef unsigned int USItype_x __attribute__ ((mode (SI))); + +union float_long + { + float f; + USItype_x l; + }; + +/* convert float to unsigned int */ +UDItype_x +__fixunssfdi (float a1) +{ + register union float_long fl1; + register int exp; + register UDItype_x l; + + fl1.f = a1; + + /* +/- 0, denormalized, negativ */ + + if (!EXP (fl1) || SIGN(fl1)) + return 0; + + exp = EXP (fl1) - EXCESS - 24; + + /* number < 1 */ + + if (exp < -24) + return 0; + + /* NaN */ + + if ((EXP(fl1) == 0xff) && (FRAC(fl1) != 0)) /* NaN */ + return 0x0ULL; + + /* Number big number & + inf */ + + if (exp >= 41) { + return 0xFFFFFFFFFFFFFFFFULL; + } + + l = MANT(fl1); + + if (exp > 0) + l <<= exp; + else + l >>= -exp; + + return l; +} +#define __fixunssfdi ___fixunssfdi +#endif +#undef L_fixunssfdi + +#ifdef L_fixsfdi +#define EXP(fp) (((fp.l) >> 23) & 0xFF) +#define EXCESS 126 +#define SIGNBIT 0x80000000 +#define SIGN(fp) ((fp.l) & SIGNBIT) +#define HIDDEN (1 << 23) +#define MANT(fp) (((fp.l) & 0x7FFFFF) | HIDDEN) +#define FRAC(fp) ((fp.l) & 0x7FFFFF) + +typedef int DItype_x __attribute__ ((mode (DI))); +typedef unsigned int UDItype_x __attribute__ ((mode (DI))); +typedef int SItype_x __attribute__ ((mode (SI))); +typedef unsigned int USItype_x __attribute__ ((mode (SI))); + +union float_long + { + float f; + USItype_x l; + }; + +/* convert double to int */ +DItype_x +__fixsfdi (float a1) +{ + register union float_long fl1; + register int exp; + register DItype_x l; + + fl1.f = a1; + + /* +/- 0, denormalized */ + + if (!EXP (fl1)) + return 0; + + exp = EXP (fl1) - EXCESS - 24; + + /* number < 1 */ + + if (exp < -24) + return 0; + + /* NaN */ + + if ((EXP(fl1) == 0xff) && (FRAC(fl1) != 0)) /* NaN */ + return 0x8000000000000000ULL; + + /* Number big number & +/- inf */ + + if (exp >= 40) { + l = (long long)1<<63; + if (!SIGN(fl1)) + l--; + return l; + } + + l = MANT(fl1); + + if (exp > 0) + l <<= exp; + else + l >>= -exp; + + return (SIGN (fl1) ? -l : l); +} +#define __fixsfdi ___fixsfdi +#endif +#undef L_fixsfdi + diff --git a/contrib/gcc/config/s390/libgcc-glibc.ver b/contrib/gcc/config/s390/libgcc-glibc.ver new file mode 100644 index 0000000..9a42151 --- /dev/null +++ b/contrib/gcc/config/s390/libgcc-glibc.ver @@ -0,0 +1,21 @@ +# In order to work around the very problems that force us to now generally +# create a libgcc.so, glibc reexported a number of routines from libgcc.a. +# By now choosing the same version tags for these specific routines, we +# maintain enough binary compatibility to allow future versions of glibc +# to defer implementation of these routines to libgcc.so via DT_AUXILIARY. + +# Note that we cannot use the default libgcc-glibc.ver file on s390x, +# because GLIBC_2.0 does not exist on this architecture, as the first +# ever glibc release on the platform was GLIBC_2.2. + +%inherit GCC_3.0 GLIBC_2.2 +GLIBC_2.2 { + __register_frame + __register_frame_table + __deregister_frame + __register_frame_info + __deregister_frame_info + __frame_state_for + __register_frame_info_table +} + diff --git a/contrib/gcc/config/s390/linux.h b/contrib/gcc/config/s390/linux.h new file mode 100644 index 0000000..a0336bf --- /dev/null +++ b/contrib/gcc/config/s390/linux.h @@ -0,0 +1,308 @@ +/* Definitions for Linux for S/390. + Copyright (C) 1999, 2000, 2001, 2002 Free Software Foundation, Inc. + Contributed by Hartmut Penner (hpenner@de.ibm.com) and + Ulrich Weigand (uweigand@de.ibm.com). + +This file is part of GNU CC. + +GNU CC is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2, or (at your option) +any later version. + +GNU CC is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with GNU CC; see the file COPYING. If not, write to +the Free Software Foundation, 59 Temple Place - Suite 330, +Boston, MA 02111-1307, USA. */ + +#ifndef _LINUX_H +#define _LINUX_H + +/* Target specific version string. */ + +#ifdef DEFAULT_TARGET_64BIT +#undef TARGET_VERSION +#define TARGET_VERSION fprintf (stderr, " (Linux for zSeries)"); +#else +#undef TARGET_VERSION +#define TARGET_VERSION fprintf (stderr, " (Linux for S/390)"); +#endif + + +/* Target specific type definitions. */ + +/* ??? Do we really want long as size_t on 31-bit? */ +#undef SIZE_TYPE +#define SIZE_TYPE (TARGET_64BIT ? "long unsigned int" : "long unsigned int") +#undef PTRDIFF_TYPE +#define PTRDIFF_TYPE (TARGET_64BIT ? "long int" : "int") + +#undef WCHAR_TYPE +#define WCHAR_TYPE "int" +#undef WCHAR_TYPE_SIZE +#define WCHAR_TYPE_SIZE 32 + + +/* Target specific preprocessor settings. */ + +#define NO_BUILTIN_SIZE_TYPE +#define NO_BUILTIN_PTRDIFF_TYPE + +#define CPP_PREDEFINES \ + "-Dunix -Asystem(unix) -D__gnu_linux__ -Dlinux -Asystem(linux) -D__ELF__ \ + -Acpu(s390) -Amachine(s390) -D__s390__" + +#define CPP_ARCH31_SPEC \ + "-D__SIZE_TYPE__=long\\ unsigned\\ int -D__PTRDIFF_TYPE__=int" +#define CPP_ARCH64_SPEC \ + "-D__SIZE_TYPE__=long\\ unsigned\\ int -D__PTRDIFF_TYPE__=long\\ int \ + -D__s390x__ -D__LONG_MAX__=9223372036854775807L" + +#ifdef DEFAULT_TARGET_64BIT +#undef CPP_SPEC +#define CPP_SPEC "%{m31:%(cpp_arch31)} %{!m31:%(cpp_arch64)}" +#else +#undef CPP_SPEC +#define CPP_SPEC "%{m64:%(cpp_arch64)} %{!m64:%(cpp_arch31)}" +#endif + + +/* Target specific compiler settings. */ + +/* ??? -fcaller-saves sometimes doesn't work. Fix this! */ +#undef CC1_SPEC +#define CC1_SPEC "-fno-caller-saves" +#undef CC1PLUS_SPEC +#define CC1PLUS_SPEC "-fno-caller-saves" + + +/* Target specific assembler settings. */ + +#ifdef DEFAULT_TARGET_64BIT +#undef ASM_SPEC +#define ASM_SPEC "%{m31:-m31 -Aesa}" +#else +#undef ASM_SPEC +#define ASM_SPEC "%{m64:-m64 -Aesame}" +#endif + + +/* Target specific linker settings. */ + +#define LINK_ARCH31_SPEC \ + "-m elf_s390 \ + %{shared:-shared} \ + %{!shared: \ + %{static:-static} \ + %{!static: \ + %{rdynamic:-export-dynamic} \ + %{!dynamic-linker:-dynamic-linker /lib/ld.so.1}}}" + +#define LINK_ARCH64_SPEC \ + "-m elf64_s390 \ + %{shared:-shared} \ + %{!shared: \ + %{static:-static} \ + %{!static: \ + %{rdynamic:-export-dynamic} \ + %{!dynamic-linker:-dynamic-linker /lib/ld64.so.1}}}" + +#ifdef DEFAULT_TARGET_64BIT +#undef LINK_SPEC +#define LINK_SPEC "%{m31:%(link_arch31)} %{!m31:%(link_arch64)}" +#else +#undef LINK_SPEC +#define LINK_SPEC "%{m64:%(link_arch64)} %{!m64:%(link_arch31)}" +#endif + + +/* This macro defines names of additional specifications to put in the specs + that can be used in various specifications like CC1_SPEC. Its definition + is an initializer with a subgrouping for each command option. */ + +#define EXTRA_SPECS \ + { "cpp_arch31", CPP_ARCH31_SPEC }, \ + { "cpp_arch64", CPP_ARCH64_SPEC }, \ + { "link_arch31", LINK_ARCH31_SPEC }, \ + { "link_arch64", LINK_ARCH64_SPEC }, \ + + +/* Character to start a comment. */ + +#define ASM_COMMENT_START "#" + + +/* Assembler pseudos to introduce constants of various size. */ + +#define ASM_DOUBLE "\t.double" + +/* The LOCAL_LABEL_PREFIX variable is used by dbxelf.h. */ +#define LOCAL_LABEL_PREFIX "." + +/* Prefix for internally generated assembler labels. */ +#define LPREFIX ".L" + + +/* This is how to output the definition of a user-level label named NAME, + such as the label on a static function or variable NAME. */ + +#undef ASM_OUTPUT_LABEL +#define ASM_OUTPUT_LABEL(FILE, NAME) \ + (assemble_name (FILE, NAME), fputs (":\n", FILE)) + +/* Store in OUTPUT a string (made with alloca) containing + an assembler-name for a local static variable named NAME. + LABELNO is an integer which is different for each call. */ + +#undef ASM_FORMAT_PRIVATE_NAME +#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ +( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ + sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) + + + /* internal macro to output long */ +#define _ASM_OUTPUT_LONG(FILE, VALUE) \ + fprintf (FILE, "\t.long\t0x%lX\n", VALUE); + + +/* This is how to output an element of a case-vector that is absolute. */ + +#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ + fprintf (FILE, "%s%s%d\n", integer_asm_op (UNITS_PER_WORD, TRUE), \ + LPREFIX, VALUE) + +/* This is how to output an element of a case-vector that is relative. */ + +#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ + fprintf (FILE, "%s%s%d-%s%d\n", integer_asm_op (UNITS_PER_WORD, TRUE), \ + LPREFIX, VALUE, LPREFIX, REL) + + + +/* This is how to output an assembler line + that says to advance the location counter + to a multiple of 2**LOG bytes. */ + +#undef ASM_OUTPUT_ALIGN +#define ASM_OUTPUT_ALIGN(FILE, LOG) \ + if ((LOG)!=0) fprintf ((FILE), "\t.align\t%d\n", 1<<(LOG)) + +/* This is how to output an assembler line + that says to advance the location counter by SIZE bytes. */ + +#undef ASM_OUTPUT_SKIP +#define ASM_OUTPUT_SKIP(FILE, SIZE) \ + fprintf ((FILE), "\t.set\t.,.+%u\n", (SIZE)) + +/* This is how to output assembler code to declare an + uninitialized external linkage data object. */ + +#undef ASM_OUTPUT_ALIGNED_BSS +#define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \ + asm_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN) + +/* Output before read-only data. */ + +#define TEXT_SECTION_ASM_OP ".text" + +/* Output before writable (initialized) data. */ + +#define DATA_SECTION_ASM_OP ".data" + +/* Output before writable (uninitialized) data. */ + +#define BSS_SECTION_ASM_OP ".bss" + +/* This is how to output a command to make the user-level label named NAME + defined for reference from other files. */ + +#define ASM_GLOBALIZE_LABEL(FILE, NAME) \ + (fputs (".globl ", FILE), assemble_name (FILE, NAME), fputs ("\n", FILE)) + +/* Select section for constant in constant pool. + We are in the right section. + undef for 64 bit mode (linux64.h). + */ + +#undef SELECT_RTX_SECTION +#define SELECT_RTX_SECTION(MODE, X, ALIGN) + + +/* Output code to add DELTA to the first argument, and then jump to FUNCTION. + Used for C++ multiple inheritance. */ +#define ASM_OUTPUT_MI_THUNK(FILE, THUNK_FNDECL, DELTA, FUNCTION) \ +do { \ + if (TARGET_64BIT) \ + { \ + if (flag_pic) \ + { \ + fprintf (FILE, "\tlarl 1,0f\n"); \ + fprintf (FILE, "\tagf %d,0(1)\n", \ + aggregate_value_p (TREE_TYPE \ + (TREE_TYPE (FUNCTION))) ? 3 :2 ); \ + fprintf (FILE, "\tlarl 1,"); \ + assemble_name (FILE, XSTR (XEXP (DECL_RTL (FUNCTION), 0), 0)); \ + fprintf (FILE, "@GOTENT\n"); \ + fprintf (FILE, "\tlg 1,0(1)\n"); \ + fprintf (FILE, "\tbr 1\n"); \ + fprintf (FILE, "0:\t.long "); \ + fprintf (FILE, HOST_WIDE_INT_PRINT_DEC, (DELTA)); \ + fprintf (FILE, "\n"); \ + } \ + else \ + { \ + fprintf (FILE, "\tlarl 1,0f\n"); \ + fprintf (FILE, "\tagf %d,0(1)\n", \ + aggregate_value_p (TREE_TYPE \ + (TREE_TYPE (FUNCTION))) ? 3 :2 ); \ + fprintf (FILE, "\tjg "); \ + assemble_name (FILE, XSTR (XEXP (DECL_RTL (FUNCTION), 0), 0)); \ + fprintf (FILE, "\n"); \ + fprintf (FILE, "0:\t.long "); \ + fprintf (FILE, HOST_WIDE_INT_PRINT_DEC, (DELTA)); \ + fprintf (FILE, "\n"); \ + } \ + } \ + else \ + { \ + if (flag_pic) \ + { \ + fprintf (FILE, "\tbras 1,0f\n"); \ + fprintf (FILE, "\t.long _GLOBAL_OFFSET_TABLE_-.\n"); \ + fprintf (FILE, "\t.long "); \ + assemble_name (FILE, XSTR (XEXP (DECL_RTL (FUNCTION), 0), 0)); \ + fprintf (FILE, "@GOT\n"); \ + fprintf (FILE, "\t.long "); \ + fprintf (FILE, HOST_WIDE_INT_PRINT_DEC, (DELTA)); \ + fprintf (FILE, "\n"); \ + fprintf (FILE, "0:\tal %d,8(1)\n", \ + aggregate_value_p (TREE_TYPE \ + (TREE_TYPE (FUNCTION))) ? 3 : 2 ); \ + fprintf (FILE, "\tl 0,4(1)\n"); \ + fprintf (FILE, "\tal 1,0(1)\n"); \ + fprintf (FILE, "\talr 1,0\n"); \ + fprintf (FILE, "\tl 1,0(1)\n"); \ + fprintf (FILE, "\tbr 1\n"); \ + } else { \ + fprintf (FILE, "\tbras 1,0f\n"); \ + fprintf (FILE, "\t.long "); \ + assemble_name (FILE, XSTR (XEXP (DECL_RTL (FUNCTION), 0), 0)); \ + fprintf (FILE, "-.\n"); \ + fprintf (FILE, "\t.long "); \ + fprintf (FILE, HOST_WIDE_INT_PRINT_DEC, (DELTA)); \ + fprintf (FILE, "\n"); \ + fprintf (FILE, "0:\tal %d,4(1)\n", \ + aggregate_value_p (TREE_TYPE \ + (TREE_TYPE (FUNCTION))) ? 3 : 2 ); \ + fprintf (FILE, "\tal 1,0(1)\n"); \ + fprintf (FILE, "\tbr 1\n"); \ + } \ + } \ +} while (0) + +#endif diff --git a/contrib/gcc/config/s390/s390-protos.h b/contrib/gcc/config/s390/s390-protos.h new file mode 100644 index 0000000..cd4ac10 --- /dev/null +++ b/contrib/gcc/config/s390/s390-protos.h @@ -0,0 +1,85 @@ +/* Definitions of target machine for GNU compiler, for IBM S/390. + Copyright (C) 2000 Free Software Foundation, Inc. + Contributed by Hartmut Penner (hpenner@de.ibm.com) + +This file is part of GNU CC. + +GNU CC is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2, or (at your option) +any later version. + +GNU CC is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with GNU CC; see the file COPYING. If not, write to +the Free Software Foundation, 59 Temple Place - Suite 330, +Boston, MA 02111-1307, USA. */ + +/* Declare functions in s390.c. */ + +extern void optimization_options PARAMS ((int, int)); +extern void override_options PARAMS ((void)); +extern int s390_arg_frame_offset PARAMS ((void)); +extern void s390_function_prologue PARAMS ((FILE *, HOST_WIDE_INT)); +extern void s390_function_epilogue PARAMS ((FILE *, HOST_WIDE_INT)); +extern void s390_emit_prologue PARAMS ((void)); +extern void s390_emit_epilogue PARAMS ((void)); +extern void s390_function_profiler PARAMS ((FILE *, int)); + +#ifdef RTX_CODE +extern int const0_operand PARAMS ((rtx, enum machine_mode)); +extern int consttable_operand PARAMS ((rtx, enum machine_mode)); +extern int larl_operand PARAMS ((rtx, enum machine_mode)); +extern int fp_operand PARAMS ((rtx, enum machine_mode)); +extern int s_operand PARAMS ((rtx, enum machine_mode)); +extern int s_imm_operand PARAMS ((rtx, enum machine_mode)); +extern int bras_sym_operand PARAMS ((rtx, enum machine_mode)); +extern int load_multiple_operation PARAMS ((rtx, enum machine_mode)); +extern int store_multiple_operation PARAMS ((rtx, enum machine_mode)); +extern int s390_single_hi PARAMS ((rtx, enum machine_mode, int)); +extern int s390_extract_hi PARAMS ((rtx, enum machine_mode, int)); +extern int s390_single_qi PARAMS ((rtx, enum machine_mode, int)); +extern int s390_extract_qi PARAMS ((rtx, enum machine_mode, int)); + +extern int s390_match_ccmode PARAMS ((rtx, enum machine_mode)); +extern enum machine_mode s390_select_ccmode PARAMS ((enum rtx_code, rtx, rtx)); +extern int symbolic_reference_mentioned_p PARAMS ((rtx)); +extern int legitimate_la_operand_p PARAMS ((rtx)); +extern rtx legitimize_la_operand PARAMS ((rtx)); +extern int legitimate_pic_operand_p PARAMS ((rtx)); +extern int legitimate_constant_p PARAMS ((rtx)); +extern int legitimate_reload_constant_p PARAMS ((rtx)); +extern int legitimate_address_p PARAMS ((enum machine_mode, rtx, int)); +extern rtx legitimize_pic_address PARAMS ((rtx, rtx)); +extern rtx legitimize_address PARAMS ((rtx, rtx, enum machine_mode)); +extern enum reg_class s390_preferred_reload_class PARAMS ((rtx, enum reg_class)); +extern enum reg_class s390_secondary_input_reload_class PARAMS ((enum reg_class, enum machine_mode, rtx)); +extern int s390_plus_operand PARAMS ((rtx, enum machine_mode)); +extern void s390_expand_plus_operand PARAMS ((rtx, rtx, rtx)); +extern void emit_pic_move PARAMS ((rtx *, enum machine_mode)); + +extern void s390_output_symbolic_const PARAMS ((FILE *, rtx)); +extern void print_operand_address PARAMS ((FILE *, rtx)); +extern void print_operand PARAMS ((FILE *, rtx, int)); +extern void s390_output_constant_pool PARAMS ((FILE *)); +extern void s390_trampoline_template PARAMS ((FILE *)); +extern void s390_initialize_trampoline PARAMS ((rtx, rtx, rtx)); +extern rtx s390_gen_rtx_const_DI PARAMS ((int, int)); +extern rtx s390_simplify_dwarf_addr PARAMS ((rtx)); +#endif /* RTX_CODE */ + +#ifdef TREE_CODE +extern int s390_function_arg_pass_by_reference PARAMS ((enum machine_mode, tree)); +extern void s390_function_arg_advance PARAMS ((CUMULATIVE_ARGS *, enum machine_mode, tree, int)); +extern tree s390_build_va_list PARAMS ((void)); +#ifdef RTX_CODE +extern rtx s390_function_arg PARAMS ((CUMULATIVE_ARGS *, enum machine_mode, tree, int)); +extern void s390_va_start PARAMS ((int, tree, rtx)); +extern rtx s390_va_arg PARAMS ((tree, tree)); +#endif /* RTX_CODE */ +#endif /* TREE_CODE */ + diff --git a/contrib/gcc/config/s390/s390.c b/contrib/gcc/config/s390/s390.c new file mode 100644 index 0000000..4c96dce --- /dev/null +++ b/contrib/gcc/config/s390/s390.c @@ -0,0 +1,4346 @@ +/* Subroutines used for code generation on IBM S/390 and zSeries + Copyright (C) 1999, 2000, 2001, 2002 Free Software Foundation, Inc. + Contributed by Hartmut Penner (hpenner@de.ibm.com) and + Ulrich Weigand (uweigand@de.ibm.com). + +This file is part of GNU CC. + +GNU CC is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2, or (at your option) +any later version. + +GNU CC is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with GNU CC; see the file COPYING. If not, write to +the Free Software Foundation, 59 Temple Place - Suite 330, +Boston, MA 02111-1307, USA. */ + +#include "config.h" +#include "system.h" +#include "rtl.h" +#include "tree.h" +#include "tm_p.h" +#include "regs.h" +#include "hard-reg-set.h" +#include "real.h" +#include "insn-config.h" +#include "conditions.h" +#include "output.h" +#include "insn-attr.h" +#include "flags.h" +#include "except.h" +#include "function.h" +#include "recog.h" +#include "expr.h" +#include "reload.h" +#include "toplev.h" +#include "basic-block.h" +#include "integrate.h" +#include "ggc.h" +#include "target.h" +#include "target-def.h" +#include "debug.h" + + +static bool s390_assemble_integer PARAMS ((rtx, unsigned int, int)); +static int s390_adjust_cost PARAMS ((rtx, rtx, rtx, int)); +static int s390_adjust_priority PARAMS ((rtx, int)); + +#undef TARGET_ASM_ALIGNED_HI_OP +#define TARGET_ASM_ALIGNED_HI_OP "\t.word\t" +#undef TARGET_ASM_ALIGNED_DI_OP +#define TARGET_ASM_ALIGNED_DI_OP "\t.quad\t" +#undef TARGET_ASM_INTEGER +#define TARGET_ASM_INTEGER s390_assemble_integer + +#undef TARGET_ASM_FUNCTION_PROLOGUE +#define TARGET_ASM_FUNCTION_PROLOGUE s390_function_prologue + +#undef TARGET_ASM_FUNCTION_EPILOGUE +#define TARGET_ASM_FUNCTION_EPILOGUE s390_function_epilogue + +#undef TARGET_ASM_OPEN_PAREN +#define TARGET_ASM_OPEN_PAREN "" + +#undef TARGET_ASM_CLOSE_PAREN +#define TARGET_ASM_CLOSE_PAREN "" + +#undef TARGET_SCHED_ADJUST_COST +#define TARGET_SCHED_ADJUST_COST s390_adjust_cost + +#undef TARGET_SCHED_ADJUST_PRIORITY +#define TARGET_SCHED_ADJUST_PRIORITY s390_adjust_priority + +struct gcc_target targetm = TARGET_INITIALIZER; + +extern int reload_completed; + +/* The alias set for prologue/epilogue register save/restore. */ +static int s390_sr_alias_set = 0; + +/* Function count for creating unique internal labels in a compile unit. */ +int s390_function_count = 0; + +/* Save information from a "cmpxx" operation until the branch or scc is + emitted. */ +rtx s390_compare_op0, s390_compare_op1; + +/* Structure used to hold the components of a S/390 memory + address. A legitimate address on S/390 is of the general + form + base + index + displacement + where any of the components is optional. + + base and index are registers of the class ADDR_REGS, + displacement is an unsigned 12-bit immediate constant. */ + +struct s390_address +{ + rtx base; + rtx indx; + rtx disp; + int pointer; +}; + +/* Structure containing information for prologue and epilogue. */ + +struct s390_frame +{ + int frame_pointer_p; + int return_reg_saved_p; + int save_fprs_p; + int first_save_gpr; + int first_restore_gpr; + int last_save_gpr; + int arg_frame_offset; + + HOST_WIDE_INT frame_size; +}; + +static int s390_match_ccmode_set PARAMS ((rtx, enum machine_mode)); +static int s390_branch_condition_mask PARAMS ((rtx)); +static const char *s390_branch_condition_mnemonic PARAMS ((rtx, int)); +static int check_mode PARAMS ((rtx, enum machine_mode *)); +static int general_s_operand PARAMS ((rtx, enum machine_mode, int)); +static int s390_decompose_address PARAMS ((rtx, struct s390_address *, int)); +static int reg_used_in_mem_p PARAMS ((int, rtx)); +static int addr_generation_dependency_p PARAMS ((rtx, rtx)); +static void s390_split_branches PARAMS ((void)); +static void find_constant_pool_ref PARAMS ((rtx, rtx *)); +static void replace_constant_pool_ref PARAMS ((rtx *, rtx, rtx)); +static void s390_chunkify_pool PARAMS ((void)); +static int save_fprs_p PARAMS ((void)); +static int find_unused_clobbered_reg PARAMS ((void)); +static void s390_frame_info PARAMS ((struct s390_frame *)); +static rtx save_fpr PARAMS ((rtx, int, int)); +static rtx restore_fpr PARAMS ((rtx, int, int)); +static int s390_function_arg_size PARAMS ((enum machine_mode, tree)); + + +/* Return true if SET either doesn't set the CC register, or else + the source and destination have matching CC modes and that + CC mode is at least as constrained as REQ_MODE. */ + +static int +s390_match_ccmode_set (set, req_mode) + rtx set; + enum machine_mode req_mode; +{ + enum machine_mode set_mode; + + if (GET_CODE (set) != SET) + abort (); + + if (GET_CODE (SET_DEST (set)) != REG || !CC_REGNO_P (REGNO (SET_DEST (set)))) + return 1; + + set_mode = GET_MODE (SET_DEST (set)); + switch (set_mode) + { + case CCSmode: + if (req_mode != CCSmode) + return 0; + break; + case CCUmode: + if (req_mode != CCUmode) + return 0; + break; + case CCLmode: + if (req_mode != CCLmode) + return 0; + break; + case CCZmode: + if (req_mode != CCSmode && req_mode != CCUmode && req_mode != CCTmode) + return 0; + break; + + default: + abort (); + } + + return (GET_MODE (SET_SRC (set)) == set_mode); +} + +/* Return true if every SET in INSN that sets the CC register + has source and destination with matching CC modes and that + CC mode is at least as constrained as REQ_MODE. */ + +int +s390_match_ccmode (insn, req_mode) + rtx insn; + enum machine_mode req_mode; +{ + int i; + + if (GET_CODE (PATTERN (insn)) == SET) + return s390_match_ccmode_set (PATTERN (insn), req_mode); + + if (GET_CODE (PATTERN (insn)) == PARALLEL) + for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++) + { + rtx set = XVECEXP (PATTERN (insn), 0, i); + if (GET_CODE (set) == SET) + if (!s390_match_ccmode_set (set, req_mode)) + return 0; + } + + return 1; +} + +/* Given a comparison code OP (EQ, NE, etc.) and the operands + OP0 and OP1 of a COMPARE, return the mode to be used for the + comparison. */ + +enum machine_mode +s390_select_ccmode (code, op0, op1) + enum rtx_code code; + rtx op0; + rtx op1; +{ + switch (code) + { + case EQ: + case NE: + if (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS + || GET_CODE (op1) == NEG) + return CCLmode; + + return CCZmode; + + case LE: + case LT: + case GE: + case GT: + case UNORDERED: + case ORDERED: + case UNEQ: + case UNLE: + case UNLT: + case UNGE: + case UNGT: + case LTGT: + return CCSmode; + + case LEU: + case LTU: + case GEU: + case GTU: + return CCUmode; + + default: + abort (); + } +} + +/* Return branch condition mask to implement a branch + specified by CODE. */ + +static int +s390_branch_condition_mask (code) + rtx code; +{ + const int CC0 = 1 << 3; + const int CC1 = 1 << 2; + const int CC2 = 1 << 1; + const int CC3 = 1 << 0; + + if (GET_CODE (XEXP (code, 0)) != REG + || REGNO (XEXP (code, 0)) != CC_REGNUM + || XEXP (code, 1) != const0_rtx) + abort (); + + switch (GET_MODE (XEXP (code, 0))) + { + case CCZmode: + switch (GET_CODE (code)) + { + case EQ: return CC0; + case NE: return CC1 | CC2 | CC3; + default: + abort (); + } + break; + + case CCLmode: + switch (GET_CODE (code)) + { + case EQ: return CC0 | CC2; + case NE: return CC1 | CC3; + case UNORDERED: return CC2 | CC3; /* carry */ + case ORDERED: return CC0 | CC1; /* no carry */ + default: + abort (); + } + break; + + case CCUmode: + switch (GET_CODE (code)) + { + case EQ: return CC0; + case NE: return CC1 | CC2 | CC3; + case LTU: return CC1; + case GTU: return CC2; + case LEU: return CC0 | CC1; + case GEU: return CC0 | CC2; + default: + abort (); + } + break; + + case CCSmode: + switch (GET_CODE (code)) + { + case EQ: return CC0; + case NE: return CC1 | CC2 | CC3; + case LT: return CC1; + case GT: return CC2; + case LE: return CC0 | CC1; + case GE: return CC0 | CC2; + case UNORDERED: return CC3; + case ORDERED: return CC0 | CC1 | CC2; + case UNEQ: return CC0 | CC3; + case UNLT: return CC1 | CC3; + case UNGT: return CC2 | CC3; + case UNLE: return CC0 | CC1 | CC3; + case UNGE: return CC0 | CC2 | CC3; + case LTGT: return CC1 | CC2; + default: + abort (); + } + + default: + abort (); + } +} + +/* If INV is false, return assembler mnemonic string to implement + a branch specified by CODE. If INV is true, return mnemonic + for the corresponding inverted branch. */ + +static const char * +s390_branch_condition_mnemonic (code, inv) + rtx code; + int inv; +{ + static const char *mnemonic[16] = + { + NULL, "o", "h", "nle", + "l", "nhe", "lh", "ne", + "e", "nlh", "he", "nl", + "le", "nh", "no", NULL + }; + + int mask = s390_branch_condition_mask (code); + + if (inv) + mask ^= 15; + + if (mask < 1 || mask > 14) + abort (); + + return mnemonic[mask]; +} + +/* If OP is an integer constant of mode MODE with exactly one + HImode subpart unequal to DEF, return the number of that + subpart. As a special case, all HImode subparts of OP are + equal to DEF, return zero. Otherwise, return -1. */ + +int +s390_single_hi (op, mode, def) + rtx op; + enum machine_mode mode; + int def; +{ + if (GET_CODE (op) == CONST_INT) + { + unsigned HOST_WIDE_INT value; + int n_parts = GET_MODE_SIZE (mode) / 2; + int i, part = -1; + + for (i = 0; i < n_parts; i++) + { + if (i == 0) + value = (unsigned HOST_WIDE_INT) INTVAL (op); + else + value >>= 16; + + if ((value & 0xffff) != (unsigned)(def & 0xffff)) + { + if (part != -1) + return -1; + else + part = i; + } + } + + return part == -1 ? 0 : (n_parts - 1 - part); + } + + else if (GET_CODE (op) == CONST_DOUBLE + && GET_MODE (op) == VOIDmode) + { + unsigned HOST_WIDE_INT value; + int n_parts = GET_MODE_SIZE (mode) / 2; + int i, part = -1; + + for (i = 0; i < n_parts; i++) + { + if (i == 0) + value = (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (op); + else if (i == HOST_BITS_PER_WIDE_INT / 16) + value = (unsigned HOST_WIDE_INT) CONST_DOUBLE_HIGH (op); + else + value >>= 16; + + if ((value & 0xffff) != (unsigned)(def & 0xffff)) + { + if (part != -1) + return -1; + else + part = i; + } + } + + return part == -1 ? 0 : (n_parts - 1 - part); + } + + return -1; +} + +/* Extract the HImode part number PART from integer + constant OP of mode MODE. */ + +int +s390_extract_hi (op, mode, part) + rtx op; + enum machine_mode mode; + int part; +{ + int n_parts = GET_MODE_SIZE (mode) / 2; + if (part < 0 || part >= n_parts) + abort(); + else + part = n_parts - 1 - part; + + if (GET_CODE (op) == CONST_INT) + { + unsigned HOST_WIDE_INT value = (unsigned HOST_WIDE_INT) INTVAL (op); + return ((value >> (16 * part)) & 0xffff); + } + else if (GET_CODE (op) == CONST_DOUBLE + && GET_MODE (op) == VOIDmode) + { + unsigned HOST_WIDE_INT value; + if (part < HOST_BITS_PER_WIDE_INT / 16) + value = (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (op); + else + value = (unsigned HOST_WIDE_INT) CONST_DOUBLE_HIGH (op), + part -= HOST_BITS_PER_WIDE_INT / 16; + + return ((value >> (16 * part)) & 0xffff); + } + + abort (); +} + +/* If OP is an integer constant of mode MODE with exactly one + QImode subpart unequal to DEF, return the number of that + subpart. As a special case, all QImode subparts of OP are + equal to DEF, return zero. Otherwise, return -1. */ + +int +s390_single_qi (op, mode, def) + rtx op; + enum machine_mode mode; + int def; +{ + if (GET_CODE (op) == CONST_INT) + { + unsigned HOST_WIDE_INT value; + int n_parts = GET_MODE_SIZE (mode); + int i, part = -1; + + for (i = 0; i < n_parts; i++) + { + if (i == 0) + value = (unsigned HOST_WIDE_INT) INTVAL (op); + else + value >>= 8; + + if ((value & 0xff) != (unsigned)(def & 0xff)) + { + if (part != -1) + return -1; + else + part = i; + } + } + + return part == -1 ? 0 : (n_parts - 1 - part); + } + + else if (GET_CODE (op) == CONST_DOUBLE + && GET_MODE (op) == VOIDmode) + { + unsigned HOST_WIDE_INT value; + int n_parts = GET_MODE_SIZE (mode); + int i, part = -1; + + for (i = 0; i < n_parts; i++) + { + if (i == 0) + value = (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (op); + else if (i == HOST_BITS_PER_WIDE_INT / 8) + value = (unsigned HOST_WIDE_INT) CONST_DOUBLE_HIGH (op); + else + value >>= 8; + + if ((value & 0xff) != (unsigned)(def & 0xff)) + { + if (part != -1) + return -1; + else + part = i; + } + } + + return part == -1 ? 0 : (n_parts - 1 - part); + } + + return -1; +} + +/* Extract the QImode part number PART from integer + constant OP of mode MODE. */ + +int +s390_extract_qi (op, mode, part) + rtx op; + enum machine_mode mode; + int part; +{ + int n_parts = GET_MODE_SIZE (mode); + if (part < 0 || part >= n_parts) + abort(); + else + part = n_parts - 1 - part; + + if (GET_CODE (op) == CONST_INT) + { + unsigned HOST_WIDE_INT value = (unsigned HOST_WIDE_INT) INTVAL (op); + return ((value >> (8 * part)) & 0xff); + } + else if (GET_CODE (op) == CONST_DOUBLE + && GET_MODE (op) == VOIDmode) + { + unsigned HOST_WIDE_INT value; + if (part < HOST_BITS_PER_WIDE_INT / 8) + value = (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (op); + else + value = (unsigned HOST_WIDE_INT) CONST_DOUBLE_HIGH (op), + part -= HOST_BITS_PER_WIDE_INT / 8; + + return ((value >> (8 * part)) & 0xff); + } + + abort (); +} + + +/* Change optimizations to be performed, depending on the + optimization level. + + LEVEL is the optimization level specified; 2 if `-O2' is + specified, 1 if `-O' is specified, and 0 if neither is specified. + + SIZE is non-zero if `-Os' is specified and zero otherwise. */ + +void +optimization_options (level, size) + int level ATTRIBUTE_UNUSED; + int size ATTRIBUTE_UNUSED; +{ +#ifdef HAVE_decrement_and_branch_on_count + /* When optimizing, enable use of BRCT instruction. */ + if (level >= 1) + flag_branch_on_count_reg = 1; +#endif +} + +void +override_options () +{ + /* Acquire a unique set number for our register saves and restores. */ + s390_sr_alias_set = new_alias_set (); +} + + +/* Map for smallest class containing reg regno. */ + +enum reg_class regclass_map[FIRST_PSEUDO_REGISTER] = +{ GENERAL_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS, + ADDR_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS, + ADDR_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS, + ADDR_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS, + FP_REGS, FP_REGS, FP_REGS, FP_REGS, + FP_REGS, FP_REGS, FP_REGS, FP_REGS, + FP_REGS, FP_REGS, FP_REGS, FP_REGS, + FP_REGS, FP_REGS, FP_REGS, FP_REGS, + ADDR_REGS, NO_REGS, ADDR_REGS +}; + + +/* Return true if OP a (const_int 0) operand. + OP is the current operation. + MODE is the current operation mode. */ + +int +const0_operand (op, mode) + register rtx op; + enum machine_mode mode; +{ + return op == CONST0_RTX (mode); +} + +/* Return true if OP is constant. + OP is the current operation. + MODE is the current operation mode. */ + +int +consttable_operand (op, mode) + rtx op; + enum machine_mode mode ATTRIBUTE_UNUSED; +{ + return CONSTANT_P (op); +} + +/* Return true if the mode of operand OP matches MODE. + If MODE is set to VOIDmode, set it to the mode of OP. */ + +static int +check_mode (op, mode) + register rtx op; + enum machine_mode *mode; +{ + if (*mode == VOIDmode) + *mode = GET_MODE (op); + else + { + if (GET_MODE (op) != VOIDmode && GET_MODE (op) != *mode) + return 0; + } + return 1; +} + +/* Return true if OP a valid operand for the LARL instruction. + OP is the current operation. + MODE is the current operation mode. */ + +int +larl_operand (op, mode) + register rtx op; + enum machine_mode mode; +{ + if (! check_mode (op, &mode)) + return 0; + + /* Allow labels and local symbols. */ + if (GET_CODE (op) == LABEL_REF) + return 1; + if (GET_CODE (op) == SYMBOL_REF + && (!flag_pic || SYMBOL_REF_FLAG (op) + || CONSTANT_POOL_ADDRESS_P (op))) + return 1; + + /* Everything else must have a CONST, so strip it. */ + if (GET_CODE (op) != CONST) + return 0; + op = XEXP (op, 0); + + /* Allow adding *even* constants. */ + if (GET_CODE (op) == PLUS) + { + if (GET_CODE (XEXP (op, 1)) != CONST_INT + || (INTVAL (XEXP (op, 1)) & 1) != 0) + return 0; + op = XEXP (op, 0); + } + + /* Labels and local symbols allowed here as well. */ + if (GET_CODE (op) == LABEL_REF) + return 1; + if (GET_CODE (op) == SYMBOL_REF + && (!flag_pic || SYMBOL_REF_FLAG (op) + || CONSTANT_POOL_ADDRESS_P (op))) + return 1; + + /* Now we must have a @GOTENT offset or @PLT stub. */ + if (GET_CODE (op) == UNSPEC + && XINT (op, 1) == 111) + return 1; + if (GET_CODE (op) == UNSPEC + && XINT (op, 1) == 113) + return 1; + + return 0; +} + +/* Return true if OP is a valid FP-Register. + OP is the current operation. + MODE is the current operation mode. */ + +int +fp_operand (op, mode) + register rtx op; + enum machine_mode mode; +{ + register enum rtx_code code = GET_CODE (op); + if (! check_mode (op, &mode)) + return 0; + if (code == REG && REGNO_OK_FOR_FP_P (REGNO (op))) + return 1; + else + return 0; +} + +/* Helper routine to implement s_operand and s_imm_operand. + OP is the current operation. + MODE is the current operation mode. + ALLOW_IMMEDIATE specifies whether immediate operands should + be accepted or not. */ + +static int +general_s_operand (op, mode, allow_immediate) + register rtx op; + enum machine_mode mode; + int allow_immediate; +{ + struct s390_address addr; + + /* Call general_operand first, so that we don't have to + check for many special cases. */ + if (!general_operand (op, mode)) + return 0; + + /* Just like memory_operand, allow (subreg (mem ...)) + after reload. */ + if (reload_completed + && GET_CODE (op) == SUBREG + && GET_CODE (SUBREG_REG (op)) == MEM) + op = SUBREG_REG (op); + + switch (GET_CODE (op)) + { + /* Constants that we are sure will be forced to the + literal pool in reload are OK as s-operand. Note + that we cannot call s390_preferred_reload_class here + because it might not be known yet at this point + whether the current function is a leaf or not. */ + case CONST_INT: + case CONST_DOUBLE: + if (!allow_immediate || reload_completed) + break; + if (!legitimate_reload_constant_p (op)) + return 1; + if (!TARGET_64BIT) + return 1; + break; + + /* Memory operands are OK unless they already use an + index register. */ + case MEM: + if (GET_CODE (XEXP (op, 0)) == ADDRESSOF) + return 1; + if (s390_decompose_address (XEXP (op, 0), &addr, FALSE) + && !addr.indx) + return 1; + break; + + default: + break; + } + + return 0; +} + +/* Return true if OP is a valid S-type operand. + OP is the current operation. + MODE is the current operation mode. */ + +int +s_operand (op, mode) + register rtx op; + enum machine_mode mode; +{ + return general_s_operand (op, mode, 0); +} + +/* Return true if OP is a valid S-type operand or an immediate + operand that can be addressed as S-type operand by forcing + it into the literal pool. + OP is the current operation. + MODE is the current operation mode. */ + +int +s_imm_operand (op, mode) + register rtx op; + enum machine_mode mode; +{ + return general_s_operand (op, mode, 1); +} + +/* Return true if OP is a valid operand for the BRAS instruction. + OP is the current operation. + MODE is the current operation mode. */ + +int +bras_sym_operand (op, mode) + register rtx op; + enum machine_mode mode ATTRIBUTE_UNUSED; +{ + register enum rtx_code code = GET_CODE (op); + + /* Allow SYMBOL_REFs. */ + if (code == SYMBOL_REF) + return 1; + + /* Allow @PLT stubs. */ + if (code == CONST + && GET_CODE (XEXP (op, 0)) == UNSPEC + && XINT (XEXP (op, 0), 1) == 113) + return 1; + return 0; +} + + +/* Return true if OP is a load multiple operation. It is known to be a + PARALLEL and the first section will be tested. + OP is the current operation. + MODE is the current operation mode. */ + +int +load_multiple_operation (op, mode) + rtx op; + enum machine_mode mode ATTRIBUTE_UNUSED; +{ + int count = XVECLEN (op, 0); + unsigned int dest_regno; + rtx src_addr; + int i, off; + + + /* Perform a quick check so we don't blow up below. */ + if (count <= 1 + || GET_CODE (XVECEXP (op, 0, 0)) != SET + || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != REG + || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != MEM) + return 0; + + dest_regno = REGNO (SET_DEST (XVECEXP (op, 0, 0))); + src_addr = XEXP (SET_SRC (XVECEXP (op, 0, 0)), 0); + + /* Check, is base, or base + displacement. */ + + if (GET_CODE (src_addr) == REG) + off = 0; + else if (GET_CODE (src_addr) == PLUS + && GET_CODE (XEXP (src_addr, 0)) == REG + && GET_CODE (XEXP (src_addr, 1)) == CONST_INT) + { + off = INTVAL (XEXP (src_addr, 1)); + src_addr = XEXP (src_addr, 0); + } + else + return 0; + + if (src_addr == frame_pointer_rtx || src_addr == arg_pointer_rtx) + return 0; + + for (i = 1; i < count; i++) + { + rtx elt = XVECEXP (op, 0, i); + + if (GET_CODE (elt) != SET + || GET_CODE (SET_DEST (elt)) != REG + || GET_MODE (SET_DEST (elt)) != Pmode + || REGNO (SET_DEST (elt)) != dest_regno + i + || GET_CODE (SET_SRC (elt)) != MEM + || GET_MODE (SET_SRC (elt)) != Pmode + || GET_CODE (XEXP (SET_SRC (elt), 0)) != PLUS + || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt), 0), 0), src_addr) + || GET_CODE (XEXP (XEXP (SET_SRC (elt), 0), 1)) != CONST_INT + || INTVAL (XEXP (XEXP (SET_SRC (elt), 0), 1)) + != off + i * UNITS_PER_WORD) + return 0; + } + + return 1; +} + +/* Return true if OP is a store multiple operation. It is known to be a + PARALLEL and the first section will be tested. + OP is the current operation. + MODE is the current operation mode. */ + +int +store_multiple_operation (op, mode) + rtx op; + enum machine_mode mode ATTRIBUTE_UNUSED; +{ + int count = XVECLEN (op, 0); + unsigned int src_regno; + rtx dest_addr; + int i, off; + + /* Perform a quick check so we don't blow up below. */ + if (count <= 1 + || GET_CODE (XVECEXP (op, 0, 0)) != SET + || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != MEM + || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != REG) + return 0; + + src_regno = REGNO (SET_SRC (XVECEXP (op, 0, 0))); + dest_addr = XEXP (SET_DEST (XVECEXP (op, 0, 0)), 0); + + /* Check, is base, or base + displacement. */ + + if (GET_CODE (dest_addr) == REG) + off = 0; + else if (GET_CODE (dest_addr) == PLUS + && GET_CODE (XEXP (dest_addr, 0)) == REG + && GET_CODE (XEXP (dest_addr, 1)) == CONST_INT) + { + off = INTVAL (XEXP (dest_addr, 1)); + dest_addr = XEXP (dest_addr, 0); + } + else + return 0; + + if (dest_addr == frame_pointer_rtx || dest_addr == arg_pointer_rtx) + return 0; + + for (i = 1; i < count; i++) + { + rtx elt = XVECEXP (op, 0, i); + + if (GET_CODE (elt) != SET + || GET_CODE (SET_SRC (elt)) != REG + || GET_MODE (SET_SRC (elt)) != Pmode + || REGNO (SET_SRC (elt)) != src_regno + i + || GET_CODE (SET_DEST (elt)) != MEM + || GET_MODE (SET_DEST (elt)) != Pmode + || GET_CODE (XEXP (SET_DEST (elt), 0)) != PLUS + || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt), 0), 0), dest_addr) + || GET_CODE (XEXP (XEXP (SET_DEST (elt), 0), 1)) != CONST_INT + || INTVAL (XEXP (XEXP (SET_DEST (elt), 0), 1)) + != off + i * UNITS_PER_WORD) + return 0; + } + return 1; +} + + +/* Return true if OP contains a symbol reference */ + +int +symbolic_reference_mentioned_p (op) + rtx op; +{ + register const char *fmt; + register int i; + + if (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == LABEL_REF) + return 1; + + fmt = GET_RTX_FORMAT (GET_CODE (op)); + for (i = GET_RTX_LENGTH (GET_CODE (op)) - 1; i >= 0; i--) + { + if (fmt[i] == 'E') + { + register int j; + + for (j = XVECLEN (op, i) - 1; j >= 0; j--) + if (symbolic_reference_mentioned_p (XVECEXP (op, i, j))) + return 1; + } + + else if (fmt[i] == 'e' && symbolic_reference_mentioned_p (XEXP (op, i))) + return 1; + } + + return 0; +} + + +/* Return true if OP is a legitimate general operand when + generating PIC code. It is given that flag_pic is on + and that OP satisfies CONSTANT_P or is a CONST_DOUBLE. */ + +int +legitimate_pic_operand_p (op) + register rtx op; +{ + /* Accept all non-symbolic constants. */ + if (!SYMBOLIC_CONST (op)) + return 1; + + /* Reject everything else; must be handled + via emit_pic_move. */ + return 0; +} + +/* Returns true if the constant value OP is a legitimate general operand. + It is given that OP satisfies CONSTANT_P or is a CONST_DOUBLE. */ + +int +legitimate_constant_p (op) + register rtx op; +{ + /* Accept all non-symbolic constants. */ + if (!SYMBOLIC_CONST (op)) + return 1; + + /* In the PIC case, symbolic constants must *not* be + forced into the literal pool. We accept them here, + so that they will be handled by emit_pic_move. */ + if (flag_pic) + return 1; + + /* Even in the non-PIC case, we can accept immediate + LARL operands here. */ + if (TARGET_64BIT) + return larl_operand (op, VOIDmode); + + /* All remaining non-PIC symbolic constants are + forced into the literal pool. */ + return 0; +} + +/* Returns true if the constant value OP is a legitimate general + operand during and after reload. The difference to + legitimate_constant_p is that this function will not accept + a constant that would need to be forced to the literal pool + before it can be used as operand. */ + +int +legitimate_reload_constant_p (op) + register rtx op; +{ + /* Accept l(g)hi operands. */ + if (GET_CODE (op) == CONST_INT + && CONST_OK_FOR_LETTER_P (INTVAL (op), 'K')) + return 1; + + /* Accept lliXX operands. */ + if (TARGET_64BIT + && s390_single_hi (op, DImode, 0) >= 0) + return 1; + + /* Accept larl operands. */ + if (TARGET_64BIT + && larl_operand (op, VOIDmode)) + return 1; + + /* If reload is completed, and we do not already have a + literal pool, and OP must be forced to the literal + pool, then something must have gone wrong earlier. + We *cannot* force the constant any more, because the + prolog generation already decided we don't need to + set up the base register. */ + if (reload_completed && !regs_ever_live[BASE_REGISTER]) + abort (); + + /* Everything else cannot be handled without reload. */ + return 0; +} + +/* Given an rtx OP being reloaded into a reg required to be in class CLASS, + return the class of reg to actually use. */ + +enum reg_class +s390_preferred_reload_class (op, class) + rtx op; + enum reg_class class; +{ + /* This can happen if a floating point constant is being + reloaded into an integer register. Leave well alone. */ + if (GET_MODE_CLASS (GET_MODE (op)) == MODE_FLOAT + && class != FP_REGS) + return class; + + switch (GET_CODE (op)) + { + /* Constants we cannot reload must be forced into the + literal pool. For constants we *could* handle directly, + it might still be preferable to put them in the pool and + use a memory-to-memory instruction. + + However, try to avoid needlessly allocating a literal + pool in a routine that wouldn't otherwise need any. + Heuristically, we assume that 64-bit leaf functions + typically don't need a literal pool, all others do. */ + case CONST_DOUBLE: + case CONST_INT: + if (!legitimate_reload_constant_p (op)) + return NO_REGS; + + if (TARGET_64BIT && current_function_is_leaf) + return class; + + return NO_REGS; + + /* If a symbolic constant or a PLUS is reloaded, + it is most likely being used as an address, so + prefer ADDR_REGS. If 'class' is not a superset + of ADDR_REGS, e.g. FP_REGS, reject this reload. */ + case PLUS: + case LABEL_REF: + case SYMBOL_REF: + case CONST: + if (reg_class_subset_p (ADDR_REGS, class)) + return ADDR_REGS; + else + return NO_REGS; + + default: + break; + } + + return class; +} + +/* Return the register class of a scratch register needed to + load IN into a register of class CLASS in MODE. + + We need a temporary when loading a PLUS expression which + is not a legitimate operand of the LOAD ADDRESS instruction. */ + +enum reg_class +s390_secondary_input_reload_class (class, mode, in) + enum reg_class class ATTRIBUTE_UNUSED; + enum machine_mode mode; + rtx in; +{ + if (s390_plus_operand (in, mode)) + return ADDR_REGS; + + return NO_REGS; +} + +/* Return true if OP is a PLUS that is not a legitimate + operand for the LA instruction. + OP is the current operation. + MODE is the current operation mode. */ + +int +s390_plus_operand (op, mode) + register rtx op; + enum machine_mode mode; +{ + if (!check_mode (op, &mode) || mode != Pmode) + return FALSE; + + if (GET_CODE (op) != PLUS) + return FALSE; + + if (legitimate_la_operand_p (op)) + return FALSE; + + return TRUE; +} + +/* Generate code to load SRC, which is PLUS that is not a + legitimate operand for the LA instruction, into TARGET. + SCRATCH may be used as scratch register. */ + +void +s390_expand_plus_operand (target, src, scratch_in) + register rtx target; + register rtx src; + register rtx scratch_in; +{ + rtx sum1, sum2, scratch; + + /* ??? reload apparently does not ensure that the scratch register + and the target do not overlap. We absolutely require this to be + the case, however. Therefore the reload_in[sd]i patterns ask for + a double-sized scratch register, and if one part happens to be + equal to the target, we use the other one. */ + scratch = gen_rtx_REG (Pmode, REGNO (scratch_in)); + if (rtx_equal_p (scratch, target)) + scratch = gen_rtx_REG (Pmode, REGNO (scratch_in) + 1); + + /* src must be a PLUS; get its two operands. */ + if (GET_CODE (src) != PLUS || GET_MODE (src) != Pmode) + abort (); + + /* Check if any of the two operands is already scheduled + for replacement by reload. This can happen e.g. when + float registers occur in an address. */ + sum1 = find_replacement (&XEXP (src, 0)); + sum2 = find_replacement (&XEXP (src, 1)); + + /* If one of the two operands is equal to the target, + make it the first one. If one is a constant, make + it the second one. */ + if (rtx_equal_p (target, sum2) + || GET_CODE (sum1) == CONST_INT) + { + rtx tem = sum2; + sum2 = sum1; + sum1 = tem; + } + + /* If the first operand is not an address register, + we reload it into the target. */ + if (true_regnum (sum1) < 1 || true_regnum (sum1) > 15) + { + emit_move_insn (target, sum1); + sum1 = target; + } + + /* Likewise for the second operand. However, take + care not to clobber the target if we already used + it for the first operand. Use the scratch instead. + Also, allow an immediate offset if it is in range. */ + if ((true_regnum (sum2) < 1 || true_regnum (sum2) > 15) + && !(GET_CODE (sum2) == CONST_INT + && INTVAL (sum2) >= 0 && INTVAL (sum2) < 4096)) + { + if (!rtx_equal_p (target, sum1)) + { + emit_move_insn (target, sum2); + sum2 = target; + } + else + { + emit_move_insn (scratch, sum2); + sum2 = scratch; + } + } + + /* Emit the LOAD ADDRESS pattern. Note that reload of PLUS + is only ever performed on addresses, so we can mark the + sum as legitimate for LA in any case. */ + src = gen_rtx_PLUS (Pmode, sum1, sum2); + src = legitimize_la_operand (src); + emit_insn (gen_rtx_SET (VOIDmode, target, src)); +} + + +/* Decompose a RTL expression ADDR for a memory address into + its components, returned in OUT. The boolean STRICT + specifies whether strict register checking applies. + Returns 0 if ADDR is not a valid memory address, nonzero + otherwise. If OUT is NULL, don't return the components, + but check for validity only. + + Note: Only addresses in canonical form are recognized. + LEGITIMIZE_ADDRESS should convert non-canonical forms to the + canonical form so that they will be recognized. */ + +static int +s390_decompose_address (addr, out, strict) + register rtx addr; + struct s390_address *out; + int strict; +{ + rtx base = NULL_RTX; + rtx indx = NULL_RTX; + rtx disp = NULL_RTX; + int pointer = FALSE; + + /* Decompose address into base + index + displacement. */ + + if (GET_CODE (addr) == REG || GET_CODE (addr) == UNSPEC) + base = addr; + + else if (GET_CODE (addr) == PLUS) + { + rtx op0 = XEXP (addr, 0); + rtx op1 = XEXP (addr, 1); + enum rtx_code code0 = GET_CODE (op0); + enum rtx_code code1 = GET_CODE (op1); + + if (code0 == REG || code0 == UNSPEC) + { + if (code1 == REG || code1 == UNSPEC) + { + indx = op0; /* index + base */ + base = op1; + } + + else + { + base = op0; /* base + displacement */ + disp = op1; + } + } + + else if (code0 == PLUS) + { + indx = XEXP (op0, 0); /* index + base + disp */ + base = XEXP (op0, 1); + disp = op1; + } + + else + { + return FALSE; + } + } + + else + disp = addr; /* displacement */ + + + /* Validate base register. */ + if (base) + { + if (GET_CODE (base) == UNSPEC) + { + if (XVECLEN (base, 0) != 1 || XINT (base, 1) != 101) + return FALSE; + base = XVECEXP (base, 0, 0); + pointer = TRUE; + } + + if (GET_CODE (base) != REG || GET_MODE (base) != Pmode) + return FALSE; + + if ((strict && ! REG_OK_FOR_BASE_STRICT_P (base)) + || (! strict && ! REG_OK_FOR_BASE_NONSTRICT_P (base))) + return FALSE; + + if (REGNO (base) == BASE_REGISTER + || REGNO (base) == STACK_POINTER_REGNUM + || REGNO (base) == FRAME_POINTER_REGNUM + || ((reload_completed || reload_in_progress) + && frame_pointer_needed + && REGNO (base) == HARD_FRAME_POINTER_REGNUM) + || (flag_pic + && REGNO (base) == PIC_OFFSET_TABLE_REGNUM)) + pointer = TRUE; + } + + /* Validate index register. */ + if (indx) + { + if (GET_CODE (indx) == UNSPEC) + { + if (XVECLEN (indx, 0) != 1 || XINT (indx, 1) != 101) + return FALSE; + indx = XVECEXP (indx, 0, 0); + pointer = TRUE; + } + + if (GET_CODE (indx) != REG || GET_MODE (indx) != Pmode) + return FALSE; + + if ((strict && ! REG_OK_FOR_BASE_STRICT_P (indx)) + || (! strict && ! REG_OK_FOR_BASE_NONSTRICT_P (indx))) + return FALSE; + + if (REGNO (indx) == BASE_REGISTER + || REGNO (indx) == STACK_POINTER_REGNUM + || REGNO (indx) == FRAME_POINTER_REGNUM + || ((reload_completed || reload_in_progress) + && frame_pointer_needed + && REGNO (indx) == HARD_FRAME_POINTER_REGNUM) + || (flag_pic + && REGNO (indx) == PIC_OFFSET_TABLE_REGNUM)) + pointer = TRUE; + } + + /* Validate displacement. */ + if (disp) + { + /* Allow integer constant in range. */ + if (GET_CODE (disp) == CONST_INT) + { + if (INTVAL (disp) < 0 || INTVAL (disp) >= 4096) + return FALSE; + } + + /* In the small-PIC case, the linker converts @GOT12 + offsets to possible displacements. */ + else if (GET_CODE (disp) == CONST + && GET_CODE (XEXP (disp, 0)) == UNSPEC + && XINT (XEXP (disp, 0), 1) == 110) + { + if (flag_pic != 1) + return FALSE; + + pointer = TRUE; + } + + /* Accept chunkfied literal pool symbol references. */ + else if (GET_CODE (disp) == CONST + && GET_CODE (XEXP (disp, 0)) == MINUS + && GET_CODE (XEXP (XEXP (disp, 0), 0)) == LABEL_REF + && GET_CODE (XEXP (XEXP (disp, 0), 1)) == LABEL_REF) + { + pointer = TRUE; + } + + /* Likewise if a constant offset is present. */ + else if (GET_CODE (disp) == CONST + && GET_CODE (XEXP (disp, 0)) == PLUS + && GET_CODE (XEXP (XEXP (disp, 0), 1)) == CONST_INT + && GET_CODE (XEXP (XEXP (disp, 0), 0)) == MINUS + && GET_CODE (XEXP (XEXP (XEXP (disp, 0), 0), 0)) == LABEL_REF + && GET_CODE (XEXP (XEXP (XEXP (disp, 0), 0), 1)) == LABEL_REF) + { + pointer = TRUE; + } + + /* We can convert literal pool addresses to + displacements by basing them off the base register. */ + else + { + /* In some cases, we can accept an additional + small constant offset. Split these off here. */ + + unsigned int offset = 0; + + if (GET_CODE (disp) == CONST + && GET_CODE (XEXP (disp, 0)) == PLUS + && GET_CODE (XEXP (XEXP (disp, 0), 1)) == CONST_INT) + { + offset = INTVAL (XEXP (XEXP (disp, 0), 1)); + disp = XEXP (XEXP (disp, 0), 0); + } + + /* Now we must have a literal pool address. */ + if (GET_CODE (disp) != SYMBOL_REF + || !CONSTANT_POOL_ADDRESS_P (disp)) + return FALSE; + + /* In 64-bit PIC mode we cannot accept symbolic + constants in the constant pool. */ + if (TARGET_64BIT && flag_pic + && SYMBOLIC_CONST (get_pool_constant (disp))) + return FALSE; + + /* If we have an offset, make sure it does not + exceed the size of the constant pool entry. */ + if (offset && offset >= GET_MODE_SIZE (get_pool_mode (disp))) + return FALSE; + + /* Either base or index must be free to + hold the base register. */ + if (base && indx) + return FALSE; + + /* Convert the address. */ + if (base) + indx = gen_rtx_REG (Pmode, BASE_REGISTER); + else + base = gen_rtx_REG (Pmode, BASE_REGISTER); + + disp = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, disp), 100); + disp = gen_rtx_CONST (Pmode, disp); + + if (offset) + disp = plus_constant (disp, offset); + + pointer = TRUE; + } + } + + if (!base && !indx) + pointer = TRUE; + + if (out) + { + out->base = base; + out->indx = indx; + out->disp = disp; + out->pointer = pointer; + } + + return TRUE; +} + +/* Return nonzero if ADDR is a valid memory address. + STRICT specifies whether strict register checking applies. */ + +int +legitimate_address_p (mode, addr, strict) + enum machine_mode mode ATTRIBUTE_UNUSED; + register rtx addr; + int strict; +{ + return s390_decompose_address (addr, NULL, strict); +} + +/* Return 1 if OP is a valid operand for the LA instruction. + In 31-bit, we need to prove that the result is used as an + address, as LA performs only a 31-bit addition. */ + +int +legitimate_la_operand_p (op) + register rtx op; +{ + struct s390_address addr; + if (!s390_decompose_address (op, &addr, FALSE)) + return FALSE; + + if (TARGET_64BIT || addr.pointer) + return TRUE; + + return FALSE; +} + +/* Return a modified variant of OP that is guaranteed to + be accepted by legitimate_la_operand_p. */ + +rtx +legitimize_la_operand (op) + register rtx op; +{ + struct s390_address addr; + if (!s390_decompose_address (op, &addr, FALSE)) + abort (); + + if (TARGET_64BIT || addr.pointer) + return op; + + if (!addr.base) + abort (); + + op = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr.base), 101); + if (addr.indx) + op = gen_rtx_PLUS (Pmode, op, addr.indx); + if (addr.disp) + op = gen_rtx_PLUS (Pmode, op, addr.disp); + + return op; +} + +/* Return a legitimate reference for ORIG (an address) using the + register REG. If REG is 0, a new pseudo is generated. + + There are two types of references that must be handled: + + 1. Global data references must load the address from the GOT, via + the PIC reg. An insn is emitted to do this load, and the reg is + returned. + + 2. Static data references, constant pool addresses, and code labels + compute the address as an offset from the GOT, whose base is in + the PIC reg. Static data objects have SYMBOL_REF_FLAG set to + differentiate them from global data objects. The returned + address is the PIC reg + an unspec constant. + + GO_IF_LEGITIMATE_ADDRESS rejects symbolic references unless the PIC + reg also appears in the address. */ + +rtx +legitimize_pic_address (orig, reg) + rtx orig; + rtx reg; +{ + rtx addr = orig; + rtx new = orig; + rtx base; + + if (GET_CODE (addr) == LABEL_REF + || (GET_CODE (addr) == SYMBOL_REF + && (SYMBOL_REF_FLAG (addr) + || CONSTANT_POOL_ADDRESS_P (addr)))) + { + /* This is a local symbol. */ + if (TARGET_64BIT) + { + /* Access local symbols PC-relative via LARL. + This is the same as in the non-PIC case, so it is + handled automatically ... */ + } + else + { + /* Access local symbols relative to the literal pool. */ + + rtx temp = reg? reg : gen_reg_rtx (Pmode); + + addr = gen_rtx_UNSPEC (SImode, gen_rtvec (1, addr), 100); + addr = gen_rtx_CONST (SImode, addr); + addr = force_const_mem (SImode, addr); + emit_move_insn (temp, addr); + + base = gen_rtx_REG (Pmode, BASE_REGISTER); + base = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, base), 101); + new = gen_rtx_PLUS (Pmode, base, temp); + + if (reg != 0) + { + emit_move_insn (reg, new); + new = reg; + } + } + } + else if (GET_CODE (addr) == SYMBOL_REF) + { + if (reg == 0) + reg = gen_reg_rtx (Pmode); + + if (flag_pic == 1) + { + /* Assume GOT offset < 4k. This is handled the same way + in both 31- and 64-bit code (@GOT12). */ + + current_function_uses_pic_offset_table = 1; + + new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), 110); + new = gen_rtx_CONST (Pmode, new); + new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, new); + new = gen_rtx_MEM (Pmode, new); + RTX_UNCHANGING_P (new) = 1; + emit_move_insn (reg, new); + new = reg; + } + else if (TARGET_64BIT) + { + /* If the GOT offset might be >= 4k, we determine the position + of the GOT entry via a PC-relative LARL (@GOTENT). */ + + rtx temp = gen_reg_rtx (Pmode); + + new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), 111); + new = gen_rtx_CONST (Pmode, new); + emit_move_insn (temp, new); + + new = gen_rtx_MEM (Pmode, temp); + RTX_UNCHANGING_P (new) = 1; + emit_move_insn (reg, new); + new = reg; + } + else + { + /* If the GOT offset might be >= 4k, we have to load it + from the literal pool (@GOT). */ + + rtx temp = gen_reg_rtx (Pmode); + + current_function_uses_pic_offset_table = 1; + + addr = gen_rtx_UNSPEC (SImode, gen_rtvec (1, addr), 112); + addr = gen_rtx_CONST (SImode, addr); + addr = force_const_mem (SImode, addr); + emit_move_insn (temp, addr); + + new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp); + new = gen_rtx_MEM (Pmode, new); + RTX_UNCHANGING_P (new) = 1; + emit_move_insn (reg, new); + new = reg; + } + } + else + { + if (GET_CODE (addr) == CONST) + { + addr = XEXP (addr, 0); + if (GET_CODE (addr) == UNSPEC) + { + if (XVECLEN (addr, 0) != 1) + abort (); + switch (XINT (addr, 1)) + { + /* If someone moved an @GOT or lt-relative UNSPEC + out of the literal pool, force them back in. */ + case 100: + case 112: + case 114: + new = force_const_mem (SImode, orig); + break; + + /* @GOTENT is OK as is. */ + case 111: + break; + + /* @PLT is OK as is on 64-bit, must be converted to + lt-relative PLT on 31-bit. */ + case 113: + if (!TARGET_64BIT) + { + rtx temp = reg? reg : gen_reg_rtx (Pmode); + + addr = XVECEXP (addr, 0, 0); + addr = gen_rtx_UNSPEC (SImode, gen_rtvec (1, addr), 114); + addr = gen_rtx_CONST (SImode, addr); + addr = force_const_mem (SImode, addr); + emit_move_insn (temp, addr); + + base = gen_rtx_REG (Pmode, BASE_REGISTER); + base = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, base), 101); + new = gen_rtx_PLUS (Pmode, base, temp); + + if (reg != 0) + { + emit_move_insn (reg, new); + new = reg; + } + } + break; + + /* Everything else cannot happen. */ + default: + abort (); + } + } + else if (GET_CODE (addr) != PLUS) + abort (); + } + if (GET_CODE (addr) == PLUS) + { + rtx op0 = XEXP (addr, 0), op1 = XEXP (addr, 1); + /* Check first to see if this is a constant offset + from a local symbol reference. */ + if ((GET_CODE (op0) == LABEL_REF + || (GET_CODE (op0) == SYMBOL_REF + && (SYMBOL_REF_FLAG (op0) + || CONSTANT_POOL_ADDRESS_P (op0)))) + && GET_CODE (op1) == CONST_INT) + { + if (TARGET_64BIT) + { + if (INTVAL (op1) & 1) + { + /* LARL can't handle odd offsets, so emit a + pair of LARL and LA. */ + rtx temp = reg? reg : gen_reg_rtx (Pmode); + + if (INTVAL (op1) < 0 || INTVAL (op1) >= 4096) + { + int even = INTVAL (op1) - 1; + op0 = gen_rtx_PLUS (Pmode, op0, GEN_INT (even)); + op0 = gen_rtx_CONST (Pmode, op0); + op1 = GEN_INT (1); + } + + emit_move_insn (temp, op0); + new = gen_rtx_PLUS (Pmode, temp, op1); + + if (reg != 0) + { + emit_move_insn (reg, new); + new = reg; + } + } + else + { + /* If the offset is even, we can just use LARL. + This will happen automatically. */ + } + } + else + { + /* Access local symbols relative to the literal pool. */ + + rtx temp = reg? reg : gen_reg_rtx (Pmode); + + addr = gen_rtx_UNSPEC (SImode, gen_rtvec (1, op0), 100); + addr = gen_rtx_PLUS (SImode, addr, op1); + addr = gen_rtx_CONST (SImode, addr); + addr = force_const_mem (SImode, addr); + emit_move_insn (temp, addr); + + base = gen_rtx_REG (Pmode, BASE_REGISTER); + base = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, base), 101); + new = gen_rtx_PLUS (Pmode, base, temp); + + if (reg != 0) + { + emit_move_insn (reg, new); + new = reg; + } + } + } + + /* Now, check whether it is an LT-relative symbol plus offset + that was pulled out of the literal pool. Force it back in. */ + + else if (GET_CODE (op0) == UNSPEC + && GET_CODE (op1) == CONST_INT) + { + if (XVECLEN (op0, 0) != 1) + abort (); + if (XINT (op0, 1) != 100) + abort (); + + new = force_const_mem (SImode, orig); + } + + /* Otherwise, compute the sum. */ + else + { + base = legitimize_pic_address (XEXP (addr, 0), reg); + new = legitimize_pic_address (XEXP (addr, 1), + base == reg ? NULL_RTX : reg); + if (GET_CODE (new) == CONST_INT) + new = plus_constant (base, INTVAL (new)); + else + { + if (GET_CODE (new) == PLUS && CONSTANT_P (XEXP (new, 1))) + { + base = gen_rtx_PLUS (Pmode, base, XEXP (new, 0)); + new = XEXP (new, 1); + } + new = gen_rtx_PLUS (Pmode, base, new); + } + + if (GET_CODE (new) == CONST) + new = XEXP (new, 0); + new = force_operand (new, 0); + } + } + } + return new; +} + +/* Emit insns to move operands[1] into operands[0]. */ + +void +emit_pic_move (operands, mode) + rtx *operands; + enum machine_mode mode ATTRIBUTE_UNUSED; +{ + rtx temp = no_new_pseudos ? operands[0] : gen_reg_rtx (Pmode); + + if (GET_CODE (operands[0]) == MEM && SYMBOLIC_CONST (operands[1])) + operands[1] = force_reg (Pmode, operands[1]); + else + operands[1] = legitimize_pic_address (operands[1], temp); +} + +/* Try machine-dependent ways of modifying an illegitimate address X + to be legitimate. If we find one, return the new, valid address. + + OLDX is the address as it was before break_out_memory_refs was called. + In some cases it is useful to look at this to decide what needs to be done. + + MODE is the mode of the operand pointed to by X. + + When -fpic is used, special handling is needed for symbolic references. + See comments by legitimize_pic_address for details. */ + +rtx +legitimize_address (x, oldx, mode) + register rtx x; + register rtx oldx ATTRIBUTE_UNUSED; + enum machine_mode mode ATTRIBUTE_UNUSED; +{ + rtx constant_term = const0_rtx; + + if (flag_pic) + { + if (SYMBOLIC_CONST (x) + || (GET_CODE (x) == PLUS + && (SYMBOLIC_CONST (XEXP (x, 0)) + || SYMBOLIC_CONST (XEXP (x, 1))))) + x = legitimize_pic_address (x, 0); + + if (legitimate_address_p (mode, x, FALSE)) + return x; + } + + x = eliminate_constant_term (x, &constant_term); + + if (GET_CODE (x) == PLUS) + { + if (GET_CODE (XEXP (x, 0)) == REG) + { + register rtx temp = gen_reg_rtx (Pmode); + register rtx val = force_operand (XEXP (x, 1), temp); + if (val != temp) + emit_move_insn (temp, val); + + x = gen_rtx_PLUS (Pmode, XEXP (x, 0), temp); + } + + else if (GET_CODE (XEXP (x, 1)) == REG) + { + register rtx temp = gen_reg_rtx (Pmode); + register rtx val = force_operand (XEXP (x, 0), temp); + if (val != temp) + emit_move_insn (temp, val); + + x = gen_rtx_PLUS (Pmode, temp, XEXP (x, 1)); + } + } + + if (constant_term != const0_rtx) + x = gen_rtx_PLUS (Pmode, x, constant_term); + + return x; +} + +/* In the name of slightly smaller debug output, and to cater to + general assembler losage, recognize various UNSPEC sequences + and turn them back into a direct symbol reference. */ + +rtx +s390_simplify_dwarf_addr (orig_x) + rtx orig_x; +{ + rtx x = orig_x, y; + + if (GET_CODE (x) != MEM) + return orig_x; + + x = XEXP (x, 0); + if (GET_CODE (x) == PLUS + && GET_CODE (XEXP (x, 1)) == CONST + && GET_CODE (XEXP (x, 0)) == REG + && REGNO (XEXP (x, 0)) == PIC_OFFSET_TABLE_REGNUM) + { + y = XEXP (XEXP (x, 1), 0); + if (GET_CODE (y) == UNSPEC + && XINT (y, 1) == 110) + return XVECEXP (y, 0, 0); + return orig_x; + } + + if (GET_CODE (x) == CONST) + { + y = XEXP (x, 0); + if (GET_CODE (y) == UNSPEC + && XINT (y, 1) == 111) + return XVECEXP (y, 0, 0); + return orig_x; + } + + return orig_x; +} + +/* Output symbolic constant X in assembler syntax to + stdio stream FILE. */ + +void +s390_output_symbolic_const (file, x) + FILE *file; + rtx x; +{ + switch (GET_CODE (x)) + { + case CONST: + case ZERO_EXTEND: + case SIGN_EXTEND: + s390_output_symbolic_const (file, XEXP (x, 0)); + break; + + case PLUS: + s390_output_symbolic_const (file, XEXP (x, 0)); + fprintf (file, "+"); + s390_output_symbolic_const (file, XEXP (x, 1)); + break; + + case MINUS: + s390_output_symbolic_const (file, XEXP (x, 0)); + fprintf (file, "-"); + s390_output_symbolic_const (file, XEXP (x, 1)); + break; + + case CONST_INT: + case LABEL_REF: + case CODE_LABEL: + case SYMBOL_REF: + output_addr_const (file, x); + break; + + case UNSPEC: + if (XVECLEN (x, 0) != 1) + output_operand_lossage ("invalid UNSPEC as operand (1)"); + switch (XINT (x, 1)) + { + case 100: + s390_output_symbolic_const (file, XVECEXP (x, 0, 0)); + fprintf (file, "-.LT%X", s390_function_count); + break; + case 110: + s390_output_symbolic_const (file, XVECEXP (x, 0, 0)); + fprintf (file, "@GOT12"); + break; + case 111: + s390_output_symbolic_const (file, XVECEXP (x, 0, 0)); + fprintf (file, "@GOTENT"); + break; + case 112: + s390_output_symbolic_const (file, XVECEXP (x, 0, 0)); + fprintf (file, "@GOT"); + break; + case 113: + s390_output_symbolic_const (file, XVECEXP (x, 0, 0)); + fprintf (file, "@PLT"); + break; + case 114: + s390_output_symbolic_const (file, XVECEXP (x, 0, 0)); + fprintf (file, "@PLT-.LT%X", s390_function_count); + break; + default: + output_operand_lossage ("invalid UNSPEC as operand (2)"); + break; + } + break; + + default: + fatal_insn ("UNKNOWN in s390_output_symbolic_const !?", x); + break; + } +} + +/* Output address operand ADDR in assembler syntax to + stdio stream FILE. */ + +void +print_operand_address (file, addr) + FILE *file; + rtx addr; +{ + struct s390_address ad; + + if (!s390_decompose_address (addr, &ad, TRUE)) + output_operand_lossage ("Cannot decompose address."); + + if (ad.disp) + s390_output_symbolic_const (file, ad.disp); + else + fprintf (file, "0"); + + if (ad.base && ad.indx) + fprintf (file, "(%s,%s)", reg_names[REGNO (ad.indx)], + reg_names[REGNO (ad.base)]); + else if (ad.base) + fprintf (file, "(%s)", reg_names[REGNO (ad.base)]); +} + +/* Output operand X in assembler syntax to stdio stream FILE. + CODE specified the format flag. The following format flags + are recognized: + + 'C': print opcode suffix for branch condition. + 'D': print opcode suffix for inverse branch condition. + 'O': print only the displacement of a memory reference. + 'R': print only the base register of a memory reference. + 'N': print the second word of a DImode operand. + 'M': print the second word of a TImode operand. + + 'b': print integer X as if it's an unsigned byte. + 'x': print integer X as if it's an unsigned word. + 'h': print integer X as if it's a signed word. */ + +void +print_operand (file, x, code) + FILE *file; + rtx x; + int code; +{ + switch (code) + { + case 'C': + fprintf (file, s390_branch_condition_mnemonic (x, FALSE)); + return; + + case 'D': + fprintf (file, s390_branch_condition_mnemonic (x, TRUE)); + return; + + case 'O': + { + struct s390_address ad; + + if (GET_CODE (x) != MEM + || !s390_decompose_address (XEXP (x, 0), &ad, TRUE) + || ad.indx) + abort (); + + if (ad.disp) + s390_output_symbolic_const (file, ad.disp); + else + fprintf (file, "0"); + } + return; + + case 'R': + { + struct s390_address ad; + + if (GET_CODE (x) != MEM + || !s390_decompose_address (XEXP (x, 0), &ad, TRUE) + || ad.indx) + abort (); + + if (ad.base) + fprintf (file, "%s", reg_names[REGNO (ad.base)]); + else + fprintf (file, "0"); + } + return; + + case 'N': + if (GET_CODE (x) == REG) + x = gen_rtx_REG (GET_MODE (x), REGNO (x) + 1); + else if (GET_CODE (x) == MEM) + x = change_address (x, VOIDmode, plus_constant (XEXP (x, 0), 4)); + else + abort (); + break; + + case 'M': + if (GET_CODE (x) == REG) + x = gen_rtx_REG (GET_MODE (x), REGNO (x) + 1); + else if (GET_CODE (x) == MEM) + x = change_address (x, VOIDmode, plus_constant (XEXP (x, 0), 8)); + else + abort (); + break; + } + + switch (GET_CODE (x)) + { + case REG: + fprintf (file, "%s", reg_names[REGNO (x)]); + break; + + case MEM: + output_address (XEXP (x, 0)); + break; + + case CONST: + case CODE_LABEL: + case LABEL_REF: + case SYMBOL_REF: + s390_output_symbolic_const (file, x); + break; + + case CONST_INT: + if (code == 'b') + fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x) & 0xff); + else if (code == 'x') + fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x) & 0xffff); + else if (code == 'h') + fprintf (file, HOST_WIDE_INT_PRINT_DEC, ((INTVAL (x) & 0xffff) ^ 0x8000) - 0x8000); + else + fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x)); + break; + + case CONST_DOUBLE: + if (GET_MODE (x) != VOIDmode) + abort (); + if (code == 'b') + fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x) & 0xff); + else if (code == 'x') + fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x) & 0xffff); + else if (code == 'h') + fprintf (file, HOST_WIDE_INT_PRINT_DEC, ((CONST_DOUBLE_LOW (x) & 0xffff) ^ 0x8000) - 0x8000); + else + abort (); + break; + + default: + fatal_insn ("UNKNOWN in print_operand !?", x); + break; + } +} + +/* Target hook for assembling integer objects. We need to define it + here to work a round a bug in some versions of GAS, which couldn't + handle values smaller than INT_MIN when printed in decimal. */ + +static bool +s390_assemble_integer (x, size, aligned_p) + rtx x; + unsigned int size; + int aligned_p; +{ + if (size == 8 && aligned_p + && GET_CODE (x) == CONST_INT && INTVAL (x) < INT_MIN) + { + fputs ("\t.quad\t", asm_out_file); + fprintf (asm_out_file, HOST_WIDE_INT_PRINT_HEX, INTVAL (x)); + putc ('\n', asm_out_file); + return true; + } + return default_assemble_integer (x, size, aligned_p); +} + + +#define DEBUG_SCHED 0 + +/* Returns true if register REGNO is used for forming + a memory address in expression X. */ + +static int +reg_used_in_mem_p (regno, x) + int regno; + rtx x; +{ + enum rtx_code code = GET_CODE (x); + int i, j; + const char *fmt; + + if (code == MEM) + { + if (refers_to_regno_p (regno, regno+1, + XEXP (x, 0), 0)) + return 1; + } + else if (code == SET + && GET_CODE (SET_DEST (x)) == PC) + { + if (refers_to_regno_p (regno, regno+1, + SET_SRC (x), 0)) + return 1; + } + + fmt = GET_RTX_FORMAT (code); + for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) + { + if (fmt[i] == 'e' + && reg_used_in_mem_p (regno, XEXP (x, i))) + return 1; + + else if (fmt[i] == 'E') + for (j = 0; j < XVECLEN (x, i); j++) + if (reg_used_in_mem_p (regno, XVECEXP (x, i, j))) + return 1; + } + return 0; +} + +/* Returns true if expression DEP_RTX sets an address register + used by instruction INSN to address memory. */ + +static int +addr_generation_dependency_p (dep_rtx, insn) + rtx dep_rtx; + rtx insn; +{ + rtx target, pat; + + if (GET_CODE (dep_rtx) == SET) + { + target = SET_DEST (dep_rtx); + + if (GET_CODE (target) == REG) + { + int regno = REGNO (target); + + if (get_attr_type (insn) == TYPE_LA) + { + pat = PATTERN (insn); + if (GET_CODE (pat) == PARALLEL) + { + if (XVECLEN (pat, 0) != 2) + abort(); + pat = XVECEXP (pat, 0, 0); + } + if (GET_CODE (pat) == SET) + return refers_to_regno_p (regno, regno+1, SET_SRC (pat), 0); + else + abort(); + } + else if (get_attr_atype (insn) == ATYPE_MEM) + return reg_used_in_mem_p (regno, PATTERN (insn)); + } + } + return 0; +} + + +/* Return the modified cost of the dependency of instruction INSN + on instruction DEP_INSN through the link LINK. COST is the + default cost of that dependency. + + Data dependencies are all handled without delay. However, if a + register is modified and subsequently used as base or index + register of a memory reference, at least 4 cycles need to pass + between setting and using the register to avoid pipeline stalls. + An exception is the LA instruction. An address generated by LA can + be used by introducing only a one cycle stall on the pipeline. */ + +static int +s390_adjust_cost (insn, link, dep_insn, cost) + rtx insn; + rtx link; + rtx dep_insn; + int cost; +{ + rtx dep_rtx; + int i; + + /* If the dependence is an anti-dependence, there is no cost. For an + output dependence, there is sometimes a cost, but it doesn't seem + worth handling those few cases. */ + + if (REG_NOTE_KIND (link) != 0) + return 0; + + /* If we can't recognize the insns, we can't really do anything. */ + if (recog_memoized (insn) < 0 || recog_memoized (dep_insn) < 0) + return cost; + + dep_rtx = PATTERN (dep_insn); + + if (GET_CODE (dep_rtx) == SET) + { + if (addr_generation_dependency_p (dep_rtx, insn)) + { + cost += (get_attr_type (dep_insn) == TYPE_LA) ? 1 : 4; + if (DEBUG_SCHED) + { + fprintf (stderr, "\n\nAddress dependency detected: cost %d\n", + cost); + debug_rtx (dep_insn); + debug_rtx (insn); + } + } + } + else if (GET_CODE (dep_rtx) == PARALLEL) + { + for (i = 0; i < XVECLEN (dep_rtx, 0); i++) + { + if (addr_generation_dependency_p (XVECEXP (dep_rtx, 0, i), + insn)) + { + cost += (get_attr_type (dep_insn) == TYPE_LA) ? 1 : 4; + if (DEBUG_SCHED) + { + fprintf (stderr, "\n\nAddress dependency detected: cost %d\n" + ,cost); + debug_rtx (dep_insn); + debug_rtx (insn); + } + } + } + } + + return cost; +} + + +/* A C statement (sans semicolon) to update the integer scheduling priority + INSN_PRIORITY (INSN). Reduce the priority to execute the INSN earlier, + increase the priority to execute INSN later. Do not define this macro if + you do not need to adjust the scheduling priorities of insns. + + A LA instruction maybe scheduled later, since the pipeline bypasses the + calculated value. */ + +static int +s390_adjust_priority (insn, priority) + rtx insn ATTRIBUTE_UNUSED; + int priority; +{ + if (! INSN_P (insn)) + return priority; + + if (GET_CODE (PATTERN (insn)) == USE + || GET_CODE (PATTERN (insn)) == CLOBBER) + return priority; + + switch (get_attr_type (insn)) + { + default: + break; + + case TYPE_LA: + if (priority >= 0 && priority < 0x01000000) + priority <<= 3; + break; + case TYPE_LM: + /* LM in epilogue should never be scheduled. This + is due to literal access done in function body. + The usage of register 13 is not mentioned explicitly, + leading to scheduling 'LM' accross this instructions. + */ + priority = 0x7fffffff; + break; + } + + return priority; +} + + +/* Split all branches that exceed the maximum distance. */ + +static void +s390_split_branches (void) +{ + rtx temp_reg = gen_rtx_REG (Pmode, RETURN_REGNUM); + rtx insn, pat, label, target, jump, tmp; + + /* In 64-bit mode we can jump +- 4GB. */ + + if (TARGET_64BIT) + return; + + /* Find all branches that exceed 64KB, and split them. */ + + for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) + { + if (GET_CODE (insn) != JUMP_INSN) + continue; + + pat = PATTERN (insn); + if (GET_CODE (pat) != SET) + continue; + + if (GET_CODE (SET_SRC (pat)) == LABEL_REF) + { + label = SET_SRC (pat); + } + else if (GET_CODE (SET_SRC (pat)) == IF_THEN_ELSE) + { + if (GET_CODE (XEXP (SET_SRC (pat), 1)) == LABEL_REF) + label = XEXP (SET_SRC (pat), 1); + else if (GET_CODE (XEXP (SET_SRC (pat), 2)) == LABEL_REF) + label = XEXP (SET_SRC (pat), 2); + else + continue; + } + else + continue; + + if (get_attr_length (insn) == 4) + continue; + + if (flag_pic) + { + target = gen_rtx_UNSPEC (SImode, gen_rtvec (1, label), 100); + target = gen_rtx_CONST (SImode, target); + target = force_const_mem (SImode, target); + jump = gen_rtx_REG (Pmode, BASE_REGISTER); + jump = gen_rtx_PLUS (Pmode, jump, temp_reg); + } + else + { + target = force_const_mem (Pmode, label); + jump = temp_reg; + } + + if (GET_CODE (SET_SRC (pat)) == IF_THEN_ELSE) + { + if (GET_CODE (XEXP (SET_SRC (pat), 1)) == LABEL_REF) + jump = gen_rtx_IF_THEN_ELSE (VOIDmode, XEXP (SET_SRC (pat), 0), + jump, pc_rtx); + else + jump = gen_rtx_IF_THEN_ELSE (VOIDmode, XEXP (SET_SRC (pat), 0), + pc_rtx, jump); + } + + tmp = emit_insn_before (gen_rtx_SET (Pmode, temp_reg, target), insn); + INSN_ADDRESSES_NEW (tmp, -1); + + tmp = emit_jump_insn_before (gen_rtx_SET (VOIDmode, pc_rtx, jump), insn); + INSN_ADDRESSES_NEW (tmp, -1); + + remove_insn (insn); + insn = tmp; + } +} + + +/* Find a literal pool symbol referenced in RTX X, and store + it at REF. Will abort if X contains references to more than + one such pool symbol; multiple references to the same symbol + are allowed, however. + + The rtx pointed to by REF must be initialized to NULL_RTX + by the caller before calling this routine. */ + +static void +find_constant_pool_ref (x, ref) + rtx x; + rtx *ref; +{ + int i, j; + const char *fmt; + + if (GET_CODE (x) == SYMBOL_REF + && CONSTANT_POOL_ADDRESS_P (x)) + { + if (*ref == NULL_RTX) + *ref = x; + else if (*ref != x) + abort(); + } + + fmt = GET_RTX_FORMAT (GET_CODE (x)); + for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--) + { + if (fmt[i] == 'e') + { + find_constant_pool_ref (XEXP (x, i), ref); + } + else if (fmt[i] == 'E') + { + for (j = 0; j < XVECLEN (x, i); j++) + find_constant_pool_ref (XVECEXP (x, i, j), ref); + } + } +} + +/* Replace every reference to the literal pool symbol REF + in X by the address ADDR. Fix up MEMs as required. */ + +static void +replace_constant_pool_ref (x, ref, addr) + rtx *x; + rtx ref; + rtx addr; +{ + int i, j; + const char *fmt; + + if (*x == ref) + abort (); + + /* Literal pool references can only occur inside a MEM ... */ + if (GET_CODE (*x) == MEM) + { + rtx memref = XEXP (*x, 0); + + if (memref == ref) + { + *x = replace_equiv_address (*x, addr); + return; + } + + if (GET_CODE (memref) == CONST + && GET_CODE (XEXP (memref, 0)) == PLUS + && GET_CODE (XEXP (XEXP (memref, 0), 1)) == CONST_INT + && XEXP (XEXP (memref, 0), 0) == ref) + { + HOST_WIDE_INT off = INTVAL (XEXP (XEXP (memref, 0), 1)); + *x = replace_equiv_address (*x, plus_constant (addr, off)); + return; + } + } + + /* ... or a load-address type pattern. */ + if (GET_CODE (*x) == SET) + { + rtx addrref = SET_SRC (*x); + + if (addrref == ref) + { + SET_SRC (*x) = addr; + return; + } + + if (GET_CODE (addrref) == CONST + && GET_CODE (XEXP (addrref, 0)) == PLUS + && GET_CODE (XEXP (XEXP (addrref, 0), 1)) == CONST_INT + && XEXP (XEXP (addrref, 0), 0) == ref) + { + HOST_WIDE_INT off = INTVAL (XEXP (XEXP (addrref, 0), 1)); + SET_SRC (*x) = plus_constant (addr, off); + return; + } + } + + fmt = GET_RTX_FORMAT (GET_CODE (*x)); + for (i = GET_RTX_LENGTH (GET_CODE (*x)) - 1; i >= 0; i--) + { + if (fmt[i] == 'e') + { + replace_constant_pool_ref (&XEXP (*x, i), ref, addr); + } + else if (fmt[i] == 'E') + { + for (j = 0; j < XVECLEN (*x, i); j++) + replace_constant_pool_ref (&XVECEXP (*x, i, j), ref, addr); + } + } +} + +/* We keep a list of constants we which we have to add to internal + constant tables in the middle of large functions. */ + +#define NR_C_MODES 6 +enum machine_mode constant_modes[NR_C_MODES] = +{ + DFmode, DImode, + SFmode, SImode, + HImode, + QImode +}; + +rtx (*gen_consttable[NR_C_MODES])(rtx) = +{ + gen_consttable_df, gen_consttable_di, + gen_consttable_sf, gen_consttable_si, + gen_consttable_hi, + gen_consttable_qi +}; + +struct constant +{ + struct constant *next; + rtx value; + rtx label; +}; + +struct constant_pool +{ + struct constant_pool *next; + rtx first_insn; + rtx last_insn; + + struct constant *constants[NR_C_MODES]; + rtx label; + int size; +}; + +static struct constant_pool *s390_start_pool PARAMS ((struct constant_pool **, rtx)); +static void s390_end_pool PARAMS ((struct constant_pool *, rtx)); +static struct constant_pool *s390_find_pool PARAMS ((struct constant_pool *, rtx)); +static rtx s390_add_pool PARAMS ((struct constant_pool *, rtx, enum machine_mode)); +static rtx s390_dump_pool PARAMS ((struct constant_pool *)); +static void s390_free_pool PARAMS ((struct constant_pool *)); + +/* Create new constant pool covering instructions starting at INSN + and chain it to the end of POOL_LIST. */ + +static struct constant_pool * +s390_start_pool (pool_list, insn) + struct constant_pool **pool_list; + rtx insn; +{ + struct constant_pool *pool, **prev; + int i; + + pool = (struct constant_pool *) xmalloc (sizeof *pool); + pool->next = NULL; + for (i = 0; i < NR_C_MODES; i++) + pool->constants[i] = NULL; + + pool->label = gen_label_rtx (); + pool->first_insn = insn; + pool->last_insn = NULL_RTX; + pool->size = 0; + + for (prev = pool_list; *prev; prev = &(*prev)->next) + ; + *prev = pool; + + return pool; +} + +/* End range of instructions covered by POOL at INSN. */ + +static void +s390_end_pool (pool, insn) + struct constant_pool *pool; + rtx insn; +{ + pool->last_insn = insn; +} + +/* Return pool out of POOL_LIST that covers INSN. */ + +static struct constant_pool * +s390_find_pool (pool_list, insn) + struct constant_pool *pool_list; + rtx insn; +{ + int addr = INSN_ADDRESSES (INSN_UID (insn)); + struct constant_pool *pool; + + if (addr == -1) + return NULL; + + for (pool = pool_list; pool; pool = pool->next) + if (INSN_ADDRESSES (INSN_UID (pool->first_insn)) <= addr + && (pool->last_insn == NULL_RTX + || INSN_ADDRESSES (INSN_UID (pool->last_insn)) > addr)) + break; + + return pool; +} + +/* Add constant VAL of mode MODE to the constant pool POOL. + Return an RTX describing the distance from the start of + the pool to the location of the new constant. */ + +static rtx +s390_add_pool (pool, val, mode) + struct constant_pool *pool; + rtx val; + enum machine_mode mode; +{ + struct constant *c; + rtx offset; + int i; + + for (i = 0; i < NR_C_MODES; i++) + if (constant_modes[i] == mode) + break; + if (i == NR_C_MODES) + abort (); + + for (c = pool->constants[i]; c != NULL; c = c->next) + if (rtx_equal_p (val, c->value)) + break; + + if (c == NULL) + { + c = (struct constant *) xmalloc (sizeof *c); + c->value = val; + c->label = gen_label_rtx (); + c->next = pool->constants[i]; + pool->constants[i] = c; + pool->size += GET_MODE_SIZE (mode); + } + + offset = gen_rtx_MINUS (Pmode, gen_rtx_LABEL_REF (Pmode, c->label), + gen_rtx_LABEL_REF (Pmode, pool->label)); + offset = gen_rtx_CONST (Pmode, offset); + return offset; +} + +/* Dump out the constants in POOL. */ + +static rtx +s390_dump_pool (pool) + struct constant_pool *pool; +{ + struct constant *c; + rtx insn; + int i; + + /* Select location to put literal pool. */ + if (TARGET_64BIT) + insn = get_last_insn (); + else + insn = pool->last_insn? pool->last_insn : get_last_insn (); + + /* Pool start insn switches to proper section + and guarantees necessary alignment. */ + if (TARGET_64BIT) + insn = emit_insn_after (gen_pool_start_64 (), insn); + else + insn = emit_insn_after (gen_pool_start_31 (), insn); + INSN_ADDRESSES_NEW (insn, -1); + + insn = emit_label_after (pool->label, insn); + INSN_ADDRESSES_NEW (insn, -1); + + /* Dump constants in descending alignment requirement order, + ensuring proper alignment for every constant. */ + for (i = 0; i < NR_C_MODES; i++) + for (c = pool->constants[i]; c; c = c->next) + { + insn = emit_label_after (c->label, insn); + INSN_ADDRESSES_NEW (insn, -1); + insn = emit_insn_after (gen_consttable[i] (c->value), insn); + INSN_ADDRESSES_NEW (insn, -1); + } + + /* Pool end insn switches back to previous section + and guarantees necessary alignment. */ + if (TARGET_64BIT) + insn = emit_insn_after (gen_pool_end_64 (), insn); + else + insn = emit_insn_after (gen_pool_end_31 (), insn); + INSN_ADDRESSES_NEW (insn, -1); + + insn = emit_barrier_after (insn); + INSN_ADDRESSES_NEW (insn, -1); + + return insn; +} + +/* Free all memory used by POOL. */ + +static void +s390_free_pool (pool) + struct constant_pool *pool; +{ + int i; + + for (i = 0; i < NR_C_MODES; i++) + { + struct constant *c = pool->constants[i]; + while (c != NULL) + { + struct constant *next = c->next; + free (c); + c = next; + } + } + + free (pool); +} + +/* Used in s390.md for branch length calculation. */ +int s390_pool_overflow = 0; + +/* Chunkify the literal pool if required. */ + +#define S390_POOL_CHUNK_MIN 0xc00 +#define S390_POOL_CHUNK_MAX 0xe00 + +static void +s390_chunkify_pool (void) +{ + rtx base_reg = gen_rtx_REG (Pmode, + TARGET_64BIT? BASE_REGISTER : RETURN_REGNUM); + + struct constant_pool *curr_pool = NULL, *pool_list = NULL; + int extra_size = 0; + bitmap far_labels; + rtx insn; + + /* Do we need to chunkify the literal pool? */ + + if (get_pool_size () < S390_POOL_CHUNK_MAX) + return; + + /* Scan all insns and move literals to pool chunks. + Replace all occurrances of literal pool references + by explicit references to pool chunk entries. */ + + for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) + { + if (GET_CODE (insn) == INSN) + { + rtx addr, pool_ref = NULL_RTX; + find_constant_pool_ref (PATTERN (insn), &pool_ref); + if (pool_ref) + { + if (!curr_pool) + curr_pool = s390_start_pool (&pool_list, insn); + + addr = s390_add_pool (curr_pool, get_pool_constant (pool_ref), + get_pool_mode (pool_ref)); + + addr = gen_rtx_PLUS (Pmode, base_reg, addr); + replace_constant_pool_ref (&PATTERN (insn), pool_ref, addr); + INSN_CODE (insn) = -1; + } + } + + if (!curr_pool + || INSN_ADDRESSES_SIZE () <= (size_t) INSN_UID (insn) + || INSN_ADDRESSES (INSN_UID (insn)) == -1) + continue; + + if (TARGET_64BIT) + { + if (curr_pool->size < S390_POOL_CHUNK_MAX) + continue; + + s390_end_pool (curr_pool, insn); + curr_pool = NULL; + } + else + { + int chunk_size = INSN_ADDRESSES (INSN_UID (insn)) + - INSN_ADDRESSES (INSN_UID (curr_pool->first_insn)) + + extra_size; + + /* We will later have to insert base register reload insns. + Those will have an effect on code size, which we need to + consider here. This calculation makes rather pessimistic + worst-case assumptions. */ + if (GET_CODE (insn) == CODE_LABEL + || GET_CODE (insn) == JUMP_INSN) + extra_size += 6; + else if (GET_CODE (insn) == CALL_INSN) + extra_size += 4; + + if (chunk_size < S390_POOL_CHUNK_MIN + && curr_pool->size < S390_POOL_CHUNK_MIN) + continue; + + /* Pool chunks can only be inserted after BARRIERs ... */ + if (GET_CODE (insn) == BARRIER) + { + s390_end_pool (curr_pool, insn); + curr_pool = NULL; + extra_size = 0; + } + + /* ... so if we don't find one in time, create one. */ + else if ((chunk_size > S390_POOL_CHUNK_MAX + || curr_pool->size > S390_POOL_CHUNK_MAX) + && (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)) + { + int addr = INSN_ADDRESSES (INSN_UID (insn)); + rtx label, jump, barrier; + + label = gen_label_rtx (); + jump = emit_jump_insn_after (gen_jump (label), insn); + barrier = emit_barrier_after (jump); + insn = emit_label_after (label, barrier); + JUMP_LABEL (jump) = label; + LABEL_NUSES (label) = 1; + + INSN_ADDRESSES_NEW (jump, addr+1); + INSN_ADDRESSES_NEW (barrier, addr+1); + INSN_ADDRESSES_NEW (insn, -1); + + s390_end_pool (curr_pool, barrier); + curr_pool = NULL; + extra_size = 0; + } + } + } + + /* Dump out all literal pools. */ + + for (curr_pool = pool_list; curr_pool; curr_pool = curr_pool->next) + s390_dump_pool (curr_pool); + + + /* Find all labels that are branched into + from an insn belonging to a different chunk. */ + + far_labels = BITMAP_XMALLOC (); + + for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) + { + /* Labels marked with LABEL_PRESERVE_P can be target + of non-local jumps, so we have to mark them. + The same holds for named labels. + + Don't do that, however, if it is the label before + a jump table. */ + + if (GET_CODE (insn) == CODE_LABEL + && (LABEL_PRESERVE_P (insn) || LABEL_NAME (insn))) + { + rtx vec_insn = next_real_insn (insn); + rtx vec_pat = vec_insn && GET_CODE (vec_insn) == JUMP_INSN ? + PATTERN (vec_insn) : NULL_RTX; + if (!vec_pat + || !(GET_CODE (vec_pat) == ADDR_VEC + || GET_CODE (vec_pat) == ADDR_DIFF_VEC)) + bitmap_set_bit (far_labels, CODE_LABEL_NUMBER (insn)); + } + + /* If we have a direct jump (conditional or unconditional) + or a casesi jump, check all potential targets. */ + else if (GET_CODE (insn) == JUMP_INSN) + { + rtx pat = PATTERN (insn); + if (GET_CODE (pat) == SET) + { + rtx label = 0; + + if (GET_CODE (SET_SRC (pat)) == LABEL_REF) + { + label = XEXP (SET_SRC (pat), 0); + } + else if (GET_CODE (SET_SRC (pat)) == IF_THEN_ELSE) + { + if (GET_CODE (XEXP (SET_SRC (pat), 1)) == LABEL_REF) + label = XEXP (XEXP (SET_SRC (pat), 1), 0); + else if (GET_CODE (XEXP (SET_SRC (pat), 2)) == LABEL_REF) + label = XEXP (XEXP (SET_SRC (pat), 2), 0); + } + + if (label) + { + if (s390_find_pool (pool_list, label) + != s390_find_pool (pool_list, insn)) + bitmap_set_bit (far_labels, CODE_LABEL_NUMBER (label)); + } + } + else if (GET_CODE (pat) == PARALLEL + && XVECLEN (pat, 0) == 2 + && GET_CODE (XVECEXP (pat, 0, 0)) == SET + && GET_CODE (XVECEXP (pat, 0, 1)) == USE + && GET_CODE (XEXP (XVECEXP (pat, 0, 1), 0)) == LABEL_REF) + { + /* Find the jump table used by this casesi jump. */ + rtx vec_label = XEXP (XEXP (XVECEXP (pat, 0, 1), 0), 0); + rtx vec_insn = next_real_insn (vec_label); + rtx vec_pat = vec_insn && GET_CODE (vec_insn) == JUMP_INSN ? + PATTERN (vec_insn) : NULL_RTX; + if (vec_pat + && (GET_CODE (vec_pat) == ADDR_VEC + || GET_CODE (vec_pat) == ADDR_DIFF_VEC)) + { + int i, diff_p = GET_CODE (vec_pat) == ADDR_DIFF_VEC; + + for (i = 0; i < XVECLEN (vec_pat, diff_p); i++) + { + rtx label = XEXP (XVECEXP (vec_pat, diff_p, i), 0); + + if (s390_find_pool (pool_list, label) + != s390_find_pool (pool_list, insn)) + bitmap_set_bit (far_labels, CODE_LABEL_NUMBER (label)); + } + } + } + } + } + + /* Insert base register reload insns before every pool. */ + + for (curr_pool = pool_list; curr_pool; curr_pool = curr_pool->next) + if (TARGET_64BIT) + { + rtx pool_ref = gen_rtx_LABEL_REF (Pmode, curr_pool->label); + rtx new_insn = gen_rtx_SET (Pmode, base_reg, pool_ref); + rtx insn = curr_pool->first_insn; + INSN_ADDRESSES_NEW (emit_insn_before (new_insn, insn), -1); + } + else + { + rtx new_insn = gen_reload_base (base_reg, curr_pool->label); + rtx insn = curr_pool->first_insn; + INSN_ADDRESSES_NEW (emit_insn_before (new_insn, insn), -1); + } + + /* Insert base register reload insns at every far label. */ + + for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) + if (GET_CODE (insn) == CODE_LABEL + && bitmap_bit_p (far_labels, CODE_LABEL_NUMBER (insn))) + { + struct constant_pool *pool = s390_find_pool (pool_list, insn); + if (pool) + { + if (TARGET_64BIT) + { + rtx pool_ref = gen_rtx_LABEL_REF (Pmode, pool->label); + rtx new_insn = gen_rtx_SET (Pmode, base_reg, pool_ref); + INSN_ADDRESSES_NEW (emit_insn_after (new_insn, insn), -1); + } + else + { + rtx new_insn = gen_reload_base (base_reg, pool->label); + INSN_ADDRESSES_NEW (emit_insn_after (new_insn, insn), -1); + } + } + } + + /* Insert base register reload insns after every call if necessary. */ + + if (REGNO (base_reg) == RETURN_REGNUM) + for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) + if (GET_CODE (insn) == CALL_INSN) + { + struct constant_pool *pool = s390_find_pool (pool_list, insn); + if (pool) + { + rtx new_insn = gen_reload_base2 (base_reg, pool->label); + INSN_ADDRESSES_NEW (emit_insn_after (new_insn, insn), -1); + } + } + + + /* Recompute insn addresses. */ + + s390_pool_overflow = 1; + init_insn_lengths (); + shorten_branches (get_insns ()); + s390_pool_overflow = 0; + + /* Insert base register reload insns after far branches. */ + + if (!TARGET_64BIT) + for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) + if (GET_CODE (insn) == JUMP_INSN + && GET_CODE (PATTERN (insn)) == SET + && get_attr_length (insn) >= 12) + { + struct constant_pool *pool = s390_find_pool (pool_list, insn); + if (pool) + { + rtx new_insn = gen_reload_base (base_reg, pool->label); + INSN_ADDRESSES_NEW (emit_insn_after (new_insn, insn), -1); + } + } + + + /* Free all memory. */ + + while (pool_list) + { + struct constant_pool *next = pool_list->next; + s390_free_pool (pool_list); + pool_list = next; + } + + BITMAP_XFREE (far_labels); +} + + +/* Index of constant pool chunk that is currently being processed. + Set to -1 before function output has started. */ +int s390_pool_count = -1; + +/* Number of elements of current constant pool. */ +int s390_nr_constants; + +/* Output main constant pool to stdio stream FILE. */ + +void +s390_output_constant_pool (file) + FILE *file; +{ + /* Output constant pool. */ + if (s390_nr_constants) + { + if (TARGET_64BIT) + { + fprintf (file, "\tlarl\t%s,.LT%X\n", reg_names[BASE_REGISTER], + s390_function_count); + readonly_data_section (); + ASM_OUTPUT_ALIGN (file, 3); + } + else + { + fprintf (file, "\tbras\t%s,.LTN%X\n", reg_names[BASE_REGISTER], + s390_function_count); + } + fprintf (file, ".LT%X:\n", s390_function_count); + + s390_pool_count = 0; + output_constant_pool (current_function_name, current_function_decl); + s390_pool_count = -1; + + if (TARGET_64BIT) + function_section (current_function_decl); + else + fprintf (file, ".LTN%X:\n", s390_function_count); + } +} + + +/* Return true if floating point registers need to be saved. */ + +static int +save_fprs_p () +{ + int i; + if (!TARGET_64BIT) + return 0; + for (i=24; i<=31; i++) + { + if (regs_ever_live[i] == 1) + return 1; + } + return 0; +} + +/* Find first call clobbered register unsused in a function. + This could be used as base register in a leaf function + or for holding the return address before epilogue. */ + +static int +find_unused_clobbered_reg () +{ + int i; + for (i = 0; i < 6; i++) + if (!regs_ever_live[i]) + return i; + return 0; +} + +/* Fill FRAME with info about frame of current function. */ + +static void +s390_frame_info (frame) + struct s390_frame *frame; +{ + int i, j; + HOST_WIDE_INT fsize = get_frame_size (); + + if (fsize > 0x7fff0000) + fatal_error ("Total size of local variables exceeds architecture limit."); + + /* fprs 8 - 15 are caller saved for 64 Bit ABI. */ + frame->save_fprs_p = save_fprs_p (); + + frame->frame_size = fsize + frame->save_fprs_p * 64; + + /* Does function need to setup frame and save area. */ + + if (! current_function_is_leaf + || frame->frame_size > 0 + || current_function_calls_alloca + || current_function_stdarg + || current_function_varargs) + frame->frame_size += STARTING_FRAME_OFFSET; + + /* If we need to allocate a frame, the stack pointer is changed. */ + + if (frame->frame_size > 0) + regs_ever_live[STACK_POINTER_REGNUM] = 1; + + /* If the literal pool might overflow, the return register might + be used as temp literal pointer. */ + + if (!TARGET_64BIT && get_pool_size () >= S390_POOL_CHUNK_MAX / 2) + regs_ever_live[RETURN_REGNUM] = 1; + + /* If there is (possibly) any pool entry, we need to + load base register. */ + + if (get_pool_size () + || !CONST_OK_FOR_LETTER_P (frame->frame_size, 'K') + || (!TARGET_64BIT && current_function_uses_pic_offset_table)) + regs_ever_live[BASE_REGISTER] = 1; + + /* If we need the GOT pointer, remember to save/restore it. */ + + if (current_function_uses_pic_offset_table) + regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1; + + /* Frame pointer needed. */ + + frame->frame_pointer_p = frame_pointer_needed; + + /* Find first and last gpr to be saved. */ + + for (i = 6; i < 16; i++) + if (regs_ever_live[i]) + break; + + for (j = 15; j > i; j--) + if (regs_ever_live[j]) + break; + + if (i == 16) + { + /* Nothing to save / restore. */ + frame->first_save_gpr = -1; + frame->first_restore_gpr = -1; + frame->last_save_gpr = -1; + frame->return_reg_saved_p = 0; + } + else + { + /* Save / Restore from gpr i to j. */ + frame->first_save_gpr = i; + frame->first_restore_gpr = i; + frame->last_save_gpr = j; + frame->return_reg_saved_p = (j >= RETURN_REGNUM && i <= RETURN_REGNUM); + } + + if (current_function_stdarg || current_function_varargs) + { + /* Varargs function need to save from gpr 2 to gpr 15. */ + frame->first_save_gpr = 2; + } +} + +/* Return offset between argument pointer and frame pointer + initially after prologue. */ + +int +s390_arg_frame_offset () +{ + struct s390_frame frame; + + /* Compute frame_info. */ + + s390_frame_info (&frame); + + return frame.frame_size + STACK_POINTER_OFFSET; +} + +/* Emit insn to save fpr REGNUM at offset OFFSET relative + to register BASE. Return generated insn. */ + +static rtx +save_fpr (base, offset, regnum) + rtx base; + int offset; + int regnum; +{ + rtx addr; + addr = gen_rtx_MEM (DFmode, plus_constant (base, offset)); + set_mem_alias_set (addr, s390_sr_alias_set); + + return emit_move_insn (addr, gen_rtx_REG (DFmode, regnum)); +} + +/* Emit insn to restore fpr REGNUM from offset OFFSET relative + to register BASE. Return generated insn. */ + +static rtx +restore_fpr (base, offset, regnum) + rtx base; + int offset; + int regnum; +{ + rtx addr; + addr = gen_rtx_MEM (DFmode, plus_constant (base, offset)); + set_mem_alias_set (addr, s390_sr_alias_set); + + return emit_move_insn (gen_rtx_REG (DFmode, regnum), addr); +} + +/* Output the function prologue assembly code to the + stdio stream FILE. The local frame size is passed + in LSIZE. */ + +void +s390_function_prologue (file, lsize) + FILE *file ATTRIBUTE_UNUSED; + HOST_WIDE_INT lsize ATTRIBUTE_UNUSED; +{ + s390_chunkify_pool (); + s390_split_branches (); +} + +/* Output the function epilogue assembly code to the + stdio stream FILE. The local frame size is passed + in LSIZE. */ + +void +s390_function_epilogue (file, lsize) + FILE *file ATTRIBUTE_UNUSED; + HOST_WIDE_INT lsize ATTRIBUTE_UNUSED; +{ + current_function_uses_pic_offset_table = 0; + s390_function_count++; +} + +/* Expand the prologue into a bunch of separate insns. */ + +void +s390_emit_prologue () +{ + struct s390_frame frame; + rtx insn, addr; + rtx temp_reg; + int i; + + /* Compute frame_info. */ + + s390_frame_info (&frame); + + /* Choose best register to use for temp use within prologue. */ + + if (frame.return_reg_saved_p + && !has_hard_reg_initial_val (Pmode, RETURN_REGNUM) + && get_pool_size () < S390_POOL_CHUNK_MAX / 2) + temp_reg = gen_rtx_REG (Pmode, RETURN_REGNUM); + else + temp_reg = gen_rtx_REG (Pmode, 1); + + /* Save call saved gprs. */ + + if (frame.first_save_gpr != -1) + { + addr = plus_constant (stack_pointer_rtx, + frame.first_save_gpr * UNITS_PER_WORD); + addr = gen_rtx_MEM (Pmode, addr); + set_mem_alias_set (addr, s390_sr_alias_set); + + if (frame.first_save_gpr != frame.last_save_gpr ) + { + insn = emit_insn (gen_store_multiple (addr, + gen_rtx_REG (Pmode, frame.first_save_gpr), + GEN_INT (frame.last_save_gpr + - frame.first_save_gpr + 1))); + + /* We need to set the FRAME_RELATED flag on all SETs + inside the store-multiple pattern. + + However, we must not emit DWARF records for registers 2..5 + if they are stored for use by variable arguments ... + + ??? Unfortunately, it is not enough to simply not the the + FRAME_RELATED flags for those SETs, because the first SET + of the PARALLEL is always treated as if it had the flag + set, even if it does not. Therefore we emit a new pattern + without those registers as REG_FRAME_RELATED_EXPR note. */ + + if (frame.first_save_gpr >= 6) + { + rtx pat = PATTERN (insn); + + for (i = 0; i < XVECLEN (pat, 0); i++) + if (GET_CODE (XVECEXP (pat, 0, i)) == SET) + RTX_FRAME_RELATED_P (XVECEXP (pat, 0, i)) = 1; + + RTX_FRAME_RELATED_P (insn) = 1; + } + else if (frame.last_save_gpr >= 6) + { + rtx note, naddr; + naddr = plus_constant (stack_pointer_rtx, 6 * UNITS_PER_WORD); + note = gen_store_multiple (gen_rtx_MEM (Pmode, naddr), + gen_rtx_REG (Pmode, 6), + GEN_INT (frame.last_save_gpr - 6 + 1)); + REG_NOTES (insn) = + gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR, + note, REG_NOTES (insn)); + + for (i = 0; i < XVECLEN (note, 0); i++) + if (GET_CODE (XVECEXP (note, 0, i)) == SET) + RTX_FRAME_RELATED_P (XVECEXP (note, 0, i)) = 1; + + RTX_FRAME_RELATED_P (insn) = 1; + } + } + else + { + insn = emit_move_insn (addr, + gen_rtx_REG (Pmode, frame.first_save_gpr)); + RTX_FRAME_RELATED_P (insn) = 1; + } + } + + /* Dump constant pool and set constant pool register (13). */ + + insn = emit_insn (gen_lit ()); + + /* Save fprs for variable args. */ + + if (current_function_stdarg || current_function_varargs) + { + /* Save fpr 0 and 2. */ + + save_fpr (stack_pointer_rtx, STACK_POINTER_OFFSET - 32, 16); + save_fpr (stack_pointer_rtx, STACK_POINTER_OFFSET - 24, 17); + + if (TARGET_64BIT) + { + /* Save fpr 4 and 6. */ + + save_fpr (stack_pointer_rtx, STACK_POINTER_OFFSET - 16, 18); + save_fpr (stack_pointer_rtx, STACK_POINTER_OFFSET - 8, 19); + } + } + + /* Save fprs 4 and 6 if used (31 bit ABI). */ + + if (!TARGET_64BIT) + { + /* Save fpr 4 and 6. */ + if (regs_ever_live[18]) + { + insn = save_fpr (stack_pointer_rtx, STACK_POINTER_OFFSET - 16, 18); + RTX_FRAME_RELATED_P (insn) = 1; + } + if (regs_ever_live[19]) + { + insn = save_fpr (stack_pointer_rtx, STACK_POINTER_OFFSET - 8, 19); + RTX_FRAME_RELATED_P (insn) = 1; + } + } + + /* Decrement stack pointer. */ + + if (frame.frame_size > 0) + { + rtx frame_off = GEN_INT (-frame.frame_size); + + /* Save incoming stack pointer into temp reg. */ + + if (TARGET_BACKCHAIN || frame.save_fprs_p) + { + insn = emit_insn (gen_move_insn (temp_reg, stack_pointer_rtx)); + } + + /* Substract frame size from stack pointer. */ + + frame_off = GEN_INT (-frame.frame_size); + if (!CONST_OK_FOR_LETTER_P (-frame.frame_size, 'K')) + frame_off = force_const_mem (Pmode, frame_off); + + insn = emit_insn (gen_add2_insn (stack_pointer_rtx, frame_off)); + RTX_FRAME_RELATED_P (insn) = 1; + REG_NOTES (insn) = + gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR, + gen_rtx_SET (VOIDmode, stack_pointer_rtx, + gen_rtx_PLUS (Pmode, stack_pointer_rtx, + GEN_INT (-frame.frame_size))), + REG_NOTES (insn)); + + /* Set backchain. */ + + if (TARGET_BACKCHAIN) + { + addr = gen_rtx_MEM (Pmode, stack_pointer_rtx); + set_mem_alias_set (addr, s390_sr_alias_set); + insn = emit_insn (gen_move_insn (addr, temp_reg)); + } + } + + /* Save fprs 8 - 15 (64 bit ABI). */ + + if (frame.save_fprs_p) + { + insn = emit_insn (gen_add2_insn (temp_reg, GEN_INT(-64))); + + for (i = 24; i < 32; i++) + if (regs_ever_live[i]) + { + rtx addr = plus_constant (stack_pointer_rtx, + frame.frame_size - 64 + (i-24)*8); + + insn = save_fpr (temp_reg, (i-24)*8, i); + RTX_FRAME_RELATED_P (insn) = 1; + REG_NOTES (insn) = + gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR, + gen_rtx_SET (VOIDmode, + gen_rtx_MEM (DFmode, addr), + gen_rtx_REG (DFmode, i)), + REG_NOTES (insn)); + } + } + + /* Set frame pointer, if needed. */ + + if (frame.frame_pointer_p) + { + insn = emit_move_insn (hard_frame_pointer_rtx, stack_pointer_rtx); + RTX_FRAME_RELATED_P (insn) = 1; + } + + /* Set up got pointer, if needed. */ + + if (current_function_uses_pic_offset_table) + { + rtx got_symbol = gen_rtx_SYMBOL_REF (Pmode, "_GLOBAL_OFFSET_TABLE_"); + SYMBOL_REF_FLAG (got_symbol) = 1; + + if (TARGET_64BIT) + { + insn = emit_insn (gen_movdi (pic_offset_table_rtx, + got_symbol)); + + /* It can happen that the GOT pointer isn't really needed ... */ + REG_NOTES(insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, NULL_RTX, + REG_NOTES (insn)); + } + else + { + got_symbol = gen_rtx_UNSPEC (VOIDmode, + gen_rtvec (1, got_symbol), 100); + got_symbol = gen_rtx_CONST (VOIDmode, got_symbol); + got_symbol = force_const_mem (Pmode, got_symbol); + insn = emit_move_insn (pic_offset_table_rtx, + got_symbol); + REG_NOTES(insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, NULL_RTX, + REG_NOTES (insn)); + + insn = emit_insn (gen_add2_insn (pic_offset_table_rtx, + gen_rtx_REG (Pmode, BASE_REGISTER))); + REG_NOTES(insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, NULL_RTX, + REG_NOTES (insn)); + } + } +} + +/* Expand the epilogue into a bunch of separate insns. */ + +void +s390_emit_epilogue () +{ + struct s390_frame frame; + rtx frame_pointer, return_reg; + int area_bottom, area_top, offset; + rtvec p; + + /* Compute frame_info. */ + + s390_frame_info (&frame); + + /* Check whether to use frame or stack pointer for restore. */ + + frame_pointer = frame.frame_pointer_p ? + hard_frame_pointer_rtx : stack_pointer_rtx; + + /* Compute which parts of the save area we need to access. */ + + if (frame.first_restore_gpr != -1) + { + area_bottom = frame.first_restore_gpr * UNITS_PER_WORD; + area_top = (frame.last_save_gpr + 1) * UNITS_PER_WORD; + } + else + { + area_bottom = INT_MAX; + area_top = INT_MIN; + } + + if (TARGET_64BIT) + { + if (frame.save_fprs_p) + { + if (area_bottom > -64) + area_bottom = -64; + if (area_top < 0) + area_top = 0; + } + } + else + { + if (regs_ever_live[18]) + { + if (area_bottom > STACK_POINTER_OFFSET - 16) + area_bottom = STACK_POINTER_OFFSET - 16; + if (area_top < STACK_POINTER_OFFSET - 8) + area_top = STACK_POINTER_OFFSET - 8; + } + if (regs_ever_live[19]) + { + if (area_bottom > STACK_POINTER_OFFSET - 8) + area_bottom = STACK_POINTER_OFFSET - 8; + if (area_top < STACK_POINTER_OFFSET) + area_top = STACK_POINTER_OFFSET; + } + } + + /* Check whether we can access the register save area. + If not, increment the frame pointer as required. */ + + if (area_top <= area_bottom) + { + /* Nothing to restore. */ + } + else if (frame.frame_size + area_bottom >= 0 + && frame.frame_size + area_top <= 4096) + { + /* Area is in range. */ + offset = frame.frame_size; + } + else + { + rtx insn, frame_off; + + offset = area_bottom < 0 ? -area_bottom : 0; + frame_off = GEN_INT (frame.frame_size - offset); + + if (!CONST_OK_FOR_LETTER_P (INTVAL (frame_off), 'K')) + frame_off = force_const_mem (Pmode, frame_off); + + insn = emit_insn (gen_add2_insn (frame_pointer, frame_off)); + } + + /* Restore call saved fprs. */ + + if (TARGET_64BIT) + { + int i; + + if (frame.save_fprs_p) + for (i = 24; i < 32; i++) + if (regs_ever_live[i] && !global_regs[i]) + restore_fpr (frame_pointer, + offset - 64 + (i-24) * 8, i); + } + else + { + if (regs_ever_live[18] && !global_regs[18]) + restore_fpr (frame_pointer, offset + STACK_POINTER_OFFSET - 16, 18); + if (regs_ever_live[19] && !global_regs[19]) + restore_fpr (frame_pointer, offset + STACK_POINTER_OFFSET - 8, 19); + } + + /* Return register. */ + + return_reg = gen_rtx_REG (Pmode, RETURN_REGNUM); + + /* Restore call saved gprs. */ + + if (frame.first_restore_gpr != -1) + { + rtx addr; + int i; + + /* Check for global register and save them + to stack location from where they get restored. */ + + for (i = frame.first_restore_gpr; + i <= frame.last_save_gpr; + i++) + { + /* These registers are special and need to be + restored in any case. */ + if (i == STACK_POINTER_REGNUM + || i == RETURN_REGNUM + || i == BASE_REGISTER + || (flag_pic && i == PIC_OFFSET_TABLE_REGNUM)) + continue; + + if (global_regs[i]) + { + addr = plus_constant (frame_pointer, + offset + i * UNITS_PER_WORD); + addr = gen_rtx_MEM (Pmode, addr); + set_mem_alias_set (addr, s390_sr_alias_set); + emit_move_insn (addr, gen_rtx_REG (Pmode, i)); + } + } + + /* Fetch return address from stack before load multiple, + this will do good for scheduling. */ + + if (frame.last_save_gpr >= RETURN_REGNUM + && frame.first_restore_gpr < RETURN_REGNUM) + { + int return_regnum = find_unused_clobbered_reg(); + if (!return_regnum) + return_regnum = 4; + return_reg = gen_rtx_REG (Pmode, return_regnum); + + addr = plus_constant (frame_pointer, + offset + RETURN_REGNUM * UNITS_PER_WORD); + addr = gen_rtx_MEM (Pmode, addr); + set_mem_alias_set (addr, s390_sr_alias_set); + emit_move_insn (return_reg, addr); + } + + /* ??? As references to the base register are not made + explicit in insn RTX code, we have to add a barrier here + to prevent incorrect scheduling. */ + + emit_insn (gen_blockage()); + + addr = plus_constant (frame_pointer, + offset + frame.first_restore_gpr * UNITS_PER_WORD); + addr = gen_rtx_MEM (Pmode, addr); + set_mem_alias_set (addr, s390_sr_alias_set); + + if (frame.first_restore_gpr != frame.last_save_gpr) + { + emit_insn (gen_load_multiple ( + gen_rtx_REG (Pmode, frame.first_restore_gpr), + addr, + GEN_INT (frame.last_save_gpr - frame.first_restore_gpr + 1))); + } + else + { + emit_move_insn (gen_rtx_REG (Pmode, frame.first_restore_gpr), + addr); + } + } + + /* Return to caller. */ + + p = rtvec_alloc (2); + + RTVEC_ELT (p, 0) = gen_rtx_RETURN (VOIDmode); + RTVEC_ELT (p, 1) = gen_rtx_USE (VOIDmode, return_reg); + emit_jump_insn (gen_rtx_PARALLEL (VOIDmode, p)); +} + + +/* Return the size in bytes of a function argument of + type TYPE and/or mode MODE. At least one of TYPE or + MODE must be specified. */ + +static int +s390_function_arg_size (mode, type) + enum machine_mode mode; + tree type; +{ + if (type) + return int_size_in_bytes (type); + + /* No type info available for some library calls ... */ + if (mode != BLKmode) + return GET_MODE_SIZE (mode); + + /* If we have neither type nor mode, abort */ + abort (); +} + +/* Return 1 if a function argument of type TYPE and mode MODE + is to be passed by reference. The ABI specifies that only + structures of size 1, 2, 4, or 8 bytes are passed by value, + all other structures (and complex numbers) are passed by + reference. */ + +int +s390_function_arg_pass_by_reference (mode, type) + enum machine_mode mode; + tree type; +{ + int size = s390_function_arg_size (mode, type); + + if (type) + { + if (AGGREGATE_TYPE_P (type) && + size != 1 && size != 2 && size != 4 && size != 8) + return 1; + + if (TREE_CODE (type) == COMPLEX_TYPE) + return 1; + } + return 0; + +} + +/* Update the data in CUM to advance over an argument of mode MODE and + data type TYPE. (TYPE is null for libcalls where that information + may not be available.). The boolean NAMED specifies whether the + argument is a named argument (as opposed to an unnamed argument + matching an ellipsis). */ + +void +s390_function_arg_advance (cum, mode, type, named) + CUMULATIVE_ARGS *cum; + enum machine_mode mode; + tree type; + int named ATTRIBUTE_UNUSED; +{ + if (! TARGET_SOFT_FLOAT && (mode == DFmode || mode == SFmode)) + { + cum->fprs++; + } + else if (s390_function_arg_pass_by_reference (mode, type)) + { + cum->gprs += 1; + } + else + { + int size = s390_function_arg_size (mode, type); + cum->gprs += ((size + UNITS_PER_WORD-1) / UNITS_PER_WORD); + } +} + +/* Define where to put the arguments to a function. + Value is zero to push the argument on the stack, + or a hard register in which to store the argument. + + MODE is the argument's machine mode. + TYPE is the data type of the argument (as a tree). + This is null for libcalls where that information may + not be available. + CUM is a variable of type CUMULATIVE_ARGS which gives info about + the preceding args and about the function being called. + NAMED is nonzero if this argument is a named parameter + (otherwise it is an extra parameter matching an ellipsis). + + On S/390, we use general purpose registers 2 through 6 to + pass integer, pointer, and certain structure arguments, and + floating point registers 0 and 2 (0, 2, 4, and 6 on 64-bit) + to pass floating point arguments. All remaining arguments + are pushed to the stack. */ + +rtx +s390_function_arg (cum, mode, type, named) + CUMULATIVE_ARGS *cum; + enum machine_mode mode; + tree type; + int named ATTRIBUTE_UNUSED; +{ + if (s390_function_arg_pass_by_reference (mode, type)) + return 0; + + if (! TARGET_SOFT_FLOAT && (mode == DFmode || mode == SFmode)) + { + if (cum->fprs + 1 > (TARGET_64BIT? 4 : 2)) + return 0; + else + return gen_rtx (REG, mode, cum->fprs + 16); + } + else + { + int size = s390_function_arg_size (mode, type); + int n_gprs = (size + UNITS_PER_WORD-1) / UNITS_PER_WORD; + + if (cum->gprs + n_gprs > 5) + return 0; + else + return gen_rtx (REG, mode, cum->gprs + 2); + } +} + + +/* Create and return the va_list datatype. + + On S/390, va_list is an array type equivalent to + + typedef struct __va_list_tag + { + long __gpr; + long __fpr; + void *__overflow_arg_area; + void *__reg_save_area; + + } va_list[1]; + + where __gpr and __fpr hold the number of general purpose + or floating point arguments used up to now, respectively, + __overflow_arg_area points to the stack location of the + next argument passed on the stack, and __reg_save_area + always points to the start of the register area in the + call frame of the current function. The function prologue + saves all registers used for argument passing into this + area if the function uses variable arguments. */ + +tree +s390_build_va_list () +{ + tree f_gpr, f_fpr, f_ovf, f_sav, record, type_decl; + + record = make_lang_type (RECORD_TYPE); + + type_decl = + build_decl (TYPE_DECL, get_identifier ("__va_list_tag"), record); + + f_gpr = build_decl (FIELD_DECL, get_identifier ("__gpr"), + long_integer_type_node); + f_fpr = build_decl (FIELD_DECL, get_identifier ("__fpr"), + long_integer_type_node); + f_ovf = build_decl (FIELD_DECL, get_identifier ("__overflow_arg_area"), + ptr_type_node); + f_sav = build_decl (FIELD_DECL, get_identifier ("__reg_save_area"), + ptr_type_node); + + DECL_FIELD_CONTEXT (f_gpr) = record; + DECL_FIELD_CONTEXT (f_fpr) = record; + DECL_FIELD_CONTEXT (f_ovf) = record; + DECL_FIELD_CONTEXT (f_sav) = record; + + TREE_CHAIN (record) = type_decl; + TYPE_NAME (record) = type_decl; + TYPE_FIELDS (record) = f_gpr; + TREE_CHAIN (f_gpr) = f_fpr; + TREE_CHAIN (f_fpr) = f_ovf; + TREE_CHAIN (f_ovf) = f_sav; + + layout_type (record); + + /* The correct type is an array type of one element. */ + return build_array_type (record, build_index_type (size_zero_node)); +} + +/* Implement va_start by filling the va_list structure VALIST. + STDARG_P is true if implementing __builtin_stdarg_va_start, + false if implementing __builtin_varargs_va_start. NEXTARG + points to the first anonymous stack argument. + + The following global variables are used to initialize + the va_list structure: + + current_function_args_info: + holds number of gprs and fprs used for named arguments. + current_function_arg_offset_rtx: + holds the offset of the first anonymous stack argument + (relative to the virtual arg pointer). */ + +void +s390_va_start (stdarg_p, valist, nextarg) + int stdarg_p; + tree valist; + rtx nextarg ATTRIBUTE_UNUSED; +{ + HOST_WIDE_INT n_gpr, n_fpr; + int off; + tree f_gpr, f_fpr, f_ovf, f_sav; + tree gpr, fpr, ovf, sav, t; + + f_gpr = TYPE_FIELDS (TREE_TYPE (va_list_type_node)); + f_fpr = TREE_CHAIN (f_gpr); + f_ovf = TREE_CHAIN (f_fpr); + f_sav = TREE_CHAIN (f_ovf); + + valist = build1 (INDIRECT_REF, TREE_TYPE (TREE_TYPE (valist)), valist); + gpr = build (COMPONENT_REF, TREE_TYPE (f_gpr), valist, f_gpr); + fpr = build (COMPONENT_REF, TREE_TYPE (f_fpr), valist, f_fpr); + ovf = build (COMPONENT_REF, TREE_TYPE (f_ovf), valist, f_ovf); + sav = build (COMPONENT_REF, TREE_TYPE (f_sav), valist, f_sav); + + /* Count number of gp and fp argument registers used. */ + + n_gpr = current_function_args_info.gprs; + n_fpr = current_function_args_info.fprs; + + t = build (MODIFY_EXPR, TREE_TYPE (gpr), gpr, build_int_2 (n_gpr, 0)); + TREE_SIDE_EFFECTS (t) = 1; + expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL); + + t = build (MODIFY_EXPR, TREE_TYPE (fpr), fpr, build_int_2 (n_fpr, 0)); + TREE_SIDE_EFFECTS (t) = 1; + expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL); + + /* Find the overflow area. */ + t = make_tree (TREE_TYPE (ovf), virtual_incoming_args_rtx); + + off = INTVAL (current_function_arg_offset_rtx); + off = off < 0 ? 0 : off; + if (! stdarg_p) + off = off > 0 ? off - UNITS_PER_WORD : off; + if (TARGET_DEBUG_ARG) + fprintf (stderr, "va_start: n_gpr = %d, n_fpr = %d off %d\n", + (int)n_gpr, (int)n_fpr, off); + + t = build (PLUS_EXPR, TREE_TYPE (ovf), t, build_int_2 (off, 0)); + + t = build (MODIFY_EXPR, TREE_TYPE (ovf), ovf, t); + TREE_SIDE_EFFECTS (t) = 1; + expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL); + + /* Find the register save area. */ + t = make_tree (TREE_TYPE (sav), virtual_incoming_args_rtx); + t = build (PLUS_EXPR, TREE_TYPE (sav), t, + build_int_2 (-STACK_POINTER_OFFSET, -1)); + t = build (MODIFY_EXPR, TREE_TYPE (sav), sav, t); + TREE_SIDE_EFFECTS (t) = 1; + expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL); +} + +/* Implement va_arg by updating the va_list structure + VALIST as required to retrieve an argument of type + TYPE, and returning that argument. + + Generates code equivalent to: + + if (integral value) { + if (size <= 4 && args.gpr < 5 || + size > 4 && args.gpr < 4 ) + ret = args.reg_save_area[args.gpr+8] + else + ret = *args.overflow_arg_area++; + } else if (float value) { + if (args.fgpr < 2) + ret = args.reg_save_area[args.fpr+64] + else + ret = *args.overflow_arg_area++; + } else if (aggregate value) { + if (args.gpr < 5) + ret = *args.reg_save_area[args.gpr] + else + ret = **args.overflow_arg_area++; + } */ + +rtx +s390_va_arg (valist, type) + tree valist; + tree type; +{ + tree f_gpr, f_fpr, f_ovf, f_sav; + tree gpr, fpr, ovf, sav, reg, t, u; + int indirect_p, size, n_reg, sav_ofs, sav_scale, max_reg; + rtx lab_false, lab_over, addr_rtx, r; + + f_gpr = TYPE_FIELDS (TREE_TYPE (va_list_type_node)); + f_fpr = TREE_CHAIN (f_gpr); + f_ovf = TREE_CHAIN (f_fpr); + f_sav = TREE_CHAIN (f_ovf); + + valist = build1 (INDIRECT_REF, TREE_TYPE (TREE_TYPE (valist)), valist); + gpr = build (COMPONENT_REF, TREE_TYPE (f_gpr), valist, f_gpr); + fpr = build (COMPONENT_REF, TREE_TYPE (f_fpr), valist, f_fpr); + ovf = build (COMPONENT_REF, TREE_TYPE (f_ovf), valist, f_ovf); + sav = build (COMPONENT_REF, TREE_TYPE (f_sav), valist, f_sav); + + size = int_size_in_bytes (type); + + if (s390_function_arg_pass_by_reference (TYPE_MODE (type), type)) + { + if (TARGET_DEBUG_ARG) + { + fprintf (stderr, "va_arg: aggregate type"); + debug_tree (type); + } + + /* Aggregates are passed by reference. */ + indirect_p = 1; + reg = gpr; + n_reg = 1; + sav_ofs = 2 * UNITS_PER_WORD; + sav_scale = UNITS_PER_WORD; + size = UNITS_PER_WORD; + max_reg = 4; + } + else if (FLOAT_TYPE_P (type) && ! TARGET_SOFT_FLOAT) + { + if (TARGET_DEBUG_ARG) + { + fprintf (stderr, "va_arg: float type"); + debug_tree (type); + } + + /* FP args go in FP registers, if present. */ + indirect_p = 0; + reg = fpr; + n_reg = 1; + sav_ofs = 16 * UNITS_PER_WORD; + sav_scale = 8; + /* TARGET_64BIT has up to 4 parameter in fprs */ + max_reg = TARGET_64BIT ? 3 : 1; + } + else + { + if (TARGET_DEBUG_ARG) + { + fprintf (stderr, "va_arg: other type"); + debug_tree (type); + } + + /* Otherwise into GP registers. */ + indirect_p = 0; + reg = gpr; + n_reg = (size + UNITS_PER_WORD - 1) / UNITS_PER_WORD; + sav_ofs = 2 * UNITS_PER_WORD; + if (TARGET_64BIT) + sav_ofs += TYPE_MODE (type) == SImode ? 4 : + TYPE_MODE (type) == HImode ? 6 : + TYPE_MODE (type) == QImode ? 7 : 0; + else + sav_ofs += TYPE_MODE (type) == HImode ? 2 : + TYPE_MODE (type) == QImode ? 3 : 0; + + sav_scale = UNITS_PER_WORD; + if (n_reg > 1) + max_reg = 3; + else + max_reg = 4; + } + + /* Pull the value out of the saved registers ... */ + + lab_false = gen_label_rtx (); + lab_over = gen_label_rtx (); + addr_rtx = gen_reg_rtx (Pmode); + + emit_cmp_and_jump_insns (expand_expr (reg, NULL_RTX, Pmode, EXPAND_NORMAL), + GEN_INT (max_reg), + GT, const1_rtx, Pmode, 0, lab_false); + + if (sav_ofs) + t = build (PLUS_EXPR, ptr_type_node, sav, build_int_2 (sav_ofs, 0)); + else + t = sav; + + u = build (MULT_EXPR, long_integer_type_node, + reg, build_int_2 (sav_scale, 0)); + TREE_SIDE_EFFECTS (u) = 1; + + t = build (PLUS_EXPR, ptr_type_node, t, u); + TREE_SIDE_EFFECTS (t) = 1; + + r = expand_expr (t, addr_rtx, Pmode, EXPAND_NORMAL); + if (r != addr_rtx) + emit_move_insn (addr_rtx, r); + + + emit_jump_insn (gen_jump (lab_over)); + emit_barrier (); + emit_label (lab_false); + + /* ... Otherwise out of the overflow area. */ + + t = save_expr (ovf); + + + /* In 64 BIT for each argument on stack, a full 64 bit slot is allocated. */ + if (size < UNITS_PER_WORD) + { + t = build (PLUS_EXPR, TREE_TYPE (t), t, build_int_2 (UNITS_PER_WORD-size, 0)); + t = build (MODIFY_EXPR, TREE_TYPE (ovf), ovf, t); + TREE_SIDE_EFFECTS (t) = 1; + expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL); + + t = save_expr (ovf); + } + + r = expand_expr (t, addr_rtx, Pmode, EXPAND_NORMAL); + if (r != addr_rtx) + emit_move_insn (addr_rtx, r); + + t = build (PLUS_EXPR, TREE_TYPE (t), t, build_int_2 (size, 0)); + t = build (MODIFY_EXPR, TREE_TYPE (ovf), ovf, t); + TREE_SIDE_EFFECTS (t) = 1; + expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL); + + emit_label (lab_over); + + /* If less than max_regs a registers are retrieved out + of register save area, increment. */ + + u = build (PREINCREMENT_EXPR, TREE_TYPE (reg), reg, + build_int_2 (n_reg, 0)); + TREE_SIDE_EFFECTS (u) = 1; + expand_expr (u, const0_rtx, VOIDmode, EXPAND_NORMAL); + + if (indirect_p) + { + r = gen_rtx_MEM (Pmode, addr_rtx); + set_mem_alias_set (r, get_varargs_alias_set ()); + emit_move_insn (addr_rtx, r); + } + + + return addr_rtx; +} + + +/* Output assembly code for the trampoline template to + stdio stream FILE. + + On S/390, we use gpr 1 internally in the trampoline code; + gpr 0 is used to hold the static chain. */ + +void +s390_trampoline_template (file) + FILE *file; +{ + if (TARGET_64BIT) + { + fprintf (file, "larl\t%s,0f\n", reg_names[1]); + fprintf (file, "lg\t%s,0(%s)\n", reg_names[0], reg_names[1]); + fprintf (file, "lg\t%s,8(%s)\n", reg_names[1], reg_names[1]); + fprintf (file, "br\t%s\n", reg_names[1]); + fprintf (file, "0:\t.quad\t0\n"); + fprintf (file, ".quad\t0\n"); + } + else + { + fprintf (file, "basr\t%s,0\n", reg_names[1]); + fprintf (file, "l\t%s,10(%s)\n", reg_names[0], reg_names[1]); + fprintf (file, "l\t%s,14(%s)\n", reg_names[1], reg_names[1]); + fprintf (file, "br\t%s\n", reg_names[1]); + fprintf (file, ".long\t0\n"); + fprintf (file, ".long\t0\n"); + } +} + +/* Emit RTL insns to initialize the variable parts of a trampoline. + FNADDR is an RTX for the address of the function's pure code. + CXT is an RTX for the static chain value for the function. */ + +void +s390_initialize_trampoline (addr, fnaddr, cxt) + rtx addr; + rtx fnaddr; + rtx cxt; +{ + emit_move_insn (gen_rtx + (MEM, Pmode, + memory_address (Pmode, + plus_constant (addr, (TARGET_64BIT ? 20 : 12) ))), cxt); + emit_move_insn (gen_rtx + (MEM, Pmode, + memory_address (Pmode, + plus_constant (addr, (TARGET_64BIT ? 28 : 16) ))), fnaddr); +} + +/* Return rtx for 64-bit constant formed from the 32-bit subwords + LOW and HIGH, independent of the host word size. */ + +rtx +s390_gen_rtx_const_DI (high, low) + int high; + int low; +{ +#if HOST_BITS_PER_WIDE_INT >= 64 + HOST_WIDE_INT val; + val = (HOST_WIDE_INT)high; + val <<= 32; + val |= (HOST_WIDE_INT)low; + + return GEN_INT (val); +#else +#if HOST_BITS_PER_WIDE_INT >= 32 + return immed_double_const ((HOST_WIDE_INT)low, (HOST_WIDE_INT)high, DImode); +#else + abort (); +#endif +#endif +} + +/* Output assembler code to FILE to increment profiler label # LABELNO + for profiling a function entry. */ + +void +s390_function_profiler (file, labelno) + FILE *file; + int labelno; +{ + rtx op[7]; + + char label[128]; + sprintf (label, "%sP%d", LPREFIX, labelno); + + fprintf (file, "# function profiler \n"); + + op[0] = gen_rtx_REG (Pmode, RETURN_REGNUM); + op[1] = gen_rtx_REG (Pmode, STACK_POINTER_REGNUM); + op[1] = gen_rtx_MEM (Pmode, plus_constant (op[1], UNITS_PER_WORD)); + + op[2] = gen_rtx_REG (Pmode, 1); + op[3] = gen_rtx_SYMBOL_REF (Pmode, label); + SYMBOL_REF_FLAG (op[3]) = 1; + + op[4] = gen_rtx_SYMBOL_REF (Pmode, "_mcount"); + if (flag_pic) + { + op[4] = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op[4]), 113); + op[4] = gen_rtx_CONST (Pmode, op[4]); + } + + if (TARGET_64BIT) + { + output_asm_insn ("stg\t%0,%1", op); + output_asm_insn ("larl\t%2,%3", op); + output_asm_insn ("brasl\t%0,%4", op); + output_asm_insn ("lg\t%0,%1", op); + } + else if (!flag_pic) + { + op[6] = gen_label_rtx (); + + output_asm_insn ("st\t%0,%1", op); + output_asm_insn ("bras\t%2,%l6", op); + output_asm_insn (".long\t%4", op); + output_asm_insn (".long\t%3", op); + ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (op[6])); + output_asm_insn ("l\t%0,0(%2)", op); + output_asm_insn ("l\t%2,4(%2)", op); + output_asm_insn ("basr\t%0,%0", op); + output_asm_insn ("l\t%0,%1", op); + } + else + { + op[5] = gen_label_rtx (); + op[6] = gen_label_rtx (); + + output_asm_insn ("st\t%0,%1", op); + output_asm_insn ("bras\t%2,%l6", op); + ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (op[5])); + output_asm_insn (".long\t%4-%l5", op); + output_asm_insn (".long\t%3-%l5", op); + ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (op[6])); + output_asm_insn ("lr\t%0,%2", op); + output_asm_insn ("a\t%0,0(%2)", op); + output_asm_insn ("a\t%2,4(%2)", op); + output_asm_insn ("basr\t%0,%0", op); + output_asm_insn ("l\t%0,%1", op); + } +} + diff --git a/contrib/gcc/config/s390/s390.h b/contrib/gcc/config/s390/s390.h new file mode 100644 index 0000000..f3218e9 --- /dev/null +++ b/contrib/gcc/config/s390/s390.h @@ -0,0 +1,1389 @@ +/* Definitions of target machine for GNU compiler, for IBM S/390 + Copyright (C) 1999, 2000, 2001, 2002 Free Software Foundation, Inc. + Contributed by Hartmut Penner (hpenner@de.ibm.com) and + Ulrich Weigand (uweigand@de.ibm.com). +This file is part of GNU CC. + +GNU CC is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2, or (at your option) +any later version. + +GNU CC is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with GNU CC; see the file COPYING. If not, write to +the Free Software Foundation, 59 Temple Place - Suite 330, +Boston, MA 02111-1307, USA. */ + +#ifndef _S390_H +#define _S390_H + +extern int flag_pic; + +/* Run-time compilation parameters selecting different hardware subsets. */ + +extern int target_flags; + +/* Target macros checked at runtime of compiler. */ + +#define TARGET_HARD_FLOAT (target_flags & 1) +#define TARGET_SOFT_FLOAT (!(target_flags & 1)) +#define TARGET_BACKCHAIN (target_flags & 2) +#define TARGET_SMALL_EXEC (target_flags & 4) +#define TARGET_DEBUG_ARG (target_flags & 8) +#define TARGET_64BIT (target_flags & 16) +#define TARGET_MVCLE (target_flags & 32) + +#ifdef DEFAULT_TARGET_64BIT +#define TARGET_DEFAULT 0x13 +#define TARGET_VERSION fprintf (stderr, " (zSeries)"); +#else +#define TARGET_DEFAULT 0x3 +#define TARGET_VERSION fprintf (stderr, " (S/390)"); +#endif + + +/* Macro to define tables used to set the flags. This is a list in braces + of pairs in braces, each pair being { "NAME", VALUE } + where VALUE is the bits to set or minus the bits to clear. + An empty string NAME is used to identify the default VALUE. */ + +#define TARGET_SWITCHES \ +{ { "hard-float", 1, N_("Use hardware fp")}, \ + { "soft-float", -1, N_("Don't use hardware fp")}, \ + { "backchain", 2, N_("Set backchain")}, \ + { "no-backchain", -2, N_("Don't set backchain (faster, but debug harder")}, \ + { "small-exec", 4, N_("Use bras for execucable < 64k")}, \ + { "no-small-exec",-4, N_("Don't use bras")}, \ + { "debug", 8, N_("Additional debug prints")}, \ + { "no-debug", -8, N_("Don't print additional debug prints")}, \ + { "64", 16, N_("64 bit mode")}, \ + { "31", -16, N_("31 bit mode")}, \ + { "mvcle", 32, N_("mvcle use")}, \ + { "no-mvcle", -32, N_("mvc&ex")}, \ + { "", TARGET_DEFAULT, 0 } } + +/* Define this to change the optimizations performed by default. */ +#define OPTIMIZATION_OPTIONS(LEVEL, SIZE) optimization_options(LEVEL, SIZE) + +/* Sometimes certain combinations of command options do not make sense + on a particular target machine. You can define a macro + `OVERRIDE_OPTIONS' to take account of this. This macro, if + defined, is executed once just after all the command options have + been parsed. */ +#define OVERRIDE_OPTIONS override_options () + + +/* Defines for REAL_ARITHMETIC. */ +#define IEEE_FLOAT 1 +#define TARGET_IBM_FLOAT 0 +#define TARGET_IEEE_FLOAT 1 + +/* The current function count for create unique internal labels. */ + +extern int s390_function_count; + +/* The amount of space used for outgoing arguments. */ + +extern int current_function_outgoing_args_size; + +/* Target machine storage layout. */ + +/* Define this if most significant bit is lowest numbered in instructions + that operate on numbered bit-fields. */ + +#define BITS_BIG_ENDIAN 1 + +/* Define this if most significant byte of a word is the lowest numbered. */ + +#define BYTES_BIG_ENDIAN 1 + +/* Define this if MS word of a multiword is the lowest numbered. */ + +#define WORDS_BIG_ENDIAN 1 + +/* Number of bits in an addressable storage unit. */ + +#define BITS_PER_UNIT 8 + +/* Width in bits of a "word", which is the contents of a machine register. */ + +#define BITS_PER_WORD (TARGET_64BIT ? 64 : 32) +#define MAX_BITS_PER_WORD 64 + +/* Width of a word, in units (bytes). */ + +#define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4) +#define MIN_UNITS_PER_WORD 4 + +/* Width in bits of a pointer. See also the macro `Pmode' defined below. */ + +#define POINTER_SIZE (TARGET_64BIT ? 64 : 32) + +/* A C expression for the size in bits of the type `short' on the + target machine. If you don't define this, the default is half a + word. (If this would be less than one storage unit, it is + rounded up to one unit.) */ +#define SHORT_TYPE_SIZE 16 + +/* A C expression for the size in bits of the type `int' on the + target machine. If you don't define this, the default is one + word. */ +#define INT_TYPE_SIZE 32 + +/* A C expression for the size in bits of the type `long' on the + target machine. If you don't define this, the default is one + word. */ +#define LONG_TYPE_SIZE (TARGET_64BIT ? 64 : 32) +#define MAX_LONG_TYPE_SIZE 64 + +/* A C expression for the size in bits of the type `long long' on the + target machine. If you don't define this, the default is two + words. */ +#define LONG_LONG_TYPE_SIZE 64 + +/* Right now we only support two floating point formats, the + 32 and 64 bit ieee formats. */ + +#define FLOAT_TYPE_SIZE 32 +#define DOUBLE_TYPE_SIZE 64 +#define LONG_DOUBLE_TYPE_SIZE 64 + +/* Define this macro if it is advisable to hold scalars in registers + in a wider mode than that declared by the program. In such cases, + the value is constrained to be within the bounds of the declared + type, but kept valid in the wider mode. The signedness of the + extension may differ from that of the type. */ + +#define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \ +if (INTEGRAL_MODE_P (MODE) && \ + GET_MODE_SIZE (MODE) < UNITS_PER_WORD) { \ + (MODE) = Pmode; \ + } + +/* Defining PROMOTE_FUNCTION_ARGS eliminates some unnecessary zero/sign + extensions applied to char/short functions arguments. Defining + PROMOTE_FUNCTION_RETURN does the same for function returns. */ + +#define PROMOTE_FUNCTION_ARGS +#define PROMOTE_FUNCTION_RETURN +#define PROMOTE_FOR_CALL_ONLY + +/* Allocation boundary (in *bits*) for storing pointers in memory. */ + +#define POINTER_BOUNDARY 32 + +/* Allocation boundary (in *bits*) for storing arguments in argument list. */ + +#define PARM_BOUNDARY (TARGET_64BIT ? 64 : 32) + +/* Boundary (in *bits*) on which stack pointer should be aligned. */ + +#define STACK_BOUNDARY 64 + +/* Allocation boundary (in *bits*) for the code of a function. */ + +#define FUNCTION_BOUNDARY 32 + +/* There is no point aligning anything to a rounder boundary than this. */ + +#define BIGGEST_ALIGNMENT 64 + +/* Alignment of field after `int : 0' in a structure. */ + +#define EMPTY_FIELD_BOUNDARY 32 + +/* Alignment on even addresses for LARL instruction. */ + +#define CONSTANT_ALIGNMENT(EXP, ALIGN) (ALIGN) < 16 ? 16 : (ALIGN) + +#define DATA_ALIGNMENT(TYPE, ALIGN) (ALIGN) < 16 ? 16 : (ALIGN) + +/* Define this if move instructions will actually fail to work when given + unaligned data. */ + +#define STRICT_ALIGNMENT 0 + +/* real arithmetic */ + +#define REAL_ARITHMETIC + +/* Define target floating point format. */ + +#undef TARGET_FLOAT_FORMAT +#ifdef IEEE_FLOAT +#define TARGET_FLOAT_FORMAT IEEE_FLOAT_FORMAT +#else +#define TARGET_FLOAT_FORMAT IBM_FLOAT_FORMAT +#endif + +/* Define if special allocation order desired. */ + +#define REG_ALLOC_ORDER \ +{ 1, 2, 3, 4, 5, 0, 14, 13, 12, 11, 10, 9, 8, 7, 6, \ + 16, 17, 18, 19, 20, 21, 22, 23, \ + 24, 25, 26, 27, 28, 29, 30, 31, \ + 15, 32, 33, 34 } + +/* Standard register usage. */ + +#define INT_REGNO_P(N) ( (int)(N) >= 0 && (N) < 16 ) +#ifdef IEEE_FLOAT +#define FLOAT_REGNO_P(N) ( (N) >= 16 && (N) < 32 ) +#else +#define FLOAT_REGNO_P(N) ( (N) >= 16 && (N) < 20 ) +#endif +#define CC_REGNO_P(N) ( (N) == 33 ) + +/* Number of actual hardware registers. The hardware registers are + assigned numbers for the compiler from 0 to just below + FIRST_PSEUDO_REGISTER. + All registers that the compiler knows about must be given numbers, + even those that are not normally considered general registers. + For the 390, we give the data registers numbers 0-15, + and the floating point registers numbers 16-19. + G5 and following have 16 IEEE floating point register, + which get numbers 16-31. */ + +#define FIRST_PSEUDO_REGISTER 35 + +/* Number of hardware registers that go into the DWARF-2 unwind info. + If not defined, equals FIRST_PSEUDO_REGISTER. */ + +#define DWARF_FRAME_REGISTERS 34 + +/* The following register have a fix usage + GPR 12: GOT register points to the GOT, setup in prologue, + GOT contains pointer to variables in shared libraries + GPR 13: Base register setup in prologue to point to the + literal table of each function + GPR 14: Return registers holds the return address + GPR 15: Stack pointer */ + +#define PIC_OFFSET_TABLE_REGNUM (flag_pic ? 12 : INVALID_REGNUM) +#define BASE_REGISTER 13 +#define RETURN_REGNUM 14 +#define STACK_POINTER_REGNUM 15 + +#define FIXED_REGISTERS \ +{ 0, 0, 0, 0, \ + 0, 0, 0, 0, \ + 0, 0, 0, 0, \ + 0, 1, 1, 1, \ + 0, 0, 0, 0, \ + 0, 0, 0, 0, \ + 0, 0, 0, 0, \ + 0, 0, 0, 0, \ + 1, 1, 1 } + +/* 1 for registers not available across function calls. These must include + the FIXED_REGISTERS and also any registers that can be used without being + saved. + The latter must include the registers where values are returned + and the register where structure-value addresses are passed. */ + +#define CALL_USED_REGISTERS \ +{ 1, 1, 1, 1, \ + 1, 1, 0, 0, \ + 0, 0, 0, 0, \ + 0, 1, 1, 1, \ + 1, 1, 1, 1, \ + 1, 1, 1, 1, \ + 1, 1, 1, 1, \ + 1, 1, 1, 1, \ + 1, 1, 1 } + +/* Like `CALL_USED_REGISTERS' except this macro doesn't require that + the entire set of `FIXED_REGISTERS' be included. + (`CALL_USED_REGISTERS' must be a superset of `FIXED_REGISTERS'). */ + +#define CALL_REALLY_USED_REGISTERS \ +{ 1, 1, 1, 1, \ + 1, 1, 0, 0, \ + 0, 0, 0, 0, \ + 0, 0, 0, 0, \ + 1, 1, 1, 1, \ + 1, 1, 1, 1, \ + 1, 1, 1, 1, \ + 1, 1, 1, 1, \ + 1, 1, 1 } + +/* Macro to conditionally modify fixed_regs/call_used_regs. */ + +#define CONDITIONAL_REGISTER_USAGE \ +do \ + { \ + int i; \ + \ + if (flag_pic) \ + { \ + fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \ + call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \ + } \ + if (TARGET_64BIT) \ + { \ + for (i = 24; i < 32; i++) \ + call_used_regs[i] = call_really_used_regs[i] = 0; \ + } \ + else \ + { \ + for (i = 18; i < 20; i++) \ + call_used_regs[i] = call_really_used_regs[i] = 0; \ + } \ + } while (0) + +/* The following register have a special usage + GPR 11: Frame pointer if needed to point to automatic variables. + GPR 32: In functions with more the 5 args this register + points to that arguments, it is always eliminated + with stack- or frame-pointer. + GPR 33: Condition code 'register' */ + +#define HARD_FRAME_POINTER_REGNUM 11 +#define FRAME_POINTER_REGNUM 34 + +#define ARG_POINTER_REGNUM 32 + +#define CC_REGNUM 33 + +/* We use the register %r0 to pass the static chain to a nested function. + + Note: It is assumed that this register is call-clobbered! + We can't use any of the function-argument registers either, + and register 1 is needed by the trampoline code, so we have + no other choice but using this one ... */ + +#define STATIC_CHAIN_REGNUM 0 + +/* Return number of consecutive hard regs needed starting at reg REGNO + to hold something of mode MODE. + This is ordinarily the length in words of a value of mode MODE + but can be less for certain modes in special long registers. */ + +#define HARD_REGNO_NREGS(REGNO, MODE) \ + (FLOAT_REGNO_P(REGNO)? \ + (GET_MODE_CLASS(MODE) == MODE_COMPLEX_FLOAT ? 2 : 1) : \ + INT_REGNO_P(REGNO)? \ + ((GET_MODE_SIZE(MODE)+UNITS_PER_WORD-1) / UNITS_PER_WORD) : \ + 1) + +/* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. + The gprs can hold QI, HI, SI, SF, DF, SC and DC. + Even gprs can hold DI. + The floating point registers can hold DF, SF, DC and SC. */ + +#define HARD_REGNO_MODE_OK(REGNO, MODE) \ + (FLOAT_REGNO_P(REGNO)? \ + (GET_MODE_CLASS(MODE) == MODE_FLOAT || \ + GET_MODE_CLASS(MODE) == MODE_COMPLEX_FLOAT || \ + (MODE) == SImode || (MODE) == DImode) : \ + INT_REGNO_P(REGNO)? \ + (HARD_REGNO_NREGS(REGNO, MODE) == 1 || !((REGNO) & 1)) : \ + CC_REGNO_P(REGNO)? \ + GET_MODE_CLASS (MODE) == MODE_CC : \ + 0) + +/* Value is 1 if it is a good idea to tie two pseudo registers when one has + mode MODE1 and one has mode MODE2. + If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, + for any hard reg, then this must be 0 for correct output. */ + +#define MODES_TIEABLE_P(MODE1, MODE2) \ + (((MODE1) == SFmode || (MODE1) == DFmode) \ + == ((MODE2) == SFmode || (MODE2) == DFmode)) + +/* If defined, gives a class of registers that cannot be used as the + operand of a SUBREG that changes the mode of the object illegally. */ + +#define CLASS_CANNOT_CHANGE_MODE FP_REGS + +/* Defines illegal mode changes for CLASS_CANNOT_CHANGE_MODE. */ + +#define CLASS_CANNOT_CHANGE_MODE_P(FROM,TO) \ + (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO)) + +/* Define this macro if references to a symbol must be treated + differently depending on something about the variable or + function named by the symbol (such as what section it is in). + + On s390, if using PIC, mark a SYMBOL_REF for a non-global symbol + so that we may access it directly in the GOT. */ + +#define ENCODE_SECTION_INFO(DECL) \ +do \ + { \ + if (flag_pic) \ + { \ + rtx rtl = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \ + ? TREE_CST_RTL (DECL) : DECL_RTL (DECL)); \ + \ + if (GET_CODE (rtl) == MEM) \ + { \ + SYMBOL_REF_FLAG (XEXP (rtl, 0)) \ + = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \ + || ! TREE_PUBLIC (DECL)); \ + } \ + } \ + } \ +while (0) + + +/* This is an array of structures. Each structure initializes one pair + of eliminable registers. The "from" register number is given first, + followed by "to". Eliminations of the same "from" register are listed + in order of preference. */ + +#define ELIMINABLE_REGS \ +{{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ + { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \ + { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ + { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}} + +#define CAN_ELIMINATE(FROM, TO) (1) + +#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ +{ if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \ + { (OFFSET) = 0; } \ + else if ((FROM) == FRAME_POINTER_REGNUM \ + && (TO) == HARD_FRAME_POINTER_REGNUM) \ + { (OFFSET) = 0; } \ + else if ((FROM) == ARG_POINTER_REGNUM \ + && (TO) == HARD_FRAME_POINTER_REGNUM) \ + { (OFFSET) = s390_arg_frame_offset (); } \ + else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \ + { (OFFSET) = s390_arg_frame_offset (); } \ + else \ + abort(); \ +} + +#define CAN_DEBUG_WITHOUT_FP + +/* Value should be nonzero if functions must have frame pointers. + Zero means the frame pointer need not be set up (and parms may be + accessed via the stack pointer) in functions that seem suitable. + This is computed in `reload', in reload1.c. */ + +#define FRAME_POINTER_REQUIRED 0 + +/* Define the classes of registers for register constraints in the + machine description. Also define ranges of constants. + + One of the classes must always be named ALL_REGS and include all hard regs. + If there is more than one class, another class must be named NO_REGS + and contain no registers. + + The name GENERAL_REGS must be the name of a class (or an alias for + another name such as ALL_REGS). This is the class of registers + that is allowed by "g" or "r" in a register constraint. + Also, registers outside this class are allocated only when + instructions express preferences for them. + + The classes must be numbered in nondecreasing order; that is, + a larger-numbered class must never be contained completely + in a smaller-numbered class. + + For any two classes, it is very desirable that there be another + class that represents their union. */ + +/*#define SMALL_REGISTER_CLASSES 1*/ + +enum reg_class +{ + NO_REGS, ADDR_REGS, GENERAL_REGS, + FP_REGS, ADDR_FP_REGS, GENERAL_FP_REGS, + ALL_REGS, LIM_REG_CLASSES +}; + +#define N_REG_CLASSES (int) LIM_REG_CLASSES + +/* Give names of register classes as strings for dump file. */ + +#define REG_CLASS_NAMES \ +{ "NO_REGS", "ADDR_REGS", "GENERAL_REGS", \ + "FP_REGS", "ADDR_FP_REGS", "GENERAL_FP_REGS", "ALL_REGS" } + +/* Define which registers fit in which classes. This is an initializer for + a vector of HARD_REG_SET of length N_REG_CLASSES. + G5 and latter have 16 register and support IEEE floating point operations. */ + +#define REG_CLASS_CONTENTS \ +{ \ + { 0x00000000, 0x00000000 }, /* NO_REGS */ \ + { 0x0000fffe, 0x00000005 }, /* ADDR_REGS */ \ + { 0x0000ffff, 0x00000005 }, /* GENERAL_REGS */ \ + { 0xffff0000, 0x00000000 }, /* FP_REGS */ \ + { 0xfffffffe, 0x00000005 }, /* ADDR_FP_REGS */ \ + { 0xffffffff, 0x00000005 }, /* GENERAL_FP_REGS */ \ + { 0xffffffff, 0x00000007 }, /* ALL_REGS */ \ +} + + +/* The same information, inverted: + Return the class number of the smallest class containing + reg number REGNO. This could be a conditional expression + or could index an array. */ + +#define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO]) + +extern enum reg_class regclass_map[FIRST_PSEUDO_REGISTER]; /* smalled class containing REGNO */ + +/* The class value for index registers, and the one for base regs. */ + +#define INDEX_REG_CLASS ADDR_REGS +#define BASE_REG_CLASS ADDR_REGS + +/* Get reg_class from a letter such as appears in the machine description. */ + +#define REG_CLASS_FROM_LETTER(C) \ + ((C) == 'a' ? ADDR_REGS : \ + (C) == 'd' ? GENERAL_REGS : \ + (C) == 'f' ? FP_REGS : NO_REGS) + +/* The letters I, J, K, L and M in a register constraint string can be used + to stand for particular ranges of immediate operands. + This macro defines what the ranges are. + C is the letter, and VALUE is a constant value. + Return 1 if VALUE is in the range specified by C. */ + +#define CONST_OK_FOR_LETTER_P(VALUE, C) \ + ((C) == 'I' ? (unsigned long) (VALUE) < 256 : \ + (C) == 'J' ? (unsigned long) (VALUE) < 4096 : \ + (C) == 'K' ? (VALUE) >= -32768 && (VALUE) < 32768 : \ + (C) == 'L' ? (unsigned long) (VALUE) < 65536 : 0) + +/* Similar, but for floating constants, and defining letters G and H. + Here VALUE is the CONST_DOUBLE rtx itself. */ + +#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 1 + +/* 'Q' means a memory-reference for a S-type operand. */ + +#define EXTRA_CONSTRAINT(OP, C) \ + ((C) == 'Q' ? s_operand (OP, GET_MODE (OP)) : \ + (C) == 'S' ? larl_operand (OP, GET_MODE (OP)) : 0) + +/* Given an rtx X being reloaded into a reg required to be in class CLASS, + return the class of reg to actually use. In general this is just CLASS; + but on some machines in some cases it is preferable to use a more + restrictive class. */ + +#define PREFERRED_RELOAD_CLASS(X, CLASS) \ + s390_preferred_reload_class ((X), (CLASS)) + +/* Return the maximum number of consecutive registers needed to represent + mode MODE in a register of class CLASS. */ + +#define CLASS_MAX_NREGS(CLASS, MODE) \ + ((CLASS) == FP_REGS ? \ + (GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT ? 2 : 1) : \ + (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) + +/* We need a secondary reload when loading a PLUS which is + not a valid operand for LOAD ADDRESS. */ + +#define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, IN) \ + s390_secondary_input_reload_class ((CLASS), (MODE), (IN)) + +/* If we are copying between FP registers and anything else, we need a memory + location. */ + +#define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \ + ((CLASS1) != (CLASS2) && ((CLASS1) == FP_REGS || (CLASS2) == FP_REGS)) + +/* Get_secondary_mem widens its argument to BITS_PER_WORD which loses on 64bit + because the movsi and movsf patterns don't handle r/f moves. */ + +#define SECONDARY_MEMORY_NEEDED_MODE(MODE) \ + (GET_MODE_BITSIZE (MODE) < 32 \ + ? mode_for_size (32, GET_MODE_CLASS (MODE), 0) \ + : MODE) + + +/* A C expression whose value is nonzero if pseudos that have been + assigned to registers of class CLASS would likely be spilled + because registers of CLASS are needed for spill registers. + + The default value of this macro returns 1 if CLASS has exactly one + register and zero otherwise. On most machines, this default + should be used. Only define this macro to some other expression + if pseudo allocated by `local-alloc.c' end up in memory because + their hard registers were needed for spill registers. If this + macro returns nonzero for those classes, those pseudos will only + be allocated by `global.c', which knows how to reallocate the + pseudo to another register. If there would not be another + register available for reallocation, you should not change the + definition of this macro since the only effect of such a + definition would be to slow down register allocation. */ + +/* Stack layout; function entry, exit and calling. */ + +/* The return address of the current frame is retrieved + from the initial value of register RETURN_REGNUM. + For frames farther back, we use the stack slot where + the corresponding RETURN_REGNUM register was saved. */ + +#define DYNAMIC_CHAIN_ADDRESS(FRAME) \ + ((FRAME) != hard_frame_pointer_rtx ? (FRAME) : \ + plus_constant (arg_pointer_rtx, -STACK_POINTER_OFFSET)) + +#define RETURN_ADDR_RTX(COUNT, FRAME) \ + ((COUNT) == 0 ? get_hard_reg_initial_val (Pmode, RETURN_REGNUM) : \ + gen_rtx_MEM (Pmode, \ + memory_address (Pmode, \ + plus_constant (DYNAMIC_CHAIN_ADDRESS ((FRAME)), \ + RETURN_REGNUM * UNITS_PER_WORD)))) + +/* The following macros will turn on dwarf2 exception hndling + Other code location for this exception handling are + in s390.md (eh_return insn) and in linux.c in the prologue. */ + +#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, RETURN_REGNUM) + +/* We have 31 bit mode. */ + +#define MASK_RETURN_ADDR (TARGET_64BIT ? GEN_INT (-1) : GEN_INT (0x7fffffff)) + +/* The offset from the incoming value of %sp to the top of the stack frame + for the current function. */ + +#define INCOMING_FRAME_SP_OFFSET STACK_POINTER_OFFSET + +/* Location, from where return address to load. */ + +#define DWARF_FRAME_RETURN_COLUMN 14 + +/* Describe how we implement __builtin_eh_return. */ +#define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 6 : INVALID_REGNUM) +#define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 10) +#define EH_RETURN_HANDLER_RTX \ + gen_rtx_MEM (Pmode, plus_constant (arg_pointer_rtx, \ + TARGET_64BIT? -48 : -40)) + +/* Define this if pushing a word on the stack makes the stack pointer a + smaller address. */ + +#define STACK_GROWS_DOWNWARD + +/* Define this if the nominal address of the stack frame is at the + high-address end of the local variables; that is, each additional local + variable allocated goes at a more negative offset in the frame. */ + +/* #define FRAME_GROWS_DOWNWARD */ + +/* Offset from stack-pointer to first location of outgoing args. */ + +#define STACK_POINTER_OFFSET (TARGET_64BIT ? 160 : 96) + +/* Offset within stack frame to start allocating local variables at. + If FRAME_GROWS_DOWNWARD, this is the offset to the END of the + first local allocated. Otherwise, it is the offset to the BEGINNING + of the first local allocated. */ + +#define STARTING_FRAME_OFFSET \ + (STACK_POINTER_OFFSET + current_function_outgoing_args_size) + +#define INITIAL_FRAME_POINTER_OFFSET(DEPTH) (DEPTH) = 0 + +/* If we generate an insn to push BYTES bytes, this says how many the stack + pointer really advances by. On S/390, we have no push instruction. */ + +/* #define PUSH_ROUNDING(BYTES) */ + +/* Accumulate the outgoing argument count so we can request the right + DSA size and determine stack offset. */ + +#define ACCUMULATE_OUTGOING_ARGS 1 + +/* Offset from the stack pointer register to an item dynamically + allocated on the stack, e.g., by `alloca'. + + The default value for this macro is `STACK_POINTER_OFFSET' plus the + length of the outgoing arguments. The default is correct for most + machines. See `function.c' for details. */ +#define STACK_DYNAMIC_OFFSET(FUNDECL) (STARTING_FRAME_OFFSET) + +/* Offset of first parameter from the argument pointer register value. + On the S/390, we define the argument pointer to the start of the fixed + area. */ +#define FIRST_PARM_OFFSET(FNDECL) 0 + +/* Define this if stack space is still allocated for a parameter passed + in a register. The value is the number of bytes allocated to this + area. */ +/* #define REG_PARM_STACK_SPACE(FNDECL) 32 */ + +/* Define this if the above stack space is to be considered part of the + space allocated by the caller. */ +/* #define OUTGOING_REG_PARM_STACK_SPACE */ + +/* 1 if N is a possible register number for function argument passing. + On S390, general registers 2 - 6 and floating point register 0 and 2 + are used in this way. */ + +#define FUNCTION_ARG_REGNO_P(N) (((N) >=2 && (N) <7) || \ + (N) == 16 || (N) == 17) + +/* Define a data type for recording info about an argument list during + the scan of that argument list. This data type should hold all + necessary information about the function itself and about the args + processed so far, enough to enable macros such as FUNCTION_ARG to + determine where the next arg should go. */ + +typedef struct s390_arg_structure +{ + int gprs; /* gpr so far */ + int fprs; /* fpr so far */ +} +CUMULATIVE_ARGS; + + +/* Initialize a variable CUM of type CUMULATIVE_ARGS for a call to + a function whose data type is FNTYPE. + For a library call, FNTYPE is 0. */ + +#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, NN) \ + ((CUM).gprs=0, (CUM).fprs=0) + +/* Update the data in CUM to advance over an argument of mode MODE and + data type TYPE. (TYPE is null for libcalls where that information + may not be available.) */ + +#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ + s390_function_arg_advance (&CUM, MODE, TYPE, NAMED) + +/* Define where to put the arguments to a function. Value is zero to push + the argument on the stack, or a hard register in which to store the + argument. */ + +#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ + s390_function_arg (&CUM, MODE, TYPE, NAMED) + +/* Define where to expect the arguments of a function. Value is zero, if + the argument is on the stack, or a hard register in which the argument + is stored. It is the same like FUNCTION_ARG, except for unnamed args + That means, that all in case of varargs used, the arguments are expected + from the stack. + S/390 has already space on the stack for args coming in registers, + they are pushed in prologue, if needed. */ + + +/* Define the `__builtin_va_list' type. */ + +#define BUILD_VA_LIST_TYPE(VALIST) \ + (VALIST) = s390_build_va_list () + +/* Implement `va_start' for varargs and stdarg. */ + +#define EXPAND_BUILTIN_VA_START(stdarg, valist, nextarg) \ + s390_va_start (stdarg, valist, nextarg) + +/* Implement `va_arg'. */ + +#define EXPAND_BUILTIN_VA_ARG(valist, type) \ + s390_va_arg (valist, type) + +/* For an arg passed partly in registers and partly in memory, this is the + number of registers used. For args passed entirely in registers or + entirely in memory, zero. */ + +#define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0 + + +/* Define if returning from a function call automatically pops the + arguments described by the number-of-args field in the call. */ + +#define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, SIZE) 0 + + +/* Define how to find the value returned by a function. VALTYPE is the + data type of the value (as a tree). + If the precise function being called is known, FUNC is its FUNCTION_DECL; + otherwise, FUNC is 15. */ + +#define RET_REG(MODE) ((GET_MODE_CLASS (MODE) == MODE_INT \ + || TARGET_SOFT_FLOAT ) ? 2 : 16) + + +/* for structs the address is passed, and the Callee makes a + copy, only if needed */ + +#define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \ + s390_function_arg_pass_by_reference (MODE, TYPE) + + +/* Register 2 (and 3) for integral values + or floating point register 0 (and 2) for fp values are used. */ + +#define FUNCTION_VALUE(VALTYPE, FUNC) \ + gen_rtx_REG ((INTEGRAL_TYPE_P (VALTYPE) \ + && TYPE_PRECISION (VALTYPE) < BITS_PER_WORD) \ + || POINTER_TYPE_P (VALTYPE) \ + ? word_mode : TYPE_MODE (VALTYPE), \ + TREE_CODE (VALTYPE) == REAL_TYPE && TARGET_HARD_FLOAT ? 16 : 2) + +/* Define how to find the value returned by a library function assuming + the value has mode MODE. */ + +#define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, RET_REG (MODE)) + +/* 1 if N is a possible register number for a function value. */ + +#define FUNCTION_VALUE_REGNO_P(N) ((N) == 2 || (N) == 16) + +/* The definition of this macro implies that there are cases where + a scalar value cannot be returned in registers. */ + +#define RETURN_IN_MEMORY(type) \ + (TYPE_MODE (type) == BLKmode || \ + GET_MODE_CLASS (TYPE_MODE (type)) == MODE_COMPLEX_INT || \ + GET_MODE_CLASS (TYPE_MODE (type)) == MODE_COMPLEX_FLOAT) + +/* Mode of stack savearea. + FUNCTION is VOIDmode because calling convention maintains SP. + BLOCK needs Pmode for SP. + NONLOCAL needs twice Pmode to maintain both backchain and SP. */ + +#define STACK_SAVEAREA_MODE(LEVEL) \ + (LEVEL == SAVE_FUNCTION ? VOIDmode \ + : LEVEL == SAVE_NONLOCAL ? (TARGET_64BIT ? TImode : DImode) : Pmode) + +/* Structure value address is passed as invisible first argument (gpr 2). */ + +#define STRUCT_VALUE 0 + +/* This macro definition sets up a default value for `main' to return. */ + +#define DEFAULT_MAIN_RETURN c_expand_return (integer_zero_node) + +/* Length in units of the trampoline for entering a nested function. */ + +#define TRAMPOLINE_SIZE (TARGET_64BIT ? 36 : 20) + +/* Initialize the dynamic part of trampoline. */ + +#define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, CXT) \ + s390_initialize_trampoline ((ADDR), (FNADDR), (CXT)) + +/* Template for constant part of trampoline. */ + +#define TRAMPOLINE_TEMPLATE(FILE) \ + s390_trampoline_template (FILE) + +/* Output assembler code to FILE to increment profiler label # LABELNO + for profiling a function entry. */ + +#define FUNCTION_PROFILER(FILE, LABELNO) \ + s390_function_profiler ((FILE), ((LABELNO))) + +#define PROFILE_BEFORE_PROLOGUE 1 + +/* Define EXIT_IGNORE_STACK if, when returning from a function, the stack + pointer does not matter (provided there is a frame pointer). */ + +#define EXIT_IGNORE_STACK 1 + +/* Addressing modes, and classification of registers for them. */ + +/* #define HAVE_POST_INCREMENT */ +/* #define HAVE_POST_DECREMENT */ + +/* #define HAVE_PRE_DECREMENT */ +/* #define HAVE_PRE_INCREMENT */ + +/* These assume that REGNO is a hard or pseudo reg number. They give + nonzero only if REGNO is a hard reg of the suitable class or a pseudo + reg currently allocated to a suitable hard reg. + These definitions are NOT overridden anywhere. */ + +#define REGNO_OK_FOR_INDEX_P(REGNO) \ + (((REGNO) < FIRST_PSEUDO_REGISTER \ + && REGNO_REG_CLASS ((REGNO)) == ADDR_REGS) \ + || (reg_renumber[REGNO] > 0 && reg_renumber[REGNO] < 16)) + +#define REGNO_OK_FOR_BASE_P(REGNO) REGNO_OK_FOR_INDEX_P (REGNO) + +#define REGNO_OK_FOR_DATA_P(REGNO) \ + ((REGNO) < 16 || (unsigned) reg_renumber[REGNO] < 16) + +#define REGNO_OK_FOR_FP_P(REGNO) \ + FLOAT_REGNO_P (REGNO) + +/* Now macros that check whether X is a register and also, + strictly, whether it is in a specified class. */ + +/* 1 if X is a data register. */ + +#define DATA_REG_P(X) (REG_P (X) && REGNO_OK_FOR_DATA_P (REGNO (X))) + +/* 1 if X is an fp register. */ + +#define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X))) + +/* 1 if X is an address register. */ + +#define ADDRESS_REG_P(X) (REG_P (X) && REGNO_OK_FOR_BASE_P (REGNO (X))) + +/* Maximum number of registers that can appear in a valid memory address. */ + +#define MAX_REGS_PER_ADDRESS 2 + +/* Recognize any constant value that is a valid address. */ + +#define CONSTANT_ADDRESS_P(X) 0 + +#define SYMBOLIC_CONST(X) \ +(GET_CODE (X) == SYMBOL_REF \ + || GET_CODE (X) == LABEL_REF \ + || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X))) + +/* General operand is everything except SYMBOL_REF, CONST and CONST_DOUBLE + they have to be forced to constant pool + CONST_INT have to be forced into constant pool, if greater than + 64k. Depending on the insn they have to be force into constant pool + for smaller value; in this case we have to work with nonimmediate operand. */ + +#define LEGITIMATE_PIC_OPERAND_P(X) \ + legitimate_pic_operand_p (X) + +/* Nonzero if the constant value X is a legitimate general operand. + It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */ + +#define LEGITIMATE_CONSTANT_P(X) \ + legitimate_constant_p (X) + +/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx and check + its validity for a certain class. We have two alternate definitions + for each of them. The usual definition accepts all pseudo regs; the + other rejects them all. The symbol REG_OK_STRICT causes the latter + definition to be used. + + Most source files want to accept pseudo regs in the hope that they will + get allocated to the class that the insn wants them to be in. + Some source files that are used after register allocation + need to be strict. */ + +/* + * Nonzero if X is a hard reg that can be used as an index or if it is + * a pseudo reg. + */ + +#define REG_OK_FOR_INDEX_NONSTRICT_P(X) \ +((GET_MODE (X) == Pmode) && \ + ((REGNO (X) >= FIRST_PSEUDO_REGISTER) \ + || REGNO_REG_CLASS (REGNO (X)) == ADDR_REGS)) + +/* Nonzero if X is a hard reg that can be used as a base reg or if it is + a pseudo reg. */ + +#define REG_OK_FOR_BASE_NONSTRICT_P(X) REG_OK_FOR_INDEX_NONSTRICT_P (X) + +/* Nonzero if X is a hard reg that can be used as an index. */ + +#define REG_OK_FOR_INDEX_STRICT_P(X) \ +((GET_MODE (X) == Pmode) && (REGNO_OK_FOR_INDEX_P (REGNO (X)))) + +/* Nonzero if X is a hard reg that can be used as a base reg. */ + +#define REG_OK_FOR_BASE_STRICT_P(X) \ +((GET_MODE (X) == Pmode) && (REGNO_OK_FOR_BASE_P (REGNO (X)))) + + +#ifndef REG_OK_STRICT +#define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_NONSTRICT_P(X) +#define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NONSTRICT_P(X) +#else +#define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_STRICT_P(X) +#define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P(X) +#endif + + +/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a + valid memory address for an instruction. + The MODE argument is the machine mode for the MEM expression + that wants to use this address. + + The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS, + except for CONSTANT_ADDRESS_P which is actually machine-independent. */ + +#ifdef REG_OK_STRICT +#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ +{ \ + if (legitimate_address_p (MODE, X, 1)) \ + goto ADDR; \ +} +#else +#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ +{ \ + if (legitimate_address_p (MODE, X, 0)) \ + goto ADDR; \ +} +#endif + + +/* S/390 has no mode dependent addresses. */ + +#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) + +/* Try machine-dependent ways of modifying an illegitimate address + to be legitimate. If we find one, return the new, valid address. + This macro is used in only one place: `memory_address' in explow.c. */ + +#define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \ +{ \ + (X) = legitimize_address (X, OLDX, MODE); \ + if (memory_address_p (MODE, X)) \ + goto WIN; \ +} + +/* Specify the machine mode that this machine uses for the index in the + tablejump instruction. */ + +#define CASE_VECTOR_MODE (TARGET_64BIT ? DImode : SImode) + +/* Define this if the tablejump instruction expects the table to contain + offsets from the address of the table. + Do not define this if the table should contain absolute addresses. */ + +/* #define CASE_VECTOR_PC_RELATIVE */ + +/* Load from integral MODE < SI from memory into register makes sign_extend + or zero_extend + In our case sign_extension happens for Halfwords, other no extension. */ + +#define LOAD_EXTEND_OP(MODE) \ +(TARGET_64BIT ? ((MODE) == QImode ? ZERO_EXTEND : \ + (MODE) == HImode ? SIGN_EXTEND : NIL) \ + : ((MODE) == HImode ? SIGN_EXTEND : NIL)) + +/* Define this if fixuns_trunc is the same as fix_trunc. */ + +/* #define FIXUNS_TRUNC_LIKE_FIX_TRUNC */ + +/* We use "unsigned char" as default. */ + +#define DEFAULT_SIGNED_CHAR 0 + +/* Max number of bytes we can move from memory to memory in one reasonably + fast instruction. */ + +#define MOVE_MAX 256 + +/* Nonzero if access to memory by bytes is slow and undesirable. */ + +#define SLOW_BYTE_ACCESS 1 + +/* Define if shifts truncate the shift count which implies one can omit + a sign-extension or zero-extension of a shift count. */ + +/* #define SHIFT_COUNT_TRUNCATED */ + +/* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits + is done just by pretending it is already truncated. */ + +#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 + +/* We assume that the store-condition-codes instructions store 0 for false + and some other value for true. This is the value stored for true. */ + +/* #define STORE_FLAG_VALUE -1 */ + +/* Don't perform CSE on function addresses. */ + +#define NO_FUNCTION_CSE + +/* Specify the machine mode that pointers have. + After generation of rtl, the compiler makes no further distinction + between pointers and any other objects of this machine mode. */ + +#define Pmode ((enum machine_mode) (TARGET_64BIT ? DImode : SImode)) + +/* A function address in a call instruction is a byte address (for + indexing purposes) so give the MEM rtx a byte's mode. */ + +#define FUNCTION_MODE QImode + + +/* A part of a C `switch' statement that describes the relative costs + of constant RTL expressions. It must contain `case' labels for + expression codes `const_int', `const', `symbol_ref', `label_ref' + and `const_double'. Each case must ultimately reach a `return' + statement to return the relative cost of the use of that kind of + constant value in an expression. The cost may depend on the + precise value of the constant, which is available for examination + in X, and the rtx code of the expression in which it is contained, + found in OUTER_CODE. + + CODE is the expression code--redundant, since it can be obtained + with `GET_CODE (X)'. */ +/* Force_const_mem does not work out of reload, because the saveable_obstack + is set to reload_obstack, which does not live long enough. + Because of this we cannot use force_const_mem in addsi3. + This leads to problems with gen_add2_insn with a constant greater + than a short. Because of that we give an addition of greater + constants a cost of 3 (reload1.c 10096). */ + + +#define CONST_COSTS(RTX, CODE, OUTER_CODE) \ + case CONST: \ + if ((GET_CODE (XEXP (RTX, 0)) == MINUS) && \ + (GET_CODE (XEXP (XEXP (RTX, 0), 1)) != CONST_INT)) \ + return 1000; \ + case CONST_INT: \ + if ((OUTER_CODE == PLUS) && \ + ((INTVAL (RTX) > 32767) || \ + (INTVAL (RTX) < -32768))) \ + return COSTS_N_INSNS (3); \ + case LABEL_REF: \ + case SYMBOL_REF: \ + case CONST_DOUBLE: \ + return 0; \ + + +/* Like `CONST_COSTS' but applies to nonconstant RTL expressions. + This can be used, for example, to indicate how costly a multiply + instruction is. In writing this macro, you can use the construct + `COSTS_N_INSNS (N)' to specify a cost equal to N fast + instructions. OUTER_CODE is the code of the expression in which X + is contained. + + This macro is optional; do not define it if the default cost + assumptions are adequate for the target machine. */ + +#define RTX_COSTS(X, CODE, OUTER_CODE) \ + case ASHIFT: \ + case ASHIFTRT: \ + case LSHIFTRT: \ + case PLUS: \ + case AND: \ + case IOR: \ + case XOR: \ + case MINUS: \ + case NEG: \ + case NOT: \ + return 1; \ + case MULT: \ + if (GET_MODE (XEXP (X, 0)) == DImode) \ + return 40; \ + else \ + return 7; \ + case DIV: \ + case UDIV: \ + case MOD: \ + case UMOD: \ + return 33; + + +/* An expression giving the cost of an addressing mode that contains + ADDRESS. If not defined, the cost is computed from the ADDRESS + expression and the `CONST_COSTS' values. + + For most CISC machines, the default cost is a good approximation + of the true cost of the addressing mode. However, on RISC + machines, all instructions normally have the same length and + execution time. Hence all addresses will have equal costs. + + In cases where more than one form of an address is known, the form + with the lowest cost will be used. If multiple forms have the + same, lowest, cost, the one that is the most complex will be used. + + For example, suppose an address that is equal to the sum of a + register and a constant is used twice in the same basic block. + When this macro is not defined, the address will be computed in a + register and memory references will be indirect through that + register. On machines where the cost of the addressing mode + containing the sum is no higher than that of a simple indirect + reference, this will produce an additional instruction and + possibly require an additional register. Proper specification of + this macro eliminates this overhead for such machines. + + Similar use of this macro is made in strength reduction of loops. + + ADDRESS need not be valid as an address. In such a case, the cost + is not relevant and can be any value; invalid addresses need not be + assigned a different cost. + + On machines where an address involving more than one register is as + cheap as an address computation involving only one register, + defining `ADDRESS_COST' to reflect this can cause two registers to + be live over a region of code where only one would have been if + `ADDRESS_COST' were not defined in that manner. This effect should + be considered in the definition of this macro. Equivalent costs + should probably only be given to addresses with different numbers + of registers on machines with lots of registers. + + This macro will normally either not be defined or be defined as a + constant. + + On s390 symbols are expensive if compiled with fpic + lifetimes. */ + +#define ADDRESS_COST(RTX) \ + ((flag_pic && GET_CODE (RTX) == SYMBOL_REF) ? 2 : 1) + +/* On s390, copy between fprs and gprs is expensive. */ + +#define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \ + (( ( reg_classes_intersect_p ((CLASS1), GENERAL_REGS) \ + && reg_classes_intersect_p ((CLASS2), FP_REGS)) \ + || ( reg_classes_intersect_p ((CLASS1), FP_REGS) \ + && reg_classes_intersect_p ((CLASS2), GENERAL_REGS))) ? 10 : 1) + + +/* A C expression for the cost of moving data of mode M between a + register and memory. A value of 2 is the default; this cost is + relative to those in `REGISTER_MOVE_COST'. + + If moving between registers and memory is more expensive than + between two registers, you should define this macro to express the + relative cost. */ + +#define MEMORY_MOVE_COST(M, C, I) 1 + +/* A C expression for the cost of a branch instruction. A value of 1 + is the default; other values are interpreted relative to that. */ + +#define BRANCH_COST 1 + +/* Add any extra modes needed to represent the condition code. */ +#define EXTRA_CC_MODES \ + CC (CCZmode, "CCZ") \ + CC (CCAmode, "CCA") \ + CC (CCLmode, "CCL") \ + CC (CCUmode, "CCU") \ + CC (CCSmode, "CCS") \ + CC (CCTmode, "CCT") + +/* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE, + return the mode to be used for the comparison. */ + +#define SELECT_CC_MODE(OP, X, Y) s390_select_ccmode ((OP), (X), (Y)) + + +/* Define the information needed to generate branch and scc insns. This is + stored from the compare operation. Note that we can't use "rtx" here + since it hasn't been defined! */ + +extern struct rtx_def *s390_compare_op0, *s390_compare_op1; + + +/* How to refer to registers in assembler output. This sequence is + indexed by compiler's hard-register-number (see above). */ + +#define REGISTER_NAMES \ +{ "%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7", \ + "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", \ + "%f0", "%f2", "%f4", "%f6", "%f1", "%f3", "%f5", "%f7", \ + "%f8", "%f10", "%f12", "%f14", "%f9", "%f11", "%f13", "%f15", \ + "%ap", "%cc", "%fp" \ +} + +/* implicit call of memcpy, not bcopy */ + +#define TARGET_MEM_FUNCTIONS + +/* Either simplify a location expression, or return the original. */ + +#define ASM_SIMPLIFY_DWARF_ADDR(X) \ + s390_simplify_dwarf_addr (X) + +/* Print operand X (an rtx) in assembler syntax to file FILE. + CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. + For `%' followed by punctuation, CODE is the punctuation and X is null. */ + +#define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE) + +#define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR) + + +/* Define the codes that are matched by predicates in aux-output.c. */ + +#define PREDICATE_CODES \ + {"s_operand", { SUBREG, MEM }}, \ + {"s_imm_operand", { CONST_INT, CONST_DOUBLE, SUBREG, MEM }}, \ + {"bras_sym_operand",{ SYMBOL_REF, CONST }}, \ + {"larl_operand", { SYMBOL_REF, CONST, CONST_INT, CONST_DOUBLE }}, \ + {"load_multiple_operation", {PARALLEL}}, \ + {"store_multiple_operation", {PARALLEL}}, \ + {"const0_operand", { CONST_INT, CONST_DOUBLE }}, \ + {"consttable_operand", { SYMBOL_REF, LABEL_REF, CONST, \ + CONST_INT, CONST_DOUBLE }}, \ + {"s390_plus_operand", { PLUS }}, + + +/* S/390 constant pool breaks the devices in crtstuff.c to control section + in where code resides. We have to write it as asm code. */ +#ifndef __s390x__ +#define CRT_CALL_STATIC_FUNCTION(SECTION_OP, FUNC) \ + asm (SECTION_OP "\n\ + bras\t%r2,1f\n\ +0: .long\t" USER_LABEL_PREFIX #FUNC " - 0b\n\ +1: l\t%r3,0(%r2)\n\ + bas\t%r14,0(%r3,%r2)\n\ + .previous"); +#endif + +/* Constant Pool for all symbols operands which are changed with + force_const_mem during insn generation (expand_insn). */ + +extern int s390_pool_count; +extern int s390_nr_constants; +extern int s390_pool_overflow; + +#define ASM_OUTPUT_POOL_PROLOGUE(FILE, FUNNAME, fndecl, size) \ +{ \ + struct pool_constant *pool; \ + \ + if (s390_pool_count == -1) \ + { \ + s390_nr_constants = 0; \ + for (pool = first_pool; pool; pool = pool->next) \ + if (pool->mark) s390_nr_constants++; \ + return; \ + } \ +} + +#define ASM_OUTPUT_SPECIAL_POOL_ENTRY(FILE, EXP, MODE, ALIGN, LABELNO, WIN) \ +{ \ + fprintf (FILE, ".LC%d:\n", LABELNO); \ + \ + /* Output the value of the constant itself. */ \ + switch (GET_MODE_CLASS (MODE)) \ + { \ + case MODE_FLOAT: \ + if (GET_CODE (EXP) != CONST_DOUBLE) \ + abort (); \ + \ + memcpy ((char *) &u, (char *) &CONST_DOUBLE_LOW (EXP), sizeof u); \ + assemble_real (u.d, MODE, ALIGN); \ + break; \ + \ + case MODE_INT: \ + case MODE_PARTIAL_INT: \ + if (flag_pic \ + && (GET_CODE (EXP) == CONST \ + || GET_CODE (EXP) == SYMBOL_REF \ + || GET_CODE (EXP) == LABEL_REF )) \ + { \ + fputs (integer_asm_op (UNITS_PER_WORD, TRUE), FILE); \ + s390_output_symbolic_const (FILE, EXP); \ + fputc ('\n', (FILE)); \ + } \ + else \ + { \ + assemble_integer (EXP, GET_MODE_SIZE (MODE), ALIGN, 1); \ + if (GET_MODE_SIZE (MODE) == 1) \ + ASM_OUTPUT_SKIP ((FILE), 1); \ + } \ + break; \ + \ + default: \ + abort (); \ + } \ + goto WIN; \ +} + +#endif diff --git a/contrib/gcc/config/s390/s390.md b/contrib/gcc/config/s390/s390.md new file mode 100644 index 0000000..2742638 --- /dev/null +++ b/contrib/gcc/config/s390/s390.md @@ -0,0 +1,6727 @@ +;;- Machine description for GNU compiler -- S/390 / zSeries version. +;; Copyright (C) 1999, 2000, 2001, 2002 Free Software Foundation, Inc. +;; Contributed by Hartmut Penner (hpenner@de.ibm.com) and +;; Ulrich Weigand (uweigand@de.ibm.com). +;; This file is part of GNU CC. + +;; GNU CC is free software; you can redistribute it and/or modify +;; it under the terms of the GNU General Public License as published by +;; the Free Software Foundation; either version 2, or (at your option) +;; any later version. + +;; GNU CC is distributed in the hope that it will be useful, +;; but WITHOUT ANY WARRANTY; without even the implied warranty of +;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +;; GNU General Public License for more details. + +;; You should have received a copy of the GNU General Public License +;; along with GNU CC; see the file COPYING. If not, write to +;; the Free Software Foundation, 59 Temple Place - Suite 330, +;; Boston, MA 02111-1307, USA. + +;; +;; Special constraints for s/390 machine description: +;; +;; a -- Any address register from 1 to 15. +;; d -- Any register from 0 to 15. +;; I -- An 8-bit constant (0..255). +;; J -- A 12-bit constant (0..4095). +;; K -- A 16-bit constant (-32768..32767). +;; Q -- A memory reference without index-register. +;; S -- Valid operand for the LARL instruction. +;; +;; Special formats used for outputting 390 instructions. +;; +;; %b -- Print a constant byte integer. xy +;; %h -- Print a signed 16-bit. wxyz +;; %N -- Print next register (second word of a DImode reg) or next word. +;; %M -- Print next register (second word of a TImode reg) or next word. +;; %O -- Print the offset of a memory reference (PLUS (REG) (CONST_INT)). +;; %R -- Print the register of a memory reference (PLUS (REG) (CONST_INT)). +;; +;; We have a special constraint for pattern matching. +;; +;; s_operand -- Matches a valid S operand in a RS, SI or SS type instruction. +;; + + +;; Define an insn type attribute. This is used in function unit delay +;; computations. + +(define_attr "type" "none,integer,load,lr,la,lm,stm,cs,vs,store,imul,lmul,fmul,idiv,ldiv,fdiv,branch,jsr,other,o2,o3" + (const_string "integer")) + +;; Insn are devide in two classes: +;; mem: Insn accessing memory +;; reg: Insn operands all in registers + +(define_attr "atype" "reg,mem" + (const_string "reg")) + +;; Generic pipeline function unit. + +(define_function_unit "integer" 1 0 + (eq_attr "type" "none") 0 0) + +(define_function_unit "integer" 1 0 + (eq_attr "type" "integer") 1 1) + +(define_function_unit "integer" 1 0 + (eq_attr "type" "load") 1 1) + +(define_function_unit "integer" 1 0 + (eq_attr "type" "la") 1 1) + +(define_function_unit "integer" 1 0 + (eq_attr "type" "lr") 1 1) + +(define_function_unit "integer" 1 0 + (eq_attr "type" "store") 1 1) + +(define_function_unit "integer" 1 0 + (eq_attr "type" "lm") 2 2) + +(define_function_unit "integer" 1 0 + (eq_attr "type" "stm") 2 2) + +(define_function_unit "integer" 1 0 + (eq_attr "type" "cs") 5 5) + +(define_function_unit "integer" 1 0 + (eq_attr "type" "vs") 30 30) + +(define_function_unit "integer" 1 0 + (eq_attr "type" "jsr") 5 5) + +(define_function_unit "integer" 1 0 + (eq_attr "type" "imul") 7 7) + +(define_function_unit "integer" 1 0 + (eq_attr "type" "fmul") 6 6) + +(define_function_unit "integer" 1 0 + (eq_attr "type" "idiv") 33 33) + +(define_function_unit "integer" 1 0 + (eq_attr "type" "fdiv") 33 33) + +(define_function_unit "integer" 1 0 + (eq_attr "type" "o2") 2 2) + +(define_function_unit "integer" 1 0 + (eq_attr "type" "o3") 3 3) + +(define_function_unit "integer" 1 0 + (eq_attr "type" "other") 5 5) + +;; Operand type. Used to default length attribute values + +(define_attr "op_type" + "NN,E,RR,RRE,RX,RS,RSI,RI,SI,S,SS,SSE,RXE,RSE,RIL,RIE" + (const_string "RX")) + +;; Length in bytes. + +(define_attr "length" "" +(cond [ (eq_attr "op_type" "E") (const_int 2) + (eq_attr "op_type" "RR") (const_int 2) + (eq_attr "op_type" "RX") (const_int 4) + (eq_attr "op_type" "RI") (const_int 4) + (eq_attr "op_type" "RRE") (const_int 4) + (eq_attr "op_type" "RS") (const_int 4) + (eq_attr "op_type" "RSI") (const_int 4) + (eq_attr "op_type" "RX") (const_int 4) + (eq_attr "op_type" "S") (const_int 4) + (eq_attr "op_type" "SI") (const_int 4) + (eq_attr "op_type" "SS") (const_int 6) + (eq_attr "op_type" "SSE") (const_int 6) + (eq_attr "op_type" "RXE") (const_int 6) + (eq_attr "op_type" "RSE") (const_int 6) + (eq_attr "op_type" "RIL") (const_int 6)] + (const_int 4))) + +;; Define attributes for `asm' insns. + +(define_asm_attributes [(set_attr "type" "other") + (set_attr "op_type" "NN")]) + +;; +;; Condition Codes +;; +; +; CCL: Zero Nonzero Zero Nonzero (AL, ALR, SL, SLR, N, NC, NI, NR, O, OC, OI, OR, X, XC, XI, XR) +; CCA: Zero <Zero >Zero Overflow (A, AR, AH, AHI, S, SR, SH, SHI, LTR, LCR, LNR, LPR, SLA, SLDA, SLA, SRDA) +; CCU: Equal ULess UGreater -- (CL, CLR, CLI, CLM) +; CCS: Equal SLess SGreater -- (C, CR, CH, CHI, ICM) +; CCT: Zero Mixed Mixed Ones (TM, TMH, TML) + +; CCZ -> CCL / CCZ1 +; CCZ1 -> CCA/CCU/CCS/CCT +; CCS -> CCA + +; String: CLC, CLCL, CLCLE, CLST, CUSE, MVCL, MVCLE, MVPG, MVST, SRST +; Clobber: CKSM, CFC, CS, CDS, CUUTF, CUTFU, PLO, SPM, STCK, STCKE, TS, TRT, TRE, UPT + + +;; +;;- Compare instructions. +;; + +(define_expand "cmpdi" + [(set (reg:CC 33) + (compare:CC (match_operand:DI 0 "register_operand" "") + (match_operand:DI 1 "general_operand" "")))] + "TARGET_64BIT" + " +{ + s390_compare_op0 = operands[0]; + s390_compare_op1 = operands[1]; + DONE; +}") + +(define_expand "cmpsi" + [(set (reg:CC 33) + (compare:CC (match_operand:SI 0 "register_operand" "") + (match_operand:SI 1 "general_operand" "")))] + "" + " +{ + s390_compare_op0 = operands[0]; + s390_compare_op1 = operands[1]; + DONE; +}") + +;(define_expand "cmphi" +; [(set (reg:CC 33) +; (compare:CC (match_operand:HI 0 "register_operand" "") +; (match_operand:HI 1 "general_operand" "")))] +; "" +; " +;{ +; s390_compare_op0 = operands[0]; +; s390_compare_op1 = operands[1]; +; DONE; +;}") + +;(define_expand "cmpqi" +; [(set (reg:CC 33) +; (compare:CC (match_operand:QI 0 "register_operand" "") +; (match_operand:QI 1 "general_operand" "")))] +; "" +; " +;{ +; s390_compare_op0 = operands[0]; +; s390_compare_op1 = operands[1]; +; DONE; +;}") + +(define_expand "cmpdf" + [(set (reg:CC 33) + (compare:CC (match_operand:DF 0 "register_operand" "") + (match_operand:DF 1 "general_operand" "")))] + "TARGET_HARD_FLOAT" + " +{ + s390_compare_op0 = operands[0]; + s390_compare_op1 = operands[1]; + DONE; +}") + +(define_expand "cmpsf" + [(set (reg:CC 33) + (compare:CC (match_operand:SF 0 "register_operand" "") + (match_operand:SF 1 "general_operand" "")))] + "TARGET_HARD_FLOAT" + " +{ + s390_compare_op0 = operands[0]; + s390_compare_op1 = operands[1]; + DONE; +}") + + +; DI instructions + +(define_insn "*cmpdi_tm2" + [(set (reg 33) + (compare (zero_extract:DI (match_operand:DI 0 "register_operand" "d") + (match_operand:DI 1 "const_int_operand" "n") + (match_operand:DI 2 "const_int_operand" "n")) + (const_int 0)))] + "s390_match_ccmode(insn, CCTmode) && TARGET_64BIT + && INTVAL (operands[1]) >= 1 && INTVAL (operands[2]) >= 0 + && INTVAL (operands[1]) + INTVAL (operands[2]) <= 64 + && (INTVAL (operands[1]) + INTVAL (operands[2]) - 1) >> 4 + == INTVAL (operands[2]) >> 4" + "* +{ + int part = INTVAL (operands[2]) >> 4; + int block = (1 << INTVAL (operands[1])) - 1; + int shift = 16 - INTVAL (operands[1]) - (INTVAL (operands[2]) & 15); + + operands[2] = GEN_INT (block << shift); + + switch (part) + { + case 0: return \"tmhh\\t%0,%x2\"; + case 1: return \"tmhl\\t%0,%x2\"; + case 2: return \"tmlh\\t%0,%x2\"; + case 3: return \"tmll\\t%0,%x2\"; + default: abort (); + } +}" + [(set_attr "op_type" "RI")]) + +(define_insn "*cmpdi_tm_reg" + [(set (reg 33) + (compare (and:DI (match_operand:DI 0 "register_operand" "%d") + (match_operand:DI 1 "immediate_operand" "n")) + (const_int 0)))] + "s390_match_ccmode(insn, CCTmode) && TARGET_64BIT + && s390_single_hi (operands[1], DImode, 0) >= 0" + "* +{ + int part = s390_single_hi (operands[1], DImode, 0); + operands[1] = GEN_INT (s390_extract_hi (operands[1], DImode, part)); + + switch (part) + { + case 0: return \"tmhh\\t%0,%x1\"; + case 1: return \"tmhl\\t%0,%x1\"; + case 2: return \"tmlh\\t%0,%x1\"; + case 3: return \"tmll\\t%0,%x1\"; + default: abort (); + } +}" + [(set_attr "op_type" "RI")]) + +(define_insn "*cmpdi_tm_mem" + [(set (reg 33) + (compare (and:DI (match_operand:DI 0 "s_operand" "%Qo") + (match_operand:DI 1 "immediate_operand" "n")) + (const_int 0)))] + "s390_match_ccmode(insn, CCTmode) && TARGET_64BIT + && s390_single_qi (operands[1], DImode, 0) >= 0" + "* +{ + int part = s390_single_qi (operands[1], DImode, 0); + operands[1] = GEN_INT (s390_extract_qi (operands[1], DImode, part)); + + operands[0] = gen_rtx_MEM (QImode, + plus_constant (XEXP (operands[0], 0), part)); + return \"tm\\t%0,%b1\"; +}" + [(set_attr "op_type" "SI") + (set_attr "atype" "mem")]) + +(define_insn "*ltgr" + [(set (reg 33) + (compare (match_operand:DI 0 "register_operand" "d") + (match_operand:DI 1 "const0_operand" ""))) + (set (match_operand:DI 2 "register_operand" "=d") + (match_dup 0))] + "s390_match_ccmode(insn, CCSmode) && TARGET_64BIT" + "ltgr\\t%2,%0" + [(set_attr "op_type" "RRE")]) + +(define_insn "*cmpdi_ccs_0_64" + [(set (reg 33) + (compare (match_operand:DI 0 "register_operand" "d") + (match_operand:DI 1 "const0_operand" "")))] + "s390_match_ccmode(insn, CCSmode) && TARGET_64BIT" + "ltgr\\t%0,%0" + [(set_attr "op_type" "RRE")]) + +(define_insn "*cmpdi_ccs_0_31" + [(set (reg 33) + (compare (match_operand:DI 0 "register_operand" "d") + (match_operand:DI 1 "const0_operand" "")))] + "s390_match_ccmode(insn, CCSmode)" + "srda\\t%0,0" + [(set_attr "op_type" "RS")]) + +(define_insn "*cmpdi_ccs" + [(set (reg 33) + (compare (match_operand:DI 0 "register_operand" "d,d,d") + (match_operand:DI 1 "general_operand" "d,K,m")))] + "s390_match_ccmode(insn, CCSmode) && TARGET_64BIT" + "@ + cgr\\t%0,%1 + cghi\\t%0,%c1 + cg\\t%0,%1" + [(set_attr "op_type" "RRE,RI,RXE") + (set_attr "atype" "reg,reg,mem")]) + +(define_insn "*cmpdi_ccu" + [(set (reg 33) + (compare (match_operand:DI 0 "register_operand" "d,d") + (match_operand:DI 1 "general_operand" "d,m")))] + "s390_match_ccmode(insn, CCUmode) && TARGET_64BIT" + "@ + clgr\\t%0,%1 + clg\\t%0,%1" + [(set_attr "op_type" "RRE,RXE") + (set_attr "atype" "reg,mem")]) + +(define_insn "*cmpdi_ccu_mem" + [(set (reg 33) + (compare (match_operand:DI 0 "s_operand" "oQ") + (match_operand:DI 1 "s_imm_operand" "oQ")))] + "s390_match_ccmode(insn, CCUmode)" + "clc\\t%O0(8,%R0),%1" + [(set_attr "op_type" "SS") + (set_attr "atype" "mem")]) + +; SI instructions + +(define_insn "*cmpsi_tm2" + [(set (reg 33) + (compare (zero_extract:SI (match_operand:SI 0 "register_operand" "d") + (match_operand:SI 1 "const_int_operand" "n") + (match_operand:SI 2 "const_int_operand" "n")) + (const_int 0)))] + "s390_match_ccmode(insn, CCTmode) + && INTVAL (operands[1]) >= 1 && INTVAL (operands[2]) >= 0 + && INTVAL (operands[1]) + INTVAL (operands[2]) <= 32 + && (INTVAL (operands[1]) + INTVAL (operands[2]) - 1) >> 4 + == INTVAL (operands[2]) >> 4" + "* +{ + int part = INTVAL (operands[2]) >> 4; + int block = (1 << INTVAL (operands[1])) - 1; + int shift = 16 - INTVAL (operands[1]) - (INTVAL (operands[2]) & 15); + + operands[2] = GEN_INT (block << shift); + + switch (part) + { + case 0: return \"tmh\\t%0,%x2\"; + case 1: return \"tml\\t%0,%x2\"; + default: abort (); + } +}" + [(set_attr "op_type" "RI")]) + +(define_insn "*cmpsi_tm_reg" + [(set (reg 33) + (compare (and:SI (match_operand:SI 0 "register_operand" "%d") + (match_operand:SI 1 "immediate_operand" "n")) + (const_int 0)))] + "s390_match_ccmode(insn, CCTmode) + && s390_single_hi (operands[1], SImode, 0) >= 0" + "* +{ + int part = s390_single_hi (operands[1], SImode, 0); + operands[1] = GEN_INT (s390_extract_hi (operands[1], SImode, part)); + + switch (part) + { + case 0: return \"tmh\\t%0,%x1\"; + case 1: return \"tml\\t%0,%x1\"; + default: abort (); + } +}" + [(set_attr "op_type" "RI")]) + +(define_insn "*cmpsi_tm_mem" + [(set (reg 33) + (compare (and:SI (match_operand:SI 0 "s_operand" "%Qo") + (match_operand:SI 1 "immediate_operand" "n")) + (const_int 0)))] + "s390_match_ccmode(insn, CCTmode) + && s390_single_qi (operands[1], SImode, 0) >= 0" + "* +{ + int part = s390_single_qi (operands[1], SImode, 0); + operands[1] = GEN_INT (s390_extract_qi (operands[1], SImode, part)); + + operands[0] = gen_rtx_MEM (QImode, + plus_constant (XEXP (operands[0], 0), part)); + return \"tm\\t%0,%b1\"; +}" + [(set_attr "op_type" "SI") + (set_attr "atype" "mem")]) + +(define_insn "*ltr" + [(set (reg 33) + (compare (match_operand:SI 0 "register_operand" "d") + (match_operand:SI 1 "const0_operand" ""))) + (set (match_operand:SI 2 "register_operand" "=d") + (match_dup 0))] + "s390_match_ccmode(insn, CCSmode)" + "ltr\\t%2,%0" + [(set_attr "op_type" "RR")]) + +(define_insn "*icm15" + [(set (reg 33) + (compare (match_operand:SI 0 "s_operand" "Qo") + (match_operand:SI 1 "const0_operand" ""))) + (set (match_operand:SI 2 "register_operand" "=d") + (match_dup 0))] + "s390_match_ccmode(insn, CCSmode)" + "icm\\t%2,15,%0" + [(set_attr "op_type" "RS") + (set_attr "atype" "mem")]) + +(define_insn "*icm15_cconly" + [(set (reg 33) + (compare (match_operand:SI 0 "s_operand" "Qo") + (match_operand:SI 1 "const0_operand" ""))) + (clobber (match_scratch:SI 2 "=d"))] + "s390_match_ccmode(insn, CCSmode)" + "icm\\t%2,15,%0" + [(set_attr "op_type" "RS") + (set_attr "atype" "mem")]) + +(define_insn "*cmpsi_ccs_0" + [(set (reg 33) + (compare (match_operand:SI 0 "register_operand" "d") + (match_operand:SI 1 "const0_operand" "")))] + "s390_match_ccmode(insn, CCSmode)" + "ltr\\t%0,%0" + [(set_attr "op_type" "RR")]) + +(define_insn "*cmpsidi_ccs" + [(set (reg 33) + (compare (match_operand:SI 0 "register_operand" "d") + (sign_extend:SI (match_operand:HI 1 "memory_operand" "m"))))] + "s390_match_ccmode(insn, CCSmode)" + "ch\\t%0,%1" + [(set_attr "op_type" "RR") + (set_attr "atype" "mem")]) + +(define_insn "*cmpsi_ccs" + [(set (reg 33) + (compare (match_operand:SI 0 "register_operand" "d,d,d") + (match_operand:SI 1 "general_operand" "d,K,m")))] + "s390_match_ccmode(insn, CCSmode)" + "@ + cr\\t%0,%1 + chi\\t%0,%c1 + c\\t%0,%1" + [(set_attr "op_type" "RR,RI,RX") + (set_attr "atype" "reg,reg,mem")]) + +(define_insn "*cmpsi_ccu" + [(set (reg 33) + (compare (match_operand:SI 0 "register_operand" "d,d") + (match_operand:SI 1 "general_operand" "d,m")))] + "s390_match_ccmode(insn, CCUmode)" + "@ + clr\\t%0,%1 + cl\\t%0,%1" + [(set_attr "op_type" "RR,RX") + (set_attr "atype" "reg,mem")]) + +(define_insn "*cmpsi_ccu_mem" + [(set (reg 33) + (compare (match_operand:SI 0 "s_operand" "oQ") + (match_operand:SI 1 "s_imm_operand" "oQ")))] + "s390_match_ccmode(insn, CCUmode)" + "clc\\t%O0(4,%R0),%1" + [(set_attr "op_type" "SS") + (set_attr "atype" "mem")]) + + +; HI instructions + +(define_insn "*cmphi_tm_sub" + [(set (reg 33) + (compare (and:SI (subreg:SI (match_operand:HI 0 "s_operand" "%Qo") 0) + (match_operand:SI 1 "immediate_operand" "n")) + (const_int 0)))] + "s390_match_ccmode(insn, CCTmode) + && s390_single_qi (operands[1], HImode, 0) >= 0" + "* +{ + int part = s390_single_qi (operands[1], HImode, 0); + operands[1] = GEN_INT (s390_extract_qi (operands[1], HImode, part)); + + operands[0] = gen_rtx_MEM (QImode, + plus_constant (XEXP (operands[0], 0), part)); + return \"tm\\t%0,%b1\"; +}" + [(set_attr "op_type" "SI") + (set_attr "atype" "mem")]) + +(define_insn "*icm3" + [(set (reg 33) + (compare (match_operand:HI 0 "s_operand" "Qo") + (match_operand:HI 1 "const0_operand" ""))) + (set (match_operand:HI 2 "register_operand" "=d") + (match_dup 0))] + "s390_match_ccmode(insn, CCSmode)" + "icm\\t%2,3,%0" + [(set_attr "op_type" "RS") + (set_attr "atype" "mem")]) + +(define_insn "*cmphi_cct_0" + [(set (reg 33) + (compare (match_operand:HI 0 "register_operand" "d") + (match_operand:HI 1 "const0_operand" "")))] + "s390_match_ccmode(insn, CCTmode)" + "tml\\t%0,65535" + [(set_attr "op_type" "RX")]) + +(define_insn "*cmphi_ccs_0" + [(set (reg 33) + (compare (match_operand:HI 0 "s_operand" "Qo") + (match_operand:HI 1 "const0_operand" ""))) + (clobber (match_scratch:HI 2 "=d"))] + "s390_match_ccmode(insn, CCSmode)" + "icm\\t%2,3,%0" + [(set_attr "op_type" "RS") + (set_attr "atype" "mem")]) + +(define_insn "*cmphi_ccu" + [(set (reg 33) + (compare (match_operand:HI 0 "register_operand" "d") + (match_operand:HI 1 "s_imm_operand" "Qo")))] + "s390_match_ccmode(insn, CCUmode)" + "clm\\t%0,3,%1" + [(set_attr "op_type" "RS") + (set_attr "atype" "mem")]) + +(define_insn "*cmphi_ccu_mem" + [(set (reg 33) + (compare (match_operand:HI 0 "s_operand" "oQ") + (match_operand:HI 1 "s_imm_operand" "oQ")))] + "s390_match_ccmode(insn, CCUmode)" + "clc\\t%O0(2,%R0),%1" + [(set_attr "op_type" "SS") + (set_attr "atype" "mem")]) + + +; QI instructions + +(define_insn "*cmpqi_tm2" + [(set (reg 33) + (compare (zero_extract:SI (match_operand:QI 0 "s_operand" "Qo") + (match_operand:SI 1 "const_int_operand" "n") + (match_operand:SI 2 "const_int_operand" "n")) + (const_int 0)))] + "s390_match_ccmode(insn, CCTmode) + && INTVAL (operands[1]) >= 1 && INTVAL (operands[2]) >= 0 + && INTVAL (operands[1]) + INTVAL (operands[2]) <= 8" + "* +{ + int block = (1 << INTVAL (operands[1])) - 1; + int shift = 8 - INTVAL (operands[1]) - INTVAL (operands[2]); + + operands[2] = GEN_INT (block << shift); + return \"tm\\t%0,%b2\"; +}" + [(set_attr "op_type" "SI") + (set_attr "atype" "mem")]) + +(define_insn "*cmpqi_tm" + [(set (reg 33) + (compare (and:QI (match_operand:QI 0 "nonimmediate_operand" "%d,Q") + (match_operand:QI 1 "immediate_operand" "n,n")) + (const_int 0)))] + "s390_match_ccmode(insn, CCTmode)" + "@ + tml\\t%0,%b1 + tm\\t%0,%b1" + [(set_attr "op_type" "RI,SI") + (set_attr "atype" "reg,mem")]) + +(define_insn "*cmpqi_tm_sub" + [(set (reg 33) + (compare (and:SI (subreg:SI (match_operand:QI 0 "s_operand" "%Qo") 0) + (match_operand:SI 1 "immediate_operand" "n")) + (const_int 0)))] + "s390_match_ccmode(insn, CCTmode)" + "tm\\t%0,%b1" + [(set_attr "op_type" "SI") + (set_attr "atype" "mem")]) + +(define_insn "*icm1" + [(set (reg 33) + (compare (match_operand:QI 0 "s_operand" "Qo") + (match_operand:QI 1 "const0_operand" ""))) + (set (match_operand:QI 2 "register_operand" "=d") + (match_dup 0))] + "s390_match_ccmode(insn, CCSmode)" + "icm\\t%2,1,%0" + [(set_attr "op_type" "RS") + (set_attr "atype" "mem")]) + +(define_insn "*tm_0" + [(set (reg 33) + (compare (zero_extend:SI (and:QI (match_operand:QI 0 "s_operand" "Qo") + (match_operand:QI 1 "immediate_operand" ""))) + (const_int 0)))] + "s390_match_ccmode(insn, CCTmode) && + INTVAL(operands[1]) >= 0 && INTVAL(operands[1]) < 256" + "tm\\t%0,%1" + [(set_attr "op_type" "RI") + (set_attr "atype" "mem")]) + +(define_insn "*cmpqi_cct_0" + [(set (reg 33) + (compare (match_operand:QI 0 "register_operand" "d") + (match_operand:QI 1 "const0_operand" "")))] + "s390_match_ccmode(insn, CCTmode)" + "tml\\t%0,255" + [(set_attr "op_type" "RI")]) + +(define_insn "*cmpqi_ccs_0" + [(set (reg 33) + (compare (match_operand:QI 0 "s_operand" "Qo") + (match_operand:QI 1 "const0_operand" ""))) + (clobber (match_scratch:QI 2 "=d"))] + "s390_match_ccmode(insn, CCSmode)" + "icm\\t%2,1,%0" + [(set_attr "op_type" "RS") + (set_attr "atype" "mem")]) + +(define_insn "*cmpqi_ccu_0" + [(set (reg 33) + (compare (match_operand:QI 0 "s_operand" "Qo") + (match_operand:QI 1 "const0_operand" "")))] + "s390_match_ccmode(insn, CCUmode)" + "cli\\t%0,0" + [(set_attr "op_type" "SI") + (set_attr "atype" "mem")]) + +(define_insn "*cmpqi_ccu" + [(set (reg 33) + (compare (match_operand:QI 0 "register_operand" "d") + (match_operand:QI 1 "s_imm_operand" "Qo")))] + "s390_match_ccmode(insn, CCUmode)" + "clm\\t%0,1,%1" + [(set_attr "op_type" "RS") + (set_attr "atype" "mem")]) + +(define_insn "*cmpqi_ccu_immed" + [(set (reg 33) + (compare (match_operand:QI 0 "s_operand" "Qo") + (match_operand:QI 1 "const_int_operand" "n")))] + "s390_match_ccmode(insn, CCUmode) && + INTVAL(operands[1]) >= 0 && INTVAL(operands[1]) < 256" + "cli\\t%0,%1" + [(set_attr "op_type" "SI") + (set_attr "atype" "mem")]) + +(define_insn "*cmpqi_ccu_mem" + [(set (reg 33) + (compare (match_operand:QI 0 "s_operand" "oQ") + (match_operand:QI 1 "s_imm_operand" "oQ")))] + "s390_match_ccmode(insn, CCUmode)" + "clc\\t%O0(1,%R0),%1" + [(set_attr "op_type" "SS") + (set_attr "atype" "mem")]) + + +; DF instructions + +(define_insn "*cmpdf_ccs_0" + [(set (reg 33) + (compare (match_operand:DF 0 "register_operand" "f") + (match_operand:DF 1 "const0_operand" "")))] + "s390_match_ccmode(insn, CCSmode) && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" + "ltdbr\\t%0,%0" + [(set_attr "op_type" "RRE")]) + +(define_insn "*cmpdf_ccs_0_ibm" + [(set (reg 33) + (compare (match_operand:DF 0 "register_operand" "f") + (match_operand:DF 1 "const0_operand" "")))] + "s390_match_ccmode(insn, CCSmode) && TARGET_HARD_FLOAT && TARGET_IBM_FLOAT" + "ltdr\\t%0,%0" + [(set_attr "op_type" "RR")]) + +(define_insn "*cmpdf_ccs" + [(set (reg 33) + (compare (match_operand:DF 0 "register_operand" "f,f") + (match_operand:DF 1 "general_operand" "f,m")))] + "s390_match_ccmode(insn, CCSmode) && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" + "@ + cdbr\\t%0,%1 + cdb\\t%0,%1" + [(set_attr "op_type" "RRE,RXE") + (set_attr "atype" "reg,mem")]) + +(define_insn "*cmpdf_ccs_ibm" + [(set (reg 33) + (compare (match_operand:DF 0 "register_operand" "f,f") + (match_operand:DF 1 "general_operand" "f,m")))] + "s390_match_ccmode(insn, CCSmode) && TARGET_HARD_FLOAT && TARGET_IBM_FLOAT" + "@ + cdr\\t%0,%1 + cd\\t%0,%1" + [(set_attr "op_type" "RR,RX") + (set_attr "atype" "reg,mem")]) + + +; SF instructions + +(define_insn "*cmpsf_ccs_0" + [(set (reg 33) + (compare (match_operand:SF 0 "register_operand" "f") + (match_operand:SF 1 "const0_operand" "")))] + "s390_match_ccmode(insn, CCSmode) && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" + "ltebr\\t%0,%0" + [(set_attr "op_type" "RRE")]) + +(define_insn "*cmpsf_ccs_0_ibm" + [(set (reg 33) + (compare (match_operand:SF 0 "register_operand" "f") + (match_operand:SF 1 "const0_operand" "")))] + "s390_match_ccmode(insn, CCSmode) && TARGET_HARD_FLOAT && TARGET_IBM_FLOAT" + "lter\\t%0,%0" + [(set_attr "op_type" "RR")]) + +(define_insn "*cmpsf_ccs" + [(set (reg 33) + (compare (match_operand:SF 0 "register_operand" "f,f") + (match_operand:SF 1 "general_operand" "f,m")))] + "s390_match_ccmode(insn, CCSmode) && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" + "@ + cebr\\t%0,%1 + ceb\\t%0,%1" + [(set_attr "op_type" "RRE,RXE") + (set_attr "atype" "reg,mem")]) + +(define_insn "*cmpsf_ccs" + [(set (reg 33) + (compare (match_operand:SF 0 "register_operand" "f,f") + (match_operand:SF 1 "general_operand" "f,m")))] + "s390_match_ccmode(insn, CCSmode) && TARGET_HARD_FLOAT && TARGET_IBM_FLOAT" + "@ + cer\\t%0,%1 + ce\\t%0,%1" + [(set_attr "op_type" "RR,RX") + (set_attr "atype" "reg,mem")]) + + +;; +;;- Move instructions. +;; + +; +; movti instruction pattern(s). +; + +(define_insn "*movti_ss" + [(set (match_operand:TI 0 "s_operand" "=Qo") + (match_operand:TI 1 "s_imm_operand" "Qo"))] + "" + "mvc\\t%O0(16,%R0),%1" + [(set_attr "op_type" "SS") + (set_attr "atype" "mem")]) + +(define_insn "movti" + [(set (match_operand:TI 0 "nonimmediate_operand" "=d,Q,d,m") + (match_operand:TI 1 "general_operand" "Q,d,dKm,d"))] + "TARGET_64BIT" + "@ + lmg\\t%0,%N0,%1 + stmg\\t%1,%N1,%0 + # + #" + [(set_attr "op_type" "RSE,RSE,NN,NN") + (set_attr "atype" "mem")]) + +(define_split + [(set (match_operand:TI 0 "nonimmediate_operand" "") + (match_operand:TI 1 "general_operand" ""))] + "TARGET_64BIT && reload_completed + && !s_operand (operands[0], VOIDmode) + && !s_operand (operands[1], VOIDmode) + && (register_operand (operands[0], VOIDmode) + || register_operand (operands[1], VOIDmode)) + && (!register_operand (operands[0], VOIDmode) + || !reg_overlap_mentioned_p (operand_subword (operands[0], 0, 0, TImode), + operands[1]) + || !reg_overlap_mentioned_p (operand_subword (operands[0], 1, 0, TImode), + operands[1]))" + [(set (match_dup 2) (match_dup 4)) + (set (match_dup 3) (match_dup 5))] + " +{ + if (!register_operand (operands[0], VOIDmode) + || !reg_overlap_mentioned_p (operand_subword (operands[0], 0, 0, TImode), + operands[1])) + { + operands[2] = operand_subword (operands[0], 0, 0, TImode); + operands[3] = operand_subword (operands[0], 1, 0, TImode); + operands[4] = operand_subword (operands[1], 0, 0, TImode); + operands[5] = operand_subword (operands[1], 1, 0, TImode); + } + else + { + operands[2] = operand_subword (operands[0], 1, 0, TImode); + operands[3] = operand_subword (operands[0], 0, 0, TImode); + operands[4] = operand_subword (operands[1], 1, 0, TImode); + operands[5] = operand_subword (operands[1], 0, 0, TImode); + } +}") + +(define_split + [(set (match_operand:TI 0 "register_operand" "") + (match_operand:TI 1 "memory_operand" ""))] + "TARGET_64BIT && reload_completed + && !s_operand (operands[1], VOIDmode)" + [(set (match_dup 2) (match_dup 3)) + (set (match_dup 0) (mem:TI (match_dup 2)))] + "operands[2] = operand_subword (operands[0], 1, 0, TImode); + operands[3] = legitimize_la_operand (XEXP (operands[1], 0));") + +; +; movdi instruction pattern(s). +; + +;; If generating PIC code and operands[1] is a symbolic CONST, emit a +;; move to get the address of the symbolic object from the GOT. + +(define_expand "movdi" + [(set (match_operand:DI 0 "general_operand" "") + (match_operand:DI 1 "general_operand" ""))] + "" + " +{ + /* Handle PIC symbolic constants. */ + if (TARGET_64BIT && flag_pic && SYMBOLIC_CONST (operands[1])) + emit_pic_move (operands, DImode); + + /* During and after reload, we need to force constants + to the literal pool ourselves, if necessary. */ + if ((reload_in_progress || reload_completed) + && CONSTANT_P (operands[1]) + && (!legitimate_reload_constant_p (operands[1]) + || fp_operand (operands[0], VOIDmode))) + operands[1] = force_const_mem (DImode, operands[1]); +}") + +(define_insn "*movdi_lhi" + [(set (match_operand:DI 0 "register_operand" "=d") + (match_operand:DI 1 "immediate_operand" "K"))] + "TARGET_64BIT + && GET_CODE (operands[1]) == CONST_INT + && CONST_OK_FOR_LETTER_P (INTVAL (operands[1]), 'K') + && !fp_operand (operands[0], VOIDmode)" + "lghi\\t%0,%h1" + [(set_attr "op_type" "RI") + (set_attr "atype" "reg")]) + +(define_insn "*movdi_lli" + [(set (match_operand:DI 0 "register_operand" "=d") + (match_operand:DI 1 "immediate_operand" "n"))] + "TARGET_64BIT && s390_single_hi (operands[1], DImode, 0) >= 0 + && !fp_operand (operands[0], VOIDmode)" + "* +{ + int part = s390_single_hi (operands[1], DImode, 0); + operands[1] = GEN_INT (s390_extract_hi (operands[1], DImode, part)); + + switch (part) + { + case 0: return \"llihh\\t%0,%x1\"; + case 1: return \"llihl\\t%0,%x1\"; + case 2: return \"llilh\\t%0,%x1\"; + case 3: return \"llill\\t%0,%x1\"; + default: abort (); + } +}" + [(set_attr "op_type" "RI") + (set_attr "atype" "reg")]) + +(define_insn "*movdi_larl" + [(set (match_operand:DI 0 "register_operand" "=d") + (match_operand:DI 1 "larl_operand" "X"))] + "TARGET_64BIT + && !fp_operand (operands[0], VOIDmode)" + "larl\\t%0,%1" + [(set_attr "op_type" "RIL") + (set_attr "atype" "reg") + (set_attr "type" "la")]) + +(define_insn "*movdi_ss" + [(set (match_operand:DI 0 "s_operand" "=Qo") + (match_operand:DI 1 "s_imm_operand" "Qo"))] + "" + "mvc\\t%O0(8,%R0),%1" + [(set_attr "op_type" "SS") + (set_attr "atype" "mem")]) + +(define_insn "*movdi_64" + [(set (match_operand:DI 0 "nonimmediate_operand" "=d,d,m,!*f,!*f,!m") + (match_operand:DI 1 "general_operand" "d,m,d,*f,m,*f"))] + "TARGET_64BIT" + "@ + lgr\\t%0,%1 + lg\\t%0,%1 + stg\\t%1,%0 + ldr\\t%0,%1 + ld\\t%0,%1 + std\\t%1,%0" + [(set_attr "op_type" "RRE,RXE,RXE,RR,RX,RX") + (set_attr "atype" "reg,mem,mem,reg,mem,mem")]) + +(define_insn "*movdi_31" + [(set (match_operand:DI 0 "nonimmediate_operand" "=d,Q,d,m,!*f,!*f,!m") + (match_operand:DI 1 "general_operand" "Q,d,dKm,d,*f,m,*f"))] + "!TARGET_64BIT" + "@ + lm\\t%0,%N0,%1 + stm\\t%1,%N1,%0 + # + # + ldr\\t%0,%1 + ld\\t%0,%1 + std\\t%1,%0" + [(set_attr "op_type" "RS,RS,NN,NN,RR,RX,RX") + (set_attr "atype" "mem,mem,*,*,reg,mem,mem")]) + +(define_split + [(set (match_operand:DI 0 "nonimmediate_operand" "") + (match_operand:DI 1 "general_operand" ""))] + "!TARGET_64BIT && reload_completed + && !fp_operand (operands[0], VOIDmode) + && !fp_operand (operands[1], VOIDmode) + && !s_operand (operands[0], VOIDmode) + && !s_operand (operands[1], VOIDmode) + && (register_operand (operands[0], VOIDmode) + || register_operand (operands[1], VOIDmode)) + && (!register_operand (operands[0], VOIDmode) + || !reg_overlap_mentioned_p (operand_subword (operands[0], 0, 0, DImode), + operands[1]) + || !reg_overlap_mentioned_p (operand_subword (operands[0], 1, 0, DImode), + operands[1]))" + [(set (match_dup 2) (match_dup 4)) + (set (match_dup 3) (match_dup 5))] + " +{ + if (!register_operand (operands[0], VOIDmode) + || !reg_overlap_mentioned_p (operand_subword (operands[0], 0, 0, DImode), + operands[1])) + { + operands[2] = operand_subword (operands[0], 0, 0, DImode); + operands[3] = operand_subword (operands[0], 1, 0, DImode); + operands[4] = operand_subword (operands[1], 0, 0, DImode); + operands[5] = operand_subword (operands[1], 1, 0, DImode); + } + else + { + operands[2] = operand_subword (operands[0], 1, 0, DImode); + operands[3] = operand_subword (operands[0], 0, 0, DImode); + operands[4] = operand_subword (operands[1], 1, 0, DImode); + operands[5] = operand_subword (operands[1], 0, 0, DImode); + } +}") + +(define_split + [(set (match_operand:DI 0 "register_operand" "") + (match_operand:DI 1 "memory_operand" ""))] + "!TARGET_64BIT && reload_completed + && !fp_operand (operands[0], VOIDmode) + && !fp_operand (operands[1], VOIDmode) + && !s_operand (operands[1], VOIDmode)" + [(set (match_dup 2) (match_dup 3)) + (set (match_dup 0) (mem:DI (match_dup 2)))] + "operands[2] = operand_subword (operands[0], 1, 0, DImode); + operands[3] = legitimize_la_operand (XEXP (operands[1], 0));") + +; +; movsi instruction pattern(s). +; + +;; If generating PIC code and operands[1] is a symbolic CONST, emit a +;; move to get the address of the symbolic object from the GOT. + +(define_expand "movsi" + [(set (match_operand:SI 0 "general_operand" "") + (match_operand:SI 1 "general_operand" ""))] + "" + " +{ + /* Handle PIC symbolic constants. */ + if (!TARGET_64BIT && flag_pic && SYMBOLIC_CONST (operands[1])) + emit_pic_move (operands, SImode); + + /* expr.c tries to load an effective address using + force_reg. This fails because we don't have a + generic load_address pattern. Convert the move + to a proper arithmetic operation instead, unless + it is guaranteed to be OK. */ + if (GET_CODE (operands[1]) == PLUS + && !legitimate_la_operand_p (operands[1])) + { + operands[1] = force_operand (operands[1], operands[0]); + if (operands[1] == operands[0]) + DONE; + } + + /* During and after reload, we need to force constants + to the literal pool ourselves, if necessary. */ + if ((reload_in_progress || reload_completed) + && CONSTANT_P (operands[1]) + && (!legitimate_reload_constant_p (operands[1]) + || fp_operand (operands[0], VOIDmode))) + operands[1] = force_const_mem (SImode, operands[1]); +}") + +(define_insn "*movsi_lhi" + [(set (match_operand:SI 0 "register_operand" "=d") + (match_operand:SI 1 "immediate_operand" "K"))] + "GET_CODE (operands[1]) == CONST_INT + && CONST_OK_FOR_LETTER_P (INTVAL (operands[1]), 'K') + && !fp_operand (operands[0], VOIDmode)" + "lhi\\t%0,%h1" + [(set_attr "op_type" "RI")]) + +(define_insn "*movsi_lli" + [(set (match_operand:SI 0 "register_operand" "=d") + (match_operand:SI 1 "immediate_operand" "n"))] + "TARGET_64BIT && s390_single_hi (operands[1], SImode, 0) >= 0 + && !fp_operand (operands[0], VOIDmode)" + "* +{ + int part = s390_single_hi (operands[1], SImode, 0); + operands[1] = GEN_INT (s390_extract_hi (operands[1], SImode, part)); + + switch (part) + { + case 0: return \"llilh\\t%0,%x1\"; + case 1: return \"llill\\t%0,%x1\"; + default: abort (); + } +}" + [(set_attr "op_type" "RI")]) + +(define_insn "*movsi_ss" + [(set (match_operand:SI 0 "s_operand" "=Qo") + (match_operand:SI 1 "s_imm_operand" "Qo"))] + "" + "mvc\\t%O0(4,%R0),%1" + [(set_attr "op_type" "SS") + (set_attr "atype" "mem")]) + +(define_insn "*movsi" + [(set (match_operand:SI 0 "nonimmediate_operand" "=d,d,m,!*f,!*f,!m") + (match_operand:SI 1 "general_operand" "d,m,d,*f,m,*f"))] + "" + "@ + lr\\t%0,%1 + l\\t%0,%1 + st\\t%1,%0 + ler\\t%0,%1 + le\\t%0,%1 + ste\\t%1,%0" + [(set_attr "op_type" "RR,RX,RX,RR,RX,RX") + (set_attr "atype" "reg,mem,mem,reg,mem,mem")]) + + +; +; movhi instruction pattern(s). +; + +(define_insn "movhi" + [(set (match_operand:HI 0 "nonimmediate_operand" "=d,d,d,m") + (match_operand:HI 1 "general_operand" "d,n,m,d"))] + "" + "@ + lr\\t%0,%1 + lhi\\t%0,%h1 + lh\\t%0,%1 + sth\\t%1,%0" + [(set_attr "op_type" "RR,RI,RX,RX") + (set_attr "atype" "reg,reg,mem,mem")]) + + +; +; movqi instruction pattern(s). +; + +(define_insn "movqi_64" + [(set (match_operand:QI 0 "nonimmediate_operand" "=d,d,d,m,Q") + (match_operand:QI 1 "general_operand" "d,n,m,d,n"))] + "TARGET_64BIT" + "@ + lr\\t%0,%1 + lhi\\t%0,%b1 + llgc\\t%0,%1 + stc\\t%1,%0 + mvi\\t%0,%b1" + [(set_attr "op_type" "RR,RI,RXE,RX,SI") + (set_attr "atype" "reg,reg,mem,mem,mem")]) + + +(define_insn "movqi" + [(set (match_operand:QI 0 "nonimmediate_operand" "=d,d,d,m,Q") + (match_operand:QI 1 "general_operand" "d,n,m,d,n"))] + "" + "@ + lr\\t%0,%1 + lhi\\t%0,%b1 + ic\\t%0,%1 + stc\\t%1,%0 + mvi\\t%0,%b1" + [(set_attr "op_type" "RR,RI,RX,RX,SI") + (set_attr "atype" "reg,reg,mem,mem,mem")]) + + +; +; moveqstrictqi instruction pattern(s). +; + +(define_insn "*movstrictqi" + [(set (strict_low_part (match_operand:QI 0 "register_operand" "+d")) + (match_operand:QI 1 "memory_operand" "m"))] + "" + "ic\\t%0,%1" + [(set_attr "op_type" "RX") + (set_attr "atype" "mem")]) + +; +; movstricthi instruction pattern(s). +; + +(define_insn "*movstricthi" + [(set (strict_low_part (match_operand:HI 0 "register_operand" "+d")) + (match_operand:HI 1 "s_imm_operand" "Qo")) + (clobber (reg:CC 33))] + "" + "icm\\t%0,3,%1" + [(set_attr "op_type" "RS") + (set_attr "atype" "mem")]) + + +; +; movstrictsi instruction pattern(s). +; + +(define_insn "movestrictsi" + [(set (strict_low_part (match_operand:SI 0 "register_operand" "+d,d")) + (match_operand:SI 1 "general_operand" "d,m"))] + "TARGET_64BIT" + "@ + lr\\t%0,%1 + l\\t%0,%1" + [(set_attr "op_type" "RR,RS") + (set_attr "atype" "reg,mem")]) + + +; +; movdf instruction pattern(s). +; + +(define_expand "movdf" + [(set (match_operand:DF 0 "nonimmediate_operand" "") + (match_operand:DF 1 "general_operand" ""))] + "" + " +{ + /* During and after reload, we need to force constants + to the literal pool ourselves, if necessary. */ + if ((reload_in_progress || reload_completed) + && CONSTANT_P (operands[1])) + operands[1] = force_const_mem (DFmode, operands[1]); +}") + +(define_insn "*movdf_ss" + [(set (match_operand:DF 0 "s_operand" "=Qo") + (match_operand:DF 1 "s_imm_operand" "Qo"))] + "" + "mvc\\t%O0(8,%R0),%1" + [(set_attr "op_type" "SS") + (set_attr "atype" "mem")]) + +(define_insn "*movdf_64" + [(set (match_operand:DF 0 "nonimmediate_operand" "=f,f,m,d,d,m") + (match_operand:DF 1 "general_operand" "f,m,f,d,m,d"))] + "TARGET_64BIT" + "@ + ldr\\t%0,%1 + ld\\t%0,%1 + std\\t%1,%0 + lgr\\t%0,%1 + lg\\t%0,%1 + stg\\t%1,%0" + [(set_attr "op_type" "RR,RX,RX,RRE,RXE,RXE") + (set_attr "atype" "reg,mem,mem,reg,mem,mem")]) + +(define_insn "*movdf_31" + [(set (match_operand:DF 0 "nonimmediate_operand" "=f,f,m,d,Q,d,m") + (match_operand:DF 1 "general_operand" "f,m,f,Q,d,dKm,d"))] + "!TARGET_64BIT" + "@ + ldr\\t%0,%1 + ld\\t%0,%1 + std\\t%1,%0 + lm\\t%0,%N0,%1 + stm\\t%1,%N1,%0 + # + #" + [(set_attr "op_type" "RR,RX,RX,RS,RS,NN,NN") + (set_attr "atype" "reg,mem,mem,mem,mem,*,*")]) + +(define_split + [(set (match_operand:DF 0 "nonimmediate_operand" "") + (match_operand:DF 1 "general_operand" ""))] + "!TARGET_64BIT && reload_completed + && !fp_operand (operands[0], VOIDmode) + && !fp_operand (operands[1], VOIDmode) + && !s_operand (operands[0], VOIDmode) + && !s_operand (operands[1], VOIDmode) + && (register_operand (operands[0], VOIDmode) + || register_operand (operands[1], VOIDmode)) + && (!register_operand (operands[0], VOIDmode) + || !reg_overlap_mentioned_p (operand_subword (operands[0], 0, 0, DFmode), + operands[1]) + || !reg_overlap_mentioned_p (operand_subword (operands[0], 1, 0, DFmode), + operands[1]))" + [(set (match_dup 2) (match_dup 4)) + (set (match_dup 3) (match_dup 5))] + " +{ + if (!register_operand (operands[0], VOIDmode) + || !reg_overlap_mentioned_p (operand_subword (operands[0], 0, 0, DFmode), + operands[1])) + { + operands[2] = operand_subword (operands[0], 0, 0, DFmode); + operands[3] = operand_subword (operands[0], 1, 0, DFmode); + operands[4] = operand_subword (operands[1], 0, 0, DFmode); + operands[5] = operand_subword (operands[1], 1, 0, DFmode); + } + else + { + operands[2] = operand_subword (operands[0], 1, 0, DFmode); + operands[3] = operand_subword (operands[0], 0, 0, DFmode); + operands[4] = operand_subword (operands[1], 1, 0, DFmode); + operands[5] = operand_subword (operands[1], 0, 0, DFmode); + } +}") + +(define_split + [(set (match_operand:DF 0 "register_operand" "") + (match_operand:DF 1 "memory_operand" ""))] + "!TARGET_64BIT && reload_completed + && !fp_operand (operands[0], VOIDmode) + && !fp_operand (operands[1], VOIDmode) + && !s_operand (operands[1], VOIDmode)" + [(set (match_dup 2) (match_dup 3)) + (set (match_dup 0) (mem:DI (match_dup 2)))] + "operands[2] = operand_subword (operands[0], 1, 0, DFmode); + operands[3] = legitimize_la_operand (XEXP (operands[1], 0));") + +; +; movsf instruction pattern(s). +; + +(define_expand "movsf" + [(set (match_operand:SF 0 "nonimmediate_operand" "") + (match_operand:SF 1 "general_operand" ""))] + "" + " +{ + /* During and after reload, we need to force constants + to the literal pool ourselves, if necessary. */ + if ((reload_in_progress || reload_completed) + && CONSTANT_P (operands[1])) + operands[1] = force_const_mem (SFmode, operands[1]); +}") + +(define_insn "*movsf_ss" + [(set (match_operand:SF 0 "s_operand" "=Qo") + (match_operand:SF 1 "s_imm_operand" "Qo"))] + "" + "mvc\\t%O0(4,%R0),%1" + [(set_attr "op_type" "SS") + (set_attr "atype" "mem")]) + +(define_insn "*movsf" + [(set (match_operand:SF 0 "nonimmediate_operand" "=f,f,m,d,d,m") + (match_operand:SF 1 "general_operand" "f,m,f,d,m,d"))] + "" + "@ + ler\\t%0,%1 + le\\t%0,%1 + ste\\t%1,%0 + lr\\t%0,%1 + l\\t%0,%1 + st\\t%1,%0" + [(set_attr "op_type" "RR,RX,RX,RR,RX,RX") + (set_attr "atype" "reg,mem,mem,reg,mem,mem")]) + +; +; load_multiple pattern(s). +; + +(define_expand "load_multiple" + [(match_par_dup 3 [(set (match_operand 0 "" "") + (match_operand 1 "" "")) + (use (match_operand 2 "" ""))])] + "" + " +{ + int regno; + int count; + rtx from; + int i, off; + + /* Support only loading a constant number of fixed-point registers from + memory and only bother with this if more than two */ + if (GET_CODE (operands[2]) != CONST_INT + || INTVAL (operands[2]) < 2 + || INTVAL (operands[2]) > 16 + || GET_CODE (operands[1]) != MEM + || GET_CODE (operands[0]) != REG + || REGNO (operands[0]) >= 16) + FAIL; + + count = INTVAL (operands[2]); + regno = REGNO (operands[0]); + + operands[3] = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (count)); + if (no_new_pseudos) + { + if (GET_CODE (XEXP (operands[1], 0)) == REG) + { + from = XEXP (operands[1], 0); + off = 0; + } + else if (GET_CODE (XEXP (operands[1], 0)) == PLUS + && GET_CODE (XEXP (XEXP (operands[1], 0), 0)) == REG + && GET_CODE (XEXP (XEXP (operands[1], 0), 1)) == CONST_INT) + { + from = XEXP (XEXP (operands[1], 0), 0); + off = INTVAL (XEXP (XEXP (operands[1], 0), 1)); + } + else + FAIL; + + if (from == frame_pointer_rtx || from == arg_pointer_rtx) + FAIL; + } + else + { + from = force_reg (Pmode, XEXP (operands[1], 0)); + off = 0; + } + + for (i = 0; i < count; i++) + XVECEXP (operands[3], 0, i) + = gen_rtx_SET (VOIDmode, gen_rtx_REG (Pmode, regno + i), + change_address (operands[1], Pmode, + plus_constant (from, + off + i * UNITS_PER_WORD))); +}") + +(define_insn "*load_multiple_di" + [(match_parallel 0 "load_multiple_operation" + [(set (match_operand:DI 1 "register_operand" "=r") + (match_operand:DI 2 "s_operand" "oQ"))])] + "" + "* +{ + int words = XVECLEN (operands[0], 0); + + if (XVECLEN (operands[0], 0) == 1) + return \"lg\\t%1,0(%2)\"; + + operands[0] = gen_rtx_REG (DImode, REGNO (operands[1]) + words - 1); + return \"lmg\\t%1,%0,%2\"; +}" + [(set_attr "op_type" "RXE") + (set_attr "atype" "mem") + (set_attr "type" "lm")]) + +(define_insn "*load_multiple_si" + [(match_parallel 0 "load_multiple_operation" + [(set (match_operand:SI 1 "register_operand" "=r") + (match_operand:SI 2 "s_operand" "oQ"))])] + "" + "* +{ + int words = XVECLEN (operands[0], 0); + + if (XVECLEN (operands[0], 0) == 1) + return \"l\\t%1,0(%2)\"; + + operands[0] = gen_rtx_REG (SImode, REGNO (operands[1]) + words - 1); + return \"lm\\t%1,%0,%2\"; +}" + [(set_attr "op_type" "RXE") + (set_attr "atype" "mem") + (set_attr "type" "lm")]) + +; +; store multiple pattern(s). +; + +(define_expand "store_multiple" + [(match_par_dup 3 [(set (match_operand 0 "" "") + (match_operand 1 "" "")) + (use (match_operand 2 "" ""))])] + "" + " +{ + int regno; + int count; + rtx to; + int i, off; + + /* Support only storing a constant number of fixed-point registers to + memory and only bother with this if more than two. */ + if (GET_CODE (operands[2]) != CONST_INT + || INTVAL (operands[2]) < 2 + || INTVAL (operands[2]) > 16 + || GET_CODE (operands[0]) != MEM + || GET_CODE (operands[1]) != REG + || REGNO (operands[1]) >= 16) + FAIL; + + count = INTVAL (operands[2]); + regno = REGNO (operands[1]); + + operands[3] = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (count)); + + if (no_new_pseudos) + { + if (GET_CODE (XEXP (operands[0], 0)) == REG) + { + to = XEXP (operands[0], 0); + off = 0; + } + else if (GET_CODE (XEXP (operands[0], 0)) == PLUS + && GET_CODE (XEXP (XEXP (operands[0], 0), 0)) == REG + && GET_CODE (XEXP (XEXP (operands[0], 0), 1)) == CONST_INT) + { + to = XEXP (XEXP (operands[0], 0), 0); + off = INTVAL (XEXP (XEXP (operands[0], 0), 1)); + } + else + FAIL; + + if (to == frame_pointer_rtx || to == arg_pointer_rtx) + FAIL; + } + else + { + to = force_reg (Pmode, XEXP (operands[0], 0)); + off = 0; + } + + for (i = 0; i < count; i++) + XVECEXP (operands[3], 0, i) + = gen_rtx_SET (VOIDmode, + change_address (operands[0], Pmode, + plus_constant (to, + off + i * UNITS_PER_WORD)), + gen_rtx_REG (Pmode, regno + i)); +}") + +(define_insn "*store_multiple_di" + [(match_parallel 0 "store_multiple_operation" + [(set (match_operand:DI 1 "s_operand" "=oQ") + (match_operand:DI 2 "register_operand" "r"))])] + "" + "* +{ + int words = XVECLEN (operands[0], 0); + + if (XVECLEN (operands[0], 0) == 1) + return \"stg\\t%1,0(%2)\"; + + operands[0] = gen_rtx_REG (DImode, REGNO (operands[2]) + words - 1); + return \"stmg\\t%2,%0,%1\"; +}" + [(set_attr "op_type" "RXE") + (set_attr "atype" "mem") + (set_attr "type" "stm")]) + + +(define_insn "*store_multiple_si" + [(match_parallel 0 "store_multiple_operation" + [(set (match_operand:SI 1 "s_operand" "=oQ") + (match_operand:SI 2 "register_operand" "r"))])] + "" + "* +{ + int words = XVECLEN (operands[0], 0); + + if (XVECLEN (operands[0], 0) == 1) + return \"st\\t%1,0(%2)\"; + + operands[0] = gen_rtx_REG (SImode, REGNO (operands[2]) + words - 1); + return \"stm\\t%2,%0,%1\"; +}" + [(set_attr "op_type" "RXE") + (set_attr "atype" "mem") + (set_attr "type" "stm")]) + +;; +;; String instructions. +;; + +; +; movstrdi instruction pattern(s). +; + +(define_expand "movstrdi" + [(set (match_operand:BLK 0 "general_operand" "") + (match_operand:BLK 1 "general_operand" "")) + (use (match_operand:DI 2 "general_operand" "")) + (match_operand 3 "" "")] + "TARGET_64BIT" + " +{ + rtx addr0, addr1; + + addr0 = force_operand (XEXP (operands[0], 0), NULL_RTX); + addr1 = force_operand (XEXP (operands[1], 0), NULL_RTX); + + if (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) <= 256) + { + operands[0] = change_address (operands[0], VOIDmode, addr0); + operands[1] = change_address (operands[1], VOIDmode, addr1); + operands[2] = GEN_INT (INTVAL (operands[2]) - 1); + + emit_insn (gen_movstrdi_short (operands[0], operands[1], operands[2])); + DONE; + } + else + { + if (TARGET_MVCLE) + { + /* implementation suggested by Richard Henderson <rth@cygnus.com> */ + rtx reg0 = gen_reg_rtx (TImode); + rtx reg1 = gen_reg_rtx (TImode); + rtx len = operands[2]; + + if (! CONSTANT_P (len)) + len = force_reg (DImode, len); + + /* Load up the address+length pairs. */ + + emit_move_insn (gen_highpart (DImode, reg0), addr0); + emit_move_insn (gen_lowpart (DImode, reg0), len); + + emit_move_insn (gen_highpart (DImode, reg1), addr1); + emit_move_insn (gen_lowpart (DImode, reg1), len); + + /* MOVE */ + emit_insn (gen_movstrdi_64 (reg0, reg1, reg0, reg1)); + DONE; + } + else + { + rtx label1 = gen_label_rtx (); + rtx label2 = gen_label_rtx (); + rtx reg0, reg1, len, blocks; + + reg0 = gen_reg_rtx (DImode); + reg1 = gen_reg_rtx (DImode); + len = gen_reg_rtx (DImode); + blocks = gen_reg_rtx (DImode); + + emit_move_insn (len, operands[2]); + emit_insn (gen_cmpdi (len, const0_rtx)); + emit_jump_insn (gen_beq (label1)); + emit_move_insn (reg0, addr0); + emit_move_insn (reg1, addr1); + emit_insn (gen_adddi3 (len, len, constm1_rtx)); + emit_insn (gen_ashrdi3 (blocks, len, GEN_INT (8))); + emit_insn (gen_cmpdi (blocks, const0_rtx)); + emit_jump_insn (gen_beq (label2)); + emit_insn (gen_movstrdi_long (reg0, reg1, reg0, reg1, blocks, blocks)); + emit_label (label2); + operands[0] = change_address (operands[0], VOIDmode, reg0); + operands[1] = change_address (operands[1], VOIDmode, reg1); + emit_insn (gen_movstrdi_short (operands[0], operands[1], len)); + emit_label (label1); + DONE; + } + } +}") + +; +; movstrsi instruction pattern(s). +; + +(define_expand "movstrsi" + [(set (match_operand:BLK 0 "general_operand" "") + (match_operand:BLK 1 "general_operand" "")) + (use (match_operand:SI 2 "general_operand" "")) + (match_operand 3 "" "")] + "!TARGET_64BIT" + " +{ + rtx addr0 = force_operand (XEXP (operands[0], 0), NULL_RTX); + rtx addr1 = force_operand (XEXP (operands[1], 0), NULL_RTX); + + if (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) <= 256) + { + operands[0] = change_address (operands[0], VOIDmode, addr0); + operands[1] = change_address (operands[1], VOIDmode, addr1); + operands[2] = GEN_INT (INTVAL (operands[2]) - 1); + + emit_insn (gen_movstrsi_short (operands[0], operands[1], operands[2])); + DONE; + } + else + { + if (TARGET_MVCLE) + { + /* implementation suggested by Richard Henderson <rth@cygnus.com> */ + rtx reg0 = gen_reg_rtx (DImode); + rtx reg1 = gen_reg_rtx (DImode); + rtx len = operands[2]; + + + if (! CONSTANT_P (len)) + len = force_reg (SImode, len); + + /* Load up the address+length pairs. */ + + emit_move_insn (gen_highpart (SImode, reg0), addr0); + emit_move_insn (gen_lowpart (SImode, reg0), len); + + emit_move_insn (gen_highpart (SImode, reg1), addr1); + emit_move_insn (gen_lowpart (SImode, reg1), len); + + /* MOVE */ + emit_insn (gen_movstrsi_31 (reg0, reg1, reg0, reg1)); + DONE; + } + else + { + rtx label1 = gen_label_rtx (); + rtx label2 = gen_label_rtx (); + rtx reg0, reg1, len, blocks; + + reg0 = gen_reg_rtx (SImode); + reg1 = gen_reg_rtx (SImode); + len = gen_reg_rtx (SImode); + blocks = gen_reg_rtx (SImode); + + emit_move_insn (len, operands[2]); + emit_insn (gen_cmpsi (len, const0_rtx)); + emit_jump_insn (gen_beq (label1)); + emit_move_insn (reg0, addr0); + emit_move_insn (reg1, addr1); + emit_insn (gen_addsi3 (len, len, constm1_rtx)); + emit_insn (gen_ashrsi3 (blocks, len, GEN_INT (8))); + emit_insn (gen_cmpsi (blocks, const0_rtx)); + emit_jump_insn (gen_beq (label2)); + emit_insn (gen_movstrsi_long (reg0, reg1, reg0, reg1, blocks, blocks)); + emit_label (label2); + operands[0] = change_address (operands[0], VOIDmode, reg0); + operands[1] = change_address (operands[1], VOIDmode, reg1); + emit_insn (gen_movstrsi_short (operands[0], operands[1], len)); + emit_label (label1); + DONE; + } + } +}") + +; Move a block that is up to 256 bytes in length. +; The block length is taken as (operands[2] % 256) + 1. + +(define_insn "movstrdi_short" + [(set (match_operand:BLK 0 "s_operand" "=oQ,oQ") + (match_operand:BLK 1 "s_operand" "oQ,oQ")) + (use (match_operand:DI 2 "nonmemory_operand" "n,a")) + (clobber (match_scratch:DI 3 "=X,&a"))] + "TARGET_64BIT" + "* +{ + switch (which_alternative) + { + case 0: + return \"mvc\\t%O0(%b2+1,%R0),%1\"; + + case 1: + output_asm_insn (\"bras\\t%3,.+10\", operands); + output_asm_insn (\"mvc\\t%O0(1,%R0),%1\", operands); + return \"ex\\t%2,0(%3)\"; + + default: + abort (); + } +}" + [(set_attr "op_type" "SS,NN") + (set_attr "atype" "mem,mem") + (set_attr "length" "*,14")]) + +(define_insn "movstrsi_short" + [(set (match_operand:BLK 0 "s_operand" "=oQ,oQ") + (match_operand:BLK 1 "s_operand" "oQ,oQ")) + (use (match_operand:SI 2 "nonmemory_operand" "n,a")) + (clobber (match_scratch:SI 3 "=X,&a"))] + "!TARGET_64BIT" + "* +{ + switch (which_alternative) + { + case 0: + return \"mvc\\t%O0(%b2+1,%R0),%1\"; + + case 1: + output_asm_insn (\"bras\\t%3,.+10\", operands); + output_asm_insn (\"mvc\\t%O0(1,%R0),%1\", operands); + return \"ex\\t%2,0(%3)\"; + + default: + abort (); + } +}" + [(set_attr "op_type" "SS,NN") + (set_attr "atype" "mem,mem") + (set_attr "length" "*,14")]) + +; Move a block that is a multiple of 256 bytes in length + +(define_insn "movstrdi_long" + [(set (match_operand:DI 4 "register_operand" "=d") + (const_int 0)) + (set (match_operand:DI 0 "register_operand" "=a") + (plus:DI (match_operand:DI 2 "register_operand" "0") + (ashift:DI (match_operand:DI 5 "register_operand" "4") + (const_int 8)))) + (set (match_operand:DI 1 "register_operand" "=a") + (plus:DI (match_operand:DI 3 "register_operand" "1") + (ashift:DI (match_dup 5) (const_int 8)))) + (set (mem:BLK (match_dup 2)) + (mem:BLK (match_dup 3))) + (use (match_dup 5))] + "TARGET_64BIT" + "* +{ + output_asm_insn (\"mvc\\t0(256,%0),0(%1)\", operands); + output_asm_insn (\"la\\t%0,256(%0)\", operands); + output_asm_insn (\"la\\t%1,256(%1)\", operands); + return \"brct\\t%4,.-14\"; +}" + [(set_attr "op_type" "NN") + (set_attr "atype" "mem") + (set_attr "length" "18")]) + +(define_insn "movstrsi_long" + [(set (match_operand:SI 4 "register_operand" "=d") + (const_int 0)) + (set (match_operand:SI 0 "register_operand" "=a") + (plus:SI (match_operand:SI 2 "register_operand" "0") + (ashift:SI (match_operand:SI 5 "register_operand" "4") + (const_int 8)))) + (set (match_operand:SI 1 "register_operand" "=a") + (plus:SI (match_operand:SI 3 "register_operand" "1") + (ashift:SI (match_dup 5) (const_int 8)))) + (set (mem:BLK (match_dup 2)) + (mem:BLK (match_dup 3))) + (use (match_dup 5))] + "!TARGET_64BIT" + "* +{ + output_asm_insn (\"mvc\\t0(256,%0),0(%1)\", operands); + output_asm_insn (\"la\\t%0,256(%0)\", operands); + output_asm_insn (\"la\\t%1,256(%1)\", operands); + return \"brct\\t%4,.-14\"; +}" + [(set_attr "op_type" "NN") + (set_attr "atype" "mem") + (set_attr "length" "18")]) + +; Move a block that is larger than 255 bytes in length. + +(define_insn "movstrdi_64" + [(set (match_operand:TI 0 "register_operand" "=d") + (ashift:TI (plus:TI (match_operand:TI 2 "register_operand" "0") + (lshiftrt:TI (match_dup 2) (const_int 64))) + (const_int 64))) + (set (match_operand:TI 1 "register_operand" "=d") + (ashift:TI (plus:TI (match_operand:TI 3 "register_operand" "1") + (lshiftrt:TI (match_dup 3) (const_int 64))) + (const_int 64))) + (set (mem:BLK (subreg:DI (match_dup 2) 0)) + (mem:BLK (subreg:DI (match_dup 3) 0))) + (clobber (reg:CC 33))] + "TARGET_64BIT" + "mvcle\\t%0,%1,0\;jo\\t.-4" + [(set_attr "op_type" "NN") + (set_attr "atype" "mem") + (set_attr "length" "8")]) + +(define_insn "movstrsi_31" + [(set (match_operand:DI 0 "register_operand" "=d") + (ashift:DI (plus:DI (match_operand:DI 2 "register_operand" "0") + (lshiftrt:DI (match_dup 2) (const_int 32))) + (const_int 32))) + (set (match_operand:DI 1 "register_operand" "=d") + (ashift:DI (plus:DI (match_operand:DI 3 "register_operand" "1") + (lshiftrt:DI (match_dup 3) (const_int 32))) + (const_int 32))) + (set (mem:BLK (subreg:SI (match_dup 2) 0)) + (mem:BLK (subreg:SI (match_dup 3) 0))) + (clobber (reg:CC 33))] + "!TARGET_64BIT" + "mvcle\\t%0,%1,0\;jo\\t.-4" + [(set_attr "op_type" "NN") + (set_attr "atype" "mem") + (set_attr "length" "8")]) + +; +; clrstrdi instruction pattern(s). +; + +(define_expand "clrstrdi" + [(set (match_operand:BLK 0 "general_operand" "") + (const_int 0)) + (use (match_operand:DI 1 "general_operand" "")) + (match_operand 2 "" "")] + "TARGET_64BIT" + " +{ + rtx addr = force_operand (XEXP (operands[0], 0), NULL_RTX); + + operands[0] = change_address (operands[0], VOIDmode, addr); + + if (GET_CODE (operands[1]) == CONST_INT && INTVAL (operands[1]) < 256) + { + emit_insn (gen_clrstrsico (operands[0], operands[1])); + DONE; + } + else + { + rtx reg0 = gen_reg_rtx (TImode); + rtx reg1 = gen_reg_rtx (TImode); + rtx len = operands[1]; + + if (! CONSTANT_P (len)) + len = force_reg (DImode, len); + + /* Load up the address+length pairs. */ + + emit_move_insn (gen_highpart (DImode, reg0), addr); + emit_move_insn (gen_lowpart (DImode, reg0), len); + + emit_move_insn (gen_lowpart (DImode, reg1), const0_rtx); + + /* Clear! */ + emit_insn (gen_clrstrsi_64 (reg0, reg1, reg0)); + DONE; + } +}") + +; +; clrstrsi instruction pattern(s). +; + +(define_expand "clrstrsi" + [(set (match_operand:BLK 0 "general_operand" "") + (const_int 0)) + (use (match_operand:SI 1 "general_operand" "")) + (match_operand 2 "" "")] + "!TARGET_64BIT" + " +{ + rtx addr = force_operand (XEXP (operands[0], 0), NULL_RTX); + + operands[0] = change_address (operands[0], VOIDmode, addr); + + if (GET_CODE (operands[1]) == CONST_INT && INTVAL (operands[1]) < 256) + { + emit_insn (gen_clrstrsico (operands[0], operands[1])); + DONE; + } + else + { + rtx reg0 = gen_reg_rtx (DImode); + rtx reg1 = gen_reg_rtx (DImode); + rtx len = operands[1]; + + if (! CONSTANT_P (len)) + len = force_reg (SImode, len); + + /* Load up the address+length pairs. */ + + emit_move_insn (gen_highpart (SImode, reg0), addr); + emit_move_insn (gen_lowpart (SImode, reg0), len); + + emit_move_insn (gen_lowpart (SImode, reg1), const0_rtx); + + /* CLear! */ + emit_insn (gen_clrstrsi_31 (reg0, reg1, reg0)); + DONE; + } +}") + +; Clear memory with length less than 256 bytes + +(define_insn "clrstrsico" + [(set (match_operand:BLK 0 "s_operand" "=Qo") + (const_int 0)) + (use (match_operand 1 "immediate_operand" "I")) + (clobber (reg:CC 33))] + "" + "xc\\t%O0(%1,%R0),%0" + [(set_attr "op_type" "RS") + (set_attr "type" "cs") + (set_attr "atype" "mem")]) + +; Clear memory with length greater 256 bytes or lenght not constant + +(define_insn "clrstrsi_64" + [(set (match_operand:TI 0 "register_operand" "=d") + (ashift:TI (plus:TI (match_operand:TI 2 "register_operand" "0") + (lshiftrt:TI (match_dup 2) (const_int 64))) + (const_int 64))) + (set (mem:BLK (subreg:DI (match_dup 2) 0)) + (const_int 0)) + (use (match_operand:TI 1 "register_operand" "d")) + (clobber (reg:CC 33))] + "TARGET_64BIT" + "mvcle\\t%0,%1,0\;jo\\t.-4" + [(set_attr "op_type" "NN") + (set_attr "atype" "mem") + (set_attr "type" "vs") + (set_attr "length" "8")]) + +(define_insn "clrstrsi_31" + [(set (match_operand:DI 0 "register_operand" "=d") + (ashift:DI (plus:DI (match_operand:DI 2 "register_operand" "0") + (lshiftrt:DI (match_dup 2) (const_int 32))) + (const_int 32))) + (set (mem:BLK (subreg:SI (match_dup 2) 0)) + (const_int 0)) + (use (match_operand:DI 1 "register_operand" "d")) + (clobber (reg:CC 33))] + "!TARGET_64BIT" + "mvcle\\t%0,%1,0\;jo\\t.-4" + [(set_attr "op_type" "NN") + (set_attr "atype" "mem") + (set_attr "type" "vs") + (set_attr "length" "8")]) + +; +; cmpstrdi instruction pattern(s). +; + +(define_expand "cmpstrdi" + [(set (match_operand:DI 0 "register_operand" "") + (compare:DI (match_operand:BLK 1 "s_operand" "") + (match_operand:BLK 2 "s_operand" "") ) ) + (use (match_operand:DI 3 "general_operand" "")) + (use (match_operand:DI 4 "" ""))] + "TARGET_64BIT" + " +{ + rtx addr0, addr1; + + /* for pre/post increment */ + operands[1] = protect_from_queue (operands[1], 0); + operands[2] = protect_from_queue (operands[2], 0); + operands[3] = protect_from_queue (operands[3], 0); + + addr0 = force_operand (XEXP (operands[1], 0), NULL_RTX); + addr1 = force_operand (XEXP (operands[2], 0), NULL_RTX); + + if (GET_CODE (operands[3]) == CONST_INT && INTVAL (operands[3]) < 256) + { + if (INTVAL (operands[3]) == 0) { + emit_move_insn (operands[0], operands[3]); + DONE; + } + + operands[1] = change_address (operands[1], VOIDmode, addr0); + operands[2] = change_address (operands[2], VOIDmode, addr1); + + emit_insn (gen_cmpstr_const (operands[1], operands[2], operands[3])); + emit_insn (gen_cmpint_di (operands[0])); + DONE; + } + else + { + /* implementation suggested by Richard Henderson <rth@cygnus.com> */ + rtx reg0 = gen_reg_rtx (TImode); + rtx reg1 = gen_reg_rtx (TImode); + rtx len = operands[3]; + + if (! CONSTANT_P (len)) + len = force_reg (DImode, len); + + /* Load up the address+length pairs. */ + emit_move_insn (gen_highpart (DImode, reg0), addr0); + emit_move_insn (gen_lowpart (DImode, reg0), len); + + emit_move_insn (gen_highpart (DImode, reg1), addr1); + emit_move_insn (gen_lowpart (DImode, reg1), len); + + /* Compare! */ + emit_insn (gen_cmpstr_64 (reg0, reg1, reg0, reg1)); + emit_insn (gen_cmpint_di (operands[0])); + DONE; + } +}") + +; +; cmpstrsi instruction pattern(s). +; + +(define_expand "cmpstrsi" + [(set (match_operand:SI 0 "register_operand" "") + (compare:SI (match_operand:BLK 1 "s_operand" "") + (match_operand:BLK 2 "s_operand" "") ) ) + (use (match_operand:SI 3 "general_operand" "")) + (use (match_operand:SI 4 "" ""))] + "" + " +{ + rtx addr0, addr1; + + /* for pre/post increment */ + operands[1] = protect_from_queue (operands[1], 0); + operands[2] = protect_from_queue (operands[2], 0); + operands[3] = protect_from_queue (operands[3], 0); + + addr0 = force_operand (XEXP (operands[1], 0), NULL_RTX); + addr1 = force_operand (XEXP (operands[2], 0), NULL_RTX); + + if (GET_CODE (operands[3]) == CONST_INT && INTVAL (operands[3]) < 256) + { + if (INTVAL (operands[3]) == 0) { + emit_move_insn (operands[0], operands[3]); + DONE; + } + + operands[1] = change_address (operands[1], VOIDmode, addr0); + operands[2] = change_address (operands[2], VOIDmode, addr1); + + emit_insn (gen_cmpstr_const (operands[1], operands[2], operands[3])); + emit_insn (gen_cmpint_si (operands[0])); + DONE; + } + else + { + /* implementation suggested by Richard Henderson <rth@cygnus.com> */ + rtx reg0, reg1; + rtx len = operands[3]; + + if (TARGET_64BIT) + { + reg0 = gen_reg_rtx (TImode); + reg1 = gen_reg_rtx (TImode); + } + else + { + reg0 = gen_reg_rtx (DImode); + reg1 = gen_reg_rtx (DImode); + } + + /* Load up the address+length pairs. */ + emit_move_insn (gen_highpart (Pmode, reg0), addr0); + convert_move (gen_lowpart (Pmode, reg0), len, 1); + + emit_move_insn (gen_highpart (Pmode, reg1), addr1); + convert_move (gen_lowpart (Pmode, reg1), len, 1); + + /* Compare! */ + if (TARGET_64BIT) + emit_insn (gen_cmpstr_64 (reg0, reg1, reg0, reg1)); + else + emit_insn (gen_cmpstr_31 (reg0, reg1, reg0, reg1)); + + emit_insn (gen_cmpint_si (operands[0])); + DONE; + } +}") + +; Compare a block that is less than 256 bytes in length. + +(define_insn "cmpstr_const" + [(set (reg:CCS 33) + (compare:CCS (match_operand:BLK 0 "s_operand" "oQ") + (match_operand:BLK 1 "s_operand" "oQ"))) + (use (match_operand 2 "immediate_operand" "I"))] + "(unsigned) INTVAL (operands[2]) < 256" + "clc\\t%O0(%c2,%R0),%1" + [(set_attr "op_type" "SS") + (set_attr "atype" "mem") + (set_attr "type" "cs")]) + +; Compare a block that is larger than 255 bytes in length. + +(define_insn "cmpstr_64" + [(clobber (match_operand:TI 0 "register_operand" "=d")) + (clobber (match_operand:TI 1 "register_operand" "=d")) + (set (reg:CCS 33) + (compare:CCS (mem:BLK (subreg:DI (match_operand:TI 2 "register_operand" "0") 0)) + (mem:BLK (subreg:DI (match_operand:TI 3 "register_operand" "1") 0))))] + "TARGET_64BIT" + "clcl\\t%0,%1" + [(set_attr "op_type" "RR") + (set_attr "atype" "mem") + (set_attr "type" "vs")]) + +(define_insn "cmpstr_31" + [(clobber (match_operand:DI 0 "register_operand" "=d")) + (clobber (match_operand:DI 1 "register_operand" "=d")) + (set (reg:CCS 33) + (compare:CCS (mem:BLK (subreg:SI (match_operand:DI 2 "register_operand" "0") 0)) + (mem:BLK (subreg:SI (match_operand:DI 3 "register_operand" "1") 0))))] + "!TARGET_64BIT" + "clcl\\t%0,%1" + [(set_attr "op_type" "RR") + (set_attr "atype" "mem") + (set_attr "type" "vs")]) + +; Convert condition code to integer in range (-1, 0, 1) + +(define_insn "cmpint_si" + [(set (match_operand:SI 0 "register_operand" "=d") + (compare:SI (reg:CCS 33) (const_int 0)))] + "" + "* +{ + output_asm_insn (\"lhi\\t%0,1\", operands); + output_asm_insn (\"jh\\t.+12\", operands); + output_asm_insn (\"jl\\t.+6\", operands); + output_asm_insn (\"sr\\t%0,%0\", operands); + return \"lcr\\t%0,%0\"; +}" + [(set_attr "op_type" "NN") + (set_attr "length" "16") + (set_attr "atype" "reg") + (set_attr "type" "other")]) + +(define_insn "cmpint_di" + [(set (match_operand:DI 0 "register_operand" "=d") + (compare:DI (reg:CCS 33) (const_int 0)))] + "TARGET_64BIT" + "* +{ + output_asm_insn (\"lghi\\t%0,1\", operands); + output_asm_insn (\"jh\\t.+12\", operands); + output_asm_insn (\"jl\\t.+6\", operands); + output_asm_insn (\"sgr\\t%0,%0\", operands); + return \"lcgr\\t%0,%0\"; +}" + [(set_attr "op_type" "NN") + (set_attr "length" "22") + (set_attr "atype" "reg") + (set_attr "type" "other")]) + + +;; +;;- Conversion instructions. +;; + +(define_insn "*sethighqisi" + [(set (match_operand:SI 0 "register_operand" "=d") + (unspec:SI [(match_operand:QI 1 "s_operand" "Qo")] 10)) + (clobber (reg:CC 33))] + "" + "icm\\t%0,8,%1" + [(set_attr "op_type" "RS") + (set_attr "atype" "mem")]) + +(define_insn "*sethighhisi" + [(set (match_operand:SI 0 "register_operand" "=d") + (unspec:SI [(match_operand:HI 1 "s_operand" "Qo")] 10)) + (clobber (reg:CC 33))] + "" + "icm\\t%0,12,%1" + [(set_attr "op_type" "RS") + (set_attr "atype" "mem")]) + +(define_insn "*sethighqidi_64" + [(set (match_operand:DI 0 "register_operand" "=d") + (unspec:DI [(match_operand:QI 1 "s_operand" "Qo")] 10)) + (clobber (reg:CC 33))] + "TARGET_64BIT" + "icmh\\t%0,8,%1" + [(set_attr "op_type" "RSE") + (set_attr "atype" "mem")]) + +(define_insn "*sethighqidi_31" + [(set (match_operand:DI 0 "register_operand" "=d") + (unspec:DI [(match_operand:QI 1 "s_operand" "Qo")] 10)) + (clobber (reg:CC 33))] + "!TARGET_64BIT" + "icm\\t%0,8,%1" + [(set_attr "op_type" "RS") + (set_attr "atype" "mem")]) + +(define_split + [(set (match_operand:SI 0 "register_operand" "") + (zero_extract:SI (match_operand:QI 1 "s_operand" "") + (match_operand 2 "const_int_operand" "") + (const_int 0)))] + "!TARGET_64BIT && !reload_completed + && INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 8" + [(parallel + [(set (match_dup 0) (unspec:SI [(match_dup 1)] 10)) + (clobber (reg:CC 33))]) + (set (match_dup 0) (lshiftrt:SI (match_dup 0) (match_dup 2)))] + " +{ + operands[2] = GEN_INT (32 - INTVAL (operands[2])); + operands[1] = change_address (operands[1], QImode, 0); +}") + +(define_split + [(set (match_operand:SI 0 "register_operand" "") + (zero_extract:SI (match_operand:QI 1 "s_operand" "") + (match_operand 2 "const_int_operand" "") + (const_int 0)))] + "!TARGET_64BIT && !reload_completed + && INTVAL (operands[2]) >= 8 && INTVAL (operands[2]) < 16" + [(parallel + [(set (match_dup 0) (unspec:SI [(match_dup 1)] 10)) + (clobber (reg:CC 33))]) + (set (match_dup 0) (lshiftrt:SI (match_dup 0) (match_dup 2)))] + " +{ + operands[2] = GEN_INT (32 - INTVAL (operands[2])); + operands[1] = change_address (operands[1], HImode, 0); +}") + +; +; extendsidi2 instruction pattern(s). +; + +(define_expand "extendsidi2" + [(set (match_operand:DI 0 "register_operand" "") + (sign_extend:DI (match_operand:SI 1 "nonimmediate_operand" "")))] + "" + " +{ + if (!TARGET_64BIT) + { + emit_insn (gen_rtx_CLOBBER (VOIDmode, operands[0])); + emit_move_insn (gen_highpart (SImode, operands[0]), operands[1]); + emit_move_insn (gen_lowpart (SImode, operands[0]), const0_rtx); + emit_insn (gen_ashrdi3 (operands[0], operands[0], GEN_INT (32))); + DONE; + } +} +") + +(define_insn "*extendsidi2" + [(set (match_operand:DI 0 "register_operand" "=d,d") + (sign_extend:DI (match_operand:SI 1 "nonimmediate_operand" "d,m")))] + "TARGET_64BIT" + "@ + lgfr\\t%0,%1 + lgf\\t%0,%1" + [(set_attr "op_type" "RRE,RXE") + (set_attr "atype" "reg,mem")]) + +; +; extendhidi2 instruction pattern(s). +; + +(define_expand "extendhidi2" + [(set (match_operand:DI 0 "register_operand" "") + (sign_extend:DI (match_operand:HI 1 "register_operand" "")))] + "" + " +{ + if (!TARGET_64BIT) + { + rtx tmp = gen_reg_rtx (SImode); + emit_insn (gen_extendhisi2 (tmp, operands[1])); + emit_insn (gen_extendsidi2 (operands[0], tmp)); + DONE; + } + else + { + operands[1] = gen_lowpart (DImode, operands[1]); + emit_insn (gen_ashldi3 (operands[0], operands[1], GEN_INT (48))); + emit_insn (gen_ashrdi3 (operands[0], operands[0], GEN_INT (48))); + DONE; + } +} +") + +(define_insn "*extendhidi2" + [(set (match_operand:DI 0 "register_operand" "=d") + (sign_extend:DI (match_operand:HI 1 "memory_operand" "m")))] + "TARGET_64BIT" + "lgh\\t%0,%1" + [(set_attr "op_type" "RXE") + (set_attr "atype" "mem")]) + +; +; extendqidi2 instruction pattern(s). +; + +(define_expand "extendqidi2" + [(set (match_operand:DI 0 "register_operand" "") + (sign_extend:DI (match_operand:QI 1 "register_operand" "")))] + "" + " +{ + if (!TARGET_64BIT) + { + rtx tmp = gen_reg_rtx (SImode); + emit_insn (gen_extendqisi2 (tmp, operands[1])); + emit_insn (gen_extendsidi2 (operands[0], tmp)); + DONE; + } + else + { + operands[1] = gen_lowpart (DImode, operands[1]); + emit_insn (gen_ashldi3 (operands[0], operands[1], GEN_INT (56))); + emit_insn (gen_ashrdi3 (operands[0], operands[0], GEN_INT (56))); + DONE; + } +} +") + +(define_split + [(set (match_operand:DI 0 "register_operand" "") + (sign_extend:DI (match_operand:QI 1 "s_operand" "")))] + "TARGET_64BIT && !reload_completed" + [(parallel + [(set (match_dup 0) (unspec:DI [(match_dup 1)] 10)) + (clobber (reg:CC 33))]) + (parallel + [(set (match_dup 0) (ashiftrt:DI (match_dup 0) (const_int 56))) + (clobber (reg:CC 33))])] + "") + +; +; extendhisi2 instruction pattern(s). +; + +(define_expand "extendhisi2" + [(set (match_operand:SI 0 "register_operand" "") + (sign_extend:SI (match_operand:HI 1 "register_operand" "")))] + "" + " +{ + operands[1] = gen_lowpart (SImode, operands[1]); + emit_insn (gen_ashlsi3 (operands[0], operands[1], GEN_INT (16))); + emit_insn (gen_ashrsi3 (operands[0], operands[0], GEN_INT (16))); + DONE; +} +") + +(define_insn "*extendhisi2" + [(set (match_operand:SI 0 "register_operand" "=d") + (sign_extend:SI (match_operand:HI 1 "memory_operand" "m")))] + "" + "lh\\t%0,%1" + [(set_attr "op_type" "RX") + (set_attr "atype" "mem")]) + +; +; extendqisi2 instruction pattern(s). +; + +(define_expand "extendqisi2" + [(set (match_operand:SI 0 "register_operand" "") + (sign_extend:SI (match_operand:QI 1 "register_operand" "")))] + "" + " +{ + operands[1] = gen_lowpart (SImode, operands[1]); + emit_insn (gen_ashlsi3 (operands[0], operands[1], GEN_INT (24))); + emit_insn (gen_ashrsi3 (operands[0], operands[0], GEN_INT (24))); + DONE; +} +") + +(define_split + [(set (match_operand:SI 0 "register_operand" "") + (sign_extend:SI (match_operand:QI 1 "s_operand" "")))] + "!reload_completed" + [(parallel + [(set (match_dup 0) (unspec:SI [(match_dup 1)] 10)) + (clobber (reg:CC 33))]) + (parallel + [(set (match_dup 0) (ashiftrt:SI (match_dup 0) (const_int 24))) + (clobber (reg:CC 33))])] + "") + +; +; extendqihi2 instruction pattern(s). +; + + +; +; zero_extendsidi2 instruction pattern(s). +; + +(define_expand "zero_extendsidi2" + [(set (match_operand:DI 0 "register_operand" "") + (zero_extend:DI (match_operand:SI 1 "nonimmediate_operand" "")))] + "" + " +{ + if (!TARGET_64BIT) + { + emit_insn (gen_rtx_CLOBBER (VOIDmode, operands[0])); + emit_move_insn (gen_lowpart (SImode, operands[0]), operands[1]); + emit_move_insn (gen_highpart (SImode, operands[0]), const0_rtx); + DONE; + } +} +") + +(define_insn "*zero_extendsidi2" + [(set (match_operand:DI 0 "register_operand" "=d,d") + (zero_extend:DI (match_operand:SI 1 "nonimmediate_operand" "d,m")))] + "TARGET_64BIT" + "@ + llgfr\\t%0,%1 + llgf\\t%0,%1" + [(set_attr "op_type" "RRE,RXE") + (set_attr "atype" "reg,mem")]) + +; +; zero_extendhidi2 instruction pattern(s). +; + +(define_expand "zero_extendhidi2" + [(set (match_operand:DI 0 "register_operand" "") + (zero_extend:DI (match_operand:HI 1 "register_operand" "")))] + "" + " +{ + if (!TARGET_64BIT) + { + rtx tmp = gen_reg_rtx (SImode); + emit_insn (gen_zero_extendhisi2 (tmp, operands[1])); + emit_insn (gen_zero_extendsidi2 (operands[0], tmp)); + DONE; + } + else + { + operands[1] = gen_lowpart (DImode, operands[1]); + emit_insn (gen_ashldi3 (operands[0], operands[1], GEN_INT (48))); + emit_insn (gen_lshrdi3 (operands[0], operands[0], GEN_INT (48))); + DONE; + } +} +") + +(define_insn "*zero_extendhidi2" + [(set (match_operand:DI 0 "register_operand" "=d") + (zero_extend:DI (match_operand:HI 1 "memory_operand" "m")))] + "TARGET_64BIT" + "llgh\\t%0,%1" + [(set_attr "op_type" "RXE") + (set_attr "atype" "mem")]) + +; +; zero_extendqidi2 instruction pattern(s) +; + +(define_expand "zero_extendqidi2" + [(set (match_operand:DI 0 "register_operand" "") + (zero_extend:DI (match_operand:QI 1 "register_operand" "")))] + "" + " +{ + if (!TARGET_64BIT) + { + rtx tmp = gen_reg_rtx (SImode); + emit_insn (gen_zero_extendqisi2 (tmp, operands[1])); + emit_insn (gen_zero_extendsidi2 (operands[0], tmp)); + DONE; + } + else + { + operands[1] = gen_lowpart (DImode, operands[1]); + emit_insn (gen_ashldi3 (operands[0], operands[1], GEN_INT (56))); + emit_insn (gen_lshrdi3 (operands[0], operands[0], GEN_INT (56))); + DONE; + } +} +") + +(define_insn "*zero_extendqidi2" + [(set (match_operand:DI 0 "register_operand" "=d") + (zero_extend:DI (match_operand:QI 1 "memory_operand" "m")))] + "TARGET_64BIT" + "llgc\\t%0,%1" + [(set_attr "op_type" "RXE") + (set_attr "atype" "mem")]) + +; +; zero_extendhisi2 instruction pattern(s). +; + +(define_expand "zero_extendhisi2" + [(set (match_operand:SI 0 "register_operand" "") + (zero_extend:SI (match_operand:HI 1 "register_operand" "")))] + "" + " +{ + operands[1] = gen_lowpart (SImode, operands[1]); + emit_insn (gen_andsi3 (operands[0], operands[1], GEN_INT (0xffff))); + DONE; +} +") + +(define_insn "*zero_extendhisi2_64" + [(set (match_operand:SI 0 "register_operand" "=d") + (zero_extend:SI (match_operand:HI 1 "memory_operand" "m")))] + "TARGET_64BIT" + "llgh\\t%0,%1" + [(set_attr "op_type" "RXE") + (set_attr "atype" "mem")]) + +; +; zero_extendqisi2 instruction pattern(s). +; + +(define_expand "zero_extendqisi2" + [(set (match_operand:SI 0 "register_operand" "") + (zero_extend:SI (match_operand:QI 1 "register_operand" "")))] + "" + " +{ + operands[1] = gen_lowpart (SImode, operands[1]); + emit_insn (gen_andsi3 (operands[0], operands[1], GEN_INT (0xff))); + DONE; +} +") + +(define_insn "*zero_extendqisi2_64" + [(set (match_operand:SI 0 "register_operand" "=d") + (zero_extend:SI (match_operand:QI 1 "memory_operand" "m")))] + "TARGET_64BIT" + "llgc\\t%0,%1" + [(set_attr "op_type" "RXE") + (set_attr "atype" "mem")]) + +; +; zero_extendqihi2 instruction pattern(s). +; + +(define_expand "zero_extendqihi2" + [(set (match_operand:HI 0 "register_operand" "") + (zero_extend:HI (match_operand:QI 1 "register_operand" "")))] + "TARGET_64BIT" + " +{ + operands[1] = gen_lowpart (HImode, operands[1]); + emit_insn (gen_andhi3 (operands[0], operands[1], GEN_INT (0xff))); + DONE; +} +") + +(define_insn "*zero_extendqihi2_64" + [(set (match_operand:HI 0 "register_operand" "=d") + (zero_extend:HI (match_operand:QI 1 "memory_operand" "m"))) + (clobber (reg:CC 33))] + "TARGET_64BIT" + "llgc\\t%0,%1" + [(set_attr "op_type" "RXE") + (set_attr "atype" "mem")]) + +; +; fixuns_truncdfdi2 and fix_truncdfsi2 instruction pattern(s). +; + +(define_expand "fixuns_truncdfdi2" + [(set (match_operand:DI 0 "register_operand" "") + (unsigned_fix:DI (match_operand:DF 1 "register_operand" "")))] + "TARGET_64BIT && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" + " +{ + rtx label1 = gen_label_rtx (); + rtx label2 = gen_label_rtx (); + rtx temp = gen_reg_rtx (DFmode); + operands[1] = force_reg (DFmode, operands[1]); + + emit_insn (gen_cmpdf (operands[1], + CONST_DOUBLE_FROM_REAL_VALUE ( + REAL_VALUE_ATOF (\"9223372036854775808.0\", DFmode), DFmode))); + emit_jump_insn (gen_blt (label1)); + emit_insn (gen_subdf3 (temp, operands[1], + CONST_DOUBLE_FROM_REAL_VALUE ( + REAL_VALUE_ATOF (\"18446744073709551616.0\", DFmode), DFmode))); + emit_insn (gen_fix_truncdfdi2_ieee (operands[0], temp, GEN_INT(7))); + emit_jump (label2); + + emit_label (label1); + emit_insn (gen_fix_truncdfdi2_ieee (operands[0], operands[1], GEN_INT(5))); + emit_label (label2); + DONE; +}") + +(define_expand "fix_truncdfdi2" + [(set (match_operand:DI 0 "register_operand" "") + (fix:DI (match_operand:DF 1 "nonimmediate_operand" "")))] + "TARGET_64BIT && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" + " +{ + operands[1] = force_reg (DFmode, operands[1]); + emit_insn (gen_fix_truncdfdi2_ieee (operands[0], operands[1], GEN_INT(5))); + DONE; +}") + +(define_insn "fix_truncdfdi2_ieee" + [(set (match_operand:DI 0 "register_operand" "=d") + (fix:DI (match_operand:DF 1 "register_operand" "f"))) + (unspec:DI [(match_operand:DI 2 "immediate_operand" "K")] 1) + (clobber (reg:CC 33))] + "TARGET_64BIT && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" + "cgdbr\\t%0,%h2,%1" + [(set_attr "op_type" "RRE") + (set_attr "type" "other")]) + +; +; fixuns_truncdfsi2 and fix_truncdfsi2 instruction pattern(s). +; + +(define_expand "fixuns_truncdfsi2" + [(set (match_operand:SI 0 "register_operand" "") + (unsigned_fix:SI (match_operand:DF 1 "register_operand" "")))] + "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" + " +{ + rtx label1 = gen_label_rtx (); + rtx label2 = gen_label_rtx (); + rtx temp = gen_reg_rtx (DFmode); + + operands[1] = force_reg (DFmode,operands[1]); + emit_insn (gen_cmpdf (operands[1], + CONST_DOUBLE_FROM_REAL_VALUE ( + REAL_VALUE_ATOF (\"2147483648.0\", DFmode), DFmode))); + emit_jump_insn (gen_blt (label1)); + emit_insn (gen_subdf3 (temp, operands[1], + CONST_DOUBLE_FROM_REAL_VALUE ( + REAL_VALUE_ATOF (\"4294967296.0\", DFmode), DFmode))); + emit_insn (gen_fix_truncdfsi2_ieee (operands[0], temp, GEN_INT (7))); + emit_jump (label2); + + emit_label (label1); + emit_insn (gen_fix_truncdfsi2_ieee (operands[0], operands[1], GEN_INT (5))); + emit_label (label2); + DONE; +}") + +(define_expand "fix_truncdfsi2" + [(set (match_operand:SI 0 "register_operand" "") + (fix:SI (match_operand:DF 1 "nonimmediate_operand" "")))] + "TARGET_HARD_FLOAT" + " +{ + if (TARGET_IBM_FLOAT) + { + /* This is the algorithm from POP chapter A.5.7.2. */ + + rtx temp = assign_stack_local (BLKmode, 2 * UNITS_PER_WORD, BITS_PER_WORD); + rtx two31r = s390_gen_rtx_const_DI (0x4f000000, 0x08000000); + rtx two32 = s390_gen_rtx_const_DI (0x4e000001, 0x00000000); + + operands[1] = force_reg (DFmode, operands[1]); + emit_insn (gen_fix_truncdfsi2_ibm (operands[0], operands[1], + two31r, two32, temp)); + } + else + { + operands[1] = force_reg (DFmode, operands[1]); + emit_insn (gen_fix_truncdfsi2_ieee (operands[0], operands[1], GEN_INT (5))); + } + + DONE; +}") + +(define_insn "fix_truncdfsi2_ieee" + [(set (match_operand:SI 0 "register_operand" "=d") + (fix:SI (match_operand:DF 1 "register_operand" "f"))) + (unspec:SI [(match_operand:SI 2 "immediate_operand" "K")] 1) + (clobber (reg:CC 33))] + "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" + "cfdbr\\t%0,%h2,%1" + [(set_attr "op_type" "RRE") + (set_attr "type" "other" )]) + +(define_insn "fix_truncdfsi2_ibm" + [(set (match_operand:SI 0 "register_operand" "=d") + (fix:SI (match_operand:DF 1 "nonimmediate_operand" "+f"))) + (use (match_operand:DI 2 "immediate_operand" "m")) + (use (match_operand:DI 3 "immediate_operand" "m")) + (use (match_operand:BLK 4 "memory_operand" "m")) + (clobber (reg:CC 33))] + "TARGET_HARD_FLOAT && TARGET_IBM_FLOAT" + "* +{ + output_asm_insn (\"sd\\t%1,%2\", operands); + output_asm_insn (\"aw\\t%1,%3\", operands); + output_asm_insn (\"std\\t%1,%4\", operands); + output_asm_insn (\"xi\\t%N4,128\", operands); + return \"l\\t%0,%N4\"; +}" + [(set_attr "op_type" "NN") + (set_attr "type" "other") + (set_attr "length" "20")]) + +; +; fixuns_truncsfdi2 and fix_truncsfdi2 instruction pattern(s). +; + +(define_expand "fixuns_truncsfdi2" + [(set (match_operand:DI 0 "register_operand" "") + (unsigned_fix:DI (match_operand:SF 1 "register_operand" "")))] + "TARGET_64BIT && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" + " +{ + rtx label1 = gen_label_rtx (); + rtx label2 = gen_label_rtx (); + rtx temp = gen_reg_rtx (SFmode); + + operands[1] = force_reg (SFmode, operands[1]); + emit_insn (gen_cmpsf (operands[1], + CONST_DOUBLE_FROM_REAL_VALUE ( + REAL_VALUE_ATOF (\"9223372036854775808.0\", SFmode), SFmode))); + emit_jump_insn (gen_blt (label1)); + + emit_insn (gen_subsf3 (temp, operands[1], + CONST_DOUBLE_FROM_REAL_VALUE ( + REAL_VALUE_ATOF (\"18446744073709551616.0\", SFmode), SFmode))); + emit_insn (gen_fix_truncsfdi2_ieee (operands[0], temp, GEN_INT(7))); + emit_jump (label2); + + emit_label (label1); + emit_insn (gen_fix_truncsfdi2_ieee (operands[0], operands[1], GEN_INT(5))); + emit_label (label2); + DONE; +}") + +(define_expand "fix_truncsfdi2" + [(set (match_operand:DI 0 "register_operand" "") + (fix:DI (match_operand:SF 1 "nonimmediate_operand" "")))] + "TARGET_64BIT && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" + " +{ + operands[1] = force_reg (SFmode, operands[1]); + emit_insn (gen_fix_truncsfdi2_ieee (operands[0], operands[1], GEN_INT(5))); + DONE; +}") + +(define_insn "fix_truncsfdi2_ieee" + [(set (match_operand:DI 0 "register_operand" "=d") + (fix:DI (match_operand:SF 1 "register_operand" "f"))) + (unspec:DI [(match_operand:DI 2 "immediate_operand" "K")] 1) + (clobber (reg:CC 33))] + "TARGET_64BIT && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" + "cgebr\\t%0,%h2,%1" + [(set_attr "op_type" "RRE") + (set_attr "type" "other")]) + +; +; fixuns_truncsfsi2 and fix_truncsfsi2 instruction pattern(s). +; + +(define_expand "fixuns_truncsfsi2" + [(set (match_operand:SI 0 "register_operand" "") + (unsigned_fix:SI (match_operand:SF 1 "register_operand" "")))] + "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" + " +{ + rtx label1 = gen_label_rtx (); + rtx label2 = gen_label_rtx (); + rtx temp = gen_reg_rtx (SFmode); + + operands[1] = force_reg (SFmode, operands[1]); + emit_insn (gen_cmpsf (operands[1], + CONST_DOUBLE_FROM_REAL_VALUE ( + REAL_VALUE_ATOF (\"2147483648.0\", SFmode), SFmode))); + emit_jump_insn (gen_blt (label1)); + emit_insn (gen_subsf3 (temp, operands[1], + CONST_DOUBLE_FROM_REAL_VALUE ( + REAL_VALUE_ATOF (\"4294967296.0\", SFmode), SFmode))); + emit_insn (gen_fix_truncsfsi2_ieee (operands[0], temp, GEN_INT (7))); + emit_jump (label2); + + emit_label (label1); + emit_insn (gen_fix_truncsfsi2_ieee (operands[0], operands[1], GEN_INT (5))); + emit_label (label2); + DONE; +}") + +(define_expand "fix_truncsfsi2" + [(set (match_operand:SI 0 "register_operand" "") + (fix:SI (match_operand:SF 1 "nonimmediate_operand" "")))] + "TARGET_HARD_FLOAT" + " +{ + if (TARGET_IBM_FLOAT) + { + /* Convert to DFmode and then use the POP algorithm. */ + rtx temp = gen_reg_rtx (DFmode); + emit_insn (gen_extendsfdf2 (temp, operands[1])); + emit_insn (gen_fix_truncdfsi2 (operands[0], temp)); + } + else + { + operands[1] = force_reg (SFmode, operands[1]); + emit_insn (gen_fix_truncsfsi2_ieee (operands[0], operands[1], GEN_INT (5))); + } + + DONE; +}") + +(define_insn "fix_truncsfsi2_ieee" + [(set (match_operand:SI 0 "register_operand" "=d") + (fix:SI (match_operand:SF 1 "register_operand" "f"))) + (unspec:SI [(match_operand:SI 2 "immediate_operand" "K")] 1) + (clobber (reg:CC 33))] + "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" + "cfebr\\t%0,%h2,%1" + [(set_attr "op_type" "RRE") + (set_attr "type" "other")]) + +; +; floatdidf2 instruction pattern(s). +; + +(define_insn "floatdidf2" + [(set (match_operand:DF 0 "register_operand" "=f") + (float:DF (match_operand:DI 1 "register_operand" "d"))) + (clobber (reg:CC 33))] + "TARGET_64BIT && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" + "cdgbr\\t%0,%1" + [(set_attr "op_type" "RRE") + (set_attr "type" "other" )]) + +; +; floatdisf2 instruction pattern(s). +; + +(define_insn "floatdisf2" + [(set (match_operand:SF 0 "register_operand" "=f") + (float:SF (match_operand:DI 1 "register_operand" "d"))) + (clobber (reg:CC 33))] + "TARGET_64BIT && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" + "cegbr\\t%0,%1" + [(set_attr "op_type" "RRE") + (set_attr "type" "other" )]) + +; +; floatsidf2 instruction pattern(s). +; + +(define_expand "floatsidf2" + [(parallel + [(set (match_operand:DF 0 "register_operand" "") + (float:DF (match_operand:SI 1 "register_operand" ""))) + (clobber (reg:CC 33))])] + "TARGET_HARD_FLOAT" + " +{ + if (TARGET_IBM_FLOAT) + { + /* This is the algorithm from POP chapter A.5.7.1. */ + + rtx temp = assign_stack_local (BLKmode, 2 * UNITS_PER_WORD, BITS_PER_WORD); + rtx two31 = s390_gen_rtx_const_DI (0x4e000000, 0x80000000); + + emit_insn (gen_floatsidf2_ibm (operands[0], operands[1], two31, temp)); + DONE; + } +}") + +(define_insn "floatsidf2_ieee" + [(set (match_operand:DF 0 "register_operand" "=f") + (float:DF (match_operand:SI 1 "register_operand" "d"))) + (clobber (reg:CC 33))] + "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" + "cdfbr\\t%0,%1" + [(set_attr "op_type" "RRE") + (set_attr "type" "other" )]) + +(define_insn "floatsidf2_ibm" + [(set (match_operand:DF 0 "register_operand" "=f") + (float:DF (match_operand:SI 1 "register_operand" "d"))) + (use (match_operand:DI 2 "immediate_operand" "m")) + (use (match_operand:BLK 3 "memory_operand" "m")) + (clobber (reg:CC 33))] + "TARGET_HARD_FLOAT && TARGET_IBM_FLOAT" + "* +{ + output_asm_insn (\"st\\t%1,%N3\", operands); + output_asm_insn (\"xi\\t%N3,128\", operands); + output_asm_insn (\"mvc\\t%O3(4,%R3),%2\", operands); + output_asm_insn (\"ld\\t%0,%3\", operands); + return \"sd\\t%0,%2\"; +}" + [(set_attr "op_type" "NN") + (set_attr "type" "other" ) + (set_attr "length" "20")]) + +; +; floatsisf2 instruction pattern(s). +; + +(define_expand "floatsisf2" + [(parallel + [(set (match_operand:SF 0 "register_operand" "") + (float:SF (match_operand:SI 1 "register_operand" ""))) + (clobber (reg:CC 33))])] + "TARGET_HARD_FLOAT" + " +{ + if (TARGET_IBM_FLOAT) + { + /* Use the POP algorithm to convert to DFmode and then truncate. */ + rtx temp = gen_reg_rtx (DFmode); + emit_insn (gen_floatsidf2 (temp, operands[1])); + emit_insn (gen_truncdfsf2 (operands[0], temp)); + DONE; + } +}") + +(define_insn "floatsisf2_ieee" + [(set (match_operand:SF 0 "register_operand" "=f") + (float:SF (match_operand:SI 1 "register_operand" "d"))) + (clobber (reg:CC 33))] + "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" + "cefbr\\t%0,%1" + [(set_attr "op_type" "RRE") + (set_attr "type" "other" )]) + +; +; truncdfsf2 instruction pattern(s). +; + +(define_expand "truncdfsf2" + [(set (match_operand:SF 0 "register_operand" "") + (float_truncate:SF (match_operand:DF 1 "general_operand" "")))] + "TARGET_HARD_FLOAT" + "") + +(define_insn "truncdfsf2_ieee" + [(set (match_operand:SF 0 "register_operand" "=f") + (float_truncate:SF (match_operand:DF 1 "general_operand" "f")))] + "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" + "ledbr\\t%0,%1" + [(set_attr "op_type" "RRE")]) + +(define_insn "truncdfsf2_ibm" + [(set (match_operand:SF 0 "register_operand" "=f,f") + (float_truncate:SF (match_operand:DF 1 "general_operand" "f,m")))] + "TARGET_HARD_FLOAT && TARGET_IBM_FLOAT" + "@ + lrer\\t%0,%1 + le\\t%0,%1" + [(set_attr "op_type" "RR,RX") + (set_attr "atype" "reg,mem")]) + +; +; extendsfdf2 instruction pattern(s). +; + +(define_expand "extendsfdf2" + [(set (match_operand:DF 0 "register_operand" "") + (float_extend:DF (match_operand:SF 1 "nonimmediate_operand" "")))] + "TARGET_HARD_FLOAT" + " +{ + if (TARGET_IBM_FLOAT) + { + emit_insn (gen_extendsfdf2_ibm (operands[0], operands[1])); + DONE; + } +}") + +(define_insn "extendsfdf2_ieee" + [(set (match_operand:DF 0 "register_operand" "=f,f") + (float_extend:DF (match_operand:SF 1 "nonimmediate_operand" "f,m")))] + "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" + "@ + ldebr\\t%0,%1 + ldeb\\t%0,%1" + [(set_attr "op_type" "RRE,RXE")]) + +(define_insn "extendsfdf2_ibm" + [(set (match_operand:DF 0 "register_operand" "=f,f") + (float_extend:DF (match_operand:SF 1 "nonimmediate_operand" "f,m"))) + (clobber (reg:CC 33))] + "TARGET_HARD_FLOAT && TARGET_IBM_FLOAT" + "@ + sdr\\t%0,%0\;ler\\t%0,%1 + sdr\\t%0,%0\;le\\t%0,%1" + [(set_attr "op_type" "RRE,RXE") + (set_attr "atype" "reg,mem") + (set_attr "type" "o2,o2")]) + + +;; +;; ARITHMETRIC OPERATIONS +;; +; arithmetric operations set the ConditionCode, +; because of unpredictable Bits in Register for Halfword and Byte +; the ConditionCode can be set wrong in operations for Halfword and Byte + +;; +;;- Add instructions. +;; + +; +; adddi3 instruction pattern(s). +; + +(define_insn "addaddr_esame" + [(set (match_operand:DI 0 "register_operand" "=a,a") + (plus:DI (match_operand:DI 1 "register_operand" "%a,a") + (match_operand:DI 2 "nonmemory_operand" "J,a")))] + "TARGET_64BIT && (((REGNO (operands[1]) == STACK_POINTER_REGNUM ) || + (REGNO (operands[1]) == BASE_REGISTER)) && + (GET_CODE (operands[2]) == REG || + CONST_OK_FOR_LETTER_P (INTVAL (operands[2]),'J')))" + "@ + la\\t%0,%c2(,%1) + la\\t%0,0(%1,%2)" + [(set_attr "op_type" "RX") + (set_attr "atype" "mem") + (set_attr "type" "la")]) + +(define_insn "adddi3_64" + [(set (match_operand:DI 0 "register_operand" "=d,d,d") + (plus:DI (match_operand:DI 1 "register_operand" "%0,0,0") + (match_operand:DI 2 "general_operand" "d,K,m") ) ) + (clobber (reg:CC 33))] + "TARGET_64BIT" + "@ + agr\\t%0,%2 + aghi\\t%0,%h2 + ag\\t%0,%2" + [(set_attr "op_type" "RRE,RI,RXE") + (set_attr "atype" "reg,reg,mem")]) + +(define_insn "adddi3_31" + [(set (match_operand:DI 0 "register_operand" "=d,d") + (plus:DI (match_operand:DI 1 "register_operand" "0,0") + (match_operand:DI 2 "general_operand" "d,m") ) ) + (clobber (reg:CC 33))] + "!TARGET_64BIT" + "* +{ + switch (which_alternative) + { + case 0: /* d <- d */ + output_asm_insn (\"ar\\t%0,%2\", operands); + output_asm_insn (\"alr\\t%N0,%N2\", operands); + break; + + case 1: /* d <- m */ + output_asm_insn (\"a\\t%0,%2\", operands); + output_asm_insn (\"al\\t%N0,%N2\", operands); + break; + + default: + abort (); + } + + output_asm_insn (\"brc\\t12,.+8\", operands); + return \"ahi\\t%0,1\"; +}" + [(set_attr "op_type" "NN,NN") + (set_attr "atype" "reg,mem") + (set_attr "type" "o2,o2") + (set_attr "length" "12,16")]) + +(define_expand "adddi3" + [(set (match_operand:DI 0 "register_operand" "") + (plus:DI (match_operand:DI 1 "register_operand" "") + (match_operand:DI 2 "general_operand" "")))] + "" + " +{ + if (TARGET_64BIT) + emit_insn(gen_adddi3_64 (operands[0],operands[1],operands[2])); + else + emit_insn(gen_adddi3_31 (operands[0],operands[1],operands[2])); + DONE; +}") + +(define_insn "*la_64" + [(set (match_operand:DI 0 "register_operand" "=d") + (match_operand:QI 1 "address_operand" "p"))] + "TARGET_64BIT" + "la\\t%0,%a1" + [(set_attr "op_type" "RX") + (set_attr "atype" "mem") + (set_attr "type" "la")]) + +(define_expand "reload_indi" + [(parallel [(match_operand:DI 0 "register_operand" "=a") + (match_operand:DI 1 "s390_plus_operand" "") + (match_operand:TI 2 "register_operand" "=&a")])] + "TARGET_64BIT" + " +{ + s390_expand_plus_operand (operands[0], operands[1], operands[2]); + DONE; +}") + + +; +; addsi3 instruction pattern(s). +; + +(define_insn "*la_ccclobber" + [(set (match_operand:SI 0 "register_operand" "=d") + (match_operand:QI 1 "address_operand" "p")) + (clobber (reg:CC 33))] + "legitimate_la_operand_p (operands[1])" + "la\\t%0,%a1" + [(set_attr "op_type" "RX") + (set_attr "atype" "mem") + (set_attr "type" "la")]) + +(define_insn "*addsi3_cc" + [(set (reg 33) + (compare (plus:SI (match_operand:SI 1 "register_operand" "%0,0") + (match_operand:SI 2 "nonimmediate_operand" "d,m")) + (const_int 0))) + (set (match_operand:SI 0 "register_operand" "=d,d") + (plus:SI (match_dup 1) (match_dup 2)))] + "s390_match_ccmode(insn, CCLmode)" + "@ + alr\\t%0,%2 + al\\t%0,%2" + [(set_attr "op_type" "RR,RX") + (set_attr "atype" "reg,mem")]) + +(define_insn "*addsi3_cconly" + [(set (reg 33) + (compare (plus:SI (match_operand:SI 1 "register_operand" "%0,0") + (match_operand:SI 2 "general_operand" "d,m")) + (const_int 0))) + (clobber (match_scratch:SI 0 "=d,d"))] + "s390_match_ccmode(insn, CCLmode)" + "@ + alr\\t%0,%2 + al\\t%0,%2" + [(set_attr "op_type" "RR,RX") + (set_attr "atype" "reg,mem")]) + +(define_insn "*addsi3_cconly2" + [(set (reg 33) + (compare (match_operand:SI 1 "register_operand" "%0,0") + (neg:SI (match_operand:SI 2 "general_operand" "d,m")))) + (clobber (match_scratch:SI 0 "=d,d"))] + "s390_match_ccmode(insn, CCLmode)" + "@ + alr\\t%0,%2 + al\\t%0,%2" + [(set_attr "op_type" "RR,RX") + (set_attr "atype" "reg,mem")]) + +(define_insn "addsi3" + [(set (match_operand:SI 0 "register_operand" "=d,d,d") + (plus:SI (match_operand:SI 1 "register_operand" "%0,0,0") + (match_operand:SI 2 "general_operand" "d,K,m"))) + (clobber (reg:CC 33))] + "" + "@ + ar\\t%0,%2 + ahi\\t%0,%h2 + a\\t%0,%2" + [(set_attr "op_type" "RR,RI,RX") + (set_attr "atype" "reg,reg,mem")]) + +(define_insn "*addsi3_inv" + [(set (match_operand:SI 0 "register_operand" "=d,d,d") + (plus:SI (match_operand:SI 1 "general_operand" "%d,K,m") + (match_operand:SI 2 "register_operand" "0,0,0"))) + (clobber (reg:CC 33))] + "" + "@ + ar\\t%0,%1 + ahi\\t%0,%h1 + a\\t%0,%1" + [(set_attr "op_type" "RR,RI,RX") + (set_attr "atype" "reg,reg,mem")]) + +(define_insn "*la_31" + [(set (match_operand:SI 0 "register_operand" "=d") + (match_operand:QI 1 "address_operand" "p"))] + "legitimate_la_operand_p (operands[1])" + "la\\t%0,%a1" + [(set_attr "op_type" "RX") + (set_attr "atype" "mem") + (set_attr "type" "la")]) + +(define_expand "reload_insi" + [(parallel [(match_operand:SI 0 "register_operand" "=a") + (match_operand:SI 1 "s390_plus_operand" "") + (match_operand:DI 2 "register_operand" "=&a")])] + "!TARGET_64BIT" + " +{ + s390_expand_plus_operand (operands[0], operands[1], operands[2]); + DONE; +}") + + +; +; addhi3 instruction pattern(s). +; + +(define_insn "addhi3" + [(set (match_operand:HI 0 "register_operand" "=d,d,d") + (plus:HI (match_operand:HI 1 "register_operand" "%0,0,0") + (match_operand:HI 2 "general_operand" "d,K,m"))) + (clobber (reg:CC 33))] + "" + "@ + ar\\t%0,%2 + ahi\\t%0,%h2 + ah\\t%0,%2" + [(set_attr "op_type" "RR,RI,RX") + (set_attr "atype" "reg,reg,mem")]) + + +; +; addqi3 instruction pattern(s). +; + +(define_insn "addqi3" + [(set (match_operand:QI 0 "register_operand" "=d,d") + (plus:QI (match_operand:QI 1 "register_operand" "%0,0") + (match_operand:QI 2 "general_operand" "a,n"))) + (clobber (reg:CC 33))] + "" + "@ + ar\\t%0,%2 + ahi\\t%0,%h2" + [(set_attr "op_type" "RX,RX") + (set_attr "atype" "reg,mem")]) + + +; +; adddf3 instruction pattern(s). +; + +(define_expand "adddf3" + [(parallel + [(set (match_operand:DF 0 "register_operand" "=f,f") + (plus:DF (match_operand:DF 1 "register_operand" "%0,0") + (match_operand:DF 2 "general_operand" "f,m"))) + (clobber (reg:CC 33))])] + "TARGET_HARD_FLOAT" + "") + +(define_insn "*adddf3" + [(set (match_operand:DF 0 "register_operand" "=f,f") + (plus:DF (match_operand:DF 1 "register_operand" "%0,0") + (match_operand:DF 2 "general_operand" "f,m"))) + (clobber (reg:CC 33))] + "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" + "@ + adbr\\t%0,%2 + adb\\t%0,%2" + [(set_attr "op_type" "RRE,RXE") + (set_attr "atype" "reg,mem")]) + +(define_insn "*adddf3_ibm" + [(set (match_operand:DF 0 "register_operand" "=f,f") + (plus:DF (match_operand:DF 1 "register_operand" "%0,0") + (match_operand:DF 2 "general_operand" "f,m"))) + (clobber (reg:CC 33))] + "TARGET_HARD_FLOAT && TARGET_IBM_FLOAT" + "@ + adr\\t%0,%2 + ad\\t%0,%2" + [(set_attr "op_type" "RR,RX") + (set_attr "atype" "reg,mem")]) + +; +; addsf3 instruction pattern(s). +; + +(define_expand "addsf3" + [(parallel + [(set (match_operand:SF 0 "register_operand" "=f,f") + (plus:SF (match_operand:SF 1 "register_operand" "%0,0") + (match_operand:SF 2 "general_operand" "f,m"))) + (clobber (reg:CC 33))])] + "TARGET_HARD_FLOAT" + "") + +(define_insn "*addsf3" + [(set (match_operand:SF 0 "register_operand" "=f,f") + (plus:SF (match_operand:SF 1 "register_operand" "%0,0") + (match_operand:SF 2 "general_operand" "f,m"))) + (clobber (reg:CC 33))] + "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" + "@ + aebr\\t%0,%2 + aeb\\t%0,%2" + [(set_attr "op_type" "RRE,RXE") + (set_attr "atype" "reg,mem")]) + +(define_insn "*addsf3" + [(set (match_operand:SF 0 "register_operand" "=f,f") + (plus:SF (match_operand:SF 1 "register_operand" "%0,0") + (match_operand:SF 2 "general_operand" "f,m"))) + (clobber (reg:CC 33))] + "TARGET_HARD_FLOAT && TARGET_IBM_FLOAT" + "@ + aer\\t%0,%2 + ae\\t%0,%2" + [(set_attr "op_type" "RR,RX") + (set_attr "atype" "reg,mem")]) + + +;; +;;- Subtract instructions. +;; + +; +; subdi3 instruction pattern(s). +; + +(define_insn "*subdi3_64" + [(set (match_operand:DI 0 "register_operand" "=d,d") + (minus:DI (match_operand:DI 1 "register_operand" "0,0") + (match_operand:DI 2 "general_operand" "d,m") ) ) + (clobber (reg:CC 33))] + "TARGET_64BIT" + "@ + sgr\\t%0,%2 + sg\\t%0,%2" + [(set_attr "op_type" "RRE,RRE") + (set_attr "atype" "reg,mem")]) + +(define_insn "subdi3" + [(set (match_operand:DI 0 "register_operand" "=d,d") + (minus:DI (match_operand:DI 1 "register_operand" "0,0") + (match_operand:DI 2 "general_operand" "d,m"))) + (clobber (reg:CC 33))] + "" + "* +{ + switch (which_alternative) + { + case 0: /* d <- d */ + output_asm_insn (\"sr\\t%0,%2\", operands); + output_asm_insn (\"slr\\t%N0,%N2\", operands); + break; + case 1: /* d <- m */ + output_asm_insn (\"s\\t%0,%2\", operands); + output_asm_insn (\"sl\\t%N0,%N2\", operands); + break; + + default: + abort (); + } + + output_asm_insn (\"brc\\t11,.+8\", operands); + return \"ahi\\t%0,-1\"; +}" + [(set_attr "op_type" "NN,NN") + (set_attr "atype" "reg,mem") + (set_attr "type" "other,other") + (set_attr "length" "12,16")]) + +; +; subsi3 instruction pattern(s). +; + +(define_insn "*subsi3_cc" + [(set (reg 33) + (compare (minus:SI (match_operand:SI 1 "register_operand" "0,0") + (match_operand:SI 2 "general_operand" "d,m")) + (const_int 0))) + (set (match_operand:SI 0 "register_operand" "=d,d") + (minus:SI (match_dup 1) (match_dup 2)))] + "s390_match_ccmode(insn, CCLmode)" + "@ + slr\\t%0,%2 + sl\\t%0,%2" + [(set_attr "op_type" "RR,RX") + (set_attr "atype" "reg,mem")]) + +(define_insn "*subsi3_cconly" + [(set (reg 33) + (compare (minus:SI (match_operand:SI 1 "register_operand" "0,0") + (match_operand:SI 2 "general_operand" "d,m")) + (const_int 0))) + (clobber (match_scratch:SI 0 "=d,d"))] + "s390_match_ccmode(insn, CCLmode)" + "@ + slr\\t%0,%2 + sl\\t%0,%2" + [(set_attr "op_type" "RR,RX") + (set_attr "atype" "reg,mem")]) + +(define_insn "subsi3" + [(set (match_operand:SI 0 "register_operand" "=d,d") + (minus:SI (match_operand:SI 1 "register_operand" "0,0") + (match_operand:SI 2 "general_operand" "d,m"))) + (clobber (reg:CC 33))] + "" + "@ + sr\\t%0,%2 + s\\t%0,%2" + [(set_attr "op_type" "RR,RX") + (set_attr "atype" "reg,mem")]) + +; +; subhi3 instruction pattern(s). +; + +(define_insn "subhi3" + [(set (match_operand:HI 0 "register_operand" "=d,d") + (minus:HI (match_operand:HI 1 "register_operand" "0,0") + (match_operand:HI 2 "general_operand" "d,m"))) + (clobber (reg:CC 33))] + "" + "@ + sr\\t%0,%2 + sh\\t%0,%2" + [(set_attr "op_type" "RR,RX") + (set_attr "atype" "reg,mem")]) + +; +; subqi3 instruction pattern(s). +; + +(define_insn "subqi3" + [(set (match_operand:QI 0 "register_operand" "=d") + (minus:QI (match_operand:QI 1 "register_operand" "0") + (match_operand:QI 2 "register_operand" "d"))) + (clobber (reg:CC 33))] + "" + "sr\\t%0,%2" + [(set_attr "op_type" "RR")]) + +; +; subdf3 instruction pattern(s). +; + +(define_expand "subdf3" + [(parallel + [(set (match_operand:DF 0 "register_operand" "=f,f") + (minus:DF (match_operand:DF 1 "register_operand" "0,0") + (match_operand:DF 2 "general_operand" "f,m"))) + (clobber (reg:CC 33))])] + "TARGET_HARD_FLOAT" + "") + +(define_insn "*subdf3" + [(set (match_operand:DF 0 "register_operand" "=f,f") + (minus:DF (match_operand:DF 1 "register_operand" "0,0") + (match_operand:DF 2 "general_operand" "f,m"))) + (clobber (reg:CC 33))] + "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" + "@ + sdbr\\t%0,%2 + sdb\\t%0,%2" + [(set_attr "op_type" "RRE,RXE") + (set_attr "atype" "reg,mem")]) + +(define_insn "*subdf3_ibm" + [(set (match_operand:DF 0 "register_operand" "=f,f") + (minus:DF (match_operand:DF 1 "register_operand" "0,0") + (match_operand:DF 2 "general_operand" "f,m"))) + (clobber (reg:CC 33))] + "TARGET_HARD_FLOAT && TARGET_IBM_FLOAT" + "@ + sdr\\t%0,%2 + sd\\t%0,%2" + [(set_attr "op_type" "RR,RX") + (set_attr "atype" "reg,mem")]) + +; +; subsf3 instruction pattern(s). +; + +(define_expand "subsf3" + [(parallel + [(set (match_operand:SF 0 "register_operand" "=f,f") + (minus:SF (match_operand:SF 1 "register_operand" "0,0") + (match_operand:SF 2 "general_operand" "f,m"))) + (clobber (reg:CC 33))])] + "TARGET_HARD_FLOAT" + "") + +(define_insn "*subsf3" + [(set (match_operand:SF 0 "register_operand" "=f,f") + (minus:SF (match_operand:SF 1 "register_operand" "0,0") + (match_operand:SF 2 "general_operand" "f,m"))) + (clobber (reg:CC 33))] + "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" + "@ + sebr\\t%0,%2 + seb\\t%0,%2" + [(set_attr "op_type" "RRE,RXE") + (set_attr "atype" "reg,mem")]) + +(define_insn "*subsf3_ibm" + [(set (match_operand:SF 0 "register_operand" "=f,f") + (minus:SF (match_operand:SF 1 "register_operand" "0,0") + (match_operand:SF 2 "general_operand" "f,m"))) + (clobber (reg:CC 33))] + "TARGET_HARD_FLOAT && TARGET_IBM_FLOAT" + "@ + ser\\t%0,%2 + se\\t%0,%2" + [(set_attr "op_type" "RR,RX") + (set_attr "atype" "reg,mem")]) + + +;; +;;- Multiply instructions. +;; + +; +; muldi3 instruction pattern(s). +; + +(define_insn "muldi3" + [(set (match_operand:DI 0 "register_operand" "=d,d,d") + (mult:DI (match_operand:DI 1 "register_operand" "%0,0,0") + (match_operand:DI 2 "general_operand" "d,K,m"))) + (clobber (reg:CC 33))] + "TARGET_64BIT" + "@ + msgr\\t%0,%2 + mghi\\t%0,%h2 + msg\\t%0,%2" + [(set_attr "op_type" "RRE,RI,RX") + (set_attr "atype" "reg,reg,mem") + (set_attr "type" "imul")]) + +; +; mulsi3 instruction pattern(s). +; + +(define_insn "mulsi3" + [(set (match_operand:SI 0 "register_operand" "=d,d,d") + (mult:SI (match_operand:SI 1 "register_operand" "%0,0,0") + (match_operand:SI 2 "general_operand" "d,K,m"))) + (clobber (reg:CC 33))] + "" + "@ + msr\\t%0,%2 + mhi\\t%0,%h2 + ms\\t%0,%2" + [(set_attr "op_type" "RRE,RI,RX") + (set_attr "atype" "reg,reg,mem") + (set_attr "type" "imul")]) + +; +; mulsidi3 instruction pattern(s). +; + +(define_expand "mulsidi3" + [(set (match_operand:DI 0 "register_operand" "") + (mult:DI (sign_extend:DI (match_operand:SI 1 "register_operand" "")) + (sign_extend:DI (match_operand:SI 2 "nonimmediate_operand" ""))))] + "!TARGET_64BIT" + " +{ + rtx insn; + + emit_insn (gen_zero_extendsidi2 (operands[0], operands[1])); + insn = emit_insn (gen_mulsi_6432 (operands[0], operands[0], operands[2])); + + REG_NOTES (insn) = + gen_rtx_EXPR_LIST (REG_EQUAL, + gen_rtx_MULT (DImode, + gen_rtx_SIGN_EXTEND (DImode, operands[1]), + gen_rtx_SIGN_EXTEND (DImode, operands[2])), + REG_NOTES (insn)); + DONE; +}") + +(define_insn "mulsi_6432" + [(set (match_operand:DI 0 "register_operand" "=d,d") + (mult:DI (sign_extend:DI + (truncate:SI (match_operand:DI 1 "register_operand" "0,0"))) + (sign_extend:DI + (match_operand:SI 2 "nonimmediate_operand" "d,m")))) + (clobber (reg:CC 33))] + "!TARGET_64BIT" + "@ + mr\\t%0,%2 + m\\t%0,%2" + [(set_attr "op_type" "RR,RX") + (set_attr "atype" "reg,mem") + (set_attr "type" "imul")]) + +; +; muldf3 instruction pattern(s). +; + +(define_expand "muldf3" + [(parallel + [(set (match_operand:DF 0 "register_operand" "=f,f") + (mult:DF (match_operand:DF 1 "register_operand" "%0,0") + (match_operand:DF 2 "general_operand" "f,m"))) + (clobber (reg:CC 33))])] + "TARGET_HARD_FLOAT" + "") + +(define_insn "*muldf3" + [(set (match_operand:DF 0 "register_operand" "=f,f") + (mult:DF (match_operand:DF 1 "register_operand" "%0,0") + (match_operand:DF 2 "general_operand" "f,m"))) + (clobber (reg:CC 33))] + "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" + "@ + mdbr\\t%0,%2 + mdb\\t%0,%2" + [(set_attr "op_type" "RRE,RXE") + (set_attr "type" "fmul") + (set_attr "atype" "reg,mem")]) + +(define_insn "*muldf3_ibm" + [(set (match_operand:DF 0 "register_operand" "=f,f") + (mult:DF (match_operand:DF 1 "register_operand" "%0,0") + (match_operand:DF 2 "general_operand" "f,m"))) + (clobber (reg:CC 33))] + "TARGET_HARD_FLOAT && TARGET_IBM_FLOAT" + "@ + mdr\\t%0,%2 + md\\t%0,%2" + [(set_attr "op_type" "RR,RX") + (set_attr "type" "fmul") + (set_attr "atype" "reg,mem")]) + +; +; mulsf3 instruction pattern(s). +; + +(define_expand "mulsf3" + [(parallel + [(set (match_operand:SF 0 "register_operand" "=f,f") + (mult:SF (match_operand:SF 1 "register_operand" "%0,0") + (match_operand:SF 2 "general_operand" "f,m"))) + (clobber (reg:CC 33))])] + "TARGET_HARD_FLOAT" + "") + +(define_insn "*mulsf3" + [(set (match_operand:SF 0 "register_operand" "=f,f") + (mult:SF (match_operand:SF 1 "register_operand" "%0,0") + (match_operand:SF 2 "general_operand" "f,m"))) + (clobber (reg:CC 33))] + "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" + "@ + meebr\\t%0,%2 + meeb\\t%0,%2" + [(set_attr "op_type" "RRE,RXE") + (set_attr "type" "fmul") + (set_attr "atype" "reg,mem")]) + +(define_insn "*mulsf3_ibm" + [(set (match_operand:SF 0 "register_operand" "=f,f") + (mult:SF (match_operand:SF 1 "register_operand" "%0,0") + (match_operand:SF 2 "general_operand" "f,m"))) + (clobber (reg:CC 33))] + "TARGET_HARD_FLOAT && TARGET_IBM_FLOAT" + "@ + mer\\t%0,%2 + me\\t%0,%2" + [(set_attr "op_type" "RR,RX") + (set_attr "type" "fmul") + (set_attr "atype" "reg,mem")]) + + +;; +;;- Divide and modulo instructions. +;; + +; +; divmoddi4 instruction pattern(s). +; + +(define_expand "divmoddi4" + [(parallel [(set (match_operand:DI 0 "general_operand" "") + (div:DI (match_operand:DI 1 "general_operand" "") + (match_operand:DI 2 "general_operand" ""))) + (set (match_operand:DI 3 "general_operand" "") + (mod:DI (match_dup 1) (match_dup 2)))]) + (clobber (match_dup 4))] + "TARGET_64BIT" + " +{ + rtx insn, div_equal, mod_equal, equal; + + div_equal = gen_rtx_DIV (DImode, operands[1], operands[2]); + mod_equal = gen_rtx_MOD (DImode, operands[1], operands[2]); + equal = gen_rtx_IOR (TImode, + gen_rtx_ZERO_EXTEND (TImode, div_equal), + gen_rtx_ASHIFT (TImode, + gen_rtx_ZERO_EXTEND (TImode, mod_equal), + GEN_INT (64))); + + operands[4] = gen_reg_rtx(TImode); + emit_insn (gen_rtx_CLOBBER (VOIDmode, operands[4])); + emit_move_insn (gen_lowpart (DImode, operands[4]), operands[1]); + emit_move_insn (gen_highpart (DImode, operands[4]), const0_rtx); + insn = emit_insn (gen_divmodtidi3 (operands[4], operands[4], operands[2])); + REG_NOTES (insn) = + gen_rtx_EXPR_LIST (REG_EQUAL, equal, REG_NOTES (insn)); + + insn = emit_move_insn (operands[0], gen_lowpart (DImode, operands[4])); + REG_NOTES (insn) = + gen_rtx_EXPR_LIST (REG_EQUAL, div_equal, REG_NOTES (insn)); + + insn = emit_move_insn (operands[3], gen_highpart (DImode, operands[4])); + REG_NOTES (insn) = + gen_rtx_EXPR_LIST (REG_EQUAL, mod_equal, REG_NOTES (insn)); + + DONE; +}") + +(define_insn "divmodtidi3" + [(set (match_operand:TI 0 "register_operand" "=d,d") + (ior:TI + (zero_extend:TI + (div:DI (truncate:DI (match_operand:TI 1 "register_operand" "0,0")) + (match_operand:DI 2 "general_operand" "d,m"))) + (ashift:TI + (zero_extend:TI + (mod:DI (truncate:DI (match_dup 1)) + (match_dup 2))) + (const_int 64))))] + "TARGET_64BIT" + "@ + dsgr\\t%0,%2 + dsg\\t%0,%2" + [(set_attr "op_type" "RRE,RXE") + (set_attr "type" "idiv") + (set_attr "atype" "reg,mem")]) + +(define_insn "divmodtisi3" + [(set (match_operand:TI 0 "register_operand" "=d,d") + (ior:TI + (zero_extend:TI + (div:DI (truncate:DI (match_operand:TI 1 "register_operand" "0,0")) + (sign_extend:DI (match_operand:SI 2 "nonimmediate_operand" "d,m")))) + (ashift:TI + (zero_extend:TI + (mod:DI (truncate:DI (match_dup 1)) + (sign_extend:DI (match_dup 2)))) + (const_int 64))))] + "TARGET_64BIT" + "@ + dsgfr\\t%0,%2 + dsgf\\t%0,%2" + [(set_attr "op_type" "RRE,RXE") + (set_attr "type" "idiv") + (set_attr "atype" "reg,mem")]) + +; +; udivmoddi4 instruction pattern(s). +; + +(define_expand "udivmoddi4" + [(parallel [(set (match_operand:DI 0 "general_operand" "") + (udiv:DI (match_operand:DI 1 "general_operand" "") + (match_operand:DI 2 "nonimmediate_operand" ""))) + (set (match_operand:DI 3 "general_operand" "") + (umod:DI (match_dup 1) (match_dup 2)))]) + (clobber (match_dup 4))] + "TARGET_64BIT" + " +{ + rtx insn, div_equal, mod_equal, equal; + + div_equal = gen_rtx_UDIV (DImode, operands[1], operands[2]); + mod_equal = gen_rtx_UMOD (DImode, operands[1], operands[2]); + equal = gen_rtx_IOR (TImode, + gen_rtx_ZERO_EXTEND (TImode, div_equal), + gen_rtx_ASHIFT (TImode, + gen_rtx_ZERO_EXTEND (TImode, mod_equal), + GEN_INT (64))); + + operands[4] = gen_reg_rtx(TImode); + emit_insn (gen_rtx_CLOBBER (VOIDmode, operands[4])); + emit_move_insn (gen_lowpart (DImode, operands[4]), operands[1]); + emit_move_insn (gen_highpart (DImode, operands[4]), const0_rtx); + insn = emit_insn (gen_udivmodtidi3 (operands[4], operands[4], operands[2])); + REG_NOTES (insn) = + gen_rtx_EXPR_LIST (REG_EQUAL, equal, REG_NOTES (insn)); + + insn = emit_move_insn (operands[0], gen_lowpart (DImode, operands[4])); + REG_NOTES (insn) = + gen_rtx_EXPR_LIST (REG_EQUAL, div_equal, REG_NOTES (insn)); + + insn = emit_move_insn (operands[3], gen_highpart (DImode, operands[4])); + REG_NOTES (insn) = + gen_rtx_EXPR_LIST (REG_EQUAL, mod_equal, REG_NOTES (insn)); + + DONE; +}") + +(define_insn "udivmodtidi3" + [(set (match_operand:TI 0 "register_operand" "=d,d") + (ior:TI (zero_extend:TI + (truncate:DI + (udiv:TI (match_operand:TI 1 "register_operand" "0,0") + (zero_extend:TI + (match_operand:DI 2 "nonimmediate_operand" "d,m"))))) + (ashift:TI + (zero_extend:TI + (truncate:DI + (umod:TI (match_dup 1) (zero_extend:TI (match_dup 2))))) + (const_int 64))))] + "TARGET_64BIT" + "@ + dlgr\\t%0,%2 + dlg\\t%0,%2" + [(set_attr "op_type" "RRE,RXE") + (set_attr "type" "idiv") + (set_attr "atype" "reg,mem")]) + +; +; divmodsi4 instruction pattern(s). +; + +(define_expand "divmodsi4" + [(parallel [(set (match_operand:SI 0 "general_operand" "") + (div:SI (match_operand:SI 1 "general_operand" "") + (match_operand:SI 2 "nonimmediate_operand" ""))) + (set (match_operand:SI 3 "general_operand" "") + (mod:SI (match_dup 1) (match_dup 2)))]) + (clobber (match_dup 4))] + "!TARGET_64BIT" + " +{ + rtx insn, div_equal, mod_equal, equal; + + div_equal = gen_rtx_DIV (SImode, operands[1], operands[2]); + mod_equal = gen_rtx_MOD (SImode, operands[1], operands[2]); + equal = gen_rtx_IOR (DImode, + gen_rtx_ZERO_EXTEND (DImode, div_equal), + gen_rtx_ASHIFT (DImode, + gen_rtx_ZERO_EXTEND (DImode, mod_equal), + GEN_INT (32))); + + operands[4] = gen_reg_rtx(DImode); + emit_insn (gen_extendsidi2 (operands[4], operands[1])); + insn = emit_insn (gen_divmoddisi3 (operands[4], operands[4], operands[2])); + REG_NOTES (insn) = + gen_rtx_EXPR_LIST (REG_EQUAL, equal, REG_NOTES (insn)); + + insn = emit_move_insn (operands[0], gen_lowpart (SImode, operands[4])); + REG_NOTES (insn) = + gen_rtx_EXPR_LIST (REG_EQUAL, div_equal, REG_NOTES (insn)); + + insn = emit_move_insn (operands[3], gen_highpart (SImode, operands[4])); + REG_NOTES (insn) = + gen_rtx_EXPR_LIST (REG_EQUAL, mod_equal, REG_NOTES (insn)); + + DONE; +}") + +(define_insn "divmoddisi3" + [(set (match_operand:DI 0 "register_operand" "=d,d") + (ior:DI (zero_extend:DI + (truncate:SI + (div:DI (match_operand:DI 1 "register_operand" "0,0") + (sign_extend:DI + (match_operand:SI 2 "nonimmediate_operand" "d,m"))))) + (ashift:DI + (zero_extend:DI + (truncate:SI + (mod:DI (match_dup 1) (sign_extend:SI (match_dup 2))))) + (const_int 32))))] + "!TARGET_64BIT" + "@ + dr\\t%0,%2 + d\\t%0,%2" + [(set_attr "op_type" "RR,RX") + (set_attr "type" "idiv") + (set_attr "atype" "reg,mem")]) + +; +; udivsi3 and umodsi3 instruction pattern(s). +; + + +(define_expand "udivsi3" + [(set (match_operand:SI 0 "register_operand" "=d") + (udiv:SI (match_operand:SI 1 "general_operand" "") + (match_operand:SI 2 "general_operand" ""))) + (clobber (match_dup 3))] + "!TARGET_64BIT" + " +{ + rtx insn, udiv_equal, umod_equal, equal; + + udiv_equal = gen_rtx_UDIV (SImode, operands[1], operands[2]); + umod_equal = gen_rtx_UMOD (SImode, operands[1], operands[2]); + equal = gen_rtx_IOR (DImode, + gen_rtx_ZERO_EXTEND (DImode, udiv_equal), + gen_rtx_ASHIFT (DImode, + gen_rtx_ZERO_EXTEND (DImode, umod_equal), + GEN_INT (32))); + + operands[3] = gen_reg_rtx (DImode); + + if (CONSTANT_P (operands[2])) + { + if (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) < 0) + { + rtx label1 = gen_label_rtx (); + + operands[1] = make_safe_from (operands[1], operands[0]); + emit_move_insn (operands[0], const0_rtx); + emit_insn (gen_cmpsi (operands[1], operands[2])); + emit_jump_insn (gen_bltu (label1)); + emit_move_insn (operands[0], const1_rtx); + emit_label (label1); + } + else + { + operands[2] = force_reg (SImode, operands[2]); + operands[2] = make_safe_from (operands[2], operands[0]); + + emit_insn (gen_zero_extendsidi2 (operands[3], operands[1])); + insn = emit_insn (gen_divmoddisi3 (operands[3], operands[3], + operands[2])); + REG_NOTES (insn) = + gen_rtx_EXPR_LIST (REG_EQUAL, equal, REG_NOTES (insn)); + + insn = emit_move_insn (operands[0], + gen_lowpart (SImode, operands[3])); + REG_NOTES (insn) = + gen_rtx_EXPR_LIST (REG_EQUAL, + udiv_equal, REG_NOTES (insn)); + } + } + else + { + rtx label1 = gen_label_rtx (); + rtx label2 = gen_label_rtx (); + rtx label3 = gen_label_rtx (); + + operands[1] = force_reg (SImode, operands[1]); + operands[1] = make_safe_from (operands[1], operands[0]); + operands[2] = force_reg (SImode, operands[2]); + operands[2] = make_safe_from (operands[2], operands[0]); + + emit_move_insn (operands[0], const0_rtx); + emit_insn (gen_cmpsi (operands[2], operands[1])); + emit_jump_insn (gen_bgtu (label3)); + emit_insn (gen_cmpsi (operands[2], const1_rtx)); + emit_jump_insn (gen_blt (label2)); + emit_insn (gen_cmpsi (operands[2], const1_rtx)); + emit_jump_insn (gen_beq (label1)); + emit_insn (gen_zero_extendsidi2 (operands[3], operands[1])); + insn = emit_insn (gen_divmoddisi3 (operands[3], operands[3], + operands[2])); + REG_NOTES (insn) = + gen_rtx_EXPR_LIST (REG_EQUAL, equal, REG_NOTES (insn)); + + insn = emit_move_insn (operands[0], + gen_lowpart (SImode, operands[3])); + REG_NOTES (insn) = + gen_rtx_EXPR_LIST (REG_EQUAL, + udiv_equal, REG_NOTES (insn)); + emit_jump (label3); + emit_label (label1); + emit_move_insn (operands[0], operands[1]); + emit_jump (label3); + emit_label (label2); + emit_move_insn (operands[0], const1_rtx); + emit_label (label3); + } + emit_move_insn (operands[0], operands[0]); + DONE; +}") + +(define_expand "umodsi3" + [(set (match_operand:SI 0 "register_operand" "=d") + (umod:SI (match_operand:SI 1 "nonimmediate_operand" "") + (match_operand:SI 2 "nonimmediate_operand" ""))) + (clobber (match_dup 3))] + "!TARGET_64BIT" + " +{ + rtx insn, udiv_equal, umod_equal, equal; + + udiv_equal = gen_rtx_UDIV (SImode, operands[1], operands[2]); + umod_equal = gen_rtx_UMOD (SImode, operands[1], operands[2]); + equal = gen_rtx_IOR (DImode, + gen_rtx_ZERO_EXTEND (DImode, udiv_equal), + gen_rtx_ASHIFT (DImode, + gen_rtx_ZERO_EXTEND (DImode, umod_equal), + GEN_INT (32))); + + operands[3] = gen_reg_rtx (DImode); + + if (CONSTANT_P (operands[2])) + { + if (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) <= 0) + { + rtx label1 = gen_label_rtx (); + + operands[1] = make_safe_from (operands[1], operands[0]); + emit_move_insn (operands[0], operands[1]); + emit_insn (gen_cmpsi (operands[0], operands[2])); + emit_jump_insn (gen_bltu (label1)); + emit_insn (gen_abssi2 (operands[0], operands[2])); + emit_insn (gen_addsi3 (operands[0], operands[0], operands[1])); + emit_label (label1); + } + else + { + operands[2] = force_reg (SImode, operands[2]); + operands[2] = make_safe_from (operands[2], operands[0]); + + emit_insn (gen_zero_extendsidi2 (operands[3], operands[1])); + insn = emit_insn (gen_divmoddisi3 (operands[3], operands[3], + operands[2])); + REG_NOTES (insn) = + gen_rtx_EXPR_LIST (REG_EQUAL, equal, REG_NOTES (insn)); + + insn = emit_move_insn (operands[0], + gen_highpart (SImode, operands[3])); + REG_NOTES (insn) = + gen_rtx_EXPR_LIST (REG_EQUAL, + umod_equal, REG_NOTES (insn)); + } + } + else + { + rtx label1 = gen_label_rtx (); + rtx label2 = gen_label_rtx (); + rtx label3 = gen_label_rtx (); + + operands[1] = force_reg (SImode, operands[1]); + operands[1] = make_safe_from (operands[1], operands[0]); + operands[2] = force_reg (SImode, operands[2]); + operands[2] = make_safe_from (operands[2], operands[0]); + + emit_move_insn(operands[0], operands[1]); + emit_insn (gen_cmpsi (operands[2], operands[1])); + emit_jump_insn (gen_bgtu (label3)); + emit_insn (gen_cmpsi (operands[2], const1_rtx)); + emit_jump_insn (gen_blt (label2)); + emit_insn (gen_cmpsi (operands[2], const1_rtx)); + emit_jump_insn (gen_beq (label1)); + emit_insn (gen_zero_extendsidi2 (operands[3], operands[1])); + insn = emit_insn (gen_divmoddisi3 (operands[3], operands[3], + operands[2])); + REG_NOTES (insn) = + gen_rtx_EXPR_LIST (REG_EQUAL, equal, REG_NOTES (insn)); + + insn = emit_move_insn (operands[0], + gen_highpart (SImode, operands[3])); + REG_NOTES (insn) = + gen_rtx_EXPR_LIST (REG_EQUAL, + umod_equal, REG_NOTES (insn)); + emit_jump (label3); + emit_label (label1); + emit_move_insn (operands[0], const0_rtx); + emit_jump (label3); + emit_label (label2); + emit_insn (gen_subsi3 (operands[0], operands[0], operands[2])); + emit_label (label3); + } + DONE; +}") + +; +; divdf3 instruction pattern(s). +; + +(define_expand "divdf3" + [(parallel + [(set (match_operand:DF 0 "register_operand" "=f,f") + (div:DF (match_operand:DF 1 "register_operand" "0,0") + (match_operand:DF 2 "general_operand" "f,m"))) + (clobber (reg:CC 33))])] + "TARGET_HARD_FLOAT" + "") + +(define_insn "*divdf3" + [(set (match_operand:DF 0 "register_operand" "=f,f") + (div:DF (match_operand:DF 1 "register_operand" "0,0") + (match_operand:DF 2 "general_operand" "f,m"))) + (clobber (reg:CC 33))] + "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" + "@ + ddbr\\t%0,%2 + ddb\\t%0,%2" + [(set_attr "op_type" "RRE,RXE") + (set_attr "type" "fdiv") + (set_attr "atype" "reg,mem")]) + +(define_insn "*divdf3_ibm" + [(set (match_operand:DF 0 "register_operand" "=f,f") + (div:DF (match_operand:DF 1 "register_operand" "0,0") + (match_operand:DF 2 "general_operand" "f,m"))) + (clobber (reg:CC 33))] + "TARGET_HARD_FLOAT && TARGET_IBM_FLOAT" + "@ + ddr\\t%0,%2 + dd\\t%0,%2" + [(set_attr "op_type" "RR,RX") + (set_attr "type" "fdiv") + (set_attr "atype" "reg,mem")]) + +; +; divsf3 instruction pattern(s). +; + +(define_expand "divsf3" + [(parallel + [(set (match_operand:SF 0 "register_operand" "=f,f") + (div:SF (match_operand:SF 1 "register_operand" "0,0") + (match_operand:SF 2 "general_operand" "f,m"))) + (clobber (reg:CC 33))])] + "TARGET_HARD_FLOAT" + "") + +(define_insn "*divsf3" + [(set (match_operand:SF 0 "register_operand" "=f,f") + (div:SF (match_operand:SF 1 "register_operand" "0,0") + (match_operand:SF 2 "general_operand" "f,m"))) + (clobber (reg:CC 33))] + "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" + "@ + debr\\t%0,%2 + deb\\t%0,%2" + [(set_attr "op_type" "RRE,RXE") + (set_attr "type" "fdiv") + (set_attr "atype" "reg,mem")]) + +(define_insn "*divsf3" + [(set (match_operand:SF 0 "register_operand" "=f,f") + (div:SF (match_operand:SF 1 "register_operand" "0,0") + (match_operand:SF 2 "general_operand" "f,m"))) + (clobber (reg:CC 33))] + "TARGET_HARD_FLOAT && TARGET_IBM_FLOAT" + "@ + der\\t%0,%2 + de\\t%0,%2" + [(set_attr "op_type" "RR,RX") + (set_attr "type" "fdiv") + (set_attr "atype" "reg,mem")]) + + +;; +;;- And instructions. +;; + +; +; anddi3 instruction pattern(s). +; + +(define_insn "*anddi3_cc" + [(set (reg 33) + (compare (and:DI (match_operand:DI 1 "register_operand" "%0,0") + (match_operand:DI 2 "general_operand" "d,m")) + (const_int 0))) + (set (match_operand:DI 0 "register_operand" "=d,d") + (and:DI (match_dup 1) (match_dup 2)))] + "s390_match_ccmode(insn, CCTmode) && TARGET_64BIT" + "@ + ngr\\t%0,%2 + ng\\t%0,%2" + [(set_attr "op_type" "RRE,RXE") + (set_attr "atype" "reg,mem")]) + +(define_insn "*anddi3_cconly" + [(set (reg 33) + (compare (and:DI (match_operand:DI 1 "register_operand" "%0,0") + (match_operand:DI 2 "general_operand" "d,m")) + (const_int 0))) + (clobber (match_scratch:DI 0 "=d,d"))] + "s390_match_ccmode(insn, CCTmode) && TARGET_64BIT" + "@ + ngr\\t%0,%2 + ng\\t%0,%2" + [(set_attr "op_type" "RRE,RXE") + (set_attr "atype" "reg,mem")]) + +(define_insn "*anddi3_ni" + [(set (match_operand:DI 0 "register_operand" "=d") + (and:DI (match_operand:DI 1 "register_operand" "%0") + (match_operand:DI 2 "immediate_operand" "n"))) + (clobber (reg:CC 33))] + "TARGET_64BIT && s390_single_hi (operands[2], DImode, -1) >= 0" + "* +{ + int part = s390_single_hi (operands[2], DImode, -1); + operands[2] = GEN_INT (s390_extract_hi (operands[2], DImode, part)); + + switch (part) + { + case 0: return \"nihh\\t%0,%x2\"; + case 1: return \"nihl\\t%0,%x2\"; + case 2: return \"nilh\\t%0,%x2\"; + case 3: return \"nill\\t%0,%x2\"; + default: abort (); + } +}" + [(set_attr "op_type" "RI") + (set_attr "atype" "reg")]) + +(define_insn "anddi3" + [(set (match_operand:DI 0 "register_operand" "=d,d") + (and:DI (match_operand:DI 1 "register_operand" "%0,0") + (match_operand:DI 2 "general_operand" "d,m"))) + (clobber (reg:CC 33))] + "TARGET_64BIT" + "@ + ngr\\t%0,%2 + ng\\t%0,%2" + [(set_attr "op_type" "RRE,RXE") + (set_attr "atype" "reg,mem")]) + +(define_insn "*anddi3_ss" + [(set (match_operand:DI 0 "s_operand" "=Qo") + (and:DI (match_dup 0) + (match_operand:DI 1 "s_imm_operand" "Qo"))) + (clobber (reg:CC 33))] + "" + "nc\\t%O0(8,%R0),%1" + [(set_attr "op_type" "SS") + (set_attr "atype" "mem")]) + +(define_insn "*anddi3_ss_inv" + [(set (match_operand:DI 0 "s_operand" "=Qo") + (and:DI (match_operand:DI 1 "s_imm_operand" "Qo") + (match_dup 0))) + (clobber (reg:CC 33))] + "" + "nc\\t%O0(8,%R0),%1" + [(set_attr "op_type" "SS") + (set_attr "atype" "mem")]) + +; +; andsi3 instruction pattern(s). +; + +(define_insn "*andsi3_cc" + [(set (reg 33) + (compare (and:SI (match_operand:SI 1 "register_operand" "%0,0") + (match_operand:SI 2 "general_operand" "d,m")) + (const_int 0))) + (set (match_operand:SI 0 "register_operand" "=d,d") + (and:SI (match_dup 1) (match_dup 2)))] + "s390_match_ccmode(insn, CCTmode)" + "@ + nr\\t%0,%2 + n\\t%0,%2" + [(set_attr "op_type" "RR,RX") + (set_attr "atype" "reg,mem")]) + +(define_insn "*andsi3_cconly" + [(set (reg 33) + (compare (and:SI (match_operand:SI 1 "register_operand" "%0,0") + (match_operand:SI 2 "general_operand" "d,m")) + (const_int 0))) + (clobber (match_scratch:SI 0 "=d,d"))] + "s390_match_ccmode(insn, CCTmode)" + "@ + nr\\t%0,%2 + n\\t%0,%2" + [(set_attr "op_type" "RR,RX") + (set_attr "atype" "reg,mem")]) + +(define_insn "*andsi3_ni" + [(set (match_operand:SI 0 "register_operand" "=d") + (and:SI (match_operand:SI 1 "register_operand" "%0") + (match_operand:SI 2 "immediate_operand" "n"))) + (clobber (reg:CC 33))] + "TARGET_64BIT && s390_single_hi (operands[2], SImode, -1) >= 0" + "* +{ + int part = s390_single_hi (operands[2], SImode, -1); + operands[2] = GEN_INT (s390_extract_hi (operands[2], SImode, part)); + + switch (part) + { + case 0: return \"nilh\\t%0,%x2\"; + case 1: return \"nill\\t%0,%x2\"; + default: abort (); + } +}" + [(set_attr "op_type" "RI") + (set_attr "atype" "reg")]) + +(define_insn "andsi3" + [(set (match_operand:SI 0 "register_operand" "=d,d") + (and:SI (match_operand:SI 1 "register_operand" "%0,0") + (match_operand:SI 2 "general_operand" "d,m"))) + (clobber (reg:CC 33))] + "" + "@ + nr\\t%0,%2 + n\\t%0,%2" + [(set_attr "op_type" "RR,RX") + (set_attr "atype" "reg,mem")]) + +(define_insn "*andsi3_ss" + [(set (match_operand:SI 0 "s_operand" "=Qo") + (and:SI (match_dup 0) + (match_operand:SI 1 "s_imm_operand" "Qo"))) + (clobber (reg:CC 33))] + "" + "nc\\t%O0(4,%R0),%1" + [(set_attr "op_type" "SS") + (set_attr "atype" "mem")]) + +(define_insn "*andsi3_ss_inv" + [(set (match_operand:SI 0 "s_operand" "=Qo") + (and:SI (match_operand:SI 1 "s_imm_operand" "Qo") + (match_dup 0))) + (clobber (reg:CC 33))] + "" + "nc\\t%O0(4,%R0),%1" + [(set_attr "op_type" "SS") + (set_attr "atype" "mem")]) + +; +; andhi3 instruction pattern(s). +; + +(define_insn "*andhi3_ni" + [(set (match_operand:HI 0 "register_operand" "=d,d") + (and:HI (match_operand:HI 1 "register_operand" "%0,0") + (match_operand:HI 2 "nonmemory_operand" "d,n"))) + (clobber (reg:CC 33))] + "TARGET_64BIT" + "@ + nr\\t%0,%2 + nill\\t%0,%x2" + [(set_attr "op_type" "RR,RI") + (set_attr "atype" "reg")]) + +(define_insn "andhi3" + [(set (match_operand:HI 0 "register_operand" "=d") + (and:HI (match_operand:HI 1 "register_operand" "%0") + (match_operand:HI 2 "nonmemory_operand" "d"))) + (clobber (reg:CC 33))] + "" + "nr\\t%0,%2" + [(set_attr "op_type" "RR") + (set_attr "atype" "reg")]) + +(define_insn "*andhi3_ss" + [(set (match_operand:HI 0 "s_operand" "=Qo") + (and:HI (match_dup 0) + (match_operand:HI 1 "s_imm_operand" "Qo"))) + (clobber (reg:CC 33))] + "" + "nc\\t%O0(2,%R0),%1" + [(set_attr "op_type" "SS") + (set_attr "atype" "mem")]) + +(define_insn "*andhi3_ss_inv" + [(set (match_operand:HI 0 "s_operand" "=Qo") + (and:HI (match_operand:HI 1 "s_imm_operand" "Qo") + (match_dup 0))) + (clobber (reg:CC 33))] + "" + "nc\\t%O0(2,%R0),%1" + [(set_attr "op_type" "SS") + (set_attr "atype" "mem")]) + +; +; andqi3 instruction pattern(s). +; + +(define_insn "*andqi3_ni" + [(set (match_operand:QI 0 "register_operand" "=d,d") + (and:QI (match_operand:QI 1 "register_operand" "%0,0") + (match_operand:QI 2 "nonmemory_operand" "d,n"))) + (clobber (reg:CC 33))] + "TARGET_64BIT" + "@ + nr\\t%0,%2 + nill\\t%0,%b2" + [(set_attr "op_type" "RR,RI") + (set_attr "atype" "reg")]) + +(define_insn "andqi3" + [(set (match_operand:QI 0 "register_operand" "=d") + (and:QI (match_operand:QI 1 "register_operand" "%0") + (match_operand:QI 2 "nonmemory_operand" "d"))) + (clobber (reg:CC 33))] + "" + "nr\\t%0,%2" + [(set_attr "op_type" "RR") + (set_attr "atype" "reg")]) + +(define_insn "*andqi3_ss" + [(set (match_operand:QI 0 "s_operand" "=Qo,Qo") + (and:QI (match_dup 0) + (match_operand:QI 1 "s_imm_operand" "n,Qo"))) + (clobber (reg:CC 33))] + "" + "@ + ni\\t%0,%b1 + nc\\t%O0(1,%R0),%1" + [(set_attr "op_type" "SI,SS") + (set_attr "atype" "mem")]) + +(define_insn "*andqi3_ss_inv" + [(set (match_operand:QI 0 "s_operand" "=Qo,Qo") + (and:QI (match_operand:QI 1 "s_imm_operand" "n,Qo") + (match_dup 0))) + (clobber (reg:CC 33))] + "" + "@ + ni\\t%0,%b1 + nc\\t%O0(1,%R0),%1" + [(set_attr "op_type" "SI,SS") + (set_attr "atype" "mem")]) + + +;; +;;- Bit set (inclusive or) instructions. +;; + +; +; iordi3 instruction pattern(s). +; + +(define_insn "*iordi3_cc" + [(set (reg 33) + (compare (ior:DI (match_operand:DI 1 "register_operand" "%0,0") + (match_operand:DI 2 "general_operand" "d,m")) + (const_int 0))) + (set (match_operand:DI 0 "register_operand" "=d,d") + (ior:DI (match_dup 1) (match_dup 2)))] + "s390_match_ccmode(insn, CCTmode) && TARGET_64BIT" + "@ + ogr\\t%0,%2 + og\\t%0,%2" + [(set_attr "op_type" "RRE,RXE") + (set_attr "atype" "reg,mem")]) + +(define_insn "*iordi3_cconly" + [(set (reg 33) + (compare (ior:DI (match_operand:DI 1 "register_operand" "%0,0") + (match_operand:DI 2 "general_operand" "d,m")) + (const_int 0))) + (clobber (match_scratch:DI 0 "=d,d"))] + "s390_match_ccmode(insn, CCTmode) && TARGET_64BIT" + "@ + ogr\\t%0,%2 + og\\t%0,%2" + [(set_attr "op_type" "RRE,RXE") + (set_attr "atype" "reg,mem")]) + +(define_insn "*iordi3_oi" + [(set (match_operand:DI 0 "register_operand" "=d") + (ior:DI (match_operand:DI 1 "register_operand" "%0") + (match_operand:DI 2 "immediate_operand" "n"))) + (clobber (reg:CC 33))] + "TARGET_64BIT && s390_single_hi (operands[2], DImode, 0) >= 0" + "* +{ + int part = s390_single_hi (operands[2], DImode, 0); + operands[2] = GEN_INT (s390_extract_hi (operands[2], DImode, part)); + + switch (part) + { + case 0: return \"oihh\\t%0,%x2\"; + case 1: return \"oihl\\t%0,%x2\"; + case 2: return \"oilh\\t%0,%x2\"; + case 3: return \"oill\\t%0,%x2\"; + default: abort (); + } +}" + [(set_attr "op_type" "RI") + (set_attr "atype" "reg")]) + +(define_insn "iordi3" + [(set (match_operand:DI 0 "register_operand" "=d,d") + (ior:DI (match_operand:DI 1 "register_operand" "%0,0") + (match_operand:DI 2 "general_operand" "d,m"))) + (clobber (reg:CC 33))] + "TARGET_64BIT" + "@ + ogr\\t%0,%2 + og\\t%0,%2" + [(set_attr "op_type" "RRE,RXE") + (set_attr "atype" "reg,mem")]) + +(define_insn "*iordi3_ss" + [(set (match_operand:DI 0 "s_operand" "=Qo") + (ior:DI (match_dup 0) + (match_operand:DI 1 "s_imm_operand" "Qo"))) + (clobber (reg:CC 33))] + "" + "oc\\t%O0(8,%R0),%1" + [(set_attr "op_type" "SS") + (set_attr "atype" "mem")]) + +(define_insn "*iordi3_ss_inv" + [(set (match_operand:DI 0 "s_operand" "=Qo") + (ior:DI (match_operand:DI 1 "s_imm_operand" "Qo") + (match_dup 0))) + (clobber (reg:CC 33))] + "" + "oc\\t%O0(8,%R0),%1" + [(set_attr "op_type" "SS") + (set_attr "atype" "mem")]) + +; +; iorsi3 instruction pattern(s). +; + +(define_insn "*iorsi3_cc" + [(set (reg 33) + (compare (ior:SI (match_operand:SI 1 "register_operand" "%0,0") + (match_operand:SI 2 "general_operand" "d,m")) + (const_int 0))) + (set (match_operand:SI 0 "register_operand" "=d,d") + (ior:SI (match_dup 1) (match_dup 2)))] + "s390_match_ccmode(insn, CCTmode)" + "@ + or\\t%0,%2 + o\\t%0,%2" + [(set_attr "op_type" "RR,RX") + (set_attr "atype" "reg,mem")]) + +(define_insn "*iorsi3_cconly" + [(set (reg 33) + (compare (ior:SI (match_operand:SI 1 "register_operand" "%0,0") + (match_operand:SI 2 "general_operand" "d,m")) + (const_int 0))) + (clobber (match_scratch:SI 0 "=d,d"))] + "s390_match_ccmode(insn, CCTmode)" + "@ + or\\t%0,%2 + o\\t%0,%2" + [(set_attr "op_type" "RR,RX") + (set_attr "atype" "reg,mem")]) + +(define_insn "*iorsi3_oi" + [(set (match_operand:SI 0 "register_operand" "=d") + (ior:SI (match_operand:SI 1 "register_operand" "%0") + (match_operand:SI 2 "immediate_operand" "n"))) + (clobber (reg:CC 33))] + "TARGET_64BIT && s390_single_hi (operands[2], SImode, 0) >= 0" + "* +{ + int part = s390_single_hi (operands[2], SImode, 0); + operands[2] = GEN_INT (s390_extract_hi (operands[2], SImode, part)); + + switch (part) + { + case 0: return \"oilh\\t%0,%x2\"; + case 1: return \"oill\\t%0,%x2\"; + default: abort (); + } +}" + [(set_attr "op_type" "RI") + (set_attr "atype" "reg")]) + +(define_insn "iorsi3" + [(set (match_operand:SI 0 "register_operand" "=d,d") + (ior:SI (match_operand:SI 1 "register_operand" "%0,0") + (match_operand:SI 2 "general_operand" "d,m"))) + (clobber (reg:CC 33))] + "" + "@ + or\\t%0,%2 + o\\t%0,%2" + [(set_attr "op_type" "RR,RX") + (set_attr "atype" "reg,mem")]) + +(define_insn "*iorsi3_ss" + [(set (match_operand:SI 0 "s_operand" "=Qo") + (ior:SI (match_dup 0) + (match_operand:SI 1 "s_imm_operand" "Qo"))) + (clobber (reg:CC 33))] + "" + "oc\\t%O0(4,%R0),%1" + [(set_attr "op_type" "SS") + (set_attr "atype" "mem")]) + +(define_insn "*iorsi3_ss_inv" + [(set (match_operand:SI 0 "s_operand" "=Qo") + (ior:SI (match_operand:SI 1 "s_imm_operand" "Qo") + (match_dup 0))) + (clobber (reg:CC 33))] + "" + "oc\\t%O0(4,%R0),%1" + [(set_attr "op_type" "SS") + (set_attr "atype" "mem")]) + +; +; iorhi3 instruction pattern(s). +; + +(define_insn "*iorhi3_oi" + [(set (match_operand:HI 0 "register_operand" "=d,d") + (ior:HI (match_operand:HI 1 "register_operand" "%0,0") + (match_operand:HI 2 "nonmemory_operand" "d,n"))) + (clobber (reg:CC 33))] + "TARGET_64BIT" + "@ + or\\t%0,%2 + oill\\t%0,%x2" + [(set_attr "op_type" "RR,RI") + (set_attr "atype" "reg")]) + +(define_insn "iorhi3" + [(set (match_operand:HI 0 "register_operand" "=d") + (ior:HI (match_operand:HI 1 "register_operand" "%0") + (match_operand:HI 2 "nonmemory_operand" "d"))) + (clobber (reg:CC 33))] + "" + "or\\t%0,%2" + [(set_attr "op_type" "RR") + (set_attr "atype" "reg")]) + +(define_insn "*iorhi3_ss" + [(set (match_operand:HI 0 "s_operand" "=Qo") + (ior:HI (match_dup 0) + (match_operand:HI 1 "s_imm_operand" "Qo"))) + (clobber (reg:CC 33))] + "" + "oc\\t%O0(2,%R0),%1" + [(set_attr "op_type" "SS") + (set_attr "atype" "mem")]) + +(define_insn "*iorhi3_ss_inv" + [(set (match_operand:HI 0 "s_operand" "=Qo") + (ior:HI (match_operand:HI 1 "s_imm_operand" "Qo") + (match_dup 0))) + (clobber (reg:CC 33))] + "" + "oc\\t%O0(2,%R0),%1" + [(set_attr "op_type" "SS") + (set_attr "atype" "mem")]) + +; +; iorqi3 instruction pattern(s). +; + +(define_insn "*iorqi3_oi" + [(set (match_operand:QI 0 "register_operand" "=d,d") + (ior:QI (match_operand:QI 1 "register_operand" "%0,0") + (match_operand:QI 2 "nonmemory_operand" "d,n"))) + (clobber (reg:CC 33))] + "TARGET_64BIT" + "@ + or\\t%0,%2 + oill\\t%0,%b2" + [(set_attr "op_type" "RR,RI") + (set_attr "atype" "reg")]) + +(define_insn "iorqi3" + [(set (match_operand:QI 0 "register_operand" "=d") + (ior:QI (match_operand:QI 1 "register_operand" "%0") + (match_operand:QI 2 "nonmemory_operand" "d"))) + (clobber (reg:CC 33))] + "" + "or\\t%0,%2" + [(set_attr "op_type" "RR") + (set_attr "atype" "reg")]) + +(define_insn "*iorqi3_ss" + [(set (match_operand:QI 0 "s_operand" "=Qo,Qo") + (ior:QI (match_dup 0) + (match_operand:QI 1 "s_imm_operand" "n,Qo"))) + (clobber (reg:CC 33))] + "" + "@ + oi\\t%0,%b1 + oc\\t%O0(1,%R0),%1" + [(set_attr "op_type" "SI,SS") + (set_attr "atype" "reg,mem")]) + +(define_insn "*iorqi3_ss_inv" + [(set (match_operand:QI 0 "s_operand" "=Qo,Qo") + (ior:QI (match_operand:QI 1 "s_imm_operand" "n,Qo") + (match_dup 0))) + (clobber (reg:CC 33))] + "" + "@ + oi\\t%0,%b1 + oc\\t%O0(1,%R0),%1" + [(set_attr "op_type" "SI,SS") + (set_attr "atype" "reg,mem")]) + + +;; +;;- Xor instructions. +;; + +; +; xordi3 instruction pattern(s). +; + +(define_insn "*xordi3_cc" + [(set (reg 33) + (compare (xor:DI (match_operand:DI 1 "register_operand" "%0,0") + (match_operand:DI 2 "general_operand" "d,m")) + (const_int 0))) + (set (match_operand:DI 0 "register_operand" "=d,d") + (xor:DI (match_dup 1) (match_dup 2)))] + "s390_match_ccmode(insn, CCTmode) && TARGET_64BIT" + "@ + xgr\\t%0,%2 + xg\\t%0,%2" + [(set_attr "op_type" "RRE,RXE") + (set_attr "atype" "reg,mem")]) + +(define_insn "*xordi3_cconly" + [(set (reg 33) + (compare (xor:DI (match_operand:DI 1 "register_operand" "%0,0") + (match_operand:DI 2 "general_operand" "d,m")) + (const_int 0))) + (clobber (match_scratch:DI 0 "=d,d"))] + "s390_match_ccmode(insn, CCTmode) && TARGET_64BIT" + "@ + xgr\\t%0,%2 + xr\\t%0,%2" + [(set_attr "op_type" "RRE,RXE") + (set_attr "atype" "reg,mem")]) + +(define_insn "xordi3" + [(set (match_operand:DI 0 "register_operand" "=d,d") + (xor:DI (match_operand:DI 1 "register_operand" "%0,0") + (match_operand:DI 2 "general_operand" "d,m"))) + (clobber (reg:CC 33))] + "TARGET_64BIT" + "@ + xgr\\t%0,%2 + xg\\t%0,%2" + [(set_attr "op_type" "RRE,RXE") + (set_attr "atype" "reg,mem")]) + +(define_insn "*xordi3_ss" + [(set (match_operand:DI 0 "s_operand" "=Qo") + (xor:DI (match_dup 0) + (match_operand:DI 1 "s_imm_operand" "Qo"))) + (clobber (reg:CC 33))] + "" + "xc\\t%O0(8,%R0),%1" + [(set_attr "op_type" "SS") + (set_attr "atype" "mem")]) + +(define_insn "*xordi3_ss_inv" + [(set (match_operand:DI 0 "s_operand" "=Qo") + (xor:DI (match_operand:DI 1 "s_imm_operand" "Qo") + (match_dup 0))) + (clobber (reg:CC 33))] + "" + "xc\\t%O0(8,%R0),%1" + [(set_attr "op_type" "SS") + (set_attr "atype" "mem")]) + +; +; xorsi3 instruction pattern(s). +; + +(define_insn "*xorsi3_cc" + [(set (reg 33) + (compare (xor:SI (match_operand:SI 1 "register_operand" "%0,0") + (match_operand:SI 2 "general_operand" "d,m")) + (const_int 0))) + (set (match_operand:SI 0 "register_operand" "=d,d") + (xor:SI (match_dup 1) (match_dup 2)))] + "s390_match_ccmode(insn, CCTmode)" + "@ + xr\\t%0,%2 + x\\t%0,%2" + [(set_attr "op_type" "RR,RX") + (set_attr "atype" "reg,mem")]) + +(define_insn "*xorsi3_cconly" + [(set (reg 33) + (compare (xor:SI (match_operand:SI 1 "register_operand" "%0,0") + (match_operand:SI 2 "general_operand" "d,m")) + (const_int 0))) + (clobber (match_scratch:SI 0 "=d,d"))] + "s390_match_ccmode(insn, CCTmode)" + "@ + xr\\t%0,%2 + x\\t%0,%2" + [(set_attr "op_type" "RR,RX") + (set_attr "atype" "reg,mem")]) + +(define_insn "xorsi3" + [(set (match_operand:SI 0 "register_operand" "=d,d") + (xor:SI (match_operand:SI 1 "register_operand" "%0,0") + (match_operand:SI 2 "general_operand" "d,m"))) + (clobber (reg:CC 33))] + "" + "@ + xr\\t%0,%2 + x\\t%0,%2" + [(set_attr "op_type" "RR,RX") + (set_attr "atype" "reg,mem")]) + +(define_insn "*xorsi3_ss" + [(set (match_operand:SI 0 "s_operand" "=Qo") + (xor:SI (match_dup 0) + (match_operand:SI 1 "s_imm_operand" "Qo"))) + (clobber (reg:CC 33))] + "" + "xc\\t%O0(4,%R0),%1" + [(set_attr "op_type" "SS") + (set_attr "atype" "mem")]) + +(define_insn "*xorsi3_ss_inv" + [(set (match_operand:SI 0 "s_operand" "=Qo") + (xor:SI (match_operand:SI 1 "s_imm_operand" "Qo") + (match_dup 0))) + (clobber (reg:CC 33))] + "" + "xc\\t%O0(4,%R0),%1" + [(set_attr "op_type" "SS") + (set_attr "atype" "mem")]) + +; +; xorhi3 instruction pattern(s). +; + +(define_insn "xorhi3" + [(set (match_operand:HI 0 "register_operand" "=d") + (xor:HI (match_operand:HI 1 "register_operand" "%0") + (match_operand:HI 2 "nonmemory_operand" "d"))) + (clobber (reg:CC 33))] + "" + "xr\\t%0,%2" + [(set_attr "op_type" "RR") + (set_attr "atype" "reg")]) + +(define_insn "*xorhi3_ss" + [(set (match_operand:HI 0 "s_operand" "=Qo") + (xor:HI (match_dup 0) + (match_operand:HI 1 "s_imm_operand" "Qo"))) + (clobber (reg:CC 33))] + "" + "xc\\t%O0(2,%R0),%1" + [(set_attr "op_type" "SS") + (set_attr "atype" "mem")]) + +(define_insn "*xorhi3_ss_inv" + [(set (match_operand:HI 0 "s_operand" "=Qo") + (xor:HI (match_operand:HI 1 "s_imm_operand" "Qo") + (match_dup 0))) + (clobber (reg:CC 33))] + "" + "xc\\t%O0(2,%R0),%1" + [(set_attr "op_type" "SS") + (set_attr "atype" "mem")]) + +; +; xorqi3 instruction pattern(s). +; + +(define_insn "xorqi3" + [(set (match_operand:QI 0 "register_operand" "=d") + (xor:QI (match_operand:QI 1 "register_operand" "%0") + (match_operand:QI 2 "nonmemory_operand" "d"))) + (clobber (reg:CC 33))] + "" + "xr\\t%0,%2" + [(set_attr "op_type" "RR") + (set_attr "atype" "reg")]) + +(define_insn "*xorqi3_ss" + [(set (match_operand:QI 0 "s_operand" "=Qo,Qo") + (xor:QI (match_dup 0) + (match_operand:QI 1 "s_imm_operand" "n,Qo"))) + (clobber (reg:CC 33))] + "" + "@ + xi\\t%0,%b1 + xc\\t%O0(1,%R0),%1" + [(set_attr "op_type" "SI,SS") + (set_attr "atype" "mem")]) + +(define_insn "*xorqi3_ss_inv" + [(set (match_operand:QI 0 "s_operand" "=Qo,Qo") + (xor:QI (match_operand:QI 1 "s_imm_operand" "n,Qo") + (match_dup 0))) + (clobber (reg:CC 33))] + "" + "@ + xi\\t%0,%b1 + xc\\t%O0(1,%R0),%1" + [(set_attr "op_type" "SI,SS") + (set_attr "atype" "mem")]) + + +;; +;;- Negate instructions. +;; + +; +; negdi2 instruction pattern(s). +; + +(define_expand "negdi2" + [(parallel + [(set (match_operand:DI 0 "register_operand" "=d") + (neg:DI (match_operand:DI 1 "register_operand" "d"))) + (clobber (reg:CC 33))])] + "" + "") + +(define_insn "*negdi2_64" + [(set (match_operand:DI 0 "register_operand" "=d") + (neg:DI (match_operand:DI 1 "register_operand" "d"))) + (clobber (reg:CC 33))] + "TARGET_64BIT" + "lcgr\\t%0,%1" + [(set_attr "op_type" "RR")]) + +(define_insn "*negdi2_31" + [(set (match_operand:DI 0 "register_operand" "=d") + (neg:DI (match_operand:DI 1 "register_operand" "d"))) + (clobber (reg:CC 33))] + "!TARGET_64BIT" + "* +{ + rtx xop[1]; + xop[0] = gen_label_rtx (); + output_asm_insn (\"lcr\\t%0,%1\", operands); + output_asm_insn (\"lcr\\t%N0,%N1\", operands); + output_asm_insn (\"je\\t%l0\", xop); + output_asm_insn (\"bctr\\t%0,0\", operands); + ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", + CODE_LABEL_NUMBER (xop[0])); + return \"\"; +}" + [(set_attr "op_type" "NN") + (set_attr "type" "other") + (set_attr "length" "10")]) + +; +; negsi2 instruction pattern(s). +; + +(define_insn "negsi2" + [(set (match_operand:SI 0 "register_operand" "=d") + (neg:SI (match_operand:SI 1 "register_operand" "d"))) + (clobber (reg:CC 33))] + "" + "lcr\\t%0,%1" + [(set_attr "op_type" "RR")]) + +; +; negdf2 instruction pattern(s). +; + +(define_expand "negdf2" + [(parallel + [(set (match_operand:DF 0 "register_operand" "=f") + (neg:DF (match_operand:DF 1 "register_operand" "f"))) + (clobber (reg:CC 33))])] + "TARGET_HARD_FLOAT" + "") + +(define_insn "*negdf2" + [(set (match_operand:DF 0 "register_operand" "=f") + (neg:DF (match_operand:DF 1 "register_operand" "f"))) + (clobber (reg:CC 33))] + "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" + "lcdbr\\t%0,%1" + [(set_attr "op_type" "RRE")]) + +(define_insn "*negdf2_ibm" + [(set (match_operand:DF 0 "register_operand" "=f") + (neg:DF (match_operand:DF 1 "register_operand" "f"))) + (clobber (reg:CC 33))] + "TARGET_HARD_FLOAT && TARGET_IBM_FLOAT" + "lcdr\\t%0,%1" + [(set_attr "op_type" "RR")]) + +; +; negsf2 instruction pattern(s). +; + +(define_expand "negsf2" + [(parallel + [(set (match_operand:SF 0 "register_operand" "=f") + (neg:SF (match_operand:SF 1 "register_operand" "f"))) + (clobber (reg:CC 33))])] + "TARGET_HARD_FLOAT" + "") + +(define_insn "*negsf2" + [(set (match_operand:SF 0 "register_operand" "=f") + (neg:SF (match_operand:SF 1 "register_operand" "f"))) + (clobber (reg:CC 33))] + "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" + "lcebr\\t%0,%1" + [(set_attr "op_type" "RRE")]) + +(define_insn "*negsf2" + [(set (match_operand:SF 0 "register_operand" "=f") + (neg:SF (match_operand:SF 1 "register_operand" "f"))) + (clobber (reg:CC 33))] + "TARGET_HARD_FLOAT && TARGET_IBM_FLOAT" + "lcer\\t%0,%1" + [(set_attr "op_type" "RR")]) + + +;; +;;- Absolute value instructions. +;; + +; +; absdi2 instruction pattern(s). +; + +(define_insn "absdi2" + [(set (match_operand:DI 0 "register_operand" "=d") + (abs:DI (match_operand:DI 1 "register_operand" "d"))) + (clobber (reg:CC 33))] + "TARGET_64BIT" + "lpgr\\t%0,%1" + [(set_attr "op_type" "RRE")]) + +; +; abssi2 instruction pattern(s). +; + +(define_insn "abssi2" + [(set (match_operand:SI 0 "register_operand" "=d") + (abs:SI (match_operand:SI 1 "register_operand" "d"))) + (clobber (reg:CC 33))] + "" + "lpr\\t%0,%1" + [(set_attr "op_type" "RR")]) + +; +; absdf2 instruction pattern(s). +; + +(define_expand "absdf2" + [(parallel + [(set (match_operand:DF 0 "register_operand" "=f") + (abs:DF (match_operand:DF 1 "register_operand" "f"))) + (clobber (reg:CC 33))])] + "TARGET_HARD_FLOAT" + "") + +(define_insn "*absdf2" + [(set (match_operand:DF 0 "register_operand" "=f") + (abs:DF (match_operand:DF 1 "register_operand" "f"))) + (clobber (reg:CC 33))] + "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" + "lpdbr\\t%0,%1" + [(set_attr "op_type" "RRE")]) + +(define_insn "*absdf2_ibm" + [(set (match_operand:DF 0 "register_operand" "=f") + (abs:DF (match_operand:DF 1 "register_operand" "f"))) + (clobber (reg:CC 33))] + "TARGET_HARD_FLOAT && TARGET_IBM_FLOAT" + "lpdr\\t%0,%1" + [(set_attr "op_type" "RR")]) + +; +; abssf2 instruction pattern(s). +; + +(define_expand "abssf2" + [(parallel + [(set (match_operand:SF 0 "register_operand" "=f") + (abs:SF (match_operand:SF 1 "register_operand" "f"))) + (clobber (reg:CC 33))])] + "TARGET_HARD_FLOAT" + "") + +(define_insn "*abssf2" + [(set (match_operand:SF 0 "register_operand" "=f") + (abs:SF (match_operand:SF 1 "register_operand" "f"))) + (clobber (reg:CC 33))] + "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" + "lpebr\\t%0,%1" + [(set_attr "op_type" "RRE")]) + +(define_insn "*abssf2_ibm" + [(set (match_operand:SF 0 "register_operand" "=f") + (abs:SF (match_operand:SF 1 "register_operand" "f"))) + (clobber (reg:CC 33))] + "TARGET_HARD_FLOAT && TARGET_IBM_FLOAT" + "lper\\t%0,%1" + [(set_attr "op_type" "RR")]) + +;; +;;- Square root instructions. +;; + +; +; sqrtdf2 instruction pattern(s). +; + +(define_insn "sqrtdf2" + [(set (match_operand:DF 0 "register_operand" "=f,f") + (sqrt:DF (match_operand:DF 1 "general_operand" "f,m")))] + "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" + "@ + sqdbr\\t%0,%1 + sqdb\\t%0,%1" + [(set_attr "op_type" "RRE,RSE")]) + +; +; sqrtsf2 instruction pattern(s). +; + +(define_insn "sqrtsf2" + [(set (match_operand:SF 0 "register_operand" "=f,f") + (sqrt:SF (match_operand:SF 1 "general_operand" "f,m")))] + "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" + "@ + sqebr\\t%0,%1 + sqeb\\t%0,%1" + [(set_attr "op_type" "RRE,RSE")]) + +;; +;;- One complement instructions. +;; + +; +; one_cmpldi2 instruction pattern(s). +; + +(define_expand "one_cmpldi2" + [(parallel + [(set (match_operand:DI 0 "register_operand" "") + (xor:DI (match_operand:DI 1 "register_operand" "") + (const_int -1))) + (clobber (reg:CC 33))])] + "TARGET_64BIT" + "") + +; +; one_cmplsi2 instruction pattern(s). +; + +(define_expand "one_cmplsi2" + [(parallel + [(set (match_operand:SI 0 "register_operand" "") + (xor:SI (match_operand:SI 1 "register_operand" "") + (const_int -1))) + (clobber (reg:CC 33))])] + "" + "") + +; +; one_cmplhi2 instruction pattern(s). +; + +(define_expand "one_cmplhi2" + [(parallel + [(set (match_operand:HI 0 "register_operand" "") + (xor:HI (match_operand:HI 1 "register_operand" "") + (const_int -1))) + (clobber (reg:CC 33))])] + "" + "") + +; +; one_cmplqi2 instruction pattern(s). +; + +(define_expand "one_cmplqi2" + [(parallel + [(set (match_operand:QI 0 "register_operand" "") + (xor:QI (match_operand:QI 1 "register_operand" "") + (const_int -1))) + (clobber (reg:CC 33))])] + "" + "") + + +;; +;;- Rotate instructions. +;; + +; +; rotldi3 instruction pattern(s). +; + +(define_insn "rotldi3" + [(set (match_operand:DI 0 "register_operand" "=d,d") + (rotate:DI (match_operand:DI 1 "register_operand" "d,d") + (match_operand:SI 2 "nonmemory_operand" "J,a")))] + "TARGET_64BIT" + "@ + rllg\\t%0,%1,%c2 + rllg\\t%0,%1,0(%2)" + [(set_attr "op_type" "RSE")]) + +; +; rotlsi3 instruction pattern(s). +; + +(define_insn "rotlsi3" + [(set (match_operand:SI 0 "register_operand" "=d,d") + (rotate:SI (match_operand:SI 1 "register_operand" "d,d") + (match_operand:SI 2 "nonmemory_operand" "J,a")))] + "TARGET_64BIT" + "@ + rll\\t%0,%1,%c2 + rll\\t%0,%1,0(%2)" + [(set_attr "op_type" "RSE")]) + + +;; +;;- Arithmetic shift instructions. +;; + +; +; ashldi3 instruction pattern(s). +; + +(define_expand "ashldi3" + [(set (match_operand:DI 0 "register_operand" "") + (ashift:DI (match_operand:DI 1 "register_operand" "") + (match_operand:SI 2 "nonmemory_operand" "")))] + "" + "") + +(define_insn "*ashldi3_31" + [(set (match_operand:DI 0 "register_operand" "=d,d") + (ashift:DI (match_operand:DI 1 "register_operand" "0,0") + (match_operand:SI 2 "nonmemory_operand" "J,a")))] + "!TARGET_64BIT" + "@ + sldl\\t%0,%c2 + sldl\\t%0,0(%2)" + [(set_attr "op_type" "RS")]) + +(define_insn "*ashldi3_64" + [(set (match_operand:DI 0 "register_operand" "=d,d") + (ashift:DI (match_operand:DI 1 "register_operand" "d,d") + (match_operand:SI 2 "nonmemory_operand" "J,a")))] + "TARGET_64BIT" + "@ + sllg\\t%0,%1,%2 + sllg\\t%0,%1,0(%2)" + [(set_attr "op_type" "RSE")]) + +; +; ashrdi3 instruction pattern(s). +; + +(define_expand "ashrdi3" + [(parallel + [(set (match_operand:DI 0 "register_operand" "") + (ashiftrt:DI (match_operand:DI 1 "register_operand" "") + (match_operand:SI 2 "nonmemory_operand" ""))) + (clobber (reg:CC 33))])] + "" + "") + +(define_insn "*ashrdi3_cc_31" + [(set (reg 33) + (compare (ashiftrt:DI (match_operand:DI 1 "register_operand" "0,0") + (match_operand:SI 2 "nonmemory_operand" "J,a")) + (const_int 0))) + (set (match_operand:DI 0 "register_operand" "=d,d") + (ashiftrt:DI (match_dup 1) (match_dup 2)))] + "!TARGET_64BIT && s390_match_ccmode(insn, CCSmode)" + "@ + srda\\t%0,%c2 + srda\\t%0,0(%2)" + [(set_attr "op_type" "RS")]) + +(define_insn "*ashrdi3_cconly_31" + [(set (reg 33) + (compare (ashiftrt:DI (match_operand:DI 1 "register_operand" "0,0") + (match_operand:SI 2 "nonmemory_operand" "J,a")) + (const_int 0))) + (clobber (match_scratch:DI 0 "=d,d"))] + "!TARGET_64BIT && s390_match_ccmode(insn, CCSmode)" + "@ + srda\\t%0,%c2 + srda\\t%0,0(%2)" + [(set_attr "op_type" "RS")]) + +(define_insn "*ashrdi3_31" + [(set (match_operand:DI 0 "register_operand" "=d,d") + (ashiftrt:DI (match_operand:DI 1 "register_operand" "0,0") + (match_operand:SI 2 "nonmemory_operand" "J,a"))) + (clobber (reg:CC 33))] + "!TARGET_64BIT" + "@ + srda\\t%0,%c2 + srda\\t%0,0(%2)" + [(set_attr "op_type" "RS")]) + +(define_insn "*ashrdi3_cc_64" + [(set (reg 33) + (compare (ashiftrt:DI (match_operand:DI 1 "register_operand" "d,d") + (match_operand:SI 2 "nonmemory_operand" "J,a")) + (const_int 0))) + (set (match_operand:DI 0 "register_operand" "=d,d") + (ashiftrt:DI (match_dup 1) (match_dup 2)))] + "s390_match_ccmode(insn, CCSmode) && TARGET_64BIT" + "@ + srag\\t%0,%1,%c2 + srag\\t%0,%1,0(%2)" + [(set_attr "op_type" "RSE")]) + +(define_insn "*ashrdi3_cconly_64" + [(set (reg 33) + (compare (ashiftrt:DI (match_operand:DI 1 "register_operand" "d,d") + (match_operand:SI 2 "nonmemory_operand" "J,a")) + (const_int 0))) + (clobber (match_scratch:DI 0 "=d,d"))] + "s390_match_ccmode(insn, CCSmode) && TARGET_64BIT" + "@ + srag\\t%0,%1,%c2 + srag\\t%0,%1,0(%2)" + [(set_attr "op_type" "RSE")]) + +(define_insn "*ashrdi3_64" + [(set (match_operand:DI 0 "register_operand" "=d,d") + (ashiftrt:DI (match_operand:DI 1 "register_operand" "d,d") + (match_operand:SI 2 "nonmemory_operand" "J,a"))) + (clobber (reg:CC 33))] + "TARGET_64BIT" + "@ + srag\\t%0,%1,%c2 + srag\\t%0,%1,0(%2)" + [(set_attr "op_type" "RSE")]) + +; +; ashlsi3 instruction pattern(s). +; + +(define_insn "ashlsi3" + [(set (match_operand:SI 0 "register_operand" "=d,d") + (ashift:SI (match_operand:SI 1 "register_operand" "0,0") + (match_operand:SI 2 "nonmemory_operand" "J,a")))] + "" + "@ + sll\\t%0,%c2 + sll\\t%0,0(%2)" + [(set_attr "op_type" "RS")]) + +; +; ashrsi3 instruction pattern(s). +; + +(define_insn "*ashrsi3_cc" + [(set (reg 33) + (compare (ashiftrt:SI (match_operand:SI 1 "register_operand" "0,0") + (match_operand:SI 2 "nonmemory_operand" "J,a")) + (const_int 0))) + (set (match_operand:SI 0 "register_operand" "=d,d") + (ashiftrt:SI (match_dup 1) (match_dup 2)))] + "s390_match_ccmode(insn, CCSmode)" + "@ + sra\\t%0,%c2 + sra\\t%0,0(%2)" + [(set_attr "op_type" "RS")]) + +(define_insn "*ashrsi3_cconly" + [(set (reg 33) + (compare (ashiftrt:SI (match_operand:SI 1 "register_operand" "0,0") + (match_operand:SI 2 "nonmemory_operand" "J,a")) + (const_int 0))) + (clobber (match_scratch:SI 0 "=d,d"))] + "s390_match_ccmode(insn, CCSmode)" + "@ + sra\\t%0,%c2 + sra\\t%0,0(%2)" + [(set_attr "op_type" "RS")]) + +(define_insn "ashrsi3" + [(set (match_operand:SI 0 "register_operand" "=d,d") + (ashiftrt:SI (match_operand:SI 1 "register_operand" "0,0") + (match_operand:SI 2 "nonmemory_operand" "J,a"))) + (clobber (reg:CC 33))] + "" + "@ + sra\\t%0,%c2 + sra\\t%0,0(%2)" + [(set_attr "op_type" "RS")]) + + +;; +;;- logical shift instructions. +;; + +; +; lshrdi3 instruction pattern(s). +; + +(define_expand "lshrdi3" + [(set (match_operand:DI 0 "register_operand" "") + (lshiftrt:DI (match_operand:DI 1 "register_operand" "") + (match_operand:SI 2 "nonmemory_operand" "")))] + "" + "") + +(define_insn "*lshrdi3_31" + [(set (match_operand:DI 0 "register_operand" "=d,d") + (lshiftrt:DI (match_operand:DI 1 "register_operand" "0,0") + (match_operand:SI 2 "nonmemory_operand" "J,a")))] + "!TARGET_64BIT" + "@ + srdl\\t%0,%c2 + srdl\\t%0,0(%2)" + [(set_attr "op_type" "RS,RS")]) + +(define_insn "*lshrdi3_64" + [(set (match_operand:DI 0 "register_operand" "=d,d") + (lshiftrt:DI (match_operand:DI 1 "register_operand" "d,d") + (match_operand:SI 2 "nonmemory_operand" "J,a")))] + "TARGET_64BIT" + "@ + srlg\\t%0,%1,%c2 + srlg\\t%0,%1,0(%2)" + [(set_attr "op_type" "RSE,RSE")]) + +; +; lshrsi3 instruction pattern(s). +; + +(define_insn "lshrsi3" + [(set (match_operand:SI 0 "register_operand" "=d,d") + (lshiftrt:SI (match_operand:SI 1 "register_operand" "0,0") + (match_operand:SI 2 "nonmemory_operand" "J,a")))] + "" + "@ + srl\\t%0,%c2 + srl\\t%0,0(%2)" + [(set_attr "op_type" "RS")]) + + +;; +;; Branch instruction patterns. +;; + +(define_expand "beq" + [(set (reg:CCZ 33) (compare:CCZ (match_dup 1) (match_dup 2))) + (set (pc) + (if_then_else (eq (reg:CCZ 33) (const_int 0)) + (label_ref (match_operand 0 "" "")) + (pc)))] + "" + "{ operands[1] = s390_compare_op0; operands[2] = s390_compare_op1; }") + +(define_expand "bne" + [(set (reg:CCZ 33) (compare:CCZ (match_dup 1) (match_dup 2))) + (set (pc) + (if_then_else (ne (reg:CCZ 33) (const_int 0)) + (label_ref (match_operand 0 "" "")) + (pc)))] + "" + "{ operands[1] = s390_compare_op0; operands[2] = s390_compare_op1; }") + +(define_expand "bgt" + [(set (reg:CCS 33) (compare:CCS (match_dup 1) (match_dup 2))) + (set (pc) + (if_then_else (gt (reg:CCS 33) (const_int 0)) + (label_ref (match_operand 0 "" "")) + (pc)))] + "" + "{ operands[1] = s390_compare_op0; operands[2] = s390_compare_op1; }") + +(define_expand "bgtu" + [(set (reg:CCU 33) (compare:CCU (match_dup 1) (match_dup 2))) + (set (pc) + (if_then_else (gtu (reg:CCU 33) (const_int 0)) + (label_ref (match_operand 0 "" "")) + (pc)))] + "" + "{ operands[1] = s390_compare_op0; operands[2] = s390_compare_op1; }") + +(define_expand "blt" + [(set (reg:CCS 33) (compare:CCS (match_dup 1) (match_dup 2))) + (set (pc) + (if_then_else (lt (reg:CCS 33) (const_int 0)) + (label_ref (match_operand 0 "" "")) + (pc)))] + "" + "{ operands[1] = s390_compare_op0; operands[2] = s390_compare_op1; }") + +(define_expand "bltu" + [(set (reg:CCU 33) (compare:CCU (match_dup 1) (match_dup 2))) + (set (pc) + (if_then_else (ltu (reg:CCU 33) (const_int 0)) + (label_ref (match_operand 0 "" "")) + (pc)))] + "" + "{ operands[1] = s390_compare_op0; operands[2] = s390_compare_op1; }") + +(define_expand "bge" + [(set (reg:CCS 33) (compare:CCS (match_dup 1) (match_dup 2))) + (set (pc) + (if_then_else (ge (reg:CCS 33) (const_int 0)) + (label_ref (match_operand 0 "" "")) + (pc)))] + "" + "{ operands[1] = s390_compare_op0; operands[2] = s390_compare_op1; }") + +(define_expand "bgeu" + [(set (reg:CCU 33) (compare:CCU (match_dup 1) (match_dup 2))) + (set (pc) + (if_then_else (geu (reg:CCU 33) (const_int 0)) + (label_ref (match_operand 0 "" "")) + (pc)))] + "" + "{ operands[1] = s390_compare_op0; operands[2] = s390_compare_op1; }") + +(define_expand "ble" + [(set (reg:CCS 33) (compare:CCS (match_dup 1) (match_dup 2))) + (set (pc) + (if_then_else (le (reg:CCS 33) (const_int 0)) + (label_ref (match_operand 0 "" "")) + (pc)))] + "" + "{ operands[1] = s390_compare_op0; operands[2] = s390_compare_op1; }") + +(define_expand "bleu" + [(set (reg:CCU 33) (compare:CCU (match_dup 1) (match_dup 2))) + (set (pc) + (if_then_else (leu (reg:CCU 33) (const_int 0)) + (label_ref (match_operand 0 "" "")) + (pc)))] + "" + "{ operands[1] = s390_compare_op0; operands[2] = s390_compare_op1; }") + +(define_expand "bunordered" + [(set (reg:CCS 33) (compare:CCS (match_dup 1) (match_dup 2))) + (set (pc) + (if_then_else (unordered (reg:CCS 33) (const_int 0)) + (label_ref (match_operand 0 "" "")) + (pc)))] + "" + "{ operands[1] = s390_compare_op0; operands[2] = s390_compare_op1; }") + +(define_expand "bordered" + [(set (reg:CCS 33) (compare:CCS (match_dup 1) (match_dup 2))) + (set (pc) + (if_then_else (ordered (reg:CCS 33) (const_int 0)) + (label_ref (match_operand 0 "" "")) + (pc)))] + "" + "{ operands[1] = s390_compare_op0; operands[2] = s390_compare_op1; }") + +(define_expand "buneq" + [(set (reg:CCS 33) (compare:CCS (match_dup 1) (match_dup 2))) + (set (pc) + (if_then_else (uneq (reg:CCS 33) (const_int 0)) + (label_ref (match_operand 0 "" "")) + (pc)))] + "" + "{ operands[1] = s390_compare_op0; operands[2] = s390_compare_op1; }") + +(define_expand "bungt" + [(set (reg:CCS 33) (compare:CCS (match_dup 1) (match_dup 2))) + (set (pc) + (if_then_else (ungt (reg:CCS 33) (const_int 0)) + (label_ref (match_operand 0 "" "")) + (pc)))] + "" + "{ operands[1] = s390_compare_op0; operands[2] = s390_compare_op1; }") + +(define_expand "bunlt" + [(set (reg:CCS 33) (compare:CCS (match_dup 1) (match_dup 2))) + (set (pc) + (if_then_else (unlt (reg:CCS 33) (const_int 0)) + (label_ref (match_operand 0 "" "")) + (pc)))] + "" + "{ operands[1] = s390_compare_op0; operands[2] = s390_compare_op1; }") + +(define_expand "bunge" + [(set (reg:CCS 33) (compare:CCS (match_dup 1) (match_dup 2))) + (set (pc) + (if_then_else (unge (reg:CCS 33) (const_int 0)) + (label_ref (match_operand 0 "" "")) + (pc)))] + "" + "{ operands[1] = s390_compare_op0; operands[2] = s390_compare_op1; }") + +(define_expand "bunle" + [(set (reg:CCS 33) (compare:CCS (match_dup 1) (match_dup 2))) + (set (pc) + (if_then_else (unle (reg:CCS 33) (const_int 0)) + (label_ref (match_operand 0 "" "")) + (pc)))] + "" + "{ operands[1] = s390_compare_op0; operands[2] = s390_compare_op1; }") + +(define_expand "bltgt" + [(set (reg:CCS 33) (compare:CCS (match_dup 1) (match_dup 2))) + (set (pc) + (if_then_else (ltgt (reg:CCS 33) (const_int 0)) + (label_ref (match_operand 0 "" "")) + (pc)))] + "" + "{ operands[1] = s390_compare_op0; operands[2] = s390_compare_op1; }") + + +;; +;;- Conditional jump instructions. +;; + +(define_insn "cjump" + [(set (pc) + (if_then_else + (match_operator 1 "comparison_operator" [(reg 33) (const_int 0)]) + (label_ref (match_operand 0 "" "")) + (pc)))] + "" + "* +{ + if (get_attr_length (insn) == 4) + return \"j%C1\\t%l0\"; + else if (TARGET_64BIT) + return \"jg%C1\\t%l0\"; + else + abort (); +}" + [(set_attr "op_type" "RI") + (set (attr "length") + (cond [(lt (abs (minus (pc) (match_dup 0))) (const_int 60000)) + (const_int 4) + (ne (symbol_ref "TARGET_64BIT") (const_int 0)) + (const_int 6) + (ne (symbol_ref "s390_pool_overflow") (const_int 0)) + (if_then_else (eq (symbol_ref "flag_pic") (const_int 0)) + (const_int 12) (const_int 14)) + (eq (symbol_ref "flag_pic") (const_int 0)) + (const_int 6)] (const_int 8)))]) + +(define_insn "*cjump_long" + [(set (pc) + (if_then_else + (match_operator 1 "comparison_operator" [(reg 33) (const_int 0)]) + (match_operand 0 "address_operand" "p") + (pc)))] + "" + "* +{ + if (get_attr_op_type (insn) == OP_TYPE_RR) + return \"b%C1r\\t%0\"; + else + return \"b%C1\\t%a0\"; +}" + [(set (attr "op_type") + (if_then_else (match_operand 0 "register_operand" "") + (const_string "RR") (const_string "RX"))) + (set_attr "atype" "mem")]) + + +;; +;;- Negated conditional jump instructions. +;; + +(define_insn "icjump" + [(set (pc) + (if_then_else + (match_operator 1 "comparison_operator" [(reg 33) (const_int 0)]) + (pc) + (label_ref (match_operand 0 "" ""))))] + "" + "* +{ + if (get_attr_length (insn) == 4) + return \"j%D1\\t%l0\"; + else if (TARGET_64BIT) + return \"jg%D1\\t%l0\"; + else + abort (); +}" + [(set_attr "op_type" "RI") + (set (attr "length") + (cond [(lt (abs (minus (pc) (match_dup 0))) (const_int 60000)) + (const_int 4) + (ne (symbol_ref "TARGET_64BIT") (const_int 0)) + (const_int 6) + (ne (symbol_ref "s390_pool_overflow") (const_int 0)) + (if_then_else (eq (symbol_ref "flag_pic") (const_int 0)) + (const_int 12) (const_int 14)) + (eq (symbol_ref "flag_pic") (const_int 0)) + (const_int 6)] (const_int 8)))]) + +(define_insn "*icjump_long" + [(set (pc) + (if_then_else + (match_operator 1 "comparison_operator" [(reg 33) (const_int 0)]) + (pc) + (match_operand 0 "address_operand" "p")))] + "" + "* +{ + if (get_attr_op_type (insn) == OP_TYPE_RR) + return \"b%D1r\\t%0\"; + else + return \"b%D1\\t%a0\"; +}" + [(set (attr "op_type") + (if_then_else (match_operand 0 "register_operand" "") + (const_string "RR") (const_string "RX"))) + (set_attr "atype" "mem")]) + + +;; +;;- Subtract one and jump if not zero. +;; + +;(define_expand "decrement_and_branch_on_count" +; [(use (match_operand 0 "register_operand" "")) +; (use (label_ref (match_operand 1 "" "")))] +; "" +; " +;{ +;/* if (TARGET_64BIT) +; emit_jump_insn (gen_brctdi (operands[0], operands[1])); +; else */ +; emit_jump_insn (gen_brctsi (operands[0], operands[1])); +; DONE; +;}") +; +;(define_insn "brctsi" +; [(set (pc) +; (if_then_else +; (ne (match_operand:SI 0 "register_operand" "+a") +; (const_int 1)) +; (label_ref (match_operand 1 "" "")) +; (pc))) +; (set (match_dup 0) +; (plus:SI (match_dup 0) (const_int -1)))] +; "" +; "brct\\t%0,%l1" +; [(set_attr "op_type" "RI") +; (set_attr "type" "branch")] +;) +; +;(define_insn "ibrctsi" +; [(set (pc) +; (if_then_else +; (eq (match_operand:SI 0 "register_operand" "+a") +; (const_int 1)) +; (pc) +; (label_ref (match_operand 1 "" "")))) +; (set (match_dup 0) +; (plus:SI (match_dup 0) (const_int -1)))] +; "" +; "brct\\t%0,%l1" +; [(set_attr "op_type" "RI") +; (set_attr "type" "branch")] +;) + + +;; +;;- Unconditional jump instructions. +;; + +; +; jump instruction pattern(s). +; + +(define_insn "jump" + [(set (pc) (label_ref (match_operand 0 "" "")))] + "" + "* +{ + if (get_attr_length (insn) == 4) + return \"j\\t%l0\"; + else if (TARGET_64BIT) + return \"jg\\t%l0\"; + else + abort (); +}" + [(set_attr "op_type" "RI") + (set (attr "length") + (cond [(lt (abs (minus (pc) (match_dup 0))) (const_int 60000)) + (const_int 4) + (ne (symbol_ref "TARGET_64BIT") (const_int 0)) + (const_int 6) + (eq (symbol_ref "flag_pic") (const_int 0)) + (const_int 6)] (const_int 8)))]) + +; +; indirect-jump instruction pattern(s). +; + +(define_insn "indirect_jump" + [(set (pc) (match_operand 0 "address_operand" "p"))] + "" + "* +{ + if (get_attr_op_type (insn) == OP_TYPE_RR) + return \"br\\t%0\"; + else + return \"b\\t%a0\"; +}" + [(set (attr "op_type") + (if_then_else (match_operand 0 "register_operand" "") + (const_string "RR") (const_string "RX"))) + (set_attr "atype" "mem")]) + +; +; casesi instruction pattern(s). +; + +(define_insn "casesi_jump" + [(set (pc) (match_operand 0 "address_operand" "p")) + (use (label_ref (match_operand 1 "" "")))] + "" + "* +{ + if (get_attr_op_type (insn) == OP_TYPE_RR) + return \"br\\t%0\"; + else + return \"b\\t%a0\"; +}" + [(set (attr "op_type") + (if_then_else (match_operand 0 "register_operand" "") + (const_string "RR") (const_string "RX"))) + (set_attr "atype" "mem")]) + +(define_expand "casesi" + [(match_operand:SI 0 "general_operand" "") + (match_operand:SI 1 "general_operand" "") + (match_operand:SI 2 "general_operand" "") + (label_ref (match_operand 3 "" "")) + (label_ref (match_operand 4 "" ""))] + "" + " +{ + rtx index = gen_reg_rtx (SImode); + rtx base = gen_reg_rtx (Pmode); + rtx target = gen_reg_rtx (Pmode); + + emit_move_insn (index, operands[0]); + emit_insn (gen_subsi3 (index, index, operands[1])); + emit_cmp_and_jump_insns (index, operands[2], GTU, NULL_RTX, SImode, 1, + operands[4]); + + if (Pmode != SImode) + index = convert_to_mode (Pmode, index, 1); + if (GET_CODE (index) != REG) + index = copy_to_mode_reg (Pmode, index); + + if (TARGET_64BIT) + emit_insn (gen_ashldi3 (index, index, GEN_INT (3))); + else + emit_insn (gen_ashlsi3 (index, index, GEN_INT (2))); + + emit_move_insn (base, gen_rtx_LABEL_REF (Pmode, operands[3])); + + index = gen_rtx_MEM (Pmode, gen_rtx_PLUS (Pmode, base, index)); + emit_move_insn (target, index); + + if (flag_pic) + target = gen_rtx_PLUS (Pmode, base, target); + emit_jump_insn (gen_casesi_jump (target, operands[3])); + + DONE; +}") + + +;; +;;- Jump to subroutine. +;; +;; + +; +; untyped call instruction pattern(s). +; + +;; Call subroutine returning any type. +(define_expand "untyped_call" + [(parallel [(call (match_operand 0 "" "") + (const_int 0)) + (match_operand 1 "" "") + (match_operand 2 "" "")])] + "" + " +{ + int i; + + emit_call_insn (gen_call (operands[0], const0_rtx, const0_rtx)); + + for (i = 0; i < XVECLEN (operands[2], 0); i++) + { + rtx set = XVECEXP (operands[2], 0, i); + emit_move_insn (SET_DEST (set), SET_SRC (set)); + } + + /* The optimizer does not know that the call sets the function value + registers we stored in the result block. We avoid problems by + claiming that all hard registers are used and clobbered at this + point. */ + emit_insn (gen_blockage ()); + + DONE; +}") + +;; UNSPEC_VOLATILE is considered to use and clobber all hard registers and +;; all of memory. This blocks insns from being moved across this point. + +(define_insn "blockage" + [(unspec_volatile [(const_int 0)] 0)] + "" + "" + [(set_attr "type" "none")]) + + + +; +; call instruction pattern(s). +; + +(define_expand "call" + [(call (match_operand 0 "" "") + (match_operand 1 "" "")) + (use (match_operand 2 "" ""))] + "" + " +{ + int plt_call = 0; + rtx insn; + + /* Direct function calls need special treatment. */ + if (GET_CODE (XEXP (operands[0], 0)) == SYMBOL_REF) + { + rtx sym = XEXP (operands[0], 0); + + /* When calling a global routine in PIC mode, we must + replace the symbol itself with the PLT stub. */ + if (flag_pic && !SYMBOL_REF_FLAG (sym)) + { + sym = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, sym), 113); + sym = gen_rtx_CONST (Pmode, sym); + + plt_call = 1; + } + + /* Unless we can use the bras(l) insn, force the + routine address into a register. */ + if (!TARGET_SMALL_EXEC && !TARGET_64BIT) + { + rtx target = gen_reg_rtx (Pmode); + emit_move_insn (target, sym); + sym = target; + } + + operands[0] = gen_rtx_MEM (QImode, sym); + } + + /* Emit insn. */ + insn = emit_call_insn (gen_call_exp (operands[0], operands[1], + gen_rtx_REG (Pmode, RETURN_REGNUM))); + + /* In 31-bit, we must load the GOT register even if the + compiler doesn't know about it, because the PLT glue + code uses it. In 64-bit, this is not necessary. */ + if (plt_call && !TARGET_64BIT) + { + current_function_uses_pic_offset_table = 1; + use_reg (&CALL_INSN_FUNCTION_USAGE (insn), pic_offset_table_rtx); + } + + DONE; +}") + +(define_expand "call_exp" + [(parallel [(call (match_operand 0 "" "") + (match_operand 1 "" "")) + (clobber (match_operand 2 "" ""))])] + "" + "") + +(define_insn "brasl" + [(call (mem:QI (match_operand:DI 0 "bras_sym_operand" "X")) + (match_operand:SI 1 "const_int_operand" "n")) + (clobber (match_operand:DI 2 "register_operand" "=r"))] + "TARGET_64BIT" + "brasl\\t%2,%0" + [(set_attr "op_type" "RIL") + (set_attr "type" "jsr")]) + +(define_insn "bras" + [(call (mem:QI (match_operand:SI 0 "bras_sym_operand" "X")) + (match_operand:SI 1 "const_int_operand" "n")) + (clobber (match_operand:SI 2 "register_operand" "=r"))] + "TARGET_SMALL_EXEC" + "bras\\t%2,%0" + [(set_attr "op_type" "RI") + (set_attr "type" "jsr")]) + +(define_insn "basr_64" + [(call (mem:QI (match_operand:DI 0 "register_operand" "a")) + (match_operand:SI 1 "const_int_operand" "n")) + (clobber (match_operand:DI 2 "register_operand" "=r"))] + "TARGET_64BIT" + "basr\\t%2,%0" + [(set_attr "op_type" "RR") + (set_attr "type" "jsr") + (set_attr "atype" "mem")]) + +(define_insn "basr_31" + [(call (mem:QI (match_operand:SI 0 "register_operand" "a")) + (match_operand:SI 1 "const_int_operand" "n")) + (clobber (match_operand:SI 2 "register_operand" "=r"))] + "!TARGET_64BIT" + "basr\\t%2,%0" + [(set_attr "op_type" "RR") + (set_attr "type" "jsr") + (set_attr "atype" "mem")]) + +(define_insn "bas_64" + [(call (mem:QI (match_operand:QI 0 "address_operand" "p")) + (match_operand:SI 1 "const_int_operand" "n")) + (clobber (match_operand:DI 2 "register_operand" "=r"))] + "TARGET_64BIT" + "bas\\t%2,%a0" + [(set_attr "op_type" "RX") + (set_attr "type" "jsr") + (set_attr "atype" "mem")]) + +(define_insn "bas_31" + [(call (mem:QI (match_operand:QI 0 "address_operand" "p")) + (match_operand:SI 1 "const_int_operand" "n")) + (clobber (match_operand:SI 2 "register_operand" "=r"))] + "!TARGET_64BIT" + "bas\\t%2,%a0" + [(set_attr "op_type" "RX") + (set_attr "type" "jsr") + (set_attr "atype" "mem")]) + + +; +; call_value instruction pattern(s). +; + +(define_expand "call_value" + [(set (match_operand 0 "" "") + (call (match_operand 1 "" "") + (match_operand 2 "" ""))) + (use (match_operand 3 "" ""))] + "" + " +{ + int plt_call = 0; + rtx insn; + + /* Direct function calls need special treatment. */ + if (GET_CODE (XEXP (operands[1], 0)) == SYMBOL_REF) + { + rtx sym = XEXP (operands[1], 0); + + /* When calling a global routine in PIC mode, we must + replace the symbol itself with the PLT stub. */ + if (flag_pic && !SYMBOL_REF_FLAG (sym)) + { + sym = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, sym), 113); + sym = gen_rtx_CONST (Pmode, sym); + + plt_call = 1; + } + + /* Unless we can use the bras(l) insn, force the + routine address into a register. */ + if (!TARGET_SMALL_EXEC && !TARGET_64BIT) + { + rtx target = gen_reg_rtx (Pmode); + emit_move_insn (target, sym); + sym = target; + } + + operands[1] = gen_rtx_MEM (QImode, sym); + } + + /* Emit insn. */ + insn = emit_call_insn ( + gen_call_value_exp (operands[0], operands[1], operands[2], + gen_rtx_REG (Pmode, RETURN_REGNUM))); + + /* In 31-bit, we must load the GOT register even if the + compiler doesn't know about it, because the PLT glue + code uses it. In 64-bit, this is not necessary. */ + if (plt_call && !TARGET_64BIT) + { + current_function_uses_pic_offset_table = 1; + use_reg (&CALL_INSN_FUNCTION_USAGE (insn), pic_offset_table_rtx); + } + + DONE; +}") + +(define_expand "call_value_exp" + [(parallel [(set (match_operand 0 "" "") + (call (match_operand 1 "" "") + (match_operand 2 "" ""))) + (clobber (match_operand 3 "" ""))])] + "" + "") + +(define_insn "brasl_r" + [(set (match_operand 0 "register_operand" "=df") + (call (mem:QI (match_operand:DI 1 "bras_sym_operand" "X")) + (match_operand:SI 2 "const_int_operand" "n"))) + (clobber (match_operand:DI 3 "register_operand" "=r"))] + "TARGET_64BIT" + "brasl\\t%3,%1" + [(set_attr "op_type" "RIL") + (set_attr "type" "jsr")]) + +(define_insn "bras_r" + [(set (match_operand 0 "register_operand" "=df") + (call (mem:QI (match_operand:SI 1 "bras_sym_operand" "X")) + (match_operand:SI 2 "const_int_operand" "n"))) + (clobber (match_operand:SI 3 "register_operand" "=r"))] + "TARGET_SMALL_EXEC" + "bras\\t%3,%1" + [(set_attr "op_type" "RI") + (set_attr "type" "jsr")]) + +(define_insn "basr_r_64" + [(set (match_operand 0 "register_operand" "=df") + (call (mem:QI (match_operand:DI 1 "register_operand" "a")) + (match_operand:SI 2 "const_int_operand" "n"))) + (clobber (match_operand:DI 3 "register_operand" "=r"))] + "TARGET_64BIT" + "basr\\t%3,%1" + [(set_attr "op_type" "RR") + (set_attr "type" "jsr")]) + +(define_insn "basr_r_31" + [(set (match_operand 0 "register_operand" "=df") + (call (mem:QI (match_operand:SI 1 "register_operand" "a")) + (match_operand:SI 2 "const_int_operand" "n"))) + (clobber (match_operand:SI 3 "register_operand" "=r"))] + "!TARGET_64BIT" + "basr\\t%3,%1" + [(set_attr "op_type" "RR") + (set_attr "type" "jsr") + (set_attr "atype" "mem")]) + +(define_insn "bas_r_64" + [(set (match_operand 0 "register_operand" "=df") + (call (mem:QI (match_operand:QI 1 "address_operand" "p")) + (match_operand:SI 2 "const_int_operand" "n"))) + (clobber (match_operand:DI 3 "register_operand" "=r"))] + "TARGET_64BIT" + "bas\\t%3,%a1" + [(set_attr "op_type" "RX") + (set_attr "type" "jsr") + (set_attr "atype" "mem")]) + +(define_insn "bas_r_31" + [(set (match_operand 0 "register_operand" "=df") + (call (mem:QI (match_operand:QI 1 "address_operand" "p")) + (match_operand:SI 2 "const_int_operand" "n"))) + (clobber (match_operand:SI 3 "register_operand" "=r"))] + "!TARGET_64BIT" + "bas\\t%3,%a1" + [(set_attr "op_type" "RX") + (set_attr "type" "jsr") + (set_attr "atype" "mem")]) + + +;; +;;- Miscellaneous instructions. +;; + +; +; allocate stack instruction pattern(s). +; + +(define_expand "allocate_stack" + [(set (reg 15) + (plus (reg 15) (match_operand 1 "general_operand" ""))) + (set (match_operand 0 "general_operand" "") + (reg 15))] + "" + " +{ + rtx stack = gen_rtx (REG, Pmode, STACK_POINTER_REGNUM); + rtx chain = gen_rtx (MEM, Pmode, stack); + rtx temp = gen_reg_rtx (Pmode); + + emit_move_insn (temp, chain); + + if (TARGET_64BIT) + emit_insn (gen_adddi3 (stack, stack, negate_rtx (Pmode, operands[1]))); + else + emit_insn (gen_addsi3 (stack, stack, negate_rtx (Pmode, operands[1]))); + + emit_move_insn (chain, temp); + + emit_move_insn (operands[0], virtual_stack_dynamic_rtx); + DONE; +}") + + +; +; setjmp/longjmp instruction pattern(s). +; + +(define_expand "builtin_setjmp_setup" + [(unspec [(match_operand 0 "register_operand" "a")] 1)] + "" + " +{ + rtx base = gen_rtx_MEM (Pmode, plus_constant (operands[0], 4 * GET_MODE_SIZE (Pmode))); + rtx basereg = gen_rtx_REG (Pmode, BASE_REGISTER); + + emit_move_insn (base, basereg); + DONE; +}") + +(define_expand "builtin_setjmp_receiver" + [(unspec_volatile [(label_ref (match_operand 0 "" ""))] 2)] + "flag_pic" + " +{ + rtx gotreg = gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM); + rtx got = gen_rtx_SYMBOL_REF (Pmode, \"_GLOBAL_OFFSET_TABLE_\"); + SYMBOL_REF_FLAG (got) = 1; + + emit_move_insn (gotreg, got); + emit_insn (gen_rtx_USE (VOIDmode, gotreg)); + DONE; +}") + +(define_expand "builtin_longjmp" + [(unspec_volatile [(match_operand 0 "register_operand" "r")] 3)] + "" + " +{ + /* The elements of the buffer are, in order: */ + rtx fp = gen_rtx_MEM (Pmode, operands[0]); + rtx lab = gen_rtx_MEM (Pmode, plus_constant (operands[0], GET_MODE_SIZE (Pmode))); + rtx stack = gen_rtx_MEM (Pmode, plus_constant (operands[0], 2 * GET_MODE_SIZE (Pmode))); + rtx base = gen_rtx_MEM (Pmode, plus_constant (operands[0], 4 * GET_MODE_SIZE (Pmode))); + rtx basereg = gen_rtx_REG (Pmode, BASE_REGISTER); + rtx jmp = gen_rtx_REG (Pmode, 14); + + emit_move_insn (jmp, lab); + emit_move_insn (basereg, base); + emit_stack_restore (SAVE_NONLOCAL, stack, NULL_RTX); + emit_move_insn (hard_frame_pointer_rtx, fp); + + emit_insn (gen_rtx_USE (VOIDmode, hard_frame_pointer_rtx)); + emit_insn (gen_rtx_USE (VOIDmode, stack_pointer_rtx)); + emit_insn (gen_rtx_USE (VOIDmode, basereg)); + emit_indirect_jump (jmp); + DONE; +}") + + +;; These patterns say how to save and restore the stack pointer. We need not +;; save the stack pointer at function level since we are careful to +;; preserve the backchain. At block level, we have to restore the backchain +;; when we restore the stack pointer. +;; +;; For nonlocal gotos, we must save both the stack pointer and its +;; backchain and restore both. Note that in the nonlocal case, the +;; save area is a memory location. + +(define_expand "save_stack_function" + [(match_operand 0 "general_operand" "") + (match_operand 1 "general_operand" "")] + "" + "DONE;") + +(define_expand "restore_stack_function" + [(match_operand 0 "general_operand" "") + (match_operand 1 "general_operand" "")] + "" + "DONE;") + +(define_expand "restore_stack_block" + [(use (match_operand 0 "register_operand" "")) + (set (match_dup 2) (match_dup 3)) + (set (match_dup 0) (match_operand 1 "register_operand" "")) + (set (match_dup 3) (match_dup 2))] + "" + " +{ + operands[2] = gen_reg_rtx (Pmode); + operands[3] = gen_rtx_MEM (Pmode, operands[0]); +}") + +(define_expand "save_stack_nonlocal" + [(match_operand 0 "memory_operand" "") + (match_operand 1 "register_operand" "")] + "" + " +{ + rtx temp = gen_reg_rtx (Pmode); + + /* Copy the backchain to the first word, sp to the second. */ + emit_move_insn (temp, gen_rtx_MEM (Pmode, operands[1])); + emit_move_insn (operand_subword (operands[0], 0, 0, + TARGET_64BIT ? TImode : DImode), + temp); + emit_move_insn (operand_subword (operands[0], 1, 0, + TARGET_64BIT ? TImode : DImode), + operands[1]); + DONE; +}") + +(define_expand "restore_stack_nonlocal" + [(match_operand 0 "register_operand" "") + (match_operand 1 "memory_operand" "")] + "" + " +{ + rtx temp = gen_reg_rtx (Pmode); + + /* Restore the backchain from the first word, sp from the second. */ + emit_move_insn (temp, + operand_subword (operands[1], 0, 0, + TARGET_64BIT ? TImode : DImode)); + emit_move_insn (operands[0], + operand_subword (operands[1], 1, 0, + TARGET_64BIT ? TImode : DImode)); + emit_move_insn (gen_rtx_MEM (Pmode, operands[0]), temp); + DONE; +}") + + +; +; nop instruction pattern(s). +; + +(define_insn "nop" + [(const_int 0)] + "" + "lr\\t0,0" + [(set_attr "op_type" "RR")]) + + +; +; Special literal pool access instruction pattern(s). +; + +(define_insn "consttable_qi" + [(unspec_volatile [(match_operand:QI 0 "consttable_operand" "X")] 200)] + "" + "* +{ + assemble_integer (operands[0], 1, BITS_PER_UNIT, 1); + return \"\"; +}" + [(set_attr "op_type" "NN") + (set_attr "length" "1")]) + +(define_insn "consttable_hi" + [(unspec_volatile [(match_operand:HI 0 "consttable_operand" "X")] 201)] + "" + "* +{ + assemble_integer (operands[0], 2, 2*BITS_PER_UNIT, 1); + return \"\"; +}" + [(set_attr "op_type" "NN") + (set_attr "length" "2")]) + +(define_insn "consttable_si" + [(unspec_volatile [(match_operand:SI 0 "consttable_operand" "X")] 202)] + "" + "* +{ + if (!TARGET_64BIT && flag_pic && SYMBOLIC_CONST (operands[0])) + return \".long\\t%0\"; + + assemble_integer (operands[0], 4, 4*BITS_PER_UNIT, 1); + return \"\"; +}" + [(set_attr "op_type" "NN") + (set_attr "length" "4")]) + +(define_insn "consttable_di" + [(unspec_volatile [(match_operand:DI 0 "consttable_operand" "X")] 203)] + "" + "* +{ + assemble_integer (operands[0], 8, 8*BITS_PER_UNIT, 1); + return \"\"; +}" + [(set_attr "op_type" "NN") + (set_attr "length" "8")]) + +(define_insn "consttable_sf" + [(unspec_volatile [(match_operand:SF 0 "consttable_operand" "X")] 204)] + "" + "* +{ + REAL_VALUE_TYPE r; + + if (GET_CODE (operands[0]) != CONST_DOUBLE) + abort (); + + REAL_VALUE_FROM_CONST_DOUBLE (r, operands[0]); + assemble_real (r, SFmode, 4*BITS_PER_UNIT); + return \"\"; +}" + [(set_attr "op_type" "NN") + (set_attr "length" "4")]) + +(define_insn "consttable_df" + [(unspec_volatile [(match_operand:DF 0 "consttable_operand" "X")] 205)] + "" + "* +{ + REAL_VALUE_TYPE r; + + if (GET_CODE (operands[0]) != CONST_DOUBLE) + abort (); + + REAL_VALUE_FROM_CONST_DOUBLE (r, operands[0]); + assemble_real (r, DFmode, 8*BITS_PER_UNIT); + return \"\"; +}" + [(set_attr "op_type" "NN") + (set_attr "length" "8")]) + +(define_insn "pool_start_31" + [(unspec_volatile [(const_int 0)] 206)] + "!TARGET_64BIT" + ".align\\t4" + [(set_attr "op_type" "NN") + (set_attr "length" "2")]) + +(define_insn "pool_end_31" + [(unspec_volatile [(const_int 0)] 207)] + "!TARGET_64BIT" + ".align\\t2" + [(set_attr "op_type" "NN") + (set_attr "length" "2")]) + +(define_insn "pool_start_64" + [(unspec_volatile [(const_int 0)] 206)] + "TARGET_64BIT" + ".section\\t.rodata\;.align\\t8" + [(set_attr "op_type" "NN") + (set_attr "length" "0")]) + +(define_insn "pool_end_64" + [(unspec_volatile [(const_int 0)] 207)] + "TARGET_64BIT" + ".previous" + [(set_attr "op_type" "NN") + (set_attr "length" "0")]) + +(define_insn "reload_base" + [(set (match_operand:SI 0 "register_operand" "=a") + (unspec:SI [(label_ref (match_operand 1 "" ""))] 210))] + "!TARGET_64BIT" + "basr\\t%0,0\;la\\t%0,%1-.(%0)" + [(set_attr "op_type" "NN") + (set_attr "type" "la") + (set_attr "length" "6")]) + +(define_insn "reload_base2" + [(set (match_operand:SI 0 "register_operand" "=a") + (unspec:SI [(label_ref (match_operand 1 "" ""))] 211))] + "!TARGET_64BIT" + "la\\t%0,%1-.(%0)" + [(set_attr "op_type" "NN") + (set_attr "type" "la") + (set_attr "length" "4")]) + + +;; +;; Insns related to generating the function prologue and epilogue. +;; + + +(define_expand "prologue" + [(use (const_int 0))] + "" + " +{ + s390_emit_prologue (); + DONE; +}") + +(define_expand "epilogue" + [(use (const_int 1))] + "" + " +{ + s390_emit_epilogue (); + DONE; +}") + + +(define_insn "*return_si" + [(return) + (use (match_operand:SI 0 "register_operand" "a"))] + "!TARGET_64BIT" + "br\\t%0" + [(set_attr "op_type" "RR") + (set_attr "type" "jsr") + (set_attr "atype" "mem")]) + +(define_insn "*return_di" + [(return) + (use (match_operand:DI 0 "register_operand" "a"))] + "TARGET_64BIT" + "br\\t%0" + [(set_attr "op_type" "RR") + (set_attr "type" "jsr") + (set_attr "atype" "mem")]) + + +(define_insn "lit" + [(set (reg 13) (pc)) + (unspec_volatile [(const_int 0)] 200)] + "" + "* +{ + s390_output_constant_pool (asm_out_file); + return \"\"; +}" + [(set_attr "op_type" "NN") + (set_attr "type" "integer")]) + + +;; +;; Peephole optimization patterns. +;; + +(define_peephole + [(set (match_operand:SI 0 "memory_operand" "m") + (match_operand:SI 1 "register_operand" "d")) + (set (match_dup 1) + (match_dup 0))] + "" + "st\\t%1,%0") + +(define_peephole + [(set (match_operand:SI 0 "memory_operand" "m") + (match_operand:SI 1 "register_operand" "d")) + (set (match_dup 0) + (match_dup 1))] + "" + "st\\t%1,%0") + +(define_peephole + [(set (match_operand:SI 0 "register_operand" "") + (match_operand:SI 1 "register_operand" "")) + (parallel + [(set (match_dup 0) + (plus:SI (match_dup 0) + (match_operand:SI 2 "immediate_operand" ""))) + (clobber (reg:CC 33))])] + "(REGNO (operands[0]) == STACK_POINTER_REGNUM || + REGNO (operands[1]) == STACK_POINTER_REGNUM || + REGNO (operands[0]) == BASE_REGISTER || + REGNO (operands[1]) == BASE_REGISTER) && + INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 4096" + "la\\t%0,%c2(%1)") + +; +; peepholes for fast char instructions +; + +;(define_peephole +; [(set (match_operand:QI 0 "register_operand" "d") +; (match_operand:QI 1 "s_operand" "Q")) +; (set (match_operand:SI 2 "register_operand" "0") +; (zero_extend:SI (match_dup 0)))] +; "REGNO(operands[0]) == REGNO(operands[2])" +; "icm\\t%0,8,%1\;srl\\t%0,24") + +;(define_peephole +; [(set (match_operand:QI 0 "register_operand" "d") +; (match_operand:QI 1 "s_operand" "Q")) +; (set (match_operand:SI 2 "register_operand" "0") +; (sign_extend:SI (match_dup 0)))] +; "REGNO(operands[0]) == REGNO(operands[2])" +; "icm\\t%0,8,%1\;sra\\t%0,24") + +(define_peephole + [(set (match_operand:QI 0 "register_operand" "d") + (match_operand:QI 1 "immediate_operand" "J")) + (set (match_operand:SI 2 "register_operand" "0" ) + (sign_extend:SI (match_dup 0) ) )] + "REGNO(operands[0]) == REGNO(operands[2])" + "lhi\\t%0,%h1") + +; +; peepholes for fast short instructions +; + +;(define_peephole +; [(set (match_operand:HI 0 "register_operand" "d") +; (match_operand:HI 1 "s_operand" "Q")) +; (set (match_operand:SI 2 "register_operand" "0" ) +; (zero_extend:SI (match_dup 0)))] +; "REGNO(operands[0]) == REGNO(operands[2])" +; "icm\\t%0,12,%1\;srl\\t%0,16") + +(define_peephole + [(set (match_operand:HI 0 "register_operand" "d") + (match_operand:HI 1 "memory_operand" "m")) + (set (match_operand:SI 2 "register_operand" "0" ) + (sign_extend:SI (match_dup 0)))] + "REGNO(operands[0]) == REGNO(operands[2])" + "lh\\t%0,%1") + +(define_peephole + [(set (match_operand:HI 0 "register_operand" "d") + (match_operand:HI 1 "immediate_operand" "K")) + (set (match_operand:SI 2 "register_operand" "0" ) + (sign_extend:SI (match_dup 0) ) )] + "REGNO(operands[0]) == REGNO(operands[2])" + "lhi\\t%0,%h1") + +; +; peepholes for divide instructions +; + +(define_peephole + [(set (match_operand:DI 0 "register_operand" "d") + (match_operand:DI 1 "memory_operand" "m")) + (set (match_dup 0) + (lshiftrt:DI (match_dup 0) + (match_operand:SI 2 "immediate_operand" "J"))) + (set (match_dup 0) + (div:SI (match_dup 0) + (match_operand:SI 3 "nonimmediate_operand" "g"))) + (set (match_dup 1) + (match_dup 0))] + "" + "* +{ + output_asm_insn (\"l\\t%0,%1\", operands); + output_asm_insn (\"srdl\\t%0,%b2\", operands); + + if (REG_P (operands[3])) + output_asm_insn (\"dr\\t%0,%3\", operands); + else + output_asm_insn (\"d\\t%0,%3\", operands); + + return \"st\\t%N0,%N1\"; +}") + +(define_peephole + [(set (match_operand:DI 0 "register_operand" "d") + (match_operand:DI 1 "memory_operand" "m")) + (set (match_dup 0) + (lshiftrt:DI (match_dup 0) + (match_operand:SI 2 "immediate_operand" "J"))) + (set (match_dup 0) + (mod:SI (match_dup 0) + (match_operand:SI 3 "nonimmediate_operand" "g"))) + (set (match_dup 1) + (match_dup 0))] + "" + "* +{ + output_asm_insn (\"l\\t%0,%1\", operands); + output_asm_insn (\"srdl\\t%0,%b2\", operands); + + if (REG_P (operands[3])) + output_asm_insn (\"dr\\t%0,%3\", operands); + else + output_asm_insn (\"d\\t%0,%3\", operands); + + return \"st\\t%0,%1\"; +}") + diff --git a/contrib/gcc/config/s390/s390x.h b/contrib/gcc/config/s390/s390x.h new file mode 100644 index 0000000..c79acf5 --- /dev/null +++ b/contrib/gcc/config/s390/s390x.h @@ -0,0 +1,27 @@ +/* Definitions of target machine for IBM zSeries 64-bit + Copyright (C) 2002 Free Software Foundation, Inc. + Contributed by Hartmut Penner (hpenner@de.ibm.com) and + Ulrich Weigand (uweigand@de.ibm.com). +This file is part of GNU CC. + +GNU CC is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2, or (at your option) +any later version. + +GNU CC is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with GNU CC; see the file COPYING. If not, write to +the Free Software Foundation, 59 Temple Place - Suite 330, +Boston, MA 02111-1307, USA. */ + +#ifndef _S390X_H +#define _S390X_H + +#define DEFAULT_TARGET_64BIT + +#endif diff --git a/contrib/gcc/config/s390/t-linux b/contrib/gcc/config/s390/t-linux new file mode 100644 index 0000000..bc8d519 --- /dev/null +++ b/contrib/gcc/config/s390/t-linux @@ -0,0 +1,7 @@ +# The crtbegin and crtend must not depend on a small GOT +CRTSTUFF_T_CFLAGS = -O2 -fPIC +CRTSTUFF_T_CFLAGS_S = -O2 -fPIC + +# Compile libgcc2.a with pic. +TARGET_LIBGCC2_CFLAGS = -fPIC -include $(srcdir)/config/s390/fixdfdi.h + diff --git a/contrib/gcc/config/s390/t-linux64 b/contrib/gcc/config/s390/t-linux64 new file mode 100644 index 0000000..d5a9278 --- /dev/null +++ b/contrib/gcc/config/s390/t-linux64 @@ -0,0 +1,3 @@ +# Override t-slibgcc-elf-ver to export some libgcc symbols with +# the symbol versions that glibc used. +SHLIB_MAPFILES = $(srcdir)/libgcc-std.ver $(srcdir)/config/s390/libgcc-glibc.ver diff --git a/contrib/gcc/configure.in b/contrib/gcc/configure.in index cb18281..69545a4 100644 --- a/contrib/gcc/configure.in +++ b/contrib/gcc/configure.in @@ -1,1080 +1,2142 @@ -#! /bin/bash -############################################################################## - -## This file is a shell script fragment that supplies the information -## necessary to tailor a template configure script into the configure -## script appropriate for this directory. For more information, check -## any existing configure script. +# configure.in for GCC +# Process this file with autoconf to generate a configuration script. + +# Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc. + +#This file is part of GCC. + +#GCC is free software; you can redistribute it and/or modify it under +#the terms of the GNU General Public License as published by the Free +#Software Foundation; either version 2, or (at your option) any later +#version. + +#GCC is distributed in the hope that it will be useful, but WITHOUT +#ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +#FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +#for more details. + +#You should have received a copy of the GNU General Public License +#along with GCC; see the file COPYING. If not, write to the Free +#Software Foundation, 59 Temple Place - Suite 330, Boston, MA +#02111-1307, USA. + +# Initialization and defaults +AC_PREREQ(2.13) +AC_INIT(tree.c) +AC_CONFIG_HEADER(auto-host.h:config.in) + +remove=rm +hard_link=ln +symbolic_link='ln -s' +copy=cp + +# Check for bogus environment variables. +# Test if LIBRARY_PATH contains the notation for the current directory +# since this would lead to problems installing/building glibc. +# LIBRARY_PATH contains the current directory if one of the following +# is true: +# - one of the terminals (":" and ";") is the first or last sign +# - two terminals occur directly after each other +# - the path contains an element with a dot in it +AC_MSG_CHECKING(LIBRARY_PATH variable) +changequote(,)dnl +case ${LIBRARY_PATH} in + [:\;]* | *[:\;] | *[:\;][:\;]* | *[:\;]. | .[:\;]*| . | *[:\;].[:\;]* ) + library_path_setting="contains current directory" + ;; + *) + library_path_setting="ok" + ;; +esac +changequote([,])dnl +AC_MSG_RESULT($library_path_setting) +if test "$library_path_setting" != "ok"; then +AC_MSG_ERROR([ +*** LIBRARY_PATH shouldn't contain the current directory when +*** building gcc. Please change the environment variable +*** and run configure again.]) +fi -## Be warned, there are two types of configure.in files. There are those -## used by Autoconf, which are macros which are expanded into a configure -## script by autoconf. The other sort, of which this is one, is executed -## by Cygnus configure. +# Test if GCC_EXEC_PREFIX contains the notation for the current directory +# since this would lead to problems installing/building glibc. +# GCC_EXEC_PREFIX contains the current directory if one of the following +# is true: +# - one of the terminals (":" and ";") is the first or last sign +# - two terminals occur directly after each other +# - the path contains an element with a dot in it +AC_MSG_CHECKING(GCC_EXEC_PREFIX variable) +changequote(,)dnl +case ${GCC_EXEC_PREFIX} in + [:\;]* | *[:\;] | *[:\;][:\;]* | *[:\;]. | .[:\;]*| . | *[:\;].[:\;]* ) + gcc_exec_prefix_setting="contains current directory" + ;; + *) + gcc_exec_prefix_setting="ok" + ;; +esac +changequote([,])dnl +AC_MSG_RESULT($gcc_exec_prefix_setting) +if test "$gcc_exec_prefix_setting" != "ok"; then +AC_MSG_ERROR([ +*** GCC_EXEC_PREFIX shouldn't contain the current directory when +*** building gcc. Please change the environment variable +*** and run configure again.]) +fi -## For more information on these two systems, check out the documentation -## for 'Autoconf' (autoconf.texi) and 'Configure' (configure.texi). +# Check for additional parameters + +# With GNU ld +AC_ARG_WITH(gnu-ld, +[ --with-gnu-ld arrange to work with GNU ld.], +gnu_ld_flag="$with_gnu_ld", +gnu_ld_flag=no) + +# With pre-defined ld +AC_ARG_WITH(ld, +[ --with-ld arrange to use the specified ld (full pathname)], +DEFAULT_LINKER="$with_ld") +if test x"${DEFAULT_LINKER+set}" = x"set"; then + if test ! -x "$DEFAULT_LINKER"; then + AC_MSG_WARN([cannot execute: $DEFAULT_LINKER: check --with-ld or env. var. DEFAULT_LINKER]) + elif $DEFAULT_LINKER -v < /dev/null 2>&1 | grep GNU > /dev/null; then + gnu_ld_flag=yes + fi + AC_DEFINE_UNQUOTED(DEFAULT_LINKER,"$DEFAULT_LINKER", + [Define to enable the use of a default linker.]) +fi -# Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, -# 1999, 2000, 2001, 2002 Free Software Foundation, Inc. -# -# This file is free software; you can redistribute it and/or modify it -# under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# With GNU as +AC_ARG_WITH(gnu-as, +[ --with-gnu-as arrange to work with GNU as], +gas_flag="$with_gnu_as", +gas_flag=no) + +AC_ARG_WITH(as, +[ --with-as arrange to use the specified as (full pathname)], +DEFAULT_ASSEMBLER="$with_as") +if test x"${DEFAULT_ASSEMBLER+set}" = x"set"; then + if test ! -x "$DEFAULT_ASSEMBLER"; then + AC_MSG_WARN([cannot execute: $DEFAULT_ASSEMBLER: check --with-as or env. var. DEFAULT_ASSEMBLER]) + elif $DEFAULT_ASSEMBLER -v < /dev/null 2>&1 | grep GNU > /dev/null; then + gas_flag=yes + fi + AC_DEFINE_UNQUOTED(DEFAULT_ASSEMBLER,"$DEFAULT_ASSEMBLER", + [Define to enable the use of a default assembler.]) +fi -############################################################################## +# With stabs +AC_ARG_WITH(stabs, +[ --with-stabs arrange to use stabs instead of host debug format], +stabs="$with_stabs", +stabs=no) + +# With ELF +AC_ARG_WITH(elf, +[ --with-elf arrange to use ELF instead of host debug format], +elf="$with_elf", +elf=no) + +# Specify the local prefix +local_prefix= +AC_ARG_WITH(local-prefix, +[ --with-local-prefix=DIR specifies directory to put local include], +[case "${withval}" in +yes) AC_MSG_ERROR(bad value ${withval} given for local include directory prefix) ;; +no) ;; +*) local_prefix=$with_local_prefix ;; +esac]) + +# Default local prefix if it is empty +if test x$local_prefix = x; then + local_prefix=/usr/local +fi -### To add a new directory to the tree, first choose whether it is a target -### or a host dependent tool. Then put it into the appropriate list -### (library or tools, host or target), doing a dependency sort. For -### example, gdb requires that byacc (or bison) be built first, so it is in -### the ${host_tools} list after byacc and bison. +# Don't set gcc_gxx_include_dir to gxx_include_dir since that's only +# passed in by the toplevel make and thus we'd get different behavior +# depending on where we built the sources. +gcc_gxx_include_dir= +# Specify the g++ header file directory +AC_ARG_WITH(gxx-include-dir, +[ --with-gxx-include-dir=DIR + specifies directory to put g++ header files], +[case "${withval}" in +yes) AC_MSG_ERROR(bad value ${withval} given for g++ include directory) ;; +no) ;; +*) gcc_gxx_include_dir=$with_gxx_include_dir ;; +esac]) + +if test x${gcc_gxx_include_dir} = x; then + if test x${enable_version_specific_runtime_libs} = xyes; then + gcc_gxx_include_dir='${libsubdir}/include/c++' + else + topsrcdir=${srcdir}/.. . ${srcdir}/../config.if +changequote(<<, >>)dnl + gcc_gxx_include_dir="\$(libsubdir)/\$(unlibsubdir)/..\`echo \$(exec_prefix) | sed -e 's|^\$(prefix)||' -e 's|/[^/]*|/..|g'\`/include/"${libstdcxx_incdir} +changequote([, ])dnl + fi +fi +# Determine whether or not multilibs are enabled. +AC_ARG_ENABLE(multilib, +[ --enable-multilib enable library support for multiple ABIs], +[], [enable_multilib=yes]) +AC_SUBST(enable_multilib) + +# Enable expensive internal checks +AC_ARG_ENABLE(checking, +[ --enable-checking[=LIST] + enable expensive run-time checks. With LIST, + enable only specific categories of checks. + Categories are: misc,tree,rtl,gc,gcac; default + is misc,tree,gc], +[ac_checking= +ac_tree_checking= +ac_rtl_checking= +ac_gc_checking= +ac_gc_always_collect= +case "${enableval}" in +yes) ac_checking=1 ; ac_tree_checking=1 ; ac_gc_checking=1 ;; +no) ;; +*) IFS="${IFS= }"; ac_save_IFS="$IFS"; IFS="$IFS," + set fnord $enableval; shift + IFS="$ac_save_IFS" + for check + do + case $check in + misc) ac_checking=1 ;; + tree) ac_tree_checking=1 ;; + rtl) ac_rtl_checking=1 ;; + gc) ac_gc_checking=1 ;; + gcac) ac_gc_always_collect=1 ;; + *) AC_MSG_ERROR(unknown check category $check) ;; + esac + done + ;; +esac +], +[]) +if test x$ac_checking != x ; then + AC_DEFINE(ENABLE_CHECKING, 1, +[Define if you want more run-time sanity checks. This one gets a grab + bag of miscellaneous but relatively cheap checks.]) +fi +if test x$ac_tree_checking != x ; then + AC_DEFINE(ENABLE_TREE_CHECKING, 1, +[Define if you want all operations on trees (the basic data + structure of the front ends) to be checked for dynamic type safety + at runtime. This is moderately expensive.]) +fi +if test x$ac_rtl_checking != x ; then + AC_DEFINE(ENABLE_RTL_CHECKING, 1, +[Define if you want all operations on RTL (the basic data structure + of the optimizer and back end) to be checked for dynamic type safety + at runtime. This is quite expensive.]) +fi +if test x$ac_gc_checking != x ; then + AC_DEFINE(ENABLE_GC_CHECKING, 1, +[Define if you want the garbage collector to do object poisoning and + other memory allocation checks. This is quite expensive.]) +fi +if test x$ac_gc_always_collect != x ; then + AC_DEFINE(ENABLE_GC_ALWAYS_COLLECT, 1, +[Define if you want the garbage collector to operate in maximally + paranoid mode, validating the entire heap and collecting garbage at + every opportunity. This is extremely expensive.]) +fi -# these libraries are used by various programs built for the host environment -# -host_libs="intl mmalloc libiberty opcodes bfd readline gash db tcl tk tcl8.1 tk8.1 tclX itcl tix libgui zlib" -if [ "${enable_gdbgui}" = "yes" ] ; then - host_libs="${host_libs} libgui" +AC_ARG_ENABLE(cpp, +[ --disable-cpp don't provide a user-visible C preprocessor], +[], [enable_cpp=yes]) + +AC_ARG_WITH(cpp_install_dir, +[ --with-cpp-install-dir=DIR + install the user visible C preprocessor in DIR + (relative to PREFIX) as well as PREFIX/bin], +[if test x$withval = xyes; then + AC_MSG_ERROR([option --with-cpp-install-dir requires an argument]) +elif test x$withval != xno; then + cpp_install_dir=$withval +fi]) + +# Enable __cxa_atexit for C++. +AC_ARG_ENABLE(__cxa_atexit, +[ --enable-__cxa_atexit enable __cxa_atexit for C++], +[], []) +if test x$enable___cxa_atexit = xyes; then + AC_DEFINE(DEFAULT_USE_CXA_ATEXIT, 1, + [Define if you want to use __cxa_atexit, rather than atexit, to + register C++ destructors for local statics and global objects. + This is essential for fully standards-compliant handling of + destructors, but requires __cxa_atexit in libc.]) fi + +# Enable Multibyte Characters for C/C++ +AC_ARG_ENABLE(c-mbchar, +[ --enable-c-mbchar enable multibyte characters for C and C++], +if test x$enable_c_mbchar != xno; then + AC_DEFINE(MULTIBYTE_CHARS, 1, + [Define if you want the C and C++ compilers to support multibyte + character sets for source code.]) +fi) + +# Enable threads +# Pass with no value to take the default +# Pass with a value to specify a thread package +AC_ARG_ENABLE(threads, +[ --enable-threads enable thread usage for target GCC + --enable-threads=LIB use LIB thread package for target GCC],, +enable_threads='') + +enable_threads_flag=$enable_threads +# Check if a valid thread package +case x${enable_threads_flag} in + x | xno) + # No threads + target_thread_file='single' + ;; + xyes) + # default + target_thread_file='' + ;; + xdecosf1 | xirix | xmach | xos2 | xposix | xpthreads | xsingle | \ + xsolaris | xwin32 | xdce | xrtems| xvxworks | xaix) + target_thread_file=$enable_threads_flag + ;; + *) + echo "$enable_threads is an unknown thread package" 1>&2 + exit 1 + ;; +esac -libstdcxx_version="target-libstdc++-v3" -# Don't use libstdc++-v3's flags to configure/build itself. -libstdcxx_flags='`case $$dir in libstdc++-v3 | libjava) ;; *) test ! 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It should include all + # targets where the array type of the second argument of getgroups + # is int and the type of gid_t is not equivalent to int. + *-*-sunos* | *-*-ultrix*) + TARGET_GETGROUPS_T=int + ;; + *) + TARGET_GETGROUPS_T=gid_t + ;; esac fi +AC_SUBST(TARGET_GETGROUPS_T) + +gcc_AC_FUNC_PRINTF_PTR -rm -f mh-frag -if [ -n "${host_makefile_frag}" ] ; then - for f in ${host_makefile_frag} - do - cat ${srcdir}/$f >> mh-frag - done - host_makefile_frag=mh-frag +case "${host}" in +*-*-uwin*) + AC_MSG_ERROR([ +*** UWIN may not be used as a host platform because +*** linking with posix.dll is not allowed by the GNU GPL]) + ;; +*-*-*vms*) + # Under VMS, vfork works very different than on Unix. The standard test + # won't work, and it isn't easily adaptable. It makes more sense to + # just force it. + ac_cv_func_vfork_works=yes + ;; +esac +AC_FUNC_VFORK +AC_FUNC_MMAP_ANYWHERE +AC_FUNC_MMAP_FILE + +AM_ICONV + +# We will need to find libiberty.h and ansidecl.h +saved_CFLAGS="$CFLAGS" +CFLAGS="$CFLAGS -I${srcdir} -I${srcdir}/../include" +gcc_AC_CHECK_DECLS(getenv atol sbrk abort atof getcwd getwd \ + strsignal putc_unlocked fputs_unlocked fwrite_unlocked \ + fprintf_unlocked strstr errno \ + malloc realloc calloc free basename getopt clock, , ,[ +#include "ansidecl.h" +#include "system.h"]) + +gcc_AC_CHECK_DECLS(getrlimit setrlimit getrusage, , ,[ +#include "ansidecl.h" +#include "system.h" +#ifdef HAVE_SYS_RESOURCE_H +#include <sys/resource.h> +#endif +]) + +gcc_AC_CHECK_DECLS(times, , ,[ +#include "ansidecl.h" +#include "system.h" +#ifdef HAVE_SYS_TIMES_H +#include <sys/times.h> +#endif +]) + +# More time-related stuff. +AC_CACHE_CHECK(for struct tms, ac_cv_struct_tms, [ +AC_TRY_COMPILE([ +#include "ansidecl.h" +#include "system.h" +#ifdef HAVE_SYS_TIMES_H +#include <sys/times.h> +#endif +], [struct tms tms;], ac_cv_struct_tms=yes, ac_cv_struct_tms=no)]) +if test $ac_cv_struct_tms = yes; then + AC_DEFINE(HAVE_STRUCT_TMS, 1, + [Define if <sys/times.h> defines struct tms.]) fi -# per-target: +# use gcc_cv_* here because this doesn't match the behavior of AC_CHECK_TYPE. +# revisit after autoconf 2.50. +AC_CACHE_CHECK(for clock_t, gcc_cv_type_clock_t, [ +AC_TRY_COMPILE([ +#include "ansidecl.h" +#include "system.h" +], [clock_t x;], gcc_cv_type_clock_t=yes, gcc_cv_type_clock_t=no)]) +if test $gcc_cv_type_clock_t = yes; then + AC_DEFINE(HAVE_CLOCK_T, 1, + [Define if <time.h> defines clock_t.]) +fi -case "${target}" in - v810*) - target_makefile_frag="${target_makefile_frag} config/mt-v810" - ;; - i[3456]86-*-netware*) - target_makefile_frag="${target_makefile_frag} config/mt-netware" - ;; - powerpc-*-netware*) - target_makefile_frag="${target_makefile_frag} config/mt-netware" - ;; - alpha*-*-linux*) - target_makefile_frag="${target_makefile_frag} config/mt-linux" - target_makefile_frag="${target_makefile_frag} config/mt-alphaieee" - ;; - alpha*-*-*) - target_makefile_frag="${target_makefile_frag} config/mt-alphaieee" - ;; - *-*-linux*) - target_makefile_frag="${target_makefile_frag} config/mt-linux" - ;; - *-*-aix4.[3456789]* | *-*-aix[56789].*) - target_makefile_frag="${target_makefile_frag} config/mt-aix43" - ;; - mips*-*-pe | sh*-*-pe | *arm-wince-pe) - target_makefile_frag="${target_makefile_frag} config/mt-wince" - ;; -esac +# Restore CFLAGS from before the gcc_AC_NEED_DECLARATIONS tests. +CFLAGS="$saved_CFLAGS" + +# mkdir takes a single argument on some systems. +gcc_AC_FUNC_MKDIR_TAKES_ONE_ARG + +# File extensions +manext='.1' +objext='.o' +AC_SUBST(manext) +AC_SUBST(objext) + +build_xm_file= +build_xm_defines= +build_install_headers_dir=install-headers-tar +build_exeext= +host_xm_file= +host_xm_defines= +host_xmake_file= +host_truncate_target= +host_exeext= + +# Decode the host machine, then the target machine. +# For the host machine, we save the xm_file variable as host_xm_file; +# then we decode the target machine and forget everything else +# that came from the host machine. +for machine in $build $host $target; do + . ${srcdir}/config.gcc +done -# If --enable-target-optspace always use -Os instead of -O2 to build -# the target libraries, similarly if it is not specified, use -Os -# on selected platforms. -case "${enable_target_optspace}:${target}" in - yes:*) - target_makefile_frag="${target_makefile_frag} config/mt-ospace" - ;; - :d30v-*) - target_makefile_frag="${target_makefile_frag} config/mt-d30v" - ;; - :m32r-* | :d10v-* | :fr30-*) - target_makefile_frag="${target_makefile_frag} config/mt-ospace" - ;; - no:* | :*) - ;; - *) - echo "*** bad value \"${enable_target_optspace}\" for --enable-target-optspace flag; ignored" 1>&2 - ;; -esac +extra_objs="${host_extra_objs} ${extra_objs}" -skipdirs= -gasdir=gas -use_gnu_ld= -use_gnu_as= +# Default the target-machine variables that were not explicitly set. +if test x"$tm_file" = x +then tm_file=$cpu_type/$cpu_type.h; fi -# some tools are so dependent upon X11 that if we're not building with X, -# it's not even worth trying to configure, much less build, that tool. +if test x"$extra_headers" = x +then extra_headers=; fi -case ${with_x} in - yes | "") # the default value for this tree is that X11 is available - ;; - no) - skipdirs="${skipdirs} tk libgui gash" - ;; - *) - echo "*** bad value \"${with_x}\" for -with-x flag; ignored" 1>&2 - ;; -esac +if test x$md_file = x +then md_file=$cpu_type/$cpu_type.md; fi -# Some tools are only suitable for building in a "native" situation. -# Those are added when we have a host==target configuration. For cross -# toolchains, we add some directories that should only be useful in a -# cross-compiler. +if test x$out_file = x +then out_file=$cpu_type/$cpu_type.c; fi -is_cross_compiler= +if test x"$tmake_file" = x +then tmake_file=$cpu_type/t-$cpu_type +fi -if [ x"${host}" = x"${target}" ] ; then - # when doing a native toolchain, don't build the targets - # that are in the 'cross only' list - skipdirs="${skipdirs} ${cross_only}" - is_cross_compiler=no -else - # similarly, don't build the targets in the 'native only' - # list when building a cross compiler - skipdirs="${skipdirs} ${native_only}" - is_cross_compiler=yes -fi - -# We always want to use the same name for this directory, so that dejagnu -# can reliably find it. -target_subdir=${target_alias} - -if [ ! -d ${target_subdir} ] ; then - if mkdir ${target_subdir} ; then true - else - echo "'*** could not make ${PWD=`pwd`}/${target_subdir}" 1>&2 - exit 1 - fi +if test x"$dwarf2" = xyes +then tm_file="$tm_file tm-dwarf2.h" fi -build_subdir=${build_alias} +if test x$float_format = x +then float_format=i64 +fi -if [ x"${build_alias}" != x"${host}" ] ; then - if [ ! -d ${build_subdir} ] ; then - if mkdir ${build_subdir} ; then true - else - echo "'*** could not make ${PWD=`pwd`}/${build_subdir}" 1>&2 - exit 1 - fi - fi +if test $float_format = none +then float_h_file=Makefile.in +else float_h_file=float-$float_format.h +fi + +# Handle cpp installation. +if test x$enable_cpp != xno +then + tmake_file="$tmake_file t-install-cpp" fi -copy_dirs= +# Say what files are being used for the output code and MD file. +echo "Using \`$srcdir/config/$out_file' for machine-specific logic." +echo "Using \`$srcdir/config/$md_file' as machine description file." -# Handle --with-headers=XXX. The contents of the named directory are -# copied to $(tooldir)/sys-include. -if [ x"${with_headers}" != x ]; then - if [ x${is_cross_compiler} = xno ]; then - echo 1>&2 '***' --with-headers is only supported when cross compiling - exit 1 +# If any of the xm_file variables contain nonexistent files, warn +# about them and drop them. + +bx= +for x in $build_xm_file; do + if test -f $srcdir/config/$x + then bx="$bx $x" + else AC_MSG_WARN($srcdir/config/$x does not exist.) fi - case "${exec_prefixoption}" in - "") x=${prefix} ;; - *) x=${exec_prefix} ;; - esac - copy_dirs="${copy_dirs} ${with_headers} $x/${target_alias}/sys-include" -fi +done +build_xm_file="$bx" -# Handle --with-libs=XXX. Multiple directories are permitted. The -# contents are copied to $(tooldir)/lib. -if [ x"${with_libs}" != x ]; then - if [ x${is_cross_compiler} = xno ]; then - echo 1>&2 '***' --with-libs is only supported when cross compiling - exit 1 +hx= +for x in $host_xm_file; do + if test -f $srcdir/config/$x + then hx="$hx $x" + else AC_MSG_WARN($srcdir/config/$x does not exist.) fi - # Copy the libraries in reverse order, so that files in the first named - # library override files in subsequent libraries. - case "${exec_prefixoption}" in - "") x=${prefix} ;; - *) x=${exec_prefix} ;; - esac - for l in ${with_libs}; do - copy_dirs="$l $x/${target_alias}/lib ${copy_dirs}" - done -fi +done +host_xm_file="$hx" -# If both --with-headers and --with-libs are specified, default to -# --without-newlib. -if [ x"${with_headers}" != x ] && [ x"${with_libs}" != x ]; then - if [ x"${with_newlib}" = x ]; then - with_newlib=no +tx= +for x in $xm_file; do + if test -f $srcdir/config/$x + then tx="$tx $x" + else AC_MSG_WARN($srcdir/config/$x does not exist.) fi +done +xm_file="$tx" + +count=a +for f in $tm_file; do + count=${count}x +done +if test $count = ax; then + echo "Using \`$srcdir/config/$tm_file' as target machine macro file." +else + echo "Using the following target machine macro files:" + for f in $tm_file; do + echo " $srcdir/config/$f" + done fi -# Recognize --with-newlib/--without-newlib. -if [ x${with_newlib} = xno ]; then - skipdirs="${skipdirs} target-newlib" -elif [ x${with_newlib} = xyes ]; then - skipdirs=`echo " ${skipdirs} " | sed -e 's/ target-newlib / /'` +count=a +for f in $host_xm_file; do + count=${count}x +done +if test $count = a; then + : +elif test $count = ax; then + echo "Using \`$srcdir/config/$host_xm_file' as host machine macro file." +else + echo "Using the following host machine macro files:" + for f in $host_xm_file; do + echo " $srcdir/config/$f" + done fi -# Default to using --with-stabs for certain targets. -if [ x${with_stabs} = x ]; then - case "${target}" in - mips*-*-irix6*) - ;; - mips*-*-* | alpha*-*-osf*) - with_stabs=yes; - withoptions="${withoptions} --with-stabs" - ;; - esac +if test "$host_xm_file" != "$build_xm_file"; then + count=a + for f in $build_xm_file; do + count=${count}x + done + if test $count = a; then + : + elif test $count = ax; then + echo "Using \`$srcdir/config/$build_xm_file' as build machine macro file." + else + echo "Using the following build machine macro files:" + for f in $build_xm_file; do + echo " $srcdir/config/$f" + done + fi fi -# Handle ${copy_dirs} -set fnord ${copy_dirs} -shift -while [ $# != 0 ]; do - if [ -f $2/COPIED ] && [ x"`cat $2/COPIED`" = x"$1" ]; then - : - else - echo Copying $1 to $2 +if test x$thread_file = x; then + if test x$target_thread_file != x; then + thread_file=$target_thread_file + else + thread_file='single' + fi +fi - # Use the install script to create the directory and all required - # parent directories. - if [ -d $2 ]; then - : - else - echo >config.temp - ${srcdir}/install-sh -c -m 644 config.temp $2/COPIED - fi +# auto-host.h is the file containing items generated by autoconf and is +# the first file included by config.h. +# If host=build, it is correct to have hconfig include auto-host.h +# as well. If host!=build, we are in error and need to do more +# work to find out the build config parameters. +if test x$host = x$build +then + build_auto=auto-host.h + FORBUILD=.. +else + # We create a subdir, then run autoconf in the subdir. + # To prevent recursion we set host and build for the new + # invocation of configure to the build for this invocation + # of configure. + tempdir=build.$$ + rm -rf $tempdir + mkdir $tempdir + cd $tempdir + case ${srcdir} in + /* | [A-Za-z]:[\\/]* ) realsrcdir=${srcdir};; + *) realsrcdir=../${srcdir};; + esac + saved_CFLAGS="${CFLAGS}" + CC="${CC_FOR_BUILD}" CFLAGS="${CFLAGS_FOR_BUILD}" \ + ${realsrcdir}/configure \ + --target=$target_alias --host=$build_alias --build=$build_alias + CFLAGS="${saved_CFLAGS}" + + # We just finished tests for the build machine, so rename + # the file auto-build.h in the gcc directory. + mv auto-host.h ../auto-build.h + cd .. + rm -rf $tempdir + build_auto=auto-build.h + FORBUILD=../$build +fi +AC_SUBST(FORBUILD) - # Copy the directory, assuming we have tar. - # FIXME: Should we use B in the second tar? Not all systems support it. - (cd $1; tar -cf - .) | (cd $2; tar -xpf -) +tm_file="${tm_file} defaults.h" +host_xm_file="auto-host.h ansidecl.h ${host_xm_file} ${tm_file}" +build_xm_file="${build_auto} ansidecl.h ${build_xm_file} ${tm_file}" +xm_file="ansidecl.h ${xm_file} ${tm_file}" - # It is the responsibility of the user to correctly adjust all - # symlinks. If somebody can figure out how to handle them correctly - # here, feel free to add the code. +# Truncate the target if necessary +if test x$host_truncate_target != x; then + target=`echo $target | sed -e 's/\(..............\).*/\1/'` +fi - echo $1 > $2/COPIED - fi - shift; shift -done +# Get the version trigger filename from the toplevel +if test "${with_gcc_version_trigger+set}" = set; then + gcc_version_trigger=$with_gcc_version_trigger +else + gcc_version_trigger=${srcdir}/version.c +fi +changequote(,)dnl +gcc_version_full=`grep version_string ${gcc_version_trigger} | sed -e 's/.*"\([^"]*\)".*/\1/'` +gcc_version=`echo ${gcc_version_full} | sed -e 's/\([^ ]*\) .*/\1/'` + +# Compile in configure arguments. +if test -f configargs.h ; then + # Being re-configured. + gcc_config_arguments=`grep configuration_arguments configargs.h | sed -e 's/.*"\([^"]*\)".*/\1/'` + gcc_config_arguments="$gcc_config_arguments : (reconfigured) $TOPLEVEL_CONFIGURE_ARGUMENTS" +else + gcc_config_arguments="$TOPLEVEL_CONFIGURE_ARGUMENTS" +fi +cat > configargs.h <<EOF +/* Generated automatically. */ +static const char configuration_arguments[] = "$gcc_config_arguments"; +static const char thread_model[] = "$thread_file"; +EOF +changequote([,])dnl -# Configure extra directories which are host specific +# Internationalization +PACKAGE=gcc +VERSION="$gcc_version" +AC_SUBST(PACKAGE) +AC_SUBST(VERSION) -case "${host}" in - i[3456]86-*-go32*) - configdirs="$configdirs dosrel" ;; - i[3456]86-*-mingw32*) - configdirs="$configdirs dosrel" ;; - *-cygwin*) - configdirs="$configdirs libtermcap dosrel" ;; -esac +# Enable NLS support by default +AC_ARG_ENABLE(nls, + [ --enable-nls use Native Language Support (default)], + , enable_nls=yes) -# Remove more programs from consideration, based on the host or -# target this usually means that a port of the program doesn't -# exist yet. +# if cross compiling, disable NLS support. +# It's not worth the trouble, at least for now. -noconfigdirs="" +if test "${build}" != "${host}" && test "x$enable_nls" = "xyes"; then + AC_MSG_WARN(Disabling NLS support for canadian cross compiler.) + enable_nls=no +fi -case "${host}" in - hppa*64*-*-*) - noconfigdirs="$noconfigdirs byacc" - ;; - i[3456]86-*-vsta) - noconfigdirs="tcl expect dejagnu make texinfo bison patch flex byacc send-pr gprof uudecode dejagnu diff guile perl apache inet itcl tix db snavigator gnuserv gettext" - ;; - i[3456]86-*-go32* | i[3456]86-*-msdosdjgpp*) - noconfigdirs="tcl tk expect dejagnu send-pr uudecode guile apache inet itcl tix db snavigator gnuserv libffi" - ;; - i[3456]86-*-mingw32*) - # noconfigdirs="tcl tk expect dejagnu make texinfo bison patch flex byacc send-pr uudecode dejagnu diff guile perl apache inet itcl tix db snavigator gnuserv" - noconfigdirs="expect dejagnu cvs autoconf automake send-pr rcs guile perl texinfo apache inet libtool" - ;; - i[3456]86-*-beos*) - noconfigdirs="$noconfigdirs tk itcl tix libgui gdb" - ;; - *-*-cygwin*) - noconfigdirs="autoconf automake send-pr rcs guile perl apache inet" - ;; - *-*-netbsd*) - noconfigdirs="rcs" - ;; - ppc*-*-pe) - noconfigdirs="patch diff make tk tcl expect dejagnu cvssrc autoconf automake texinfo bison send-pr gprof rcs guile perl apache inet itcl tix db snavigator gnuserv" - ;; - powerpc-*-beos*) - noconfigdirs="$noconfigdirs tk itcl tix libgui gdb dejagnu readline" - ;; -esac +AM_GNU_GETTEXT + +# Windows32 Registry support for specifying GCC installation paths. +AC_ARG_ENABLE(win32-registry, +[ --disable-win32-registry + disable lookup of installation paths in the + Registry on Windows hosts + --enable-win32-registry enable registry lookup (default) + --enable-win32-registry=KEY + use KEY instead of GCC version as the last portion + of the registry key],,) +case $host_os in + win32 | pe | cygwin* | mingw32* | uwin*) +AC_MSG_CHECKING(whether windows registry support is requested) +if test "x$enable_win32_registry" != xno; then + AC_DEFINE(ENABLE_WIN32_REGISTRY, 1, +[Define to 1 if installation paths should be looked up in Windows32 + Registry. Ignored on non windows32 hosts.]) + AC_MSG_RESULT(yes) + AC_SEARCH_LIBS(RegOpenKeyExA, advapi32) +else + AC_MSG_RESULT(no) +fi -# Save it here so that, even in case of --enable-libgcj, if the Java -# front-end isn't enabled, we still get libgcj disabled. -libgcj_saved=$libgcj -case $enable_libgcj in -yes) - # If we reset it here, it won't get added to noconfigdirs in the - # target-specific build rules, so it will be forcibly enabled - # (unless the Java language itself isn't enabled). - libgcj= +# Check if user specified a different registry key. +case "x${enable_win32_registry}" in +x | xyes) + # default. + gcc_cv_win32_registry_key="$VERSION" ;; -no) - # Make sure we get it printed in the list of not supported target libs. - noconfigdirs="$noconfigdirs ${libgcj}" +xno) + # no registry lookup. + gcc_cv_win32_registry_key='' + ;; +*) + # user-specified key. + gcc_cv_win32_registry_key="$enable_win32_registry" ;; esac -case "${target}" in - *-*-chorusos) - noconfigdirs="$noconfigdirs target-newlib target-libgloss ${libgcj}" - ;; - *-*-freebsd[12] | *-*-freebsd[12].* | *-*-freebsd*aout*) - noconfigdirs="$noconfigdirs target-newlib target-libgloss ${libgcj}" - ;; - *-*-netbsd*) - # Skip some stuff on all NetBSD configurations. - skipdirs="$skipdirs target-newlib target-libiberty target-libgloss" - - # Skip some stuff that's unsupported on some NetBSD configurations. - case "${target}" in - i*86-*-netbsdelf*) ;; - *) - noconfigdirs="$noconfigdirs ${libgcj}" - ;; - esac - ;; - *-*-netware) - noconfigdirs="$noconfigdirs ${libstdcxx_version} target-librx target-newlib target-libiberty target-libgloss ${libgcj}" - ;; - *-*-rtems*) - noconfigdirs="$noconfigdirs target-libgloss ${libgcj}" - case ${target} in - h8300*-*-* | h8500-*-*) - noconfigdirs="$noconfigdirs target-libf2c" - ;; - *) ;; - esac - ;; - *-*-vxworks*) - noconfigdirs="$noconfigdirs target-newlib target-libgloss ${libgcj}" - ;; - alpha*-dec-osf*) - # ld works, but does not support shared libraries. emacs doesn't - # work. newlib is not 64 bit ready. I'm not sure about fileutils. - # gas doesn't generate exception information. - noconfigdirs="$noconfigdirs gas ld emacs fileutils target-newlib target-libgloss" - ;; - alpha*-*-*vms*) - noconfigdirs="$noconfigdirs gdb ld target-newlib target-libgloss ${libgcj}" - ;; - alpha*-*-linux*) - # newlib is not 64 bit ready - noconfigdirs="$noconfigdirs target-newlib target-libgloss" - # linux has rx in libc - skipdirs="$skipdirs target-librx" - ;; - alpha*-*-freebsd*) - noconfigdirs="$noconfigdirs target-newlib target-libgloss" - ;; - alpha*-*-*) - # newlib is not 64 bit ready - noconfigdirs="$noconfigdirs target-newlib target-libgloss ${libgcj}" - ;; - sh-*-linux*) - noconfigdirs="$noconfigdirs ${libgcj} target-newlib target-libgloss" - # linux has rx in libc - skipdirs="$skipdirs target-librx" - ;; - sh*-*-pe|mips*-*-pe|*arm-wince-pe) - noconfigdirs="$noconfigdirs ${libgcj}" - noconfigdirs="$noconfigdirs target-examples" - noconfigdirs="$noconfigdirs target-libiberty texinfo send-pr" - noconfigdirs="$noconfigdirs tcl tix tk itcl libgui sim" - noconfigdirs="$noconfigdirs expect dejagnu" - # the C++ libraries don't build on top of CE's C libraries - noconfigdirs="$noconfigdirs ${libstdcxx_version}" - skipdirs="$skipdirs target-newlib" - case "${host}" in - *-*-cygwin*) ;; # keep gdb and readline - *) noconfigdirs="$noconfigdirs gdb readline ${libstdcxx_version}" - ;; - esac - ;; - arc-*-*) - noconfigdirs="$noconfigdirs target-libgloss ${libgcj}" - ;; - arm-*-pe*) - noconfigdirs="$noconfigdirs target-libgloss ${libgcj}" - ;; - arm-*-coff*) - noconfigdirs="$noconfigdirs target-libgloss ${libgcj}" - if [ x${is_cross_compiler} != xno ] ; then - target_configdirs="${target_configdirs} target-bsp target-cygmon" - fi - ;; - arm-*-elf*) - noconfigdirs="$noconfigdirs target-libgloss ${libgcj}" - if [ x${is_cross_compiler} != xno ] ; then - target_configdirs="${target_configdirs} target-bsp target-cygmon" - fi - ;; - arm-*-oabi*) - noconfigdirs="$noconfigdirs target-libgloss ${libgcj}" - ;; - c4x-*-*) - noconfigdirs="$noconfigdirs ${libstdcxx_version} target-librx target-libgloss ${libgcj}" - ;; - c54x*-*-* | tic54x-*-*) - noconfigdirs="$noconfigdirs ${libstdcxx_version} target-libgloss ${libgcj} gcc gdb newlib" - ;; - thumb-*-coff) - noconfigdirs="$noconfigdirs target-libgloss ${libgcj}" - ;; - thumb-*-elf) - noconfigdirs="$noconfigdirs target-libgloss ${libgcj}" - ;; - thumb-*-oabi) - noconfigdirs="$noconfigdirs target-libgloss ${libgcj}" - ;; - strongarm-*-elf) - noconfigdirs="$noconfigdirs target-libgloss ${libgcj}" - if [ x${is_cross_compiler} != xno ] ; then - target_configdirs="${target_configdirs} target-bsp target-cygmon" - fi - ;; - strongarm-*-coff) - noconfigdirs="$noconfigdirs target-libgloss ${libgcj}" - if [ x${is_cross_compiler} != xno ] ; then - target_configdirs="${target_configdirs} target-bsp target-cygmon" - fi - ;; - xscale-*-elf) - noconfigdirs="$noconfigdirs target-libgloss target-libffi target-qthreads" - if [ x${is_cross_compiler} != xno ] ; then - target_configdirs="${target_configdirs} target-bsp target-cygmon" - fi - ;; - xscale-*-coff) - noconfigdirs="$noconfigdirs target-libgloss ${libgcj}" - if [ x${is_cross_compiler} != xno ] ; then - target_configdirs="${target_configdirs} target-bsp target-cygmon" - fi - ;; - thumb-*-pe) - noconfigdirs="$noconfigdirs target-libgloss ${libgcj}" - ;; - arm-*-riscix*) - noconfigdirs="$noconfigdirs ld target-libgloss ${libgcj}" - ;; - cris-*-*) - noconfigdirs="$noconfigdirs ${libgcj}" - ;; - d10v-*-*) - noconfigdirs="$noconfigdirs target-librx ${libstdcxx_version} target-libgloss ${libgcj}" - ;; - d30v-*-*) - noconfigdirs="$noconfigdirs ${libgcj}" - ;; - fr30-*-elf*) - noconfigdirs="$noconfigdirs ${libgcj}" - if [ x${is_cross_compiler} != xno ] ; then - target_configdirs="${target_configdirs} target-bsp target-libstub target-cygmon" - fi - ;; - h8300*-*-* | \ - h8500-*-*) - noconfigdirs="$noconfigdirs ${libstdcxx_version} target-librx target-libgloss ${libgcj} target-libf2c" - ;; - hppa*64*-*-linux* | parisc*64*-*-linux*) - # In this case, it's because the hppa64-linux target is for - # the kernel only at this point and has no libc, and thus no - # headers, crt*.o, etc., all of which are needed by these. - noconfigdirs="$noconfigdirs target-zlib" - ;; - hppa*-*-*elf* | \ - parisc*-*-linux* | hppa*-*-linux* | \ - hppa*-*-lites* | \ - hppa*64*-*-*) - noconfigdirs="$noconfigdirs ${libgcj}" - # Do configure ld/binutils/gas for this case. - ;; - hppa*-*-*) - # HP's C compiler doesn't handle Emacs correctly (but on BSD and Mach - # cc is gcc, and on any system a user should be able to link cc to - # whatever they want. FIXME, emacs emacs19). - case "${CC}" in - "" | cc*) noconfigdirs="$noconfigdirs emacs emacs19" ;; - *) ;; - esac - # According to Alexandre Oliva <aoliva@redhat.com>, libjava won't - # build on HP-UX 10.20. - noconfigdirs="$noconfigdirs ld shellutils ${libgcj}" - ;; - ia64*-*-elf*) - # No gdb support yet. - noconfigdirs="$noconfigdirs tix readline mmalloc libgui itcl gdb" - ;; - i[3456]86-*-coff | i[3456]86-*-elf) - noconfigdirs="$noconfigdirs ${libgcj}" - if [ x${is_cross_compiler} != xno ] ; then - target_configdirs="${target_configdirs} target-libstub target-cygmon" - fi - ;; - i[34567]86-*-freebsd*) - noconfigdirs="$noconfigdirs target-newlib target-libgloss" - ;; - s390*-*-linux*) - # The libffi port is not yet in the GCC tree - noconfigdirs="$noconfigdirs target-newlib target-libgloss ${libgcj}" - # linux has rx in libc - skipdirs="$skipdirs target-librx" - ;; - *-*-linux*) - noconfigdirs="$noconfigdirs target-newlib target-libgloss" - # linux has rx in libc - skipdirs="$skipdirs target-librx" - ;; - i[3456]86-*-mingw32*) - target_configdirs="$target_configdirs target-mingw" - noconfigdirs="$noconfigdirs expect target-libgloss ${libgcj}" - - # Can't build gdb for mingw32 if not native. - case "${host}" in - i[3456]86-*-mingw32) ;; # keep gdb tcl tk expect etc. - *) noconfigdirs="$noconfigdirs gdb tcl tk expect itcl tix db snavigator gnuserv" - ;; - esac - ;; - *-*-cygwin*) - target_configdirs="$target_configdirs target-libtermcap target-winsup" - noconfigdirs="$noconfigdirs target-gperf target-libgloss ${libgcj}" - # always build newlib. - skipdirs=`echo " ${skipdirs} " | sed -e 's/ target-newlib / /'` - - # Can't build gdb for Cygwin if not native. - case "${host}" in - *-*-cygwin*) ;; # keep gdb tcl tk expect etc. - *) noconfigdirs="$noconfigdirs gdb tcl tk expect itcl tix libgui db snavigator gnuserv" - ;; - esac - ;; - i[3456]86-*-pe) - noconfigdirs="$noconfigdirs ${libstdcxx_version} target-librx target-libgloss ${libgcj}" - ;; - i[3456]86-*-sco3.2v5*) - # The linker does not yet know about weak symbols in COFF, - # and is not configured to handle mixed ELF and COFF. - noconfigdirs="$noconfigdirs ld target-libgloss ${libgcj}" - ;; - i[3456]86-*-sco*) - noconfigdirs="$noconfigdirs gprof target-libgloss ${libgcj}" - ;; - i[3456]86-*-solaris2*) - noconfigdirs="$noconfigdirs target-libgloss" - ;; - i[3456]86-*-sysv4*) - # The SYSV4 C compiler doesn't handle Emacs correctly - case "${CC}" in - "" | cc*) noconfigdirs="$noconfigdirs emacs emacs19" ;; - *) ;; - esac - # but that's okay since emacs doesn't work anyway - noconfigdirs="$noconfigdirs emacs emacs19 target-libgloss ${libgcj}" - ;; - i[3456]86-*-beos*) - noconfigdirs="$noconfigdirs gdb target-newlib target-libgloss ${libgcj}" - ;; - m68hc11-*-*|m6811-*-*|m68hc12-*-*|m6812-*-*) - noconfigdirs="$noconfigdirs target-libiberty ${libstdcxx_version} ${libgcj}" - ;; - m68k-*-elf*) - noconfigdirs="$noconfigdirs ${libgcj}" - if [ x${is_cross_compiler} != xno ] ; then - target_configdirs="${target_configdirs} target-bsp target-cygmon" +if test "x$enable_win32_registry" != xno; then + AC_MSG_CHECKING(registry key on windows hosts) + AC_DEFINE_UNQUOTED(WIN32_REGISTRY_KEY, "$gcc_cv_win32_registry_key", + [Define to be the last portion of registry key on windows hosts.]) + AC_MSG_RESULT($gcc_cv_win32_registry_key) +fi +;; +esac + +# Get an absolute path to the GCC top-level source directory +holddir=`pwd` +cd $srcdir +topdir=`pwd` +cd $holddir + +# Conditionalize the makefile for this host machine. +# Make-host contains the concatenation of all host makefile fragments +# [there can be more than one]. This file is built by configure.frag. +host_overrides=Make-host +dep_host_xmake_file= +for f in .. ${host_xmake_file} +do + if test -f ${srcdir}/config/$f + then + dep_host_xmake_file="${dep_host_xmake_file} ${srcdir}/config/$f" + fi +done + +# Conditionalize the makefile for this target machine. +# Make-target contains the concatenation of all host makefile fragments +# [there can be more than one]. This file is built by configure.frag. +target_overrides=Make-target +dep_tmake_file= +for f in .. ${tmake_file} +do + if test -f ${srcdir}/config/$f + then + dep_tmake_file="${dep_tmake_file} ${srcdir}/config/$f" + fi +done + +# If the host doesn't support symlinks, modify CC in +# FLAGS_TO_PASS so CC="stage1/xgcc -Bstage1/" works. +# Otherwise, we can use "CC=$(CC)". +rm -f symtest.tem +if $symbolic_link $srcdir/gcc.c symtest.tem 2>/dev/null +then + cc_set_by_configure="\$(CC)" + quoted_cc_set_by_configure="\$(CC)" + stage_prefix_set_by_configure="\$(STAGE_PREFIX)" + quoted_stage_prefix_set_by_configure="\$(STAGE_PREFIX)" +else + rm -f symtest.tem + if cp -p $srcdir/gcc.c symtest.tem 2>/dev/null + then + symbolic_link="cp -p" + else + symbolic_link="cp" + fi + cc_set_by_configure="\`case '\$(CC)' in stage*) echo '\$(CC)' | sed -e 's|stage|../stage|g';; *) echo '\$(CC)';; esac\`" + quoted_cc_set_by_configure="\\\`case '\\\$(CC)' in stage*) echo '\\\$(CC)' | sed -e 's|stage|../stage|g';; *) echo '\\\$(CC)';; esac\\\`" + stage_prefix_set_by_configure="\`case '\$(STAGE_PREFIX)' in stage*) echo '\$(STAGE_PREFIX)' | sed -e 's|stage|../stage|g';; *) echo '\$(STAGE_PREFIX)';; esac\`" + quoted_stage_prefix_set_by_configure="\\\`case '\\\$(STAGE_PREFIX)' in stage*) echo '\\\$(STAGE_PREFIX)' | sed -e 's|stage|../stage|g';; *) echo '\\\$(STAGE_PREFIX)';; esac\\\`" +fi +rm -f symtest.tem + +out_object_file=`basename $out_file .c`.o + +tm_file_list= +for f in $tm_file; do + case $f in + ansidecl.h ) + tm_file_list="${tm_file_list} \$(srcdir)/../include/ansidecl.h" ;; + defaults.h ) + tm_file_list="${tm_file_list} $f" ;; + *) tm_file_list="${tm_file_list} \$(srcdir)/config/$f" ;; + esac +done + +tm_p_file_list= +for f in $tm_p_file; do + tm_p_file_list="${tm_p_file_list} \$(srcdir)/config/$f" +done + +host_xm_file_list= +for f in $host_xm_file; do + case $f in + ansidecl.h ) + host_xm_file_list="${host_xm_file_list} \$(srcdir)/../include/ansidecl.h" ;; + auto-host.h | defaults.h ) + host_xm_file_list="${host_xm_file_list} $f" ;; + *) host_xm_file_list="${host_xm_file_list} \$(srcdir)/config/$f" ;; + esac +done + +build_xm_file_list= +for f in $build_xm_file; do + case $f in + ansidecl.h ) + build_xm_file_list="${build_xm_file_list} \$(srcdir)/../include/ansidecl.h" ;; + auto-build.h | auto-host.h | defaults.h ) + build_xm_file_list="${build_xm_file_list} $f" ;; + *) build_xm_file_list="${build_xm_file_list} \$(srcdir)/config/$f" ;; + esac +done + +# Define macro CROSS_COMPILE in compilation if this is a cross-compiler. +# Also use all.cross instead of all.internal and adjust SYSTEM_HEADER_DIR. +CROSS= AC_SUBST(CROSS) +ALL=all.internal AC_SUBST(ALL) +SYSTEM_HEADER_DIR='$(NATIVE_SYSTEM_HEADER_DIR)' AC_SUBST(SYSTEM_HEADER_DIR) +if test x$host != x$target +then + CROSS="-DCROSS_COMPILE" + ALL=all.cross + SYSTEM_HEADER_DIR='$(CROSS_SYSTEM_HEADER_DIR)' +fi + +# If this is a cross-compiler that does not +# have its own set of headers then define +# inhibit_libc + +# If this is using newlib, then define inhibit_libc in LIBGCC2_CFLAGS. +# This prevents libgcc2 from containing any code which requires libc +# support. +inhibit_libc= +if [test x$host != x$target] && [test x$with_headers = x]; then + inhibit_libc=-Dinhibit_libc +else + if [test x$with_newlib = xyes]; then + inhibit_libc=-Dinhibit_libc + fi +fi +AC_SUBST(inhibit_libc) + +# When building gcc with a cross-compiler, we need to adjust things so +# that the generator programs are still built with the native compiler. +# Also, we cannot run fixincludes or fix-header. +# Note that the terminology here is wrong; it should be BUILD_* throughout. +# FIXME. + +# These are the normal (build=host) settings: +HOST_PREFIX= AC_SUBST(HOST_PREFIX) +HOST_PREFIX_1=ignore- AC_SUBST(HOST_PREFIX_1) +HOST_CC='$(CC)' AC_SUBST(HOST_CC) +HOST_CFLAGS='$(ALL_CFLAGS)' AC_SUBST(HOST_CFLAGS) + +STMP_FIXINC=stmp-fixinc AC_SUBST(STMP_FIXINC) +STMP_FIXPROTO=stmp-fixproto AC_SUBST(STMP_FIXPROTO) + +# And these apply if build != host. +if test x$build != x$host +then + HOST_PREFIX=build- + HOST_PREFIX_1=build- + HOST_CC='$(CC_FOR_BUILD)' + HOST_CFLAGS='$(INTERNAL_CFLAGS) $(T_CFLAGS) $(CFLAGS_FOR_BUILD) $(XCFLAGS)' + + STMP_FIXINC= + STMP_FIXPROTO= +fi + +# Expand extra_headers to include complete path. +# This substitutes for lots of t-* files. +extra_headers_list= +if test "x$extra_headers" = x +then true +else + # Prepend ${srcdir}/config/${cpu_type}/ to every entry in extra_headers. + for file in $extra_headers; + do + extra_headers_list="${extra_headers_list} \$(srcdir)/config/${cpu_type}/${file}" + done +fi + +if test x$use_collect2 = xno; then + use_collect2= +fi + +# Add a definition of USE_COLLECT2 if system wants one. +if test x$use_collect2 != x +then + host_xm_defines="${host_xm_defines} USE_COLLECT2" + xm_defines="${xm_defines} USE_COLLECT2" +fi + +# If we have gas in the build tree, make a link to it. +if test -f ../gas/Makefile; then + rm -f as; $symbolic_link ../gas/as-new$host_exeext as$host_exeext 2>/dev/null +fi + +# If we have nm and objdump in the build tree, make a link to them. +if test -f ../binutils/Makefile; then + rm -f nm; $symbolic_link ../binutils/nm-new$host_exeext nm$host_exeext 2>/dev/null + rm -f objdump; $symbolic_link ../binutils/objdump$host_exeext objdump$host_exeext 2>/dev/null +fi + +# If we have ld in the build tree, make a link to it. +if test -f ../ld/Makefile; then + rm -f collect-ld; $symbolic_link ../ld/ld-new$host_exeext collect-ld$host_exeext 2>/dev/null +fi + +# Figure out what assembler we will be using. +AC_MSG_CHECKING(what assembler to use) +gcc_cv_as= +gcc_cv_gas_major_version= +gcc_cv_gas_minor_version= +gcc_cv_as_gas_srcdir=`echo $srcdir | sed -e 's,/gcc$,,'`/gas +gcc_cv_as_bfd_srcdir=`echo $srcdir | sed -e 's,/gcc$,,'`/bfd +if test -x "$DEFAULT_ASSEMBLER"; then + gcc_cv_as="$DEFAULT_ASSEMBLER" +elif test -x "$AS"; then + gcc_cv_as="$AS" +elif test -x as$host_exeext; then + # Build using assembler in the current directory. + gcc_cv_as=./as$host_exeext +elif test -f $gcc_cv_as_gas_srcdir/configure.in -a -f ../gas/Makefile; then + # Single tree build which includes gas. + for f in $gcc_cv_as_bfd_srcdir/configure $gcc_cv_as_gas_srcdir/configure $gcc_cv_as_gas_srcdir/configure.in $gcc_cv_as_gas_srcdir/Makefile.in + do +changequote(,)dnl + gcc_cv_gas_version=`grep '^VERSION=[0-9]*\.[0-9]*' $f` +changequote([,])dnl + if test x$gcc_cv_gas_version != x; then + break + fi + done +changequote(,)dnl + gcc_cv_gas_major_version=`expr "$gcc_cv_gas_version" : "VERSION=\([0-9]*\)"` + gcc_cv_gas_minor_version=`expr "$gcc_cv_gas_version" : "VERSION=[0-9]*\.\([0-9]*\)"` + gcc_cv_gas_patch_version=`expr "$gcc_cv_gas_version" : "VERSION=[0-9]*\.[0-9]*\.\([0-9]*\)"` +changequote([,])dnl +fi + +if test "x$gcc_cv_as" = x; then + # Search the same directories that the installed compiler will + # search. Else we may find the wrong assembler and lose. If we + # do not find a suitable assembler binary, then try the user's + # path. + # + # Also note we have to check MD_EXEC_PREFIX before checking the + # user's path. Unfortunately, there is no good way to get at the + # value of MD_EXEC_PREFIX here. So we do a brute force search + # through all the known MD_EXEC_PREFIX values. Ugh. This needs + # to be fixed as part of the make/configure rewrite too. + + if test "x$exec_prefix" = xNONE; then + if test "x$prefix" = xNONE; then + test_prefix=/usr/local + else + test_prefix=$prefix + fi + else + test_prefix=$exec_prefix + fi + + # If the loop below does not find an assembler, then use whatever + # one we can find in the users's path. + # user's path. + if test "x$program_prefix" != xNONE; then + gcc_cv_as=${program_prefix}as$host_exeext + else + gcc_cv_as=`echo as | sed ${program_transform_name}`$host_exeext + fi + + test_dirs="$test_prefix/lib/gcc-lib/$target_alias/$gcc_version \ + $test_prefix/lib/gcc-lib/$target_alias \ + /usr/lib/gcc/$target_alias/$gcc_version \ + /usr/lib/gcc/$target_alias \ + $test_prefix/$target_alias/bin/$target_alias/$gcc_version \ + $test_prefix/$target_alias/bin" + + if test x$host = x$target; then + test_dirs="$test_dirs \ + /usr/libexec \ + /usr/ccs/gcc \ + /usr/ccs/bin \ + /udk/usr/ccs/bin \ + /bsd43/usr/lib/cmplrs/cc \ + /usr/cross64/usr/bin \ + /usr/lib/cmplrs/cc \ + /sysv/usr/lib/cmplrs/cc \ + /svr4/usr/lib/cmplrs/cc \ + /usr/bin" + fi + + for dir in $test_dirs; do + if test -x $dir/as$host_exeext; then + gcc_cv_as=$dir/as$host_exeext + break; + fi + done +fi +if test x$gcc_cv_gas_major_version != x -a x$gcc_cv_gas_minor_version != x; then + AC_MSG_RESULT("newly built gas") +else + AC_MSG_RESULT($gcc_cv_as) +fi + +# Figure out what linker we will be using. +AC_MSG_CHECKING(what linker to use) +gcc_cv_ld= +gcc_cv_gld_major_version= +gcc_cv_gld_minor_version= +gcc_cv_ld_gld_srcdir=`echo $srcdir | sed -e 's,/gcc$,,'`/ld +gcc_cv_ld_bfd_srcdir=`echo $srcdir | sed -e 's,/gcc$,,'`/bfd +if test -x "$DEFAULT_LINKER"; then + gcc_cv_ld="$DEFAULT_LINKER" +elif test -x "$LD"; then + gcc_cv_ld="$LD" +elif test -x ld$host_exeext; then + # Build using linker in the current directory. + gcc_cv_ld=./ld$host_exeext +elif test -f $gcc_cv_ld_gld_srcdir/configure.in -a -f ../ld/Makefile; then + # Single tree build which includes ld. + for f in $gcc_cv_ld_bfd_srcdir/configure $gcc_cv_ld_gld_srcdir/configure $gcc_cv_ld_gld_srcdir/configure.in $gcc_cv_ld_gld_srcdir/Makefile.in + do +changequote(,)dnl + gcc_cv_gld_version=`grep '^VERSION=[0-9]*\.[0-9]*' $f` +changequote([,])dnl + if test x$gcc_cv_gld_version != x; then + break + fi + done +changequote(,)dnl + gcc_cv_gld_major_version=`expr "$gcc_cv_gld_version" : "VERSION=\([0-9]*\)"` + gcc_cv_gld_minor_version=`expr "$gcc_cv_gld_version" : "VERSION=[0-9]*\.\([0-9]*\)"` +changequote([,])dnl +fi + +if test "x$gcc_cv_ld" = x; then + # Search the same directories that the installed compiler will + # search. Else we may find the wrong linker and lose. If we + # do not find a suitable linker binary, then try the user's + # path. + # + # Also note we have to check MD_EXEC_PREFIX before checking the + # user's path. Unfortunately, there is no good way to get at the + # value of MD_EXEC_PREFIX here. So we do a brute force search + # through all the known MD_EXEC_PREFIX values. Ugh. This needs + # to be fixed as part of the make/configure rewrite too. + + if test "x$exec_prefix" = xNONE; then + if test "x$prefix" = xNONE; then + test_prefix=/usr/local + else + test_prefix=$prefix + fi + else + test_prefix=$exec_prefix + fi + + # If the loop below does not find an linker, then use whatever + # one we can find in the users's path. + # user's path. + if test "x$program_prefix" != xNONE; then + gcc_cv_ld=${program_prefix}ld$host_exeext + else + gcc_cv_ld=`echo ld | sed ${program_transform_name}`$host_exeext + fi + + test_dirs="$test_prefix/lib/gcc-lib/$target_alias/$gcc_version \ + $test_prefix/lib/gcc-lib/$target_alias \ + /usr/lib/gcc/$target_alias/$gcc_version \ + /usr/lib/gcc/$target_alias \ + $test_prefix/$target_alias/bin/$target_alias/$gcc_version \ + $test_prefix/$target_alias/bin" + + if test x$host = x$target; then + test_dirs="$test_dirs \ + /usr/libexec \ + /usr/ccs/gcc \ + /usr/ccs/bin \ + /udk/usr/ccs/bin \ + /bsd43/usr/lib/cmplrs/cc \ + /usr/cross64/usr/bin \ + /usr/lib/cmplrs/cc \ + /sysv/usr/lib/cmplrs/cc \ + /svr4/usr/lib/cmplrs/cc \ + /usr/bin" + fi + + for dir in $test_dirs; do + if test -x $dir/ld$host_exeext; then + gcc_cv_ld=$dir/ld$host_exeext + break; + fi + done +fi +if test x$gcc_cv_gld_major_version != x -a x$gcc_cv_gld_minor_version != x; then + AC_MSG_RESULT("newly built ld") +else + AC_MSG_RESULT($gcc_cv_ld) +fi + +# Figure out what nm we will be using. +AC_MSG_CHECKING(what nm to use) +if test -x nm$host_exeext; then + gcc_cv_nm=./nm$host_exeext +elif test "x$program_prefix" != xNONE; then + gcc_cv_nm=${program_prefix}nm$host_exeext +else + gcc_cv_nm=`echo nm | sed ${program_transform_name}`$host_exeext +fi +AC_MSG_RESULT($gcc_cv_nm) + +# Figure out what objdump we will be using. +AC_MSG_CHECKING(what objdump to use) +if test -x objdump$host_exeext; then + gcc_cv_objdump=./objdump$host_exeext +elif test "x$program_prefix" != xNONE; then + gcc_cv_objdump=${program_prefix}objdump$host_exeext +else + gcc_cv_objdump=`echo objdump | sed ${program_transform_name}`$host_exeext +fi +AC_MSG_RESULT($gcc_cv_objdump) + +# Figure out what assembler alignment features are present. +AC_MSG_CHECKING(assembler alignment features) +gcc_cv_as_alignment_features=none +if test x$gcc_cv_gas_major_version != x -a x$gcc_cv_gas_minor_version != x; then + # Gas version 2.6 and later support for .balign and .p2align. + # bytes to skip when using .p2align. + if test "$gcc_cv_gas_major_version" -eq 2 -a "$gcc_cv_gas_minor_version" -ge 6 -o "$gcc_cv_gas_major_version" -gt 2; then + gcc_cv_as_alignment_features=".balign and .p2align" + AC_DEFINE(HAVE_GAS_BALIGN_AND_P2ALIGN) + fi + # Gas version 2.8 and later support specifying the maximum + # bytes to skip when using .p2align. + if test "$gcc_cv_gas_major_version" -eq 2 -a "$gcc_cv_gas_minor_version" -ge 8 -o "$gcc_cv_gas_major_version" -gt 2; then + gcc_cv_as_alignment_features=".p2align including maximum skip" + AC_DEFINE(HAVE_GAS_MAX_SKIP_P2ALIGN) + fi +elif test x$gcc_cv_as != x; then + # Check if we have .balign and .p2align + echo ".balign 4" > conftest.s + echo ".p2align 2" >> conftest.s + if $gcc_cv_as -o conftest.o conftest.s > /dev/null 2>&1; then + gcc_cv_as_alignment_features=".balign and .p2align" + AC_DEFINE(HAVE_GAS_BALIGN_AND_P2ALIGN) + fi + rm -f conftest.s conftest.o + # Check if specifying the maximum bytes to skip when + # using .p2align is supported. + echo ".p2align 4,,7" > conftest.s + if $gcc_cv_as -o conftest.o conftest.s > /dev/null 2>&1; then + gcc_cv_as_alignment_features=".p2align including maximum skip" + AC_DEFINE(HAVE_GAS_MAX_SKIP_P2ALIGN) + fi + rm -f conftest.s conftest.o +fi +AC_MSG_RESULT($gcc_cv_as_alignment_features) + +AC_MSG_CHECKING(assembler subsection support) +gcc_cv_as_subsections=no +if test x$gcc_cv_gas_major_version != x -a x$gcc_cv_gas_minor_version != x; then + if test "$gcc_cv_gas_major_version" -eq 2 -a "$gcc_cv_gas_minor_version" -ge 9 -o "$gcc_cv_gas_major_version" -gt 2 && grep 'obj_format = elf' ../gas/Makefile > /dev/null; then + gcc_cv_as_subsections="working .subsection -1" + fi +elif test x$gcc_cv_as != x; then + # Check if we have .subsection + echo ".subsection 1" > conftest.s + if $gcc_cv_as -o conftest.o conftest.s > /dev/null 2>&1; then + gcc_cv_as_subsections=".subsection" + if test x$gcc_cv_nm != x; then + cat > conftest.s <<EOF +conftest_label1: .word 0 +.subsection -1 +conftest_label2: .word 0 +.previous +EOF + if $gcc_cv_as -o conftest.o conftest.s > /dev/null 2>&1; then + $gcc_cv_nm conftest.o | grep conftest_label1 > conftest.nm1 + $gcc_cv_nm conftest.o | grep conftest_label2 | sed -e 's/label2/label1/' > conftest.nm2 + if cmp conftest.nm1 conftest.nm2 > /dev/null 2>&1; then + : + else + gcc_cv_as_subsections="working .subsection -1" + fi + fi + fi + fi + rm -f conftest.s conftest.o conftest.nm1 conftest.nm2 +fi +if test x"$gcc_cv_as_subsections" = x"working .subsection -1"; then + AC_DEFINE(HAVE_GAS_SUBSECTION_ORDERING, 1, +[Define if your assembler supports .subsection and .subsection -1 starts + emitting at the beginning of your section.]) +fi +AC_MSG_RESULT($gcc_cv_as_subsections) + +AC_MSG_CHECKING(assembler weak support) +gcc_cv_as_weak=no +if test x$gcc_cv_gas_major_version != x -a x$gcc_cv_gas_minor_version != x; then + if test "$gcc_cv_gas_major_version" -eq 2 -a "$gcc_cv_gas_minor_version" -ge 2 -o "$gcc_cv_gas_major_version" -gt 2; then + gcc_cv_as_weak="yes" + fi +elif test x$gcc_cv_as != x; then + # Check if we have .weak + echo " .weak foobar" > conftest.s + if $gcc_cv_as -o conftest.o conftest.s > /dev/null 2>&1; then + gcc_cv_as_weak="yes" + fi + rm -f conftest.s conftest.o conftest.nm1 conftest.nm2 +fi +if test x"$gcc_cv_as_weak" = xyes; then + AC_DEFINE(HAVE_GAS_WEAK, 1, [Define if your assembler supports .weak.]) +fi +AC_MSG_RESULT($gcc_cv_as_weak) + +AC_MSG_CHECKING(assembler hidden support) +gcc_cv_as_hidden=no +if test x$gcc_cv_gas_major_version != x -a x$gcc_cv_gas_minor_version != x; then + if test "$gcc_cv_gas_major_version" -eq 2 \ + -a "$gcc_cv_gas_minor_version" -eq 12 \ + -a "$gcc_cv_gas_patch_version" -ge 1 \ + -o "$gcc_cv_gas_major_version" -eq 2 \ + -a "$gcc_cv_gas_minor_version" -gt 12 \ + -o "$gcc_cv_gas_major_version" -gt 2 \ + && grep 'obj_format = elf' ../gas/Makefile > /dev/null; then + gcc_cv_as_hidden="yes" + fi +elif test x$gcc_cv_as != x; then + # Check if we have .hidden + echo " .hidden foobar" > conftest.s + echo "foobar:" >> conftest.s + if $gcc_cv_as -o conftest.o conftest.s > /dev/null 2>&1; then + gcc_cv_as_hidden="yes" + fi + rm -f conftest.s conftest.o conftest.nm1 conftest.nm2 + + # GNU LD versions before 2.12.1 have buggy support for STV_HIDDEN. + # This is irritatingly difficult to feature test for. Look for + # the date string after the version number. + ld_ver=`$gcc_cv_ld --version 2>/dev/null | head -1` + if echo "$ld_ver" | grep GNU > /dev/null; then +changequote(,)dnl + ld_vers=`echo $ld_ver | sed -n 's,^.*[ ]\([0-9][0-9]*\.[0-9][0-9]*\(\|\.[0-9][0-9]*\)\)\([ ].*\|\)$,\1,p'` + ld_date=`echo $ld_ver | sed -n 's,^.*\([2-9][0-9][0-9][0-9]\)[-]*\([01][0-9]\)[-]*\([0-3][0-9]\).*$,\1\2\3,p'` + if test 0"$ld_date" -lt 20020404; then + if test -n "$ld_date"; then + # If there was date string, but was earlier than 2002-04-04, fail + gcc_cv_as_hidden="no" + elif test -z "$ld_vers"; then + # If there was no date string nor ld version number, something is wrong + gcc_cv_as_hidden="no" + else + ld_vers_major=`expr "$ld_vers" : '\([0-9]*\)'` + ld_vers_minor=`expr "$ld_vers" : '[0-9]*\.\([0-9]*\)'` + ld_vers_patch=`expr "$ld_vers" : '[0-9]*\.[0-9]*\.\([0-9]*\)'` + test -z "$ld_vers_patch" && ld_vers_patch=0 + if test "$ld_vers_major" -lt 2; then + gcc_cv_as_hidden="no" + elif test "$ld_vers_major" -eq 2 -a "$ld_vers_minor" -lt 12; then + gcc_cv_as_hidden="no" + elif test "$ld_vers_major" -eq 2 -a "$ld_vers_minor" -eq 12 \ + -a "$ld_vers_patch" -eq 0; then + gcc_cv_as_hidden="no" + fi + fi + fi +changequote([,])dnl + fi +fi + +if test x"$gcc_cv_as_hidden" = xyes; then + AC_DEFINE(HAVE_GAS_HIDDEN, 1, + [Define if your assembler supports .hidden.]) +fi +AC_MSG_RESULT($gcc_cv_as_hidden) +libgcc_visibility=$gcc_cv_as_hidden +AC_SUBST(libgcc_visibility) + +AC_MSG_CHECKING(assembler leb128 support) +gcc_cv_as_leb128=no +if test x$gcc_cv_gas_major_version != x -a x$gcc_cv_gas_minor_version != x; then + if test "$gcc_cv_gas_major_version" -eq 2 -a "$gcc_cv_gas_minor_version" -ge 11 -o "$gcc_cv_gas_major_version" -gt 2 && grep 'obj_format = elf' ../gas/Makefile > /dev/null; then + gcc_cv_as_leb128="yes" + fi +elif test x$gcc_cv_as != x; then + # Check if we have .[us]leb128, and support symbol arithmetic with it. + cat > conftest.s <<EOF + .data + .uleb128 L2 - L1 +L1: + .uleb128 1280 + .sleb128 -1010 +L2: +EOF + if $gcc_cv_as -o conftest.o conftest.s > /dev/null 2>&1; then + gcc_cv_as_leb128="yes" + + # GAS versions before 2.11 do not support uleb128, + # despite appearing to. + # ??? There exists an elf-specific test that will crash + # the assembler. Perhaps it's better to figure out whether + # arbitrary sections are supported and try the test. + as_ver=`$gcc_cv_as --version 2>/dev/null | head -1` + if echo "$as_ver" | grep GNU > /dev/null; then +changequote(,)dnl + as_ver=`echo $as_ver | sed -e 's/GNU assembler \([0-9.][0-9.]*\).*/\1/'` + as_major=`echo $as_ver | sed 's/\..*//'` + as_minor=`echo $as_ver | sed 's/[^.]*\.\([0-9]*\).*/\1/'` +changequote([,])dnl + if test $as_major -eq 2 -a $as_minor -lt 11; then + gcc_cv_as_leb128="no" + fi + fi + fi + rm -f conftest.s conftest.o conftest.nm1 conftest.nm2 +fi +if test x"$gcc_cv_as_leb128" = xyes; then + AC_DEFINE(HAVE_AS_LEB128, 1, + [Define if your assembler supports .uleb128.]) +fi +AC_MSG_RESULT($gcc_cv_as_leb128) + +AC_MSG_CHECKING(assembler eh_frame optimization) +gcc_cv_as_eh_frame=no +if test x$gcc_cv_gas_major_version != x -a x$gcc_cv_gas_minor_version != x; then + if test "$gcc_cv_gas_major_version" -eq 2 -a "$gcc_cv_gas_minor_version" -ge 12 -o "$gcc_cv_gas_major_version" -gt 2 && grep 'obj_format = elf' ../gas/Makefile > /dev/null; then + gcc_cv_as_eh_frame="yes" + fi +elif test x$gcc_cv_as != x; then + # Check if this is GAS. + as_ver=`$gcc_cv_as --version < /dev/null 2> /dev/null | head -1` + rm -f a.out 2> /dev/null + if echo "$as_ver" | grep GNU > /dev/null; then + # Versions up to and including 2.11.0 may mis-optimize + # .eh_frame data. Try something. + cat > conftest.s <<EOF + .text +.LFB1: + .4byte 0 +.L1: + .4byte 0 +.LFE1: + .section .eh_frame,"aw",@progbits +__FRAME_BEGIN__: + .4byte .LECIE1-.LSCIE1 +.LSCIE1: + .4byte 0x0 + .byte 0x1 + .ascii "z\0" + .byte 0x1 + .byte 0x78 + .byte 0x1a + .byte 0x0 + .byte 0x4 + .4byte 1 + .p2align 1 +.LECIE1: +.LSFDE1: + .4byte .LEFDE1-.LASFDE1 +.LASFDE1: + .4byte .LASFDE1-__FRAME_BEGIN__ + .4byte .LFB1 + .4byte .LFE1-.LFB1 + .byte 0x4 + .4byte .LFE1-.LFB1 + .byte 0x4 + .4byte .L1-.LFB1 +.LEFDE1: +EOF + cat > conftest.lit <<EOF + 0000 10000000 00000000 017a0001 781a0004 .........z..x... + 0010 01000000 12000000 18000000 00000000 ................ + 0020 08000000 04080000 0044 .........D +EOF + cat > conftest.big <<EOF + 0000 00000010 00000000 017a0001 781a0004 .........z..x... + 0010 00000001 00000012 00000018 00000000 ................ + 0020 00000008 04000000 0844 .........D +EOF + # If the assembler didn't choke, and we can objdump, + # and we got the correct data, then succeed. + if $gcc_cv_as -o conftest.o conftest.s > /dev/null 2>&1 \ + && $gcc_cv_objdump -s -j .eh_frame conftest.o 2>/dev/null \ + | tail -3 > conftest.got \ + && { cmp conftest.lit conftest.got > /dev/null 2>&1 \ + || cmp conftest.big conftest.got > /dev/null 2>&1; } + then + gcc_cv_as_eh_frame="yes" + else + gcc_cv_as_eh_frame="bad" + if $gcc_cv_as -o conftest.o --traditional-format /dev/null; then + AC_DEFINE(USE_AS_TRADITIONAL_FORMAT, 1, + [Define if your assembler mis-optimizes .eh_frame data.]) + fi + fi + fi + rm -f conftest.* +fi +AC_MSG_RESULT($gcc_cv_as_eh_frame) + +AC_MSG_CHECKING(assembler section merging support) +gcc_cv_as_shf_merge=no +if test x$gcc_cv_gas_major_version != x -a x$gcc_cv_gas_minor_version != x; then + if test "$gcc_cv_gas_major_version" -eq 2 -a "$gcc_cv_gas_minor_version" -ge 12 -o "$gcc_cv_gas_major_version" -gt 2 && grep 'obj_format = elf' ../gas/Makefile > /dev/null; then + gcc_cv_as_shf_merge=yes + fi +elif test x$gcc_cv_as != x; then + # Check if we support SHF_MERGE sections + echo '.section .rodata.str, "aMS", @progbits, 1' > conftest.s + if $gcc_cv_as --fatal-warnings -o conftest.o conftest.s > /dev/null 2>&1; then + gcc_cv_as_shf_merge=yes + fi + rm -f conftest.s conftest.o +fi +if test x"$gcc_cv_as_shf_merge" = xyes; then + AC_DEFINE(HAVE_GAS_SHF_MERGE, 1, +[Define if your assembler supports marking sections with SHF_MERGE flag.]) +fi +AC_MSG_RESULT($gcc_cv_as_shf_merge) + +case "$target" in + # All TARGET_ABI_OSF targets. + alpha*-*-osf* | alpha*-*-linux* | alpha*-*-*bsd*) + AC_CACHE_CHECK([assembler supports explicit relocations], + gcc_cv_as_explicit_relocs, [ + gcc_cv_as_explicit_relocs=unknown + if test x$gcc_cv_gas_major_version != x \ + -a x$gcc_cv_gas_minor_version != x + then + if test "$gcc_cv_gas_major_version" -eq 2 \ + -a "$gcc_cv_gas_minor_version" -ge 12 \ + -o "$gcc_cv_gas_major_version" -gt 2; then + gcc_cv_as_explicit_relocs=yes + fi + elif test x$gcc_cv_as != x; then + cat > conftest.s << 'EOF' + .set nomacro + .text + extbl $3, $2, $3 !lituse_bytoff!1 + ldq $2, a($29) !literal!1 + ldq $4, b($29) !literal!2 + ldq_u $3, 0($2) !lituse_base!1 + ldq $27, f($29) !literal!5 + jsr $26, ($27), f !lituse_jsr!5 + ldah $29, 0($26) !gpdisp!3 + lda $0, c($29) !gprel + ldah $1, d($29) !gprelhigh + lda $1, d($1) !gprellow + lda $29, 0($29) !gpdisp!3 +EOF + if $gcc_cv_as -o conftest.o conftest.s > /dev/null 2>&1; then + gcc_cv_as_explicit_relocs=yes + else + gcc_cv_as_explicit_relocs=no + fi + rm -f conftest.s conftest.o + fi + ]) + if test "x$gcc_cv_as_explicit_relocs" = xyes; then + AC_DEFINE(HAVE_AS_EXPLICIT_RELOCS, 1, + [Define if your assembler supports explicit relocations.]) fi ;; - m68k-*-coff*) - noconfigdirs="$noconfigdirs ${libgcj}" - if [ x${is_cross_compiler} != xno ] ; then - target_configdirs="${target_configdirs} target-bsp target-cygmon" + sparc*-*-*) + AC_CACHE_CHECK([assembler .register pseudo-op support], + gcc_cv_as_register_pseudo_op, [ + gcc_cv_as_register_pseudo_op=unknown + if test x$gcc_cv_as != x; then + # Check if we have .register + echo ".register %g2, #scratch" > conftest.s + if $gcc_cv_as -o conftest.o conftest.s > /dev/null 2>&1; then + gcc_cv_as_register_pseudo_op=yes + else + gcc_cv_as_register_pseudo_op=no + fi + rm -f conftest.s conftest.o + fi + ]) + if test "x$gcc_cv_as_register_pseudo_op" = xyes; then + AC_DEFINE(HAVE_AS_REGISTER_PSEUDO_OP, 1, + [Define if your assembler supports .register.]) fi - ;; - mcore-*-pe*) - # The EPOC C++ environment does not support exceptions or rtti, - # and so building libstdc++-v3 tends not to always work. - noconfigdirs="$noconfigdirs target-libstdc++-v3" - ;; - mmix-*-*) - noconfigdirs="$noconfigdirs ${libgcj}" - ;; - mn10200-*-*) - noconfigdirs="$noconfigdirs ${libgcj}" - if [ x${is_cross_compiler} != xno ] ; then - target_configdirs="${target_configdirs} target-libstub target-cygmon" + + AC_CACHE_CHECK([assembler supports -relax], + gcc_cv_as_relax_opt, [ + gcc_cv_as_relax_opt=unknown + if test x$gcc_cv_as != x; then + # Check if gas supports -relax + echo ".text" > conftest.s + if $gcc_cv_as -relax -o conftest.o conftest.s > /dev/null 2>&1; then + gcc_cv_as_relax_opt=yes + else + gcc_cv_as_relax_opt=no + fi + rm -f conftest.s conftest.o + fi + ]) + if test "x$gcc_cv_as_relax_opt" = xyes; then + AC_DEFINE(HAVE_AS_RELAX_OPTION, 1, + [Define if your assembler supports -relax option.]) fi - ;; - mn10300-*-*) - noconfigdirs="$noconfigdirs ${libgcj}" - if [ x${is_cross_compiler} != xno ] ; then - target_configdirs="${target_configdirs} target-bsp target-libstub target-cygmon" + + AC_CACHE_CHECK([assembler and linker support unaligned pc related relocs], + gcc_cv_as_sparc_ua_pcrel, [ + gcc_cv_as_sparc_ua_pcrel=unknown + if test x$gcc_cv_as != x -a x$gcc_cv_ld != x; then + gcc_cv_as_sparc_ua_pcrel=no + echo ".text; foo: nop; .data; .align 4; .byte 0; .uaword %r_disp32(foo)" > conftest.s + if $gcc_cv_as -K PIC -o conftest.o conftest.s > /dev/null 2>&1 \ + && $gcc_cv_ld -o conftest conftest.o -G > /dev/null 2>&1; then + gcc_cv_as_sparc_ua_pcrel=yes + fi + rm -f conftest.s conftest.o conftest + fi + ]) + if test "x$gcc_cv_as_sparc_ua_pcrel" = xyes; then + AC_DEFINE(HAVE_AS_SPARC_UA_PCREL, 1, + [Define if your assembler and linker support unaligned PC relative relocs.]) fi - ;; - powerpc-*-aix*) - # copied from rs6000-*-* entry - # The configure and build of ld are currently disabled because - # GNU ld is known to be broken for AIX 4.2 and 4.3 (at least) - # The symptom is that GDBtk 4.18 fails at startup with a segfault - # if linked by GNU ld, but not if linked by the native ld. - noconfigdirs="$noconfigdirs gprof cvssrc target-libgloss ${libgcj} ld" - use_gnu_ld=no - ;; - powerpc*-*-winnt* | powerpc*-*-pe* | ppc*-*-pe) - target_configdirs="$target_configdirs target-winsup" - noconfigdirs="$noconfigdirs gdb tcl tk make expect target-libgloss itcl tix db snavigator gnuserv ${libgcj}" - # always build newlib. - skipdirs=`echo " ${skipdirs} " | sed -e 's/ target-newlib / /'` - ;; - # This is temporary until we can link against shared libraries - powerpcle-*-solaris*) - noconfigdirs="$noconfigdirs gdb sim make tcl tk expect itcl tix db snavigator gnuserv ${libgcj}" - ;; - powerpc-*-beos*) - noconfigdirs="$noconfigdirs gdb target-newlib target-libgloss ${libgcj}" - ;; - powerpc-*-eabi) - noconfigdirs="$noconfigdirs ${libgcj}" - if [ x${is_cross_compiler} != xno ] ; then - target_configdirs="${target_configdirs} target-bsp target-libstub target-cygmon" + + AC_CACHE_CHECK([assembler and linker support unaligned pc related relocs against hidden symbols], + gcc_cv_as_sparc_ua_pcrel_hidden, [ + if test "x$gcc_cv_as_sparc_ua_pcrel" = xyes; then + gcc_cv_as_sparc_ua_pcrel_hidden=unknown + if test x$gcc_cv_objdump != x; then + gcc_cv_as_sparc_ua_pcrel_hidden=no + echo ".data; .align 4; .byte 0x31; .uaword %r_disp32(foo)" > conftest.s + echo ".byte 0x32, 0x33, 0x34; .global foo; .hidden foo" >> conftest.s + echo "foo: .skip 4" >> conftest.s + if $gcc_cv_as -K PIC -o conftest.o conftest.s > /dev/null 2>&1 \ + && $gcc_cv_ld -o conftest conftest.o -G > /dev/null 2>&1 \ + && $gcc_cv_objdump -s -j .data conftest 2> /dev/null \ + | grep ' 31000000 07323334' > /dev/null 2>&1; then + if $gcc_cv_objdump -R conftest 2> /dev/null \ + | grep 'DISP32' > /dev/null 2>&1; then + : + else + gcc_cv_as_sparc_ua_pcrel_hidden=yes + fi + fi + fi + rm -f conftest.s conftest.o conftest + else + gcc_cv_as_sparc_ua_pcrel_hidden="$gcc_cv_as_sparc_ua_pcrel" + fi + ]) + if test "x$gcc_cv_as_sparc_ua_pcrel_hidden" = xyes; then + AC_DEFINE(HAVE_AS_SPARC_UA_PCREL_HIDDEN, 1, + [Define if your assembler and linker support unaligned PC relative relocs against hidden symbols.]) fi - ;; - rs6000-*-lynxos*) - # The CVS server code doesn't work on the RS/6000 - noconfigdirs="$noconfigdirs target-newlib gprof cvssrc ${libgcj}" - ;; - rs6000-*-aix*) - # The configure and build of ld are currently disabled because - # GNU ld is known to be broken for AIX 4.2 and 4.3 (at least) - # The symptom is that GDBtk 4.18 fails at startup with a segfault - # if linked by GNU ld, but not if linked by the native ld. - noconfigdirs="$noconfigdirs gprof ld ${libgcj}" - use_gnu_ld=no - ;; - rs6000-*-*) - noconfigdirs="$noconfigdirs gprof ${libgcj}" - ;; - m68k-apollo-*) - noconfigdirs="$noconfigdirs ld binutils gprof target-libgloss ${libgcj}" - ;; - mips*-*-irix5*) - # The GNU linker does not support shared libraries. - # emacs is emacs 18, which does not work on Irix 5 (emacs19 does work) - noconfigdirs="$noconfigdirs ld gprof emacs target-libgloss ${libgcj}" - ;; - mips*-*-irix6*) - # The GNU assembler does not support IRIX 6. - # emacs is emacs 18, which does not work on Irix 5 (emacs19 does work) - # Linking libjava exceeds command-line length limits on at least - # IRIX 6.2, but not on IRIX 6.5. - # Also, boehm-gc won't build on IRIX 6.5, according to Jeffrey Oldham - # <oldham@codesourcery.com> - noconfigdirs="$noconfigdirs gas gprof emacs target-libgloss ${libgcj}" - ;; - mips*-dec-bsd*) - noconfigdirs="$noconfigdirs gprof target-libgloss ${libgcj}" - ;; - mips*-*-bsd*) - noconfigdirs="$noconfigdirs gprof target-libgloss ${libgcj}" - ;; - mipstx39-*-*) - noconfigdirs="$noconfigdirs gprof ${libgcj}" # same as generic mips - target_configdirs="${target_configdirs} target-bsp target-libstub target-cygmon" - ;; - mips*-*-linux*) - noconfigdirs="$noconfigdirs target-libffi" - ;; - mips*-*-*) - noconfigdirs="$noconfigdirs gprof ${libgcj}" - ;; - romp-*-*) - noconfigdirs="$noconfigdirs bfd binutils ld gas opcodes target-libgloss ${libgcj}" - ;; - sh-*-*) - case "${host}" in - i[3456]86-*-vsta) ;; # don't add gprof back in - i[3456]86-*-go32*) ;; # don't add gprof back in - i[3456]86-*-msdosdjgpp*) ;; # don't add gprof back in - *) skipdirs=`echo " ${skipdirs} " | sed -e 's/ gprof / /'` ;; - esac - noconfigdirs="$noconfigdirs target-libgloss ${libgcj}" - ;; - sh64-*-*) - noconfigdirs="$noconfigdirs target-libgloss ${libgcj}" - ;; - sparc-*-elf*) - if [ x${is_cross_compiler} != xno ] ; then - target_configdirs="${target_configdirs} target-libstub target-cygmon" + + AC_CACHE_CHECK([for assembler offsetable %lo() support], + gcc_cv_as_offsetable_lo10, [ + gcc_cv_as_offsetable_lo10=unknown + if test "x$gcc_cv_as" != x; then + # Check if assembler has offsetable %lo() + echo "or %g1, %lo(ab) + 12, %g1" > conftest.s + echo "or %g1, %lo(ab + 12), %g1" > conftest1.s + if $gcc_cv_as -xarch=v9 -o conftest.o conftest.s \ + > /dev/null 2>&1 && + $gcc_cv_as -xarch=v9 -o conftest1.o conftest1.s \ + > /dev/null 2>&1; then + if cmp conftest.o conftest1.o > /dev/null 2>&1; then + gcc_cv_as_offsetable_lo10=no + else + gcc_cv_as_offsetable_lo10=yes + fi + else + gcc_cv_as_offsetable_lo10=no + fi + rm -f conftest.s conftest.o conftest1.s conftest1.o + fi + ]) + if test "x$gcc_cv_as_offsetable_lo10" = xyes; then + AC_DEFINE(HAVE_AS_OFFSETABLE_LO10, 1, + [Define if your assembler supports offsetable %lo().]) fi - noconfigdirs="$noconfigdirs ${libgcj}" + ;; - sparc64-*-elf*) - if [ x${is_cross_compiler} != xno ] ; then - target_configdirs="${target_configdirs} target-libstub target-cygmon" + +changequote(,)dnl + i[34567]86-*-* | x86_64-*-*) +changequote([,])dnl + AC_MSG_CHECKING(assembler instructions) + gcc_cv_as_instructions= + if test x$gcc_cv_gas_major_version != x -a x$gcc_cv_gas_minor_version != x; then + if test "$gcc_cv_gas_major_version" -eq 2 -a "$gcc_cv_gas_minor_version" -ge 9 -o "$gcc_cv_gas_major_version" -gt 2; then + gcc_cv_as_instructions="filds fists" + fi + elif test x$gcc_cv_as != x; then + set "filds fists" "filds mem; fists mem" + while test $# -gt 0 + do + echo "$2" > conftest.s + if $gcc_cv_as -o conftest.o conftest.s > /dev/null 2>&1; then + gcc_cv_as_instructions=${gcc_cv_as_instructions}$1" " + fi + shift 2 + done + rm -f conftest.s conftest.o fi - noconfigdirs="$noconfigdirs ${libgcj}" - ;; - sparclite-*-*) - if [ x${is_cross_compiler} != xno ] ; then - target_configdirs="${target_configdirs} target-bsp target-libstub target-cygmon" + if test x"$gcc_cv_as_instructions" != x; then + AC_DEFINE_UNQUOTED(HAVE_GAS_`echo "$gcc_cv_as_instructions" | sed -e 's/ $//' | tr '[a-z ]' '[A-Z_]'`) fi - noconfigdirs="$noconfigdirs ${libgcj}" - ;; - sparc-*-sunos4*) - noconfigdirs="$noconfigdirs ${libgcj}" - if [ x${is_cross_compiler} != xno ] ; then - noconfigdirs="$noconfigdirs gdb gdbtest target-newlib target-libgloss" - else - use_gnu_ld=no + AC_MSG_RESULT($gcc_cv_as_instructions) + + AC_MSG_CHECKING(assembler GOTOFF in data directives) + gcc_cv_as_gotoff_in_data=no + if test x$gcc_cv_gas_major_version != x -a x$gcc_cv_gas_minor_version != x + then + if test "$gcc_cv_gas_major_version" -eq 2 \ + -a "$gcc_cv_gas_minor_version" -ge 11 \ + -o "$gcc_cv_gas_major_version" -gt 2; then + gcc_cv_as_gotoff_in_data=yes + fi + elif test x$gcc_cv_as != x; then + cat > conftest.s <<EOF + .text +.L0: + nop + .data + .long .L0@GOTOFF +EOF + if $gcc_cv_as -o conftest.o conftest.s > /dev/null 2>&1; then + gcc_cv_as_gotoff_in_data=yes + fi fi - ;; - sparc-*-solaris* | sparc64-*-solaris* | sparcv9-*-solaris*) - ;; - v810-*-*) - noconfigdirs="$noconfigdirs bfd binutils gas gcc gdb ld ${libstdcxx_version} opcodes target-libgloss ${libgcj}" - ;; - v850-*-*) - noconfigdirs="$noconfigdirs target-libgloss ${libgcj}" - ;; - v850e-*-*) - noconfigdirs="$noconfigdirs target-libgloss ${libgcj}" - ;; - v850ea-*-*) - noconfigdirs="$noconfigdirs target-libgloss ${libgcj}" - ;; - vax-*-vms) - noconfigdirs="$noconfigdirs bfd binutils gdb ld target-newlib opcodes target-libgloss ${libgcj}" - ;; - vax-*-*) - noconfigdirs="$noconfigdirs target-newlib target-libgloss ${libgcj}" - ;; - *-*-lynxos*) - noconfigdirs="$noconfigdirs target-newlib target-libgloss ${libgcj}" - ;; - *-*-macos* | \ - *-*-mpw*) - # Macs want a resource compiler. - configdirs="$configdirs grez" - noconfigdirs="$noconfigdirs ${libgcj}" - ;; - *-*-*) - noconfigdirs="$noconfigdirs ${libgcj}" + AC_DEFINE_UNQUOTED(HAVE_AS_GOTOFF_IN_DATA, + [`if test $gcc_cv_as_gotoff_in_data = yes; then echo 1; else echo 0; fi`], + [Define true if the assembler supports '.long foo@GOTOFF'.]) + AC_MSG_RESULT($gcc_cv_as_gotoff_in_data) ;; esac -# If we aren't building newlib, then don't build libgloss, since libgloss -# depends upon some newlib header files. -case "${noconfigdirs}" in - *target-libgloss*) ;; - *target-newlib*) noconfigdirs="$noconfigdirs target-libgloss" ;; -esac +AC_MSG_CHECKING(assembler dwarf2 debug_line support) +gcc_cv_as_dwarf2_debug_line=no +# ??? Not all targets support dwarf2 debug_line, even within a version +# of gas. Moreover, we need to emit a valid instruction to trigger any +# info to the output file. So, as supported targets are added to gas 2.11, +# add some instruction here to (also) show we expect this might work. +# ??? Once 2.11 is released, probably need to add first known working +# version to the per-target configury. +case "$target" in + i?86*-*-* | mips*-*-* | alpha*-*-* | powerpc*-*-* | sparc*-*-* | m68*-*-* | x86_64*-*-*) + insn="nop" + ;; + ia64*-*-*) + insn="nop 0" + ;; + esac +if test x$gcc_cv_gas_major_version != x -a x$gcc_cv_gas_minor_version != x; +then + if test "$gcc_cv_gas_major_version" -eq 2 \ + -a "$gcc_cv_gas_minor_version" -ge 11 \ + -o "$gcc_cv_gas_major_version" -gt 2 \ + && grep 'obj_format = elf' ../gas/Makefile > /dev/null \ + && test x"$insn" != x ; then + gcc_cv_as_dwarf2_debug_line="yes" + fi +elif test x$gcc_cv_as != x -a x"$insn" != x ; then + echo ' .file 1 "conftest.s"' > conftest.s + echo ' .loc 1 3 0' >> conftest.s + echo " $insn" >> conftest.s + # ??? This fails with non-gnu grep. + if $gcc_cv_as -o conftest.o conftest.s > /dev/null 2>&1 \ + && grep debug_line conftest.o > /dev/null 2>&1 ; then + # The .debug_line file table must be in the exact order that + # we specified the files, since these indices are also used + # by DW_AT_decl_file. Approximate this test by testing if + # the assembler bitches if the same index is assigned twice. + echo ' .file 1 "foo.s"' > conftest.s + echo ' .file 1 "bar.s"' >> conftest.s + if $gcc_cv_as -o conftest.o conftest.s > /dev/null 2>&1 + then + gcc_cv_as_dwarf2_debug_line="no" + else + gcc_cv_as_dwarf2_debug_line="yes" + fi + fi + rm -f conftest.s conftest.o conftest.nm1 conftest.nm2 +fi +if test x"$gcc_cv_as_dwarf2_debug_line" = xyes; then + AC_DEFINE(HAVE_AS_DWARF2_DEBUG_LINE, 1, +[Define if your assembler supports dwarf2 .file/.loc directives, + and preserves file table indices exactly as given.]) +fi +AC_MSG_RESULT($gcc_cv_as_dwarf2_debug_line) + +AC_MSG_CHECKING(assembler --gdwarf2 support) +gcc_cv_as_gdwarf2_flag=no +if test x$gcc_cv_gas_major_version != x -a x$gcc_cv_gas_minor_version != x; +then + if test "$gcc_cv_gas_major_version" -eq 2 \ + -a "$gcc_cv_gas_minor_version" -ge 11 \ + -o "$gcc_cv_gas_major_version" -gt 2 \ + && grep 'obj_format = elf' ../gas/Makefile > /dev/null \ + && test x"$insn" != x ; then + gcc_cv_as_gdwarf2_debug_flag="yes" + fi +elif test x$gcc_cv_as != x -a x"$insn" != x ; then + echo '' > conftest.s + # ??? This fails with non-gnu grep. + if $gcc_cv_as --gdwarf2 -o conftest.o conftest.s > /dev/null 2>&1 + then + gcc_cv_as_gdwarf2_flag="yes" + fi + rm -f conftest.s conftest.o +fi +if test x"$gcc_cv_as_gdwarf2_flag" = xyes; then + AC_DEFINE(HAVE_AS_GDWARF2_DEBUG_FLAG, 1, +[Define if your assembler supports the --gdwarf2 option.]) +fi +AC_MSG_RESULT($gcc_cv_as_gdwarf2_flag) + +AC_MSG_CHECKING(assembler --gstabs support) +gcc_cv_as_gstabs_flag=no +if test x$gcc_cv_gas_major_version != x -a x$gcc_cv_gas_minor_version != x; +then + if test "$gcc_cv_gas_major_version" -eq 2 \ + -a "$gcc_cv_gas_minor_version" -ge 11 \ + -o "$gcc_cv_gas_major_version" -gt 2 \ + && grep 'obj_format = elf' ../gas/Makefile > /dev/null \ + && test x"$insn" != x ; then + gcc_cv_as_gstabs_debug_flag="yes" + fi +elif test x$gcc_cv_as != x -a x"$insn" != x ; then + echo '' > conftest.s + # ??? This fails with non-gnu grep. + if $gcc_cv_as --gstabs -o conftest.o conftest.s > /dev/null 2>&1 ; then + gcc_cv_as_gstabs_flag="yes" + fi + rm -f conftest.s conftest.o +fi +if test x"$gcc_cv_as_gstabs_flag" = xyes; then + AC_DEFINE(HAVE_AS_GSTABS_DEBUG_FLAG, 1, +[Define if your assembler supports the --gstabs option.]) +fi +AC_MSG_RESULT($gcc_cv_as_gstabs_flag) -# Make sure we don't let GNU ld be added if we didn't want it. -if [ x$with_gnu_ld = xno ]; then - use_gnu_ld=no - noconfigdirs="$noconfigdirs ld" +AC_MSG_CHECKING(linker PT_GNU_EH_FRAME support) +gcc_cv_ld_eh_frame_hdr=no +if test x$gcc_cv_gld_major_version != x -a x$gcc_cv_gld_minor_version != x; then + if test "$gcc_cv_gld_major_version" -eq 2 -a "$gcc_cv_gld_minor_version" -ge 12 -o "$gcc_cv_gld_major_version" -gt 2 && grep 'EMUL = elf' ../ld/Makefile > /dev/null; then + gcc_cv_ld_eh_frame_hdr=yes + fi +elif test x$gcc_cv_ld != x; then + # Check if linker supports --eh-frame-hdr option + if $gcc_cv_ld --help 2>/dev/null | grep eh-frame-hdr > /dev/null; then + gcc_cv_ld_eh_frame_hdr=yes + fi +fi +AC_MSG_RESULT($gcc_cv_ld_eh_frame_hdr) +if test x"$gcc_cv_ld_eh_frame_hdr" = xyes; then + AC_MSG_CHECKING(whether linker eh_frame optimizations work properly) + gcc_cv_ld_eh_frame_hdr_works=no + if test x$gcc_cv_gld_major_version != x -a x$gcc_cv_gld_minor_version != x; then + if test "$gcc_cv_gld_major_version" -eq 2 -a "$gcc_cv_gld_minor_version" -ge 13 -o "$gcc_cv_gld_major_version" -gt 2 && grep 'EMUL = elf' ../ld/Makefile > /dev/null; then + gcc_cv_ld_eh_frame_hdr_works=yes + fi + elif test x$gcc_cv_ld != x; then + for gcc_WS in 4 8; do + cat > conftest.s <<EOF + .text +.LFB1: .skip 64 +.LFE1: +.LFB2: .skip 64 +.LFE2: +.LFB3: .skip 64 +.LFE3: + .section .eh_frame,"aw",@progbits +.Lframe1: + .4byte .LECIE1-.LSCIE1 +.LSCIE1: + .4byte 0x0 + .byte 0x1 + .ascii "zR\0" + .uleb128 0x1 + .sleb128 -4 + .byte 0x8 + .uleb128 0x1 + .byte 0x50 + .byte 0xc + .uleb128 0x4 + .uleb128 0x4 + .byte 0x88 + .uleb128 0x1 + .balign ${gcc_WS} +.LECIE1: +.LSFDE1: + .4byte .LEFDE1-.LASFDE1 +.LASFDE1: + .4byte .LASFDE1-.Lframe1 + .${gcc_WS}byte .LFB1 + .${gcc_WS}byte .LFE1-.LFB1 + .uleb128 0x0 + .balign ${gcc_WS} +.LEFDE1: +.LSFDE2: + .4byte .LEFDE2-.LASFDE2 +.LASFDE2: + .4byte .LASFDE2-.Lframe1 + .${gcc_WS}byte .LFB2 + .${gcc_WS}byte .LFE2-.LFB2 + .uleb128 0x0 + .balign ${gcc_WS} +.LEFDE2: +.LSFDE3: + .4byte .LEFDE3-.LASFDE3 +.LASFDE3: + .4byte .LASFDE3-.Lframe1 + .${gcc_WS}byte .LFB3 + .${gcc_WS}byte .LFE3-.LFB3 + .uleb128 0x0 + .balign ${gcc_WS} +.LEFDE3: + .4byte 0 +EOF + if ($gcc_cv_as -o conftest.o conftest.s; exit $?) 1>&AC_FD_CC 2>&1; then + if ($gcc_cv_ld --eh-frame-hdr -shared -o conftest.so conftest.o; exit $?) 1>&AC_FD_CC 2>&1; then +changequote(,)dnl + if $gcc_cv_objdump -h conftest.so 2>&AC_FD_CC \ + | grep 'eh_frame_hdr[ ]*0*[01][048cC][ ]' 1>&AC_FD_CC 2>&1; then + gcc_cv_ld_eh_frame_hdr_works=yes; break + else + $gcc_cv_objdump -h conftest.so 2>/dev/null | grep eh_frame_hdr 1>&AC_FD_CC 2>&1 + fi +changequote([,])dnl + fi + fi + rm -f conftest.* + done + fi + AC_MSG_RESULT($gcc_cv_ld_eh_frame_hdr_works) +fi +if test x"$gcc_cv_ld_eh_frame_hdr" = xyes \ + && test x"$gcc_cv_ld_eh_frame_hdr_works" = xyes; then + AC_DEFINE(HAVE_LD_EH_FRAME_HDR, 1, +[Define if your linker supports --eh-frame-hdr option.]) fi -# Make sure we don't let GNU as be added if we didn't want it. -if [ x$with_gnu_as = xno ]; then - use_gnu_as=no - noconfigdirs="$noconfigdirs gas" +if test "$prefix" != "/usr" && test "$prefix" != "/usr/local" ; then + AC_DEFINE_UNQUOTED(PREFIX_INCLUDE_DIR, "$prefix/include") fi # Figure out what language subdirectories are present. @@ -1085,7 +2147,8 @@ fi if test x"${enable_languages+set}" != xset; then if test x"${LANGUAGES+set}" = xset; then enable_languages="${LANGUAGES}" - echo configure.in: warning: setting LANGUAGES is deprecated, use --enable-languages instead 1>&2 + AC_MSG_WARN([setting LANGUAGES is deprecated, use --enable-languages instead]) + else enable_languages=all fi @@ -1093,23 +2156,23 @@ else if test x"${enable_languages}" = x || test x"${enable_languages}" = xyes; then - echo configure.in: --enable-languages needs at least one language argument 1>&2 - exit 1 + AC_MSG_ERROR([--enable-languages needs at least one language argument]) fi fi -enable_languages=`echo "${enable_languages}" | sed -e 's/[ ,][ ,]*/,/g' -e 's/,$//'` +enable_languages=`echo "${enable_languages}" | sed -e 's/[[ ,]][[ ,]]*/,/g' -e 's/,$//'` # First scan to see if an enabled language requires some other language. # We assume that a given config-lang.in will list all the language # front ends it requires, even if some are required indirectly. -for lang in ${srcdir}/gcc/*/config-lang.in .. +for lang in ${srcdir}/*/config-lang.in .. do case $lang in ..) ;; # The odd quoting in the next line works around # an apparent bug in bash 1.12 on linux. - ${srcdir}/gcc/[*]/config-lang.in) +changequote(,)dnl + ${srcdir}/[*]/config-lang.in) ;; *) lang_alias=`sed -n -e 's,^language=['"'"'"'"]\(.*\)["'"'"'"'].*$,\1,p' -e 's,^language=\([^ ]*\).*$,\1,p' $lang` @@ -1122,27 +2185,27 @@ do *,all,*) ;; *,$lang_alias,*) - echo " \`$other' language required by \`$lang_alias'; enabling" 1>&2 enable_languages="$enable_languages,$other" ;; esac done ;; +changequote([,])dnl esac done subdirs= -for lang in ${srcdir}/gcc/*/config-lang.in .. +for lang in ${srcdir}/*/config-lang.in .. do case $lang in ..) ;; # The odd quoting in the next line works around # an apparent bug in bash 1.12 on linux. - ${srcdir}/gcc/[*]/config-lang.in) ;; +changequote(,)dnl + ${srcdir}/[*]/config-lang.in) ;; *) lang_alias=`sed -n -e 's,^language=['"'"'"'"]\(.*\)["'"'"'"'].*$,\1,p' -e 's,^language=\([^ ]*\).*$,\1,p' $lang` this_lang_libs=`sed -n -e 's,^target_libs=['"'"'"'"]\(.*\)["'"'"'"'].*$,\1,p' -e 's,^target_libs=\([^ ]*\).*$,\1,p' $lang` - this_lang_dirs=`sed -n -e 's,^lang_dirs=['"'"'"'"]\(.*\)["'"'"'"'].*$,\1,p' -e 's,^lang_dirs=\([^ ]*\).*$,\1,p' $lang` build_by_default=`sed -n -e 's,^build_by_default=['"'"'"'"]\(.*\)["'"'"'"'].*$,\1,p' -e 's,^build_by_default=\([^ ]*\).*$,\1,p' $lang` if test "x$lang_alias" = x then @@ -1156,453 +2219,412 @@ do *) add_this_lang=no ;; esac if test x"${add_this_lang}" = xyes; then - eval target_libs='"$target_libs "'\"$this_lang_libs\" - else - eval noconfigdirs='"$noconfigdirs "'\"$this_lang_libs $this_lang_dirs\" + case $lang in + ${srcdir}/ada/config-lang.in) + if test x$have_gnat = xyes ; then + subdirs="$subdirs `echo $lang | sed -e 's,^.*/\([^/]*\)/config-lang.in$,\1,'`" + fi + ;; + *) + subdirs="$subdirs `echo $lang | sed -e 's,^.*/\([^/]*\)/config-lang.in$,\1,'`" + ;; + esac fi ;; +changequote([,])dnl esac done -# Remove the entries in $skipdirs and $noconfigdirs from $configdirs and -# $target_configdirs. -# If we have the source for $noconfigdirs entries, add them to $notsupp. - -notsupp="" -for dir in . $skipdirs $noconfigdirs ; do - dirname=`echo $dir | sed -e s/target-//g` - if [ $dir != . ] && echo " ${configdirs} " | grep " ${dir} " >/dev/null 2>&1; then - configdirs=`echo " ${configdirs} " | sed -e "s/ ${dir} / /"` - if [ -r $srcdir/$dirname/configure ] \ - || [ -r $srcdir/$dirname/configure.in ]; then - if echo " ${skipdirs} " | grep " ${dir} " >/dev/null 2>&1; then - true - else - notsupp="$notsupp $dir" - fi - fi - fi - if [ $dir != . ] && echo " ${target_configdirs} " | grep " ${dir} " >/dev/null 2>&1; then - target_configdirs=`echo " ${target_configdirs} " | sed -e "s/ ${dir} / /"` - if [ -r $srcdir/$dirname/configure ] \ - || [ -r $srcdir/$dirname/configure.in ]; then - if echo " ${skipdirs} " | grep " ${dir} " >/dev/null 2>&1; then - true - else - notsupp="$notsupp $dir" - fi - fi - fi -done - -# Sometimes the tools are distributed with libiberty but with no other -# libraries. In that case, we don't want to build target-libiberty. -if [ -n "${target_configdirs}" ]; then - others= - for i in `echo ${target_configdirs} | sed -e s/target-//g` ; do - if [ "$i" != "libiberty" ]; then - if [ -r $srcdir/$i/configure ] || [ -r $srcdir/$i/configure.in ]; then - others=yes; - break; - fi - fi - done - if [ -z "${others}" ]; then - target_configdirs= - fi +# Make gthr-default.h if we have a thread file. +gthread_flags= +if test $thread_file != single; then + rm -f gthr-default.h + echo "#include \"gthr-${thread_file}.h\"" > gthr-default.h + gthread_flags=-DHAVE_GTHR_DEFAULT fi +AC_SUBST(gthread_flags) -# Deconfigure all subdirectories, in case we are changing the -# configuration from one where a subdirectory is supported to one where it -# is not. -if [ -z "${norecursion}" ] && [ -n "${configdirs}" ]; then - for i in `echo ${configdirs} | sed -e s/target-//g` ; do - rm -f $i/Makefile - done -fi -if [ -z "${norecursion}" ] && [ -n "${target_configdirs}" ]; then - for i in `echo ${target_configdirs} | sed -e s/target-//g` ; do - rm -f ${target_subdir}/$i/Makefile - done -fi - -# Produce a warning message for the subdirs we can't configure. -# This isn't especially interesting in the Cygnus tree, but in the individual -# FSF releases, it's important to let people know when their machine isn't -# supported by the one or two programs in a package. - -if [ -n "${notsupp}" ] && [ -z "${norecursion}" ]; then - # If $appdirs is non-empty, at least one of those directories must still - # be configured, or we error out. (E.g., if the gas release supports a - # specified target in some subdirs but not the gas subdir, we shouldn't - # pretend that all is well.) - if [ -n "$appdirs" ]; then - for dir in $appdirs ; do - if [ -r $dir/Makefile.in ]; then - if echo " ${configdirs} " | grep " ${dir} " >/dev/null 2>&1; then - appdirs="" - break +# Find out what GC implementation we want, or may, use. +AC_ARG_WITH(gc, +[ --with-gc={simple,page} choose the garbage collection mechanism to use + with the compiler], +[case "$withval" in + simple | page) + GGC=ggc-$withval + ;; + *) + AC_MSG_ERROR([$withval is an invalid option to --with-gc]) + ;; +esac], +[GGC=ggc-page]) +AC_SUBST(GGC) +echo "Using $GGC for garbage collection." + +# Use the system's zlib library. +zlibdir=-L../zlib +zlibinc="-I\$(srcdir)/../zlib" +AC_ARG_WITH(system-zlib, +[ --with-system-zlib use installed libz], +zlibdir= +zlibinc= +) +AC_SUBST(zlibdir) +AC_SUBST(zlibinc) + +dnl Very limited version of automake's enable-maintainer-mode + +AC_MSG_CHECKING([whether to enable maintainer-specific portions of Makefiles]) + dnl maintainer-mode is disabled by default + AC_ARG_ENABLE(maintainer-mode, +[ --enable-maintainer-mode + enable make rules and dependencies not useful + (and sometimes confusing) to the casual installer], + maintainer_mode=$enableval, + maintainer_mode=no) + +AC_MSG_RESULT($maintainer_mode) + +if test "$maintainer_mode" = "yes"; then + MAINT='' +else + MAINT='#' +fi +AC_SUBST(MAINT)dnl + +# With Setjmp/Longjmp based exception handling. +AC_ARG_ENABLE(sjlj-exceptions, +[ --enable-sjlj-exceptions + arrange to use setjmp/longjmp exception handling], +[sjlj=`if test $enableval = yes; then echo 1; else echo 0; fi` +AC_DEFINE_UNQUOTED(CONFIG_SJLJ_EXCEPTIONS, $sjlj, + [Define 0/1 to force the choice for exception handling model.])]) + +# Make empty files to contain the specs and options for each language. +# Then add #include lines to for a compiler that has specs and/or options. + +lang_specs_files= +lang_options_files= +lang_tree_files= +for subdir in . $subdirs +do + if test -f $srcdir/$subdir/lang-specs.h; then + lang_specs_files="$lang_specs_files $srcdir/$subdir/lang-specs.h" fi - if echo " ${target_configdirs} " | grep " ${dir} " >/dev/null 2>&1; then - appdirs="" - break + if test -f $srcdir/$subdir/lang-options.h; then + lang_options_files="$lang_options_files $srcdir/$subdir/lang-options.h" fi - fi - done - if [ -n "$appdirs" ]; then - echo "*** This configuration is not supported by this package." 1>&2 - exit 1 - fi - fi - # Okay, some application will build, or we don't care to check. Still - # notify of subdirs not getting built. - echo "*** This configuration is not supported in the following subdirectories:" 1>&2 - echo " ${notsupp}" 1>&2 - echo " (Any other directories should still work fine.)" 1>&2 -fi - -# Set with_gnu_as and with_gnu_ld as appropriate. -# -# This is done by determining whether or not the appropriate directory -# is available, and by checking whether or not specific configurations -# have requested that this magic not happen. -# -# The command line options always override the explicit settings in -# configure.in, and the settings in configure.in override this magic. -# -# If the default for a toolchain is to use GNU as and ld, and you don't -# want to do that, then you should use the --without-gnu-as and -# --without-gnu-ld options for the configure script. - -if [ x${use_gnu_as} = x ] ; then - if [ x${with_gnu_as} != xno ] && echo " ${configdirs} " | grep " ${gasdir} " > /dev/null 2>&1 && [ -d ${srcdir}/${gasdir} ] ; then - with_gnu_as=yes - withoptions="$withoptions --with-gnu-as" - fi -fi + if test -f $srcdir/$subdir/$subdir-tree.def; then + lang_tree_files="$lang_tree_files $srcdir/$subdir/$subdir-tree.def" + fi +done -if [ x${use_gnu_ld} = x ] ; then - if [ x${with_gnu_ld} != xno ] && echo " ${configdirs} " | grep " ld " > /dev/null 2>&1 && [ -d ${srcdir}/ld ] ; then - with_gnu_ld=yes - withoptions="$withoptions --with-gnu-ld" - fi -fi +# These (without "all_") are set in each config-lang.in. +# `language' must be a single word so is spelled singularly. +all_languages= +all_boot_languages= +all_compilers= +all_stagestuff= +all_outputs='Makefile intl/Makefile fixinc/Makefile gccbug mklibgcc' +# List of language makefile fragments. +all_lang_makefiles= + +# Add the language fragments. +# Languages are added via two mechanisms. Some information must be +# recorded in makefile variables, these are defined in config-lang.in. +# We accumulate them and plug them into the main Makefile. +# The other mechanism is a set of hooks for each of the main targets +# like `clean', `install', etc. + +language_fragments="Make-lang" +language_hooks="Make-hooks" + +for s in .. $subdirs +do + if test $s != ".." + then + language= + boot_language= + compilers= + stagestuff= + outputs= + . ${srcdir}/$s/config-lang.in + if test "x$language" = x + then + echo "${srcdir}/$s/config-lang.in doesn't set \$language." 1>&2 + exit 1 + fi + all_lang_makefiles="$all_lang_makefiles ${srcdir}/$s/Make-lang.in" + if test -f ${srcdir}/$s/Makefile.in + then all_lang_makefiles="$all_lang_makefiles ${srcdir}/$s/Makefile.in" + fi + all_languages="$all_languages $language" + if test "x$boot_language" = xyes + then + all_boot_languages="$all_boot_languages $language" + fi + all_compilers="$all_compilers $compilers" + all_stagestuff="$all_stagestuff $stagestuff" + all_outputs="$all_outputs $outputs" + fi +done -# If using newlib, add --with-newlib to the withoptions so that gcc/configure -# can detect this case. +check_languages= +for language in .. $all_languages +do + if test $language != ".." + then + check_languages="$check_languages check-$language" + fi +done -if [ x${with_newlib} != xno ] && echo " ${target_configdirs} " | grep " target-newlib " > /dev/null 2>&1 && [ -d ${srcdir}/newlib ] ; then - with_newlib=yes - withoptions="$withoptions --with-newlib" -fi +# Since we can't use `::' targets, we link each language in +# with a set of hooks, reached indirectly via lang.${target}. + +rm -f Make-hooks +touch Make-hooks +target_list="all.build all.cross start.encap rest.encap \ + info dvi generated-manpages \ + install-normal install-common install-info install-man \ + uninstall \ + mostlyclean clean distclean extraclean maintainer-clean \ + stage1 stage2 stage3 stage4" +for t in $target_list +do + x= + for lang in .. $all_languages + do + if test $lang != ".."; then + x="$x $lang.$t" + fi + done + echo "lang.$t: $x" >> Make-hooks +done -if [ x${shared} = xyes ]; then - case "${target}" in - hppa* | parisc*) - target_makefile_frag="${target_makefile_frag} config/mt-papic" - ;; - i[3456]86-*) - target_makefile_frag="${target_makefile_frag} config/mt-x86pic" - ;; - ia64-*) - target_makefile_frag="${target_makefile_frag} config/mt-ia64pic" - ;; - powerpc*-*-aix*) - # We don't want -fPIC on AIX. - ;; - powerpc*-*) - target_makefile_frag="${target_makefile_frag} config/mt-ppcpic" - ;; - alpha*-*-linux*) - target_makefile_frag="${target_makefile_frag} config/mt-elfalphapic" - ;; - *) - if test -f ${srcdir}/config/mt-${target_cpu}pic; then - target_makefile_frag="${target_makefile_frag} config/mt-${target_cpu}pic" - fi - ;; - esac -fi +# Create .gdbinit. -rm -f mt-frag -if [ -n "${target_makefile_frag}" ] ; then - for f in ${target_makefile_frag} - do - cat ${srcdir}/$f >> mt-frag - done - target_makefile_frag=mt-frag +echo "dir ." > .gdbinit +echo "dir ${srcdir}" >> .gdbinit +if test x$gdb_needs_out_file_path = xyes +then + echo "dir ${srcdir}/config/"`dirname ${out_file}` >> .gdbinit fi - -# post-target: - -# Make sure that the compiler is able to generate an executable. If it -# can't, we are probably in trouble. We don't care whether we can run the -# executable--we might be using a cross compiler--we only care whether it -# can be created. At this point the main configure script has set CC. -echo "int main () { return 0; }" > conftest.c -${CC} -o conftest ${CFLAGS} ${CPPFLAGS} ${LDFLAGS} conftest.c -if [ $? = 0 ] && [ -s conftest -o -s conftest.exe ]; then - : -else - echo 1>&2 "*** The command '${CC} -o conftest ${CFLAGS} ${CPPFLAGS} ${LDFLAGS} conftest.c' failed." - echo 1>&2 "*** You must set the environment variable CC to a working compiler." - rm -f conftest* - exit 1 +if test "x$subdirs" != x; then + for s in $subdirs + do + echo "dir ${srcdir}/$s" >> .gdbinit + done fi -rm -f conftest* - -# The Solaris /usr/ucb/cc compiler does not appear to work. -case "${host}" in - sparc-sun-solaris2*) - CCBASE="`echo ${CC-cc} | sed 's/ .*$//'`" - if [ "`type $CCBASE | sed 's/^[^/]*//'`" = "/usr/ucb/cc" ] ; then - could_use= - [ -d /opt/SUNWspro/bin ] && could_use="/opt/SUNWspro/bin" - if [ -d /opt/cygnus/bin ] ; then - if [ "$could_use" = "" ] ; then - could_use="/opt/cygnus/bin" - else - could_use="$could_use or /opt/cygnus/bin" - fi - fi - if [ "$could_use" = "" ] ; then - echo "Warning: compilation may fail because you're using" - echo "/usr/ucb/cc. You should change your PATH or CC " - echo "variable and rerun configure." - else - echo "Warning: compilation may fail because you're using" - echo "/usr/ucb/cc, when you should use the C compiler from" - echo "$could_use. You should change your" - echo "PATH or CC variable and rerun configure." - fi - fi - ;; -esac - -# If --enable-shared was set, we must set LD_LIBRARY_PATH so that the -# binutils tools will find libbfd.so. -if [ "${shared}" = "yes" ]; then - sed -e 's/^SET_LIB_PATH[ ]*=.*$/SET_LIB_PATH = $(REALLY_SET_LIB_PATH)/' \ - Makefile > Makefile.tem - rm -f Makefile - mv -f Makefile.tem Makefile - - case "${host}" in - *-*-hpux*) - sed -e 's/^RPATH_ENVVAR[ ]*=.*$/RPATH_ENVVAR = SHLIB_PATH/' \ - Makefile > Makefile.tem - rm -f Makefile - mv -f Makefile.tem Makefile - ;; - esac +echo "source ${srcdir}/gdbinit.in" >> .gdbinit + +# Define variables host_canonical and build_canonical +# because some Cygnus local changes in the Makefile depend on them. +build_canonical=${build} +host_canonical=${host} +target_subdir= +if test "${host}" != "${target}" ; then + target_subdir=${target_alias}/ fi - -# Record target_configdirs and the configure arguments for target and -# build configuration in Makefile. -target_configdirs=`echo "${target_configdirs}" | sed -e 's/target-//g'` -targargs=`echo "${arguments}" | \ - sed -e 's/--no[^ ]*//' \ - -e 's/--cache[a-z-]*=[^ ]*//' \ - -e 's/--ho[a-z-]*=[^ ]*//' \ - -e 's/--bu[a-z-]*=[^ ]*//' \ - -e 's/--ta[a-z-]*=[^ ]*//'` - -# For the build-side libraries, we just need to pretend we're native, -# and not use the same cache file. Multilibs are neither needed nor -# desired. -buildargs="--cache-file=../config.cache --build=${build_alias} --host=${build_alias} ${targargs}" - -# Passing a --with-cross-host argument lets the target libraries know -# whether they are being built with a cross-compiler or being built -# native. However, it would be better to use other mechanisms to make the -# sorts of decisions they want to make on this basis. Please consider -# this option to be deprecated. FIXME. -if [ x${is_cross_compiler} = xyes ]; then - targargs="--with-cross-host=${host_alias} ${targargs}" -fi - -# Default to --enable-multilib. -if [ x${enable_multilib} = x ]; then - targargs="--enable-multilib ${targargs}" -fi - -# Pass --with-newlib if appropriate. Note that target_configdirs has -# changed from the earlier setting of with_newlib. -if [ x${with_newlib} != xno ] && echo " ${target_configdirs} " | grep " newlib " > /dev/null 2>&1 && [ -d ${srcdir}/newlib ] ; then - targargs="--with-newlib ${targargs}" -fi - -# Pass the appropriate --host, --build, and --cache-file arguments. -targargs="--cache-file=../config.cache --host=${target_alias} --build=${build_alias} ${targargs}" - -# provide a proper gxx_include_dir. -# Note, if you change the default, make sure to fix both here and in -# the gcc and libstdc++-v3 subdirectories. -# Check whether --with-gxx-include-dir or --without-gxx-include-dir was given. -gxx_include_dir= -if test -n "${with_gxx_include_dir}"; then - case "${with_gxx_include_dir}" in - yes ) - echo "configure.in: error: bad value ${withval} given for g++ include directory" 1>&2 - exit 1 - ;; - no ) - ;; - * ) - gxx_include_dir=${with_gxx_include_dir} - ;; - esac +AC_SUBST(build_canonical) +AC_SUBST(host_canonical) +AC_SUBST(target_subdir) + +# If $(exec_prefix) exists and is not the same as $(prefix), then compute an +# absolute path for gcc_tooldir based on inserting the number of up-directory +# movements required to get from $(exec_prefix) to $(prefix) into the basic +# $(libsubdir)/@(unlibsubdir) based path. +# Don't set gcc_tooldir to tooldir since that's only passed in by the toplevel +# make and thus we'd get different behavior depending on where we built the +# sources. +if test x$exec_prefix = xNONE -o x$exec_prefix = x$prefix; then + gcc_tooldir='$(libsubdir)/$(unlibsubdir)/../$(target_alias)' +else +changequote(<<, >>)dnl +# An explanation of the sed strings: +# -e 's|^\$(prefix)||' matches and eliminates 'prefix' from 'exec_prefix' +# -e 's|/$||' match a trailing forward slash and eliminates it +# -e 's|^[^/]|/|' forces the string to start with a forward slash (*) +# -e 's|/[^/]*|../|g' replaces each occurrence of /<directory> with ../ +# +# (*) Note this pattern overwrites the first character of the string +# with a forward slash if one is not already present. This is not a +# problem because the exact names of the sub-directories concerned is +# unimportant, just the number of them matters. +# +# The practical upshot of these patterns is like this: +# +# prefix exec_prefix result +# ------ ----------- ------ +# /foo /foo/bar ../ +# /foo/ /foo/bar ../ +# /foo /foo/bar/ ../ +# /foo/ /foo/bar/ ../ +# /foo /foo/bar/ugg ../../ +# + dollar='$$' + gcc_tooldir="\$(libsubdir)/\$(unlibsubdir)/\`echo \$(exec_prefix) | sed -e 's|^\$(prefix)||' -e 's|/\$(dollar)||' -e 's|^[^/]|/|' -e 's|/[^/]*|../|g'\`\$(target_alias)" +changequote([, ])dnl fi -if test x${gxx_include_dir} = x; then - if test x${enable_version_specific_runtime_libs} = xyes; then - gxx_include_dir='${libsubdir}/include/c++' - else - . ${topsrcdir}/config.if - gxx_include_dir='${prefix}/include/${libstdcxx_incdir}' - fi +AC_SUBST(gcc_tooldir) +AC_SUBST(dollar) + +# Find a directory in which to install a shared libgcc. + +AC_ARG_ENABLE(version-specific-runtime-libs, +[ --enable-version-specific-runtime-libs + specify that runtime libraries should be + installed in a compiler-specific directory]) + +AC_ARG_WITH(slibdir, +[ --with-slibdir=DIR shared libraries in DIR [LIBDIR]], +slibdir="$with_slibdir", +if test "${enable_version_specific_runtime_libs+set}" = set; then + slibdir='$(libsubdir)' +elif test "$host" != "$target"; then + slibdir='$(build_tooldir)/lib' else - gxx_include_dir=${gxx_include_dir} + slibdir='$(libdir)' +fi) +AC_SUBST(slibdir) + +# Nothing to do for FLOAT_H, float_format already handled. +objdir=`pwd` +AC_SUBST(objdir) + +# Process the language and host/target makefile fragments. +${CONFIG_SHELL-/bin/sh} $srcdir/configure.frag $srcdir "$subdirs" "$dep_host_xmake_file" "$dep_tmake_file" + +# Substitute configuration variables +AC_SUBST(subdirs) +AC_SUBST(all_boot_languages) +AC_SUBST(all_compilers) +AC_SUBST(all_lang_makefiles) +AC_SUBST(all_languages) +AC_SUBST(all_stagestuff) +AC_SUBST(build_exeext) +AC_SUBST(build_install_headers_dir) +AC_SUBST(build_xm_file_list) +AC_SUBST(build_xm_file) +AC_SUBST(build_xm_defines) +AC_SUBST(check_languages) +AC_SUBST(cc_set_by_configure) +AC_SUBST(quoted_cc_set_by_configure) +AC_SUBST(cpp_install_dir) +AC_SUBST(dep_host_xmake_file) +AC_SUBST(dep_tmake_file) +AC_SUBST(extra_headers_list) +AC_SUBST(extra_objs) +AC_SUBST(extra_parts) +AC_SUBST(extra_passes) +AC_SUBST(extra_programs) +AC_SUBST(float_h_file) +AC_SUBST(gcc_config_arguments) +AC_SUBST(gcc_gxx_include_dir) +AC_SUBST(libstdcxx_incdir) +AC_SUBST(gcc_version) +AC_SUBST(gcc_version_full) +AC_SUBST(gcc_version_trigger) +AC_SUBST(host_exeext) +AC_SUBST(host_extra_gcc_objs) +AC_SUBST(host_xm_file_list) +AC_SUBST(host_xm_file) +AC_SUBST(host_xm_defines) +AC_SUBST(install) +AC_SUBST(lang_options_files) +AC_SUBST(lang_specs_files) +AC_SUBST(lang_tree_files) +AC_SUBST(local_prefix) +AC_SUBST(md_file) +AC_SUBST(objc_boehm_gc) +AC_SUBST(out_file) +AC_SUBST(out_object_file) +AC_SUBST(stage_prefix_set_by_configure) +AC_SUBST(quoted_stage_prefix_set_by_configure) +AC_SUBST(symbolic_link) +AC_SUBST(thread_file) +AC_SUBST(tm_file_list) +AC_SUBST(tm_file) +AC_SUBST(tm_p_file_list) +AC_SUBST(tm_p_file) +AC_SUBST(xm_file) +AC_SUBST(xm_defines) +AC_SUBST(target_alias) +AC_SUBST(c_target_objs) +AC_SUBST(cxx_target_objs) +AC_SUBST(target_cpu_default) + +AC_SUBST_FILE(target_overrides) +AC_SUBST_FILE(host_overrides) +AC_SUBST_FILE(language_fragments) +AC_SUBST_FILE(language_hooks) + +# Echo that links are built +if test x$host = x$target +then + str1="native " +else + str1="cross-" + str2=" from $host" fi -FLAGS_FOR_TARGET= -case " $skipdirs " in -*" target-newlib "*) ;; -*) - case " $target_configdirs " in - *" newlib "*) - case " $targargs " in - *" --with-newlib "*) - case "$target" in - *-cygwin*) - FLAGS_FOR_TARGET=$FLAGS_FOR_TARGET' -L$$r/$(TARGET_SUBDIR)/winsup -L$$r/$(TARGET_SUBDIR)/winsup/cygwin -L$$r/$(TARGET_SUBDIR)/winsup/w32api/lib -isystem $$s/winsup/include -isystem $$s/winsup/cygwin/include -isystem $$s/winsup/w32api/include -isystem $$s/newlib/libc/sys/cygwin -isystem $$s/newlib/libc/sys/cygwin32' ;; - esac +if test x$host != x$build +then + str3=" on a $build system" +fi - # If we're not building GCC, don't discard standard headers. - if test -d ${topsrcdir}/gcc; then - FLAGS_FOR_TARGET=$FLAGS_FOR_TARGET' -nostdinc' - - if test "${build}" != "${host}"; then - # On Canadian crosses, CC_FOR_TARGET will have already been set - # by `configure', so we won't have an opportunity to add -Bgcc/ - # to it. This is right: we don't want to search that directory - # for binaries, but we want the header files in there, so add - # them explicitly. - FLAGS_FOR_TARGET=$FLAGS_FOR_TARGET' -isystem $$r/gcc/include' - - # Someone might think of using the pre-installed headers on - # Canadian crosses, in case the installed compiler is not fully - # compatible with the compiler being built. In this case, it - # would be better to flag an error than risking having - # incompatible object files being constructed. We can't - # guarantee that an error will be flagged, but let's hope the - # compiler will do it, when presented with incompatible header - # files. - fi - fi +if test "x$str2" != x || test "x$str3" != x +then + str4= +fi - # If we're building newlib, use its generic headers last, but search - # for any libc-related directories first (so make it the last -B - # switch). - FLAGS_FOR_TARGET=$FLAGS_FOR_TARGET' -B$$r/$(TARGET_SUBDIR)/newlib/ -isystem $$r/$(TARGET_SUBDIR)/newlib/targ-include -isystem $$s/newlib/libc/include' - ;; - esac - ;; - esac - ;; -esac +echo "Links are now set up to build a ${str1}compiler for ${target}$str4" 1>&2 -# On Canadian crosses, we'll be searching the right directories for -# the previously-installed cross compiler, so don't bother to add -# flags for directories within the install tree of the compiler -# being built; programs in there won't even run. -if test "${build}" = "${host}" && test -d ${topsrcdir}/gcc; then - # Search for pre-installed headers if nothing else fits. - FLAGS_FOR_TARGET=$FLAGS_FOR_TARGET' -B$(build_tooldir)/bin/ -B$(build_tooldir)/lib/ -isystem $(build_tooldir)/include' +if test "x$str2" != x || test "x$str3" != x +then + echo " ${str2}${str3}." 1>&2 fi -if test "x${use_gnu_ld}" = x && test "x${with_gnu_ld}" != xno && - echo " ${configdirs} " | grep " ld " > /dev/null && - test -d ${srcdir}/ld; then - # Arrange for us to find uninstalled linker scripts. - FLAGS_FOR_TARGET=$FLAGS_FOR_TARGET' -L$$r/ld' +# Truncate the target if necessary +if test x$host_truncate_target != x; then + target=`echo $target | sed -e 's/\(..............\).*/\1/'` fi -if test "x${CC_FOR_TARGET+set}" = xset; then - : -elif test -d ${topsrcdir}/gcc; then - CC_FOR_TARGET='$$r/gcc/xgcc -B$$r/gcc/' -elif test "$host" = "$target"; then - CC_FOR_TARGET='$(CC)' -else - CC_FOR_TARGET=`echo gcc | sed -e 's/x/x/' ${program_transform_name}` -fi -# On Canadian crosses, configure reads CC_FOR_TARGET from Makefile, -# if Makefile exists. Prevent $(FLAGS_FOR_TARGET) from being duplicated. -case $CC_FOR_TARGET in -*' $(FLAGS_FOR_TARGET)') ;; -*) CC_FOR_TARGET=$CC_FOR_TARGET' $(FLAGS_FOR_TARGET)' ;; -esac +# Configure the subdirectories +# AC_CONFIG_SUBDIRS($subdirs) -if test "x${GCJ_FOR_TARGET+set}" = xset; then - : -elif test -d ${topsrcdir}/gcc; then - GCJ_FOR_TARGET='$$r/gcc/gcj -B$$r/gcc/' -elif test "$host" = "$target"; then - GCJ_FOR_TARGET='gcj' -else - GCJ_FOR_TARGET=`echo gcj | sed -e 's/x/x/' ${program_transform_name}` -fi -case $GCJ_FOR_TARGET in -*' $(FLAGS_FOR_TARGET)') ;; -*) GCJ_FOR_TARGET=$GCJ_FOR_TARGET' $(FLAGS_FOR_TARGET)' ;; +# Create the Makefile +# and configure language subdirectories +AC_OUTPUT($all_outputs, +[ +case x$CONFIG_HEADERS in +xauto-host.h:config.in) +echo > cstamp-h ;; esac - -if test "x${CXX_FOR_TARGET+set}" = xset; then - : -elif test -d ${topsrcdir}/gcc; then - # We add -shared-libgcc to CXX_FOR_TARGET whenever we use xgcc instead - # of g++ for linking C++ or Java, because g++ has -shared-libgcc by - # default whereas gcc does not. - CXX_FOR_TARGET='$$r/gcc/`case $$dir in libstdc++-v3 | libjava) echo xgcc -shared-libgcc ;; *) echo g++ ;; esac` -B$$r/gcc/ -nostdinc++ '$libstdcxx_flags -elif test "$host" = "$target"; then - CXX_FOR_TARGET='$(CXX)' -else - CXX_FOR_TARGET=`echo c++ | sed -e 's/x/x/' ${program_transform_name}` +# If the host supports symlinks, point stage[1234] at ../stage[1234] so +# bootstrapping and the installation procedure can still use +# CC="stage1/xgcc -Bstage1/". If the host doesn't support symlinks, +# FLAGS_TO_PASS has been modified to solve the problem there. +# This is virtually a duplicate of what happens in configure.lang; we do +# an extra check to make sure this only happens if ln -s can be used. +if test "$symbolic_link" = "ln -s"; then + for d in .. ${subdirs} fixinc ; do + if test $d != ..; then + STARTDIR=`pwd` + cd $d + for t in stage1 stage2 stage3 stage4 include + do + rm -f $t + $symbolic_link ../$t $t 2>/dev/null + done + cd $STARTDIR + fi + done +else true ; fi +# Avoid having to add intl to our include paths. +if test -f intl/libintl.h; then + echo creating libintl.h + echo '#include "intl/libintl.h"' >libintl.h fi -case $CXX_FOR_TARGET in -*' $(FLAGS_FOR_TARGET)') ;; -*) CXX_FOR_TARGET=$CXX_FOR_TARGET' $(FLAGS_FOR_TARGET)' ;; -esac -qCXX_FOR_TARGET=`echo "$CXX_FOR_TARGET" | sed 's,[&%],\\\&,g'` - -# We want to defer the evaluation of `cmd`s and shell variables in -# CXX_FOR_TARGET when recursing in the top-level Makefile, such as for -# bootstrap. We'll enclose CXX_FOR_TARGET_FOR_RECURSIVE_MAKE in single -# quotes, but we still have to duplicate `$'s so that shell variables -# can be expanded by the nested make as shell variables, not as make -# macros. -qqCXX_FOR_TARGET=`echo "$qCXX_FOR_TARGET" | sed -e 's,[$][$],$$$$,g'` - -sedtemp=sed.$$ -cat >$sedtemp <<EOF -s:^TARGET_CONFIGDIRS[ ]*=.*$:TARGET_CONFIGDIRS = ${target_configdirs}: -s%^TARGET_CONFIGARGS[ ]*=.*$%TARGET_CONFIGARGS = ${targargs}% -s%^FLAGS_FOR_TARGET[ ]*=.*$%FLAGS_FOR_TARGET = ${FLAGS_FOR_TARGET}% -s%^CC_FOR_TARGET[ ]*=.*$%CC_FOR_TARGET = ${CC_FOR_TARGET}% -s%^GCJ_FOR_TARGET[ ]*=.*$%GCJ_FOR_TARGET = ${GCJ_FOR_TARGET}% -s%^CXX_FOR_TARGET[ ]*=.*$%CXX_FOR_TARGET = ${qCXX_FOR_TARGET}% -s%^CXX_FOR_TARGET_FOR_RECURSIVE_MAKE[ ]*=.*$%CXX_FOR_TARGET_FOR_RECURSIVE_MAKE = ${qqCXX_FOR_TARGET}% -s%^TARGET_SUBDIR[ ]*=.*$%TARGET_SUBDIR = ${target_subdir}% -s%^BUILD_SUBDIR[ ]*=.*$%BUILD_SUBDIR = ${build_subdir}% -s%^BUILD_CONFIGARGS[ ]*=.*$%BUILD_CONFIGARGS = ${buildargs}% -s%^gxx_include_dir[ ]*=.*$%gxx_include_dir=${gxx_include_dir}% -EOF -sed -f $sedtemp Makefile > Makefile.tem -rm -f Makefile $sedtemp -mv -f Makefile.tem Makefile - -# -# Local Variables: -# fill-column: 131 -# End: -# +], +[subdirs='$subdirs' +symbolic_link='$symbolic_link' +]) diff --git a/contrib/gcc/cp/ChangeLog b/contrib/gcc/cp/ChangeLog index cc84a03..5a611ae 100644 --- a/contrib/gcc/cp/ChangeLog +++ b/contrib/gcc/cp/ChangeLog @@ -1,3 +1,191 @@ +2002-11-19 Release Manager + + * GCC 3.2.1 Released. + +2002-11-19 Release Manager + + * GCC 3.2.1 Released. + +2002-11-18 Release Manager + + * GCC 3.2.1 Released. + +2002-11-11 Nathan Sidwell <nathan@codesourcery.com> + + PR c++/7788 + * rtti.c (unemitted_tinfo_decl_p): Check it has a field. + +2002-11-02 Zack Weinberg <zack@codesourcery.com> + + PR c/7353 redux + * decl2.c (grokfield): Reject TYPE_DECLs with initializers. + +2002-11-01 Gabriel Dos Reis <gdr@integrable-solutions.net> + + PR C++/2521 + * typeck.c (build_x_unary_op): Handle pointer-to-member. + +2002-10-30 Mark Mitchell <mark@codesourcery.com> + + PR c++/8160 + * typeck2.c (process_init_constructor): Call complete_array_type. + + PR c++/8149 + * decl.c (make_typename_type): Issue errors about invalid results. + +2002-10-29 Mark Mitchell <mark@codesourcery.com> + + PR c++/8287 + * decl.c (finish_destructor_body): Create the label to jump to + when returning from a destructor here. + (finish_function_body): Rather than here. + + * semantics.c (finish_alignof): Call complete_type before calling + c_alignof. + * decl2.c (build_expr_from_tree): Use + finish_sizeof/finish_alignof. + +2002-10-10 Jim Wilson <wilson@redhat.com> + + * decl.c (duplicate_decls): Don't call decl_attributes. + +2002-10-25 Zack Weinberg <zack@codesourcery.com> + + PR middle-end/6994 + * cp-lang.c (cp_var_mod_type_p): New: C++ hook for + variably_modified_type_p. + * cp-tree.h: Remove prototype of variably_modified_type_p. + * tree.c (variably_modified_type_p): Remove; now implemented + in language-independent code. + + PR c++/7266 + * decl.c (grokdeclarator): Check that TREE_OPERAND 0 of a + SCOPE_REF is not null before dereferencing it. + +2002-10-24 David Edelsohn <edelsohn@gnu.org> + + PR c++/7228 + * cp-tree.h (CLASSTYPE_READONLY_FIELDS_NEED_INIT): Check that + lang_type structure exists before accessing field. + (SET_CLASSTYPE_READONLY_FIELDS_NEED_INIT): New macro. + (CLASSTYPE_REF_FIELDS_NEED_INIT): Similar. + (SET_CLASSTYPE_REF_FIELDS_NEED_INIT): New macro. + * class.c (check_field_decls): Use new macros. + * typeck2.c (process_init_constructor): Remove redundant check for + existence of lang_type structure. + +2002-10-23 Mark Mitchell <mark@codesourcery.com> + + PR c++/8067 + * decl.c (maybe_inject_for_scope_var): Ignore __FUNCTION__ and + related variables. + +2002-10-23 Mark Mitchell <mark@codesourcery.com> + + PR c++/7679 + * spew.c (next_token): Do not return an endless stream of + END_OF_SAVED_INPUT tokens. + (snarf_method): Add three END_OF_SAVED_INPUT tokens to the end of + the cached token stream. + (snarf_defarg): Likewise. + +2002-10-22 Mark Mitchell <mark@codesourcery.com> + + PR c++/6579 + * spew.c (snarf_parenthesized_expression): New function. + (snarf_block): Use it. + +2002-10-21 Matthias Klose <doko@debian.org> + + * Backport, without whitespace change: + 2002-06-19 Akim Demaille <akim@epita.fr> + * parse.y (TYPENAME): Rename as tTYPENAME to avoid the clash with + decl.h's TYPENAME. + * spew.c, lex.c: Adjust. + * parse.y (explicit_instantiation): Add empty action to override + the default $$ = $1 where it introduces a type clash. + +2002-10-21 Mark Mitchell <mark@codesourcery.com> + + PR c++/8218 + * cp-tree.h (lang_type_class): Add contains_empty_class_p. + (CLASSTYPE_CONTAINS_EMPTY_CLASS_P): New macro. + * class.c (check_bases): Update CLASSTYPE_CONTAINS_EMPTY_CLASS_P. + (check_field_decls): Likewise. + (layout_class_type): Likewise. + (finish_struct_1): Initialize it. + (walk_subobject_offsets): Use it to prune searches. + +2002-10-18 Zack Weinberg <zack@codesourcery.com> + + * decl.c (start_decl): Point users of the old initialized- + typedef extension at __typeof__. + +2002-10-18 Nathan Sidwell <nathan@codesourcery.com> + + PR c++/7676 + * class.c (add_method): Compare template parms too. + +2002-10-17 Mark Mitchell <mark@codesourcery.com> + + * mangle.c (globals): Add entity and need_abi_warning. + (write_prefix): Likewise. + (write_template_prefix): Likewise. + (start_mangling): Add entity parameter. + (finish_mangling): Warn about names whose mangling will change. + (mangle_decl_string): Adjust. + (mangle_type_string): Likewise. + (mangle_special_for_type): Likewise. + (mangle_ctor_vtbl_for_type): Likewise. + (mangle_thunk): Likewise. + (mangle_guard_variable): Likewise. + (mangle_ref_init_variable): Likewise. + + PR c++/7584 + * class.c (handle_using_decl): Allow the declaration used to be + from an ambiguous base. + +2002-10-16 Mark Mitchell <mark@codesourcery.com> + + PR c++/7478 + * cvt.c (convert_to_reference): Allow references as the incoming + type. + + PR c++/8134 + * tree.c (zero_init_p): Always return 1. + + PR c++/7524 + * method.c (do_build_assign_ref): Use cp_build_qualified_type, not + build_qualified_type. + +2002-10-14 Mark Mitchell <mark@codesourcery.com> + + PR c++/7176 + * lex.c (do_identifier): Add another option for the parsing + parameter. + * parse.y (do_id): Use it. + +2002-10-11 Mark Mitchell <mark@codesourcery.com> + + PR c++/5661 + * cp-tree.h (variably_modified_type_p): New function. + (grokdeclarator) Tighten check for variably modified types as + fields. + * pt.c (convert_template_argument): Do not allow variably modified + types as template arguments. + * tree.c (variably_modified_type_p): New function. + +2002-10-11 Jason Molenda <jmolenda@apple.com> + + * init.c (build_field_list): Provide uses_unions_p with a default + value. + +2002-10-10 Gabriel Dos Reis <gdr@integrable-solutions.net> + + PRs C++/6803, C++/7721 and C++/7803 + * decl.c (grokdeclarator): Gracefully handle template-name as + decl-specifier. + 2002-10-09 Zack Weinberg <zack@codesourcery.com> PR c/7353 diff --git a/contrib/gcc/cp/class.c b/contrib/gcc/cp/class.c index 2395d79..2ac4e30 100644 --- a/contrib/gcc/cp/class.c +++ b/contrib/gcc/cp/class.c @@ -945,6 +945,13 @@ add_method (type, method, error_p) && (TYPE_QUALS (TREE_TYPE (TREE_VALUE (parms1))) != TYPE_QUALS (TREE_TYPE (TREE_VALUE (parms2))))) same = 0; + + /* For templates, the template parms must be identical. */ + if (TREE_CODE (fn) == TEMPLATE_DECL + && !comp_template_parms (DECL_TEMPLATE_PARMS (fn), + DECL_TEMPLATE_PARMS (method))) + same = 0; + if (! DECL_STATIC_FUNCTION_P (fn)) parms1 = TREE_CHAIN (parms1); if (! DECL_STATIC_FUNCTION_P (method)) @@ -1150,9 +1157,12 @@ handle_using_decl (using_decl, t) tree flist = NULL_TREE; tree old_value; - binfo = binfo_or_else (ctype, t); + binfo = lookup_base (t, ctype, ba_any, NULL); if (! binfo) - return; + { + error_not_base_type (t, ctype); + return; + } if (name == constructor_name (ctype) || name == constructor_name_full (ctype)) @@ -1338,6 +1348,8 @@ check_bases (t, cant_have_default_ctor_p, cant_have_const_ctor_p, TYPE_OVERLOADS_ARRAY_REF (t) |= TYPE_OVERLOADS_ARRAY_REF (basetype); TYPE_OVERLOADS_ARROW (t) |= TYPE_OVERLOADS_ARROW (basetype); TYPE_POLYMORPHIC_P (t) |= TYPE_POLYMORPHIC_P (basetype); + CLASSTYPE_CONTAINS_EMPTY_CLASS_P (t) + |= CLASSTYPE_CONTAINS_EMPTY_CLASS_P (basetype); } } @@ -3237,10 +3249,18 @@ check_field_decls (t, access_decls, empty_p, ; else { + tree element_type; + /* The class is non-empty. */ *empty_p = 0; /* The class is not even nearly empty. */ CLASSTYPE_NEARLY_EMPTY_P (t) = 0; + /* If one of the data members contains an empty class, + so does T. */ + element_type = strip_array_types (type); + if (CLASS_TYPE_P (element_type) + && CLASSTYPE_CONTAINS_EMPTY_CLASS_P (element_type)) + CLASSTYPE_CONTAINS_EMPTY_CLASS_P (t) = 1; } } @@ -3322,7 +3342,7 @@ check_field_decls (t, access_decls, empty_p, { CLASSTYPE_NON_POD_P (t) = 1; if (DECL_INITIAL (x) == NULL_TREE) - CLASSTYPE_REF_FIELDS_NEED_INIT (t) = 1; + SET_CLASSTYPE_REF_FIELDS_NEED_INIT (t, 1); /* ARM $12.6.2: [A member initializer list] (or, for an aggregate, initialization by a brace-enclosed list) is the @@ -3356,7 +3376,7 @@ check_field_decls (t, access_decls, empty_p, { C_TYPE_FIELDS_READONLY (t) = 1; if (DECL_INITIAL (x) == NULL_TREE) - CLASSTYPE_READONLY_FIELDS_NEED_INIT (t) = 1; + SET_CLASSTYPE_READONLY_FIELDS_NEED_INIT (t, 1); /* ARM $12.6.2: [A member initializer list] (or, for an aggregate, initialization by a brace-enclosed list) is the @@ -3372,8 +3392,9 @@ check_field_decls (t, access_decls, empty_p, else if (IS_AGGR_TYPE (type)) { C_TYPE_FIELDS_READONLY (t) |= C_TYPE_FIELDS_READONLY (type); - CLASSTYPE_READONLY_FIELDS_NEED_INIT (t) - |= CLASSTYPE_READONLY_FIELDS_NEED_INIT (type); + SET_CLASSTYPE_READONLY_FIELDS_NEED_INIT (t, + CLASSTYPE_READONLY_FIELDS_NEED_INIT (t) + | CLASSTYPE_READONLY_FIELDS_NEED_INIT (type)); } /* Core issue 80: A nonstatic data member is required to have a @@ -3507,6 +3528,10 @@ walk_subobject_offsets (type, f, offset, offsets, max_offset, vbases_p) tree field; int i; + /* Avoid recursing into objects that are not interesting. */ + if (!CLASSTYPE_CONTAINS_EMPTY_CLASS_P (type)) + return 0; + /* Record the location of TYPE. */ r = (*f) (type, offset, offsets); if (r) @@ -3552,9 +3577,15 @@ walk_subobject_offsets (type, f, offset, offsets, max_offset, vbases_p) } else if (TREE_CODE (type) == ARRAY_TYPE) { + tree element_type = strip_array_types (type); tree domain = TYPE_DOMAIN (type); tree index; + /* Avoid recursing into objects that are not interesting. */ + if (!CLASS_TYPE_P (element_type) + || !CLASSTYPE_CONTAINS_EMPTY_CLASS_P (element_type)) + return 0; + /* Step through each of the elements in the array. */ for (index = size_zero_node; INT_CST_LT (index, TYPE_MAX_VALUE (domain)); @@ -4267,6 +4298,7 @@ check_bases_and_members (t, empty_p) /* Assume that the class is nearly empty; we'll clear this flag if it turns out not to be nearly empty. */ CLASSTYPE_NEARLY_EMPTY_P (t) = 1; + CLASSTYPE_CONTAINS_EMPTY_CLASS_P (t) = 0; /* Check all the base-classes. */ check_bases (t, &cant_have_default_ctor, &cant_have_const_ctor, @@ -4974,6 +5006,10 @@ layout_class_type (t, empty_p, vfuns_p, virtuals_p) CLASSTYPE_ALIGN (t) = TYPE_ALIGN (t); CLASSTYPE_USER_ALIGN (t) = TYPE_USER_ALIGN (t); + /* Every empty class contains an empty class. */ + if (*empty_p) + CLASSTYPE_CONTAINS_EMPTY_CLASS_P (t) = 1; + /* Set the TYPE_DECL for this type to contain the right value for DECL_OFFSET, so that we can use it as part of a COMPONENT_REF for multiple inheritance. */ diff --git a/contrib/gcc/cp/cp-lang.c b/contrib/gcc/cp/cp-lang.c index b573cce..1464ef6 100644 --- a/contrib/gcc/cp/cp-lang.c +++ b/contrib/gcc/cp/cp-lang.c @@ -30,6 +30,7 @@ Boston, MA 02111-1307, USA. */ static HOST_WIDE_INT cxx_get_alias_set PARAMS ((tree)); static tree cp_expr_size PARAMS ((tree)); +static bool cp_var_mod_type_p PARAMS ((tree)); #undef LANG_HOOKS_NAME #define LANG_HOOKS_NAME "GNU C++" @@ -84,6 +85,8 @@ static tree cp_expr_size PARAMS ((tree)); cp_copy_res_decl_for_inlining #undef LANG_HOOKS_TREE_INLINING_ANON_AGGR_TYPE_P #define LANG_HOOKS_TREE_INLINING_ANON_AGGR_TYPE_P anon_aggr_type_p +#undef LANG_HOOKS_TREE_INLINING_VAR_MOD_TYPE_P +#define LANG_HOOKS_TREE_INLINING_VAR_MOD_TYPE_P cp_var_mod_type_p #undef LANG_HOOKS_TREE_INLINING_START_INLINING #define LANG_HOOKS_TREE_INLINING_START_INLINING cp_start_inlining #undef LANG_HOOKS_TREE_INLINING_END_INLINING @@ -130,3 +133,21 @@ cp_expr_size (exp) /* Use the default code. */ return lhd_expr_size (exp); } + +/* Returns true if T is a variably modified type, in the sense of C99. + This routine needs only check cases that cannot be handled by the + language-independent logic in tree-inline.c. */ + +static bool +cp_var_mod_type_p (tree type) +{ + /* If TYPE is a pointer-to-member, it is variably modified if either + the class or the member are variably modified. */ + if (TYPE_PTRMEM_P (type) || TYPE_PTRMEMFUNC_P (type)) + return (variably_modified_type_p (TYPE_PTRMEM_CLASS_TYPE (type)) + || variably_modified_type_p (TYPE_PTRMEM_POINTED_TO_TYPE (type))); + + /* All other types are not variably modified. */ + return false; +} + diff --git a/contrib/gcc/cp/cp-tree.h b/contrib/gcc/cp/cp-tree.h index 4bd0879..9e8199f 100644 --- a/contrib/gcc/cp/cp-tree.h +++ b/contrib/gcc/cp/cp-tree.h @@ -1251,6 +1251,7 @@ struct lang_type unsigned java_interface : 1; unsigned non_zero_init : 1; + unsigned contains_empty_class_p : 1; /* When adding a flag here, consider whether or not it ought to apply to a template instance if it applies to the template. If @@ -1259,7 +1260,7 @@ struct lang_type /* There are some bits left to fill out a 32-bit word. Keep track of this by updating the size of this bitfield whenever you add or remove a flag. */ - unsigned dummy : 7; + unsigned dummy : 6; int vsize; @@ -1520,6 +1521,10 @@ struct lang_type #define CLASSTYPE_NEARLY_EMPTY_P(NODE) \ (TYPE_LANG_SPECIFIC (NODE)->nearly_empty_p) +/* Nonzero if this class contains an empty subobject. */ +#define CLASSTYPE_CONTAINS_EMPTY_CLASS_P(NODE) \ + (TYPE_LANG_SPECIFIC (NODE)->contains_empty_class_p) + /* A list of class types of which this type is a friend. The TREE_VALUE is normally a TYPE, but will be a TEMPLATE_DECL in the case of a template friend. */ @@ -1534,13 +1539,21 @@ struct lang_type #define CLASSTYPE_DECLARED_CLASS(NODE) \ (TYPE_LANG_SPECIFIC (NODE)->declared_class) -/* Nonzero if this class has const members which have no specified initialization. */ -#define CLASSTYPE_READONLY_FIELDS_NEED_INIT(NODE) \ - (TYPE_LANG_SPECIFIC (NODE)->const_needs_init) - -/* Nonzero if this class has ref members which have no specified initialization. */ -#define CLASSTYPE_REF_FIELDS_NEED_INIT(NODE) \ - (TYPE_LANG_SPECIFIC (NODE)->ref_needs_init) +/* Nonzero if this class has const members + which have no specified initialization. */ +#define CLASSTYPE_READONLY_FIELDS_NEED_INIT(NODE) \ + (TYPE_LANG_SPECIFIC (NODE) \ + ? TYPE_LANG_SPECIFIC (NODE)->const_needs_init : 0) +#define SET_CLASSTYPE_READONLY_FIELDS_NEED_INIT(NODE, VALUE) \ + (TYPE_LANG_SPECIFIC (NODE)->const_needs_init = (VALUE)) + +/* Nonzero if this class has ref members + which have no specified initialization. */ +#define CLASSTYPE_REF_FIELDS_NEED_INIT(NODE) \ + (TYPE_LANG_SPECIFIC (NODE) \ + ? TYPE_LANG_SPECIFIC (NODE)->ref_needs_init : 0) +#define SET_CLASSTYPE_REF_FIELDS_NEED_INIT(NODE, VALUE) \ + (TYPE_LANG_SPECIFIC (NODE)->ref_needs_init = (VALUE)) /* Nonzero if this class is included from a header file which employs `#pragma interface', and it is not included in its implementation file. */ diff --git a/contrib/gcc/cp/cvt.c b/contrib/gcc/cp/cvt.c index 9b4f68f..5e6c92c 100644 --- a/contrib/gcc/cp/cvt.c +++ b/contrib/gcc/cp/cvt.c @@ -464,12 +464,13 @@ convert_to_reference (reftype, expr, convtype, flags, decl) tree decl; { register tree type = TYPE_MAIN_VARIANT (TREE_TYPE (reftype)); - register tree intype = TREE_TYPE (expr); + register tree intype; tree rval = NULL_TREE; tree rval_as_conversion = NULL_TREE; int i; - if (TREE_CODE (type) == FUNCTION_TYPE && intype == unknown_type_node) + if (TREE_CODE (type) == FUNCTION_TYPE + && TREE_TYPE (expr) == unknown_type_node) { expr = instantiate_type (type, expr, (flags & LOOKUP_COMPLAIN) @@ -479,6 +480,11 @@ convert_to_reference (reftype, expr, convtype, flags, decl) intype = TREE_TYPE (expr); } + else + { + expr = convert_from_reference (expr); + intype = TREE_TYPE (expr); + } my_friendly_assert (TREE_CODE (intype) != REFERENCE_TYPE, 364); diff --git a/contrib/gcc/cp/decl2.c b/contrib/gcc/cp/decl2.c index 4334963..730bbfb 100644 --- a/contrib/gcc/cp/decl2.c +++ b/contrib/gcc/cp/decl2.c @@ -1519,7 +1519,13 @@ grokfield (declarator, declspecs, init, asmspec_tree, attrlist) /* friend or constructor went bad. */ return value; if (TREE_TYPE (value) == error_mark_node) - return error_mark_node; + return error_mark_node; + + if (TREE_CODE (value) == TYPE_DECL && init) + { + error ("typedef `%D' is initialized (use __typeof__ instead)", value); + init = NULL_TREE; + } /* Pass friendly classes back. */ if (TREE_CODE (value) == VOID_TYPE) @@ -3795,10 +3801,8 @@ build_expr_from_tree (t) case ALIGNOF_EXPR: { tree r = build_expr_from_tree (TREE_OPERAND (t, 0)); - if (!TYPE_P (r)) - return TREE_CODE (t) == SIZEOF_EXPR ? expr_sizeof (r) : c_alignof_expr (r); - else - return TREE_CODE (t) == SIZEOF_EXPR ? c_sizeof (r) : c_alignof (r); + return (TREE_CODE (t) == SIZEOF_EXPR + ? finish_sizeof (r) : finish_alignof (r)); } case MODOP_EXPR: diff --git a/contrib/gcc/cp/init.c b/contrib/gcc/cp/init.c index a46d853..df63e67 100644 --- a/contrib/gcc/cp/init.c +++ b/contrib/gcc/cp/init.c @@ -348,6 +348,8 @@ build_field_list (t, list, uses_unions_p) { tree fields; + *uses_unions_p = 0; + /* Note whether or not T is a union. */ if (TREE_CODE (t) == UNION_TYPE) *uses_unions_p = 1; diff --git a/contrib/gcc/cp/lex.c b/contrib/gcc/cp/lex.c index d68957a..c40469c 100644 --- a/contrib/gcc/cp/lex.c +++ b/contrib/gcc/cp/lex.c @@ -90,10 +90,11 @@ extern YYSTYPE yylval; /* the semantic value of the */ int warn_traditional = 0; int flag_digraphs = 1; -/* the declaration found for the last IDENTIFIER token read in. - yylex must look this up to detect typedefs, which get token type TYPENAME, - so it is left around in case the identifier is not a typedef but is - used in a context which makes it a reference to a variable. */ +/* the declaration found for the last IDENTIFIER token read in. yylex + must look this up to detect typedefs, which get token type + tTYPENAME, so it is left around in case the identifier is not a + typedef but is used in a context which makes it a reference to a + variable. */ tree lastiddecl; /* Array for holding counts of the numbers of tokens seen. */ @@ -739,7 +740,7 @@ yyprint (file, yychar, yylval) switch (yychar) { case IDENTIFIER: - case TYPENAME: + case tTYPENAME: case TYPESPEC: case PTYPENAME: case PFUNCNAME: @@ -977,7 +978,7 @@ check_for_missing_semicolon (type) if ((yychar > 255 && yychar != SCSPEC && yychar != IDENTIFIER - && yychar != TYPENAME + && yychar != tTYPENAME && yychar != CV_QUALIFIER && yychar != SELFNAME) || yychar == 0 /* EOF */) @@ -1194,7 +1195,7 @@ do_identifier (token, parsing, args) tree args; { register tree id; - int lexing = (parsing == 1); + int lexing = (parsing == 1 || parsing == 3); if (! lexing) id = lookup_name (token, 0); @@ -1216,7 +1217,7 @@ do_identifier (token, parsing, args) /* Remember that this name has been used in the class definition, as per [class.scope0] */ - if (id && parsing) + if (id && parsing && parsing != 3) maybe_note_name_used_in_class (token, id); if (id == error_mark_node) diff --git a/contrib/gcc/cp/mangle.c b/contrib/gcc/cp/mangle.c index ba312b7..10f2b62 100644 --- a/contrib/gcc/cp/mangle.c +++ b/contrib/gcc/cp/mangle.c @@ -93,6 +93,13 @@ static struct globals /* An array of the current substitution candidates, in the order we've seen them. */ varray_type substitutions; + + /* The entity that is being mangled. */ + tree entity; + + /* True if the mangling will be different in a future version of the + ABI. */ + bool need_abi_warning; } G; /* Indices into subst_identifiers. These are identifiers used in @@ -186,8 +193,8 @@ static const char *mangle_decl_string PARAMS ((tree)); /* Control functions. */ -static inline void start_mangling PARAMS ((void)); -static inline const char *finish_mangling PARAMS ((void)); +static inline void start_mangling PARAMS ((tree)); +static inline const char *finish_mangling PARAMS ((bool)); static tree mangle_special_for_type PARAMS ((tree, const char *)); /* Foreign language functions. */ @@ -884,6 +891,10 @@ write_prefix (node) template_info = CLASSTYPE_TEMPLATE_INFO (node); } + /* In G++ 3.2, the name of the template parameter was used. */ + if (TREE_CODE (node) == TEMPLATE_TYPE_PARM) + G.need_abi_warning = true; + if (template_info != NULL) /* Templated. */ { @@ -955,6 +966,10 @@ write_template_prefix (node) if (find_substitution (substitution)) return; + /* In G++ 3.2, the name of the template template parameter was used. */ + if (TREE_CODE (TREE_TYPE (template)) == TEMPLATE_TEMPLATE_PARM) + G.need_abi_warning = true; + write_prefix (context); write_unqualified_name (decl); @@ -1823,6 +1838,10 @@ write_expression (expr) write_template_arg_literal (expr); else if (DECL_P (expr)) { + /* G++ 3.2 incorrectly mangled non-type template arguments of + enumeration type using their names. */ + if (code == CONST_DECL) + G.need_abi_warning = 1; write_char ('L'); write_mangled_name (expr); write_char ('E'); @@ -1878,7 +1897,12 @@ write_expression (expr) if (TREE_CODE (TREE_OPERAND (expr, 1)) == IDENTIFIER_NODE) write_source_name (TREE_OPERAND (expr, 1)); else - write_encoding (TREE_OPERAND (expr, 1)); + { + /* G++ 3.2 incorrectly put out both the "sr" code and + the nested name of the qualified name. */ + G.need_abi_warning = 1; + write_encoding (TREE_OPERAND (expr, 1)); + } break; default: @@ -1983,6 +2007,10 @@ write_template_arg (node) write_template_template_arg (node); else if (DECL_P (node)) { + /* G++ 3.2 incorrectly mangled non-type template arguments of + enumeration type using their names. */ + if (code == CONST_DECL) + G.need_abi_warning = 1; write_char ('L'); write_char ('Z'); write_encoding (node); @@ -2152,16 +2180,23 @@ write_substitution (seq_id) /* Start mangling a new name or type. */ static inline void -start_mangling () +start_mangling (tree entity) { + G.entity = entity; + G.need_abi_warning = false; obstack_free (&G.name_obstack, obstack_base (&G.name_obstack)); } /* Done with mangling. Return the generated mangled name. */ static inline const char * -finish_mangling () +finish_mangling (bool warn) { + if (warn_abi && warn && G.need_abi_warning) + warning ("the mangled name of `%D' will change in a future " + "version of GCC", + G.entity); + /* Clear all the substitutions. */ VARRAY_POP_ALL (G.substitutions); @@ -2197,7 +2232,7 @@ mangle_decl_string (decl) { const char *result; - start_mangling (); + start_mangling (decl); if (TREE_CODE (decl) == TYPE_DECL) write_type (TREE_TYPE (decl)); @@ -2224,7 +2259,7 @@ mangle_decl_string (decl) write_string (" *INTERNAL* "); } - result = finish_mangling (); + result = finish_mangling (/*warn=*/true); if (DEBUG_MANGLE) fprintf (stderr, "mangle_decl_string = '%s'\n\n", result); return result; @@ -2249,9 +2284,9 @@ mangle_type_string (type) { const char *result; - start_mangling (); + start_mangling (type); write_type (type); - result = finish_mangling (); + result = finish_mangling (/*warn=*/false); if (DEBUG_MANGLE) fprintf (stderr, "mangle_type_string = '%s'\n\n", result); return result; @@ -2279,7 +2314,7 @@ mangle_special_for_type (type, code) /* We don't have an actual decl here for the special component, so we can't just process the <encoded-name>. Instead, fake it. */ - start_mangling (); + start_mangling (type); /* Start the mangling. */ write_string ("_Z"); @@ -2287,7 +2322,7 @@ mangle_special_for_type (type, code) /* Add the type. */ write_type (type); - result = finish_mangling (); + result = finish_mangling (/*warn=*/false); if (DEBUG_MANGLE) fprintf (stderr, "mangle_special_for_type = %s\n\n", result); @@ -2354,7 +2389,7 @@ mangle_ctor_vtbl_for_type (type, binfo) { const char *result; - start_mangling (); + start_mangling (type); write_string ("_Z"); write_string ("TC"); @@ -2363,7 +2398,7 @@ mangle_ctor_vtbl_for_type (type, binfo) write_char ('_'); write_type (BINFO_TYPE (binfo)); - result = finish_mangling (); + result = finish_mangling (/*warn=*/false); if (DEBUG_MANGLE) fprintf (stderr, "mangle_ctor_vtbl_for_type = %s\n\n", result); return get_identifier (result); @@ -2387,7 +2422,7 @@ mangle_thunk (fn_decl, offset, vcall_offset) { const char *result; - start_mangling (); + start_mangling (fn_decl); write_string ("_Z"); /* The <special-name> for virtual thunks is Tv, for non-virtual @@ -2413,7 +2448,7 @@ mangle_thunk (fn_decl, offset, vcall_offset) /* Scoped name. */ write_encoding (fn_decl); - result = finish_mangling (); + result = finish_mangling (/*warn=*/false); if (DEBUG_MANGLE) fprintf (stderr, "mangle_thunk = %s\n\n", result); return get_identifier (result); @@ -2454,7 +2489,7 @@ tree mangle_guard_variable (variable) tree variable; { - start_mangling (); + start_mangling (variable); write_string ("_ZGV"); if (strncmp (IDENTIFIER_POINTER (DECL_NAME (variable)), "_ZGR", 4) == 0) /* The name of a guard variable for a reference temporary should refer @@ -2462,7 +2497,7 @@ mangle_guard_variable (variable) write_string (IDENTIFIER_POINTER (DECL_NAME (variable)) + 4); else write_name (variable, /*ignore_local_scope=*/0); - return get_identifier (finish_mangling ()); + return get_identifier (finish_mangling (/*warn=*/false)); } /* Return an identifier for the name of a temporary variable used to @@ -2473,10 +2508,10 @@ tree mangle_ref_init_variable (variable) tree variable; { - start_mangling (); + start_mangling (variable); write_string ("_ZGR"); write_name (variable, /*ignore_local_scope=*/0); - return get_identifier (finish_mangling ()); + return get_identifier (finish_mangling (/*warn=*/false)); } diff --git a/contrib/gcc/cp/method.c b/contrib/gcc/cp/method.c index e4af0ab..5bb555d 100644 --- a/contrib/gcc/cp/method.c +++ b/contrib/gcc/cp/method.c @@ -688,7 +688,7 @@ do_build_assign_ref (fndecl) comp = build (COMPONENT_REF, TREE_TYPE (field), comp, field); init = build (COMPONENT_REF, - build_qualified_type (TREE_TYPE (field), cvquals), + cp_build_qualified_type (TREE_TYPE (field), cvquals), init, field); if (DECL_NAME (field)) diff --git a/contrib/gcc/cp/parse.y b/contrib/gcc/cp/parse.y index 6782621..5328ed3 100644 --- a/contrib/gcc/cp/parse.y +++ b/contrib/gcc/cp/parse.y @@ -253,7 +253,7 @@ cp_parse_init () /* All identifiers that are declared typedefs in the current block. In some contexts, they are treated just like IDENTIFIER, but they can also serve as typespecs in declarations. */ -%token TYPENAME +%token tTYPENAME %token SELFNAME /* A template function. */ @@ -315,7 +315,7 @@ cp_parse_init () %nonassoc IF %nonassoc ELSE -%left IDENTIFIER PFUNCNAME TYPENAME SELFNAME PTYPENAME SCSPEC TYPESPEC CV_QUALIFIER ENUM AGGR ELLIPSIS TYPEOF SIGOF OPERATOR NSNAME TYPENAME_KEYWORD ATTRIBUTE +%left IDENTIFIER PFUNCNAME tTYPENAME SELFNAME PTYPENAME SCSPEC TYPESPEC CV_QUALIFIER ENUM AGGR ELLIPSIS TYPEOF SIGOF OPERATOR NSNAME TYPENAME_KEYWORD ATTRIBUTE %left '{' ',' ';' @@ -345,7 +345,7 @@ cp_parse_init () %type <code> unop -%type <ttype> identifier IDENTIFIER TYPENAME CONSTANT expr nonnull_exprlist +%type <ttype> identifier IDENTIFIER tTYPENAME CONSTANT expr nonnull_exprlist %type <ttype> PFUNCNAME maybe_identifier %type <ttype> paren_expr_or_null nontrivial_exprlist SELFNAME %type <ttype> expr_no_commas expr_no_comma_rangle @@ -994,7 +994,7 @@ member_init: identifier: IDENTIFIER - | TYPENAME + | tTYPENAME | SELFNAME | PTYPENAME | NSNAME @@ -1031,17 +1031,21 @@ explicit_instantiation: { do_type_instantiation ($4.t, $1, 1); yyungetc (';', 1); } end_explicit_instantiation + {} | SCSPEC TEMPLATE begin_explicit_instantiation typed_declspecs declarator { tree specs = strip_attrs ($4.t); do_decl_instantiation (specs, $5, $1); } end_explicit_instantiation + {} | SCSPEC TEMPLATE begin_explicit_instantiation notype_declarator { do_decl_instantiation (NULL_TREE, $4, $1); } end_explicit_instantiation + {} | SCSPEC TEMPLATE begin_explicit_instantiation constructor_declarator { do_decl_instantiation (NULL_TREE, $4, $1); } end_explicit_instantiation + {} ; begin_explicit_instantiation: @@ -1060,7 +1064,7 @@ template_type: PTYPENAME '<' template_arg_list_opt template_close_bracket .finish_template_type { $$ = $5; } - | TYPENAME '<' template_arg_list_opt template_close_bracket + | tTYPENAME '<' template_arg_list_opt template_close_bracket .finish_template_type { $$ = $5; } | self_template_type @@ -1507,7 +1511,7 @@ do_id: don't do_identifier; we only do that for unqualified identifiers. */ if (!lastiddecl || TREE_CODE (lastiddecl) != TREE_LIST) - $$ = do_identifier ($<ttype>-1, 1, NULL_TREE); + $$ = do_identifier ($<ttype>-1, 3, NULL_TREE); else $$ = $<ttype>-1; } @@ -1532,7 +1536,7 @@ object_template_id: unqualified_id: notype_unqualified_id - | TYPENAME + | tTYPENAME | SELFNAME ; @@ -2767,7 +2771,7 @@ after_type_component_declarator0: after_type_declarator maybeasm maybe_attribute maybe_init { $$ = parse_field0 ($1, $<ftype>0.t, $<ftype>0.lookups, $3, $2, $4); } - | TYPENAME ':' expr_no_commas maybe_attribute + | tTYPENAME ':' expr_no_commas maybe_attribute { $$ = parse_bitfield0 ($1, $<ftype>0.t, $<ftype>0.lookups, $4, $3); } ; @@ -2790,7 +2794,7 @@ notype_component_declarator0: after_type_component_declarator: after_type_declarator maybeasm maybe_attribute maybe_init { $$ = parse_field ($1, $3, $2, $4); } - | TYPENAME ':' expr_no_commas maybe_attribute + | tTYPENAME ':' expr_no_commas maybe_attribute { $$ = parse_bitfield ($1, $4, $3); } ; @@ -3062,7 +3066,7 @@ functional_cast: ; type_name: - TYPENAME + tTYPENAME | SELFNAME | template_type %prec EMPTY ; @@ -3086,7 +3090,7 @@ nested_name_specifier: /* Why the @#$%^& do type_name and notype_identifier need to be expanded inline here?!? (jason) */ nested_name_specifier_1: - TYPENAME SCOPE + tTYPENAME SCOPE { if (TREE_CODE ($1) == IDENTIFIER_NODE) { @@ -3172,7 +3176,7 @@ typename_sub1: /* This needs to return a TYPE_DECL for simple names so that we don't forget what name was used. */ typename_sub2: - TYPENAME SCOPE + tTYPENAME SCOPE { if (TREE_CODE ($1) != TYPE_DECL) $$ = lastiddecl; @@ -3610,7 +3614,7 @@ label_colon: { finish_label_stmt ($1); } | PTYPENAME ':' { finish_label_stmt ($1); } - | TYPENAME ':' + | tTYPENAME ':' { finish_label_stmt ($1); } | SELFNAME ':' { finish_label_stmt ($1); } diff --git a/contrib/gcc/cp/pt.c b/contrib/gcc/cp/pt.c index 8fc9f74..b8e9545 100644 --- a/contrib/gcc/cp/pt.c +++ b/contrib/gcc/cp/pt.c @@ -3430,6 +3430,16 @@ convert_template_argument (parm, arg, args, complain, i, in_decl) val, t); return error_mark_node; } + + /* In order to avoid all sorts of complications, we do + not allow variably-modified types as template + arguments. */ + if (variably_modified_type_p (val)) + { + error ("template-argument `%T' is a variably modified type", + val); + return error_mark_node; + } } } } diff --git a/contrib/gcc/cp/rtti.c b/contrib/gcc/cp/rtti.c index ae23234..39cb1c6 100644 --- a/contrib/gcc/cp/rtti.c +++ b/contrib/gcc/cp/rtti.c @@ -1413,11 +1413,13 @@ unemitted_tinfo_decl_p (t, data) TREE_CODE (t) == VAR_DECL /* whos name points back to itself */ && IDENTIFIER_GLOBAL_VALUE (DECL_NAME (t)) == t - /* whos name's type is non-null */ + /* whose name's type is non-null */ && TREE_TYPE (DECL_NAME (t)) - /* and whos type is a struct */ + /* and whose type is a struct */ && TREE_CODE (TREE_TYPE (t)) == RECORD_TYPE - /* with a first field of our pseudo type info */ + /* with a field */ + && TYPE_FIELDS (TREE_TYPE (t)) + /* which is our pseudo type info */ && TREE_TYPE (TYPE_FIELDS (TREE_TYPE (t))) == ti_desc_type_node) return 1; return 0; diff --git a/contrib/gcc/cp/semantics.c b/contrib/gcc/cp/semantics.c index 43d3074..a484203 100644 --- a/contrib/gcc/cp/semantics.c +++ b/contrib/gcc/cp/semantics.c @@ -2117,7 +2117,7 @@ finish_alignof (t) if (processing_template_decl) return build_min_nt (ALIGNOF_EXPR, t); - return TYPE_P (t) ? c_alignof (t) : c_alignof_expr (t); + return TYPE_P (t) ? c_alignof (complete_type (t)) : c_alignof_expr (t); } /* Generate RTL for the statement T, and its substatements, and any diff --git a/contrib/gcc/cp/spew.c b/contrib/gcc/cp/spew.c index 212dada..278a99a 100644 --- a/contrib/gcc/cp/spew.c +++ b/contrib/gcc/cp/spew.c @@ -115,6 +115,7 @@ static SPEW_INLINE int read_process_identifier PARAMS ((YYSTYPE *)); static SPEW_INLINE void feed_input PARAMS ((struct unparsed_text *)); static SPEW_INLINE void snarf_block PARAMS ((const char *, int)); static tree snarf_defarg PARAMS ((void)); +static void snarf_parenthesized_expression PARAMS ((const char *, int)); static int frob_id PARAMS ((int, int, tree *)); /* The list of inline functions being held off until we reach the end of @@ -141,10 +142,11 @@ static enum cpp_ttype last_token; static tree last_token_id; /* From lex.c: */ -/* the declaration found for the last IDENTIFIER token read in. - yylex must look this up to detect typedefs, which get token type TYPENAME, - so it is left around in case the identifier is not a typedef but is - used in a context which makes it a reference to a variable. */ +/* the declaration found for the last IDENTIFIER token read in. yylex + must look this up to detect typedefs, which get token type + tTYPENAME, so it is left around in case the identifier is not a + typedef but is used in a context which makes it a reference to a + variable. */ extern tree lastiddecl; /* let our brains leak out here too */ extern int yychar; /* the lookahead symbol */ extern YYSTYPE yylval; /* the semantic value of the */ @@ -483,9 +485,8 @@ add_token (t) memcpy (t, feed->input->pos, sizeof (struct token)); return (feed->input->pos++)->yychar; } - - memcpy (t, &Teosi, sizeof (struct token)); - return END_OF_SAVED_INPUT; + + return 0; } /* Shift the next token onto the fifo. */ @@ -628,11 +629,11 @@ identifier_type (decl) if (t && t == decl) return SELFNAME; - return TYPENAME; + return tTYPENAME; } /* token[0] == AGGR (struct/union/enum) - Thus, token[1] is either a TYPENAME or a TYPENAME_DEFN. + Thus, token[1] is either a tTYPENAME or a TYPENAME_DEFN. If token[2] == '{' or ':' then it's TYPENAME_DEFN. It's also a definition if it's a forward declaration (as in 'struct Foo;') which we can tell if token[2] == ';' *and* token[-1] != FRIEND or NEW. */ @@ -644,7 +645,7 @@ do_aggr () scan_tokens (2); yc1 = nth_token (1)->yychar; - if (yc1 != TYPENAME && yc1 != IDENTIFIER && yc1 != PTYPENAME) + if (yc1 != tTYPENAME && yc1 != IDENTIFIER && yc1 != PTYPENAME) return; yc2 = nth_token (2)->yychar; if (yc2 == ';') @@ -659,7 +660,7 @@ do_aggr () switch (yc1) { - case TYPENAME: + case tTYPENAME: nth_token (1)->yychar = TYPENAME_DEFN; break; case PTYPENAME: @@ -757,7 +758,7 @@ yylex () break; } case IDENTIFIER_DEFN: - case TYPENAME: + case tTYPENAME: case TYPENAME_DEFN: case PTYPENAME: case PTYPENAME_DEFN: @@ -897,7 +898,7 @@ frob_id (yyc, peek, idp) yyc = identifier_type (trrr); switch(yyc) { - case TYPENAME: + case tTYPENAME: case SELFNAME: case NSNAME: case PTYPENAME: @@ -1031,6 +1032,38 @@ process_next_inline (i) } +/* Accumulate the tokens that make up a parenthesized expression in T, + having already read the opening parenthesis. */ + +static void +snarf_parenthesized_expression (starting_file, starting_line) + const char *starting_file; + int starting_line; +{ + int yyc; + int level = 1; + + while (1) + { + size_t point; + + point = obstack_object_size (&inline_text_obstack); + obstack_blank (&inline_text_obstack, sizeof (struct token)); + yyc = add_token ((struct token *) + (obstack_base (&inline_text_obstack) + point)); + if (yyc == '(') + ++level; + else if (yyc == ')' && --level == 0) + break; + else if (yyc == 0) + { + error_with_file_and_line (starting_file, starting_line, + "end of file read inside definition"); + break; + } + } +} + /* Subroutine of snarf_method, deals with actual absorption of the block. */ static SPEW_INLINE void @@ -1113,6 +1146,8 @@ snarf_block (starting_file, starting_line) else if (look_for_semicolon && blev == 0) break; } + else if (yyc == '(' && blev == 0) + snarf_parenthesized_expression (starting_file, starting_line); else if (yyc == 0) { error_with_file_and_line (starting_file, starting_line, @@ -1131,12 +1166,27 @@ snarf_method (decl) int starting_lineno = lineno; const char *starting_filename = input_filename; size_t len; + int i; struct unparsed_text *meth; /* Leave room for the header, then absorb the block. */ obstack_blank (&inline_text_obstack, sizeof (struct unparsed_text)); snarf_block (starting_filename, starting_lineno); + /* Add three END_OF_SAVED_INPUT tokens. We used to provide an + infinite stream of END_OF_SAVED_INPUT tokens -- but that can + cause the compiler to get stuck in an infinite loop when + encountering invalid code. We need more than one because the + parser sometimes peeks ahead several tokens. */ + for (i = 0; i < 3; ++i) + { + size_t point = obstack_object_size (&inline_text_obstack); + obstack_blank (&inline_text_obstack, sizeof (struct token)); + memcpy ((struct token *) + (obstack_base (&inline_text_obstack) + point), + &Teosi, + sizeof (struct token)); + } len = obstack_object_size (&inline_text_obstack); meth = (struct unparsed_text *) obstack_finish (&inline_text_obstack); @@ -1187,6 +1237,7 @@ snarf_defarg () size_t point; size_t len; struct unparsed_text *buf; + int i; tree arg; obstack_blank (&inline_text_obstack, sizeof (struct unparsed_text)); @@ -1216,6 +1267,20 @@ snarf_defarg () push_token ((struct token *) (obstack_base (&inline_text_obstack) + point)); /* This is the documented way to shrink a growing obstack block. */ obstack_blank (&inline_text_obstack, - (int) sizeof (struct token)); + /* Add three END_OF_SAVED_INPUT tokens. We used to provide an + infinite stream of END_OF_SAVED_INPUT tokens -- but that can + cause the compiler to get stuck in an infinite loop when + encountering invalid code. We need more than one because the + parser sometimes peeks ahead several tokens. */ + for (i = 0; i < 3; ++i) + { + point = obstack_object_size (&inline_text_obstack); + obstack_blank (&inline_text_obstack, sizeof (struct token)); + memcpy ((struct token *) + (obstack_base (&inline_text_obstack) + point), + &Teosi, + sizeof (struct token)); + } done: len = obstack_object_size (&inline_text_obstack); @@ -1448,7 +1513,7 @@ debug_yychar (yy) { if (yy<256) fprintf (stderr, "->%d < %c >\n", lineno, yy); - else if (yy == IDENTIFIER || yy == TYPENAME) + else if (yy == IDENTIFIER || yy == tTYPENAME) { const char *id; if (TREE_CODE (yylval.ttype) == IDENTIFIER_NODE) diff --git a/contrib/gcc/cp/tree.c b/contrib/gcc/cp/tree.c index 748ab9a..65dca00 100644 --- a/contrib/gcc/cp/tree.c +++ b/contrib/gcc/cp/tree.c @@ -1903,19 +1903,19 @@ pod_type_p (t) int zero_init_p (t) - tree t; + tree t ATTRIBUTE_UNUSED; { - t = strip_array_types (t); - - /* NULL pointers to data members are initialized with -1. */ - if (TYPE_PTRMEM_P (t)) - return 0; + /* This is not a correct implementation of this function. As a + result, pointers-to-members will not be correctly + zero-initialized. - /* Classes that contain types that can't be zero-initialized, cannot - be zero-initialized themselves. */ - if (CLASS_TYPE_P (t) && CLASSTYPE_NON_ZERO_INIT_P (t)) - return 0; + However, using a correct implementation of this function results + in many other failures. Correcting these other failures required + a major infrastructure improvement, which was undertaken in the + GCC 3.3 source base. + In order to reduce risk, these changes were not ported to the GCC + 3.2 source base. */ return 1; } diff --git a/contrib/gcc/cp/typeck.c b/contrib/gcc/cp/typeck.c index d326969..b019d0a 100644 --- a/contrib/gcc/cp/typeck.c +++ b/contrib/gcc/cp/typeck.c @@ -4167,6 +4167,25 @@ build_x_unary_op (code, xarg) } if (code == ADDR_EXPR) { + /* A pointer to member-function can be formed only by saying + &X::mf. */ + if (!flag_ms_extensions && TREE_CODE (TREE_TYPE (xarg)) == METHOD_TYPE + && (TREE_CODE (xarg) != OFFSET_REF || !PTRMEM_OK_P (xarg))) + { + if (TREE_CODE (xarg) != OFFSET_REF) + { + error ("invalid use of '%E' to form a pointer-to-member-function. Use a qualified-id.", + xarg); + return error_mark_node; + } + else + { + error ("parenthesis around '%E' cannot be used to form a pointer-to-member-function", + xarg); + PTRMEM_OK_P (xarg) = 1; + } + } + if (TREE_CODE (xarg) == OFFSET_REF) { ptrmem = PTRMEM_OK_P (xarg); diff --git a/contrib/gcc/cp/typeck2.c b/contrib/gcc/cp/typeck2.c index d3febeb..f8e612b 100644 --- a/contrib/gcc/cp/typeck2.c +++ b/contrib/gcc/cp/typeck2.c @@ -863,8 +863,7 @@ process_init_constructor (type, init, elts) { if (TREE_READONLY (field)) error ("uninitialized const member `%D'", field); - else if (TYPE_LANG_SPECIFIC (TREE_TYPE (field)) - && CLASSTYPE_READONLY_FIELDS_NEED_INIT (TREE_TYPE (field))) + else if (CLASSTYPE_READONLY_FIELDS_NEED_INIT (TREE_TYPE (field))) error ("member `%D' with uninitialized const fields", field); else if (TREE_CODE (TREE_TYPE (field)) == REFERENCE_TYPE) @@ -976,6 +975,8 @@ process_init_constructor (type, init, elts) return error_mark_node; result = build (CONSTRUCTOR, type, NULL_TREE, nreverse (members)); + if (TREE_CODE (type) == ARRAY_TYPE && TYPE_DOMAIN (type) == NULL_TREE) + complete_array_type (type, result, /*do_default=*/0); if (init) TREE_HAS_CONSTRUCTOR (result) = TREE_HAS_CONSTRUCTOR (init); if (allconstant) TREE_CONSTANT (result) = 1; diff --git a/contrib/gcc/doc/compat.texi b/contrib/gcc/doc/compat.texi index 3e4ef89..3c2931b 100644 --- a/contrib/gcc/doc/compat.texi +++ b/contrib/gcc/doc/compat.texi @@ -113,3 +113,44 @@ interpretations of the C++ ABI by different vendors, bugs in the ABI, or bugs in the implementation of the ABI in different compilers. GCC's @code{-Wabi} switch warns when G++ generates code that is probably not compatible with the C++ ABI@. + +The C++ library used with a C++ compiler includes the Standard C++ +Library, with functionality defined in the C++ Standard, plus language +runtime support. The runtime support is included in a C++ ABI, but there +is no formal ABI for the Standard C++ Library. Two implementations +of that library are interoperable if one follows the de-facto ABI of the +other and if they are both built with the same compiler, or with compilers +that conform to the same ABI for C++ compiler and runtime support. + +When G++ and another C++ compiler conform to the same C++ ABI, but the +implementations of the Standard C++ Library that they normally use do not +follow the same ABI for the Standard C++ Library, object files built with +those compilers can be used in the same program only if they use the same +C++ library. This requires specifying the location of the C++ library +header files when invoking the compiler whose usual library is not being +used. The location of GCC's C++ header files depends on how the GCC +build was configured, but can be seen by using the G++ @option{-v} option. +With default configuration options for G++ 3.2 the compile line for a +different C++ compiler needs to include + +@example + -I@var{gcc_install_directory}/include/c++/3.2 +@end example + +Similarly, compiling code with G++ that must use a C++ library other +than the GNU C++ library requires specifying the location of the header +files for that other library. + +The most straightforward way to link a program to use a particular +C++ library is to use a C++ driver that specifies that C++ library by +default. The @command{g++} driver, for example, tells the linker where +to find GCC's C++ library (@file{libstdc++}) plus the other libraries +and startup files it needs, in the proper order. + +If a program must use a different C++ library and it's not possible +to do the final link using a C++ driver that uses that library by default, +it is necessary to tell @command{g++} the location and name of that +library. It might also be necessary to specify different startup files +and other runtime support libraries, and to suppress the use of GCC's +support libraries with one or more of the options @option{-nostdlib}, +@option{-nostartfiles}, and @option{-nodefaultlibs}. diff --git a/contrib/gcc/doc/contrib.texi b/contrib/gcc/doc/contrib.texi index d1a7363..8cafaeb 100644 --- a/contrib/gcc/doc/contrib.texi +++ b/contrib/gcc/doc/contrib.texi @@ -14,10 +14,6 @@ in this list are accidental. Feel free to contact or some of your contributions are not listed. Please keep this list in alphabetical order. -Some projects operating under the GCC project maintain their own list -of contributors, such as -@uref{http://gcc.gnu.org/libstdc++/,the C++ library}. - @itemize @bullet @item @@ -25,7 +21,8 @@ Analog Devices helped implement the support for complex data types and iterators. @item -John David Anglin for improvements to libstdc++-v3 and the HP-UX port. +John David Anglin for threading-related fixes and improvements to +libstdc++-v3, and the HP-UX port. @item James van Artsdalen wrote the code that makes efficient use of @@ -38,15 +35,35 @@ Alasdair Baird for various bugfixes. Gerald Baumgartner added the signature extension to the C++ front end. @item +Godmar Back for his Java improvements and encouragement. + +@item +Scott Bambrough for help porting the Java compiler. + +@item +Jon Beniston for his Win32 port of Java. + +@item +Geoff Berry for his Java object serialization work and various patches. + +@item +Eric Blake for helping to make GCJ and libgcj conform to the +specifications. + +@item +Hans-J. Boehm for his @uref{http://www.hpl.hp.com/personal/Hans_Boehm/gc/,, +garbage collector}, IA-64 libffi port, and other Java work. + +@item Neil Booth for work on cpplib, lang hooks, debug hooks and other miscellaneous clean-ups. @item Per Bothner for his direction via the steering committee and various improvements to our infrastructure for supporting new languages. Chill -and Java front end implementations. Initial implementations of -cpplib, fix-header, config.guess, libio, and past C++ library -(libg++) maintainer. +front end implementation. Initial implementations of +cpplib, fix-header, config.guess, libio, and past C++ library (libg++) +maintainer. Dreaming up, designing and implementing much of GCJ. @item Devon Bowen helped port GCC to the Tahoe. @@ -67,31 +84,55 @@ Christian Bruel for improvements to local store elimination. Herman A.J. ten Brugge for various fixes. @item +Joerg Brunsmann for Java compiler hacking and help with the GCJ FAQ. + +@item Joe Buck for his direction via the steering committee. @item Craig Burley for leadership of the Fortran effort. @item -Paolo Carlini for his work on libstdc++-v3. +Stephan Buys for contributing Doxygen notes for libstdc++. + +@item +Paolo Carlini for libstdc++ work: lots of efficiency improvements to +the string class, hard detective work on the frustrating localization +issues, and keeping up with the problem reports. @item John Carr for his alias work, SPARC hacking, infrastructure improvements, previous contributions to the steering committee, loop optimizations, etc. @item -Steve Chamberlain wrote the support for the Hitachi SH and H8 processors -and the PicoJava processor. +Steve Chamberlain for support for the Hitachi SH and H8 processors +and the PicoJava processor, and for GCJ config fixes. + +@item +Glenn Chambers for help with the GCJ FAQ. + +@item +John-Marc Chandonia for various libgcj patches. @item Scott Christley for his Objective-C contributions. @item +Eric Christopher for his Java porting help and clean-ups. + +@item Branko Cibej for more warning contributions. @item -Nick Clifton for arm, mcore, fr30, v850, m32r work, @option{--help}, and other random -hacking. +The @uref{http://www.classpath.org,,GNU Classpath project} +for all of their merged runtime code. + +@item +Nick Clifton for arm, mcore, fr30, v850, m32r work, @option{--help}, and +other random hacking. + +@item +Michael Cook for libstdc++ cleanup patches to reduce warnings. @item Ralf Corsepius for SH testing and minor bugfixing. @@ -111,22 +152,51 @@ Dario Dariol contributed the four varieties of sample programs that print a copy of their source. @item -Ulrich Drepper for his work on the C++ runtime libraries, glibc, - testing of GCC using glibc, ISO C99 support, CFG dumping support, etc. +Russell Davidson for fstream and stringstream fixes in libstdc++. + +@item +Mo DeJong for GCJ and libgcj bug fixes. + +@item +Gabriel Dos Reis for contributions to g++, contributions and +maintenance of GCC diagnostics infrastructure, libstdc++-v3, +including valarray<>, complex<>, maintaining the numerics library +(including that pesky <limits> :-) and keeping up-to-date anything +to do with numbers. + +@item +Ulrich Drepper for his work on glibc, testing of GCC using glibc, ISO C99 +support, CFG dumping support, etc., plus support of the C++ runtime +libraries including for all kinds of C interface issues, contributing and +maintaining complex<>, sanity checking and disbursement, configuration +architecture, libio maintenance, and early math work. @item Richard Earnshaw for his ongoing work with the ARM@. @item -David Edelsohn for his direction via the steering committee, -ongoing work with the RS6000/PowerPC port, and help cleaning up Haifa -loop changes. +David Edelsohn for his direction via the steering committee, ongoing work +with the RS6000/PowerPC port, help cleaning up Haifa loop changes, and +for doing the entire AIX port of libstdc++ with his bare hands. + +@item +Kevin Ediger for the floating point formatting of num_put::do_put in +libstdc++. + +@item +Phil Edwards for libstdc++ work including configuration hackery, +documentation maintainer, chief breaker of the web pages, the occasional +iostream bugfix, and work on shared library symbol versioning. @item Paul Eggert for random hacking all over GCC@. @item -Mark Elbrecht for various DJGPP improvements. +Mark Elbrecht for various DJGPP improvements, and for libstdc++ +configuration support for locales and fstream-related fixes. + +@item +Vadim Egorov for libstdc++ fixes in strings, streambufs, and iostreams. @item Ben Elliston for his work to move the Objective-C runtime into its @@ -143,6 +213,9 @@ and SPARC work. Fred Fish for BeOS support and Ada fixes. @item +Ivan Fontes Garcia for the Portugese translation of the GCJ FAQ. + +@item Peter Gerwinski for various bugfixes and the Pascal front end. @item @@ -150,6 +223,9 @@ Kaveh Ghazi for his direction via the steering committee and amazing work to make @samp{-W -Wall} useful. @item +John Gilmore for a donation to the FSF earmarked improving GNU Java. + +@item Judy Goldberg for c++ contributions. @item @@ -162,6 +238,9 @@ via the steering committee. Anthony Green for his @option{-Os} contributions and Java front end work. @item +Stu Grossman for gdb hacking, allowing GCJ developers to debug our code. + +@item Michael K. Gschwind contributed the port to the PDP-11. @item @@ -175,7 +254,7 @@ Bruno Haible for improvements in the runtime overhead for EH, new warnings and assorted bugfixes. @item -Andrew Haley for his Java work. +Andrew Haley for his amazing Java compiler and library efforts. @item Chris Hanson assisted in making GCC work on HP-UX for the 9000 series 300. @@ -222,7 +301,8 @@ Andreas Jaeger for various fixes to the MIPS port @item Jakub Jelinek for his SPARC work and sibling call optimizations as well -as lots of bug fixes and test cases. +as lots of bug fixes and test cases, and for improving the Java build +system. @item Janis Johnson for ia64 testing and fixes and for her quality improvement @@ -232,17 +312,29 @@ sidetracks. J. Kean Johnston for OpenServer support. @item +Tim Josling for the sample language treelang based originally on Richard +Kenner's "``toy'' language". + +@item +Nicolai Josuttis for additional libstdc++ documentation. + +@item Klaus Kaempf for his ongoing work to make alpha-vms a viable target. @item David Kashtan of SRI adapted GCC to VMS@. @item +Ryszard Kabatek for many, many libstdc++ bugfixes and optimizations of +strings, especially member functions, and for auto_ptr fixes. + +@item Geoffrey Keating for his ongoing work to make the PPC work for GNU/Linux and his automatic regression tester. @item -Brendan Kehoe for his ongoing work with g++. +Brendan Kehoe for his ongoing work with g++ and for a lot of early work +in just about every part of libstdc++. @item Oliver M. Kellogg of Deutsche Aerospace contributed the port to the @@ -260,8 +352,9 @@ elimination and delay slot scheduling. Richard Kenner was also the head maintainer of GCC for several years. @item -Mumit Khan for various contributions to the cygwin and mingw32 ports and -maintaining binary releases for Windows hosts. +Mumit Khan for various contributions to the Cygwin and Mingw32 ports and +maintaining binary releases for Windows hosts, and for massive libstdc++ +porting work to Cygwin/Mingw32. @item Robin Kirkham for cpu32 support. @@ -299,13 +392,17 @@ Ted Lemon wrote parts of the RTL reader and printer. Kriang Lerdsuwanakij for improvements to demangler and various c++ fixes. @item -Warren Levy major work on libgcj (Java Runtime Library) and random -work on the Java front end. +Warren Levy for tremendous work on libgcj (Java Runtime Library) and +random work on the Java front end. @item Alain Lichnewsky ported GCC to the MIPS CPU. @item +Oskar Liljeblad for hacking on AWT and his many Java bug reports and +patches. + +@item Robert Lipe for OpenServer support, new testsuites, testing, etc. @item @@ -317,7 +414,8 @@ runtime libraries. @item Martin von L@"owis for internal consistency checking infrastructure, -and various C++ improvements including namespace support. +various C++ improvements including namespace support, and tons of +assistance with libstdc++/compiler merges. @item H.J. Lu for his previous contributions to the steering committee, many x86 @@ -331,14 +429,30 @@ Andrew MacLeod for his ongoing work in building a real EH system, various code generation improvements, work on the global optimizer, etc. @item -Vladimir Makarov for hacking some ugly i960 problems, PowerPC -hacking improvements to compile-time performance and overall knowledge -and direction in the area of instruction scheduling. +Vladimir Makarov for hacking some ugly i960 problems, PowerPC hacking +improvements to compile-time performance, overall knowledge and +direction in the area of instruction scheduling, and design and +implementation of the automaton based instruction scheduler. @item Bob Manson for his behind the scenes work on dejagnu. @item +Philip Martin for lots of libstdc++ string and vector iterator fixes and +improvements, and string clean up and testsuites. + +@item +All of the Mauve project +@uref{http://sources.redhat.com/cgi-bin/cvsweb.cgi/~checkout~/mauve/THANKS?rev=1.2&cvsroot=mauve&only_with_tag=HEAD,,contributors}, +for Java test code. + +@item +Bryce McKinlay for numerous GCJ and libgcj fixes and improvements. + +@item +Adam Megacz for his work on the Win32 port of GCJ. + +@item Michael Meissner for LRS framework, ia32, m32r, v850, m88k, MIPS, powerpc, haifa, ECOFF debug support, and other assorted hacking. @@ -355,6 +469,10 @@ developers. Gary Miller ported GCC to Charles River Data Systems machines. @item +Alfred Minarik for libstdc++ string and ios bugfixes, and turning the +entire libstdc++ testsuite namespace-compatible. + +@item Mark Mitchell for his direction via the steering committee, mountains of C++ work, load/store hoisting out of loops, alias analysis improvements, ISO C @code{restrict} support, and serving as release manager for GCC 3.x. @@ -369,7 +487,8 @@ maintenance, and his ongoing work to make us make Fortran run fast. @item Jason Molenda for major help in the care and feeding of all the services on the gcc.gnu.org (formerly egcs.cygnus.com) machine---mail, web -services, ftp services, etc etc. +services, ftp services, etc etc. Doing all this work on scrap paper and +the backs of envelopes would have been... difficult. @item Catherine Moore for fixing various ugly problems we have sent her @@ -377,6 +496,9 @@ way, including the haifa bug which was killing the Alpha & PowerPC Linux kernels. @item +Mike Moreton for his various Java patches. + +@item David Mosberger-Tang for various Alpha improvements. @item @@ -395,7 +517,14 @@ Joseph S. Myers for his work on the PDP-11 port, format checking and ISO C99 support, and continuous emphasis on (and contributions to) documentation. @item -Nathan Myers for his work on libstdc++-v3. +Nathan Myers for his work on libstdc++-v3: architecture and authorship +through the first three snapshots, including implementation of locale +infrastructure, string, shadow C headers, and the initial project +documentation (DESIGN, CHECKLIST, and so forth). Later, more work on +MT-safe string and shadow headers. + +@item +Felix Natter for documentation on porting libstdc++. @item NeXT, Inc.@: donated the front end that supports the Objective-C @@ -415,20 +544,22 @@ improvements. @item Alexandre Oliva for various build infrastructure improvements, scripts and -amazing testing work. +amazing testing work, including keeping libtool issues sane and happy. @item Melissa O'Neill for various NeXT fixes. @item Rainer Orth for random MIPS work, including improvements to our o32 -ABI support, improvements to dejagnu's MIPS support, etc. +ABI support, improvements to dejagnu's MIPS support, Java configuration +clean-ups and porting work, etc. @item Paul Petersen wrote the machine description for the Alliant FX/8. @item -Alexandre Petit-Bianco for his Java work. +Alexandre Petit-Bianco for implementing much of the Java compiler and +continued Java maintainership. @item Matthias Pfaller for major improvements to the NS32k port. @@ -447,19 +578,20 @@ Ken Raeburn for various improvements to checker, MIPS ports and various cleanups in the compiler. @item -David Reese of Sun Microsystems contributed to the Solaris on PowerPC -port. +Rolf W. Rasmussen for hacking on AWT. @item -Gabriel Dos Reis for contributions and maintenance of libstdc++-v3, -including valarray implementation and limits support. +David Reese of Sun Microsystems contributed to the Solaris on PowerPC +port. @item Joern Rennecke for maintaining the sh port, loop, regmove & reload hacking. @item -Loren J. Rittle for improvements to libstdc++-v3 and the FreeBSD port. +Loren J. Rittle for improvements to libstdc++-v3 including the FreeBSD +port, threading fixes, thread-related configury changes, critical +threading documentation, and solutions to really tricky I/O problems. @item Craig Rodrigues for processing tons of bug reports. @@ -474,12 +606,19 @@ Ken Rose for fixes to our delay slot filling code. Paul Rubin wrote most of the preprocessor. @item +Chip Salzenberg for libstdc++ patches and improvements to locales, traits, +Makefiles, libio, libtool hackery, and ``long long'' support. + +@item Juha Sarlin for improvements to the H8 code generator. @item Greg Satz assisted in making GCC work on HP-UX for the 9000 series 300. @item +Bradley Schatz for his work on the GCJ FAQ. + +@item Peter Schauer wrote the code to allow debugging to work on the Alpha. @item @@ -491,6 +630,14 @@ work in the reload pass as well a serving as release manager for GCC 2.95.3. @item +Peter Schmid for constant testing of libstdc++ -- especially application +testing, going above and beyond what was requested for the release +criteria -- and libstdc++ header file tweaks. + +@item +Jason Schroeder for jcf-dump patches. + +@item Andreas Schwab for his work on the m68k port. @item @@ -506,6 +653,10 @@ code which handles the parse tree and RTL data structures, constant folding and help with the original VAX & m68k ports. @item +Kenny Simpson for prompting libstdc++ fixes due to defect reports from +the LWG (thereby keeping us in line with updates from the ISO). + +@item Franz Sirl for his ongoing work with making the PPC port stable for linux. @@ -519,7 +670,11 @@ Christopher Smith did the port for Convex machines. Randy Smith finished the Sun FPA support. @item -Scott Snyder for various fixes. +Scott Snyder for queue, iterator, istream, and string fixes and libstdc++ +testsuite entries. + +@item +Brad Spencer for contributions to the GLIBCPP_FORCE_NEW technique. @item Richard Stallman, for writing the original gcc and launching the GNU project. @@ -538,10 +693,16 @@ Jonathan Stone wrote the machine description for the Pyramid computer. Graham Stott for various infrastructure improvements. @item +John Stracke for his Java HTTP protocol fixes. + +@item Mike Stump for his Elxsi port, g++ contributions over the years and more recently his vxworks contributions @item +Jeff Sturm for Java porting help, bug fixes, and encouragement. + +@item Shigeya Suzuki for this fixes for the bsdi platforms. @item @@ -558,8 +719,11 @@ Gary Thomas for his ongoing work to make the PPC work for GNU/Linux. Philipp Thomas for random bugfixes throughout the compiler @item +Jason Thorpe for thread support in libstdc++ on NetBSD. + +@item Kresten Krab Thorup wrote the run time support for the Objective-C -language. +language and the fantastic Java bytecode interpreter. @item Michael Tiemann for random bugfixes, the first instruction scheduler, @@ -567,6 +731,9 @@ initial C++ support, function integration, NS32k, SPARC and M88k machine description work, delay slot scheduling. @item +Andreas Tobler for his work porting libgcj to Darwin. + +@item Teemu Torma for thread safe exception handling support. @item @@ -574,16 +741,28 @@ Leonard Tower wrote parts of the parser, RTL generator, and RTL definitions, and of the VAX machine description. @item -Tom Tromey for internationalization support and his Java work. +Tom Tromey for internationalization support and for his many Java +contributions and libgcj maintainership. @item Lassi Tuura for improvements to config.guess to determine HP processor types. @item +Petter Urkedal for libstdc++ CXXFLAGS, math, and algorithms fixes. + +@item +Brent Verner for work with the libstdc++ cshadow files and their +associated configure steps. + +@item Todd Vierling for contributions for NetBSD ports. @item +Jonathan Wakely for contributing libstdc++ Doxygen notes and XHTML +guidance. + +@item Dean Wakerley for converting the install documentation from HTML to texinfo in time for GCC 3.0. @@ -591,6 +770,11 @@ in time for GCC 3.0. Krister Walfridsson for random bugfixes. @item +Stephen M. Webb for time and effort on making libstdc++ shadow files +work with the tricky Solaris 8+ headers, and for pushing the build-time +header tree. + +@item John Wehle for various improvements for the x86 code generator, related infrastructure improvements to help x86 code generation, value range propagation and other work, WE32k port. @@ -599,6 +783,16 @@ value range propagation and other work, WE32k port. Zack Weinberg for major work on cpplib and various other bugfixes. @item +Matt Welsh for help with Linux Threads support in GCJ. + +@item +Urban Widmark for help fixing java.io. + +@item +Mark Wielaard for new Java library code and his work integrating with +Classpath. + +@item Dale Wiles helped port GCC to the Tahoe. @item @@ -622,6 +816,9 @@ description for the Tron architecture (specifically, the Gmicro). @item Kevin Zachmann helped ported GCC to the Tahoe. +@item +Gilles Zunino for help porting Java to Irix. + @end itemize @@ -630,12 +827,36 @@ testing GCC: @itemize @bullet @item +Michael Abd-El-Malek + +@item +Thomas Arend + +@item +Bonzo Armstrong + +@item +Steven Ashe + +@item +Chris Baldwin + +@item David Billinghurst @item +Jim Blandy + +@item +Stephane Bortzmeyer + +@item Horst von Brand @item +Frank Braun + +@item Rodney Brown @item @@ -645,39 +866,111 @@ Joe Buck Craig Burley @item +Sidney Cadot + +@item +Bradford Castalia + +@item +Ralph Doncaster + +@item Ulrich Drepper @item David Edelsohn @item +Richard Emberson + +@item +Levente Farkas + +@item +Graham Fawcett + +@item +Robert A. French + +@item +J@"orgen Freyh + +@item +Mark K. Gardner + +@item +Charles-Antoine Gauthier + +@item Yung Shing Gene @item Kaveh Ghazi @item +David Gilbert + +@item +Simon Gornall + +@item +Fred Gray + +@item +John Griffin + +@item +Patrik Hagglund + +@item +Phil Hargett + +@item +Amancio Hasty + +@item +Bryan W. Headley + +@item Kate Hedstrom @item Richard Henderson @item +Kevin B. Hendricks + +@item Manfred Hollstein @item Kamil Iskra @item +Joep Jansen + +@item Christian Joensson @item +David Kidd + +@item +Tobias Kuipers + +@item +Anand Krishnaswamy + +@item Jeff Law @item Robert Lipe @item +llewelly + +@item Damon Love @item @@ -699,27 +992,63 @@ Matthias Klose Martin Knoblauch @item +Jesse Macnish + +@item David Miller @item Toon Moene @item +Stefan Morrell + +@item +Anon A. Mous + +@item Matthias Mueller @item +Pekka Nikander + +@item Alexandre Oliva @item +Jon Olson + +@item +Magnus Persson + +@item +Chris Pollard + +@item Richard Polton @item David Rees @item +Paul Reilly + +@item +Tom Reilly + +@item Loren J. Rittle @item +Torsten Rueger + +@item +Danny Sadinoff + +@item +Marc Schifer + +@item Peter Schmid @item @@ -732,12 +1061,27 @@ Vin Shelton Franz Sirl @item +Tim Souder + +@item Mike Stump @item +Adam Sulmicki + +@item +George Talbot + +@item +Gregory Warnes + +@item Carlo Wood @item +David E. Young + +@item And many others @end itemize diff --git a/contrib/gcc/doc/cpp.1 b/contrib/gcc/doc/cpp.1 new file mode 100644 index 0000000..8774771 --- /dev/null +++ b/contrib/gcc/doc/cpp.1 @@ -0,0 +1,817 @@ +.\" Automatically generated by Pod::Man version 1.15 +.\" Tue Nov 19 18:17:13 2002 +.\" +.\" Standard preamble: +.\" ====================================================================== +.de Sh \" Subsection heading +.br +.if t .Sp +.ne 5 +.PP +\fB\\$1\fR +.PP +.. +.de Sp \" Vertical space (when we can't use .PP) +.if t .sp .5v +.if n .sp +.. +.de Ip \" List item +.br +.ie \\n(.$>=3 .ne \\$3 +.el .ne 3 +.IP "\\$1" \\$2 +.. +.de Vb \" Begin verbatim text +.ft CW +.nf +.ne \\$1 +.. +.de Ve \" End verbatim text +.ft R + +.fi +.. +.\" Set up some character translations and predefined strings. \*(-- will +.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left +.\" double quote, and \*(R" will give a right double quote. | will give a +.\" real vertical bar. \*(C+ will give a nicer C++. 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It is called a macro processor because it allows +you to define \fImacros\fR, which are brief abbreviations for longer +constructs. +.PP +The C preprocessor is intended to be used only with C, \*(C+, and +Objective-C source code. In the past, it has been abused as a general +text processor. It will choke on input which does not obey C's lexical +rules. For example, apostrophes will be interpreted as the beginning of +character constants, and cause errors. Also, you cannot rely on it +preserving characteristics of the input which are not significant to +C-family languages. If a Makefile is preprocessed, all the hard tabs +will be removed, and the Makefile will not work. +.PP +Having said that, you can often get away with using cpp on things which +are not C. Other Algol-ish programming languages are often safe +(Pascal, Ada, etc.) So is assembly, with caution. \fB\-traditional\fR +mode preserves more white space, and is otherwise more permissive. Many +of the problems can be avoided by writing C or \*(C+ style comments +instead of native language comments, and keeping macros simple. +.PP +Wherever possible, you should use a preprocessor geared to the language +you are writing in. Modern versions of the \s-1GNU\s0 assembler have macro +facilities. Most high level programming languages have their own +conditional compilation and inclusion mechanism. If all else fails, +try a true general text processor, such as \s-1GNU\s0 M4. +.PP +C preprocessors vary in some details. This manual discusses the \s-1GNU\s0 C +preprocessor, which provides a small superset of the features of \s-1ISO\s0 +Standard C. In its default mode, the \s-1GNU\s0 C preprocessor does not do a +few things required by the standard. These are features which are +rarely, if ever, used, and may cause surprising changes to the meaning +of a program which does not expect them. To get strict \s-1ISO\s0 Standard C, +you should use the \fB\-std=c89\fR or \fB\-std=c99\fR options, depending +on which version of the standard you want. To get all the mandatory +diagnostics, you must also use \fB\-pedantic\fR. +.SH "OPTIONS" +.IX Header "OPTIONS" +The C preprocessor expects two file names as arguments, \fIinfile\fR and +\&\fIoutfile\fR. The preprocessor reads \fIinfile\fR together with any +other files it specifies with \fB#include\fR. All the output generated +by the combined input files is written in \fIoutfile\fR. +.PP +Either \fIinfile\fR or \fIoutfile\fR may be \fB-\fR, which as +\&\fIinfile\fR means to read from standard input and as \fIoutfile\fR +means to write to standard output. Also, if either file is omitted, it +means the same as if \fB-\fR had been specified for that file. +.PP +Unless otherwise noted, or the option ends in \fB=\fR, all options +which take an argument may have that argument appear either immediately +after the option, or with a space between option and argument: +\&\fB\-Ifoo\fR and \fB\-I foo\fR have the same effect. +.PP +Many options have multi-letter names; therefore multiple single-letter +options may \fInot\fR be grouped: \fB\-dM\fR is very different from +\&\fB\-d\ \-M\fR. +.Ip "\fB\-D\fR \fIname\fR" 4 +.IX Item "-D name" +Predefine \fIname\fR as a macro, with definition \f(CW\*(C`1\*(C'\fR. +.Ip "\fB\-D\fR \fIname\fR\fB=\fR\fIdefinition\fR" 4 +.IX Item "-D name=definition" +Predefine \fIname\fR as a macro, with definition \fIdefinition\fR. +There are no restrictions on the contents of \fIdefinition\fR, but if +you are invoking the preprocessor from a shell or shell-like program you +may need to use the shell's quoting syntax to protect characters such as +spaces that have a meaning in the shell syntax. +.Sp +If you wish to define a function-like macro on the command line, write +its argument list with surrounding parentheses before the equals sign +(if any). Parentheses are meaningful to most shells, so you will need +to quote the option. With \fBsh\fR and \fBcsh\fR, +\&\fB\-D'\fR\fIname\fR\fB(\fR\fIargs...\fR\fB)=\fR\fIdefinition\fR\fB'\fR works. +.Sp +\&\fB\-D\fR and \fB\-U\fR options are processed in the order they +are given on the command line. All \fB\-imacros\fR \fIfile\fR and +\&\fB\-include\fR \fIfile\fR options are processed after all +\&\fB\-D\fR and \fB\-U\fR options. +.Ip "\fB\-U\fR \fIname\fR" 4 +.IX Item "-U name" +Cancel any previous definition of \fIname\fR, either built in or +provided with a \fB\-D\fR option. +.Ip "\fB\-undef\fR" 4 +.IX Item "-undef" +Do not predefine any system-specific macros. The common predefined +macros remain defined. +.Ip "\fB\-I\fR \fIdir\fR" 4 +.IX Item "-I dir" +Add the directory \fIdir\fR to the list of directories to be searched +for header files. +.Sp +Directories named by \fB\-I\fR are searched before the standard +system include directories. +.Sp +It is dangerous to specify a standard system include directory in an +\&\fB\-I\fR option. This defeats the special treatment of system +headers +\&. It can also defeat the repairs to buggy system headers which \s-1GCC\s0 +makes when it is installed. +.Ip "\fB\-o\fR \fIfile\fR" 4 +.IX Item "-o file" +Write output to \fIfile\fR. This is the same as specifying \fIfile\fR +as the second non-option argument to \fBcpp\fR. \fBgcc\fR has a +different interpretation of a second non-option argument, so you must +use \fB\-o\fR to specify the output file. +.Ip "\fB\-Wall\fR" 4 +.IX Item "-Wall" +Turns on all optional warnings which are desirable for normal code. At +present this is \fB\-Wcomment\fR and \fB\-Wtrigraphs\fR. Note that +many of the preprocessor's warnings are on by default and have no +options to control them. +.Ip "\fB\-Wcomment\fR" 4 +.IX Item "-Wcomment" +.PD 0 +.Ip "\fB\-Wcomments\fR" 4 +.IX Item "-Wcomments" +.PD +Warn whenever a comment-start sequence \fB/*\fR appears in a \fB/*\fR +comment, or whenever a backslash-newline appears in a \fB//\fR comment. +(Both forms have the same effect.) +.Ip "\fB\-Wtrigraphs\fR" 4 +.IX Item "-Wtrigraphs" +Warn if any trigraphs are encountered. This option used to take effect +only if \fB\-trigraphs\fR was also specified, but now works +independently. Warnings are not given for trigraphs within comments, as +they do not affect the meaning of the program. +.Ip "\fB\-Wtraditional\fR" 4 +.IX Item "-Wtraditional" +Warn about certain constructs that behave differently in traditional and +\&\s-1ISO\s0 C. Also warn about \s-1ISO\s0 C constructs that have no traditional C +equivalent, and problematic constructs which should be avoided. +.Ip "\fB\-Wimport\fR" 4 +.IX Item "-Wimport" +Warn the first time \fB#import\fR is used. +.Ip "\fB\-Wundef\fR" 4 +.IX Item "-Wundef" +Warn whenever an identifier which is not a macro is encountered in an +\&\fB#if\fR directive, outside of \fBdefined\fR. Such identifiers are +replaced with zero. +.Ip "\fB\-Werror\fR" 4 +.IX Item "-Werror" +Make all warnings into hard errors. Source code which triggers warnings +will be rejected. +.Ip "\fB\-Wsystem-headers\fR" 4 +.IX Item "-Wsystem-headers" +Issue warnings for code in system headers. These are normally unhelpful +in finding bugs in your own code, therefore suppressed. If you are +responsible for the system library, you may want to see them. +.Ip "\fB\-w\fR" 4 +.IX Item "-w" +Suppress all warnings, including those which \s-1GNU\s0 \s-1CPP\s0 issues by default. +.Ip "\fB\-pedantic\fR" 4 +.IX Item "-pedantic" +Issue all the mandatory diagnostics listed in the C standard. Some of +them are left out by default, since they trigger frequently on harmless +code. +.Ip "\fB\-pedantic-errors\fR" 4 +.IX Item "-pedantic-errors" +Issue all the mandatory diagnostics, and make all mandatory diagnostics +into errors. This includes mandatory diagnostics that \s-1GCC\s0 issues +without \fB\-pedantic\fR but treats as warnings. +.Ip "\fB\-M\fR" 4 +.IX Item "-M" +Instead of outputting the result of preprocessing, output a rule +suitable for \fBmake\fR describing the dependencies of the main +source file. The preprocessor outputs one \fBmake\fR rule containing +the object file name for that source file, a colon, and the names of all +the included files, including those coming from \fB\-include\fR or +\&\fB\-imacros\fR command line options. +.Sp +Unless specified explicitly (with \fB\-MT\fR or \fB\-MQ\fR), the +object file name consists of the basename of the source file with any +suffix replaced with object file suffix. If there are many included +files then the rule is split into several lines using \fB\e\fR\-newline. +The rule has no commands. +.Sp +This option does not suppress the preprocessor's debug output, such as +\&\fB\-dM\fR. To avoid mixing such debug output with the dependency +rules you should explicitly specify the dependency output file with +\&\fB\-MF\fR, or use an environment variable like +\&\fB\s-1DEPENDENCIES_OUTPUT\s0\fR. Debug output +will still be sent to the regular output stream as normal. +.Sp +Passing \fB\-M\fR to the driver implies \fB\-E\fR. +.Ip "\fB\-MM\fR" 4 +.IX Item "-MM" +Like \fB\-M\fR but do not mention header files that are found in +system header directories, nor header files that are included, +directly or indirectly, from such a header. +.Sp +This implies that the choice of angle brackets or double quotes in an +\&\fB#include\fR directive does not in itself determine whether that +header will appear in \fB\-MM\fR dependency output. This is a +slight change in semantics from \s-1GCC\s0 versions 3.0 and earlier. +.Ip "\fB\-MF\fR \fIfile\fR" 4 +.IX Item "-MF file" +@anchor{\-MF} +When used with \fB\-M\fR or \fB\-MM\fR, specifies a +file to write the dependencies to. If no \fB\-MF\fR switch is given +the preprocessor sends the rules to the same place it would have sent +preprocessed output. +.Sp +When used with the driver options \fB\-MD\fR or \fB\-MMD\fR, +\&\fB\-MF\fR overrides the default dependency output file. +.Ip "\fB\-MG\fR" 4 +.IX Item "-MG" +When used with \fB\-M\fR or \fB\-MM\fR, \fB\-MG\fR says to treat missing +header files as generated files and assume they live in the same +directory as the source file. It suppresses preprocessed output, as a +missing header file is ordinarily an error. +.Sp +This feature is used in automatic updating of makefiles. +.Ip "\fB\-MP\fR" 4 +.IX Item "-MP" +This option instructs \s-1CPP\s0 to add a phony target for each dependency +other than the main file, causing each to depend on nothing. These +dummy rules work around errors \fBmake\fR gives if you remove header +files without updating the \fIMakefile\fR to match. +.Sp +This is typical output: +.Sp +.Vb 1 +\& test.o: test.c test.h +.Ve +.Vb 1 +\& test.h: +.Ve +.Ip "\fB\-MT\fR \fItarget\fR" 4 +.IX Item "-MT target" +Change the target of the rule emitted by dependency generation. By +default \s-1CPP\s0 takes the name of the main input file, including any path, +deletes any file suffix such as \fB.c\fR, and appends the platform's +usual object suffix. The result is the target. +.Sp +An \fB\-MT\fR option will set the target to be exactly the string you +specify. If you want multiple targets, you can specify them as a single +argument to \fB\-MT\fR, or use multiple \fB\-MT\fR options. +.Sp +For example, \fB\-MT\ '$(objpfx)foo.o'\fR might give +.Sp +.Vb 1 +\& $(objpfx)foo.o: foo.c +.Ve +.Ip "\fB\-MQ\fR \fItarget\fR" 4 +.IX Item "-MQ target" +Same as \fB\-MT\fR, but it quotes any characters which are special to +Make. \fB\-MQ\ '$(objpfx)foo.o'\fR gives +.Sp +.Vb 1 +\& $$(objpfx)foo.o: foo.c +.Ve +The default target is automatically quoted, as if it were given with +\&\fB\-MQ\fR. +.Ip "\fB\-MD\fR" 4 +.IX Item "-MD" +\&\fB\-MD\fR is equivalent to \fB\-M \-MF\fR \fIfile\fR, except that +\&\fB\-E\fR is not implied. The driver determines \fIfile\fR based on +whether an \fB\-o\fR option is given. If it is, the driver uses its +argument but with a suffix of \fI.d\fR, otherwise it take the +basename of the input file and applies a \fI.d\fR suffix. +.Sp +If \fB\-MD\fR is used in conjunction with \fB\-E\fR, any +\&\fB\-o\fR switch is understood to specify the dependency output file +(but \f(CW@pxref\fR{\-MF}), but if used without \fB\-E\fR, each \fB\-o\fR +is understood to specify a target object file. +.Sp +Since \fB\-E\fR is not implied, \fB\-MD\fR can be used to generate +a dependency output file as a side-effect of the compilation process. +.Ip "\fB\-MMD\fR" 4 +.IX Item "-MMD" +Like \fB\-MD\fR except mention only user header files, not system +\&\-header files. +.Ip "\fB\-x c\fR" 4 +.IX Item "-x c" +.PD 0 +.Ip "\fB\-x c++\fR" 4 +.IX Item "-x c++" +.Ip "\fB\-x objective-c\fR" 4 +.IX Item "-x objective-c" +.Ip "\fB\-x assembler-with-cpp\fR" 4 +.IX Item "-x assembler-with-cpp" +.PD +Specify the source language: C, \*(C+, Objective-C, or assembly. This has +nothing to do with standards conformance or extensions; it merely +selects which base syntax to expect. If you give none of these options, +cpp will deduce the language from the extension of the source file: +\&\fB.c\fR, \fB.cc\fR, \fB.m\fR, or \fB.S\fR. Some other common +extensions for \*(C+ and assembly are also recognized. If cpp does not +recognize the extension, it will treat the file as C; this is the most +generic mode. +.Sp +\&\fBNote:\fR Previous versions of cpp accepted a \fB\-lang\fR option +which selected both the language and the standards conformance level. +This option has been removed, because it conflicts with the \fB\-l\fR +option. +.Ip "\fB\-std=\fR\fIstandard\fR" 4 +.IX Item "-std=standard" +.PD 0 +.Ip "\fB\-ansi\fR" 4 +.IX Item "-ansi" +.PD +Specify the standard to which the code should conform. Currently cpp +only knows about the standards for C; other language standards will be +added in the future. +.Sp +\&\fIstandard\fR +may be one of: +.RS 4 +.if n .Ip "\f(CW""""iso9899:1990""""\fR" 4 +.el .Ip "\f(CWiso9899:1990\fR" 4 +.IX Item "iso9899:1990" +.PD 0 +.if n .Ip "\f(CW""""c89""""\fR" 4 +.el .Ip "\f(CWc89\fR" 4 +.IX Item "c89" +.PD +The \s-1ISO\s0 C standard from 1990. \fBc89\fR is the customary shorthand for +this version of the standard. +.Sp +The \fB\-ansi\fR option is equivalent to \fB\-std=c89\fR. +.if n .Ip "\f(CW""""iso9899:199409""""\fR" 4 +.el .Ip "\f(CWiso9899:199409\fR" 4 +.IX Item "iso9899:199409" +The 1990 C standard, as amended in 1994. +.if n .Ip "\f(CW""""iso9899:1999""""\fR" 4 +.el .Ip "\f(CWiso9899:1999\fR" 4 +.IX Item "iso9899:1999" +.PD 0 +.if n .Ip "\f(CW""""c99""""\fR" 4 +.el .Ip "\f(CWc99\fR" 4 +.IX Item "c99" +.if n .Ip "\f(CW""""iso9899:199x""""\fR" 4 +.el .Ip "\f(CWiso9899:199x\fR" 4 +.IX Item "iso9899:199x" +.if n .Ip "\f(CW""""c9x""""\fR" 4 +.el .Ip "\f(CWc9x\fR" 4 +.IX Item "c9x" +.PD +The revised \s-1ISO\s0 C standard, published in December 1999. Before +publication, this was known as C9X. +.if n .Ip "\f(CW""""gnu89""""\fR" 4 +.el .Ip "\f(CWgnu89\fR" 4 +.IX Item "gnu89" +The 1990 C standard plus \s-1GNU\s0 extensions. This is the default. +.if n .Ip "\f(CW""""gnu99""""\fR" 4 +.el .Ip "\f(CWgnu99\fR" 4 +.IX Item "gnu99" +.PD 0 +.if n .Ip "\f(CW""""gnu9x""""\fR" 4 +.el .Ip "\f(CWgnu9x\fR" 4 +.IX Item "gnu9x" +.PD +The 1999 C standard plus \s-1GNU\s0 extensions. +.RE +.RS 4 +.RE +.Ip "\fB\-I-\fR" 4 +.IX Item "-I-" +Split the include path. Any directories specified with \fB\-I\fR +options before \fB\-I-\fR are searched only for headers requested with +\&\f(CW\*(C`#include\ "\f(CIfile\f(CW"\*(C'\fR; they are not searched for +\&\f(CW\*(C`#include\ <\f(CIfile\f(CW>\*(C'\fR. If additional directories are +specified with \fB\-I\fR options after the \fB\-I-\fR, those +directories are searched for all \fB#include\fR directives. +.Sp +In addition, \fB\-I-\fR inhibits the use of the directory of the current +file directory as the first search directory for \f(CW\*(C`#include\ "\f(CIfile\f(CW"\*(C'\fR. +.Ip "\fB\-nostdinc\fR" 4 +.IX Item "-nostdinc" +Do not search the standard system directories for header files. +Only the directories you have specified with \fB\-I\fR options +(and the directory of the current file, if appropriate) are searched. +.Ip "\fB\-nostdinc++\fR" 4 +.IX Item "-nostdinc++" +Do not search for header files in the \*(C+\-specific standard directories, +but do still search the other standard directories. (This option is +used when building the \*(C+ library.) +.Ip "\fB\-include\fR \fIfile\fR" 4 +.IX Item "-include file" +Process \fIfile\fR as if \f(CW\*(C`#include "file"\*(C'\fR appeared as the first +line of the primary source file. However, the first directory searched +for \fIfile\fR is the preprocessor's working directory \fIinstead of\fR +the directory containing the main source file. If not found there, it +is searched for in the remainder of the \f(CW\*(C`#include "..."\*(C'\fR search +chain as normal. +.Sp +If multiple \fB\-include\fR options are given, the files are included +in the order they appear on the command line. +.Ip "\fB\-imacros\fR \fIfile\fR" 4 +.IX Item "-imacros file" +Exactly like \fB\-include\fR, except that any output produced by +scanning \fIfile\fR is thrown away. Macros it defines remain defined. +This allows you to acquire all the macros from a header without also +processing its declarations. +.Sp +All files specified by \fB\-imacros\fR are processed before all files +specified by \fB\-include\fR. +.Ip "\fB\-idirafter\fR \fIdir\fR" 4 +.IX Item "-idirafter dir" +Search \fIdir\fR for header files, but do it \fIafter\fR all +directories specified with \fB\-I\fR and the standard system directories +have been exhausted. \fIdir\fR is treated as a system include directory. +.Ip "\fB\-iprefix\fR \fIprefix\fR" 4 +.IX Item "-iprefix prefix" +Specify \fIprefix\fR as the prefix for subsequent \fB\-iwithprefix\fR +options. If the prefix represents a directory, you should include the +final \fB/\fR. +.Ip "\fB\-iwithprefix\fR \fIdir\fR" 4 +.IX Item "-iwithprefix dir" +.PD 0 +.Ip "\fB\-iwithprefixbefore\fR \fIdir\fR" 4 +.IX Item "-iwithprefixbefore dir" +.PD +Append \fIdir\fR to the prefix specified previously with +\&\fB\-iprefix\fR, and add the resulting directory to the include search +path. \fB\-iwithprefixbefore\fR puts it in the same place \fB\-I\fR +would; \fB\-iwithprefix\fR puts it where \fB\-idirafter\fR would. +.Sp +Use of these options is discouraged. +.Ip "\fB\-isystem\fR \fIdir\fR" 4 +.IX Item "-isystem dir" +Search \fIdir\fR for header files, after all directories specified by +\&\fB\-I\fR but before the standard system directories. Mark it +as a system directory, so that it gets the same special treatment as +is applied to the standard system directories. +.Ip "\fB\-fpreprocessed\fR" 4 +.IX Item "-fpreprocessed" +Indicate to the preprocessor that the input file has already been +preprocessed. This suppresses things like macro expansion, trigraph +conversion, escaped newline splicing, and processing of most directives. +The preprocessor still recognizes and removes comments, so that you can +pass a file preprocessed with \fB\-C\fR to the compiler without +problems. In this mode the integrated preprocessor is little more than +a tokenizer for the front ends. +.Sp +\&\fB\-fpreprocessed\fR is implicit if the input file has one of the +extensions \fB.i\fR, \fB.ii\fR or \fB.mi\fR. These are the +extensions that \s-1GCC\s0 uses for preprocessed files created by +\&\fB\-save-temps\fR. +.Ip "\fB\-ftabstop=\fR\fIwidth\fR" 4 +.IX Item "-ftabstop=width" +Set the distance between tab stops. This helps the preprocessor report +correct column numbers in warnings or errors, even if tabs appear on the +line. If the value is less than 1 or greater than 100, the option is +ignored. The default is 8. +.Ip "\fB\-fno-show-column\fR" 4 +.IX Item "-fno-show-column" +Do not print column numbers in diagnostics. This may be necessary if +diagnostics are being scanned by a program that does not understand the +column numbers, such as \fBdejagnu\fR. +.Ip "\fB\-A\fR \fIpredicate\fR\fB=\fR\fIanswer\fR" 4 +.IX Item "-A predicate=answer" +Make an assertion with the predicate \fIpredicate\fR and answer +\&\fIanswer\fR. This form is preferred to the older form \fB\-A\fR +\&\fIpredicate\fR\fB(\fR\fIanswer\fR\fB)\fR, which is still supported, because +it does not use shell special characters. +.Ip "\fB\-A -\fR\fIpredicate\fR\fB=\fR\fIanswer\fR" 4 +.IX Item "-A -predicate=answer" +Cancel an assertion with the predicate \fIpredicate\fR and answer +\&\fIanswer\fR. +.Ip "\fB\-A-\fR" 4 +.IX Item "-A-" +Cancel all predefined assertions and all assertions preceding it on +the command line. Also, undefine all predefined macros and all +macros preceding it on the command line. (This is a historical wart and +may change in the future.) +.Ip "\fB\-dCHARS\fR" 4 +.IX Item "-dCHARS" +\&\fI\s-1CHARS\s0\fR is a sequence of one or more of the following characters, +and must not be preceded by a space. Other characters are interpreted +by the compiler proper, or reserved for future versions of \s-1GCC\s0, and so +are silently ignored. If you specify characters whose behavior +conflicts, the result is undefined. +.RS 4 +.Ip "\fBM\fR" 4 +.IX Item "M" +Instead of the normal output, generate a list of \fB#define\fR +directives for all the macros defined during the execution of the +preprocessor, including predefined macros. This gives you a way of +finding out what is predefined in your version of the preprocessor. +Assuming you have no file \fIfoo.h\fR, the command +.Sp +.Vb 1 +\& touch foo.h; cpp -dM foo.h +.Ve +will show all the predefined macros. +.Ip "\fBD\fR" 4 +.IX Item "D" +Like \fBM\fR except in two respects: it does \fInot\fR include the +predefined macros, and it outputs \fIboth\fR the \fB#define\fR +directives and the result of preprocessing. Both kinds of output go to +the standard output file. +.Ip "\fBN\fR" 4 +.IX Item "N" +Like \fBD\fR, but emit only the macro names, not their expansions. +.Ip "\fBI\fR" 4 +.IX Item "I" +Output \fB#include\fR directives in addition to the result of +preprocessing. +.RE +.RS 4 +.RE +.Ip "\fB\-P\fR" 4 +.IX Item "-P" +Inhibit generation of linemarkers in the output from the preprocessor. +This might be useful when running the preprocessor on something that is +not C code, and will be sent to a program which might be confused by the +linemarkers. +.Ip "\fB\-C\fR" 4 +.IX Item "-C" +Do not discard comments. All comments are passed through to the output +file, except for comments in processed directives, which are deleted +along with the directive. +.Sp +You should be prepared for side effects when using \fB\-C\fR; it +causes the preprocessor to treat comments as tokens in their own right. +For example, comments appearing at the start of what would be a +directive line have the effect of turning that line into an ordinary +source line, since the first token on the line is no longer a \fB#\fR. +.Ip "\fB\-gcc\fR" 4 +.IX Item "-gcc" +Define the macros _\|_GNUC_\|_, _\|_GNUC_MINOR_\|_ and +_\|_GNUC_PATCHLEVEL_\|_. These are defined automatically when you use +\&\fBgcc \-E\fR; you can turn them off in that case with +\&\fB\-no-gcc\fR. +.Ip "\fB\-traditional\fR" 4 +.IX Item "-traditional" +Try to imitate the behavior of old-fashioned C, as opposed to \s-1ISO\s0 +C. +.Ip "\fB\-trigraphs\fR" 4 +.IX Item "-trigraphs" +Process trigraph sequences. +.Ip "\fB\-remap\fR" 4 +.IX Item "-remap" +Enable special code to work around file systems which only permit very +short file names, such as \s-1MS-DOS\s0. +.Ip "\fB\-$\fR" 4 +.IX Item "-$" +Forbid the use of \fB$\fR in identifiers. The C standard allows +implementations to define extra characters that can appear in +identifiers. By default \s-1GNU\s0 \s-1CPP\s0 permits \fB$\fR, a common extension. +.Ip "\fB\-h\fR" 4 +.IX Item "-h" +.PD 0 +.Ip "\fB\*(--help\fR" 4 +.IX Item "help" +.Ip "\fB\*(--target-help\fR" 4 +.IX Item "target-help" +.PD +Print text describing all the command line options instead of +preprocessing anything. +.Ip "\fB\-v\fR" 4 +.IX Item "-v" +Verbose mode. Print out \s-1GNU\s0 \s-1CPP\s0's version number at the beginning of +execution, and report the final form of the include path. +.Ip "\fB\-H\fR" 4 +.IX Item "-H" +Print the name of each header file used, in addition to other normal +activities. Each name is indented to show how deep in the +\&\fB#include\fR stack it is. +.Ip "\fB\-version\fR" 4 +.IX Item "-version" +.PD 0 +.Ip "\fB\*(--version\fR" 4 +.IX Item "version" +.PD +Print out \s-1GNU\s0 \s-1CPP\s0's version number. With one dash, proceed to +preprocess as normal. With two dashes, exit immediately. +.SH "ENVIRONMENT" +.IX Header "ENVIRONMENT" +This section describes the environment variables that affect how \s-1CPP\s0 +operates. You can use them to specify directories or prefixes to use +when searching for include files, or to control dependency output. +.PP +Note that you can also specify places to search using options such as +\&\fB\-I\fR, and control dependency output with options like +\&\fB\-M\fR. These take precedence over +environment variables, which in turn take precedence over the +configuration of \s-1GCC\s0. +.Ip "\fB\s-1CPATH\s0\fR" 4 +.IX Item "CPATH" +.PD 0 +.Ip "\fBC_INCLUDE_PATH\fR" 4 +.IX Item "C_INCLUDE_PATH" +.Ip "\fB\s-1CPLUS_INCLUDE_PATH\s0\fR" 4 +.IX Item "CPLUS_INCLUDE_PATH" +.Ip "\fB\s-1OBJC_INCLUDE_PATH\s0\fR" 4 +.IX Item "OBJC_INCLUDE_PATH" +.PD +Each variable's value is a list of directories separated by a special +character, much like \fB\s-1PATH\s0\fR, in which to look for header files. +The special character, \f(CW\*(C`PATH_SEPARATOR\*(C'\fR, is target-dependent and +determined at \s-1GCC\s0 build time. For Windows-based targets it is a +semicolon, and for almost all other targets it is a colon. +.Sp +\&\fB\s-1CPATH\s0\fR specifies a list of directories to be searched as if +specified with \fB\-I\fR, but after any paths given with \fB\-I\fR +options on the command line. The environment variable is used +regardless of which language is being preprocessed. +.Sp +The remaining environment variables apply only when preprocessing the +particular language indicated. Each specifies a list of directories +to be searched as if specified with \fB\-isystem\fR, but after any +paths given with \fB\-isystem\fR options on the command line. +.Sp +See also \f(CW@ref\fR{Search Path}. +.Ip "\fB\s-1DEPENDENCIES_OUTPUT\s0\fR" 4 +.IX Item "DEPENDENCIES_OUTPUT" +@anchor{\s-1DEPENDENCIES_OUTPUT\s0} +If this variable is set, its value specifies how to output +dependencies for Make based on the non-system header files processed +by the compiler. System header files are ignored in the dependency +output. +.Sp +The value of \fB\s-1DEPENDENCIES_OUTPUT\s0\fR can be just a file name, in +which case the Make rules are written to that file, guessing the target +name from the source file name. Or the value can have the form +\&\fIfile\fR\fB \fR\fItarget\fR, in which case the rules are written to +file \fIfile\fR using \fItarget\fR as the target name. +.Sp +In other words, this environment variable is equivalent to combining +the options \fB\-MM\fR and \fB\-MF\fR, +with an optional \fB\-MT\fR switch too. +.Ip "\fB\s-1SUNPRO_DEPENDENCIES\s0\fR" 4 +.IX Item "SUNPRO_DEPENDENCIES" +This variable is the same as the environment variable +\&\fB\s-1DEPENDENCIES_OUTPUT\s0\fR, except that +system header files are not ignored, so it implies \fB\-M\fR rather +than \fB\-MM\fR. However, the dependence on the main input file is +omitted. +.SH "SEE ALSO" +.IX Header "SEE ALSO" +\&\fIgpl\fR\|(7), \fIgfdl\fR\|(7), \fIfsf-funding\fR\|(7), +\&\fIgcc\fR\|(1), \fIas\fR\|(1), \fIld\fR\|(1), and the Info entries for \fIcpp\fR, \fIgcc\fR, and +\&\fIbinutils\fR. +.SH "COPYRIGHT" +.IX Header "COPYRIGHT" +Copyright (c) 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, +1997, 1998, 1999, 2000, 2001 +Free Software Foundation, Inc. +.PP +Permission is granted to copy, distribute and/or modify this document +under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.1 or +any later version published by the Free Software Foundation. A copy of +the license is included in the +man page \fIgfdl\fR\|(7). +This manual contains no Invariant Sections. The Front-Cover Texts are +(a) (see below), and the Back-Cover Texts are (b) (see below). +.PP +(a) The \s-1FSF\s0's Front-Cover Text is: +.PP +.Vb 1 +\& A GNU Manual +.Ve +(b) The \s-1FSF\s0's Back-Cover Text is: +.PP +.Vb 3 +\& You have freedom to copy and modify this GNU Manual, like GNU +\& software. Copies published by the Free Software Foundation raise +\& funds for GNU development. +.Ve diff --git a/contrib/gcc/doc/gcc.1 b/contrib/gcc/doc/gcc.1 new file mode 100644 index 0000000..dc43d23 --- /dev/null +++ b/contrib/gcc/doc/gcc.1 @@ -0,0 +1,9474 @@ +.\" Automatically generated by Pod::Man version 1.15 +.\" Tue Nov 19 18:17:14 2002 +.\" +.\" Standard preamble: +.\" ====================================================================== +.de Sh \" Subsection heading +.br +.if t .Sp +.ne 5 +.PP +\fB\\$1\fR +.PP +.. +.de Sp \" Vertical space (when we can't use .PP) +.if t .sp .5v +.if n .sp +.. +.de Ip \" List item +.br +.ie \\n(.$>=3 .ne \\$3 +.el .ne 3 +.IP "\\$1" \\$2 +.. +.de Vb \" Begin verbatim text +.ft CW +.nf +.ne \\$1 +.. +.de Ve \" End verbatim text +.ft R + +.fi +.. +.\" Set up some character translations and predefined strings. \*(-- will +.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left +.\" double quote, and \*(R" will give a right double quote. | will give a +.\" real vertical bar. \*(C+ will give a nicer C++. Capital omega is used +.\" to do unbreakable dashes and therefore won't be available. \*(C` and +.\" \*(C' expand to `' in nroff, nothing in troff, for use with C<> +.tr \(*W-|\(bv\*(Tr +.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p' +.ie n \{\ +. ds -- \(*W- +. ds PI pi +. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch +. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch +. ds L" "" +. ds R" "" +. ds C` "" +. ds C' "" +'br\} +.el\{\ +. ds -- \|\(em\| +. ds PI \(*p +. ds L" `` +. ds R" '' +'br\} +.\" +.\" If the F register is turned on, we'll generate index entries on stderr +.\" for titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and +.\" index entries marked with X<> in POD. Of course, you'll have to process +.\" the output yourself in some meaningful fashion. +.if \nF \{\ +. de IX +. tm Index:\\$1\t\\n%\t"\\$2" +.. +. nr % 0 +. rr F +.\} +.\" +.\" For nroff, turn off justification. Always turn off hyphenation; it +.\" makes way too many mistakes in technical documents. +.hy 0 +.if n .na +.\" +.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2). +.\" Fear. Run. Save yourself. No user-serviceable parts. +.bd B 3 +. \" fudge factors for nroff and troff +.if n \{\ +. ds #H 0 +. ds #V .8m +. ds #F .3m +. ds #[ \f1 +. ds #] \fP +.\} +.if t \{\ +. ds #H ((1u-(\\\\n(.fu%2u))*.13m) +. ds #V .6m +. ds #F 0 +. ds #[ \& +. ds #] \& +.\} +. \" simple accents for nroff and troff +.if n \{\ +. ds ' \& +. ds ` \& +. ds ^ \& +. ds , \& +. ds ~ ~ +. ds / +.\} +.if t \{\ +. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u" +. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u' +. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u' +. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u' +. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u' +. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u' +.\} +. \" troff and (daisy-wheel) nroff accents +.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V' +.ds 8 \h'\*(#H'\(*b\h'-\*(#H' +.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#] +.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H' +.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u' +.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#] +.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#] +.ds ae a\h'-(\w'a'u*4/10)'e +.ds Ae A\h'-(\w'A'u*4/10)'E +. \" corrections for vroff +.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u' +.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u' +. \" for low resolution devices (crt and lpr) +.if \n(.H>23 .if \n(.V>19 \ +\{\ +. ds : e +. ds 8 ss +. ds o a +. ds d- d\h'-1'\(ga +. ds D- D\h'-1'\(hy +. ds th \o'bp' +. ds Th \o'LP' +. ds ae ae +. ds Ae AE +.\} +.rm #[ #] #H #V #F C +.\" ====================================================================== +.\" +.IX Title "GCC 1" +.TH GCC 1 "gcc-3.2.1" "2002-11-19" "GNU" +.UC +.SH "NAME" +gcc \- \s-1GNU\s0 project C and \*(C+ compiler +.SH "SYNOPSIS" +.IX Header "SYNOPSIS" +gcc [\fB\-c\fR|\fB\-S\fR|\fB\-E\fR] [\fB\-std=\fR\fIstandard\fR] + [\fB\-g\fR] [\fB\-pg\fR] [\fB\-O\fR\fIlevel\fR] + [\fB\-W\fR\fIwarn\fR...] [\fB\-pedantic\fR] + [\fB\-I\fR\fIdir\fR...] [\fB\-L\fR\fIdir\fR...] + [\fB\-D\fR\fImacro\fR[=\fIdefn\fR]...] [\fB\-U\fR\fImacro\fR] + [\fB\-f\fR\fIoption\fR...] [\fB\-m\fR\fImachine-option\fR...] + [\fB\-o\fR \fIoutfile\fR] \fIinfile\fR... +.PP +Only the most useful options are listed here; see below for the +remainder. \fBg++\fR accepts mostly the same options as \fBgcc\fR. +.SH "DESCRIPTION" +.IX Header "DESCRIPTION" +When you invoke \s-1GCC\s0, it normally does preprocessing, compilation, +assembly and linking. The ``overall options'' allow you to stop this +process at an intermediate stage. For example, the \fB\-c\fR option +says not to run the linker. Then the output consists of object files +output by the assembler. +.PP +Other options are passed on to one stage of processing. Some options +control the preprocessor and others the compiler itself. Yet other +options control the assembler and linker; most of these are not +documented here, since you rarely need to use any of them. +.PP +Most of the command line options that you can use with \s-1GCC\s0 are useful +for C programs; when an option is only useful with another language +(usually \*(C+), the explanation says so explicitly. If the description +for a particular option does not mention a source language, you can use +that option with all supported languages. +.PP +The \fBgcc\fR program accepts options and file names as operands. Many +options have multi-letter names; therefore multiple single-letter options +may \fInot\fR be grouped: \fB\-dr\fR is very different from \fB\-d\ \-r\fR. +.PP +You can mix options and other arguments. For the most part, the order +you use doesn't matter. Order does matter when you use several options +of the same kind; for example, if you specify \fB\-L\fR more than once, +the directories are searched in the order specified. +.PP +Many options have long names starting with \fB\-f\fR or with +\&\fB\-W\fR\-\-\-for example, \fB\-fforce-mem\fR, +\&\fB\-fstrength-reduce\fR, \fB\-Wformat\fR and so on. Most of +these have both positive and negative forms; the negative form of +\&\fB\-ffoo\fR would be \fB\-fno-foo\fR. This manual documents +only one of these two forms, whichever one is not the default. +.SH "OPTIONS" +.IX Header "OPTIONS" +.Sh "Option Summary" +.IX Subsection "Option Summary" +Here is a summary of all the options, grouped by type. Explanations are +in the following sections. +.Ip "\fIOverall Options\fR" 4 +.IX Item "Overall Options" +\&\fB\-c \-S \-E \-o\fR \fIfile\fR \fB\-pipe \-pass-exit-codes \-x\fR \fIlanguage\fR +\&\fB\-v \-### \-\-help \-\-target-help \-\-version\fR +.Ip "\fIC Language Options\fR" 4 +.IX Item "C Language Options" +\&\fB\-ansi \-std=\fR\fIstandard\fR \fB\-aux-info\fR \fIfilename\fR +\&\fB\-fno-asm \-fno-builtin \-fno-builtin-\fR\fIfunction\fR +\&\fB\-fhosted \-ffreestanding +\&\-trigraphs \-no-integrated-cpp \-traditional \-traditional-cpp +\&\-fallow-single-precision \-fcond-mismatch +\&\-fsigned-bitfields \-fsigned-char +\&\-funsigned-bitfields \-funsigned-char +\&\-fwritable-strings\fR +.Ip "\fI\*(C+ Language Options\fR" 4 +.IX Item " Language Options" +\&\fB\-fno-access-control \-fcheck-new \-fconserve-space +\&\-fno-const-strings \-fdollars-in-identifiers +\&\-fno-elide-constructors +\&\-fno-enforce-eh-specs \-fexternal-templates +\&\-falt-external-templates +\&\-ffor-scope \-fno-for-scope \-fno-gnu-keywords +\&\-fno-implicit-templates +\&\-fno-implicit-inline-templates +\&\-fno-implement-inlines \-fms-extensions +\&\-fno-nonansi-builtins \-fno-operator-names +\&\-fno-optional-diags \-fpermissive +\&\-frepo \-fno-rtti \-fstats \-ftemplate-depth-\fR\fIn\fR +\&\fB\-fuse-cxa-atexit \-fvtable-gc \-fno-weak \-nostdinc++ +\&\-fno-default-inline \-Wabi \-Wctor-dtor-privacy +\&\-Wnon-virtual-dtor \-Wreorder +\&\-Weffc++ \-Wno-deprecated +\&\-Wno-non-template-friend \-Wold-style-cast +\&\-Woverloaded-virtual \-Wno-pmf-conversions +\&\-Wsign-promo \-Wsynth\fR +.Ip "\fIObjective-C Language Options\fR" 4 +.IX Item "Objective-C Language Options" +\&\fB\-fconstant-string-class=\fR\fIclass-name\fR +\&\fB\-fgnu-runtime \-fnext-runtime \-gen-decls +\&\-Wno-protocol \-Wselector\fR +.Ip "\fILanguage Independent Options\fR" 4 +.IX Item "Language Independent Options" +\&\fB\-fmessage-length=\fR\fIn\fR +\&\fB\-fdiagnostics-show-location=\fR[\fBonce\fR|\fBevery-line\fR] +.Ip "\fIWarning Options\fR" 4 +.IX Item "Warning Options" +\&\fB\-fsyntax-only \-pedantic \-pedantic-errors +\&\-w \-W \-Wall \-Waggregate-return +\&\-Wcast-align \-Wcast-qual \-Wchar-subscripts \-Wcomment +\&\-Wconversion \-Wno-deprecated-declarations +\&\-Wdisabled-optimization \-Wdiv-by-zero \-Werror +\&\-Wfloat-equal \-Wformat \-Wformat=2 +\&\-Wformat-nonliteral \-Wformat-security +\&\-Wimplicit \-Wimplicit-int +\&\-Wimplicit-function-declaration +\&\-Werror-implicit-function-declaration +\&\-Wimport \-Winline +\&\-Wlarger-than-\fR\fIlen\fR \fB\-Wlong-long +\&\-Wmain \-Wmissing-braces +\&\-Wmissing-format-attribute \-Wmissing-noreturn +\&\-Wmultichar \-Wno-format-extra-args \-Wno-format-y2k +\&\-Wno-import \-Wpacked \-Wpadded +\&\-Wparentheses \-Wpointer-arith \-Wredundant-decls +\&\-Wreturn-type \-Wsequence-point \-Wshadow +\&\-Wsign-compare \-Wswitch \-Wsystem-headers +\&\-Wtrigraphs \-Wundef \-Wuninitialized +\&\-Wunknown-pragmas \-Wunreachable-code +\&\-Wunused \-Wunused-function \-Wunused-label \-Wunused-parameter +\&\-Wunused-value \-Wunused-variable \-Wwrite-strings\fR +.Ip "\fIC-only Warning Options\fR" 4 +.IX Item "C-only Warning Options" +\&\fB\-Wbad-function-cast \-Wmissing-declarations +\&\-Wmissing-prototypes \-Wnested-externs +\&\-Wstrict-prototypes \-Wtraditional\fR +.Ip "\fIDebugging Options\fR" 4 +.IX Item "Debugging Options" +\&\fB\-d\fR\fIletters\fR \fB\-dumpspecs \-dumpmachine \-dumpversion +\&\-fdump-unnumbered \-fdump-translation-unit\fR[\fB-\fR\fIn\fR] +\&\fB\-fdump-class-hierarchy\fR[\fB-\fR\fIn\fR] +\&\fB\-fdump-tree-original\fR[\fB-\fR\fIn\fR] \fB\-fdump-tree-optimized\fR[\fB-\fR\fIn\fR] +\&\fB\-fdump-tree-inlined\fR[\fB-\fR\fIn\fR] +\&\fB\-fmem-report \-fpretend-float +\&\-fprofile-arcs \-fsched-verbose=\fR\fIn\fR +\&\fB\-ftest-coverage \-ftime-report +\&\-g \-g\fR\fIlevel\fR \fB\-gcoff \-gdwarf \-gdwarf-1 \-gdwarf-1+ \-gdwarf-2 +\&\-ggdb \-gstabs \-gstabs+ \-gvms \-gxcoff \-gxcoff+ +\&\-p \-pg \-print-file-name=\fR\fIlibrary\fR \fB\-print-libgcc-file-name +\&\-print-multi-directory \-print-multi-lib +\&\-print-prog-name=\fR\fIprogram\fR \fB\-print-search-dirs \-Q +\&\-save-temps \-time\fR +.Ip "\fIOptimization Options\fR" 4 +.IX Item "Optimization Options" +\&\fB\-falign-functions=\fR\fIn\fR \fB\-falign-jumps=\fR\fIn\fR +\&\fB\-falign-labels=\fR\fIn\fR \fB\-falign-loops=\fR\fIn\fR +\&\fB\-fbounds-check +\&\-fbranch-probabilities \-fcaller-saves \-fcprop-registers +\&\-fcse-follow-jumps \-fcse-skip-blocks \-fdata-sections +\&\-fdelayed-branch \-fdelete-null-pointer-checks +\&\-fexpensive-optimizations \-ffast-math \-ffloat-store +\&\-fforce-addr \-fforce-mem \-ffunction-sections +\&\-fgcse \-fgcse-lm \-fgcse-sm +\&\-finline-functions \-finline-limit=\fR\fIn\fR \fB\-fkeep-inline-functions +\&\-fkeep-static-consts \-fmerge-constants \-fmerge-all-constants +\&\-fmove-all-movables \-fno-branch-count-reg +\&\-fno-default-inline \-fno-defer-pop +\&\-fno-function-cse \-fno-guess-branch-probability +\&\-fno-inline \-fno-math-errno \-fno-peephole \-fno-peephole2 +\&\-funsafe-math-optimizations \-fno-trapping-math +\&\-fomit-frame-pointer \-foptimize-register-move +\&\-foptimize-sibling-calls \-fprefetch-loop-arrays +\&\-freduce-all-givs \-fregmove \-frename-registers +\&\-frerun-cse-after-loop \-frerun-loop-opt +\&\-fschedule-insns \-fschedule-insns2 +\&\-fno-sched-interblock \-fno-sched-spec +\&\-fsched-spec-load \-fsched-spec-load-dangerous +\&\-fsingle-precision-constant \-fssa \-fssa-ccp \-fssa-dce +\&\-fstrength-reduce \-fstrict-aliasing \-fthread-jumps +\&\-ftrapv \-funroll-all-loops \-funroll-loops +\&\-\-param\fR \fIname\fR\fB=\fR\fIvalue\fR +\&\fB\-O \-O0 \-O1 \-O2 \-O3 \-Os\fR +.Ip "\fIPreprocessor Options\fR" 4 +.IX Item "Preprocessor Options" +\&\fB\-$ \-A\fR\fIquestion\fR\fB=\fR\fIanswer\fR \fB\-A-\fR\fIquestion\fR[\fB=\fR\fIanswer\fR] +\&\fB\-C \-dD \-dI \-dM \-dN +\&\-D\fR\fImacro\fR[\fB=\fR\fIdefn\fR] \fB\-E \-H +\&\-idirafter\fR \fIdir\fR +\&\fB\-include\fR \fIfile\fR \fB\-imacros\fR \fIfile\fR +\&\fB\-iprefix\fR \fIfile\fR \fB\-iwithprefix\fR \fIdir\fR +\&\fB\-iwithprefixbefore\fR \fIdir\fR \fB\-isystem\fR \fIdir\fR +\&\fB\-M \-MM \-MF \-MG \-MP \-MQ \-MT \-nostdinc \-P \-remap +\&\-trigraphs \-undef \-U\fR\fImacro\fR \fB\-Wp,\fR\fIoption\fR +.Ip "\fIAssembler Option\fR" 4 +.IX Item "Assembler Option" +\&\fB\-Wa,\fR\fIoption\fR +.Ip "\fILinker Options\fR" 4 +.IX Item "Linker Options" +\&\fB +\&\fR\fIobject-file-name\fR \fB\-l\fR\fIlibrary\fR +\&\fB\-nostartfiles \-nodefaultlibs \-nostdlib +\&\-s \-static \-static-libgcc \-shared \-shared-libgcc \-symbolic +\&\-Wl,\fR\fIoption\fR \fB\-Xlinker\fR \fIoption\fR +\&\fB\-u\fR \fIsymbol\fR +.Ip "\fIDirectory Options\fR" 4 +.IX Item "Directory Options" +\&\fB\-B\fR\fIprefix\fR \fB\-I\fR\fIdir\fR \fB\-I- \-L\fR\fIdir\fR \fB\-specs=\fR\fIfile\fR +.Ip "\fITarget Options\fR" 4 +.IX Item "Target Options" +\&\fB\-b\fR \fImachine\fR \fB\-V\fR \fIversion\fR +.Ip "\fIMachine Dependent Options\fR" 4 +.IX Item "Machine Dependent Options" +\&\fIM680x0 Options\fR +.Sp +\&\fB\-m68000 \-m68020 \-m68020\-40 \-m68020\-60 \-m68030 \-m68040 +\&\-m68060 \-mcpu32 \-m5200 \-m68881 \-mbitfield \-mc68000 \-mc68020 +\&\-mfpa \-mnobitfield \-mrtd \-mshort \-msoft-float \-mpcrel +\&\-malign-int \-mstrict-align\fR +.Sp +\&\fIM68hc1x Options\fR +.Sp +\&\fB\-m6811 \-m6812 \-m68hc11 \-m68hc12 +\&\-mauto-incdec \-mshort \-msoft-reg-count=\fR\fIcount\fR +.Sp +\&\fI\s-1VAX\s0 Options\fR +.Sp +\&\fB\-mg \-mgnu \-munix\fR +.Sp +\&\fI\s-1SPARC\s0 Options\fR +.Sp +\&\fB\-mcpu=\fR\fIcpu-type\fR +\&\fB\-mtune=\fR\fIcpu-type\fR +\&\fB\-mcmodel=\fR\fIcode-model\fR +\&\fB\-m32 \-m64 +\&\-mapp-regs \-mbroken-saverestore \-mcypress +\&\-mfaster-structs \-mflat +\&\-mfpu \-mhard-float \-mhard-quad-float +\&\-mimpure-text \-mlive-g0 \-mno-app-regs +\&\-mno-faster-structs \-mno-flat \-mno-fpu +\&\-mno-impure-text \-mno-stack-bias \-mno-unaligned-doubles +\&\-msoft-float \-msoft-quad-float \-msparclite \-mstack-bias +\&\-msupersparc \-munaligned-doubles \-mv8\fR +.Sp +\&\fIConvex Options\fR +.Sp +\&\fB\-mc1 \-mc2 \-mc32 \-mc34 \-mc38 +\&\-margcount \-mnoargcount +\&\-mlong32 \-mlong64 +\&\-mvolatile-cache \-mvolatile-nocache\fR +.Sp +\&\fI\s-1AMD29K\s0 Options\fR +.Sp +\&\fB\-m29000 \-m29050 \-mbw \-mnbw \-mdw \-mndw +\&\-mlarge \-mnormal \-msmall +\&\-mkernel-registers \-mno-reuse-arg-regs +\&\-mno-stack-check \-mno-storem-bug +\&\-mreuse-arg-regs \-msoft-float \-mstack-check +\&\-mstorem-bug \-muser-registers\fR +.Sp +\&\fI\s-1ARM\s0 Options\fR +.Sp +\&\fB\-mapcs-frame \-mno-apcs-frame +\&\-mapcs-26 \-mapcs-32 +\&\-mapcs-stack-check \-mno-apcs-stack-check +\&\-mapcs-float \-mno-apcs-float +\&\-mapcs-reentrant \-mno-apcs-reentrant +\&\-msched-prolog \-mno-sched-prolog +\&\-mlittle-endian \-mbig-endian \-mwords-little-endian +\&\-malignment-traps \-mno-alignment-traps +\&\-msoft-float \-mhard-float \-mfpe +\&\-mthumb-interwork \-mno-thumb-interwork +\&\-mcpu=\fR\fIname\fR \fB\-march=\fR\fIname\fR \fB\-mfpe=\fR\fIname\fR +\&\fB\-mstructure-size-boundary=\fR\fIn\fR +\&\fB\-mbsd \-mxopen \-mno-symrename +\&\-mabort-on-noreturn +\&\-mlong-calls \-mno-long-calls +\&\-msingle-pic-base \-mno-single-pic-base +\&\-mpic-register=\fR\fIreg\fR +\&\fB\-mnop-fun-dllimport +\&\-mpoke-function-name +\&\-mthumb \-marm +\&\-mtpcs-frame \-mtpcs-leaf-frame +\&\-mcaller-super-interworking \-mcallee-super-interworking\fR +.Sp +\&\fI\s-1MN10200\s0 Options\fR +.Sp +\&\fB\-mrelax\fR +.Sp +\&\fI\s-1MN10300\s0 Options\fR +.Sp +\&\fB\-mmult-bug \-mno-mult-bug +\&\-mam33 \-mno-am33 +\&\-mno-crt0 \-mrelax\fR +.Sp +\&\fIM32R/D Options\fR +.Sp +\&\fB\-m32rx \-m32r \-mcode-model=\fR\fImodel-type\fR \fB\-msdata=\fR\fIsdata-type\fR +\&\fB\-G\fR \fInum\fR +.Sp +\&\fIM88K Options\fR +.Sp +\&\fB\-m88000 \-m88100 \-m88110 \-mbig-pic +\&\-mcheck-zero-division \-mhandle-large-shift +\&\-midentify-revision \-mno-check-zero-division +\&\-mno-ocs-debug-info \-mno-ocs-frame-position +\&\-mno-optimize-arg-area \-mno-serialize-volatile +\&\-mno-underscores \-mocs-debug-info +\&\-mocs-frame-position \-moptimize-arg-area +\&\-mserialize-volatile \-mshort-data-\fR\fInum\fR \fB\-msvr3 +\&\-msvr4 \-mtrap-large-shift \-muse-div-instruction +\&\-mversion-03.00 \-mwarn-passed-structs\fR +.Sp +\&\fI\s-1RS/6000\s0 and PowerPC Options\fR +.Sp +\&\fB\-mcpu=\fR\fIcpu-type\fR +\&\fB\-mtune=\fR\fIcpu-type\fR +\&\fB\-mpower \-mno-power \-mpower2 \-mno-power2 +\&\-mpowerpc \-mpowerpc64 \-mno-powerpc +\&\-maltivec \-mno-altivec +\&\-mpowerpc-gpopt \-mno-powerpc-gpopt +\&\-mpowerpc-gfxopt \-mno-powerpc-gfxopt +\&\-mnew-mnemonics \-mold-mnemonics +\&\-mfull-toc \-mminimal-toc \-mno-fp-in-toc \-mno-sum-in-toc +\&\-m64 \-m32 \-mxl-call \-mno-xl-call \-mpe +\&\-msoft-float \-mhard-float \-mmultiple \-mno-multiple +\&\-mstring \-mno-string \-mupdate \-mno-update +\&\-mfused-madd \-mno-fused-madd \-mbit-align \-mno-bit-align +\&\-mstrict-align \-mno-strict-align \-mrelocatable +\&\-mno-relocatable \-mrelocatable-lib \-mno-relocatable-lib +\&\-mtoc \-mno-toc \-mlittle \-mlittle-endian \-mbig \-mbig-endian +\&\-mcall-aix \-mcall-sysv \-mcall-netbsd +\&\-maix-struct-return \-msvr4\-struct-return +\&\-mabi=altivec \-mabi=no-altivec +\&\-mprototype \-mno-prototype +\&\-msim \-mmvme \-mads \-myellowknife \-memb \-msdata +\&\-msdata=\fR\fIopt\fR \fB\-mvxworks \-G\fR \fInum\fR \fB\-pthread\fR +.Sp +\&\fI\s-1RT\s0 Options\fR +.Sp +\&\fB\-mcall-lib-mul \-mfp-arg-in-fpregs \-mfp-arg-in-gregs +\&\-mfull-fp-blocks \-mhc-struct-return \-min-line-mul +\&\-mminimum-fp-blocks \-mnohc-struct-return\fR +.Sp +\&\fI\s-1MIPS\s0 Options\fR +.Sp +\&\fB\-mabicalls \-march=\fR\fIcpu-type\fR \fB\-mtune=\fR\fIcpu=type\fR +\&\fB\-mcpu=\fR\fIcpu-type\fR \fB\-membedded-data \-muninit-const-in-rodata +\&\-membedded-pic \-mfp32 \-mfp64 \-mfused-madd \-mno-fused-madd +\&\-mgas \-mgp32 \-mgp64 +\&\-mgpopt \-mhalf-pic \-mhard-float \-mint64 \-mips1 +\&\-mips2 \-mips3 \-mips4 \-mlong64 \-mlong32 \-mlong-calls \-mmemcpy +\&\-mmips-as \-mmips-tfile \-mno-abicalls +\&\-mno-embedded-data \-mno-uninit-const-in-rodata +\&\-mno-embedded-pic \-mno-gpopt \-mno-long-calls +\&\-mno-memcpy \-mno-mips-tfile \-mno-rnames \-mno-stats +\&\-mrnames \-msoft-float +\&\-m4650 \-msingle-float \-mmad +\&\-mstats \-EL \-EB \-G\fR \fInum\fR \fB\-nocpp +\&\-mabi=32 \-mabi=n32 \-mabi=64 \-mabi=eabi +\&\-mfix7000 \-mno-crt0 \-mflush-func=\fR\fIfunc\fR \fB\-mno-flush-func\fR +.Sp +\&\fIi386 and x86\-64 Options\fR +.Sp +\&\fB\-mcpu=\fR\fIcpu-type\fR \fB\-march=\fR\fIcpu-type\fR \fB\-mfpmath=\fR\fIunit\fR +\&\fB\-masm=\fR\fIdialect\fR \fB\-mno-fancy-math-387 +\&\-mno-fp-ret-in-387 \-msoft-float \-msvr3\-shlib +\&\-mno-wide-multiply \-mrtd \-malign-double +\&\-mpreferred-stack-boundary=\fR\fInum\fR +\&\fB\-mmmx \-msse \-msse2 \-m3dnow +\&\-mthreads \-mno-align-stringops \-minline-all-stringops +\&\-mpush-args \-maccumulate-outgoing-args \-m128bit-long-double +\&\-m96bit-long-double \-mregparm=\fR\fInum\fR \fB\-momit-leaf-frame-pointer +\&\-mno-red-zone +\&\-mcmodel=\fR\fIcode-model\fR +\&\fB\-m32 \-m64\fR +.Sp +\&\fI\s-1HPPA\s0 Options\fR +.Sp +\&\fB\-march=\fR\fIarchitecture-type\fR +\&\fB\-mbig-switch \-mdisable-fpregs \-mdisable-indexing +\&\-mfast-indirect-calls \-mgas \-mjump-in-delay +\&\-mlong-load-store \-mno-big-switch \-mno-disable-fpregs +\&\-mno-disable-indexing \-mno-fast-indirect-calls \-mno-gas +\&\-mno-jump-in-delay \-mno-long-load-store +\&\-mno-portable-runtime \-mno-soft-float +\&\-mno-space-regs \-msoft-float \-mpa-risc-1\-0 +\&\-mpa-risc-1\-1 \-mpa-risc-2\-0 \-mportable-runtime +\&\-mschedule=\fR\fIcpu-type\fR \fB\-mspace-regs\fR +.Sp +\&\fIIntel 960 Options\fR +.Sp +\&\fB\-m\fR\fIcpu-type\fR \fB\-masm-compat \-mclean-linkage +\&\-mcode-align \-mcomplex-addr \-mleaf-procedures +\&\-mic-compat \-mic2.0\-compat \-mic3.0\-compat +\&\-mintel-asm \-mno-clean-linkage \-mno-code-align +\&\-mno-complex-addr \-mno-leaf-procedures +\&\-mno-old-align \-mno-strict-align \-mno-tail-call +\&\-mnumerics \-mold-align \-msoft-float \-mstrict-align +\&\-mtail-call\fR +.Sp +\&\fI\s-1DEC\s0 Alpha Options\fR +.Sp +\&\fB\-mno-fp-regs \-msoft-float \-malpha-as \-mgas +\&\-mieee \-mieee-with-inexact \-mieee-conformant +\&\-mfp-trap-mode=\fR\fImode\fR \fB\-mfp-rounding-mode=\fR\fImode\fR +\&\fB\-mtrap-precision=\fR\fImode\fR \fB\-mbuild-constants +\&\-mcpu=\fR\fIcpu-type\fR \fB\-mtune=\fR\fIcpu-type\fR +\&\fB\-mbwx \-mmax \-mfix \-mcix +\&\-mfloat-vax \-mfloat-ieee +\&\-mexplicit-relocs \-msmall-data \-mlarge-data +\&\-mmemory-latency=\fR\fItime\fR +.Sp +\&\fI\s-1DEC\s0 Alpha/VMS Options\fR +.Sp +\&\fB\-mvms-return-codes\fR +.Sp +\&\fIClipper Options\fR +.Sp +\&\fB\-mc300 \-mc400\fR +.Sp +\&\fIH8/300 Options\fR +.Sp +\&\fB\-mrelax \-mh \-ms \-mint32 \-malign-300\fR +.Sp +\&\fI\s-1SH\s0 Options\fR +.Sp +\&\fB\-m1 \-m2 \-m3 \-m3e +\&\-m4\-nofpu \-m4\-single-only \-m4\-single \-m4 +\&\-m5\-64media \-m5\-64media-nofpu +\&\-m5\-32media \-m5\-32media-nofpu +\&\-m5\-compact \-m5\-compact-nofpu +\&\-mb \-ml \-mdalign \-mrelax +\&\-mbigtable \-mfmovd \-mhitachi \-mnomacsave +\&\-mieee \-misize \-mpadstruct \-mspace +\&\-mprefergot \-musermode\fR +.Sp +\&\fISystem V Options\fR +.Sp +\&\fB\-Qy \-Qn \-YP,\fR\fIpaths\fR \fB\-Ym,\fR\fIdir\fR +.Sp +\&\fI\s-1ARC\s0 Options\fR +.Sp +\&\fB\-EB \-EL +\&\-mmangle-cpu \-mcpu=\fR\fIcpu\fR \fB\-mtext=\fR\fItext-section\fR +\&\fB\-mdata=\fR\fIdata-section\fR \fB\-mrodata=\fR\fIreadonly-data-section\fR +.Sp +\&\fITMS320C3x/C4x Options\fR +.Sp +\&\fB\-mcpu=\fR\fIcpu\fR \fB\-mbig \-msmall \-mregparm \-mmemparm +\&\-mfast-fix \-mmpyi \-mbk \-mti \-mdp-isr-reload +\&\-mrpts=\fR\fIcount\fR \fB\-mrptb \-mdb \-mloop-unsigned +\&\-mparallel-insns \-mparallel-mpy \-mpreserve-float\fR +.Sp +\&\fIV850 Options\fR +.Sp +\&\fB\-mlong-calls \-mno-long-calls \-mep \-mno-ep +\&\-mprolog-function \-mno-prolog-function \-mspace +\&\-mtda=\fR\fIn\fR \fB\-msda=\fR\fIn\fR \fB\-mzda=\fR\fIn\fR +\&\fB\-mv850 \-mbig-switch\fR +.Sp +\&\fI\s-1NS32K\s0 Options\fR +.Sp +\&\fB\-m32032 \-m32332 \-m32532 \-m32081 \-m32381 +\&\-mmult-add \-mnomult-add \-msoft-float \-mrtd \-mnortd +\&\-mregparam \-mnoregparam \-msb \-mnosb +\&\-mbitfield \-mnobitfield \-mhimem \-mnohimem\fR +.Sp +\&\fI\s-1AVR\s0 Options\fR +.Sp +\&\fB\-mmcu=\fR\fImcu\fR \fB\-msize \-minit-stack=\fR\fIn\fR \fB\-mno-interrupts +\&\-mcall-prologues \-mno-tablejump \-mtiny-stack\fR +.Sp +\&\fIMCore Options\fR +.Sp +\&\fB\-mhardlit \-mno-hardlit \-mdiv \-mno-div \-mrelax-immediates +\&\-mno-relax-immediates \-mwide-bitfields \-mno-wide-bitfields +\&\-m4byte-functions \-mno-4byte-functions \-mcallgraph-data +\&\-mno-callgraph-data \-mslow-bytes \-mno-slow-bytes \-mno-lsim +\&\-mlittle-endian \-mbig-endian \-m210 \-m340 \-mstack-increment\fR +.Sp +\&\fI\s-1MMIX\s0 Options\fR +.Sp +\&\fB\-mlibfuncs \-mno-libfuncs \-mepsilon \-mno-epsilon \-mabi=gnu +\&\-mabi=mmixware \-mzero-extend \-mknuthdiv \-mtoplevel-symbols +\&\-melf \-mbranch-predict \-mno-branch-predict \-mbase-addresses +\&\-mno-base-addresses\fR +.Sp +\&\fI\s-1IA-64\s0 Options\fR +.Sp +\&\fB\-mbig-endian \-mlittle-endian \-mgnu-as \-mgnu-ld \-mno-pic +\&\-mvolatile-asm-stop \-mb-step \-mregister-names \-mno-sdata +\&\-mconstant-gp \-mauto-pic \-minline-divide-min-latency +\&\-minline-divide-max-throughput \-mno-dwarf2\-asm +\&\-mfixed-range=\fR\fIregister-range\fR +.Sp +\&\fID30V Options\fR +.Sp +\&\fB\-mextmem \-mextmemory \-monchip \-mno-asm-optimize +\&\-masm-optimize \-mbranch-cost=\fR\fIn\fR \fB\-mcond-exec=\fR\fIn\fR +.Sp +\&\fIS/390 and zSeries Options\fR +.Sp +\&\fB\-mhard-float \-msoft-float \-mbackchain \-mno-backchain +\&\-msmall-exec \-mno-small-exec \-mmvcle \-mno-mvcle +\&\-m64 \-m31 \-mdebug \-mno-debug\fR +.Sp +\&\fI\s-1CRIS\s0 Options\fR +.Sp +\&\fB\-mcpu=\fR\fIcpu\fR \fB\-march=\fR\fIcpu\fR \fB\-mtune=\fR\fIcpu\fR +\&\fB\-mmax-stack-frame=\fR\fIn\fR \fB\-melinux-stacksize=\fR\fIn\fR +\&\fB\-metrax4 \-metrax100 \-mpdebug \-mcc-init \-mno-side-effects +\&\-mstack-align \-mdata-align \-mconst-align +\&\-m32\-bit \-m16\-bit \-m8\-bit \-mno-prologue-epilogue \-mno-gotplt +\&\-melf \-maout \-melinux \-mlinux \-sim \-sim2\fR +.Sp +\&\fI\s-1PDP-11\s0 Options\fR +.Sp +\&\fB\-mfpu \-msoft-float \-mac0 \-mno-ac0 \-m40 \-m45 \-m10 +\&\-mbcopy \-mbcopy-builtin \-mint32 \-mno-int16 +\&\-mint16 \-mno-int32 \-mfloat32 \-mno-float64 +\&\-mfloat64 \-mno-float32 \-mabshi \-mno-abshi +\&\-mbranch-expensive \-mbranch-cheap +\&\-msplit \-mno-split \-munix-asm \-mdec-asm\fR +.Sp +\&\fIXstormy16 Options\fR +.Sp +\&\fB\-msim\fR +.Sp +\&\fIXtensa Options\fR +.Sp +\&\fB\-mbig-endian \-mlittle-endian +\&\-mdensity \-mno-density +\&\-mmac16 \-mno-mac16 +\&\-mmul16 \-mno-mul16 +\&\-mmul32 \-mno-mul32 +\&\-mnsa \-mno-nsa +\&\-mminmax \-mno-minmax +\&\-msext \-mno-sext +\&\-mbooleans \-mno-booleans +\&\-mhard-float \-msoft-float +\&\-mfused-madd \-mno-fused-madd +\&\-mserialize-volatile \-mno-serialize-volatile +\&\-mtext-section-literals \-mno-text-section-literals +\&\-mtarget-align \-mno-target-align +\&\-mlongcalls \-mno-longcalls\fR +.Ip "\fICode Generation Options\fR" 4 +.IX Item "Code Generation Options" +\&\fB\-fcall-saved-\fR\fIreg\fR \fB\-fcall-used-\fR\fIreg\fR +\&\fB\-ffixed-\fR\fIreg\fR \fB\-fexceptions +\&\-fnon-call-exceptions \-funwind-tables +\&\-fasynchronous-unwind-tables +\&\-finhibit-size-directive \-finstrument-functions +\&\-fno-common \-fno-ident \-fno-gnu-linker +\&\-fpcc-struct-return \-fpic \-fPIC +\&\-freg-struct-return \-fshared-data \-fshort-enums +\&\-fshort-double \-fshort-wchar \-fvolatile +\&\-fvolatile-global \-fvolatile-static +\&\-fverbose-asm \-fpack-struct \-fstack-check +\&\-fstack-limit-register=\fR\fIreg\fR \fB\-fstack-limit-symbol=\fR\fIsym\fR +\&\fB\-fargument-alias \-fargument-noalias +\&\-fargument-noalias-global \-fleading-underscore\fR +.Sh "Options Controlling the Kind of Output" +.IX Subsection "Options Controlling the Kind of Output" +Compilation can involve up to four stages: preprocessing, compilation +proper, assembly and linking, always in that order. The first three +stages apply to an individual source file, and end by producing an +object file; linking combines all the object files (those newly +compiled, and those specified as input) into an executable file. +.PP +For any given input file, the file name suffix determines what kind of +compilation is done: +.Ip "\fIfile\fR\fB.c\fR" 4 +.IX Item "file.c" +C source code which must be preprocessed. +.Ip "\fIfile\fR\fB.i\fR" 4 +.IX Item "file.i" +C source code which should not be preprocessed. +.Ip "\fIfile\fR\fB.ii\fR" 4 +.IX Item "file.ii" +\&\*(C+ source code which should not be preprocessed. +.Ip "\fIfile\fR\fB.m\fR" 4 +.IX Item "file.m" +Objective-C source code. Note that you must link with the library +\&\fIlibobjc.a\fR to make an Objective-C program work. +.Ip "\fIfile\fR\fB.mi\fR" 4 +.IX Item "file.mi" +Objective-C source code which should not be preprocessed. +.Ip "\fIfile\fR\fB.h\fR" 4 +.IX Item "file.h" +C header file (not to be compiled or linked). +.Ip "\fIfile\fR\fB.cc\fR" 4 +.IX Item "file.cc" +.PD 0 +.Ip "\fIfile\fR\fB.cp\fR" 4 +.IX Item "file.cp" +.Ip "\fIfile\fR\fB.cxx\fR" 4 +.IX Item "file.cxx" +.Ip "\fIfile\fR\fB.cpp\fR" 4 +.IX Item "file.cpp" +.Ip "\fIfile\fR\fB.c++\fR" 4 +.IX Item "file.c++" +.Ip "\fIfile\fR\fB.C\fR" 4 +.IX Item "file.C" +.PD +\&\*(C+ source code which must be preprocessed. Note that in \fB.cxx\fR, +the last two letters must both be literally \fBx\fR. Likewise, +\&\fB.C\fR refers to a literal capital C. +.Ip "\fIfile\fR\fB.f\fR" 4 +.IX Item "file.f" +.PD 0 +.Ip "\fIfile\fR\fB.for\fR" 4 +.IX Item "file.for" +.Ip "\fIfile\fR\fB.FOR\fR" 4 +.IX Item "file.FOR" +.PD +Fortran source code which should not be preprocessed. +.Ip "\fIfile\fR\fB.F\fR" 4 +.IX Item "file.F" +.PD 0 +.Ip "\fIfile\fR\fB.fpp\fR" 4 +.IX Item "file.fpp" +.Ip "\fIfile\fR\fB.FPP\fR" 4 +.IX Item "file.FPP" +.PD +Fortran source code which must be preprocessed (with the traditional +preprocessor). +.Ip "\fIfile\fR\fB.r\fR" 4 +.IX Item "file.r" +Fortran source code which must be preprocessed with a \s-1RATFOR\s0 +preprocessor (not included with \s-1GCC\s0). +.Ip "\fIfile\fR\fB.ads\fR" 4 +.IX Item "file.ads" +Ada source code file which contains a library unit declaration (a +declaration of a package, subprogram, or generic, or a generic +instantiation), or a library unit renaming declaration (a package, +generic, or subprogram renaming declaration). Such files are also +called \fIspecs\fR. +.Ip "\fIfile\fR\fB.adb\fR" 4 +.IX Item "file.adb" +Ada source code file containing a library unit body (a subprogram or +package body). Such files are also called \fIbodies\fR. +.Ip "\fIfile\fR\fB.s\fR" 4 +.IX Item "file.s" +Assembler code. +.Ip "\fIfile\fR\fB.S\fR" 4 +.IX Item "file.S" +Assembler code which must be preprocessed. +.Ip "\fIother\fR" 4 +.IX Item "other" +An object file to be fed straight into linking. +Any file name with no recognized suffix is treated this way. +.PP +You can specify the input language explicitly with the \fB\-x\fR option: +.Ip "\fB\-x\fR \fIlanguage\fR" 4 +.IX Item "-x language" +Specify explicitly the \fIlanguage\fR for the following input files +(rather than letting the compiler choose a default based on the file +name suffix). This option applies to all following input files until +the next \fB\-x\fR option. Possible values for \fIlanguage\fR are: +.Sp +.Vb 7 +\& c c-header cpp-output +\& c++ c++-cpp-output +\& objective-c objc-cpp-output +\& assembler assembler-with-cpp +\& ada +\& f77 f77-cpp-input ratfor +\& java +.Ve +.Ip "\fB\-x none\fR" 4 +.IX Item "-x none" +Turn off any specification of a language, so that subsequent files are +handled according to their file name suffixes (as they are if \fB\-x\fR +has not been used at all). +.Ip "\fB\-pass-exit-codes\fR" 4 +.IX Item "-pass-exit-codes" +Normally the \fBgcc\fR program will exit with the code of 1 if any +phase of the compiler returns a non-success return code. If you specify +\&\fB\-pass-exit-codes\fR, the \fBgcc\fR program will instead return with +numerically highest error produced by any phase that returned an error +indication. +.PP +If you only want some of the stages of compilation, you can use +\&\fB\-x\fR (or filename suffixes) to tell \fBgcc\fR where to start, and +one of the options \fB\-c\fR, \fB\-S\fR, or \fB\-E\fR to say where +\&\fBgcc\fR is to stop. Note that some combinations (for example, +\&\fB\-x cpp-output \-E\fR) instruct \fBgcc\fR to do nothing at all. +.Ip "\fB\-c\fR" 4 +.IX Item "-c" +Compile or assemble the source files, but do not link. The linking +stage simply is not done. The ultimate output is in the form of an +object file for each source file. +.Sp +By default, the object file name for a source file is made by replacing +the suffix \fB.c\fR, \fB.i\fR, \fB.s\fR, etc., with \fB.o\fR. +.Sp +Unrecognized input files, not requiring compilation or assembly, are +ignored. +.Ip "\fB\-S\fR" 4 +.IX Item "-S" +Stop after the stage of compilation proper; do not assemble. The output +is in the form of an assembler code file for each non-assembler input +file specified. +.Sp +By default, the assembler file name for a source file is made by +replacing the suffix \fB.c\fR, \fB.i\fR, etc., with \fB.s\fR. +.Sp +Input files that don't require compilation are ignored. +.Ip "\fB\-E\fR" 4 +.IX Item "-E" +Stop after the preprocessing stage; do not run the compiler proper. The +output is in the form of preprocessed source code, which is sent to the +standard output. +.Sp +Input files which don't require preprocessing are ignored. +.Ip "\fB\-o\fR \fIfile\fR" 4 +.IX Item "-o file" +Place output in file \fIfile\fR. This applies regardless to whatever +sort of output is being produced, whether it be an executable file, +an object file, an assembler file or preprocessed C code. +.Sp +Since only one output file can be specified, it does not make sense to +use \fB\-o\fR when compiling more than one input file, unless you are +producing an executable file as output. +.Sp +If \fB\-o\fR is not specified, the default is to put an executable file +in \fIa.out\fR, the object file for \fI\fIsource\fI.\fIsuffix\fI\fR in +\&\fI\fIsource\fI.o\fR, its assembler file in \fI\fIsource\fI.s\fR, and +all preprocessed C source on standard output. +.Ip "\fB\-v\fR" 4 +.IX Item "-v" +Print (on standard error output) the commands executed to run the stages +of compilation. Also print the version number of the compiler driver +program and of the preprocessor and the compiler proper. +.Ip "\fB\-###\fR" 4 +.IX Item "-###" +Like \fB\-v\fR except the commands are not executed and all command +arguments are quoted. This is useful for shell scripts to capture the +driver-generated command lines. +.Ip "\fB\-pipe\fR" 4 +.IX Item "-pipe" +Use pipes rather than temporary files for communication between the +various stages of compilation. This fails to work on some systems where +the assembler is unable to read from a pipe; but the \s-1GNU\s0 assembler has +no trouble. +.Ip "\fB\*(--help\fR" 4 +.IX Item "help" +Print (on the standard output) a description of the command line options +understood by \fBgcc\fR. If the \fB\-v\fR option is also specified +then \fB\*(--help\fR will also be passed on to the various processes +invoked by \fBgcc\fR, so that they can display the command line options +they accept. If the \fB\-W\fR option is also specified then command +line options which have no documentation associated with them will also +be displayed. +.Ip "\fB\*(--target-help\fR" 4 +.IX Item "target-help" +Print (on the standard output) a description of target specific command +line options for each tool. +.Ip "\fB\*(--version\fR" 4 +.IX Item "version" +Display the version number and copyrights of the invoked \s-1GCC\s0. +.Sh "Compiling \*(C+ Programs" +.IX Subsection "Compiling Programs" +\&\*(C+ source files conventionally use one of the suffixes \fB.C\fR, +\&\fB.cc\fR, \fB.cpp\fR, \fB.c++\fR, \fB.cp\fR, or \fB.cxx\fR; +preprocessed \*(C+ files use the suffix \fB.ii\fR. \s-1GCC\s0 recognizes +files with these names and compiles them as \*(C+ programs even if you +call the compiler the same way as for compiling C programs (usually with +the name \fBgcc\fR). +.PP +However, \*(C+ programs often require class libraries as well as a +compiler that understands the \*(C+ language\-\-\-and under some +circumstances, you might want to compile programs from standard input, +or otherwise without a suffix that flags them as \*(C+ programs. +\&\fBg++\fR is a program that calls \s-1GCC\s0 with the default language +set to \*(C+, and automatically specifies linking against the \*(C+ +library. On many systems, \fBg++\fR is also +installed with the name \fBc++\fR. +.PP +When you compile \*(C+ programs, you may specify many of the same +command-line options that you use for compiling programs in any +language; or command-line options meaningful for C and related +languages; or options that are meaningful only for \*(C+ programs. +.Sh "Options Controlling C Dialect" +.IX Subsection "Options Controlling C Dialect" +The following options control the dialect of C (or languages derived +from C, such as \*(C+ and Objective-C) that the compiler accepts: +.Ip "\fB\-ansi\fR" 4 +.IX Item "-ansi" +In C mode, support all \s-1ISO\s0 C89 programs. In \*(C+ mode, +remove \s-1GNU\s0 extensions that conflict with \s-1ISO\s0 \*(C+. +.Sp +This turns off certain features of \s-1GCC\s0 that are incompatible with \s-1ISO\s0 +C89 (when compiling C code), or of standard \*(C+ (when compiling \*(C+ code), +such as the \f(CW\*(C`asm\*(C'\fR and \f(CW\*(C`typeof\*(C'\fR keywords, and +predefined macros such as \f(CW\*(C`unix\*(C'\fR and \f(CW\*(C`vax\*(C'\fR that identify the +type of system you are using. It also enables the undesirable and +rarely used \s-1ISO\s0 trigraph feature. For the C compiler, +it disables recognition of \*(C+ style \fB//\fR comments as well as +the \f(CW\*(C`inline\*(C'\fR keyword. +.Sp +The alternate keywords \f(CW\*(C`_\|_asm_\|_\*(C'\fR, \f(CW\*(C`_\|_extension_\|_\*(C'\fR, +\&\f(CW\*(C`_\|_inline_\|_\*(C'\fR and \f(CW\*(C`_\|_typeof_\|_\*(C'\fR continue to work despite +\&\fB\-ansi\fR. You would not want to use them in an \s-1ISO\s0 C program, of +course, but it is useful to put them in header files that might be included +in compilations done with \fB\-ansi\fR. Alternate predefined macros +such as \f(CW\*(C`_\|_unix_\|_\*(C'\fR and \f(CW\*(C`_\|_vax_\|_\*(C'\fR are also available, with or +without \fB\-ansi\fR. +.Sp +The \fB\-ansi\fR option does not cause non-ISO programs to be +rejected gratuitously. For that, \fB\-pedantic\fR is required in +addition to \fB\-ansi\fR. +.Sp +The macro \f(CW\*(C`_\|_STRICT_ANSI_\|_\*(C'\fR is predefined when the \fB\-ansi\fR +option is used. Some header files may notice this macro and refrain +from declaring certain functions or defining certain macros that the +\&\s-1ISO\s0 standard doesn't call for; this is to avoid interfering with any +programs that might use these names for other things. +.Sp +Functions which would normally be built in but do not have semantics +defined by \s-1ISO\s0 C (such as \f(CW\*(C`alloca\*(C'\fR and \f(CW\*(C`ffs\*(C'\fR) are not built-in +functions with \fB\-ansi\fR is used. +.Ip "\fB\-std=\fR" 4 +.IX Item "-std=" +Determine the language standard. This option is currently only +supported when compiling C. A value for this option must be provided; +possible values are +.RS 4 +.Ip "\fBc89\fR" 4 +.IX Item "c89" +.PD 0 +.Ip "\fBiso9899:1990\fR" 4 +.IX Item "iso9899:1990" +.PD +\&\s-1ISO\s0 C89 (same as \fB\-ansi\fR). +.Ip "\fBiso9899:199409\fR" 4 +.IX Item "iso9899:199409" +\&\s-1ISO\s0 C89 as modified in amendment 1. +.Ip "\fBc99\fR" 4 +.IX Item "c99" +.PD 0 +.Ip "\fBc9x\fR" 4 +.IX Item "c9x" +.Ip "\fBiso9899:1999\fR" 4 +.IX Item "iso9899:1999" +.Ip "\fBiso9899:199x\fR" 4 +.IX Item "iso9899:199x" +.PD +\&\s-1ISO\s0 C99. Note that this standard is not yet fully supported; see +<\fBhttp://gcc.gnu.org/gcc-3.1/c99status.html\fR> for more information. The +names \fBc9x\fR and \fBiso9899:199x\fR are deprecated. +.Ip "\fBgnu89\fR" 4 +.IX Item "gnu89" +Default, \s-1ISO\s0 C89 plus \s-1GNU\s0 extensions (including some C99 features). +.Ip "\fBgnu99\fR" 4 +.IX Item "gnu99" +.PD 0 +.Ip "\fBgnu9x\fR" 4 +.IX Item "gnu9x" +.PD +\&\s-1ISO\s0 C99 plus \s-1GNU\s0 extensions. When \s-1ISO\s0 C99 is fully implemented in \s-1GCC\s0, +this will become the default. The name \fBgnu9x\fR is deprecated. +.RE +.RS 4 +.Sp +Even when this option is not specified, you can still use some of the +features of newer standards in so far as they do not conflict with +previous C standards. For example, you may use \f(CW\*(C`_\|_restrict_\|_\*(C'\fR even +when \fB\-std=c99\fR is not specified. +.Sp +The \fB\-std\fR options specifying some version of \s-1ISO\s0 C have the same +effects as \fB\-ansi\fR, except that features that were not in \s-1ISO\s0 C89 +but are in the specified version (for example, \fB//\fR comments and +the \f(CW\*(C`inline\*(C'\fR keyword in \s-1ISO\s0 C99) are not disabled. +.RE +.Ip "\fB\-aux-info\fR \fIfilename\fR" 4 +.IX Item "-aux-info filename" +Output to the given filename prototyped declarations for all functions +declared and/or defined in a translation unit, including those in header +files. This option is silently ignored in any language other than C. +.Sp +Besides declarations, the file indicates, in comments, the origin of +each declaration (source file and line), whether the declaration was +implicit, prototyped or unprototyped (\fBI\fR, \fBN\fR for new or +\&\fBO\fR for old, respectively, in the first character after the line +number and the colon), and whether it came from a declaration or a +definition (\fBC\fR or \fBF\fR, respectively, in the following +character). In the case of function definitions, a K&R-style list of +arguments followed by their declarations is also provided, inside +comments, after the declaration. +.Ip "\fB\-fno-asm\fR" 4 +.IX Item "-fno-asm" +Do not recognize \f(CW\*(C`asm\*(C'\fR, \f(CW\*(C`inline\*(C'\fR or \f(CW\*(C`typeof\*(C'\fR as a +keyword, so that code can use these words as identifiers. You can use +the keywords \f(CW\*(C`_\|_asm_\|_\*(C'\fR, \f(CW\*(C`_\|_inline_\|_\*(C'\fR and \f(CW\*(C`_\|_typeof_\|_\*(C'\fR +instead. \fB\-ansi\fR implies \fB\-fno-asm\fR. +.Sp +In \*(C+, this switch only affects the \f(CW\*(C`typeof\*(C'\fR keyword, since +\&\f(CW\*(C`asm\*(C'\fR and \f(CW\*(C`inline\*(C'\fR are standard keywords. You may want to +use the \fB\-fno-gnu-keywords\fR flag instead, which has the same +effect. In C99 mode (\fB\-std=c99\fR or \fB\-std=gnu99\fR), this +switch only affects the \f(CW\*(C`asm\*(C'\fR and \f(CW\*(C`typeof\*(C'\fR keywords, since +\&\f(CW\*(C`inline\*(C'\fR is a standard keyword in \s-1ISO\s0 C99. +.Ip "\fB\-fno-builtin\fR" 4 +.IX Item "-fno-builtin" +.PD 0 +.Ip "\fB\-fno-builtin-\fR\fIfunction\fR\fB \fR(C and Objective-C only)" 4 +.IX Item "-fno-builtin-function (C and Objective-C only)" +.PD +Don't recognize built-in functions that do not begin with +\&\fB_\|_builtin_\fR as prefix. +.Sp +\&\s-1GCC\s0 normally generates special code to handle certain built-in functions +more efficiently; for instance, calls to \f(CW\*(C`alloca\*(C'\fR may become single +instructions that adjust the stack directly, and calls to \f(CW\*(C`memcpy\*(C'\fR +may become inline copy loops. The resulting code is often both smaller +and faster, but since the function calls no longer appear as such, you +cannot set a breakpoint on those calls, nor can you change the behavior +of the functions by linking with a different library. +.Sp +In \*(C+, \fB\-fno-builtin\fR is always in effect. The \fB\-fbuiltin\fR +option has no effect. Therefore, in \*(C+, the only way to get the +optimization benefits of built-in functions is to call the function +using the \fB_\|_builtin_\fR prefix. The \s-1GNU\s0 \*(C+ Standard Library uses +built-in functions to implement many functions (like +\&\f(CW\*(C`std::strchr\*(C'\fR), so that you automatically get efficient code. +.Sp +With the \fB\-fno-builtin-\fR\fIfunction\fR option, not available +when compiling \*(C+, only the built-in function \fIfunction\fR is +disabled. \fIfunction\fR must not begin with \fB_\|_builtin_\fR. If a +function is named this is not built-in in this version of \s-1GCC\s0, this +option is ignored. There is no corresponding +\&\fB\-fbuiltin-\fR\fIfunction\fR option; if you wish to enable +built-in functions selectively when using \fB\-fno-builtin\fR or +\&\fB\-ffreestanding\fR, you may define macros such as: +.Sp +.Vb 2 +\& #define abs(n) __builtin_abs ((n)) +\& #define strcpy(d, s) __builtin_strcpy ((d), (s)) +.Ve +.Ip "\fB\-fhosted\fR" 4 +.IX Item "-fhosted" +Assert that compilation takes place in a hosted environment. This implies +\&\fB\-fbuiltin\fR. A hosted environment is one in which the +entire standard library is available, and in which \f(CW\*(C`main\*(C'\fR has a return +type of \f(CW\*(C`int\*(C'\fR. Examples are nearly everything except a kernel. +This is equivalent to \fB\-fno-freestanding\fR. +.Ip "\fB\-ffreestanding\fR" 4 +.IX Item "-ffreestanding" +Assert that compilation takes place in a freestanding environment. This +implies \fB\-fno-builtin\fR. A freestanding environment +is one in which the standard library may not exist, and program startup may +not necessarily be at \f(CW\*(C`main\*(C'\fR. The most obvious example is an \s-1OS\s0 kernel. +This is equivalent to \fB\-fno-hosted\fR. +.Ip "\fB\-trigraphs\fR" 4 +.IX Item "-trigraphs" +Support \s-1ISO\s0 C trigraphs. The \fB\-ansi\fR option (and \fB\-std\fR +options for strict \s-1ISO\s0 C conformance) implies \fB\-trigraphs\fR. +.Ip "\fB\-no-integrated-cpp\fR" 4 +.IX Item "-no-integrated-cpp" +Invoke the external cpp during compilation. The default is to use the +integrated cpp (internal cpp). This option also allows a +user-supplied cpp via the \fB\-B\fR option. This flag is applicable +in both C and \*(C+ modes. +.Sp +We do not guarantee to retain this option in future, and we may change +its semantics. +.Ip "\fB\-traditional\fR" 4 +.IX Item "-traditional" +Attempt to support some aspects of traditional C compilers. +Specifically: +.RS 4 +.Ip "\(bu" 4 +All \f(CW\*(C`extern\*(C'\fR declarations take effect globally even if they +are written inside of a function definition. This includes implicit +declarations of functions. +.Ip "\(bu" 4 +The newer keywords \f(CW\*(C`typeof\*(C'\fR, \f(CW\*(C`inline\*(C'\fR, \f(CW\*(C`signed\*(C'\fR, \f(CW\*(C`const\*(C'\fR +and \f(CW\*(C`volatile\*(C'\fR are not recognized. (You can still use the +alternative keywords such as \f(CW\*(C`_\|_typeof_\|_\*(C'\fR, \f(CW\*(C`_\|_inline_\|_\*(C'\fR, and +so on.) +.Ip "\(bu" 4 +Comparisons between pointers and integers are always allowed. +.Ip "\(bu" 4 +Integer types \f(CW\*(C`unsigned short\*(C'\fR and \f(CW\*(C`unsigned char\*(C'\fR promote +to \f(CW\*(C`unsigned int\*(C'\fR. +.Ip "\(bu" 4 +Out-of-range floating point literals are not an error. +.Ip "\(bu" 4 +Certain constructs which \s-1ISO\s0 regards as a single invalid preprocessing +number, such as \fB0xe-0xd\fR, are treated as expressions instead. +.Ip "\(bu" 4 +String ``constants'' are not necessarily constant; they are stored in +writable space, and identical looking constants are allocated +separately. (This is the same as the effect of +\&\fB\-fwritable-strings\fR.) +.Ip "\(bu" 4 +All automatic variables not declared \f(CW\*(C`register\*(C'\fR are preserved by +\&\f(CW\*(C`longjmp\*(C'\fR. Ordinarily, \s-1GNU\s0 C follows \s-1ISO\s0 C: automatic variables +not declared \f(CW\*(C`volatile\*(C'\fR may be clobbered. +.Ip "\(bu" 4 +The character escape sequences \fB\ex\fR and \fB\ea\fR evaluate as the +literal characters \fBx\fR and \fBa\fR respectively. Without +\&\fB\-traditional\fR, \fB\ex\fR is a prefix for the hexadecimal +representation of a character, and \fB\ea\fR produces a bell. +.RE +.RS 4 +.Sp +This option is deprecated and may be removed. +.Sp +You may wish to use \fB\-fno-builtin\fR as well as \fB\-traditional\fR +if your program uses names that are normally \s-1GNU\s0 C built-in functions for +other purposes of its own. +.Sp +You cannot use \fB\-traditional\fR if you include any header files that +rely on \s-1ISO\s0 C features. Some vendors are starting to ship systems with +\&\s-1ISO\s0 C header files and you cannot use \fB\-traditional\fR on such +systems to compile files that include any system headers. +.Sp +The \fB\-traditional\fR option also enables \fB\-traditional-cpp\fR. +.RE +.Ip "\fB\-traditional-cpp\fR" 4 +.IX Item "-traditional-cpp" +Attempt to support some aspects of traditional C preprocessors. +See the \s-1GNU\s0 \s-1CPP\s0 manual for details. +.Ip "\fB\-fcond-mismatch\fR" 4 +.IX Item "-fcond-mismatch" +Allow conditional expressions with mismatched types in the second and +third arguments. The value of such an expression is void. This option +is not supported for \*(C+. +.Ip "\fB\-funsigned-char\fR" 4 +.IX Item "-funsigned-char" +Let the type \f(CW\*(C`char\*(C'\fR be unsigned, like \f(CW\*(C`unsigned char\*(C'\fR. +.Sp +Each kind of machine has a default for what \f(CW\*(C`char\*(C'\fR should +be. It is either like \f(CW\*(C`unsigned char\*(C'\fR by default or like +\&\f(CW\*(C`signed char\*(C'\fR by default. +.Sp +Ideally, a portable program should always use \f(CW\*(C`signed char\*(C'\fR or +\&\f(CW\*(C`unsigned char\*(C'\fR when it depends on the signedness of an object. +But many programs have been written to use plain \f(CW\*(C`char\*(C'\fR and +expect it to be signed, or expect it to be unsigned, depending on the +machines they were written for. This option, and its inverse, let you +make such a program work with the opposite default. +.Sp +The type \f(CW\*(C`char\*(C'\fR is always a distinct type from each of +\&\f(CW\*(C`signed char\*(C'\fR or \f(CW\*(C`unsigned char\*(C'\fR, even though its behavior +is always just like one of those two. +.Ip "\fB\-fsigned-char\fR" 4 +.IX Item "-fsigned-char" +Let the type \f(CW\*(C`char\*(C'\fR be signed, like \f(CW\*(C`signed char\*(C'\fR. +.Sp +Note that this is equivalent to \fB\-fno-unsigned-char\fR, which is +the negative form of \fB\-funsigned-char\fR. Likewise, the option +\&\fB\-fno-signed-char\fR is equivalent to \fB\-funsigned-char\fR. +.Ip "\fB\-fsigned-bitfields\fR" 4 +.IX Item "-fsigned-bitfields" +.PD 0 +.Ip "\fB\-funsigned-bitfields\fR" 4 +.IX Item "-funsigned-bitfields" +.Ip "\fB\-fno-signed-bitfields\fR" 4 +.IX Item "-fno-signed-bitfields" +.Ip "\fB\-fno-unsigned-bitfields\fR" 4 +.IX Item "-fno-unsigned-bitfields" +.PD +These options control whether a bit-field is signed or unsigned, when the +declaration does not use either \f(CW\*(C`signed\*(C'\fR or \f(CW\*(C`unsigned\*(C'\fR. By +default, such a bit-field is signed, because this is consistent: the +basic integer types such as \f(CW\*(C`int\*(C'\fR are signed types. +.Sp +However, when \fB\-traditional\fR is used, bit-fields are all unsigned +no matter what. +.Ip "\fB\-fwritable-strings\fR" 4 +.IX Item "-fwritable-strings" +Store string constants in the writable data segment and don't uniquize +them. This is for compatibility with old programs which assume they can +write into string constants. The option \fB\-traditional\fR also has +this effect. +.Sp +Writing into string constants is a very bad idea; ``constants'' should +be constant. +.Ip "\fB\-fallow-single-precision\fR" 4 +.IX Item "-fallow-single-precision" +Do not promote single precision math operations to double precision, +even when compiling with \fB\-traditional\fR. +.Sp +Traditional K&R C promotes all floating point operations to double +precision, regardless of the sizes of the operands. On the +architecture for which you are compiling, single precision may be faster +than double precision. If you must use \fB\-traditional\fR, but want +to use single precision operations when the operands are single +precision, use this option. This option has no effect when compiling +with \s-1ISO\s0 or \s-1GNU\s0 C conventions (the default). +.Sh "Options Controlling \*(C+ Dialect" +.IX Subsection "Options Controlling Dialect" +This section describes the command-line options that are only meaningful +for \*(C+ programs; but you can also use most of the \s-1GNU\s0 compiler options +regardless of what language your program is in. For example, you +might compile a file \f(CW\*(C`firstClass.C\*(C'\fR like this: +.PP +.Vb 1 +\& g++ -g -frepo -O -c firstClass.C +.Ve +In this example, only \fB\-frepo\fR is an option meant +only for \*(C+ programs; you can use the other options with any +language supported by \s-1GCC\s0. +.PP +Here is a list of options that are \fIonly\fR for compiling \*(C+ programs: +.Ip "\fB\-fno-access-control\fR" 4 +.IX Item "-fno-access-control" +Turn off all access checking. This switch is mainly useful for working +around bugs in the access control code. +.Ip "\fB\-fcheck-new\fR" 4 +.IX Item "-fcheck-new" +Check that the pointer returned by \f(CW\*(C`operator new\*(C'\fR is non-null +before attempting to modify the storage allocated. The current Working +Paper requires that \f(CW\*(C`operator new\*(C'\fR never return a null pointer, so +this check is normally unnecessary. +.Sp +An alternative to using this option is to specify that your +\&\f(CW\*(C`operator new\*(C'\fR does not throw any exceptions; if you declare it +\&\fB\f(BIthrow()\fB\fR, G++ will check the return value. See also \fBnew +(nothrow)\fR. +.Ip "\fB\-fconserve-space\fR" 4 +.IX Item "-fconserve-space" +Put uninitialized or runtime-initialized global variables into the +common segment, as C does. This saves space in the executable at the +cost of not diagnosing duplicate definitions. If you compile with this +flag and your program mysteriously crashes after \f(CW\*(C`main()\*(C'\fR has +completed, you may have an object that is being destroyed twice because +two definitions were merged. +.Sp +This option is no longer useful on most targets, now that support has +been added for putting variables into \s-1BSS\s0 without making them common. +.Ip "\fB\-fno-const-strings\fR" 4 +.IX Item "-fno-const-strings" +Give string constants type \f(CW\*(C`char *\*(C'\fR instead of type \f(CW\*(C`const +char *\*(C'\fR. By default, G++ uses type \f(CW\*(C`const char *\*(C'\fR as required by +the standard. Even if you use \fB\-fno-const-strings\fR, you cannot +actually modify the value of a string constant, unless you also use +\&\fB\-fwritable-strings\fR. +.Sp +This option might be removed in a future release of G++. For maximum +portability, you should structure your code so that it works with +string constants that have type \f(CW\*(C`const char *\*(C'\fR. +.Ip "\fB\-fdollars-in-identifiers\fR" 4 +.IX Item "-fdollars-in-identifiers" +Accept \fB$\fR in identifiers. You can also explicitly prohibit use of +\&\fB$\fR with the option \fB\-fno-dollars-in-identifiers\fR. (\s-1GNU\s0 C allows +\&\fB$\fR by default on most target systems, but there are a few exceptions.) +Traditional C allowed the character \fB$\fR to form part of +identifiers. However, \s-1ISO\s0 C and \*(C+ forbid \fB$\fR in identifiers. +.Ip "\fB\-fno-elide-constructors\fR" 4 +.IX Item "-fno-elide-constructors" +The \*(C+ standard allows an implementation to omit creating a temporary +which is only used to initialize another object of the same type. +Specifying this option disables that optimization, and forces G++ to +call the copy constructor in all cases. +.Ip "\fB\-fno-enforce-eh-specs\fR" 4 +.IX Item "-fno-enforce-eh-specs" +Don't check for violation of exception specifications at runtime. This +option violates the \*(C+ standard, but may be useful for reducing code +size in production builds, much like defining \fB\s-1NDEBUG\s0\fR. The compiler +will still optimize based on the exception specifications. +.Ip "\fB\-fexternal-templates\fR" 4 +.IX Item "-fexternal-templates" +Cause \fB#pragma interface\fR and \fBimplementation\fR to apply to +template instantiation; template instances are emitted or not according +to the location of the template definition. +.Sp +This option is deprecated. +.Ip "\fB\-falt-external-templates\fR" 4 +.IX Item "-falt-external-templates" +Similar to \fB\-fexternal-templates\fR, but template instances are +emitted or not according to the place where they are first instantiated. +.Sp +This option is deprecated. +.Ip "\fB\-ffor-scope\fR" 4 +.IX Item "-ffor-scope" +.PD 0 +.Ip "\fB\-fno-for-scope\fR" 4 +.IX Item "-fno-for-scope" +.PD +If \fB\-ffor-scope\fR is specified, the scope of variables declared in +a \fIfor-init-statement\fR is limited to the \fBfor\fR loop itself, +as specified by the \*(C+ standard. +If \fB\-fno-for-scope\fR is specified, the scope of variables declared in +a \fIfor-init-statement\fR extends to the end of the enclosing scope, +as was the case in old versions of G++, and other (traditional) +implementations of \*(C+. +.Sp +The default if neither flag is given to follow the standard, +but to allow and give a warning for old-style code that would +otherwise be invalid, or have different behavior. +.Ip "\fB\-fno-gnu-keywords\fR" 4 +.IX Item "-fno-gnu-keywords" +Do not recognize \f(CW\*(C`typeof\*(C'\fR as a keyword, so that code can use this +word as an identifier. You can use the keyword \f(CW\*(C`_\|_typeof_\|_\*(C'\fR instead. +\&\fB\-ansi\fR implies \fB\-fno-gnu-keywords\fR. +.Ip "\fB\-fno-implicit-templates\fR" 4 +.IX Item "-fno-implicit-templates" +Never emit code for non-inline templates which are instantiated +implicitly (i.e. by use); only emit code for explicit instantiations. +.Ip "\fB\-fno-implicit-inline-templates\fR" 4 +.IX Item "-fno-implicit-inline-templates" +Don't emit code for implicit instantiations of inline templates, either. +The default is to handle inlines differently so that compiles with and +without optimization will need the same set of explicit instantiations. +.Ip "\fB\-fno-implement-inlines\fR" 4 +.IX Item "-fno-implement-inlines" +To save space, do not emit out-of-line copies of inline functions +controlled by \fB#pragma implementation\fR. This will cause linker +errors if these functions are not inlined everywhere they are called. +.Ip "\fB\-fms-extensions\fR" 4 +.IX Item "-fms-extensions" +Disable pedantic warnings about constructs used in \s-1MFC\s0, such as implicit +int and getting a pointer to member function via non-standard syntax. +.Ip "\fB\-fno-nonansi-builtins\fR" 4 +.IX Item "-fno-nonansi-builtins" +Disable built-in declarations of functions that are not mandated by +\&\s-1ANSI/ISO\s0 C. These include \f(CW\*(C`ffs\*(C'\fR, \f(CW\*(C`alloca\*(C'\fR, \f(CW\*(C`_exit\*(C'\fR, +\&\f(CW\*(C`index\*(C'\fR, \f(CW\*(C`bzero\*(C'\fR, \f(CW\*(C`conjf\*(C'\fR, and other related functions. +.Ip "\fB\-fno-operator-names\fR" 4 +.IX Item "-fno-operator-names" +Do not treat the operator name keywords \f(CW\*(C`and\*(C'\fR, \f(CW\*(C`bitand\*(C'\fR, +\&\f(CW\*(C`bitor\*(C'\fR, \f(CW\*(C`compl\*(C'\fR, \f(CW\*(C`not\*(C'\fR, \f(CW\*(C`or\*(C'\fR and \f(CW\*(C`xor\*(C'\fR as +synonyms as keywords. +.Ip "\fB\-fno-optional-diags\fR" 4 +.IX Item "-fno-optional-diags" +Disable diagnostics that the standard says a compiler does not need to +issue. Currently, the only such diagnostic issued by G++ is the one for +a name having multiple meanings within a class. +.Ip "\fB\-fpermissive\fR" 4 +.IX Item "-fpermissive" +Downgrade messages about nonconformant code from errors to warnings. By +default, G++ effectively sets \fB\-pedantic-errors\fR without +\&\fB\-pedantic\fR; this option reverses that. This behavior and this +option are superseded by \fB\-pedantic\fR, which works as it does for \s-1GNU\s0 C. +.Ip "\fB\-frepo\fR" 4 +.IX Item "-frepo" +Enable automatic template instantiation at link time. This option also +implies \fB\-fno-implicit-templates\fR. +.Ip "\fB\-fno-rtti\fR" 4 +.IX Item "-fno-rtti" +Disable generation of information about every class with virtual +functions for use by the \*(C+ runtime type identification features +(\fBdynamic_cast\fR and \fBtypeid\fR). If you don't use those parts +of the language, you can save some space by using this flag. Note that +exception handling uses the same information, but it will generate it as +needed. +.Ip "\fB\-fstats\fR" 4 +.IX Item "-fstats" +Emit statistics about front-end processing at the end of the compilation. +This information is generally only useful to the G++ development team. +.Ip "\fB\-ftemplate-depth-\fR\fIn\fR" 4 +.IX Item "-ftemplate-depth-n" +Set the maximum instantiation depth for template classes to \fIn\fR. +A limit on the template instantiation depth is needed to detect +endless recursions during template class instantiation. \s-1ANSI/ISO\s0 \*(C+ +conforming programs must not rely on a maximum depth greater than 17. +.Ip "\fB\-fuse-cxa-atexit\fR" 4 +.IX Item "-fuse-cxa-atexit" +Register destructors for objects with static storage duration with the +\&\f(CW\*(C`_\|_cxa_atexit\*(C'\fR function rather than the \f(CW\*(C`atexit\*(C'\fR function. +This option is required for fully standards-compliant handling of static +destructors, but will only work if your C library supports +\&\f(CW\*(C`_\|_cxa_atexit\*(C'\fR. +.Ip "\fB\-fvtable-gc\fR" 4 +.IX Item "-fvtable-gc" +Emit special relocations for vtables and virtual function references +so that the linker can identify unused virtual functions and zero out +vtable slots that refer to them. This is most useful with +\&\fB\-ffunction-sections\fR and \fB\-Wl,\-\-gc-sections\fR, in order to +also discard the functions themselves. +.Sp +This optimization requires \s-1GNU\s0 as and \s-1GNU\s0 ld. Not all systems support +this option. \fB\-Wl,\-\-gc-sections\fR is ignored without \fB\-static\fR. +.Ip "\fB\-fno-weak\fR" 4 +.IX Item "-fno-weak" +Do not use weak symbol support, even if it is provided by the linker. +By default, G++ will use weak symbols if they are available. This +option exists only for testing, and should not be used by end-users; +it will result in inferior code and has no benefits. This option may +be removed in a future release of G++. +.Ip "\fB\-nostdinc++\fR" 4 +.IX Item "-nostdinc++" +Do not search for header files in the standard directories specific to +\&\*(C+, but do still search the other standard directories. (This option +is used when building the \*(C+ library.) +.PP +In addition, these optimization, warning, and code generation options +have meanings only for \*(C+ programs: +.Ip "\fB\-fno-default-inline\fR" 4 +.IX Item "-fno-default-inline" +Do not assume \fBinline\fR for functions defined inside a class scope. + Note that these +functions will have linkage like inline functions; they just won't be +inlined by default. +.Ip "\fB\-Wabi\fR (\*(C+ only)" 4 +.IX Item "-Wabi ( only)" +Warn when G++ generates code that is probably not compatible with the +vendor-neutral \*(C+ \s-1ABI\s0. Although an effort has been made to warn about +all such cases, there are probably some cases that are not warned about, +even though G++ is generating incompatible code. There may also be +cases where warnings are emitted even though the code that is generated +will be compatible. +.Sp +You should rewrite your code to avoid these warnings if you are +concerned about the fact that code generated by G++ may not be binary +compatible with code generated by other compilers. +.Sp +The known incompatibilites at this point include: +.RS 4 +.Ip "\(bu" 4 +Incorrect handling of tail-padding for bit-fields. G++ may attempt to +pack data into the same byte as a base class. For example: +.Sp +.Vb 2 +\& struct A { virtual void f(); int f1 : 1; }; +\& struct B : public A { int f2 : 1; }; +.Ve +In this case, G++ will place \f(CW\*(C`B::f2\*(C'\fR into the same byte +as\f(CW\*(C`A::f1\*(C'\fR; other compilers will not. You can avoid this problem +by explicitly padding \f(CW\*(C`A\*(C'\fR so that its size is a multiple of the +byte size on your platform; that will cause G++ and other compilers to +layout \f(CW\*(C`B\*(C'\fR identically. +.Ip "\(bu" 4 +Incorrect handling of tail-padding for virtual bases. G++ does not use +tail padding when laying out virtual bases. For example: +.Sp +.Vb 3 +\& struct A { virtual void f(); char c1; }; +\& struct B { B(); char c2; }; +\& struct C : public A, public virtual B {}; +.Ve +In this case, G++ will not place \f(CW\*(C`B\*(C'\fR into the tail-padding for +\&\f(CW\*(C`A\*(C'\fR; other compilers will. You can avoid this problem by +explicitly padding \f(CW\*(C`A\*(C'\fR so that its size is a multiple of its +alignment (ignoring virtual base classes); that will cause G++ and other +compilers to layout \f(CW\*(C`C\*(C'\fR identically. +.RE +.RS 4 +.RE +.Ip "\fB\-Wctor-dtor-privacy\fR (\*(C+ only)" 4 +.IX Item "-Wctor-dtor-privacy ( only)" +Warn when a class seems unusable, because all the constructors or +destructors in a class are private and the class has no friends or +public static member functions. +.Ip "\fB\-Wnon-virtual-dtor\fR (\*(C+ only)" 4 +.IX Item "-Wnon-virtual-dtor ( only)" +Warn when a class declares a non-virtual destructor that should probably +be virtual, because it looks like the class will be used polymorphically. +.Ip "\fB\-Wreorder\fR (\*(C+ only)" 4 +.IX Item "-Wreorder ( only)" +Warn when the order of member initializers given in the code does not +match the order in which they must be executed. For instance: +.Sp +.Vb 5 +\& struct A { +\& int i; +\& int j; +\& A(): j (0), i (1) { } +\& }; +.Ve +Here the compiler will warn that the member initializers for \fBi\fR +and \fBj\fR will be rearranged to match the declaration order of the +members. +.PP +The following \fB\-W...\fR options are not affected by \fB\-Wall\fR. +.Ip "\fB\-Weffc++\fR (\*(C+ only)" 4 +.IX Item "-Weffc++ ( only)" +Warn about violations of the following style guidelines from Scott Meyers' +\&\fIEffective \*(C+\fR book: +.RS 4 +.Ip "\(bu" 4 +Item 11: Define a copy constructor and an assignment operator for classes +with dynamically allocated memory. +.Ip "\(bu" 4 +Item 12: Prefer initialization to assignment in constructors. +.Ip "\(bu" 4 +Item 14: Make destructors virtual in base classes. +.Ip "\(bu" 4 +Item 15: Have \f(CW\*(C`operator=\*(C'\fR return a reference to \f(CW\*(C`*this\*(C'\fR. +.Ip "\(bu" 4 +Item 23: Don't try to return a reference when you must return an object. +.RE +.RS 4 +.Sp +and about violations of the following style guidelines from Scott Meyers' +\&\fIMore Effective \*(C+\fR book: +.RS 4 +.RE +.Ip "\(bu" 4 +Item 6: Distinguish between prefix and postfix forms of increment and +decrement operators. +.Ip "\(bu" 4 +Item 7: Never overload \f(CW\*(C`&&\*(C'\fR, \f(CW\*(C`||\*(C'\fR, or \f(CW\*(C`,\*(C'\fR. +.RE +.RS 4 +.Sp +If you use this option, you should be aware that the standard library +headers do not obey all of these guidelines; you can use \fBgrep \-v\fR +to filter out those warnings. +.RE +.Ip "\fB\-Wno-deprecated\fR (\*(C+ only)" 4 +.IX Item "-Wno-deprecated ( only)" +Do not warn about usage of deprecated features. +.Ip "\fB\-Wno-non-template-friend\fR (\*(C+ only)" 4 +.IX Item "-Wno-non-template-friend ( only)" +Disable warnings when non-templatized friend functions are declared +within a template. With the advent of explicit template specification +support in G++, if the name of the friend is an unqualified-id (i.e., +\&\fBfriend foo(int)\fR), the \*(C+ language specification demands that the +friend declare or define an ordinary, nontemplate function. (Section +14.5.3). Before G++ implemented explicit specification, unqualified-ids +could be interpreted as a particular specialization of a templatized +function. Because this non-conforming behavior is no longer the default +behavior for G++, \fB\-Wnon-template-friend\fR allows the compiler to +check existing code for potential trouble spots, and is on by default. +This new compiler behavior can be turned off with +\&\fB\-Wno-non-template-friend\fR which keeps the conformant compiler code +but disables the helpful warning. +.Ip "\fB\-Wold-style-cast\fR (\*(C+ only)" 4 +.IX Item "-Wold-style-cast ( only)" +Warn if an old-style (C-style) cast to a non-void type is used within +a \*(C+ program. The new-style casts (\fBstatic_cast\fR, +\&\fBreinterpret_cast\fR, and \fBconst_cast\fR) are less vulnerable to +unintended effects, and much easier to grep for. +.Ip "\fB\-Woverloaded-virtual\fR (\*(C+ only)" 4 +.IX Item "-Woverloaded-virtual ( only)" +Warn when a function declaration hides virtual functions from a +base class. For example, in: +.Sp +.Vb 3 +\& struct A { +\& virtual void f(); +\& }; +.Ve +.Vb 3 +\& struct B: public A { +\& void f(int); +\& }; +.Ve +the \f(CW\*(C`A\*(C'\fR class version of \f(CW\*(C`f\*(C'\fR is hidden in \f(CW\*(C`B\*(C'\fR, and code +like this: +.Sp +.Vb 2 +\& B* b; +\& b->f(); +.Ve +will fail to compile. +.Ip "\fB\-Wno-pmf-conversions\fR (\*(C+ only)" 4 +.IX Item "-Wno-pmf-conversions ( only)" +Disable the diagnostic for converting a bound pointer to member function +to a plain pointer. +.Ip "\fB\-Wsign-promo\fR (\*(C+ only)" 4 +.IX Item "-Wsign-promo ( only)" +Warn when overload resolution chooses a promotion from unsigned or +enumeral type to a signed type over a conversion to an unsigned type of +the same size. Previous versions of G++ would try to preserve +unsignedness, but the standard mandates the current behavior. +.Ip "\fB\-Wsynth\fR (\*(C+ only)" 4 +.IX Item "-Wsynth ( only)" +Warn when G++'s synthesis behavior does not match that of cfront. For +instance: +.Sp +.Vb 4 +\& struct A { +\& operator int (); +\& A& operator = (int); +\& }; +.Ve +.Vb 5 +\& main () +\& { +\& A a,b; +\& a = b; +\& } +.Ve +In this example, G++ will synthesize a default \fBA& operator = +(const A&);\fR, while cfront will use the user-defined \fBoperator =\fR. +.Sh "Options Controlling Objective-C Dialect" +.IX Subsection "Options Controlling Objective-C Dialect" +This section describes the command-line options that are only meaningful +for Objective-C programs; but you can also use most of the \s-1GNU\s0 compiler +options regardless of what language your program is in. For example, +you might compile a file \f(CW\*(C`some_class.m\*(C'\fR like this: +.PP +.Vb 1 +\& gcc -g -fgnu-runtime -O -c some_class.m +.Ve +In this example, only \fB\-fgnu-runtime\fR is an option meant only for +Objective-C programs; you can use the other options with any language +supported by \s-1GCC\s0. +.PP +Here is a list of options that are \fIonly\fR for compiling Objective-C +programs: +.Ip "\fB\-fconstant-string-class=\fR\fIclass-name\fR" 4 +.IX Item "-fconstant-string-class=class-name" +Use \fIclass-name\fR as the name of the class to instantiate for each +literal string specified with the syntax \f(CW\*(C`@"..."\*(C'\fR. The default +class name is \f(CW\*(C`NXConstantString\*(C'\fR. +.Ip "\fB\-fgnu-runtime\fR" 4 +.IX Item "-fgnu-runtime" +Generate object code compatible with the standard \s-1GNU\s0 Objective-C +runtime. This is the default for most types of systems. +.Ip "\fB\-fnext-runtime\fR" 4 +.IX Item "-fnext-runtime" +Generate output compatible with the NeXT runtime. This is the default +for NeXT-based systems, including Darwin and Mac \s-1OS\s0 X. +.Ip "\fB\-gen-decls\fR" 4 +.IX Item "-gen-decls" +Dump interface declarations for all classes seen in the source file to a +file named \fI\fIsourcename\fI.decl\fR. +.Ip "\fB\-Wno-protocol\fR" 4 +.IX Item "-Wno-protocol" +Do not warn if methods required by a protocol are not implemented +in the class adopting it. +.Ip "\fB\-Wselector\fR" 4 +.IX Item "-Wselector" +Warn if a selector has multiple methods of different types defined. +.Sh "Options to Control Diagnostic Messages Formatting" +.IX Subsection "Options to Control Diagnostic Messages Formatting" +Traditionally, diagnostic messages have been formatted irrespective of +the output device's aspect (e.g. its width, ...). The options described +below can be used to control the diagnostic messages formatting +algorithm, e.g. how many characters per line, how often source location +information should be reported. Right now, only the \*(C+ front end can +honor these options. However it is expected, in the near future, that +the remaining front ends would be able to digest them correctly. +.Ip "\fB\-fmessage-length=\fR\fIn\fR" 4 +.IX Item "-fmessage-length=n" +Try to format error messages so that they fit on lines of about \fIn\fR +characters. The default is 72 characters for \fBg++\fR and 0 for the rest of +the front ends supported by \s-1GCC\s0. If \fIn\fR is zero, then no +line-wrapping will be done; each error message will appear on a single +line. +.Ip "\fB\-fdiagnostics-show-location=once\fR" 4 +.IX Item "-fdiagnostics-show-location=once" +Only meaningful in line-wrapping mode. Instructs the diagnostic messages +reporter to emit \fIonce\fR source location information; that is, in +case the message is too long to fit on a single physical line and has to +be wrapped, the source location won't be emitted (as prefix) again, +over and over, in subsequent continuation lines. This is the default +behavior. +.Ip "\fB\-fdiagnostics-show-location=every-line\fR" 4 +.IX Item "-fdiagnostics-show-location=every-line" +Only meaningful in line-wrapping mode. Instructs the diagnostic +messages reporter to emit the same source location information (as +prefix) for physical lines that result from the process of breaking +a message which is too long to fit on a single line. +.Sh "Options to Request or Suppress Warnings" +.IX Subsection "Options to Request or Suppress Warnings" +Warnings are diagnostic messages that report constructions which +are not inherently erroneous but which are risky or suggest there +may have been an error. +.PP +You can request many specific warnings with options beginning \fB\-W\fR, +for example \fB\-Wimplicit\fR to request warnings on implicit +declarations. Each of these specific warning options also has a +negative form beginning \fB\-Wno-\fR to turn off warnings; +for example, \fB\-Wno-implicit\fR. This manual lists only one of the +two forms, whichever is not the default. +.PP +The following options control the amount and kinds of warnings produced +by \s-1GCC\s0; for further, language-specific options also refer to +\&\f(CW@ref\fR{\*(C+ Dialect Options} and \f(CW@ref\fR{Objective-C Dialect Options}. +.Ip "\fB\-fsyntax-only\fR" 4 +.IX Item "-fsyntax-only" +Check the code for syntax errors, but don't do anything beyond that. +.Ip "\fB\-pedantic\fR" 4 +.IX Item "-pedantic" +Issue all the warnings demanded by strict \s-1ISO\s0 C and \s-1ISO\s0 \*(C+; +reject all programs that use forbidden extensions, and some other +programs that do not follow \s-1ISO\s0 C and \s-1ISO\s0 \*(C+. For \s-1ISO\s0 C, follows the +version of the \s-1ISO\s0 C standard specified by any \fB\-std\fR option used. +.Sp +Valid \s-1ISO\s0 C and \s-1ISO\s0 \*(C+ programs should compile properly with or without +this option (though a rare few will require \fB\-ansi\fR or a +\&\fB\-std\fR option specifying the required version of \s-1ISO\s0 C). However, +without this option, certain \s-1GNU\s0 extensions and traditional C and \*(C+ +features are supported as well. With this option, they are rejected. +.Sp +\&\fB\-pedantic\fR does not cause warning messages for use of the +alternate keywords whose names begin and end with \fB_\|_\fR. Pedantic +warnings are also disabled in the expression that follows +\&\f(CW\*(C`_\|_extension_\|_\*(C'\fR. However, only system header files should use +these escape routes; application programs should avoid them. +.Sp +Some users try to use \fB\-pedantic\fR to check programs for strict \s-1ISO\s0 +C conformance. They soon find that it does not do quite what they want: +it finds some non-ISO practices, but not all\-\-\-only those for which +\&\s-1ISO\s0 C \fIrequires\fR a diagnostic, and some others for which +diagnostics have been added. +.Sp +A feature to report any failure to conform to \s-1ISO\s0 C might be useful in +some instances, but would require considerable additional work and would +be quite different from \fB\-pedantic\fR. We don't have plans to +support such a feature in the near future. +.Sp +Where the standard specified with \fB\-std\fR represents a \s-1GNU\s0 +extended dialect of C, such as \fBgnu89\fR or \fBgnu99\fR, there is a +corresponding \fIbase standard\fR, the version of \s-1ISO\s0 C on which the \s-1GNU\s0 +extended dialect is based. Warnings from \fB\-pedantic\fR are given +where they are required by the base standard. (It would not make sense +for such warnings to be given only for features not in the specified \s-1GNU\s0 +C dialect, since by definition the \s-1GNU\s0 dialects of C include all +features the compiler supports with the given option, and there would be +nothing to warn about.) +.Ip "\fB\-pedantic-errors\fR" 4 +.IX Item "-pedantic-errors" +Like \fB\-pedantic\fR, except that errors are produced rather than +warnings. +.Ip "\fB\-w\fR" 4 +.IX Item "-w" +Inhibit all warning messages. +.Ip "\fB\-Wno-import\fR" 4 +.IX Item "-Wno-import" +Inhibit warning messages about the use of \fB#import\fR. +.Ip "\fB\-Wchar-subscripts\fR" 4 +.IX Item "-Wchar-subscripts" +Warn if an array subscript has type \f(CW\*(C`char\*(C'\fR. This is a common cause +of error, as programmers often forget that this type is signed on some +machines. +.Ip "\fB\-Wcomment\fR" 4 +.IX Item "-Wcomment" +Warn whenever a comment-start sequence \fB/*\fR appears in a \fB/*\fR +comment, or whenever a Backslash-Newline appears in a \fB//\fR comment. +.Ip "\fB\-Wformat\fR" 4 +.IX Item "-Wformat" +Check calls to \f(CW\*(C`printf\*(C'\fR and \f(CW\*(C`scanf\*(C'\fR, etc., to make sure that +the arguments supplied have types appropriate to the format string +specified, and that the conversions specified in the format string make +sense. This includes standard functions, and others specified by format +attributes, in the \f(CW\*(C`printf\*(C'\fR, +\&\f(CW\*(C`scanf\*(C'\fR, \f(CW\*(C`strftime\*(C'\fR and \f(CW\*(C`strfmon\*(C'\fR (an X/Open extension, +not in the C standard) families. +.Sp +The formats are checked against the format features supported by \s-1GNU\s0 +libc version 2.2. These include all \s-1ISO\s0 C89 and C99 features, as well +as features from the Single Unix Specification and some \s-1BSD\s0 and \s-1GNU\s0 +extensions. Other library implementations may not support all these +features; \s-1GCC\s0 does not support warning about features that go beyond a +particular library's limitations. However, if \fB\-pedantic\fR is used +with \fB\-Wformat\fR, warnings will be given about format features not +in the selected standard version (but not for \f(CW\*(C`strfmon\*(C'\fR formats, +since those are not in any version of the C standard). +.Sp +\&\fB\-Wformat\fR is included in \fB\-Wall\fR. For more control over some +aspects of format checking, the options \fB\-Wno-format-y2k\fR, +\&\fB\-Wno-format-extra-args\fR, \fB\-Wformat-nonliteral\fR, +\&\fB\-Wformat-security\fR and \fB\-Wformat=2\fR are available, but are +not included in \fB\-Wall\fR. +.Ip "\fB\-Wno-format-y2k\fR" 4 +.IX Item "-Wno-format-y2k" +If \fB\-Wformat\fR is specified, do not warn about \f(CW\*(C`strftime\*(C'\fR +formats which may yield only a two-digit year. +.Ip "\fB\-Wno-format-extra-args\fR" 4 +.IX Item "-Wno-format-extra-args" +If \fB\-Wformat\fR is specified, do not warn about excess arguments to a +\&\f(CW\*(C`printf\*(C'\fR or \f(CW\*(C`scanf\*(C'\fR format function. The C standard specifies +that such arguments are ignored. +.Sp +Where the unused arguments lie between used arguments that are +specified with \fB$\fR operand number specifications, normally +warnings are still given, since the implementation could not know what +type to pass to \f(CW\*(C`va_arg\*(C'\fR to skip the unused arguments. However, +in the case of \f(CW\*(C`scanf\*(C'\fR formats, this option will suppress the +warning if the unused arguments are all pointers, since the Single +Unix Specification says that such unused arguments are allowed. +.Ip "\fB\-Wformat-nonliteral\fR" 4 +.IX Item "-Wformat-nonliteral" +If \fB\-Wformat\fR is specified, also warn if the format string is not a +string literal and so cannot be checked, unless the format function +takes its format arguments as a \f(CW\*(C`va_list\*(C'\fR. +.Ip "\fB\-Wformat-security\fR" 4 +.IX Item "-Wformat-security" +If \fB\-Wformat\fR is specified, also warn about uses of format +functions that represent possible security problems. At present, this +warns about calls to \f(CW\*(C`printf\*(C'\fR and \f(CW\*(C`scanf\*(C'\fR functions where the +format string is not a string literal and there are no format arguments, +as in \f(CW\*(C`printf (foo);\*(C'\fR. This may be a security hole if the format +string came from untrusted input and contains \fB%n\fR. (This is +currently a subset of what \fB\-Wformat-nonliteral\fR warns about, but +in future warnings may be added to \fB\-Wformat-security\fR that are not +included in \fB\-Wformat-nonliteral\fR.) +.Ip "\fB\-Wformat=2\fR" 4 +.IX Item "-Wformat=2" +Enable \fB\-Wformat\fR plus format checks not included in +\&\fB\-Wformat\fR. Currently equivalent to \fB\-Wformat +\&\-Wformat-nonliteral \-Wformat-security\fR. +.Ip "\fB\-Wimplicit-int\fR" 4 +.IX Item "-Wimplicit-int" +Warn when a declaration does not specify a type. +.Ip "\fB\-Wimplicit-function-declaration\fR" 4 +.IX Item "-Wimplicit-function-declaration" +.PD 0 +.Ip "\fB\-Werror-implicit-function-declaration\fR" 4 +.IX Item "-Werror-implicit-function-declaration" +.PD +Give a warning (or error) whenever a function is used before being +declared. +.Ip "\fB\-Wimplicit\fR" 4 +.IX Item "-Wimplicit" +Same as \fB\-Wimplicit-int\fR and \fB\-Wimplicit-function-declaration\fR. +.Ip "\fB\-Wmain\fR" 4 +.IX Item "-Wmain" +Warn if the type of \fBmain\fR is suspicious. \fBmain\fR should be a +function with external linkage, returning int, taking either zero +arguments, two, or three arguments of appropriate types. +.Ip "\fB\-Wmissing-braces\fR" 4 +.IX Item "-Wmissing-braces" +Warn if an aggregate or union initializer is not fully bracketed. In +the following example, the initializer for \fBa\fR is not fully +bracketed, but that for \fBb\fR is fully bracketed. +.Sp +.Vb 2 +\& int a[2][2] = { 0, 1, 2, 3 }; +\& int b[2][2] = { { 0, 1 }, { 2, 3 } }; +.Ve +.Ip "\fB\-Wparentheses\fR" 4 +.IX Item "-Wparentheses" +Warn if parentheses are omitted in certain contexts, such +as when there is an assignment in a context where a truth value +is expected, or when operators are nested whose precedence people +often get confused about. +.Sp +Also warn about constructions where there may be confusion to which +\&\f(CW\*(C`if\*(C'\fR statement an \f(CW\*(C`else\*(C'\fR branch belongs. Here is an example of +such a case: +.Sp +.Vb 7 +\& { +\& if (a) +\& if (b) +\& foo (); +\& else +\& bar (); +\& } +.Ve +In C, every \f(CW\*(C`else\*(C'\fR branch belongs to the innermost possible \f(CW\*(C`if\*(C'\fR +statement, which in this example is \f(CW\*(C`if (b)\*(C'\fR. This is often not +what the programmer expected, as illustrated in the above example by +indentation the programmer chose. When there is the potential for this +confusion, \s-1GCC\s0 will issue a warning when this flag is specified. +To eliminate the warning, add explicit braces around the innermost +\&\f(CW\*(C`if\*(C'\fR statement so there is no way the \f(CW\*(C`else\*(C'\fR could belong to +the enclosing \f(CW\*(C`if\*(C'\fR. The resulting code would look like this: +.Sp +.Vb 9 +\& { +\& if (a) +\& { +\& if (b) +\& foo (); +\& else +\& bar (); +\& } +\& } +.Ve +.Ip "\fB\-Wsequence-point\fR" 4 +.IX Item "-Wsequence-point" +Warn about code that may have undefined semantics because of violations +of sequence point rules in the C standard. +.Sp +The C standard defines the order in which expressions in a C program are +evaluated in terms of \fIsequence points\fR, which represent a partial +ordering between the execution of parts of the program: those executed +before the sequence point, and those executed after it. These occur +after the evaluation of a full expression (one which is not part of a +larger expression), after the evaluation of the first operand of a +\&\f(CW\*(C`&&\*(C'\fR, \f(CW\*(C`||\*(C'\fR, \f(CW\*(C`? :\*(C'\fR or \f(CW\*(C`,\*(C'\fR (comma) operator, before a +function is called (but after the evaluation of its arguments and the +expression denoting the called function), and in certain other places. +Other than as expressed by the sequence point rules, the order of +evaluation of subexpressions of an expression is not specified. All +these rules describe only a partial order rather than a total order, +since, for example, if two functions are called within one expression +with no sequence point between them, the order in which the functions +are called is not specified. However, the standards committee have +ruled that function calls do not overlap. +.Sp +It is not specified when between sequence points modifications to the +values of objects take effect. Programs whose behavior depends on this +have undefined behavior; the C standard specifies that ``Between the +previous and next sequence point an object shall have its stored value +modified at most once by the evaluation of an expression. Furthermore, +the prior value shall be read only to determine the value to be +stored.''. If a program breaks these rules, the results on any +particular implementation are entirely unpredictable. +.Sp +Examples of code with undefined behavior are \f(CW\*(C`a = a++;\*(C'\fR, \f(CW\*(C`a[n] += b[n++]\*(C'\fR and \f(CW\*(C`a[i++] = i;\*(C'\fR. Some more complicated cases are not +diagnosed by this option, and it may give an occasional false positive +result, but in general it has been found fairly effective at detecting +this sort of problem in programs. +.Sp +The present implementation of this option only works for C programs. A +future implementation may also work for \*(C+ programs. +.Sp +The C standard is worded confusingly, therefore there is some debate +over the precise meaning of the sequence point rules in subtle cases. +Links to discussions of the problem, including proposed formal +definitions, may be found on our readings page, at +<\fBhttp://gcc.gnu.org/readings.html\fR>. +.Ip "\fB\-Wreturn-type\fR" 4 +.IX Item "-Wreturn-type" +Warn whenever a function is defined with a return-type that defaults to +\&\f(CW\*(C`int\*(C'\fR. Also warn about any \f(CW\*(C`return\*(C'\fR statement with no +return-value in a function whose return-type is not \f(CW\*(C`void\*(C'\fR. +.Sp +For \*(C+, a function without return type always produces a diagnostic +message, even when \fB\-Wno-return-type\fR is specified. The only +exceptions are \fBmain\fR and functions defined in system headers. +.Ip "\fB\-Wswitch\fR" 4 +.IX Item "-Wswitch" +Warn whenever a \f(CW\*(C`switch\*(C'\fR statement has an index of enumeral type +and lacks a \f(CW\*(C`case\*(C'\fR for one or more of the named codes of that +enumeration. (The presence of a \f(CW\*(C`default\*(C'\fR label prevents this +warning.) \f(CW\*(C`case\*(C'\fR labels outside the enumeration range also +provoke warnings when this option is used. +.Ip "\fB\-Wtrigraphs\fR" 4 +.IX Item "-Wtrigraphs" +Warn if any trigraphs are encountered that might change the meaning of +the program (trigraphs within comments are not warned about). +.Ip "\fB\-Wunused-function\fR" 4 +.IX Item "-Wunused-function" +Warn whenever a static function is declared but not defined or a +non\e-inline static function is unused. +.Ip "\fB\-Wunused-label\fR" 4 +.IX Item "-Wunused-label" +Warn whenever a label is declared but not used. +.Sp +To suppress this warning use the \fBunused\fR attribute. +.Ip "\fB\-Wunused-parameter\fR" 4 +.IX Item "-Wunused-parameter" +Warn whenever a function parameter is unused aside from its declaration. +.Sp +To suppress this warning use the \fBunused\fR attribute. +.Ip "\fB\-Wunused-variable\fR" 4 +.IX Item "-Wunused-variable" +Warn whenever a local variable or non-constant static variable is unused +aside from its declaration +.Sp +To suppress this warning use the \fBunused\fR attribute. +.Ip "\fB\-Wunused-value\fR" 4 +.IX Item "-Wunused-value" +Warn whenever a statement computes a result that is explicitly not used. +.Sp +To suppress this warning cast the expression to \fBvoid\fR. +.Ip "\fB\-Wunused\fR" 4 +.IX Item "-Wunused" +All all the above \fB\-Wunused\fR options combined. +.Sp +In order to get a warning about an unused function parameter, you must +either specify \fB\-W \-Wunused\fR or separately specify +\&\fB\-Wunused-parameter\fR. +.Ip "\fB\-Wuninitialized\fR" 4 +.IX Item "-Wuninitialized" +Warn if an automatic variable is used without first being initialized or +if a variable may be clobbered by a \f(CW\*(C`setjmp\*(C'\fR call. +.Sp +These warnings are possible only in optimizing compilation, +because they require data flow information that is computed only +when optimizing. If you don't specify \fB\-O\fR, you simply won't +get these warnings. +.Sp +These warnings occur only for variables that are candidates for +register allocation. Therefore, they do not occur for a variable that +is declared \f(CW\*(C`volatile\*(C'\fR, or whose address is taken, or whose size +is other than 1, 2, 4 or 8 bytes. Also, they do not occur for +structures, unions or arrays, even when they are in registers. +.Sp +Note that there may be no warning about a variable that is used only +to compute a value that itself is never used, because such +computations may be deleted by data flow analysis before the warnings +are printed. +.Sp +These warnings are made optional because \s-1GCC\s0 is not smart +enough to see all the reasons why the code might be correct +despite appearing to have an error. Here is one example of how +this can happen: +.Sp +.Vb 12 +\& { +\& int x; +\& switch (y) +\& { +\& case 1: x = 1; +\& break; +\& case 2: x = 4; +\& break; +\& case 3: x = 5; +\& } +\& foo (x); +\& } +.Ve +If the value of \f(CW\*(C`y\*(C'\fR is always 1, 2 or 3, then \f(CW\*(C`x\*(C'\fR is +always initialized, but \s-1GCC\s0 doesn't know this. Here is +another common case: +.Sp +.Vb 6 +\& { +\& int save_y; +\& if (change_y) save_y = y, y = new_y; +\& ... +\& if (change_y) y = save_y; +\& } +.Ve +This has no bug because \f(CW\*(C`save_y\*(C'\fR is used only if it is set. +.Sp +This option also warns when a non-volatile automatic variable might be +changed by a call to \f(CW\*(C`longjmp\*(C'\fR. These warnings as well are possible +only in optimizing compilation. +.Sp +The compiler sees only the calls to \f(CW\*(C`setjmp\*(C'\fR. It cannot know +where \f(CW\*(C`longjmp\*(C'\fR will be called; in fact, a signal handler could +call it at any point in the code. As a result, you may get a warning +even when there is in fact no problem because \f(CW\*(C`longjmp\*(C'\fR cannot +in fact be called at the place which would cause a problem. +.Sp +Some spurious warnings can be avoided if you declare all the functions +you use that never return as \f(CW\*(C`noreturn\*(C'\fR. +.Ip "\fB\-Wreorder\fR (\*(C+ only)" 4 +.IX Item "-Wreorder ( only)" +Warn when the order of member initializers given in the code does not +match the order in which they must be executed. For instance: +.Ip "\fB\-Wunknown-pragmas\fR" 4 +.IX Item "-Wunknown-pragmas" +Warn when a #pragma directive is encountered which is not understood by +\&\s-1GCC\s0. If this command line option is used, warnings will even be issued +for unknown pragmas in system header files. This is not the case if +the warnings were only enabled by the \fB\-Wall\fR command line option. +.Ip "\fB\-Wall\fR" 4 +.IX Item "-Wall" +All of the above \fB\-W\fR options combined. This enables all the +warnings about constructions that some users consider questionable, and +that are easy to avoid (or modify to prevent the warning), even in +conjunction with macros. +.Ip "\fB\-Wdiv-by-zero\fR" 4 +.IX Item "-Wdiv-by-zero" +Warn about compile-time integer division by zero. This is default. To +inhibit the warning messages, use \fB\-Wno-div-by-zero\fR. Floating +point division by zero is not warned about, as it can be a legitimate +way of obtaining infinities and NaNs. +.Ip "\fB\-Wmultichar\fR" 4 +.IX Item "-Wmultichar" +Warn if a multicharacter constant (\fB'\s-1FOOF\s0'\fR) is used. This is +default. To inhibit the warning messages, use \fB\-Wno-multichar\fR. +Usually they indicate a typo in the user's code, as they have +implementation-defined values, and should not be used in portable code. +.Ip "\fB\-Wsystem-headers\fR" 4 +.IX Item "-Wsystem-headers" +Print warning messages for constructs found in system header files. +Warnings from system headers are normally suppressed, on the assumption +that they usually do not indicate real problems and would only make the +compiler output harder to read. Using this command line option tells +\&\s-1GCC\s0 to emit warnings from system headers as if they occurred in user +code. However, note that using \fB\-Wall\fR in conjunction with this +option will \fInot\fR warn about unknown pragmas in system +headers\-\-\-for that, \fB\-Wunknown-pragmas\fR must also be used. +.PP +The following \fB\-W...\fR options are not implied by \fB\-Wall\fR. +Some of them warn about constructions that users generally do not +consider questionable, but which occasionally you might wish to check +for; others warn about constructions that are necessary or hard to avoid +in some cases, and there is no simple way to modify the code to suppress +the warning. +.Ip "\fB\-W\fR" 4 +.IX Item "-W" +Print extra warning messages for these events: +.RS 4 +.Ip "\(bu" 4 +A function can return either with or without a value. (Falling +off the end of the function body is considered returning without +a value.) For example, this function would evoke such a +warning: +.Sp +.Vb 5 +\& foo (a) +\& { +\& if (a > 0) +\& return a; +\& } +.Ve +.Ip "\(bu" 4 +An expression-statement or the left-hand side of a comma expression +contains no side effects. +To suppress the warning, cast the unused expression to void. +For example, an expression such as \fBx[i,j]\fR will cause a warning, +but \fBx[(void)i,j]\fR will not. +.Ip "\(bu" 4 +An unsigned value is compared against zero with \fB<\fR or \fB<=\fR. +.Ip "\(bu" 4 +A comparison like \fBx<=y<=z\fR appears; this is equivalent to +\&\fB(x<=y ? 1 : 0) <= z\fR, which is a different interpretation from +that of ordinary mathematical notation. +.Ip "\(bu" 4 +Storage-class specifiers like \f(CW\*(C`static\*(C'\fR are not the first things in +a declaration. According to the C Standard, this usage is obsolescent. +.Ip "\(bu" 4 +The return type of a function has a type qualifier such as \f(CW\*(C`const\*(C'\fR. +Such a type qualifier has no effect, since the value returned by a +function is not an lvalue. (But don't warn about the \s-1GNU\s0 extension of +\&\f(CW\*(C`volatile void\*(C'\fR return types. That extension will be warned about +if \fB\-pedantic\fR is specified.) +.Ip "\(bu" 4 +If \fB\-Wall\fR or \fB\-Wunused\fR is also specified, warn about unused +arguments. +.Ip "\(bu" 4 +A comparison between signed and unsigned values could produce an +incorrect result when the signed value is converted to unsigned. +(But don't warn if \fB\-Wno-sign-compare\fR is also specified.) +.Ip "\(bu" 4 +An aggregate has a partly bracketed initializer. +For example, the following code would evoke such a warning, +because braces are missing around the initializer for \f(CW\*(C`x.h\*(C'\fR: +.Sp +.Vb 3 +\& struct s { int f, g; }; +\& struct t { struct s h; int i; }; +\& struct t x = { 1, 2, 3 }; +.Ve +.Ip "\(bu" 4 +An aggregate has an initializer which does not initialize all members. +For example, the following code would cause such a warning, because +\&\f(CW\*(C`x.h\*(C'\fR would be implicitly initialized to zero: +.Sp +.Vb 2 +\& struct s { int f, g, h; }; +\& struct s x = { 3, 4 }; +.Ve +.RE +.RS 4 +.RE +.Ip "\fB\-Wfloat-equal\fR" 4 +.IX Item "-Wfloat-equal" +Warn if floating point values are used in equality comparisons. +.Sp +The idea behind this is that sometimes it is convenient (for the +programmer) to consider floating-point values as approximations to +infinitely precise real numbers. If you are doing this, then you need +to compute (by analysing the code, or in some other way) the maximum or +likely maximum error that the computation introduces, and allow for it +when performing comparisons (and when producing output, but that's a +different problem). In particular, instead of testing for equality, you +would check to see whether the two values have ranges that overlap; and +this is done with the relational operators, so equality comparisons are +probably mistaken. +.Ip "\fB\-Wtraditional\fR (C only)" 4 +.IX Item "-Wtraditional (C only)" +Warn about certain constructs that behave differently in traditional and +\&\s-1ISO\s0 C. Also warn about \s-1ISO\s0 C constructs that have no traditional C +equivalent, and/or problematic constructs which should be avoided. +.RS 4 +.Ip "\(bu" 4 +Macro parameters that appear within string literals in the macro body. +In traditional C macro replacement takes place within string literals, +but does not in \s-1ISO\s0 C. +.Ip "\(bu" 4 +In traditional C, some preprocessor directives did not exist. +Traditional preprocessors would only consider a line to be a directive +if the \fB#\fR appeared in column 1 on the line. Therefore +\&\fB\-Wtraditional\fR warns about directives that traditional C +understands but would ignore because the \fB#\fR does not appear as the +first character on the line. It also suggests you hide directives like +\&\fB#pragma\fR not understood by traditional C by indenting them. Some +traditional implementations would not recognize \fB#elif\fR, so it +suggests avoiding it altogether. +.Ip "\(bu" 4 +A function-like macro that appears without arguments. +.Ip "\(bu" 4 +The unary plus operator. +.Ip "\(bu" 4 +The \fBU\fR integer constant suffix, or the \fBF\fR or \fBL\fR floating point +constant suffixes. (Traditional C does support the \fBL\fR suffix on integer +constants.) Note, these suffixes appear in macros defined in the system +headers of most modern systems, e.g. the \fB_MIN\fR/\fB_MAX\fR macros in \f(CW\*(C`<limits.h>\*(C'\fR. +Use of these macros in user code might normally lead to spurious +warnings, however gcc's integrated preprocessor has enough context to +avoid warning in these cases. +.Ip "\(bu" 4 +A function declared external in one block and then used after the end of +the block. +.Ip "\(bu" 4 +A \f(CW\*(C`switch\*(C'\fR statement has an operand of type \f(CW\*(C`long\*(C'\fR. +.Ip "\(bu" 4 +A non-\f(CW\*(C`static\*(C'\fR function declaration follows a \f(CW\*(C`static\*(C'\fR one. +This construct is not accepted by some traditional C compilers. +.Ip "\(bu" 4 +The \s-1ISO\s0 type of an integer constant has a different width or +signedness from its traditional type. This warning is only issued if +the base of the constant is ten. I.e. hexadecimal or octal values, which +typically represent bit patterns, are not warned about. +.Ip "\(bu" 4 +Usage of \s-1ISO\s0 string concatenation is detected. +.Ip "\(bu" 4 +Initialization of automatic aggregates. +.Ip "\(bu" 4 +Identifier conflicts with labels. Traditional C lacks a separate +namespace for labels. +.Ip "\(bu" 4 +Initialization of unions. If the initializer is zero, the warning is +omitted. This is done under the assumption that the zero initializer in +user code appears conditioned on e.g. \f(CW\*(C`_\|_STDC_\|_\*(C'\fR to avoid missing +initializer warnings and relies on default initialization to zero in the +traditional C case. +.Ip "\(bu" 4 +Conversions by prototypes between fixed/floating point values and vice +versa. The absence of these prototypes when compiling with traditional +C would cause serious problems. This is a subset of the possible +conversion warnings, for the full set use \fB\-Wconversion\fR. +.RE +.RS 4 +.RE +.Ip "\fB\-Wundef\fR" 4 +.IX Item "-Wundef" +Warn if an undefined identifier is evaluated in an \fB#if\fR directive. +.Ip "\fB\-Wshadow\fR" 4 +.IX Item "-Wshadow" +Warn whenever a local variable shadows another local variable, parameter or +global variable or whenever a built-in function is shadowed. +.Ip "\fB\-Wlarger-than-\fR\fIlen\fR" 4 +.IX Item "-Wlarger-than-len" +Warn whenever an object of larger than \fIlen\fR bytes is defined. +.Ip "\fB\-Wpointer-arith\fR" 4 +.IX Item "-Wpointer-arith" +Warn about anything that depends on the ``size of'' a function type or +of \f(CW\*(C`void\*(C'\fR. \s-1GNU\s0 C assigns these types a size of 1, for +convenience in calculations with \f(CW\*(C`void *\*(C'\fR pointers and pointers +to functions. +.Ip "\fB\-Wbad-function-cast\fR (C only)" 4 +.IX Item "-Wbad-function-cast (C only)" +Warn whenever a function call is cast to a non-matching type. +For example, warn if \f(CW\*(C`int malloc()\*(C'\fR is cast to \f(CW\*(C`anything *\*(C'\fR. +.Ip "\fB\-Wcast-qual\fR" 4 +.IX Item "-Wcast-qual" +Warn whenever a pointer is cast so as to remove a type qualifier from +the target type. For example, warn if a \f(CW\*(C`const char *\*(C'\fR is cast +to an ordinary \f(CW\*(C`char *\*(C'\fR. +.Ip "\fB\-Wcast-align\fR" 4 +.IX Item "-Wcast-align" +Warn whenever a pointer is cast such that the required alignment of the +target is increased. For example, warn if a \f(CW\*(C`char *\*(C'\fR is cast to +an \f(CW\*(C`int *\*(C'\fR on machines where integers can only be accessed at +two- or four-byte boundaries. +.Ip "\fB\-Wwrite-strings\fR" 4 +.IX Item "-Wwrite-strings" +When compiling C, give string constants the type \f(CW\*(C`const +char[\f(CIlength\f(CW]\*(C'\fR so that +copying the address of one into a non-\f(CW\*(C`const\*(C'\fR \f(CW\*(C`char *\*(C'\fR +pointer will get a warning; when compiling \*(C+, warn about the +deprecated conversion from string constants to \f(CW\*(C`char *\*(C'\fR. +These warnings will help you find at +compile time code that can try to write into a string constant, but +only if you have been very careful about using \f(CW\*(C`const\*(C'\fR in +declarations and prototypes. Otherwise, it will just be a nuisance; +this is why we did not make \fB\-Wall\fR request these warnings. +.Ip "\fB\-Wconversion\fR" 4 +.IX Item "-Wconversion" +Warn if a prototype causes a type conversion that is different from what +would happen to the same argument in the absence of a prototype. This +includes conversions of fixed point to floating and vice versa, and +conversions changing the width or signedness of a fixed point argument +except when the same as the default promotion. +.Sp +Also, warn if a negative integer constant expression is implicitly +converted to an unsigned type. For example, warn about the assignment +\&\f(CW\*(C`x = \-1\*(C'\fR if \f(CW\*(C`x\*(C'\fR is unsigned. But do not warn about explicit +casts like \f(CW\*(C`(unsigned) \-1\*(C'\fR. +.Ip "\fB\-Wsign-compare\fR" 4 +.IX Item "-Wsign-compare" +Warn when a comparison between signed and unsigned values could produce +an incorrect result when the signed value is converted to unsigned. +This warning is also enabled by \fB\-W\fR; to get the other warnings +of \fB\-W\fR without this warning, use \fB\-W \-Wno-sign-compare\fR. +.Ip "\fB\-Waggregate-return\fR" 4 +.IX Item "-Waggregate-return" +Warn if any functions that return structures or unions are defined or +called. (In languages where you can return an array, this also elicits +a warning.) +.Ip "\fB\-Wstrict-prototypes\fR (C only)" 4 +.IX Item "-Wstrict-prototypes (C only)" +Warn if a function is declared or defined without specifying the +argument types. (An old-style function definition is permitted without +a warning if preceded by a declaration which specifies the argument +types.) +.Ip "\fB\-Wmissing-prototypes\fR (C only)" 4 +.IX Item "-Wmissing-prototypes (C only)" +Warn if a global function is defined without a previous prototype +declaration. This warning is issued even if the definition itself +provides a prototype. The aim is to detect global functions that fail +to be declared in header files. +.Ip "\fB\-Wmissing-declarations\fR" 4 +.IX Item "-Wmissing-declarations" +Warn if a global function is defined without a previous declaration. +Do so even if the definition itself provides a prototype. +Use this option to detect global functions that are not declared in +header files. +.Ip "\fB\-Wmissing-noreturn\fR" 4 +.IX Item "-Wmissing-noreturn" +Warn about functions which might be candidates for attribute \f(CW\*(C`noreturn\*(C'\fR. +Note these are only possible candidates, not absolute ones. Care should +be taken to manually verify functions actually do not ever return before +adding the \f(CW\*(C`noreturn\*(C'\fR attribute, otherwise subtle code generation +bugs could be introduced. You will not get a warning for \f(CW\*(C`main\*(C'\fR in +hosted C environments. +.Ip "\fB\-Wmissing-format-attribute\fR" 4 +.IX Item "-Wmissing-format-attribute" +If \fB\-Wformat\fR is enabled, also warn about functions which might be +candidates for \f(CW\*(C`format\*(C'\fR attributes. Note these are only possible +candidates, not absolute ones. \s-1GCC\s0 will guess that \f(CW\*(C`format\*(C'\fR +attributes might be appropriate for any function that calls a function +like \f(CW\*(C`vprintf\*(C'\fR or \f(CW\*(C`vscanf\*(C'\fR, but this might not always be the +case, and some functions for which \f(CW\*(C`format\*(C'\fR attributes are +appropriate may not be detected. This option has no effect unless +\&\fB\-Wformat\fR is enabled (possibly by \fB\-Wall\fR). +.Ip "\fB\-Wno-deprecated-declarations\fR" 4 +.IX Item "-Wno-deprecated-declarations" +Do not warn about uses of functions, variables, and types marked as +deprecated by using the \f(CW\*(C`deprecated\*(C'\fR attribute. +(@pxref{Function Attributes}, \f(CW@pxref\fR{Variable Attributes}, +\&\f(CW@pxref\fR{Type Attributes}.) +.Ip "\fB\-Wpacked\fR" 4 +.IX Item "-Wpacked" +Warn if a structure is given the packed attribute, but the packed +attribute has no effect on the layout or size of the structure. +Such structures may be mis-aligned for little benefit. For +instance, in this code, the variable \f(CW\*(C`f.x\*(C'\fR in \f(CW\*(C`struct bar\*(C'\fR +will be misaligned even though \f(CW\*(C`struct bar\*(C'\fR does not itself +have the packed attribute: +.Sp +.Vb 8 +\& struct foo { +\& int x; +\& char a, b, c, d; +\& } __attribute__((packed)); +\& struct bar { +\& char z; +\& struct foo f; +\& }; +.Ve +.Ip "\fB\-Wpadded\fR" 4 +.IX Item "-Wpadded" +Warn if padding is included in a structure, either to align an element +of the structure or to align the whole structure. Sometimes when this +happens it is possible to rearrange the fields of the structure to +reduce the padding and so make the structure smaller. +.Ip "\fB\-Wredundant-decls\fR" 4 +.IX Item "-Wredundant-decls" +Warn if anything is declared more than once in the same scope, even in +cases where multiple declaration is valid and changes nothing. +.Ip "\fB\-Wnested-externs\fR (C only)" 4 +.IX Item "-Wnested-externs (C only)" +Warn if an \f(CW\*(C`extern\*(C'\fR declaration is encountered within a function. +.Ip "\fB\-Wunreachable-code\fR" 4 +.IX Item "-Wunreachable-code" +Warn if the compiler detects that code will never be executed. +.Sp +This option is intended to warn when the compiler detects that at +least a whole line of source code will never be executed, because +some condition is never satisfied or because it is after a +procedure that never returns. +.Sp +It is possible for this option to produce a warning even though there +are circumstances under which part of the affected line can be executed, +so care should be taken when removing apparently-unreachable code. +.Sp +For instance, when a function is inlined, a warning may mean that the +line is unreachable in only one inlined copy of the function. +.Sp +This option is not made part of \fB\-Wall\fR because in a debugging +version of a program there is often substantial code which checks +correct functioning of the program and is, hopefully, unreachable +because the program does work. Another common use of unreachable +code is to provide behavior which is selectable at compile-time. +.Ip "\fB\-Winline\fR" 4 +.IX Item "-Winline" +Warn if a function can not be inlined and it was declared as inline. +.Ip "\fB\-Wlong-long\fR" 4 +.IX Item "-Wlong-long" +Warn if \fBlong long\fR type is used. This is default. To inhibit +the warning messages, use \fB\-Wno-long-long\fR. Flags +\&\fB\-Wlong-long\fR and \fB\-Wno-long-long\fR are taken into account +only when \fB\-pedantic\fR flag is used. +.Ip "\fB\-Wdisabled-optimization\fR" 4 +.IX Item "-Wdisabled-optimization" +Warn if a requested optimization pass is disabled. This warning does +not generally indicate that there is anything wrong with your code; it +merely indicates that \s-1GCC\s0's optimizers were unable to handle the code +effectively. Often, the problem is that your code is too big or too +complex; \s-1GCC\s0 will refuse to optimize programs when the optimization +itself is likely to take inordinate amounts of time. +.Ip "\fB\-Werror\fR" 4 +.IX Item "-Werror" +Make all warnings into errors. +.Sh "Options for Debugging Your Program or \s-1GCC\s0" +.IX Subsection "Options for Debugging Your Program or GCC" +\&\s-1GCC\s0 has various special options that are used for debugging +either your program or \s-1GCC:\s0 +.Ip "\fB\-g\fR" 4 +.IX Item "-g" +Produce debugging information in the operating system's native format +(stabs, \s-1COFF\s0, \s-1XCOFF\s0, or \s-1DWARF\s0). \s-1GDB\s0 can work with this debugging +information. +.Sp +On most systems that use stabs format, \fB\-g\fR enables use of extra +debugging information that only \s-1GDB\s0 can use; this extra information +makes debugging work better in \s-1GDB\s0 but will probably make other debuggers +crash or +refuse to read the program. If you want to control for certain whether +to generate the extra information, use \fB\-gstabs+\fR, \fB\-gstabs\fR, +\&\fB\-gxcoff+\fR, \fB\-gxcoff\fR, \fB\-gdwarf-1+\fR, \fB\-gdwarf-1\fR, +or \fB\-gvms\fR (see below). +.Sp +Unlike most other C compilers, \s-1GCC\s0 allows you to use \fB\-g\fR with +\&\fB\-O\fR. The shortcuts taken by optimized code may occasionally +produce surprising results: some variables you declared may not exist +at all; flow of control may briefly move where you did not expect it; +some statements may not be executed because they compute constant +results or their values were already at hand; some statements may +execute in different places because they were moved out of loops. +.Sp +Nevertheless it proves possible to debug optimized output. This makes +it reasonable to use the optimizer for programs that might have bugs. +.Sp +The following options are useful when \s-1GCC\s0 is generated with the +capability for more than one debugging format. +.Ip "\fB\-ggdb\fR" 4 +.IX Item "-ggdb" +Produce debugging information for use by \s-1GDB\s0. This means to use the +most expressive format available (\s-1DWARF\s0 2, stabs, or the native format +if neither of those are supported), including \s-1GDB\s0 extensions if at all +possible. +.Ip "\fB\-gstabs\fR" 4 +.IX Item "-gstabs" +Produce debugging information in stabs format (if that is supported), +without \s-1GDB\s0 extensions. This is the format used by \s-1DBX\s0 on most \s-1BSD\s0 +systems. On \s-1MIPS\s0, Alpha and System V Release 4 systems this option +produces stabs debugging output which is not understood by \s-1DBX\s0 or \s-1SDB\s0. +On System V Release 4 systems this option requires the \s-1GNU\s0 assembler. +.Ip "\fB\-gstabs+\fR" 4 +.IX Item "-gstabs+" +Produce debugging information in stabs format (if that is supported), +using \s-1GNU\s0 extensions understood only by the \s-1GNU\s0 debugger (\s-1GDB\s0). The +use of these extensions is likely to make other debuggers crash or +refuse to read the program. +.Ip "\fB\-gcoff\fR" 4 +.IX Item "-gcoff" +Produce debugging information in \s-1COFF\s0 format (if that is supported). +This is the format used by \s-1SDB\s0 on most System V systems prior to +System V Release 4. +.Ip "\fB\-gxcoff\fR" 4 +.IX Item "-gxcoff" +Produce debugging information in \s-1XCOFF\s0 format (if that is supported). +This is the format used by the \s-1DBX\s0 debugger on \s-1IBM\s0 \s-1RS/6000\s0 systems. +.Ip "\fB\-gxcoff+\fR" 4 +.IX Item "-gxcoff+" +Produce debugging information in \s-1XCOFF\s0 format (if that is supported), +using \s-1GNU\s0 extensions understood only by the \s-1GNU\s0 debugger (\s-1GDB\s0). The +use of these extensions is likely to make other debuggers crash or +refuse to read the program, and may cause assemblers other than the \s-1GNU\s0 +assembler (\s-1GAS\s0) to fail with an error. +.Ip "\fB\-gdwarf\fR" 4 +.IX Item "-gdwarf" +Produce debugging information in \s-1DWARF\s0 version 1 format (if that is +supported). This is the format used by \s-1SDB\s0 on most System V Release 4 +systems. +.Ip "\fB\-gdwarf+\fR" 4 +.IX Item "-gdwarf+" +Produce debugging information in \s-1DWARF\s0 version 1 format (if that is +supported), using \s-1GNU\s0 extensions understood only by the \s-1GNU\s0 debugger +(\s-1GDB\s0). The use of these extensions is likely to make other debuggers +crash or refuse to read the program. +.Ip "\fB\-gdwarf-2\fR" 4 +.IX Item "-gdwarf-2" +Produce debugging information in \s-1DWARF\s0 version 2 format (if that is +supported). This is the format used by \s-1DBX\s0 on \s-1IRIX\s0 6. +.Ip "\fB\-gvms\fR" 4 +.IX Item "-gvms" +Produce debugging information in \s-1VMS\s0 debug format (if that is +supported). This is the format used by \s-1DEBUG\s0 on \s-1VMS\s0 systems. +.Ip "\fB\-g\fR\fIlevel\fR" 4 +.IX Item "-glevel" +.PD 0 +.Ip "\fB\-ggdb\fR\fIlevel\fR" 4 +.IX Item "-ggdblevel" +.Ip "\fB\-gstabs\fR\fIlevel\fR" 4 +.IX Item "-gstabslevel" +.Ip "\fB\-gcoff\fR\fIlevel\fR" 4 +.IX Item "-gcofflevel" +.Ip "\fB\-gxcoff\fR\fIlevel\fR" 4 +.IX Item "-gxcofflevel" +.Ip "\fB\-gvms\fR\fIlevel\fR" 4 +.IX Item "-gvmslevel" +.PD +Request debugging information and also use \fIlevel\fR to specify how +much information. The default level is 2. +.Sp +Level 1 produces minimal information, enough for making backtraces in +parts of the program that you don't plan to debug. This includes +descriptions of functions and external variables, but no information +about local variables and no line numbers. +.Sp +Level 3 includes extra information, such as all the macro definitions +present in the program. Some debuggers support macro expansion when +you use \fB\-g3\fR. +.Sp +Note that in order to avoid confusion between \s-1DWARF1\s0 debug level 2, +and \s-1DWARF2\s0, neither \fB\-gdwarf\fR nor \fB\-gdwarf-2\fR accept +a concatenated debug level. Instead use an additional \fB\-g\fR\fIlevel\fR +option to change the debug level for \s-1DWARF1\s0 or \s-1DWARF2\s0. +.Ip "\fB\-p\fR" 4 +.IX Item "-p" +Generate extra code to write profile information suitable for the +analysis program \f(CW\*(C`prof\*(C'\fR. You must use this option when compiling +the source files you want data about, and you must also use it when +linking. +.Ip "\fB\-pg\fR" 4 +.IX Item "-pg" +Generate extra code to write profile information suitable for the +analysis program \f(CW\*(C`gprof\*(C'\fR. You must use this option when compiling +the source files you want data about, and you must also use it when +linking. +.Ip "\fB\-a\fR" 4 +.IX Item "-a" +Generate extra code to write profile information for basic blocks, which will +record the number of times each basic block is executed, the basic block start +address, and the function name containing the basic block. If \fB\-g\fR is +used, the line number and filename of the start of the basic block will also be +recorded. If not overridden by the machine description, the default action is +to append to the text file \fIbb.out\fR. +.Sp +This data could be analyzed by a program like \f(CW\*(C`tcov\*(C'\fR. Note, +however, that the format of the data is not what \f(CW\*(C`tcov\*(C'\fR expects. +Eventually \s-1GNU\s0 \f(CW\*(C`gprof\*(C'\fR should be extended to process this data. +.Ip "\fB\-Q\fR" 4 +.IX Item "-Q" +Makes the compiler print out each function name as it is compiled, and +print some statistics about each pass when it finishes. +.Ip "\fB\-ftime-report\fR" 4 +.IX Item "-ftime-report" +Makes the compiler print some statistics about the time consumed by each +pass when it finishes. +.Ip "\fB\-fmem-report\fR" 4 +.IX Item "-fmem-report" +Makes the compiler print some statistics about permanent memory +allocation when it finishes. +.Ip "\fB\-fprofile-arcs\fR" 4 +.IX Item "-fprofile-arcs" +Instrument \fIarcs\fR during compilation to generate coverage data +or for profile-directed block ordering. During execution the program +records how many times each branch is executed and how many times it is +taken. When the compiled program exits it saves this data to a file +called \fI\fIsourcename\fI.da\fR for each source file. +.Sp +For profile-directed block ordering, compile the program with +\&\fB\-fprofile-arcs\fR plus optimization and code generation options, +generate the arc profile information by running the program on a +selected workload, and then compile the program again with the same +optimization and code generation options plus +\&\fB\-fbranch-probabilities\fR. +.Sp +The other use of \fB\-fprofile-arcs\fR is for use with \f(CW\*(C`gcov\*(C'\fR, +when it is used with the \fB\-ftest-coverage\fR option. +.Sp +With \fB\-fprofile-arcs\fR, for each function of your program \s-1GCC\s0 +creates a program flow graph, then finds a spanning tree for the graph. +Only arcs that are not on the spanning tree have to be instrumented: the +compiler adds code to count the number of times that these arcs are +executed. When an arc is the only exit or only entrance to a block, the +instrumentation code can be added to the block; otherwise, a new basic +block must be created to hold the instrumentation code. +.Ip "\fB\-ftest-coverage\fR" 4 +.IX Item "-ftest-coverage" +Create data files for the \f(CW\*(C`gcov\*(C'\fR code-coverage utility. +The data file names begin with the name of your source file: +.RS 4 +.Ip "\fIsourcename\fR\fB.bb\fR" 4 +.IX Item "sourcename.bb" +A mapping from basic blocks to line numbers, which \f(CW\*(C`gcov\*(C'\fR uses to +associate basic block execution counts with line numbers. +.Ip "\fIsourcename\fR\fB.bbg\fR" 4 +.IX Item "sourcename.bbg" +A list of all arcs in the program flow graph. This allows \f(CW\*(C`gcov\*(C'\fR +to reconstruct the program flow graph, so that it can compute all basic +block and arc execution counts from the information in the +\&\f(CW\*(C`\f(CIsourcename\f(CW.da\*(C'\fR file. +.RE +.RS 4 +.Sp +Use \fB\-ftest-coverage\fR with \fB\-fprofile-arcs\fR; the latter +option adds instrumentation to the program, which then writes +execution counts to another data file: +.RS 4 +.RE +.Ip "\fIsourcename\fR\fB.da\fR" 4 +.IX Item "sourcename.da" +Runtime arc execution counts, used in conjunction with the arc +information in the file \f(CW\*(C`\f(CIsourcename\f(CW.bbg\*(C'\fR. +.RE +.RS 4 +.Sp +Coverage data will map better to the source files if +\&\fB\-ftest-coverage\fR is used without optimization. +.RE +.Ip "\fB\-d\fR\fIletters\fR" 4 +.IX Item "-dletters" +Says to make debugging dumps during compilation at times specified by +\&\fIletters\fR. This is used for debugging the compiler. The file names +for most of the dumps are made by appending a pass number and a word to +the source file name (e.g. \fIfoo.c.00.rtl\fR or \fIfoo.c.01.sibling\fR). +Here are the possible letters for use in \fIletters\fR, and their meanings: +.RS 4 +.Ip "\fBA\fR" 4 +.IX Item "A" +Annotate the assembler output with miscellaneous debugging information. +.Ip "\fBb\fR" 4 +.IX Item "b" +Dump after computing branch probabilities, to \fI\fIfile\fI.14.bp\fR. +.Ip "\fBB\fR" 4 +.IX Item "B" +Dump after block reordering, to \fI\fIfile\fI.29.bbro\fR. +.Ip "\fBc\fR" 4 +.IX Item "c" +Dump after instruction combination, to the file \fI\fIfile\fI.16.combine\fR. +.Ip "\fBC\fR" 4 +.IX Item "C" +Dump after the first if conversion, to the file \fI\fIfile\fI.17.ce\fR. +.Ip "\fBd\fR" 4 +.IX Item "d" +Dump after delayed branch scheduling, to \fI\fIfile\fI.31.dbr\fR. +.Ip "\fBD\fR" 4 +.IX Item "D" +Dump all macro definitions, at the end of preprocessing, in addition to +normal output. +.Ip "\fBe\fR" 4 +.IX Item "e" +Dump after \s-1SSA\s0 optimizations, to \fI\fIfile\fI.04.ssa\fR and +\&\fI\fIfile\fI.07.ussa\fR. +.Ip "\fBE\fR" 4 +.IX Item "E" +Dump after the second if conversion, to \fI\fIfile\fI.26.ce2\fR. +.Ip "\fBf\fR" 4 +.IX Item "f" +Dump after life analysis, to \fI\fIfile\fI.15.life\fR. +.Ip "\fBF\fR" 4 +.IX Item "F" +Dump after purging \f(CW\*(C`ADDRESSOF\*(C'\fR codes, to \fI\fIfile\fI.09.addressof\fR. +.Ip "\fBg\fR" 4 +.IX Item "g" +Dump after global register allocation, to \fI\fIfile\fI.21.greg\fR. +.Ip "\fBh\fR" 4 +.IX Item "h" +Dump after finalization of \s-1EH\s0 handling code, to \fI\fIfile\fI.02.eh\fR. +.Ip "\fBk\fR" 4 +.IX Item "k" +Dump after reg-to-stack conversion, to \fI\fIfile\fI.28.stack\fR. +.Ip "\fBo\fR" 4 +.IX Item "o" +Dump after post-reload optimizations, to \fI\fIfile\fI.22.postreload\fR. +.Ip "\fBG\fR" 4 +.IX Item "G" +Dump after \s-1GCSE\s0, to \fI\fIfile\fI.10.gcse\fR. +.Ip "\fBi\fR" 4 +.IX Item "i" +Dump after sibling call optimizations, to \fI\fIfile\fI.01.sibling\fR. +.Ip "\fBj\fR" 4 +.IX Item "j" +Dump after the first jump optimization, to \fI\fIfile\fI.03.jump\fR. +.Ip "\fBk\fR" 4 +.IX Item "k" +Dump after conversion from registers to stack, to \fI\fIfile\fI.32.stack\fR. +.Ip "\fBl\fR" 4 +.IX Item "l" +Dump after local register allocation, to \fI\fIfile\fI.20.lreg\fR. +.Ip "\fBL\fR" 4 +.IX Item "L" +Dump after loop optimization, to \fI\fIfile\fI.11.loop\fR. +.Ip "\fBM\fR" 4 +.IX Item "M" +Dump after performing the machine dependent reorganisation pass, to +\&\fI\fIfile\fI.30.mach\fR. +.Ip "\fBn\fR" 4 +.IX Item "n" +Dump after register renumbering, to \fI\fIfile\fI.25.rnreg\fR. +.Ip "\fBN\fR" 4 +.IX Item "N" +Dump after the register move pass, to \fI\fIfile\fI.18.regmove\fR. +.Ip "\fBr\fR" 4 +.IX Item "r" +Dump after \s-1RTL\s0 generation, to \fI\fIfile\fI.00.rtl\fR. +.Ip "\fBR\fR" 4 +.IX Item "R" +Dump after the second scheduling pass, to \fI\fIfile\fI.27.sched2\fR. +.Ip "\fBs\fR" 4 +.IX Item "s" +Dump after \s-1CSE\s0 (including the jump optimization that sometimes follows +\&\s-1CSE\s0), to \fI\fIfile\fI.08.cse\fR. +.Ip "\fBS\fR" 4 +.IX Item "S" +Dump after the first scheduling pass, to \fI\fIfile\fI.19.sched\fR. +.Ip "\fBt\fR" 4 +.IX Item "t" +Dump after the second \s-1CSE\s0 pass (including the jump optimization that +sometimes follows \s-1CSE\s0), to \fI\fIfile\fI.12.cse2\fR. +.Ip "\fBw\fR" 4 +.IX Item "w" +Dump after the second flow pass, to \fI\fIfile\fI.23.flow2\fR. +.Ip "\fBX\fR" 4 +.IX Item "X" +Dump after \s-1SSA\s0 dead code elimination, to \fI\fIfile\fI.06.ssadce\fR. +.Ip "\fBz\fR" 4 +.IX Item "z" +Dump after the peephole pass, to \fI\fIfile\fI.24.peephole2\fR. +.Ip "\fBa\fR" 4 +.IX Item "a" +Produce all the dumps listed above. +.Ip "\fBm\fR" 4 +.IX Item "m" +Print statistics on memory usage, at the end of the run, to +standard error. +.Ip "\fBp\fR" 4 +.IX Item "p" +Annotate the assembler output with a comment indicating which +pattern and alternative was used. The length of each instruction is +also printed. +.Ip "\fBP\fR" 4 +.IX Item "P" +Dump the \s-1RTL\s0 in the assembler output as a comment before each instruction. +Also turns on \fB\-dp\fR annotation. +.Ip "\fBv\fR" 4 +.IX Item "v" +For each of the other indicated dump files (except for +\&\fI\fIfile\fI.00.rtl\fR), dump a representation of the control flow graph +suitable for viewing with \s-1VCG\s0 to \fI\fIfile\fI.\fIpass\fI.vcg\fR. +.Ip "\fBx\fR" 4 +.IX Item "x" +Just generate \s-1RTL\s0 for a function instead of compiling it. Usually used +with \fBr\fR. +.Ip "\fBy\fR" 4 +.IX Item "y" +Dump debugging information during parsing, to standard error. +.RE +.RS 4 +.RE +.Ip "\fB\-fdump-unnumbered\fR" 4 +.IX Item "-fdump-unnumbered" +When doing debugging dumps (see \fB\-d\fR option above), suppress instruction +numbers and line number note output. This makes it more feasible to +use diff on debugging dumps for compiler invocations with different +options, in particular with and without \fB\-g\fR. +.Ip "\fB\-fdump-translation-unit\fR (C and \*(C+ only)" 4 +.IX Item "-fdump-translation-unit (C and only)" +.PD 0 +.Ip "\fB\-fdump-translation-unit-\fR\fIoptions\fR\fB \fR(C and \*(C+ only)" 4 +.IX Item "-fdump-translation-unit-options (C and only)" +.PD +Dump a representation of the tree structure for the entire translation +unit to a file. The file name is made by appending \fI.tu\fR to the +source file name. If the \fB-\fR\fIoptions\fR form is used, \fIoptions\fR +controls the details of the dump as described for the +\&\fB\-fdump-tree\fR options. +.Ip "\fB\-fdump-class-hierarchy\fR (\*(C+ only)" 4 +.IX Item "-fdump-class-hierarchy ( only)" +.PD 0 +.Ip "\fB\-fdump-class-hierarchy-\fR\fIoptions\fR\fB \fR(\*(C+ only)" 4 +.IX Item "-fdump-class-hierarchy-options ( only)" +.PD +Dump a representation of each class's hierarchy and virtual function +table layout to a file. The file name is made by appending \fI.class\fR +to the source file name. If the \fB-\fR\fIoptions\fR form is used, +\&\fIoptions\fR controls the details of the dump as described for the +\&\fB\-fdump-tree\fR options. +.Ip "\fB\-fdump-tree-\fR\fIswitch\fR\fB \fR(\*(C+ only)" 4 +.IX Item "-fdump-tree-switch ( only)" +.PD 0 +.Ip "\fB\-fdump-tree-\fR\fIswitch\fR\fB-\fR\fIoptions\fR\fB \fR(\*(C+ only)" 4 +.IX Item "-fdump-tree-switch-options ( only)" +.PD +Control the dumping at various stages of processing the intermediate +language tree to a file. The file name is generated by appending a switch +specific suffix to the source file name. If the \fB-\fR\fIoptions\fR +form is used, \fIoptions\fR is a list of \fB-\fR separated options that +control the details of the dump. Not all options are applicable to all +dumps, those which are not meaningful will be ignored. The following +options are available +.RS 4 +.Ip "\fBaddress\fR" 4 +.IX Item "address" +Print the address of each node. Usually this is not meaningful as it +changes according to the environment and source file. Its primary use +is for tying up a dump file with a debug environment. +.Ip "\fBslim\fR" 4 +.IX Item "slim" +Inhibit dumping of members of a scope or body of a function merely +because that scope has been reached. Only dump such items when they +are directly reachable by some other path. +.Ip "\fBall\fR" 4 +.IX Item "all" +Turn on all options. +.RE +.RS 4 +.Sp +The following tree dumps are possible: +.RS 4 +.RE +.Ip "\fBoriginal\fR" 4 +.IX Item "original" +Dump before any tree based optimization, to \fI\fIfile\fI.original\fR. +.Ip "\fBoptimized\fR" 4 +.IX Item "optimized" +Dump after all tree based optimization, to \fI\fIfile\fI.optimized\fR. +.Ip "\fBinlined\fR" 4 +.IX Item "inlined" +Dump after function inlining, to \fI\fIfile\fI.inlined\fR. +.RE +.RS 4 +.RE +.Ip "\fB\-fsched-verbose=\fR\fIn\fR" 4 +.IX Item "-fsched-verbose=n" +On targets that use instruction scheduling, this option controls the +amount of debugging output the scheduler prints. This information is +written to standard error, unless \fB\-dS\fR or \fB\-dR\fR is +specified, in which case it is output to the usual dump +listing file, \fI.sched\fR or \fI.sched2\fR respectively. However +for \fIn\fR greater than nine, the output is always printed to standard +error. +.Sp +For \fIn\fR greater than zero, \fB\-fsched-verbose\fR outputs the +same information as \fB\-dRS\fR. For \fIn\fR greater than one, it +also output basic block probabilities, detailed ready list information +and unit/insn info. For \fIn\fR greater than two, it includes \s-1RTL\s0 +at abort point, control-flow and regions info. And for \fIn\fR over +four, \fB\-fsched-verbose\fR also includes dependence info. +.Ip "\fB\-fpretend-float\fR" 4 +.IX Item "-fpretend-float" +When running a cross-compiler, pretend that the target machine uses the +same floating point format as the host machine. This causes incorrect +output of the actual floating constants, but the actual instruction +sequence will probably be the same as \s-1GCC\s0 would make when running on +the target machine. +.Ip "\fB\-save-temps\fR" 4 +.IX Item "-save-temps" +Store the usual ``temporary'' intermediate files permanently; place them +in the current directory and name them based on the source file. Thus, +compiling \fIfoo.c\fR with \fB\-c \-save-temps\fR would produce files +\&\fIfoo.i\fR and \fIfoo.s\fR, as well as \fIfoo.o\fR. This creates a +preprocessed \fIfoo.i\fR output file even though the compiler now +normally uses an integrated preprocessor. +.Ip "\fB\-time\fR" 4 +.IX Item "-time" +Report the \s-1CPU\s0 time taken by each subprocess in the compilation +sequence. For C source files, this is the compiler proper and assembler +(plus the linker if linking is done). The output looks like this: +.Sp +.Vb 2 +\& # cc1 0.12 0.01 +\& # as 0.00 0.01 +.Ve +The first number on each line is the ``user time,'' that is time spent +executing the program itself. The second number is ``system time,'' +time spent executing operating system routines on behalf of the program. +Both numbers are in seconds. +.Ip "\fB\-print-file-name=\fR\fIlibrary\fR" 4 +.IX Item "-print-file-name=library" +Print the full absolute name of the library file \fIlibrary\fR that +would be used when linking\-\-\-and don't do anything else. With this +option, \s-1GCC\s0 does not compile or link anything; it just prints the +file name. +.Ip "\fB\-print-multi-directory\fR" 4 +.IX Item "-print-multi-directory" +Print the directory name corresponding to the multilib selected by any +other switches present in the command line. This directory is supposed +to exist in \fB\s-1GCC_EXEC_PREFIX\s0\fR. +.Ip "\fB\-print-multi-lib\fR" 4 +.IX Item "-print-multi-lib" +Print the mapping from multilib directory names to compiler switches +that enable them. The directory name is separated from the switches by +\&\fB;\fR, and each switch starts with an \fB@} instead of the +\&\f(CB@samp\fB{-\fR, without spaces between multiple switches. This is supposed to +ease shell-processing. +.Ip "\fB\-print-prog-name=\fR\fIprogram\fR" 4 +.IX Item "-print-prog-name=program" +Like \fB\-print-file-name\fR, but searches for a program such as \fBcpp\fR. +.Ip "\fB\-print-libgcc-file-name\fR" 4 +.IX Item "-print-libgcc-file-name" +Same as \fB\-print-file-name=libgcc.a\fR. +.Sp +This is useful when you use \fB\-nostdlib\fR or \fB\-nodefaultlibs\fR +but you do want to link with \fIlibgcc.a\fR. You can do +.Sp +.Vb 1 +\& gcc -nostdlib <files>... `gcc -print-libgcc-file-name` +.Ve +.Ip "\fB\-print-search-dirs\fR" 4 +.IX Item "-print-search-dirs" +Print the name of the configured installation directory and a list of +program and library directories gcc will search\-\-\-and don't do anything else. +.Sp +This is useful when gcc prints the error message +\&\fBinstallation problem, cannot exec cpp0: No such file or directory\fR. +To resolve this you either need to put \fIcpp0\fR and the other compiler +components where gcc expects to find them, or you can set the environment +variable \fB\s-1GCC_EXEC_PREFIX\s0\fR to the directory where you installed them. +Don't forget the trailing '/'. +.Ip "\fB\-dumpmachine\fR" 4 +.IX Item "-dumpmachine" +Print the compiler's target machine (for example, +\&\fBi686\-pc-linux-gnu\fR)\-\-\-and don't do anything else. +.Ip "\fB\-dumpversion\fR" 4 +.IX Item "-dumpversion" +Print the compiler version (for example, \fB3.0\fR)\-\-\-and don't do +anything else. +.Ip "\fB\-dumpspecs\fR" 4 +.IX Item "-dumpspecs" +Print the compiler's built-in specs\-\-\-and don't do anything else. (This +is used when \s-1GCC\s0 itself is being built.) +.Sh "Options That Control Optimization" +.IX Subsection "Options That Control Optimization" +These options control various sorts of optimizations: +.Ip "\fB\-O\fR" 4 +.IX Item "-O" +.PD 0 +.Ip "\fB\-O1\fR" 4 +.IX Item "-O1" +.PD +Optimize. Optimizing compilation takes somewhat more time, and a lot +more memory for a large function. +.Sp +Without \fB\-O\fR, the compiler's goal is to reduce the cost of +compilation and to make debugging produce the expected results. +Statements are independent: if you stop the program with a breakpoint +between statements, you can then assign a new value to any variable or +change the program counter to any other statement in the function and +get exactly the results you would expect from the source code. +.Sp +With \fB\-O\fR, the compiler tries to reduce code size and execution +time, without performing any optimizations that take a great deal of +compilation time. +.Ip "\fB\-O2\fR" 4 +.IX Item "-O2" +Optimize even more. \s-1GCC\s0 performs nearly all supported optimizations +that do not involve a space-speed tradeoff. The compiler does not +perform loop unrolling or function inlining when you specify \fB\-O2\fR. +As compared to \fB\-O\fR, this option increases both compilation time +and the performance of the generated code. +.Sp +\&\fB\-O2\fR turns on all optional optimizations except for loop unrolling, +function inlining, and register renaming. It also turns on the +\&\fB\-fforce-mem\fR option on all machines and frame pointer elimination +on machines where doing so does not interfere with debugging. +.Sp +Please note the warning under \fB\-fgcse\fR about +invoking \fB\-O2\fR on programs that use computed gotos. +.Ip "\fB\-O3\fR" 4 +.IX Item "-O3" +Optimize yet more. \fB\-O3\fR turns on all optimizations specified by +\&\fB\-O2\fR and also turns on the \fB\-finline-functions\fR and +\&\fB\-frename-registers\fR options. +.Ip "\fB\-O0\fR" 4 +.IX Item "-O0" +Do not optimize. +.Ip "\fB\-Os\fR" 4 +.IX Item "-Os" +Optimize for size. \fB\-Os\fR enables all \fB\-O2\fR optimizations that +do not typically increase code size. It also performs further +optimizations designed to reduce code size. +.Sp +If you use multiple \fB\-O\fR options, with or without level numbers, +the last such option is the one that is effective. +.PP +Options of the form \fB\-f\fR\fIflag\fR specify machine-independent +flags. Most flags have both positive and negative forms; the negative +form of \fB\-ffoo\fR would be \fB\-fno-foo\fR. In the table below, +only one of the forms is listed\-\-\-the one which is not the default. +You can figure out the other form by either removing \fBno-\fR or +adding it. +.Ip "\fB\-ffloat-store\fR" 4 +.IX Item "-ffloat-store" +Do not store floating point variables in registers, and inhibit other +options that might change whether a floating point value is taken from a +register or memory. +.Sp +This option prevents undesirable excess precision on machines such as +the 68000 where the floating registers (of the 68881) keep more +precision than a \f(CW\*(C`double\*(C'\fR is supposed to have. Similarly for the +x86 architecture. For most programs, the excess precision does only +good, but a few programs rely on the precise definition of \s-1IEEE\s0 floating +point. Use \fB\-ffloat-store\fR for such programs, after modifying +them to store all pertinent intermediate computations into variables. +.Ip "\fB\-fno-default-inline\fR" 4 +.IX Item "-fno-default-inline" +Do not make member functions inline by default merely because they are +defined inside the class scope (\*(C+ only). Otherwise, when you specify +\&\fB\-O\fR, member functions defined inside class scope are compiled +inline by default; i.e., you don't need to add \fBinline\fR in front of +the member function name. +.Ip "\fB\-fno-defer-pop\fR" 4 +.IX Item "-fno-defer-pop" +Always pop the arguments to each function call as soon as that function +returns. For machines which must pop arguments after a function call, +the compiler normally lets arguments accumulate on the stack for several +function calls and pops them all at once. +.Ip "\fB\-fforce-mem\fR" 4 +.IX Item "-fforce-mem" +Force memory operands to be copied into registers before doing +arithmetic on them. This produces better code by making all memory +references potential common subexpressions. When they are not common +subexpressions, instruction combination should eliminate the separate +register-load. The \fB\-O2\fR option turns on this option. +.Ip "\fB\-fforce-addr\fR" 4 +.IX Item "-fforce-addr" +Force memory address constants to be copied into registers before +doing arithmetic on them. This may produce better code just as +\&\fB\-fforce-mem\fR may. +.Ip "\fB\-fomit-frame-pointer\fR" 4 +.IX Item "-fomit-frame-pointer" +Don't keep the frame pointer in a register for functions that +don't need one. This avoids the instructions to save, set up and +restore frame pointers; it also makes an extra register available +in many functions. \fBIt also makes debugging impossible on +some machines.\fR +.Sp +On some machines, such as the \s-1VAX\s0, this flag has no effect, because +the standard calling sequence automatically handles the frame pointer +and nothing is saved by pretending it doesn't exist. The +machine-description macro \f(CW\*(C`FRAME_POINTER_REQUIRED\*(C'\fR controls +whether a target machine supports this flag. +.Ip "\fB\-foptimize-sibling-calls\fR" 4 +.IX Item "-foptimize-sibling-calls" +Optimize sibling and tail recursive calls. +.Ip "\fB\-ftrapv\fR" 4 +.IX Item "-ftrapv" +This option generates traps for signed overflow on addition, subtraction, +multiplication operations. +.Ip "\fB\-fno-inline\fR" 4 +.IX Item "-fno-inline" +Don't pay attention to the \f(CW\*(C`inline\*(C'\fR keyword. Normally this option +is used to keep the compiler from expanding any functions inline. +Note that if you are not optimizing, no functions can be expanded inline. +.Ip "\fB\-finline-functions\fR" 4 +.IX Item "-finline-functions" +Integrate all simple functions into their callers. The compiler +heuristically decides which functions are simple enough to be worth +integrating in this way. +.Sp +If all calls to a given function are integrated, and the function is +declared \f(CW\*(C`static\*(C'\fR, then the function is normally not output as +assembler code in its own right. +.Ip "\fB\-finline-limit=\fR\fIn\fR" 4 +.IX Item "-finline-limit=n" +By default, gcc limits the size of functions that can be inlined. This flag +allows the control of this limit for functions that are explicitly marked as +inline (ie marked with the inline keyword or defined within the class +definition in c++). \fIn\fR is the size of functions that can be inlined in +number of pseudo instructions (not counting parameter handling). The default +value of \fIn\fR is 600. +Increasing this value can result in more inlined code at +the cost of compilation time and memory consumption. Decreasing usually makes +the compilation faster and less code will be inlined (which presumably +means slower programs). This option is particularly useful for programs that +use inlining heavily such as those based on recursive templates with \*(C+. +.Sp +\&\fINote:\fR pseudo instruction represents, in this particular context, an +abstract measurement of function's size. In no way, it represents a count +of assembly instructions and as such its exact meaning might change from one +release to an another. +.Ip "\fB\-fkeep-inline-functions\fR" 4 +.IX Item "-fkeep-inline-functions" +Even if all calls to a given function are integrated, and the function +is declared \f(CW\*(C`static\*(C'\fR, nevertheless output a separate run-time +callable version of the function. This switch does not affect +\&\f(CW\*(C`extern inline\*(C'\fR functions. +.Ip "\fB\-fkeep-static-consts\fR" 4 +.IX Item "-fkeep-static-consts" +Emit variables declared \f(CW\*(C`static const\*(C'\fR when optimization isn't turned +on, even if the variables aren't referenced. +.Sp +\&\s-1GCC\s0 enables this option by default. If you want to force the compiler to +check if the variable was referenced, regardless of whether or not +optimization is turned on, use the \fB\-fno-keep-static-consts\fR option. +.Ip "\fB\-fmerge-constants\fR" 4 +.IX Item "-fmerge-constants" +Attempt to merge identical constants (string constants and floating point +constants) accross compilation units. +.Sp +This option is default for optimized compilation if assembler and linker +support it. Use \fB\-fno-merge-constants\fR to inhibit this behavior. +.Ip "\fB\-fmerge-all-constants\fR" 4 +.IX Item "-fmerge-all-constants" +Attempt to merge identical constants and identical variables. +.Sp +This option implies \fB\-fmerge-constants\fR. In addition to +\&\fB\-fmerge-constants\fR this considers e.g. even constant initialized +arrays or initialized constant variables with integral or floating point +types. Languages like C or \*(C+ require each non-automatic variable to +have distinct location, so using this option will result in non-conforming +behavior. +.Ip "\fB\-fno-branch-count-reg\fR" 4 +.IX Item "-fno-branch-count-reg" +Do not use ``decrement and branch'' instructions on a count register, +but instead generate a sequence of instructions that decrement a +register, compare it against zero, then branch based upon the result. +This option is only meaningful on architectures that support such +instructions, which include x86, PowerPC, \s-1IA-64\s0 and S/390. +.Ip "\fB\-fno-function-cse\fR" 4 +.IX Item "-fno-function-cse" +Do not put function addresses in registers; make each instruction that +calls a constant function contain the function's address explicitly. +.Sp +This option results in less efficient code, but some strange hacks +that alter the assembler output may be confused by the optimizations +performed when this option is not used. +.Ip "\fB\-ffast-math\fR" 4 +.IX Item "-ffast-math" +Sets \fB\-fno-math-errno\fR, \fB\-funsafe-math-optimizations\fR, and \fB\-fno-trapping-math\fR. +.Sp +This option causes the preprocessor macro \f(CW\*(C`_\|_FAST_MATH_\|_\*(C'\fR to be defined. +.Sp +This option should never be turned on by any \fB\-O\fR option since +it can result in incorrect output for programs which depend on +an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for +math functions. +.Ip "\fB\-fno-math-errno\fR" 4 +.IX Item "-fno-math-errno" +Do not set \s-1ERRNO\s0 after calling math functions that are executed +with a single instruction, e.g., sqrt. A program that relies on +\&\s-1IEEE\s0 exceptions for math error handling may want to use this flag +for speed while maintaining \s-1IEEE\s0 arithmetic compatibility. +.Sp +This option should never be turned on by any \fB\-O\fR option since +it can result in incorrect output for programs which depend on +an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for +math functions. +.Sp +The default is \fB\-fmath-errno\fR. +.Ip "\fB\-funsafe-math-optimizations\fR" 4 +.IX Item "-funsafe-math-optimizations" +Allow optimizations for floating-point arithmetic that (a) assume +that arguments and results are valid and (b) may violate \s-1IEEE\s0 or +\&\s-1ANSI\s0 standards. When used at link-time, it may include libraries +or startup files that change the default \s-1FPU\s0 control word or other +similar optimizations. +.Sp +This option should never be turned on by any \fB\-O\fR option since +it can result in incorrect output for programs which depend on +an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for +math functions. +.Sp +The default is \fB\-fno-unsafe-math-optimizations\fR. +.Ip "\fB\-fno-trapping-math\fR" 4 +.IX Item "-fno-trapping-math" +Compile code assuming that floating-point operations cannot generate +user-visible traps. Setting this option may allow faster code +if one relies on ``non-stop'' \s-1IEEE\s0 arithmetic, for example. +.Sp +This option should never be turned on by any \fB\-O\fR option since +it can result in incorrect output for programs which depend on +an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for +math functions. +.Sp +The default is \fB\-ftrapping-math\fR. +.Ip "\fB\-fbounds-check\fR" 4 +.IX Item "-fbounds-check" +For front-ends that support it, generate additional code to check that +indices used to access arrays are within the declared range. This is +currenly only supported by the Java and Fortran 77 front-ends, where +this option defaults to true and false respectively. +.PP +The following options control specific optimizations. The \fB\-O2\fR +option turns on all of these optimizations except \fB\-funroll-loops\fR +and \fB\-funroll-all-loops\fR. On most machines, the \fB\-O\fR option +turns on the \fB\-fthread-jumps\fR and \fB\-fdelayed-branch\fR options, +but specific machines may handle it differently. +.PP +You can use the following flags in the rare cases when ``fine-tuning'' +of optimizations to be performed is desired. +.PP +Not all of the optimizations performed by \s-1GCC\s0 have \fB\-f\fR options +to control them. +.Ip "\fB\-fstrength-reduce\fR" 4 +.IX Item "-fstrength-reduce" +Perform the optimizations of loop strength reduction and +elimination of iteration variables. +.Ip "\fB\-fthread-jumps\fR" 4 +.IX Item "-fthread-jumps" +Perform optimizations where we check to see if a jump branches to a +location where another comparison subsumed by the first is found. If +so, the first branch is redirected to either the destination of the +second branch or a point immediately following it, depending on whether +the condition is known to be true or false. +.Ip "\fB\-fcse-follow-jumps\fR" 4 +.IX Item "-fcse-follow-jumps" +In common subexpression elimination, scan through jump instructions +when the target of the jump is not reached by any other path. For +example, when \s-1CSE\s0 encounters an \f(CW\*(C`if\*(C'\fR statement with an +\&\f(CW\*(C`else\*(C'\fR clause, \s-1CSE\s0 will follow the jump when the condition +tested is false. +.Ip "\fB\-fcse-skip-blocks\fR" 4 +.IX Item "-fcse-skip-blocks" +This is similar to \fB\-fcse-follow-jumps\fR, but causes \s-1CSE\s0 to +follow jumps which conditionally skip over blocks. When \s-1CSE\s0 +encounters a simple \f(CW\*(C`if\*(C'\fR statement with no else clause, +\&\fB\-fcse-skip-blocks\fR causes \s-1CSE\s0 to follow the jump around the +body of the \f(CW\*(C`if\*(C'\fR. +.Ip "\fB\-frerun-cse-after-loop\fR" 4 +.IX Item "-frerun-cse-after-loop" +Re-run common subexpression elimination after loop optimizations has been +performed. +.Ip "\fB\-frerun-loop-opt\fR" 4 +.IX Item "-frerun-loop-opt" +Run the loop optimizer twice. +.Ip "\fB\-fgcse\fR" 4 +.IX Item "-fgcse" +Perform a global common subexpression elimination pass. +This pass also performs global constant and copy propagation. +.Sp +\&\fINote:\fR When compiling a program using computed gotos, a \s-1GCC\s0 +extension, you may get better runtime performance if you disable +the global common subexpression elmination pass by adding +\&\fB\-fno-gcse\fR to the command line. +.Ip "\fB\-fgcse-lm\fR" 4 +.IX Item "-fgcse-lm" +When \fB\-fgcse-lm\fR is enabled, global common subexpression elimination will +attempt to move loads which are only killed by stores into themselves. This +allows a loop containing a load/store sequence to be changed to a load outside +the loop, and a copy/store within the loop. +.Ip "\fB\-fgcse-sm\fR" 4 +.IX Item "-fgcse-sm" +When \fB\-fgcse-sm\fR is enabled, A store motion pass is run after global common +subexpression elimination. This pass will attempt to move stores out of loops. +When used in conjunction with \fB\-fgcse-lm\fR, loops containing a load/store sequence +can be changed to a load before the loop and a store after the loop. +.Ip "\fB\-fdelete-null-pointer-checks\fR" 4 +.IX Item "-fdelete-null-pointer-checks" +Use global dataflow analysis to identify and eliminate useless checks +for null pointers. The compiler assumes that dereferencing a null +pointer would have halted the program. If a pointer is checked after +it has already been dereferenced, it cannot be null. +.Sp +In some environments, this assumption is not true, and programs can +safely dereference null pointers. Use +\&\fB\-fno-delete-null-pointer-checks\fR to disable this optimization +for programs which depend on that behavior. +.Ip "\fB\-fexpensive-optimizations\fR" 4 +.IX Item "-fexpensive-optimizations" +Perform a number of minor optimizations that are relatively expensive. +.Ip "\fB\-foptimize-register-move\fR" 4 +.IX Item "-foptimize-register-move" +.PD 0 +.Ip "\fB\-fregmove\fR" 4 +.IX Item "-fregmove" +.PD +Attempt to reassign register numbers in move instructions and as +operands of other simple instructions in order to maximize the amount of +register tying. This is especially helpful on machines with two-operand +instructions. \s-1GCC\s0 enables this optimization by default with \fB\-O2\fR +or higher. +.Sp +Note \fB\-fregmove\fR and \fB\-foptimize-register-move\fR are the same +optimization. +.Ip "\fB\-fdelayed-branch\fR" 4 +.IX Item "-fdelayed-branch" +If supported for the target machine, attempt to reorder instructions +to exploit instruction slots available after delayed branch +instructions. +.Ip "\fB\-fschedule-insns\fR" 4 +.IX Item "-fschedule-insns" +If supported for the target machine, attempt to reorder instructions to +eliminate execution stalls due to required data being unavailable. This +helps machines that have slow floating point or memory load instructions +by allowing other instructions to be issued until the result of the load +or floating point instruction is required. +.Ip "\fB\-fschedule-insns2\fR" 4 +.IX Item "-fschedule-insns2" +Similar to \fB\-fschedule-insns\fR, but requests an additional pass of +instruction scheduling after register allocation has been done. This is +especially useful on machines with a relatively small number of +registers and where memory load instructions take more than one cycle. +.Ip "\fB\-fno-sched-interblock\fR" 4 +.IX Item "-fno-sched-interblock" +Don't schedule instructions across basic blocks. This is normally +enabled by default when scheduling before register allocation, i.e. +with \fB\-fschedule-insns\fR or at \fB\-O2\fR or higher. +.Ip "\fB\-fno-sched-spec\fR" 4 +.IX Item "-fno-sched-spec" +Don't allow speculative motion of non-load instructions. This is normally +enabled by default when scheduling before register allocation, i.e. +with \fB\-fschedule-insns\fR or at \fB\-O2\fR or higher. +.Ip "\fB\-fsched-spec-load\fR" 4 +.IX Item "-fsched-spec-load" +Allow speculative motion of some load instructions. This only makes +sense when scheduling before register allocation, i.e. with +\&\fB\-fschedule-insns\fR or at \fB\-O2\fR or higher. +.Ip "\fB\-fsched-spec-load-dangerous\fR" 4 +.IX Item "-fsched-spec-load-dangerous" +Allow speculative motion of more load instructions. This only makes +sense when scheduling before register allocation, i.e. with +\&\fB\-fschedule-insns\fR or at \fB\-O2\fR or higher. +.Ip "\fB\-ffunction-sections\fR" 4 +.IX Item "-ffunction-sections" +.PD 0 +.Ip "\fB\-fdata-sections\fR" 4 +.IX Item "-fdata-sections" +.PD +Place each function or data item into its own section in the output +file if the target supports arbitrary sections. The name of the +function or the name of the data item determines the section's name +in the output file. +.Sp +Use these options on systems where the linker can perform optimizations +to improve locality of reference in the instruction space. \s-1HPPA\s0 +processors running \s-1HP-UX\s0 and Sparc processors running Solaris 2 have +linkers with such optimizations. Other systems using the \s-1ELF\s0 object format +as well as \s-1AIX\s0 may have these optimizations in the future. +.Sp +Only use these options when there are significant benefits from doing +so. When you specify these options, the assembler and linker will +create larger object and executable files and will also be slower. +You will not be able to use \f(CW\*(C`gprof\*(C'\fR on all systems if you +specify this option and you may have problems with debugging if +you specify both this option and \fB\-g\fR. +.Ip "\fB\-fcaller-saves\fR" 4 +.IX Item "-fcaller-saves" +Enable values to be allocated in registers that will be clobbered by +function calls, by emitting extra instructions to save and restore the +registers around such calls. Such allocation is done only when it +seems to result in better code than would otherwise be produced. +.Sp +This option is always enabled by default on certain machines, usually +those which have no call-preserved registers to use instead. +.Sp +For all machines, optimization level 2 and higher enables this flag by +default. +.Ip "\fB\-funroll-loops\fR" 4 +.IX Item "-funroll-loops" +Unroll loops whose number of iterations can be determined at compile +time or upon entry to the loop. \fB\-funroll-loops\fR implies both +\&\fB\-fstrength-reduce\fR and \fB\-frerun-cse-after-loop\fR. This +option makes code larger, and may or may not make it run faster. +.Ip "\fB\-funroll-all-loops\fR" 4 +.IX Item "-funroll-all-loops" +Unroll all loops, even if their number of iterations is uncertain when +the loop is entered. This usually makes programs run more slowly. +\&\fB\-funroll-all-loops\fR implies the same options as +\&\fB\-funroll-loops\fR, +.Ip "\fB\-fprefetch-loop-arrays\fR" 4 +.IX Item "-fprefetch-loop-arrays" +If supported by the target machine, generate instructions to prefetch +memory to improve the performance of loops that access large arrays. +.Ip "\fB\-fmove-all-movables\fR" 4 +.IX Item "-fmove-all-movables" +Forces all invariant computations in loops to be moved +outside the loop. +.Ip "\fB\-freduce-all-givs\fR" 4 +.IX Item "-freduce-all-givs" +Forces all general-induction variables in loops to be +strength-reduced. +.Sp +\&\fINote:\fR When compiling programs written in Fortran, +\&\fB\-fmove-all-movables\fR and \fB\-freduce-all-givs\fR are enabled +by default when you use the optimizer. +.Sp +These options may generate better or worse code; results are highly +dependent on the structure of loops within the source code. +.Sp +These two options are intended to be removed someday, once +they have helped determine the efficacy of various +approaches to improving loop optimizations. +.Sp +Please let us (<\fBgcc@gcc.gnu.org\fR> and <\fBfortran@gnu.org\fR>) +know how use of these options affects +the performance of your production code. +We're very interested in code that runs \fIslower\fR +when these options are \fIenabled\fR. +.Ip "\fB\-fno-peephole\fR" 4 +.IX Item "-fno-peephole" +.PD 0 +.Ip "\fB\-fno-peephole2\fR" 4 +.IX Item "-fno-peephole2" +.PD +Disable any machine-specific peephole optimizations. The difference +between \fB\-fno-peephole\fR and \fB\-fno-peephole2\fR is in how they +are implemented in the compiler; some targets use one, some use the +other, a few use both. +.Ip "\fB\-fbranch-probabilities\fR" 4 +.IX Item "-fbranch-probabilities" +After running a program compiled with \fB\-fprofile-arcs\fR, you can compile it a second time using +\&\fB\-fbranch-probabilities\fR, to improve optimizations based on +the number of times each branch was taken. When the program +compiled with \fB\-fprofile-arcs\fR exits it saves arc execution +counts to a file called \fI\fIsourcename\fI.da\fR for each source +file The information in this data file is very dependent on the +structure of the generated code, so you must use the same source code +and the same optimization options for both compilations. +.Sp +With \fB\-fbranch-probabilities\fR, \s-1GCC\s0 puts a \fB\s-1REG_EXEC_COUNT\s0\fR +note on the first instruction of each basic block, and a +\&\fB\s-1REG_BR_PROB\s0\fR note on each \fB\s-1JUMP_INSN\s0\fR and \fB\s-1CALL_INSN\s0\fR. +These can be used to improve optimization. Currently, they are only +used in one place: in \fIreorg.c\fR, instead of guessing which path a +branch is mostly to take, the \fB\s-1REG_BR_PROB\s0\fR values are used to +exactly determine which path is taken more often. +.Ip "\fB\-fno-guess-branch-probability\fR" 4 +.IX Item "-fno-guess-branch-probability" +Do not guess branch probabilities using a randomized model. +.Sp +Sometimes gcc will opt to use a randomized model to guess branch +probabilities, when none are available from either profiling feedback +(\fB\-fprofile-arcs\fR) or \fB_\|_builtin_expect\fR. This means that +different runs of the compiler on the same program may produce different +object code. +.Sp +In a hard real-time system, people don't want different runs of the +compiler to produce code that has different behavior; minimizing +non-determinism is of paramount import. This switch allows users to +reduce non-determinism, possibly at the expense of inferior +optimization. +.Ip "\fB\-fstrict-aliasing\fR" 4 +.IX Item "-fstrict-aliasing" +Allows the compiler to assume the strictest aliasing rules applicable to +the language being compiled. For C (and \*(C+), this activates +optimizations based on the type of expressions. In particular, an +object of one type is assumed never to reside at the same address as an +object of a different type, unless the types are almost the same. For +example, an \f(CW\*(C`unsigned int\*(C'\fR can alias an \f(CW\*(C`int\*(C'\fR, but not a +\&\f(CW\*(C`void*\*(C'\fR or a \f(CW\*(C`double\*(C'\fR. A character type may alias any other +type. +.Sp +Pay special attention to code like this: +.Sp +.Vb 4 +\& union a_union { +\& int i; +\& double d; +\& }; +.Ve +.Vb 5 +\& int f() { +\& a_union t; +\& t.d = 3.0; +\& return t.i; +\& } +.Ve +The practice of reading from a different union member than the one most +recently written to (called ``type-punning'') is common. Even with +\&\fB\-fstrict-aliasing\fR, type-punning is allowed, provided the memory +is accessed through the union type. So, the code above will work as +expected. However, this code might not: +.Sp +.Vb 7 +\& int f() { +\& a_union t; +\& int* ip; +\& t.d = 3.0; +\& ip = &t.i; +\& return *ip; +\& } +.Ve +Every language that wishes to perform language-specific alias analysis +should define a function that computes, given an \f(CW\*(C`tree\*(C'\fR +node, an alias set for the node. Nodes in different alias sets are not +allowed to alias. For an example, see the C front-end function +\&\f(CW\*(C`c_get_alias_set\*(C'\fR. +.Ip "\fB\-falign-functions\fR" 4 +.IX Item "-falign-functions" +.PD 0 +.Ip "\fB\-falign-functions=\fR\fIn\fR" 4 +.IX Item "-falign-functions=n" +.PD +Align the start of functions to the next power-of-two greater than +\&\fIn\fR, skipping up to \fIn\fR bytes. For instance, +\&\fB\-falign-functions=32\fR aligns functions to the next 32\-byte +boundary, but \fB\-falign-functions=24\fR would align to the next +32\-byte boundary only if this can be done by skipping 23 bytes or less. +.Sp +\&\fB\-fno-align-functions\fR and \fB\-falign-functions=1\fR are +equivalent and mean that functions will not be aligned. +.Sp +Some assemblers only support this flag when \fIn\fR is a power of two; +in that case, it is rounded up. +.Sp +If \fIn\fR is not specified, use a machine-dependent default. +.Ip "\fB\-falign-labels\fR" 4 +.IX Item "-falign-labels" +.PD 0 +.Ip "\fB\-falign-labels=\fR\fIn\fR" 4 +.IX Item "-falign-labels=n" +.PD +Align all branch targets to a power-of-two boundary, skipping up to +\&\fIn\fR bytes like \fB\-falign-functions\fR. This option can easily +make code slower, because it must insert dummy operations for when the +branch target is reached in the usual flow of the code. +.Sp +If \fB\-falign-loops\fR or \fB\-falign-jumps\fR are applicable and +are greater than this value, then their values are used instead. +.Sp +If \fIn\fR is not specified, use a machine-dependent default which is +very likely to be \fB1\fR, meaning no alignment. +.Ip "\fB\-falign-loops\fR" 4 +.IX Item "-falign-loops" +.PD 0 +.Ip "\fB\-falign-loops=\fR\fIn\fR" 4 +.IX Item "-falign-loops=n" +.PD +Align loops to a power-of-two boundary, skipping up to \fIn\fR bytes +like \fB\-falign-functions\fR. The hope is that the loop will be +executed many times, which will make up for any execution of the dummy +operations. +.Sp +If \fIn\fR is not specified, use a machine-dependent default. +.Ip "\fB\-falign-jumps\fR" 4 +.IX Item "-falign-jumps" +.PD 0 +.Ip "\fB\-falign-jumps=\fR\fIn\fR" 4 +.IX Item "-falign-jumps=n" +.PD +Align branch targets to a power-of-two boundary, for branch targets +where the targets can only be reached by jumping, skipping up to \fIn\fR +bytes like \fB\-falign-functions\fR. In this case, no dummy operations +need be executed. +.Sp +If \fIn\fR is not specified, use a machine-dependent default. +.Ip "\fB\-fssa\fR" 4 +.IX Item "-fssa" +Perform optimizations in static single assignment form. Each function's +flow graph is translated into \s-1SSA\s0 form, optimizations are performed, and +the flow graph is translated back from \s-1SSA\s0 form. Users should not +specify this option, since it is not yet ready for production use. +.Ip "\fB\-fssa-ccp\fR" 4 +.IX Item "-fssa-ccp" +Perform Sparse Conditional Constant Propagation in \s-1SSA\s0 form. Requires +\&\fB\-fssa\fR. Like \fB\-fssa\fR, this is an experimental feature. +.Ip "\fB\-fssa-dce\fR" 4 +.IX Item "-fssa-dce" +Perform aggressive dead-code elimination in \s-1SSA\s0 form. Requires \fB\-fssa\fR. +Like \fB\-fssa\fR, this is an experimental feature. +.Ip "\fB\-fsingle-precision-constant\fR" 4 +.IX Item "-fsingle-precision-constant" +Treat floating point constant as single precision constant instead of +implicitly converting it to double precision constant. +.Ip "\fB\-frename-registers\fR" 4 +.IX Item "-frename-registers" +Attempt to avoid false dependencies in scheduled code by making use +of registers left over after register allocation. This optimization +will most benefit processors with lots of registers. It can, however, +make debugging impossible, since variables will no longer stay in +a ``home register''. +.Ip "\fB\-fno-cprop-registers\fR" 4 +.IX Item "-fno-cprop-registers" +After register allocation and post-register allocation instruction splitting, +we perform a copy-propagation pass to try to reduce scheduling dependencies +and occasionally eliminate the copy. +.Ip "\fB\*(--param\fR \fIname\fR\fB=\fR\fIvalue\fR" 4 +.IX Item "param name=value" +In some places, \s-1GCC\s0 uses various constants to control the amount of +optimization that is done. For example, \s-1GCC\s0 will not inline functions +that contain more that a certain number of instructions. You can +control some of these constants on the command-line using the +\&\fB\*(--param\fR option. +.Sp +In each case, the \fIvalue\fR is an integer. The allowable choices for +\&\fIname\fR are given in the following table: +.RS 4 +.Ip "\fBmax-delay-slot-insn-search\fR" 4 +.IX Item "max-delay-slot-insn-search" +The maximum number of instructions to consider when looking for an +instruction to fill a delay slot. If more than this arbitrary number of +instructions is searched, the time savings from filling the delay slot +will be minimal so stop searching. Increasing values mean more +aggressive optimization, making the compile time increase with probably +small improvement in executable run time. +.Ip "\fBmax-delay-slot-live-search\fR" 4 +.IX Item "max-delay-slot-live-search" +When trying to fill delay slots, the maximum number of instructions to +consider when searching for a block with valid live register +information. Increasing this arbitrarily chosen value means more +aggressive optimization, increasing the compile time. This parameter +should be removed when the delay slot code is rewritten to maintain the +control-flow graph. +.Ip "\fBmax-gcse-memory\fR" 4 +.IX Item "max-gcse-memory" +The approximate maximum amount of memory that will be allocated in +order to perform the global common subexpression elimination +optimization. If more memory than specified is required, the +optimization will not be done. +.Ip "\fBmax-gcse-passes\fR" 4 +.IX Item "max-gcse-passes" +The maximum number of passes of \s-1GCSE\s0 to run. +.Ip "\fBmax-pending-list-length\fR" 4 +.IX Item "max-pending-list-length" +The maximum number of pending dependencies scheduling will allow +before flushing the current state and starting over. Large functions +with few branches or calls can create excessively large lists which +needlessly consume memory and resources. +.Ip "\fBmax-inline-insns\fR" 4 +.IX Item "max-inline-insns" +If an function contains more than this many instructions, it +will not be inlined. This option is precisely equivalent to +\&\fB\-finline-limit\fR. +.RE +.RS 4 +.RE +.Sh "Options Controlling the Preprocessor" +.IX Subsection "Options Controlling the Preprocessor" +These options control the C preprocessor, which is run on each C source +file before actual compilation. +.PP +If you use the \fB\-E\fR option, nothing is done except preprocessing. +Some of these options make sense only together with \fB\-E\fR because +they cause the preprocessor output to be unsuitable for actual +compilation. +.PP +You can use \fB\-Wp,\fR\fIoption\fR to bypass the compiler driver +and pass \fIoption\fR directly through to the preprocessor. If +\&\fIoption\fR contains commas, it is split into multiple options at the +commas. However, many options are modified, translated or interpreted +by the compiler driver before being passed to the preprocessor, and +\&\fB\-Wp\fR forcibly bypasses this phase. The preprocessor's direct +interface is undocumented and subject to change, so whenever possible +you should avoid using \fB\-Wp\fR and let the driver handle the +options instead. +.Ip "\fB\-D\fR \fIname\fR" 4 +.IX Item "-D name" +Predefine \fIname\fR as a macro, with definition \f(CW\*(C`1\*(C'\fR. +.Ip "\fB\-D\fR \fIname\fR\fB=\fR\fIdefinition\fR" 4 +.IX Item "-D name=definition" +Predefine \fIname\fR as a macro, with definition \fIdefinition\fR. +There are no restrictions on the contents of \fIdefinition\fR, but if +you are invoking the preprocessor from a shell or shell-like program you +may need to use the shell's quoting syntax to protect characters such as +spaces that have a meaning in the shell syntax. +.Sp +If you wish to define a function-like macro on the command line, write +its argument list with surrounding parentheses before the equals sign +(if any). Parentheses are meaningful to most shells, so you will need +to quote the option. With \fBsh\fR and \fBcsh\fR, +\&\fB\-D'\fR\fIname\fR\fB(\fR\fIargs...\fR\fB)=\fR\fIdefinition\fR\fB'\fR works. +.Sp +\&\fB\-D\fR and \fB\-U\fR options are processed in the order they +are given on the command line. All \fB\-imacros\fR \fIfile\fR and +\&\fB\-include\fR \fIfile\fR options are processed after all +\&\fB\-D\fR and \fB\-U\fR options. +.Ip "\fB\-U\fR \fIname\fR" 4 +.IX Item "-U name" +Cancel any previous definition of \fIname\fR, either built in or +provided with a \fB\-D\fR option. +.Ip "\fB\-undef\fR" 4 +.IX Item "-undef" +Do not predefine any system-specific macros. The common predefined +macros remain defined. +.Ip "\fB\-I\fR \fIdir\fR" 4 +.IX Item "-I dir" +Add the directory \fIdir\fR to the list of directories to be searched +for header files. +Directories named by \fB\-I\fR are searched before the standard +system include directories. +.Sp +It is dangerous to specify a standard system include directory in an +\&\fB\-I\fR option. This defeats the special treatment of system +headers +\&. It can also defeat the repairs to buggy system headers which \s-1GCC\s0 +makes when it is installed. +.Ip "\fB\-o\fR \fIfile\fR" 4 +.IX Item "-o file" +Write output to \fIfile\fR. This is the same as specifying \fIfile\fR +as the second non-option argument to \fBcpp\fR. \fBgcc\fR has a +different interpretation of a second non-option argument, so you must +use \fB\-o\fR to specify the output file. +.Ip "\fB\-Wall\fR" 4 +.IX Item "-Wall" +Turns on all optional warnings which are desirable for normal code. At +present this is \fB\-Wcomment\fR and \fB\-Wtrigraphs\fR. Note that +many of the preprocessor's warnings are on by default and have no +options to control them. +.Ip "\fB\-Wcomment\fR" 4 +.IX Item "-Wcomment" +.PD 0 +.Ip "\fB\-Wcomments\fR" 4 +.IX Item "-Wcomments" +.PD +Warn whenever a comment-start sequence \fB/*\fR appears in a \fB/*\fR +comment, or whenever a backslash-newline appears in a \fB//\fR comment. +(Both forms have the same effect.) +.Ip "\fB\-Wtrigraphs\fR" 4 +.IX Item "-Wtrigraphs" +Warn if any trigraphs are encountered. This option used to take effect +only if \fB\-trigraphs\fR was also specified, but now works +independently. Warnings are not given for trigraphs within comments, as +they do not affect the meaning of the program. +.Ip "\fB\-Wtraditional\fR" 4 +.IX Item "-Wtraditional" +Warn about certain constructs that behave differently in traditional and +\&\s-1ISO\s0 C. Also warn about \s-1ISO\s0 C constructs that have no traditional C +equivalent, and problematic constructs which should be avoided. +.Ip "\fB\-Wimport\fR" 4 +.IX Item "-Wimport" +Warn the first time \fB#import\fR is used. +.Ip "\fB\-Wundef\fR" 4 +.IX Item "-Wundef" +Warn whenever an identifier which is not a macro is encountered in an +\&\fB#if\fR directive, outside of \fBdefined\fR. Such identifiers are +replaced with zero. +.Ip "\fB\-Werror\fR" 4 +.IX Item "-Werror" +Make all warnings into hard errors. Source code which triggers warnings +will be rejected. +.Ip "\fB\-Wsystem-headers\fR" 4 +.IX Item "-Wsystem-headers" +Issue warnings for code in system headers. These are normally unhelpful +in finding bugs in your own code, therefore suppressed. If you are +responsible for the system library, you may want to see them. +.Ip "\fB\-w\fR" 4 +.IX Item "-w" +Suppress all warnings, including those which \s-1GNU\s0 \s-1CPP\s0 issues by default. +.Ip "\fB\-pedantic\fR" 4 +.IX Item "-pedantic" +Issue all the mandatory diagnostics listed in the C standard. Some of +them are left out by default, since they trigger frequently on harmless +code. +.Ip "\fB\-pedantic-errors\fR" 4 +.IX Item "-pedantic-errors" +Issue all the mandatory diagnostics, and make all mandatory diagnostics +into errors. This includes mandatory diagnostics that \s-1GCC\s0 issues +without \fB\-pedantic\fR but treats as warnings. +.Ip "\fB\-M\fR" 4 +.IX Item "-M" +Instead of outputting the result of preprocessing, output a rule +suitable for \fBmake\fR describing the dependencies of the main +source file. The preprocessor outputs one \fBmake\fR rule containing +the object file name for that source file, a colon, and the names of all +the included files, including those coming from \fB\-include\fR or +\&\fB\-imacros\fR command line options. +.Sp +Unless specified explicitly (with \fB\-MT\fR or \fB\-MQ\fR), the +object file name consists of the basename of the source file with any +suffix replaced with object file suffix. If there are many included +files then the rule is split into several lines using \fB\e\fR\-newline. +The rule has no commands. +.Sp +This option does not suppress the preprocessor's debug output, such as +\&\fB\-dM\fR. To avoid mixing such debug output with the dependency +rules you should explicitly specify the dependency output file with +\&\fB\-MF\fR, or use an environment variable like +\&\fB\s-1DEPENDENCIES_OUTPUT\s0\fR. Debug output +will still be sent to the regular output stream as normal. +.Sp +Passing \fB\-M\fR to the driver implies \fB\-E\fR. +.Ip "\fB\-MM\fR" 4 +.IX Item "-MM" +Like \fB\-M\fR but do not mention header files that are found in +system header directories, nor header files that are included, +directly or indirectly, from such a header. +.Sp +This implies that the choice of angle brackets or double quotes in an +\&\fB#include\fR directive does not in itself determine whether that +header will appear in \fB\-MM\fR dependency output. This is a +slight change in semantics from \s-1GCC\s0 versions 3.0 and earlier. +.Ip "\fB\-MF\fR \fIfile\fR" 4 +.IX Item "-MF file" +@anchor{\-MF} +When used with \fB\-M\fR or \fB\-MM\fR, specifies a +file to write the dependencies to. If no \fB\-MF\fR switch is given +the preprocessor sends the rules to the same place it would have sent +preprocessed output. +.Sp +When used with the driver options \fB\-MD\fR or \fB\-MMD\fR, +\&\fB\-MF\fR overrides the default dependency output file. +.Ip "\fB\-MG\fR" 4 +.IX Item "-MG" +When used with \fB\-M\fR or \fB\-MM\fR, \fB\-MG\fR says to treat missing +header files as generated files and assume they live in the same +directory as the source file. It suppresses preprocessed output, as a +missing header file is ordinarily an error. +.Sp +This feature is used in automatic updating of makefiles. +.Ip "\fB\-MP\fR" 4 +.IX Item "-MP" +This option instructs \s-1CPP\s0 to add a phony target for each dependency +other than the main file, causing each to depend on nothing. These +dummy rules work around errors \fBmake\fR gives if you remove header +files without updating the \fIMakefile\fR to match. +.Sp +This is typical output: +.Sp +.Vb 1 +\& test.o: test.c test.h +.Ve +.Vb 1 +\& test.h: +.Ve +.Ip "\fB\-MT\fR \fItarget\fR" 4 +.IX Item "-MT target" +Change the target of the rule emitted by dependency generation. By +default \s-1CPP\s0 takes the name of the main input file, including any path, +deletes any file suffix such as \fB.c\fR, and appends the platform's +usual object suffix. The result is the target. +.Sp +An \fB\-MT\fR option will set the target to be exactly the string you +specify. If you want multiple targets, you can specify them as a single +argument to \fB\-MT\fR, or use multiple \fB\-MT\fR options. +.Sp +For example, \fB\-MT\ '$(objpfx)foo.o'\fR might give +.Sp +.Vb 1 +\& $(objpfx)foo.o: foo.c +.Ve +.Ip "\fB\-MQ\fR \fItarget\fR" 4 +.IX Item "-MQ target" +Same as \fB\-MT\fR, but it quotes any characters which are special to +Make. \fB\-MQ\ '$(objpfx)foo.o'\fR gives +.Sp +.Vb 1 +\& $$(objpfx)foo.o: foo.c +.Ve +The default target is automatically quoted, as if it were given with +\&\fB\-MQ\fR. +.Ip "\fB\-MD\fR" 4 +.IX Item "-MD" +\&\fB\-MD\fR is equivalent to \fB\-M \-MF\fR \fIfile\fR, except that +\&\fB\-E\fR is not implied. The driver determines \fIfile\fR based on +whether an \fB\-o\fR option is given. If it is, the driver uses its +argument but with a suffix of \fI.d\fR, otherwise it take the +basename of the input file and applies a \fI.d\fR suffix. +.Sp +If \fB\-MD\fR is used in conjunction with \fB\-E\fR, any +\&\fB\-o\fR switch is understood to specify the dependency output file +(but \f(CW@pxref\fR{\-MF}), but if used without \fB\-E\fR, each \fB\-o\fR +is understood to specify a target object file. +.Sp +Since \fB\-E\fR is not implied, \fB\-MD\fR can be used to generate +a dependency output file as a side-effect of the compilation process. +.Ip "\fB\-MMD\fR" 4 +.IX Item "-MMD" +Like \fB\-MD\fR except mention only user header files, not system +\&\-header files. +.Ip "\fB\-x c\fR" 4 +.IX Item "-x c" +.PD 0 +.Ip "\fB\-x c++\fR" 4 +.IX Item "-x c++" +.Ip "\fB\-x objective-c\fR" 4 +.IX Item "-x objective-c" +.Ip "\fB\-x assembler-with-cpp\fR" 4 +.IX Item "-x assembler-with-cpp" +.PD +Specify the source language: C, \*(C+, Objective-C, or assembly. This has +nothing to do with standards conformance or extensions; it merely +selects which base syntax to expect. If you give none of these options, +cpp will deduce the language from the extension of the source file: +\&\fB.c\fR, \fB.cc\fR, \fB.m\fR, or \fB.S\fR. Some other common +extensions for \*(C+ and assembly are also recognized. If cpp does not +recognize the extension, it will treat the file as C; this is the most +generic mode. +.Sp +\&\fBNote:\fR Previous versions of cpp accepted a \fB\-lang\fR option +which selected both the language and the standards conformance level. +This option has been removed, because it conflicts with the \fB\-l\fR +option. +.Ip "\fB\-std=\fR\fIstandard\fR" 4 +.IX Item "-std=standard" +.PD 0 +.Ip "\fB\-ansi\fR" 4 +.IX Item "-ansi" +.PD +Specify the standard to which the code should conform. Currently cpp +only knows about the standards for C; other language standards will be +added in the future. +.Sp +\&\fIstandard\fR +may be one of: +.RS 4 +.if n .Ip "\f(CW""""iso9899:1990""""\fR" 4 +.el .Ip "\f(CWiso9899:1990\fR" 4 +.IX Item "iso9899:1990" +.PD 0 +.if n .Ip "\f(CW""""c89""""\fR" 4 +.el .Ip "\f(CWc89\fR" 4 +.IX Item "c89" +.PD +The \s-1ISO\s0 C standard from 1990. \fBc89\fR is the customary shorthand for +this version of the standard. +.Sp +The \fB\-ansi\fR option is equivalent to \fB\-std=c89\fR. +.if n .Ip "\f(CW""""iso9899:199409""""\fR" 4 +.el .Ip "\f(CWiso9899:199409\fR" 4 +.IX Item "iso9899:199409" +The 1990 C standard, as amended in 1994. +.if n .Ip "\f(CW""""iso9899:1999""""\fR" 4 +.el .Ip "\f(CWiso9899:1999\fR" 4 +.IX Item "iso9899:1999" +.PD 0 +.if n .Ip "\f(CW""""c99""""\fR" 4 +.el .Ip "\f(CWc99\fR" 4 +.IX Item "c99" +.if n .Ip "\f(CW""""iso9899:199x""""\fR" 4 +.el .Ip "\f(CWiso9899:199x\fR" 4 +.IX Item "iso9899:199x" +.if n .Ip "\f(CW""""c9x""""\fR" 4 +.el .Ip "\f(CWc9x\fR" 4 +.IX Item "c9x" +.PD +The revised \s-1ISO\s0 C standard, published in December 1999. Before +publication, this was known as C9X. +.if n .Ip "\f(CW""""gnu89""""\fR" 4 +.el .Ip "\f(CWgnu89\fR" 4 +.IX Item "gnu89" +The 1990 C standard plus \s-1GNU\s0 extensions. This is the default. +.if n .Ip "\f(CW""""gnu99""""\fR" 4 +.el .Ip "\f(CWgnu99\fR" 4 +.IX Item "gnu99" +.PD 0 +.if n .Ip "\f(CW""""gnu9x""""\fR" 4 +.el .Ip "\f(CWgnu9x\fR" 4 +.IX Item "gnu9x" +.PD +The 1999 C standard plus \s-1GNU\s0 extensions. +.RE +.RS 4 +.RE +.Ip "\fB\-I-\fR" 4 +.IX Item "-I-" +Split the include path. Any directories specified with \fB\-I\fR +options before \fB\-I-\fR are searched only for headers requested with +\&\f(CW\*(C`#include\ "\f(CIfile\f(CW"\*(C'\fR; they are not searched for +\&\f(CW\*(C`#include\ <\f(CIfile\f(CW>\*(C'\fR. If additional directories are +specified with \fB\-I\fR options after the \fB\-I-\fR, those +directories are searched for all \fB#include\fR directives. +.Sp +In addition, \fB\-I-\fR inhibits the use of the directory of the current +file directory as the first search directory for \f(CW\*(C`#include\ "\f(CIfile\f(CW"\*(C'\fR. +.Ip "\fB\-nostdinc\fR" 4 +.IX Item "-nostdinc" +Do not search the standard system directories for header files. +Only the directories you have specified with \fB\-I\fR options +(and the directory of the current file, if appropriate) are searched. +.Ip "\fB\-nostdinc++\fR" 4 +.IX Item "-nostdinc++" +Do not search for header files in the \*(C+\-specific standard directories, +but do still search the other standard directories. (This option is +used when building the \*(C+ library.) +.Ip "\fB\-include\fR \fIfile\fR" 4 +.IX Item "-include file" +Process \fIfile\fR as if \f(CW\*(C`#include "file"\*(C'\fR appeared as the first +line of the primary source file. However, the first directory searched +for \fIfile\fR is the preprocessor's working directory \fIinstead of\fR +the directory containing the main source file. If not found there, it +is searched for in the remainder of the \f(CW\*(C`#include "..."\*(C'\fR search +chain as normal. +.Sp +If multiple \fB\-include\fR options are given, the files are included +in the order they appear on the command line. +.Ip "\fB\-imacros\fR \fIfile\fR" 4 +.IX Item "-imacros file" +Exactly like \fB\-include\fR, except that any output produced by +scanning \fIfile\fR is thrown away. Macros it defines remain defined. +This allows you to acquire all the macros from a header without also +processing its declarations. +.Sp +All files specified by \fB\-imacros\fR are processed before all files +specified by \fB\-include\fR. +.Ip "\fB\-idirafter\fR \fIdir\fR" 4 +.IX Item "-idirafter dir" +Search \fIdir\fR for header files, but do it \fIafter\fR all +directories specified with \fB\-I\fR and the standard system directories +have been exhausted. \fIdir\fR is treated as a system include directory. +.Ip "\fB\-iprefix\fR \fIprefix\fR" 4 +.IX Item "-iprefix prefix" +Specify \fIprefix\fR as the prefix for subsequent \fB\-iwithprefix\fR +options. If the prefix represents a directory, you should include the +final \fB/\fR. +.Ip "\fB\-iwithprefix\fR \fIdir\fR" 4 +.IX Item "-iwithprefix dir" +.PD 0 +.Ip "\fB\-iwithprefixbefore\fR \fIdir\fR" 4 +.IX Item "-iwithprefixbefore dir" +.PD +Append \fIdir\fR to the prefix specified previously with +\&\fB\-iprefix\fR, and add the resulting directory to the include search +path. \fB\-iwithprefixbefore\fR puts it in the same place \fB\-I\fR +would; \fB\-iwithprefix\fR puts it where \fB\-idirafter\fR would. +.Sp +Use of these options is discouraged. +.Ip "\fB\-isystem\fR \fIdir\fR" 4 +.IX Item "-isystem dir" +Search \fIdir\fR for header files, after all directories specified by +\&\fB\-I\fR but before the standard system directories. Mark it +as a system directory, so that it gets the same special treatment as +is applied to the standard system directories. +.Ip "\fB\-fpreprocessed\fR" 4 +.IX Item "-fpreprocessed" +Indicate to the preprocessor that the input file has already been +preprocessed. This suppresses things like macro expansion, trigraph +conversion, escaped newline splicing, and processing of most directives. +The preprocessor still recognizes and removes comments, so that you can +pass a file preprocessed with \fB\-C\fR to the compiler without +problems. In this mode the integrated preprocessor is little more than +a tokenizer for the front ends. +.Sp +\&\fB\-fpreprocessed\fR is implicit if the input file has one of the +extensions \fB.i\fR, \fB.ii\fR or \fB.mi\fR. These are the +extensions that \s-1GCC\s0 uses for preprocessed files created by +\&\fB\-save-temps\fR. +.Ip "\fB\-ftabstop=\fR\fIwidth\fR" 4 +.IX Item "-ftabstop=width" +Set the distance between tab stops. This helps the preprocessor report +correct column numbers in warnings or errors, even if tabs appear on the +line. If the value is less than 1 or greater than 100, the option is +ignored. The default is 8. +.Ip "\fB\-fno-show-column\fR" 4 +.IX Item "-fno-show-column" +Do not print column numbers in diagnostics. This may be necessary if +diagnostics are being scanned by a program that does not understand the +column numbers, such as \fBdejagnu\fR. +.Ip "\fB\-A\fR \fIpredicate\fR\fB=\fR\fIanswer\fR" 4 +.IX Item "-A predicate=answer" +Make an assertion with the predicate \fIpredicate\fR and answer +\&\fIanswer\fR. This form is preferred to the older form \fB\-A\fR +\&\fIpredicate\fR\fB(\fR\fIanswer\fR\fB)\fR, which is still supported, because +it does not use shell special characters. +.Ip "\fB\-A -\fR\fIpredicate\fR\fB=\fR\fIanswer\fR" 4 +.IX Item "-A -predicate=answer" +Cancel an assertion with the predicate \fIpredicate\fR and answer +\&\fIanswer\fR. +.Ip "\fB\-A-\fR" 4 +.IX Item "-A-" +Cancel all predefined assertions and all assertions preceding it on +the command line. Also, undefine all predefined macros and all +macros preceding it on the command line. (This is a historical wart and +may change in the future.) +.Ip "\fB\-dCHARS\fR" 4 +.IX Item "-dCHARS" +\&\fI\s-1CHARS\s0\fR is a sequence of one or more of the following characters, +and must not be preceded by a space. Other characters are interpreted +by the compiler proper, or reserved for future versions of \s-1GCC\s0, and so +are silently ignored. If you specify characters whose behavior +conflicts, the result is undefined. +.RS 4 +.Ip "\fBM\fR" 4 +.IX Item "M" +Instead of the normal output, generate a list of \fB#define\fR +directives for all the macros defined during the execution of the +preprocessor, including predefined macros. This gives you a way of +finding out what is predefined in your version of the preprocessor. +Assuming you have no file \fIfoo.h\fR, the command +.Sp +.Vb 1 +\& touch foo.h; cpp -dM foo.h +.Ve +will show all the predefined macros. +.Ip "\fBD\fR" 4 +.IX Item "D" +Like \fBM\fR except in two respects: it does \fInot\fR include the +predefined macros, and it outputs \fIboth\fR the \fB#define\fR +directives and the result of preprocessing. Both kinds of output go to +the standard output file. +.Ip "\fBN\fR" 4 +.IX Item "N" +Like \fBD\fR, but emit only the macro names, not their expansions. +.Ip "\fBI\fR" 4 +.IX Item "I" +Output \fB#include\fR directives in addition to the result of +preprocessing. +.RE +.RS 4 +.RE +.Ip "\fB\-P\fR" 4 +.IX Item "-P" +Inhibit generation of linemarkers in the output from the preprocessor. +This might be useful when running the preprocessor on something that is +not C code, and will be sent to a program which might be confused by the +linemarkers. +.Ip "\fB\-C\fR" 4 +.IX Item "-C" +Do not discard comments. All comments are passed through to the output +file, except for comments in processed directives, which are deleted +along with the directive. +.Sp +You should be prepared for side effects when using \fB\-C\fR; it +causes the preprocessor to treat comments as tokens in their own right. +For example, comments appearing at the start of what would be a +directive line have the effect of turning that line into an ordinary +source line, since the first token on the line is no longer a \fB#\fR. +.Ip "\fB\-gcc\fR" 4 +.IX Item "-gcc" +Define the macros _\|_GNUC_\|_, _\|_GNUC_MINOR_\|_ and +_\|_GNUC_PATCHLEVEL_\|_. These are defined automatically when you use +\&\fBgcc \-E\fR; you can turn them off in that case with +\&\fB\-no-gcc\fR. +.Ip "\fB\-traditional\fR" 4 +.IX Item "-traditional" +Try to imitate the behavior of old-fashioned C, as opposed to \s-1ISO\s0 +C. +.Ip "\fB\-trigraphs\fR" 4 +.IX Item "-trigraphs" +Process trigraph sequences. +These are three-character sequences, all starting with \fB??\fR, that +are defined by \s-1ISO\s0 C to stand for single characters. For example, +\&\fB??/\fR stands for \fB\e\fR, so \fB'??/n'\fR is a character +constant for a newline. By default, \s-1GCC\s0 ignores trigraphs, but in +standard-conforming modes it converts them. See the \fB\-std\fR and +\&\fB\-ansi\fR options. +.Sp +The nine trigraphs and their replacements are +.Sp +.Vb 2 +\& Trigraph: ??( ??) ??< ??> ??= ??/ ??' ??! ??- +\& Replacement: [ ] { } # \e ^ | ~ +.Ve +.Ip "\fB\-remap\fR" 4 +.IX Item "-remap" +Enable special code to work around file systems which only permit very +short file names, such as \s-1MS-DOS\s0. +.Ip "\fB\-$\fR" 4 +.IX Item "-$" +Forbid the use of \fB$\fR in identifiers. The C standard allows +implementations to define extra characters that can appear in +identifiers. By default \s-1GNU\s0 \s-1CPP\s0 permits \fB$\fR, a common extension. +.Ip "\fB\-h\fR" 4 +.IX Item "-h" +.PD 0 +.Ip "\fB\*(--help\fR" 4 +.IX Item "help" +.Ip "\fB\*(--target-help\fR" 4 +.IX Item "target-help" +.PD +Print text describing all the command line options instead of +preprocessing anything. +.Ip "\fB\-v\fR" 4 +.IX Item "-v" +Verbose mode. Print out \s-1GNU\s0 \s-1CPP\s0's version number at the beginning of +execution, and report the final form of the include path. +.Ip "\fB\-H\fR" 4 +.IX Item "-H" +Print the name of each header file used, in addition to other normal +activities. Each name is indented to show how deep in the +\&\fB#include\fR stack it is. +.Ip "\fB\-version\fR" 4 +.IX Item "-version" +.PD 0 +.Ip "\fB\*(--version\fR" 4 +.IX Item "version" +.PD +Print out \s-1GNU\s0 \s-1CPP\s0's version number. With one dash, proceed to +preprocess as normal. With two dashes, exit immediately. +.Sh "Passing Options to the Assembler" +.IX Subsection "Passing Options to the Assembler" +You can pass options to the assembler. +.Ip "\fB\-Wa,\fR\fIoption\fR" 4 +.IX Item "-Wa,option" +Pass \fIoption\fR as an option to the assembler. If \fIoption\fR +contains commas, it is split into multiple options at the commas. +.Sh "Options for Linking" +.IX Subsection "Options for Linking" +These options come into play when the compiler links object files into +an executable output file. They are meaningless if the compiler is +not doing a link step. +.Ip "\fIobject-file-name\fR" 4 +.IX Item "object-file-name" +A file name that does not end in a special recognized suffix is +considered to name an object file or library. (Object files are +distinguished from libraries by the linker according to the file +contents.) If linking is done, these object files are used as input +to the linker. +.Ip "\fB\-c\fR" 4 +.IX Item "-c" +.PD 0 +.Ip "\fB\-S\fR" 4 +.IX Item "-S" +.Ip "\fB\-E\fR" 4 +.IX Item "-E" +.PD +If any of these options is used, then the linker is not run, and +object file names should not be used as arguments. +.Ip "\fB\-l\fR\fIlibrary\fR" 4 +.IX Item "-llibrary" +.PD 0 +.Ip "\fB\-l\fR \fIlibrary\fR" 4 +.IX Item "-l library" +.PD +Search the library named \fIlibrary\fR when linking. (The second +alternative with the library as a separate argument is only for +\&\s-1POSIX\s0 compliance and is not recommended.) +.Sp +It makes a difference where in the command you write this option; the +linker searches and processes libraries and object files in the order they +are specified. Thus, \fBfoo.o \-lz bar.o\fR searches library \fBz\fR +after file \fIfoo.o\fR but before \fIbar.o\fR. If \fIbar.o\fR refers +to functions in \fBz\fR, those functions may not be loaded. +.Sp +The linker searches a standard list of directories for the library, +which is actually a file named \fIlib\fIlibrary\fI.a\fR. The linker +then uses this file as if it had been specified precisely by name. +.Sp +The directories searched include several standard system directories +plus any that you specify with \fB\-L\fR. +.Sp +Normally the files found this way are library files\-\-\-archive files +whose members are object files. The linker handles an archive file by +scanning through it for members which define symbols that have so far +been referenced but not defined. But if the file that is found is an +ordinary object file, it is linked in the usual fashion. The only +difference between using an \fB\-l\fR option and specifying a file name +is that \fB\-l\fR surrounds \fIlibrary\fR with \fBlib\fR and \fB.a\fR +and searches several directories. +.Ip "\fB\-lobjc\fR" 4 +.IX Item "-lobjc" +You need this special case of the \fB\-l\fR option in order to +link an Objective-C program. +.Ip "\fB\-nostartfiles\fR" 4 +.IX Item "-nostartfiles" +Do not use the standard system startup files when linking. +The standard system libraries are used normally, unless \fB\-nostdlib\fR +or \fB\-nodefaultlibs\fR is used. +.Ip "\fB\-nodefaultlibs\fR" 4 +.IX Item "-nodefaultlibs" +Do not use the standard system libraries when linking. +Only the libraries you specify will be passed to the linker. +The standard startup files are used normally, unless \fB\-nostartfiles\fR +is used. The compiler may generate calls to memcmp, memset, and memcpy +for System V (and \s-1ISO\s0 C) environments or to bcopy and bzero for +\&\s-1BSD\s0 environments. These entries are usually resolved by entries in +libc. These entry points should be supplied through some other +mechanism when this option is specified. +.Ip "\fB\-nostdlib\fR" 4 +.IX Item "-nostdlib" +Do not use the standard system startup files or libraries when linking. +No startup files and only the libraries you specify will be passed to +the linker. The compiler may generate calls to memcmp, memset, and memcpy +for System V (and \s-1ISO\s0 C) environments or to bcopy and bzero for +\&\s-1BSD\s0 environments. These entries are usually resolved by entries in +libc. These entry points should be supplied through some other +mechanism when this option is specified. +.Sp +One of the standard libraries bypassed by \fB\-nostdlib\fR and +\&\fB\-nodefaultlibs\fR is \fIlibgcc.a\fR, a library of internal subroutines +that \s-1GCC\s0 uses to overcome shortcomings of particular machines, or special +needs for some languages. +.Sp +In most cases, you need \fIlibgcc.a\fR even when you want to avoid +other standard libraries. In other words, when you specify \fB\-nostdlib\fR +or \fB\-nodefaultlibs\fR you should usually specify \fB\-lgcc\fR as well. +This ensures that you have no unresolved references to internal \s-1GCC\s0 +library subroutines. (For example, \fB_\|_main\fR, used to ensure \*(C+ +constructors will be called.) +.Ip "\fB\-s\fR" 4 +.IX Item "-s" +Remove all symbol table and relocation information from the executable. +.Ip "\fB\-static\fR" 4 +.IX Item "-static" +On systems that support dynamic linking, this prevents linking with the shared +libraries. On other systems, this option has no effect. +.Ip "\fB\-shared\fR" 4 +.IX Item "-shared" +Produce a shared object which can then be linked with other objects to +form an executable. Not all systems support this option. For predictable +results, you must also specify the same set of options that were used to +generate code (\fB\-fpic\fR, \fB\-fPIC\fR, or model suboptions) +when you specify this option.[1] +.Ip "\fB\-shared-libgcc\fR" 4 +.IX Item "-shared-libgcc" +.PD 0 +.Ip "\fB\-static-libgcc\fR" 4 +.IX Item "-static-libgcc" +.PD +On systems that provide \fIlibgcc\fR as a shared library, these options +force the use of either the shared or static version respectively. +If no shared version of \fIlibgcc\fR was built when the compiler was +configured, these options have no effect. +.Sp +There are several situations in which an application should use the +shared \fIlibgcc\fR instead of the static version. The most common +of these is when the application wishes to throw and catch exceptions +across different shared libraries. In that case, each of the libraries +as well as the application itself should use the shared \fIlibgcc\fR. +.Sp +Therefore, the G++ and \s-1GCJ\s0 drivers automatically add +\&\fB\-shared-libgcc\fR whenever you build a shared library or a main +executable, because \*(C+ and Java programs typically use exceptions, so +this is the right thing to do. +.Sp +If, instead, you use the \s-1GCC\s0 driver to create shared libraries, you may +find that they will not always be linked with the shared \fIlibgcc\fR. +If \s-1GCC\s0 finds, at its configuration time, that you have a \s-1GNU\s0 linker that +does not support option \fB\*(--eh-frame-hdr\fR, it will link the shared +version of \fIlibgcc\fR into shared libraries by default. Otherwise, +it will take advantage of the linker and optimize away the linking with +the shared version of \fIlibgcc\fR, linking with the static version of +libgcc by default. This allows exceptions to propagate through such +shared libraries, without incurring relocation costs at library load +time. +.Sp +However, if a library or main executable is supposed to throw or catch +exceptions, you must link it using the G++ or \s-1GCJ\s0 driver, as appropriate +for the languages used in the program, or using the option +\&\fB\-shared-libgcc\fR, such that it is linked with the shared +\&\fIlibgcc\fR. +.Ip "\fB\-symbolic\fR" 4 +.IX Item "-symbolic" +Bind references to global symbols when building a shared object. Warn +about any unresolved references (unless overridden by the link editor +option \fB\-Xlinker \-z \-Xlinker defs\fR). Only a few systems support +this option. +.Ip "\fB\-Xlinker\fR \fIoption\fR" 4 +.IX Item "-Xlinker option" +Pass \fIoption\fR as an option to the linker. You can use this to +supply system-specific linker options which \s-1GCC\s0 does not know how to +recognize. +.Sp +If you want to pass an option that takes an argument, you must use +\&\fB\-Xlinker\fR twice, once for the option and once for the argument. +For example, to pass \fB\-assert definitions\fR, you must write +\&\fB\-Xlinker \-assert \-Xlinker definitions\fR. It does not work to write +\&\fB\-Xlinker \*(L"\-assert definitions\*(R"\fR, because this passes the entire +string as a single argument, which is not what the linker expects. +.Ip "\fB\-Wl,\fR\fIoption\fR" 4 +.IX Item "-Wl,option" +Pass \fIoption\fR as an option to the linker. If \fIoption\fR contains +commas, it is split into multiple options at the commas. +.Ip "\fB\-u\fR \fIsymbol\fR" 4 +.IX Item "-u symbol" +Pretend the symbol \fIsymbol\fR is undefined, to force linking of +library modules to define it. You can use \fB\-u\fR multiple times with +different symbols to force loading of additional library modules. +.Sh "Options for Directory Search" +.IX Subsection "Options for Directory Search" +These options specify directories to search for header files, for +libraries and for parts of the compiler: +.Ip "\fB\-I\fR\fIdir\fR" 4 +.IX Item "-Idir" +Add the directory \fIdir\fR to the head of the list of directories to be +searched for header files. This can be used to override a system header +file, substituting your own version, since these directories are +searched before the system header file directories. However, you should +not use this option to add directories that contain vendor-supplied +system header files (use \fB\-isystem\fR for that). If you use more than +one \fB\-I\fR option, the directories are scanned in left-to-right +order; the standard system directories come after. +.Sp +If a standard system include directory, or a directory specified with +\&\fB\-isystem\fR, is also specified with \fB\-I\fR, the \fB\-I\fR +option will be ignored. The directory will still be searched but as a +system directory at its normal position in the system include chain. +This is to ensure that \s-1GCC\s0's procedure to fix buggy system headers and +the ordering for the include_next directive are not inadvertantly changed. +If you really need to change the search order for system directories, +use the \fB\-nostdinc\fR and/or \fB\-isystem\fR options. +.Ip "\fB\-I-\fR" 4 +.IX Item "-I-" +Any directories you specify with \fB\-I\fR options before the \fB\-I-\fR +option are searched only for the case of \fB#include "\fR\fIfile\fR\fB"\fR; +they are not searched for \fB#include <\fR\fIfile\fR\fB>\fR. +.Sp +If additional directories are specified with \fB\-I\fR options after +the \fB\-I-\fR, these directories are searched for all \fB#include\fR +directives. (Ordinarily \fIall\fR \fB\-I\fR directories are used +this way.) +.Sp +In addition, the \fB\-I-\fR option inhibits the use of the current +directory (where the current input file came from) as the first search +directory for \fB#include "\fR\fIfile\fR\fB"\fR. There is no way to +override this effect of \fB\-I-\fR. With \fB\-I.\fR you can specify +searching the directory which was current when the compiler was +invoked. That is not exactly the same as what the preprocessor does +by default, but it is often satisfactory. +.Sp +\&\fB\-I-\fR does not inhibit the use of the standard system directories +for header files. Thus, \fB\-I-\fR and \fB\-nostdinc\fR are +independent. +.Ip "\fB\-L\fR\fIdir\fR" 4 +.IX Item "-Ldir" +Add directory \fIdir\fR to the list of directories to be searched +for \fB\-l\fR. +.Ip "\fB\-B\fR\fIprefix\fR" 4 +.IX Item "-Bprefix" +This option specifies where to find the executables, libraries, +include files, and data files of the compiler itself. +.Sp +The compiler driver program runs one or more of the subprograms +\&\fIcpp\fR, \fIcc1\fR, \fIas\fR and \fIld\fR. It tries +\&\fIprefix\fR as a prefix for each program it tries to run, both with and +without \fImachine\fR\fB/\fR\fIversion\fR\fB/\fR. +.Sp +For each subprogram to be run, the compiler driver first tries the +\&\fB\-B\fR prefix, if any. If that name is not found, or if \fB\-B\fR +was not specified, the driver tries two standard prefixes, which are +\&\fI/usr/lib/gcc/\fR and \fI/usr/local/lib/gcc-lib/\fR. If neither of +those results in a file name that is found, the unmodified program +name is searched for using the directories specified in your +\&\fB\s-1PATH\s0\fR environment variable. +.Sp +The compiler will check to see if the path provided by the \fB\-B\fR +refers to a directory, and if necessary it will add a directory +separator character at the end of the path. +.Sp +\&\fB\-B\fR prefixes that effectively specify directory names also apply +to libraries in the linker, because the compiler translates these +options into \fB\-L\fR options for the linker. They also apply to +includes files in the preprocessor, because the compiler translates these +options into \fB\-isystem\fR options for the preprocessor. In this case, +the compiler appends \fBinclude\fR to the prefix. +.Sp +The run-time support file \fIlibgcc.a\fR can also be searched for using +the \fB\-B\fR prefix, if needed. If it is not found there, the two +standard prefixes above are tried, and that is all. The file is left +out of the link if it is not found by those means. +.Sp +Another way to specify a prefix much like the \fB\-B\fR prefix is to use +the environment variable \fB\s-1GCC_EXEC_PREFIX\s0\fR. +.Sp +As a special kludge, if the path provided by \fB\-B\fR is +\&\fI[dir/]stage\fIN\fI/\fR, where \fIN\fR is a number in the range 0 to +9, then it will be replaced by \fI[dir/]include\fR. This is to help +with boot-strapping the compiler. +.Ip "\fB\-specs=\fR\fIfile\fR" 4 +.IX Item "-specs=file" +Process \fIfile\fR after the compiler reads in the standard \fIspecs\fR +file, in order to override the defaults that the \fIgcc\fR driver +program uses when determining what switches to pass to \fIcc1\fR, +\&\fIcc1plus\fR, \fIas\fR, \fIld\fR, etc. More than one +\&\fB\-specs=\fR\fIfile\fR can be specified on the command line, and they +are processed in order, from left to right. +.Sh "Specifying Target Machine and Compiler Version" +.IX Subsection "Specifying Target Machine and Compiler Version" +By default, \s-1GCC\s0 compiles code for the same type of machine that you +are using. However, it can also be installed as a cross-compiler, to +compile for some other type of machine. In fact, several different +configurations of \s-1GCC\s0, for different target machines, can be +installed side by side. Then you specify which one to use with the +\&\fB\-b\fR option. +.PP +In addition, older and newer versions of \s-1GCC\s0 can be installed side +by side. One of them (probably the newest) will be the default, but +you may sometimes wish to use another. +.Ip "\fB\-b\fR \fImachine\fR" 4 +.IX Item "-b machine" +The argument \fImachine\fR specifies the target machine for compilation. +This is useful when you have installed \s-1GCC\s0 as a cross-compiler. +.Sp +The value to use for \fImachine\fR is the same as was specified as the +machine type when configuring \s-1GCC\s0 as a cross-compiler. For +example, if a cross-compiler was configured with \fBconfigure +i386v\fR, meaning to compile for an 80386 running System V, then you +would specify \fB\-b i386v\fR to run that cross compiler. +.Sp +When you do not specify \fB\-b\fR, it normally means to compile for +the same type of machine that you are using. +.Ip "\fB\-V\fR \fIversion\fR" 4 +.IX Item "-V version" +The argument \fIversion\fR specifies which version of \s-1GCC\s0 to run. +This is useful when multiple versions are installed. For example, +\&\fIversion\fR might be \fB2.0\fR, meaning to run \s-1GCC\s0 version 2.0. +.Sp +The default version, when you do not specify \fB\-V\fR, is the last +version of \s-1GCC\s0 that you installed. +.PP +The \fB\-b\fR and \fB\-V\fR options actually work by controlling part of +the file name used for the executable files and libraries used for +compilation. A given version of \s-1GCC\s0, for a given target machine, is +normally kept in the directory \fI/usr/local/lib/gcc-lib/\fImachine\fI/\fIversion\fI\fR. +.PP +Thus, sites can customize the effect of \fB\-b\fR or \fB\-V\fR either by +changing the names of these directories or adding alternate names (or +symbolic links). If in directory \fI/usr/local/lib/gcc-lib/\fR the +file \fI80386\fR is a link to the file \fIi386v\fR, then \fB\-b +80386\fR becomes an alias for \fB\-b i386v\fR. +.PP +In one respect, the \fB\-b\fR or \fB\-V\fR do not completely change +to a different compiler: the top-level driver program \fBgcc\fR +that you originally invoked continues to run and invoke the other +executables (preprocessor, compiler per se, assembler and linker) +that do the real work. However, since no real work is done in the +driver program, it usually does not matter that the driver program +in use is not the one for the specified target. It is common for the +interface to the other executables to change incompatibly between +compiler versions, so unless the version specified is very close to that +of the driver (for example, \fB\-V 3.0\fR with a driver program from \s-1GCC\s0 +version 3.0.1), use of \fB\-V\fR may not work; for example, using +\&\fB\-V 2.95.2\fR will not work with a driver program from \s-1GCC\s0 3.0. +.PP +The only way that the driver program depends on the target machine is +in the parsing and handling of special machine-specific options. +However, this is controlled by a file which is found, along with the +other executables, in the directory for the specified version and +target machine. As a result, a single installed driver program adapts +to any specified target machine, and sufficiently similar compiler +versions. +.PP +The driver program executable does control one significant thing, +however: the default version and target machine. Therefore, you can +install different instances of the driver program, compiled for +different targets or versions, under different names. +.PP +For example, if the driver for version 2.0 is installed as \fBogcc\fR +and that for version 2.1 is installed as \fBgcc\fR, then the command +\&\fBgcc\fR will use version 2.1 by default, while \fBogcc\fR will use +2.0 by default. However, you can choose either version with either +command with the \fB\-V\fR option. +.Sh "Hardware Models and Configurations" +.IX Subsection "Hardware Models and Configurations" +Earlier we discussed the standard option \fB\-b\fR which chooses among +different installed compilers for completely different target +machines, such as \s-1VAX\s0 vs. 68000 vs. 80386. +.PP +In addition, each of these target machine types can have its own +special options, starting with \fB\-m\fR, to choose among various +hardware models or configurations\-\-\-for example, 68010 vs 68020, +floating coprocessor or none. A single installed version of the +compiler can compile for any model or configuration, according to the +options specified. +.PP +Some configurations of the compiler also support additional special +options, usually for compatibility with other compilers on the same +platform. +.PP +These options are defined by the macro \f(CW\*(C`TARGET_SWITCHES\*(C'\fR in the +machine description. The default for the options is also defined by +that macro, which enables you to change the defaults. +.PP +.I "M680x0 Options" +.IX Subsection "M680x0 Options" +.PP +These are the \fB\-m\fR options defined for the 68000 series. The default +values for these options depends on which style of 68000 was selected when +the compiler was configured; the defaults for the most common choices are +given below. +.Ip "\fB\-m68000\fR" 4 +.IX Item "-m68000" +.PD 0 +.Ip "\fB\-mc68000\fR" 4 +.IX Item "-mc68000" +.PD +Generate output for a 68000. This is the default +when the compiler is configured for 68000\-based systems. +.Sp +Use this option for microcontrollers with a 68000 or \s-1EC000\s0 core, +including the 68008, 68302, 68306, 68307, 68322, 68328 and 68356. +.Ip "\fB\-m68020\fR" 4 +.IX Item "-m68020" +.PD 0 +.Ip "\fB\-mc68020\fR" 4 +.IX Item "-mc68020" +.PD +Generate output for a 68020. This is the default +when the compiler is configured for 68020\-based systems. +.Ip "\fB\-m68881\fR" 4 +.IX Item "-m68881" +Generate output containing 68881 instructions for floating point. +This is the default for most 68020 systems unless \fB\*(--nfp\fR was +specified when the compiler was configured. +.Ip "\fB\-m68030\fR" 4 +.IX Item "-m68030" +Generate output for a 68030. This is the default when the compiler is +configured for 68030\-based systems. +.Ip "\fB\-m68040\fR" 4 +.IX Item "-m68040" +Generate output for a 68040. This is the default when the compiler is +configured for 68040\-based systems. +.Sp +This option inhibits the use of 68881/68882 instructions that have to be +emulated by software on the 68040. Use this option if your 68040 does not +have code to emulate those instructions. +.Ip "\fB\-m68060\fR" 4 +.IX Item "-m68060" +Generate output for a 68060. This is the default when the compiler is +configured for 68060\-based systems. +.Sp +This option inhibits the use of 68020 and 68881/68882 instructions that +have to be emulated by software on the 68060. Use this option if your 68060 +does not have code to emulate those instructions. +.Ip "\fB\-mcpu32\fR" 4 +.IX Item "-mcpu32" +Generate output for a \s-1CPU32\s0. This is the default +when the compiler is configured for CPU32\-based systems. +.Sp +Use this option for microcontrollers with a +\&\s-1CPU32\s0 or \s-1CPU32+\s0 core, including the 68330, 68331, 68332, 68333, 68334, +68336, 68340, 68341, 68349 and 68360. +.Ip "\fB\-m5200\fR" 4 +.IX Item "-m5200" +Generate output for a 520X ``coldfire'' family cpu. This is the default +when the compiler is configured for 520X-based systems. +.Sp +Use this option for microcontroller with a 5200 core, including +the \s-1MCF5202\s0, \s-1MCF5203\s0, \s-1MCF5204\s0 and \s-1MCF5202\s0. +.Ip "\fB\-m68020\-40\fR" 4 +.IX Item "-m68020-40" +Generate output for a 68040, without using any of the new instructions. +This results in code which can run relatively efficiently on either a +68020/68881 or a 68030 or a 68040. The generated code does use the +68881 instructions that are emulated on the 68040. +.Ip "\fB\-m68020\-60\fR" 4 +.IX Item "-m68020-60" +Generate output for a 68060, without using any of the new instructions. +This results in code which can run relatively efficiently on either a +68020/68881 or a 68030 or a 68040. The generated code does use the +68881 instructions that are emulated on the 68060. +.Ip "\fB\-mfpa\fR" 4 +.IX Item "-mfpa" +Generate output containing Sun \s-1FPA\s0 instructions for floating point. +.Ip "\fB\-msoft-float\fR" 4 +.IX Item "-msoft-float" +Generate output containing library calls for floating point. +\&\fBWarning:\fR the requisite libraries are not available for all m68k +targets. Normally the facilities of the machine's usual C compiler are +used, but this can't be done directly in cross-compilation. You must +make your own arrangements to provide suitable library functions for +cross-compilation. The embedded targets \fBm68k-*\-aout\fR and +\&\fBm68k-*\-coff\fR do provide software floating point support. +.Ip "\fB\-mshort\fR" 4 +.IX Item "-mshort" +Consider type \f(CW\*(C`int\*(C'\fR to be 16 bits wide, like \f(CW\*(C`short int\*(C'\fR. +.Ip "\fB\-mnobitfield\fR" 4 +.IX Item "-mnobitfield" +Do not use the bit-field instructions. The \fB\-m68000\fR, \fB\-mcpu32\fR +and \fB\-m5200\fR options imply \fB\-mnobitfield\fR. +.Ip "\fB\-mbitfield\fR" 4 +.IX Item "-mbitfield" +Do use the bit-field instructions. The \fB\-m68020\fR option implies +\&\fB\-mbitfield\fR. This is the default if you use a configuration +designed for a 68020. +.Ip "\fB\-mrtd\fR" 4 +.IX Item "-mrtd" +Use a different function-calling convention, in which functions +that take a fixed number of arguments return with the \f(CW\*(C`rtd\*(C'\fR +instruction, which pops their arguments while returning. This +saves one instruction in the caller since there is no need to pop +the arguments there. +.Sp +This calling convention is incompatible with the one normally +used on Unix, so you cannot use it if you need to call libraries +compiled with the Unix compiler. +.Sp +Also, you must provide function prototypes for all functions that +take variable numbers of arguments (including \f(CW\*(C`printf\*(C'\fR); +otherwise incorrect code will be generated for calls to those +functions. +.Sp +In addition, seriously incorrect code will result if you call a +function with too many arguments. (Normally, extra arguments are +harmlessly ignored.) +.Sp +The \f(CW\*(C`rtd\*(C'\fR instruction is supported by the 68010, 68020, 68030, +68040, 68060 and \s-1CPU32\s0 processors, but not by the 68000 or 5200. +.Ip "\fB\-malign-int\fR" 4 +.IX Item "-malign-int" +.PD 0 +.Ip "\fB\-mno-align-int\fR" 4 +.IX Item "-mno-align-int" +.PD +Control whether \s-1GCC\s0 aligns \f(CW\*(C`int\*(C'\fR, \f(CW\*(C`long\*(C'\fR, \f(CW\*(C`long long\*(C'\fR, +\&\f(CW\*(C`float\*(C'\fR, \f(CW\*(C`double\*(C'\fR, and \f(CW\*(C`long double\*(C'\fR variables on a 32\-bit +boundary (\fB\-malign-int\fR) or a 16\-bit boundary (\fB\-mno-align-int\fR). +Aligning variables on 32\-bit boundaries produces code that runs somewhat +faster on processors with 32\-bit busses at the expense of more memory. +.Sp +\&\fBWarning:\fR if you use the \fB\-malign-int\fR switch, \s-1GCC\s0 will +align structures containing the above types differently than +most published application binary interface specifications for the m68k. +.Ip "\fB\-mpcrel\fR" 4 +.IX Item "-mpcrel" +Use the pc-relative addressing mode of the 68000 directly, instead of +using a global offset table. At present, this option implies \fB\-fpic\fR, +allowing at most a 16\-bit offset for pc-relative addressing. \fB\-fPIC\fR is +not presently supported with \fB\-mpcrel\fR, though this could be supported for +68020 and higher processors. +.Ip "\fB\-mno-strict-align\fR" 4 +.IX Item "-mno-strict-align" +.PD 0 +.Ip "\fB\-mstrict-align\fR" 4 +.IX Item "-mstrict-align" +.PD +Do not (do) assume that unaligned memory references will be handled by +the system. +.PP +.I "M68hc1x Options" +.IX Subsection "M68hc1x Options" +.PP +These are the \fB\-m\fR options defined for the 68hc11 and 68hc12 +microcontrollers. The default values for these options depends on +which style of microcontroller was selected when the compiler was configured; +the defaults for the most common choices are given below. +.Ip "\fB\-m6811\fR" 4 +.IX Item "-m6811" +.PD 0 +.Ip "\fB\-m68hc11\fR" 4 +.IX Item "-m68hc11" +.PD +Generate output for a 68HC11. This is the default +when the compiler is configured for 68HC11\-based systems. +.Ip "\fB\-m6812\fR" 4 +.IX Item "-m6812" +.PD 0 +.Ip "\fB\-m68hc12\fR" 4 +.IX Item "-m68hc12" +.PD +Generate output for a 68HC12. This is the default +when the compiler is configured for 68HC12\-based systems. +.Ip "\fB\-mauto-incdec\fR" 4 +.IX Item "-mauto-incdec" +Enable the use of 68HC12 pre and post auto-increment and auto-decrement +addressing modes. +.Ip "\fB\-mshort\fR" 4 +.IX Item "-mshort" +Consider type \f(CW\*(C`int\*(C'\fR to be 16 bits wide, like \f(CW\*(C`short int\*(C'\fR. +.Ip "\fB\-msoft-reg-count=\fR\fIcount\fR" 4 +.IX Item "-msoft-reg-count=count" +Specify the number of pseudo-soft registers which are used for the +code generation. The maximum number is 32. Using more pseudo-soft +register may or may not result in better code depending on the program. +The default is 4 for 68HC11 and 2 for 68HC12. +.PP +.I "\s-1VAX\s0 Options" +.IX Subsection "VAX Options" +.PP +These \fB\-m\fR options are defined for the \s-1VAX:\s0 +.Ip "\fB\-munix\fR" 4 +.IX Item "-munix" +Do not output certain jump instructions (\f(CW\*(C`aobleq\*(C'\fR and so on) +that the Unix assembler for the \s-1VAX\s0 cannot handle across long +ranges. +.Ip "\fB\-mgnu\fR" 4 +.IX Item "-mgnu" +Do output those jump instructions, on the assumption that you +will assemble with the \s-1GNU\s0 assembler. +.Ip "\fB\-mg\fR" 4 +.IX Item "-mg" +Output code for g-format floating point numbers instead of d-format. +.PP +.I "\s-1SPARC\s0 Options" +.IX Subsection "SPARC Options" +.PP +These \fB\-m\fR switches are supported on the \s-1SPARC:\s0 +.Ip "\fB\-mno-app-regs\fR" 4 +.IX Item "-mno-app-regs" +.PD 0 +.Ip "\fB\-mapp-regs\fR" 4 +.IX Item "-mapp-regs" +.PD +Specify \fB\-mapp-regs\fR to generate output using the global registers +2 through 4, which the \s-1SPARC\s0 \s-1SVR4\s0 \s-1ABI\s0 reserves for applications. This +is the default. +.Sp +To be fully \s-1SVR4\s0 \s-1ABI\s0 compliant at the cost of some performance loss, +specify \fB\-mno-app-regs\fR. You should compile libraries and system +software with this option. +.Ip "\fB\-mfpu\fR" 4 +.IX Item "-mfpu" +.PD 0 +.Ip "\fB\-mhard-float\fR" 4 +.IX Item "-mhard-float" +.PD +Generate output containing floating point instructions. This is the +default. +.Ip "\fB\-mno-fpu\fR" 4 +.IX Item "-mno-fpu" +.PD 0 +.Ip "\fB\-msoft-float\fR" 4 +.IX Item "-msoft-float" +.PD +Generate output containing library calls for floating point. +\&\fBWarning:\fR the requisite libraries are not available for all \s-1SPARC\s0 +targets. Normally the facilities of the machine's usual C compiler are +used, but this cannot be done directly in cross-compilation. You must make +your own arrangements to provide suitable library functions for +cross-compilation. The embedded targets \fBsparc-*\-aout\fR and +\&\fBsparclite-*\-*\fR do provide software floating point support. +.Sp +\&\fB\-msoft-float\fR changes the calling convention in the output file; +therefore, it is only useful if you compile \fIall\fR of a program with +this option. In particular, you need to compile \fIlibgcc.a\fR, the +library that comes with \s-1GCC\s0, with \fB\-msoft-float\fR in order for +this to work. +.Ip "\fB\-mhard-quad-float\fR" 4 +.IX Item "-mhard-quad-float" +Generate output containing quad-word (long double) floating point +instructions. +.Ip "\fB\-msoft-quad-float\fR" 4 +.IX Item "-msoft-quad-float" +Generate output containing library calls for quad-word (long double) +floating point instructions. The functions called are those specified +in the \s-1SPARC\s0 \s-1ABI\s0. This is the default. +.Sp +As of this writing, there are no sparc implementations that have hardware +support for the quad-word floating point instructions. They all invoke +a trap handler for one of these instructions, and then the trap handler +emulates the effect of the instruction. Because of the trap handler overhead, +this is much slower than calling the \s-1ABI\s0 library routines. Thus the +\&\fB\-msoft-quad-float\fR option is the default. +.Ip "\fB\-mno-flat\fR" 4 +.IX Item "-mno-flat" +.PD 0 +.Ip "\fB\-mflat\fR" 4 +.IX Item "-mflat" +.PD +With \fB\-mflat\fR, the compiler does not generate save/restore instructions +and will use a ``flat'' or single register window calling convention. +This model uses \f(CW%i7\fR as the frame pointer and is compatible with the normal +register window model. Code from either may be intermixed. +The local registers and the input registers (0\*(--5) are still treated as +``call saved'' registers and will be saved on the stack as necessary. +.Sp +With \fB\-mno-flat\fR (the default), the compiler emits save/restore +instructions (except for leaf functions) and is the normal mode of operation. +.Ip "\fB\-mno-unaligned-doubles\fR" 4 +.IX Item "-mno-unaligned-doubles" +.PD 0 +.Ip "\fB\-munaligned-doubles\fR" 4 +.IX Item "-munaligned-doubles" +.PD +Assume that doubles have 8 byte alignment. This is the default. +.Sp +With \fB\-munaligned-doubles\fR, \s-1GCC\s0 assumes that doubles have 8 byte +alignment only if they are contained in another type, or if they have an +absolute address. Otherwise, it assumes they have 4 byte alignment. +Specifying this option avoids some rare compatibility problems with code +generated by other compilers. It is not the default because it results +in a performance loss, especially for floating point code. +.Ip "\fB\-mno-faster-structs\fR" 4 +.IX Item "-mno-faster-structs" +.PD 0 +.Ip "\fB\-mfaster-structs\fR" 4 +.IX Item "-mfaster-structs" +.PD +With \fB\-mfaster-structs\fR, the compiler assumes that structures +should have 8 byte alignment. This enables the use of pairs of +\&\f(CW\*(C`ldd\*(C'\fR and \f(CW\*(C`std\*(C'\fR instructions for copies in structure +assignment, in place of twice as many \f(CW\*(C`ld\*(C'\fR and \f(CW\*(C`st\*(C'\fR pairs. +However, the use of this changed alignment directly violates the Sparc +\&\s-1ABI\s0. Thus, it's intended only for use on targets where the developer +acknowledges that their resulting code will not be directly in line with +the rules of the \s-1ABI\s0. +.Ip "\fB\-mv8\fR" 4 +.IX Item "-mv8" +.PD 0 +.Ip "\fB\-msparclite\fR" 4 +.IX Item "-msparclite" +.PD +These two options select variations on the \s-1SPARC\s0 architecture. +.Sp +By default (unless specifically configured for the Fujitsu SPARClite), +\&\s-1GCC\s0 generates code for the v7 variant of the \s-1SPARC\s0 architecture. +.Sp +\&\fB\-mv8\fR will give you \s-1SPARC\s0 v8 code. The only difference from v7 +code is that the compiler emits the integer multiply and integer +divide instructions which exist in \s-1SPARC\s0 v8 but not in \s-1SPARC\s0 v7. +.Sp +\&\fB\-msparclite\fR will give you SPARClite code. This adds the integer +multiply, integer divide step and scan (\f(CW\*(C`ffs\*(C'\fR) instructions which +exist in SPARClite but not in \s-1SPARC\s0 v7. +.Sp +These options are deprecated and will be deleted in a future \s-1GCC\s0 release. +They have been replaced with \fB\-mcpu=xxx\fR. +.Ip "\fB\-mcypress\fR" 4 +.IX Item "-mcypress" +.PD 0 +.Ip "\fB\-msupersparc\fR" 4 +.IX Item "-msupersparc" +.PD +These two options select the processor for which the code is optimized. +.Sp +With \fB\-mcypress\fR (the default), the compiler optimizes code for the +Cypress \s-1CY7C602\s0 chip, as used in the SparcStation/SparcServer 3xx series. +This is also appropriate for the older SparcStation 1, 2, \s-1IPX\s0 etc. +.Sp +With \fB\-msupersparc\fR the compiler optimizes code for the SuperSparc cpu, as +used in the SparcStation 10, 1000 and 2000 series. This flag also enables use +of the full \s-1SPARC\s0 v8 instruction set. +.Sp +These options are deprecated and will be deleted in a future \s-1GCC\s0 release. +They have been replaced with \fB\-mcpu=xxx\fR. +.Ip "\fB\-mcpu=\fR\fIcpu_type\fR" 4 +.IX Item "-mcpu=cpu_type" +Set the instruction set, register set, and instruction scheduling parameters +for machine type \fIcpu_type\fR. Supported values for \fIcpu_type\fR are +\&\fBv7\fR, \fBcypress\fR, \fBv8\fR, \fBsupersparc\fR, \fBsparclite\fR, +\&\fBhypersparc\fR, \fBsparclite86x\fR, \fBf930\fR, \fBf934\fR, +\&\fBsparclet\fR, \fBtsc701\fR, \fBv9\fR, and \fBultrasparc\fR. +.Sp +Default instruction scheduling parameters are used for values that select +an architecture and not an implementation. These are \fBv7\fR, \fBv8\fR, +\&\fBsparclite\fR, \fBsparclet\fR, \fBv9\fR. +.Sp +Here is a list of each supported architecture and their supported +implementations. +.Sp +.Vb 5 +\& v7: cypress +\& v8: supersparc, hypersparc +\& sparclite: f930, f934, sparclite86x +\& sparclet: tsc701 +\& v9: ultrasparc +.Ve +.Ip "\fB\-mtune=\fR\fIcpu_type\fR" 4 +.IX Item "-mtune=cpu_type" +Set the instruction scheduling parameters for machine type +\&\fIcpu_type\fR, but do not set the instruction set or register set that the +option \fB\-mcpu=\fR\fIcpu_type\fR would. +.Sp +The same values for \fB\-mcpu=\fR\fIcpu_type\fR can be used for +\&\fB\-mtune=\fR\fIcpu_type\fR, but the only useful values are those +that select a particular cpu implementation. Those are \fBcypress\fR, +\&\fBsupersparc\fR, \fBhypersparc\fR, \fBf930\fR, \fBf934\fR, +\&\fBsparclite86x\fR, \fBtsc701\fR, and \fBultrasparc\fR. +.PP +These \fB\-m\fR switches are supported in addition to the above +on the \s-1SPARCLET\s0 processor. +.Ip "\fB\-mlittle-endian\fR" 4 +.IX Item "-mlittle-endian" +Generate code for a processor running in little-endian mode. +.Ip "\fB\-mlive-g0\fR" 4 +.IX Item "-mlive-g0" +Treat register \f(CW\*(C`%g0\*(C'\fR as a normal register. +\&\s-1GCC\s0 will continue to clobber it as necessary but will not assume +it always reads as 0. +.Ip "\fB\-mbroken-saverestore\fR" 4 +.IX Item "-mbroken-saverestore" +Generate code that does not use non-trivial forms of the \f(CW\*(C`save\*(C'\fR and +\&\f(CW\*(C`restore\*(C'\fR instructions. Early versions of the \s-1SPARCLET\s0 processor do +not correctly handle \f(CW\*(C`save\*(C'\fR and \f(CW\*(C`restore\*(C'\fR instructions used with +arguments. They correctly handle them used without arguments. A \f(CW\*(C`save\*(C'\fR +instruction used without arguments increments the current window pointer +but does not allocate a new stack frame. It is assumed that the window +overflow trap handler will properly handle this case as will interrupt +handlers. +.PP +These \fB\-m\fR switches are supported in addition to the above +on \s-1SPARC\s0 V9 processors in 64\-bit environments. +.Ip "\fB\-mlittle-endian\fR" 4 +.IX Item "-mlittle-endian" +Generate code for a processor running in little-endian mode. +.Ip "\fB\-m32\fR" 4 +.IX Item "-m32" +.PD 0 +.Ip "\fB\-m64\fR" 4 +.IX Item "-m64" +.PD +Generate code for a 32\-bit or 64\-bit environment. +The 32\-bit environment sets int, long and pointer to 32 bits. +The 64\-bit environment sets int to 32 bits and long and pointer +to 64 bits. +.Ip "\fB\-mcmodel=medlow\fR" 4 +.IX Item "-mcmodel=medlow" +Generate code for the Medium/Low code model: the program must be linked +in the low 32 bits of the address space. Pointers are 64 bits. +Programs can be statically or dynamically linked. +.Ip "\fB\-mcmodel=medmid\fR" 4 +.IX Item "-mcmodel=medmid" +Generate code for the Medium/Middle code model: the program must be linked +in the low 44 bits of the address space, the text segment must be less than +2G bytes, and data segment must be within 2G of the text segment. +Pointers are 64 bits. +.Ip "\fB\-mcmodel=medany\fR" 4 +.IX Item "-mcmodel=medany" +Generate code for the Medium/Anywhere code model: the program may be linked +anywhere in the address space, the text segment must be less than +2G bytes, and data segment must be within 2G of the text segment. +Pointers are 64 bits. +.Ip "\fB\-mcmodel=embmedany\fR" 4 +.IX Item "-mcmodel=embmedany" +Generate code for the Medium/Anywhere code model for embedded systems: +assume a 32\-bit text and a 32\-bit data segment, both starting anywhere +(determined at link time). Register \f(CW%g4\fR points to the base of the +data segment. Pointers are still 64 bits. +Programs are statically linked, \s-1PIC\s0 is not supported. +.Ip "\fB\-mstack-bias\fR" 4 +.IX Item "-mstack-bias" +.PD 0 +.Ip "\fB\-mno-stack-bias\fR" 4 +.IX Item "-mno-stack-bias" +.PD +With \fB\-mstack-bias\fR, \s-1GCC\s0 assumes that the stack pointer, and +frame pointer if present, are offset by \-2047 which must be added back +when making stack frame references. +Otherwise, assume no such offset is present. +.PP +.I "Convex Options" +.IX Subsection "Convex Options" +.PP +These \fB\-m\fR options are defined for Convex: +.Ip "\fB\-mc1\fR" 4 +.IX Item "-mc1" +Generate output for C1. The code will run on any Convex machine. +The preprocessor symbol \f(CW\*(C`_\|_convex_\|_c1_\|_\*(C'\fR is defined. +.Ip "\fB\-mc2\fR" 4 +.IX Item "-mc2" +Generate output for C2. Uses instructions not available on C1. +Scheduling and other optimizations are chosen for max performance on C2. +The preprocessor symbol \f(CW\*(C`_\|_convex_c2_\|_\*(C'\fR is defined. +.Ip "\fB\-mc32\fR" 4 +.IX Item "-mc32" +Generate output for C32xx. Uses instructions not available on C1. +Scheduling and other optimizations are chosen for max performance on C32. +The preprocessor symbol \f(CW\*(C`_\|_convex_c32_\|_\*(C'\fR is defined. +.Ip "\fB\-mc34\fR" 4 +.IX Item "-mc34" +Generate output for C34xx. Uses instructions not available on C1. +Scheduling and other optimizations are chosen for max performance on C34. +The preprocessor symbol \f(CW\*(C`_\|_convex_c34_\|_\*(C'\fR is defined. +.Ip "\fB\-mc38\fR" 4 +.IX Item "-mc38" +Generate output for C38xx. Uses instructions not available on C1. +Scheduling and other optimizations are chosen for max performance on C38. +The preprocessor symbol \f(CW\*(C`_\|_convex_c38_\|_\*(C'\fR is defined. +.Ip "\fB\-margcount\fR" 4 +.IX Item "-margcount" +Generate code which puts an argument count in the word preceding each +argument list. This is compatible with regular \s-1CC\s0, and a few programs +may need the argument count word. \s-1GDB\s0 and other source-level debuggers +do not need it; this info is in the symbol table. +.Ip "\fB\-mnoargcount\fR" 4 +.IX Item "-mnoargcount" +Omit the argument count word. This is the default. +.Ip "\fB\-mvolatile-cache\fR" 4 +.IX Item "-mvolatile-cache" +Allow volatile references to be cached. This is the default. +.Ip "\fB\-mvolatile-nocache\fR" 4 +.IX Item "-mvolatile-nocache" +Volatile references bypass the data cache, going all the way to memory. +This is only needed for multi-processor code that does not use standard +synchronization instructions. Making non-volatile references to volatile +locations will not necessarily work. +.Ip "\fB\-mlong32\fR" 4 +.IX Item "-mlong32" +Type long is 32 bits, the same as type int. This is the default. +.Ip "\fB\-mlong64\fR" 4 +.IX Item "-mlong64" +Type long is 64 bits, the same as type long long. This option is useless, +because no library support exists for it. +.PP +.I "\s-1AMD29K\s0 Options" +.IX Subsection "AMD29K Options" +.PP +These \fB\-m\fR options are defined for the \s-1AMD\s0 Am29000: +.Ip "\fB\-mdw\fR" 4 +.IX Item "-mdw" +Generate code that assumes the \f(CW\*(C`DW\*(C'\fR bit is set, i.e., that byte and +halfword operations are directly supported by the hardware. This is the +default. +.Ip "\fB\-mndw\fR" 4 +.IX Item "-mndw" +Generate code that assumes the \f(CW\*(C`DW\*(C'\fR bit is not set. +.Ip "\fB\-mbw\fR" 4 +.IX Item "-mbw" +Generate code that assumes the system supports byte and halfword write +operations. This is the default. +.Ip "\fB\-mnbw\fR" 4 +.IX Item "-mnbw" +Generate code that assumes the systems does not support byte and +halfword write operations. \fB\-mnbw\fR implies \fB\-mndw\fR. +.Ip "\fB\-msmall\fR" 4 +.IX Item "-msmall" +Use a small memory model that assumes that all function addresses are +either within a single 256 \s-1KB\s0 segment or at an absolute address of less +than 256k. This allows the \f(CW\*(C`call\*(C'\fR instruction to be used instead +of a \f(CW\*(C`const\*(C'\fR, \f(CW\*(C`consth\*(C'\fR, \f(CW\*(C`calli\*(C'\fR sequence. +.Ip "\fB\-mnormal\fR" 4 +.IX Item "-mnormal" +Use the normal memory model: Generate \f(CW\*(C`call\*(C'\fR instructions only when +calling functions in the same file and \f(CW\*(C`calli\*(C'\fR instructions +otherwise. This works if each file occupies less than 256 \s-1KB\s0 but allows +the entire executable to be larger than 256 \s-1KB\s0. This is the default. +.Ip "\fB\-mlarge\fR" 4 +.IX Item "-mlarge" +Always use \f(CW\*(C`calli\*(C'\fR instructions. Specify this option if you expect +a single file to compile into more than 256 \s-1KB\s0 of code. +.Ip "\fB\-m29050\fR" 4 +.IX Item "-m29050" +Generate code for the Am29050. +.Ip "\fB\-m29000\fR" 4 +.IX Item "-m29000" +Generate code for the Am29000. This is the default. +.Ip "\fB\-mkernel-registers\fR" 4 +.IX Item "-mkernel-registers" +Generate references to registers \f(CW\*(C`gr64\-gr95\*(C'\fR instead of to +registers \f(CW\*(C`gr96\-gr127\*(C'\fR. This option can be used when compiling +kernel code that wants a set of global registers disjoint from that used +by user-mode code. +.Sp +Note that when this option is used, register names in \fB\-f\fR flags +must use the normal, user-mode, names. +.Ip "\fB\-muser-registers\fR" 4 +.IX Item "-muser-registers" +Use the normal set of global registers, \f(CW\*(C`gr96\-gr127\*(C'\fR. This is the +default. +.Ip "\fB\-mstack-check\fR" 4 +.IX Item "-mstack-check" +.PD 0 +.Ip "\fB\-mno-stack-check\fR" 4 +.IX Item "-mno-stack-check" +.PD +Insert (or do not insert) a call to \f(CW\*(C`_\|_msp_check\*(C'\fR after each stack +adjustment. This is often used for kernel code. +.Ip "\fB\-mstorem-bug\fR" 4 +.IX Item "-mstorem-bug" +.PD 0 +.Ip "\fB\-mno-storem-bug\fR" 4 +.IX Item "-mno-storem-bug" +.PD +\&\fB\-mstorem-bug\fR handles 29k processors which cannot handle the +separation of a mtsrim insn and a storem instruction (most 29000 chips +to date, but not the 29050). +.Ip "\fB\-mno-reuse-arg-regs\fR" 4 +.IX Item "-mno-reuse-arg-regs" +.PD 0 +.Ip "\fB\-mreuse-arg-regs\fR" 4 +.IX Item "-mreuse-arg-regs" +.PD +\&\fB\-mno-reuse-arg-regs\fR tells the compiler to only use incoming argument +registers for copying out arguments. This helps detect calling a function +with fewer arguments than it was declared with. +.Ip "\fB\-mno-impure-text\fR" 4 +.IX Item "-mno-impure-text" +.PD 0 +.Ip "\fB\-mimpure-text\fR" 4 +.IX Item "-mimpure-text" +.PD +\&\fB\-mimpure-text\fR, used in addition to \fB\-shared\fR, tells the compiler to +not pass \fB\-assert pure-text\fR to the linker when linking a shared object. +.Ip "\fB\-msoft-float\fR" 4 +.IX Item "-msoft-float" +Generate output containing library calls for floating point. +\&\fBWarning:\fR the requisite libraries are not part of \s-1GCC\s0. +Normally the facilities of the machine's usual C compiler are used, but +this can't be done directly in cross-compilation. You must make your +own arrangements to provide suitable library functions for +cross-compilation. +.Ip "\fB\-mno-multm\fR" 4 +.IX Item "-mno-multm" +Do not generate multm or multmu instructions. This is useful for some embedded +systems which do not have trap handlers for these instructions. +.PP +.I "\s-1ARM\s0 Options" +.IX Subsection "ARM Options" +.PP +These \fB\-m\fR options are defined for Advanced \s-1RISC\s0 Machines (\s-1ARM\s0) +architectures: +.Ip "\fB\-mapcs-frame\fR" 4 +.IX Item "-mapcs-frame" +Generate a stack frame that is compliant with the \s-1ARM\s0 Procedure Call +Standard for all functions, even if this is not strictly necessary for +correct execution of the code. Specifying \fB\-fomit-frame-pointer\fR +with this option will cause the stack frames not to be generated for +leaf functions. The default is \fB\-mno-apcs-frame\fR. +.Ip "\fB\-mapcs\fR" 4 +.IX Item "-mapcs" +This is a synonym for \fB\-mapcs-frame\fR. +.Ip "\fB\-mapcs-26\fR" 4 +.IX Item "-mapcs-26" +Generate code for a processor running with a 26\-bit program counter, +and conforming to the function calling standards for the \s-1APCS\s0 26\-bit +option. This option replaces the \fB\-m2\fR and \fB\-m3\fR options +of previous releases of the compiler. +.Ip "\fB\-mapcs-32\fR" 4 +.IX Item "-mapcs-32" +Generate code for a processor running with a 32\-bit program counter, +and conforming to the function calling standards for the \s-1APCS\s0 32\-bit +option. This option replaces the \fB\-m6\fR option of previous releases +of the compiler. +.Ip "\fB\-mthumb-interwork\fR" 4 +.IX Item "-mthumb-interwork" +Generate code which supports calling between the \s-1ARM\s0 and Thumb +instruction sets. Without this option the two instruction sets cannot +be reliably used inside one program. The default is +\&\fB\-mno-thumb-interwork\fR, since slightly larger code is generated +when \fB\-mthumb-interwork\fR is specified. +.Ip "\fB\-mno-sched-prolog\fR" 4 +.IX Item "-mno-sched-prolog" +Prevent the reordering of instructions in the function prolog, or the +merging of those instruction with the instructions in the function's +body. This means that all functions will start with a recognizable set +of instructions (or in fact one of a choice from a small set of +different function prologues), and this information can be used to +locate the start if functions inside an executable piece of code. The +default is \fB\-msched-prolog\fR. +.Ip "\fB\-mhard-float\fR" 4 +.IX Item "-mhard-float" +Generate output containing floating point instructions. This is the +default. +.Ip "\fB\-msoft-float\fR" 4 +.IX Item "-msoft-float" +Generate output containing library calls for floating point. +\&\fBWarning:\fR the requisite libraries are not available for all \s-1ARM\s0 +targets. Normally the facilities of the machine's usual C compiler are +used, but this cannot be done directly in cross-compilation. You must make +your own arrangements to provide suitable library functions for +cross-compilation. +.Sp +\&\fB\-msoft-float\fR changes the calling convention in the output file; +therefore, it is only useful if you compile \fIall\fR of a program with +this option. In particular, you need to compile \fIlibgcc.a\fR, the +library that comes with \s-1GCC\s0, with \fB\-msoft-float\fR in order for +this to work. +.Ip "\fB\-mlittle-endian\fR" 4 +.IX Item "-mlittle-endian" +Generate code for a processor running in little-endian mode. This is +the default for all standard configurations. +.Ip "\fB\-mbig-endian\fR" 4 +.IX Item "-mbig-endian" +Generate code for a processor running in big-endian mode; the default is +to compile code for a little-endian processor. +.Ip "\fB\-mwords-little-endian\fR" 4 +.IX Item "-mwords-little-endian" +This option only applies when generating code for big-endian processors. +Generate code for a little-endian word order but a big-endian byte +order. That is, a byte order of the form \fB32107654\fR. Note: this +option should only be used if you require compatibility with code for +big-endian \s-1ARM\s0 processors generated by versions of the compiler prior to +2.8. +.Ip "\fB\-malignment-traps\fR" 4 +.IX Item "-malignment-traps" +Generate code that will not trap if the \s-1MMU\s0 has alignment traps enabled. +On \s-1ARM\s0 architectures prior to ARMv4, there were no instructions to +access half-word objects stored in memory. However, when reading from +memory a feature of the \s-1ARM\s0 architecture allows a word load to be used, +even if the address is unaligned, and the processor core will rotate the +data as it is being loaded. This option tells the compiler that such +misaligned accesses will cause a \s-1MMU\s0 trap and that it should instead +synthesise the access as a series of byte accesses. The compiler can +still use word accesses to load half-word data if it knows that the +address is aligned to a word boundary. +.Sp +This option is ignored when compiling for \s-1ARM\s0 architecture 4 or later, +since these processors have instructions to directly access half-word +objects in memory. +.Ip "\fB\-mno-alignment-traps\fR" 4 +.IX Item "-mno-alignment-traps" +Generate code that assumes that the \s-1MMU\s0 will not trap unaligned +accesses. This produces better code when the target instruction set +does not have half-word memory operations (i.e. implementations prior to +ARMv4). +.Sp +Note that you cannot use this option to access unaligned word objects, +since the processor will only fetch one 32\-bit aligned object from +memory. +.Sp +The default setting for most targets is \fB\-mno-alignment-traps\fR, since +this produces better code when there are no half-word memory +instructions available. +.Ip "\fB\-mshort-load-bytes\fR" 4 +.IX Item "-mshort-load-bytes" +.PD 0 +.Ip "\fB\-mno-short-load-words\fR" 4 +.IX Item "-mno-short-load-words" +.PD +These are deprecated aliases for \fB\-malignment-traps\fR. +.Ip "\fB\-mno-short-load-bytes\fR" 4 +.IX Item "-mno-short-load-bytes" +.PD 0 +.Ip "\fB\-mshort-load-words\fR" 4 +.IX Item "-mshort-load-words" +.PD +This are deprecated aliases for \fB\-mno-alignment-traps\fR. +.Ip "\fB\-mbsd\fR" 4 +.IX Item "-mbsd" +This option only applies to \s-1RISC\s0 iX. Emulate the native BSD-mode +compiler. This is the default if \fB\-ansi\fR is not specified. +.Ip "\fB\-mxopen\fR" 4 +.IX Item "-mxopen" +This option only applies to \s-1RISC\s0 iX. Emulate the native X/Open-mode +compiler. +.Ip "\fB\-mno-symrename\fR" 4 +.IX Item "-mno-symrename" +This option only applies to \s-1RISC\s0 iX. Do not run the assembler +post-processor, \fBsymrename\fR, after code has been assembled. +Normally it is necessary to modify some of the standard symbols in +preparation for linking with the \s-1RISC\s0 iX C library; this option +suppresses this pass. The post-processor is never run when the +compiler is built for cross-compilation. +.Ip "\fB\-mcpu=\fR\fIname\fR" 4 +.IX Item "-mcpu=name" +This specifies the name of the target \s-1ARM\s0 processor. \s-1GCC\s0 uses this name +to determine what kind of instructions it can emit when generating +assembly code. Permissible names are: \fBarm2\fR, \fBarm250\fR, +\&\fBarm3\fR, \fBarm6\fR, \fBarm60\fR, \fBarm600\fR, \fBarm610\fR, +\&\fBarm620\fR, \fBarm7\fR, \fBarm7m\fR, \fBarm7d\fR, \fBarm7dm\fR, +\&\fBarm7di\fR, \fBarm7dmi\fR, \fBarm70\fR, \fBarm700\fR, +\&\fBarm700i\fR, \fBarm710\fR, \fBarm710c\fR, \fBarm7100\fR, +\&\fBarm7500\fR, \fBarm7500fe\fR, \fBarm7tdmi\fR, \fBarm8\fR, +\&\fBstrongarm\fR, \fBstrongarm110\fR, \fBstrongarm1100\fR, +\&\fBarm8\fR, \fBarm810\fR, \fBarm9\fR, \fBarm9e\fR, \fBarm920\fR, +\&\fBarm920t\fR, \fBarm940t\fR, \fBarm9tdmi\fR, \fBarm10tdmi\fR, +\&\fBarm1020t\fR, \fBxscale\fR. +.Ip "\fB\-mtune=\fR\fIname\fR" 4 +.IX Item "-mtune=name" +This option is very similar to the \fB\-mcpu=\fR option, except that +instead of specifying the actual target processor type, and hence +restricting which instructions can be used, it specifies that \s-1GCC\s0 should +tune the performance of the code as if the target were of the type +specified in this option, but still choosing the instructions that it +will generate based on the cpu specified by a \fB\-mcpu=\fR option. +For some \s-1ARM\s0 implementations better performance can be obtained by using +this option. +.Ip "\fB\-march=\fR\fIname\fR" 4 +.IX Item "-march=name" +This specifies the name of the target \s-1ARM\s0 architecture. \s-1GCC\s0 uses this +name to determine what kind of instructions it can emit when generating +assembly code. This option can be used in conjunction with or instead +of the \fB\-mcpu=\fR option. Permissible names are: \fBarmv2\fR, +\&\fBarmv2a\fR, \fBarmv3\fR, \fBarmv3m\fR, \fBarmv4\fR, \fBarmv4t\fR, +\&\fBarmv5\fR, \fBarmv5t\fR, \fBarmv5te\fR. +.Ip "\fB\-mfpe=\fR\fInumber\fR" 4 +.IX Item "-mfpe=number" +.PD 0 +.Ip "\fB\-mfp=\fR\fInumber\fR" 4 +.IX Item "-mfp=number" +.PD +This specifies the version of the floating point emulation available on +the target. Permissible values are 2 and 3. \fB\-mfp=\fR is a synonym +for \fB\-mfpe=\fR, for compatibility with older versions of \s-1GCC\s0. +.Ip "\fB\-mstructure-size-boundary=\fR\fIn\fR" 4 +.IX Item "-mstructure-size-boundary=n" +The size of all structures and unions will be rounded up to a multiple +of the number of bits set by this option. Permissible values are 8 and +32. The default value varies for different toolchains. For the \s-1COFF\s0 +targeted toolchain the default value is 8. Specifying the larger number +can produce faster, more efficient code, but can also increase the size +of the program. The two values are potentially incompatible. Code +compiled with one value cannot necessarily expect to work with code or +libraries compiled with the other value, if they exchange information +using structures or unions. +.Ip "\fB\-mabort-on-noreturn\fR" 4 +.IX Item "-mabort-on-noreturn" +Generate a call to the function \f(CW\*(C`abort\*(C'\fR at the end of a +\&\f(CW\*(C`noreturn\*(C'\fR function. It will be executed if the function tries to +return. +.Ip "\fB\-mlong-calls\fR" 4 +.IX Item "-mlong-calls" +.PD 0 +.Ip "\fB\-mno-long-calls\fR" 4 +.IX Item "-mno-long-calls" +.PD +Tells the compiler to perform function calls by first loading the +address of the function into a register and then performing a subroutine +call on this register. This switch is needed if the target function +will lie outside of the 64 megabyte addressing range of the offset based +version of subroutine call instruction. +.Sp +Even if this switch is enabled, not all function calls will be turned +into long calls. The heuristic is that static functions, functions +which have the \fBshort-call\fR attribute, functions that are inside +the scope of a \fB#pragma no_long_calls\fR directive and functions whose +definitions have already been compiled within the current compilation +unit, will not be turned into long calls. The exception to this rule is +that weak function definitions, functions with the \fBlong-call\fR +attribute or the \fBsection\fR attribute, and functions that are within +the scope of a \fB#pragma long_calls\fR directive, will always be +turned into long calls. +.Sp +This feature is not enabled by default. Specifying +\&\fB\-mno-long-calls\fR will restore the default behavior, as will +placing the function calls within the scope of a \fB#pragma +long_calls_off\fR directive. Note these switches have no effect on how +the compiler generates code to handle function calls via function +pointers. +.Ip "\fB\-mnop-fun-dllimport\fR" 4 +.IX Item "-mnop-fun-dllimport" +Disable support for the \f(CW\*(C`dllimport\*(C'\fR attribute. +.Ip "\fB\-msingle-pic-base\fR" 4 +.IX Item "-msingle-pic-base" +Treat the register used for \s-1PIC\s0 addressing as read-only, rather than +loading it in the prologue for each function. The run-time system is +responsible for initializing this register with an appropriate value +before execution begins. +.Ip "\fB\-mpic-register=\fR\fIreg\fR" 4 +.IX Item "-mpic-register=reg" +Specify the register to be used for \s-1PIC\s0 addressing. The default is R10 +unless stack-checking is enabled, when R9 is used. +.Ip "\fB\-mpoke-function-name\fR" 4 +.IX Item "-mpoke-function-name" +Write the name of each function into the text section, directly +preceding the function prologue. The generated code is similar to this: +.Sp +.Vb 9 +\& t0 +\& .ascii "arm_poke_function_name", 0 +\& .align +\& t1 +\& .word 0xff000000 + (t1 - t0) +\& arm_poke_function_name +\& mov ip, sp +\& stmfd sp!, {fp, ip, lr, pc} +\& sub fp, ip, #4 +.Ve +When performing a stack backtrace, code can inspect the value of +\&\f(CW\*(C`pc\*(C'\fR stored at \f(CW\*(C`fp + 0\*(C'\fR. If the trace function then looks at +location \f(CW\*(C`pc \- 12\*(C'\fR and the top 8 bits are set, then we know that +there is a function name embedded immediately preceding this location +and has length \f(CW\*(C`((pc[\-3]) & 0xff000000)\*(C'\fR. +.Ip "\fB\-mthumb\fR" 4 +.IX Item "-mthumb" +Generate code for the 16\-bit Thumb instruction set. The default is to +use the 32\-bit \s-1ARM\s0 instruction set. +.Ip "\fB\-mtpcs-frame\fR" 4 +.IX Item "-mtpcs-frame" +Generate a stack frame that is compliant with the Thumb Procedure Call +Standard for all non-leaf functions. (A leaf function is one that does +not call any other functions.) The default is \fB\-mno-tpcs-frame\fR. +.Ip "\fB\-mtpcs-leaf-frame\fR" 4 +.IX Item "-mtpcs-leaf-frame" +Generate a stack frame that is compliant with the Thumb Procedure Call +Standard for all leaf functions. (A leaf function is one that does +not call any other functions.) The default is \fB\-mno-apcs-leaf-frame\fR. +.Ip "\fB\-mcallee-super-interworking\fR" 4 +.IX Item "-mcallee-super-interworking" +Gives all externally visible functions in the file being compiled an \s-1ARM\s0 +instruction set header which switches to Thumb mode before executing the +rest of the function. This allows these functions to be called from +non-interworking code. +.Ip "\fB\-mcaller-super-interworking\fR" 4 +.IX Item "-mcaller-super-interworking" +Allows calls via function pointers (including virtual functions) to +execute correctly regardless of whether the target code has been +compiled for interworking or not. There is a small overhead in the cost +of executing a function pointer if this option is enabled. +.PP +.I "\s-1MN10200\s0 Options" +.IX Subsection "MN10200 Options" +.PP +These \fB\-m\fR options are defined for Matsushita \s-1MN10200\s0 architectures: +.Ip "\fB\-mrelax\fR" 4 +.IX Item "-mrelax" +Indicate to the linker that it should perform a relaxation optimization pass +to shorten branches, calls and absolute memory addresses. This option only +has an effect when used on the command line for the final link step. +.Sp +This option makes symbolic debugging impossible. +.PP +.I "\s-1MN10300\s0 Options" +.IX Subsection "MN10300 Options" +.PP +These \fB\-m\fR options are defined for Matsushita \s-1MN10300\s0 architectures: +.Ip "\fB\-mmult-bug\fR" 4 +.IX Item "-mmult-bug" +Generate code to avoid bugs in the multiply instructions for the \s-1MN10300\s0 +processors. This is the default. +.Ip "\fB\-mno-mult-bug\fR" 4 +.IX Item "-mno-mult-bug" +Do not generate code to avoid bugs in the multiply instructions for the +\&\s-1MN10300\s0 processors. +.Ip "\fB\-mam33\fR" 4 +.IX Item "-mam33" +Generate code which uses features specific to the \s-1AM33\s0 processor. +.Ip "\fB\-mno-am33\fR" 4 +.IX Item "-mno-am33" +Do not generate code which uses features specific to the \s-1AM33\s0 processor. This +is the default. +.Ip "\fB\-mno-crt0\fR" 4 +.IX Item "-mno-crt0" +Do not link in the C run-time initialization object file. +.Ip "\fB\-mrelax\fR" 4 +.IX Item "-mrelax" +Indicate to the linker that it should perform a relaxation optimization pass +to shorten branches, calls and absolute memory addresses. This option only +has an effect when used on the command line for the final link step. +.Sp +This option makes symbolic debugging impossible. +.PP +.I "M32R/D Options" +.IX Subsection "M32R/D Options" +.PP +These \fB\-m\fR options are defined for Mitsubishi M32R/D architectures: +.Ip "\fB\-m32rx\fR" 4 +.IX Item "-m32rx" +Generate code for the M32R/X. +.Ip "\fB\-m32r\fR" 4 +.IX Item "-m32r" +Generate code for the M32R. This is the default. +.Ip "\fB\-mcode-model=small\fR" 4 +.IX Item "-mcode-model=small" +Assume all objects live in the lower 16MB of memory (so that their addresses +can be loaded with the \f(CW\*(C`ld24\*(C'\fR instruction), and assume all subroutines +are reachable with the \f(CW\*(C`bl\*(C'\fR instruction. +This is the default. +.Sp +The addressability of a particular object can be set with the +\&\f(CW\*(C`model\*(C'\fR attribute. +.Ip "\fB\-mcode-model=medium\fR" 4 +.IX Item "-mcode-model=medium" +Assume objects may be anywhere in the 32\-bit address space (the compiler +will generate \f(CW\*(C`seth/add3\*(C'\fR instructions to load their addresses), and +assume all subroutines are reachable with the \f(CW\*(C`bl\*(C'\fR instruction. +.Ip "\fB\-mcode-model=large\fR" 4 +.IX Item "-mcode-model=large" +Assume objects may be anywhere in the 32\-bit address space (the compiler +will generate \f(CW\*(C`seth/add3\*(C'\fR instructions to load their addresses), and +assume subroutines may not be reachable with the \f(CW\*(C`bl\*(C'\fR instruction +(the compiler will generate the much slower \f(CW\*(C`seth/add3/jl\*(C'\fR +instruction sequence). +.Ip "\fB\-msdata=none\fR" 4 +.IX Item "-msdata=none" +Disable use of the small data area. Variables will be put into +one of \fB.data\fR, \fBbss\fR, or \fB.rodata\fR (unless the +\&\f(CW\*(C`section\*(C'\fR attribute has been specified). +This is the default. +.Sp +The small data area consists of sections \fB.sdata\fR and \fB.sbss\fR. +Objects may be explicitly put in the small data area with the +\&\f(CW\*(C`section\*(C'\fR attribute using one of these sections. +.Ip "\fB\-msdata=sdata\fR" 4 +.IX Item "-msdata=sdata" +Put small global and static data in the small data area, but do not +generate special code to reference them. +.Ip "\fB\-msdata=use\fR" 4 +.IX Item "-msdata=use" +Put small global and static data in the small data area, and generate +special instructions to reference them. +.Ip "\fB\-G\fR \fInum\fR" 4 +.IX Item "-G num" +Put global and static objects less than or equal to \fInum\fR bytes +into the small data or bss sections instead of the normal data or bss +sections. The default value of \fInum\fR is 8. +The \fB\-msdata\fR option must be set to one of \fBsdata\fR or \fBuse\fR +for this option to have any effect. +.Sp +All modules should be compiled with the same \fB\-G\fR \fInum\fR value. +Compiling with different values of \fInum\fR may or may not work; if it +doesn't the linker will give an error message\-\-\-incorrect code will not be +generated. +.PP +.I "M88K Options" +.IX Subsection "M88K Options" +.PP +These \fB\-m\fR options are defined for Motorola 88k architectures: +.Ip "\fB\-m88000\fR" 4 +.IX Item "-m88000" +Generate code that works well on both the m88100 and the +m88110. +.Ip "\fB\-m88100\fR" 4 +.IX Item "-m88100" +Generate code that works best for the m88100, but that also +runs on the m88110. +.Ip "\fB\-m88110\fR" 4 +.IX Item "-m88110" +Generate code that works best for the m88110, and may not run +on the m88100. +.Ip "\fB\-mbig-pic\fR" 4 +.IX Item "-mbig-pic" +Obsolete option to be removed from the next revision. +Use \fB\-fPIC\fR. +.Ip "\fB\-midentify-revision\fR" 4 +.IX Item "-midentify-revision" +Include an \f(CW\*(C`ident\*(C'\fR directive in the assembler output recording the +source file name, compiler name and version, timestamp, and compilation +flags used. +.Ip "\fB\-mno-underscores\fR" 4 +.IX Item "-mno-underscores" +In assembler output, emit symbol names without adding an underscore +character at the beginning of each name. The default is to use an +underscore as prefix on each name. +.Ip "\fB\-mocs-debug-info\fR" 4 +.IX Item "-mocs-debug-info" +.PD 0 +.Ip "\fB\-mno-ocs-debug-info\fR" 4 +.IX Item "-mno-ocs-debug-info" +.PD +Include (or omit) additional debugging information (about registers used +in each stack frame) as specified in the 88open Object Compatibility +Standard, ``\s-1OCS\s0''. This extra information allows debugging of code that +has had the frame pointer eliminated. The default for \s-1DG/UX\s0, SVr4, and +Delta 88 SVr3.2 is to include this information; other 88k configurations +omit this information by default. +.Ip "\fB\-mocs-frame-position\fR" 4 +.IX Item "-mocs-frame-position" +When emitting \s-1COFF\s0 debugging information for automatic variables and +parameters stored on the stack, use the offset from the canonical frame +address, which is the stack pointer (register 31) on entry to the +function. The \s-1DG/UX\s0, SVr4, Delta88 SVr3.2, and \s-1BCS\s0 configurations use +\&\fB\-mocs-frame-position\fR; other 88k configurations have the default +\&\fB\-mno-ocs-frame-position\fR. +.Ip "\fB\-mno-ocs-frame-position\fR" 4 +.IX Item "-mno-ocs-frame-position" +When emitting \s-1COFF\s0 debugging information for automatic variables and +parameters stored on the stack, use the offset from the frame pointer +register (register 30). When this option is in effect, the frame +pointer is not eliminated when debugging information is selected by the +\&\-g switch. +.Ip "\fB\-moptimize-arg-area\fR" 4 +.IX Item "-moptimize-arg-area" +Save space by reorganizing the stack frame. This option generates code +that does not agree with the 88open specifications, but uses less +memory. +.Ip "\fB\-mno-optimize-arg-area\fR" 4 +.IX Item "-mno-optimize-arg-area" +Do not reorganize the stack frame to save space. This is the default. +The generated conforms to the specification, but uses more memory. +.Ip "\fB\-mshort-data-\fR\fInum\fR" 4 +.IX Item "-mshort-data-num" +Generate smaller data references by making them relative to \f(CW\*(C`r0\*(C'\fR, +which allows loading a value using a single instruction (rather than the +usual two). You control which data references are affected by +specifying \fInum\fR with this option. For example, if you specify +\&\fB\-mshort-data-512\fR, then the data references affected are those +involving displacements of less than 512 bytes. +\&\fB\-mshort-data-\fR\fInum\fR is not effective for \fInum\fR greater +than 64k. +.Ip "\fB\-mserialize-volatile\fR" 4 +.IX Item "-mserialize-volatile" +.PD 0 +.Ip "\fB\-mno-serialize-volatile\fR" 4 +.IX Item "-mno-serialize-volatile" +.PD +Do, or don't, generate code to guarantee sequential consistency +of volatile memory references. By default, consistency is +guaranteed. +.Sp +The order of memory references made by the \s-1MC88110\s0 processor does +not always match the order of the instructions requesting those +references. In particular, a load instruction may execute before +a preceding store instruction. Such reordering violates +sequential consistency of volatile memory references, when there +are multiple processors. When consistency must be guaranteed, +\&\s-1GCC\s0 generates special instructions, as needed, to force +execution in the proper order. +.Sp +The \s-1MC88100\s0 processor does not reorder memory references and so +always provides sequential consistency. However, by default, \s-1GCC\s0 +generates the special instructions to guarantee consistency +even when you use \fB\-m88100\fR, so that the code may be run on an +\&\s-1MC88110\s0 processor. If you intend to run your code only on the +\&\s-1MC88100\s0 processor, you may use \fB\-mno-serialize-volatile\fR. +.Sp +The extra code generated to guarantee consistency may affect the +performance of your application. If you know that you can safely +forgo this guarantee, you may use \fB\-mno-serialize-volatile\fR. +.Ip "\fB\-msvr4\fR" 4 +.IX Item "-msvr4" +.PD 0 +.Ip "\fB\-msvr3\fR" 4 +.IX Item "-msvr3" +.PD +Turn on (\fB\-msvr4\fR) or off (\fB\-msvr3\fR) compiler extensions +related to System V release 4 (SVr4). This controls the following: +.RS 4 +.Ip "1." 4 +Which variant of the assembler syntax to emit. +.Ip "2." 4 +\&\fB\-msvr4\fR makes the C preprocessor recognize \fB#pragma weak\fR +that is used on System V release 4. +.Ip "3." 4 +\&\fB\-msvr4\fR makes \s-1GCC\s0 issue additional declaration directives used in +SVr4. +.RE +.RS 4 +.Sp +\&\fB\-msvr4\fR is the default for the m88k-motorola-sysv4 and +m88k-dg-dgux m88k configurations. \fB\-msvr3\fR is the default for all +other m88k configurations. +.RE +.Ip "\fB\-mversion-03.00\fR" 4 +.IX Item "-mversion-03.00" +This option is obsolete, and is ignored. +.Ip "\fB\-mno-check-zero-division\fR" 4 +.IX Item "-mno-check-zero-division" +.PD 0 +.Ip "\fB\-mcheck-zero-division\fR" 4 +.IX Item "-mcheck-zero-division" +.PD +Do, or don't, generate code to guarantee that integer division by +zero will be detected. By default, detection is guaranteed. +.Sp +Some models of the \s-1MC88100\s0 processor fail to trap upon integer +division by zero under certain conditions. By default, when +compiling code that might be run on such a processor, \s-1GCC\s0 +generates code that explicitly checks for zero-valued divisors +and traps with exception number 503 when one is detected. Use of +\&\fB\-mno-check-zero-division\fR suppresses such checking for code +generated to run on an \s-1MC88100\s0 processor. +.Sp +\&\s-1GCC\s0 assumes that the \s-1MC88110\s0 processor correctly detects all instances +of integer division by zero. When \fB\-m88110\fR is specified, no +explicit checks for zero-valued divisors are generated, and both +\&\fB\-mcheck-zero-division\fR and \fB\-mno-check-zero-division\fR are +ignored. +.Ip "\fB\-muse-div-instruction\fR" 4 +.IX Item "-muse-div-instruction" +Use the div instruction for signed integer division on the +\&\s-1MC88100\s0 processor. By default, the div instruction is not used. +.Sp +On the \s-1MC88100\s0 processor the signed integer division instruction +div) traps to the operating system on a negative operand. The +operating system transparently completes the operation, but at a +large cost in execution time. By default, when compiling code +that might be run on an \s-1MC88100\s0 processor, \s-1GCC\s0 emulates signed +integer division using the unsigned integer division instruction +divu), thereby avoiding the large penalty of a trap to the +operating system. Such emulation has its own, smaller, execution +cost in both time and space. To the extent that your code's +important signed integer division operations are performed on two +nonnegative operands, it may be desirable to use the div +instruction directly. +.Sp +On the \s-1MC88110\s0 processor the div instruction (also known as the +divs instruction) processes negative operands without trapping to +the operating system. When \fB\-m88110\fR is specified, +\&\fB\-muse-div-instruction\fR is ignored, and the div instruction is used +for signed integer division. +.Sp +Note that the result of dividing \f(CW\*(C`INT_MIN\*(C'\fR by \-1 is undefined. In +particular, the behavior of such a division with and without +\&\fB\-muse-div-instruction\fR may differ. +.Ip "\fB\-mtrap-large-shift\fR" 4 +.IX Item "-mtrap-large-shift" +.PD 0 +.Ip "\fB\-mhandle-large-shift\fR" 4 +.IX Item "-mhandle-large-shift" +.PD +Include code to detect bit-shifts of more than 31 bits; respectively, +trap such shifts or emit code to handle them properly. By default \s-1GCC\s0 +makes no special provision for large bit shifts. +.Ip "\fB\-mwarn-passed-structs\fR" 4 +.IX Item "-mwarn-passed-structs" +Warn when a function passes a struct as an argument or result. +Structure-passing conventions have changed during the evolution of the C +language, and are often the source of portability problems. By default, +\&\s-1GCC\s0 issues no such warning. +.PP +.I "\s-1IBM\s0 \s-1RS/6000\s0 and PowerPC Options" +.IX Subsection "IBM RS/6000 and PowerPC Options" +.PP +These \fB\-m\fR options are defined for the \s-1IBM\s0 \s-1RS/6000\s0 and PowerPC: +.Ip "\fB\-mpower\fR" 4 +.IX Item "-mpower" +.PD 0 +.Ip "\fB\-mno-power\fR" 4 +.IX Item "-mno-power" +.Ip "\fB\-mpower2\fR" 4 +.IX Item "-mpower2" +.Ip "\fB\-mno-power2\fR" 4 +.IX Item "-mno-power2" +.Ip "\fB\-mpowerpc\fR" 4 +.IX Item "-mpowerpc" +.Ip "\fB\-mno-powerpc\fR" 4 +.IX Item "-mno-powerpc" +.Ip "\fB\-mpowerpc-gpopt\fR" 4 +.IX Item "-mpowerpc-gpopt" +.Ip "\fB\-mno-powerpc-gpopt\fR" 4 +.IX Item "-mno-powerpc-gpopt" +.Ip "\fB\-mpowerpc-gfxopt\fR" 4 +.IX Item "-mpowerpc-gfxopt" +.Ip "\fB\-mno-powerpc-gfxopt\fR" 4 +.IX Item "-mno-powerpc-gfxopt" +.Ip "\fB\-mpowerpc64\fR" 4 +.IX Item "-mpowerpc64" +.Ip "\fB\-mno-powerpc64\fR" 4 +.IX Item "-mno-powerpc64" +.PD +\&\s-1GCC\s0 supports two related instruction set architectures for the +\&\s-1RS/6000\s0 and PowerPC. The \fI\s-1POWER\s0\fR instruction set are those +instructions supported by the \fBrios\fR chip set used in the original +\&\s-1RS/6000\s0 systems and the \fIPowerPC\fR instruction set is the +architecture of the Motorola MPC5xx, MPC6xx, MPC8xx microprocessors, and +the \s-1IBM\s0 4xx microprocessors. +.Sp +Neither architecture is a subset of the other. However there is a +large common subset of instructions supported by both. An \s-1MQ\s0 +register is included in processors supporting the \s-1POWER\s0 architecture. +.Sp +You use these options to specify which instructions are available on the +processor you are using. The default value of these options is +determined when configuring \s-1GCC\s0. Specifying the +\&\fB\-mcpu=\fR\fIcpu_type\fR overrides the specification of these +options. We recommend you use the \fB\-mcpu=\fR\fIcpu_type\fR option +rather than the options listed above. +.Sp +The \fB\-mpower\fR option allows \s-1GCC\s0 to generate instructions that +are found only in the \s-1POWER\s0 architecture and to use the \s-1MQ\s0 register. +Specifying \fB\-mpower2\fR implies \fB\-power\fR and also allows \s-1GCC\s0 +to generate instructions that are present in the \s-1POWER2\s0 architecture but +not the original \s-1POWER\s0 architecture. +.Sp +The \fB\-mpowerpc\fR option allows \s-1GCC\s0 to generate instructions that +are found only in the 32\-bit subset of the PowerPC architecture. +Specifying \fB\-mpowerpc-gpopt\fR implies \fB\-mpowerpc\fR and also allows +\&\s-1GCC\s0 to use the optional PowerPC architecture instructions in the +General Purpose group, including floating-point square root. Specifying +\&\fB\-mpowerpc-gfxopt\fR implies \fB\-mpowerpc\fR and also allows \s-1GCC\s0 to +use the optional PowerPC architecture instructions in the Graphics +group, including floating-point select. +.Sp +The \fB\-mpowerpc64\fR option allows \s-1GCC\s0 to generate the additional +64\-bit instructions that are found in the full PowerPC64 architecture +and to treat GPRs as 64\-bit, doubleword quantities. \s-1GCC\s0 defaults to +\&\fB\-mno-powerpc64\fR. +.Sp +If you specify both \fB\-mno-power\fR and \fB\-mno-powerpc\fR, \s-1GCC\s0 +will use only the instructions in the common subset of both +architectures plus some special \s-1AIX\s0 common-mode calls, and will not use +the \s-1MQ\s0 register. Specifying both \fB\-mpower\fR and \fB\-mpowerpc\fR +permits \s-1GCC\s0 to use any instruction from either architecture and to +allow use of the \s-1MQ\s0 register; specify this for the Motorola \s-1MPC601\s0. +.Ip "\fB\-mnew-mnemonics\fR" 4 +.IX Item "-mnew-mnemonics" +.PD 0 +.Ip "\fB\-mold-mnemonics\fR" 4 +.IX Item "-mold-mnemonics" +.PD +Select which mnemonics to use in the generated assembler code. With +\&\fB\-mnew-mnemonics\fR, \s-1GCC\s0 uses the assembler mnemonics defined for +the PowerPC architecture. With \fB\-mold-mnemonics\fR it uses the +assembler mnemonics defined for the \s-1POWER\s0 architecture. Instructions +defined in only one architecture have only one mnemonic; \s-1GCC\s0 uses that +mnemonic irrespective of which of these options is specified. +.Sp +\&\s-1GCC\s0 defaults to the mnemonics appropriate for the architecture in +use. Specifying \fB\-mcpu=\fR\fIcpu_type\fR sometimes overrides the +value of these option. Unless you are building a cross-compiler, you +should normally not specify either \fB\-mnew-mnemonics\fR or +\&\fB\-mold-mnemonics\fR, but should instead accept the default. +.Ip "\fB\-mcpu=\fR\fIcpu_type\fR" 4 +.IX Item "-mcpu=cpu_type" +Set architecture type, register usage, choice of mnemonics, and +instruction scheduling parameters for machine type \fIcpu_type\fR. +Supported values for \fIcpu_type\fR are \fBrios\fR, \fBrios1\fR, +\&\fBrsc\fR, \fBrios2\fR, \fBrs64a\fR, \fB601\fR, \fB602\fR, +\&\fB603\fR, \fB603e\fR, \fB604\fR, \fB604e\fR, \fB620\fR, +\&\fB630\fR, \fB740\fR, \fB7400\fR, \fB7450\fR, \fB750\fR, +\&\fBpower\fR, \fBpower2\fR, \fBpowerpc\fR, \fB403\fR, \fB505\fR, +\&\fB801\fR, \fB821\fR, \fB823\fR, and \fB860\fR and \fBcommon\fR. +.Sp +\&\fB\-mcpu=common\fR selects a completely generic processor. Code +generated under this option will run on any \s-1POWER\s0 or PowerPC processor. +\&\s-1GCC\s0 will use only the instructions in the common subset of both +architectures, and will not use the \s-1MQ\s0 register. \s-1GCC\s0 assumes a generic +processor model for scheduling purposes. +.Sp +\&\fB\-mcpu=power\fR, \fB\-mcpu=power2\fR, \fB\-mcpu=powerpc\fR, and +\&\fB\-mcpu=powerpc64\fR specify generic \s-1POWER\s0, \s-1POWER2\s0, pure 32\-bit +PowerPC (i.e., not \s-1MPC601\s0), and 64\-bit PowerPC architecture machine +types, with an appropriate, generic processor model assumed for +scheduling purposes. +.Sp +The other options specify a specific processor. Code generated under +those options will run best on that processor, and may not run at all on +others. +.Sp +The \fB\-mcpu\fR options automatically enable or disable other +\&\fB\-m\fR options as follows: +.RS 4 +.Ip "\fBcommon\fR" 4 +.IX Item "common" +\&\fB\-mno-power\fR, \fB\-mno-powerc\fR +.Ip "\fBpower\fR" 4 +.IX Item "power" +.PD 0 +.Ip "\fBpower2\fR" 4 +.IX Item "power2" +.Ip "\fBrios1\fR" 4 +.IX Item "rios1" +.Ip "\fBrios2\fR" 4 +.IX Item "rios2" +.Ip "\fBrsc\fR" 4 +.IX Item "rsc" +.PD +\&\fB\-mpower\fR, \fB\-mno-powerpc\fR, \fB\-mno-new-mnemonics\fR +.Ip "\fBpowerpc\fR" 4 +.IX Item "powerpc" +.PD 0 +.Ip "\fBrs64a\fR" 4 +.IX Item "rs64a" +.Ip "\fB602\fR" 4 +.IX Item "602" +.Ip "\fB603\fR" 4 +.IX Item "603" +.Ip "\fB603e\fR" 4 +.IX Item "603e" +.Ip "\fB604\fR" 4 +.IX Item "604" +.Ip "\fB620\fR" 4 +.IX Item "620" +.Ip "\fB630\fR" 4 +.IX Item "630" +.Ip "\fB740\fR" 4 +.IX Item "740" +.Ip "\fB7400\fR" 4 +.IX Item "7400" +.Ip "\fB7450\fR" 4 +.IX Item "7450" +.Ip "\fB750\fR" 4 +.IX Item "750" +.Ip "\fB505\fR" 4 +.IX Item "505" +.PD +\&\fB\-mno-power\fR, \fB\-mpowerpc\fR, \fB\-mnew-mnemonics\fR +.Ip "\fB601\fR" 4 +.IX Item "601" +\&\fB\-mpower\fR, \fB\-mpowerpc\fR, \fB\-mnew-mnemonics\fR +.Ip "\fB403\fR" 4 +.IX Item "403" +.PD 0 +.Ip "\fB821\fR" 4 +.IX Item "821" +.Ip "\fB860\fR" 4 +.IX Item "860" +.PD +\&\fB\-mno-power\fR, \fB\-mpowerpc\fR, \fB\-mnew-mnemonics\fR, \fB\-msoft-float\fR +.RE +.RS 4 +.RE +.Ip "\fB\-mtune=\fR\fIcpu_type\fR" 4 +.IX Item "-mtune=cpu_type" +Set the instruction scheduling parameters for machine type +\&\fIcpu_type\fR, but do not set the architecture type, register usage, or +choice of mnemonics, as \fB\-mcpu=\fR\fIcpu_type\fR would. The same +values for \fIcpu_type\fR are used for \fB\-mtune\fR as for +\&\fB\-mcpu\fR. If both are specified, the code generated will use the +architecture, registers, and mnemonics set by \fB\-mcpu\fR, but the +scheduling parameters set by \fB\-mtune\fR. +.Ip "\fB\-maltivec\fR" 4 +.IX Item "-maltivec" +.PD 0 +.Ip "\fB\-mno-altivec\fR" 4 +.IX Item "-mno-altivec" +.PD +These switches enable or disable the use of built-in functions that +allow access to the AltiVec instruction set. You may also need to set +\&\fB\-mabi=altivec\fR to adjust the current \s-1ABI\s0 with AltiVec \s-1ABI\s0 +enhancements. +.Ip "\fB\-mfull-toc\fR" 4 +.IX Item "-mfull-toc" +.PD 0 +.Ip "\fB\-mno-fp-in-toc\fR" 4 +.IX Item "-mno-fp-in-toc" +.Ip "\fB\-mno-sum-in-toc\fR" 4 +.IX Item "-mno-sum-in-toc" +.Ip "\fB\-mminimal-toc\fR" 4 +.IX Item "-mminimal-toc" +.PD +Modify generation of the \s-1TOC\s0 (Table Of Contents), which is created for +every executable file. The \fB\-mfull-toc\fR option is selected by +default. In that case, \s-1GCC\s0 will allocate at least one \s-1TOC\s0 entry for +each unique non-automatic variable reference in your program. \s-1GCC\s0 +will also place floating-point constants in the \s-1TOC\s0. However, only +16,384 entries are available in the \s-1TOC\s0. +.Sp +If you receive a linker error message that saying you have overflowed +the available \s-1TOC\s0 space, you can reduce the amount of \s-1TOC\s0 space used +with the \fB\-mno-fp-in-toc\fR and \fB\-mno-sum-in-toc\fR options. +\&\fB\-mno-fp-in-toc\fR prevents \s-1GCC\s0 from putting floating-point +constants in the \s-1TOC\s0 and \fB\-mno-sum-in-toc\fR forces \s-1GCC\s0 to +generate code to calculate the sum of an address and a constant at +run-time instead of putting that sum into the \s-1TOC\s0. You may specify one +or both of these options. Each causes \s-1GCC\s0 to produce very slightly +slower and larger code at the expense of conserving \s-1TOC\s0 space. +.Sp +If you still run out of space in the \s-1TOC\s0 even when you specify both of +these options, specify \fB\-mminimal-toc\fR instead. This option causes +\&\s-1GCC\s0 to make only one \s-1TOC\s0 entry for every file. When you specify this +option, \s-1GCC\s0 will produce code that is slower and larger but which +uses extremely little \s-1TOC\s0 space. You may wish to use this option +only on files that contain less frequently executed code. +.Ip "\fB\-maix64\fR" 4 +.IX Item "-maix64" +.PD 0 +.Ip "\fB\-maix32\fR" 4 +.IX Item "-maix32" +.PD +Enable 64\-bit \s-1AIX\s0 \s-1ABI\s0 and calling convention: 64\-bit pointers, 64\-bit +\&\f(CW\*(C`long\*(C'\fR type, and the infrastructure needed to support them. +Specifying \fB\-maix64\fR implies \fB\-mpowerpc64\fR and +\&\fB\-mpowerpc\fR, while \fB\-maix32\fR disables the 64\-bit \s-1ABI\s0 and +implies \fB\-mno-powerpc64\fR. \s-1GCC\s0 defaults to \fB\-maix32\fR. +.Ip "\fB\-mxl-call\fR" 4 +.IX Item "-mxl-call" +.PD 0 +.Ip "\fB\-mno-xl-call\fR" 4 +.IX Item "-mno-xl-call" +.PD +On \s-1AIX\s0, pass floating-point arguments to prototyped functions beyond the +register save area (\s-1RSA\s0) on the stack in addition to argument FPRs. The +\&\s-1AIX\s0 calling convention was extended but not initially documented to +handle an obscure K&R C case of calling a function that takes the +address of its arguments with fewer arguments than declared. \s-1AIX\s0 \s-1XL\s0 +compilers access floating point arguments which do not fit in the +\&\s-1RSA\s0 from the stack when a subroutine is compiled without +optimization. Because always storing floating-point arguments on the +stack is inefficient and rarely needed, this option is not enabled by +default and only is necessary when calling subroutines compiled by \s-1AIX\s0 +\&\s-1XL\s0 compilers without optimization. +.Ip "\fB\-mpe\fR" 4 +.IX Item "-mpe" +Support \fI\s-1IBM\s0 \s-1RS/6000\s0 \s-1SP\s0\fR \fIParallel Environment\fR (\s-1PE\s0). Link an +application written to use message passing with special startup code to +enable the application to run. The system must have \s-1PE\s0 installed in the +standard location (\fI/usr/lpp/ppe.poe/\fR), or the \fIspecs\fR file +must be overridden with the \fB\-specs=\fR option to specify the +appropriate directory location. The Parallel Environment does not +support threads, so the \fB\-mpe\fR option and the \fB\-pthread\fR +option are incompatible. +.Ip "\fB\-msoft-float\fR" 4 +.IX Item "-msoft-float" +.PD 0 +.Ip "\fB\-mhard-float\fR" 4 +.IX Item "-mhard-float" +.PD +Generate code that does not use (uses) the floating-point register set. +Software floating point emulation is provided if you use the +\&\fB\-msoft-float\fR option, and pass the option to \s-1GCC\s0 when linking. +.Ip "\fB\-mmultiple\fR" 4 +.IX Item "-mmultiple" +.PD 0 +.Ip "\fB\-mno-multiple\fR" 4 +.IX Item "-mno-multiple" +.PD +Generate code that uses (does not use) the load multiple word +instructions and the store multiple word instructions. These +instructions are generated by default on \s-1POWER\s0 systems, and not +generated on PowerPC systems. Do not use \fB\-mmultiple\fR on little +endian PowerPC systems, since those instructions do not work when the +processor is in little endian mode. The exceptions are \s-1PPC740\s0 and +\&\s-1PPC750\s0 which permit the instructions usage in little endian mode. +.Ip "\fB\-mstring\fR" 4 +.IX Item "-mstring" +.PD 0 +.Ip "\fB\-mno-string\fR" 4 +.IX Item "-mno-string" +.PD +Generate code that uses (does not use) the load string instructions +and the store string word instructions to save multiple registers and +do small block moves. These instructions are generated by default on +\&\s-1POWER\s0 systems, and not generated on PowerPC systems. Do not use +\&\fB\-mstring\fR on little endian PowerPC systems, since those +instructions do not work when the processor is in little endian mode. +The exceptions are \s-1PPC740\s0 and \s-1PPC750\s0 which permit the instructions +usage in little endian mode. +.Ip "\fB\-mupdate\fR" 4 +.IX Item "-mupdate" +.PD 0 +.Ip "\fB\-mno-update\fR" 4 +.IX Item "-mno-update" +.PD +Generate code that uses (does not use) the load or store instructions +that update the base register to the address of the calculated memory +location. These instructions are generated by default. If you use +\&\fB\-mno-update\fR, there is a small window between the time that the +stack pointer is updated and the address of the previous frame is +stored, which means code that walks the stack frame across interrupts or +signals may get corrupted data. +.Ip "\fB\-mfused-madd\fR" 4 +.IX Item "-mfused-madd" +.PD 0 +.Ip "\fB\-mno-fused-madd\fR" 4 +.IX Item "-mno-fused-madd" +.PD +Generate code that uses (does not use) the floating point multiply and +accumulate instructions. These instructions are generated by default if +hardware floating is used. +.Ip "\fB\-mno-bit-align\fR" 4 +.IX Item "-mno-bit-align" +.PD 0 +.Ip "\fB\-mbit-align\fR" 4 +.IX Item "-mbit-align" +.PD +On System V.4 and embedded PowerPC systems do not (do) force structures +and unions that contain bit-fields to be aligned to the base type of the +bit-field. +.Sp +For example, by default a structure containing nothing but 8 +\&\f(CW\*(C`unsigned\*(C'\fR bit-fields of length 1 would be aligned to a 4 byte +boundary and have a size of 4 bytes. By using \fB\-mno-bit-align\fR, +the structure would be aligned to a 1 byte boundary and be one byte in +size. +.Ip "\fB\-mno-strict-align\fR" 4 +.IX Item "-mno-strict-align" +.PD 0 +.Ip "\fB\-mstrict-align\fR" 4 +.IX Item "-mstrict-align" +.PD +On System V.4 and embedded PowerPC systems do not (do) assume that +unaligned memory references will be handled by the system. +.Ip "\fB\-mrelocatable\fR" 4 +.IX Item "-mrelocatable" +.PD 0 +.Ip "\fB\-mno-relocatable\fR" 4 +.IX Item "-mno-relocatable" +.PD +On embedded PowerPC systems generate code that allows (does not allow) +the program to be relocated to a different address at runtime. If you +use \fB\-mrelocatable\fR on any module, all objects linked together must +be compiled with \fB\-mrelocatable\fR or \fB\-mrelocatable-lib\fR. +.Ip "\fB\-mrelocatable-lib\fR" 4 +.IX Item "-mrelocatable-lib" +.PD 0 +.Ip "\fB\-mno-relocatable-lib\fR" 4 +.IX Item "-mno-relocatable-lib" +.PD +On embedded PowerPC systems generate code that allows (does not allow) +the program to be relocated to a different address at runtime. Modules +compiled with \fB\-mrelocatable-lib\fR can be linked with either modules +compiled without \fB\-mrelocatable\fR and \fB\-mrelocatable-lib\fR or +with modules compiled with the \fB\-mrelocatable\fR options. +.Ip "\fB\-mno-toc\fR" 4 +.IX Item "-mno-toc" +.PD 0 +.Ip "\fB\-mtoc\fR" 4 +.IX Item "-mtoc" +.PD +On System V.4 and embedded PowerPC systems do not (do) assume that +register 2 contains a pointer to a global area pointing to the addresses +used in the program. +.Ip "\fB\-mlittle\fR" 4 +.IX Item "-mlittle" +.PD 0 +.Ip "\fB\-mlittle-endian\fR" 4 +.IX Item "-mlittle-endian" +.PD +On System V.4 and embedded PowerPC systems compile code for the +processor in little endian mode. The \fB\-mlittle-endian\fR option is +the same as \fB\-mlittle\fR. +.Ip "\fB\-mbig\fR" 4 +.IX Item "-mbig" +.PD 0 +.Ip "\fB\-mbig-endian\fR" 4 +.IX Item "-mbig-endian" +.PD +On System V.4 and embedded PowerPC systems compile code for the +processor in big endian mode. The \fB\-mbig-endian\fR option is +the same as \fB\-mbig\fR. +.Ip "\fB\-mcall-sysv\fR" 4 +.IX Item "-mcall-sysv" +On System V.4 and embedded PowerPC systems compile code using calling +conventions that adheres to the March 1995 draft of the System V +Application Binary Interface, PowerPC processor supplement. This is the +default unless you configured \s-1GCC\s0 using \fBpowerpc-*\-eabiaix\fR. +.Ip "\fB\-mcall-sysv-eabi\fR" 4 +.IX Item "-mcall-sysv-eabi" +Specify both \fB\-mcall-sysv\fR and \fB\-meabi\fR options. +.Ip "\fB\-mcall-sysv-noeabi\fR" 4 +.IX Item "-mcall-sysv-noeabi" +Specify both \fB\-mcall-sysv\fR and \fB\-mno-eabi\fR options. +.Ip "\fB\-mcall-aix\fR" 4 +.IX Item "-mcall-aix" +On System V.4 and embedded PowerPC systems compile code using calling +conventions that are similar to those used on \s-1AIX\s0. This is the +default if you configured \s-1GCC\s0 using \fBpowerpc-*\-eabiaix\fR. +.Ip "\fB\-mcall-solaris\fR" 4 +.IX Item "-mcall-solaris" +On System V.4 and embedded PowerPC systems compile code for the Solaris +operating system. +.Ip "\fB\-mcall-linux\fR" 4 +.IX Item "-mcall-linux" +On System V.4 and embedded PowerPC systems compile code for the +Linux-based \s-1GNU\s0 system. +.Ip "\fB\-mcall-gnu\fR" 4 +.IX Item "-mcall-gnu" +On System V.4 and embedded PowerPC systems compile code for the +Hurd-based \s-1GNU\s0 system. +.Ip "\fB\-mcall-netbsd\fR" 4 +.IX Item "-mcall-netbsd" +On System V.4 and embedded PowerPC systems compile code for the +NetBSD operating system. +.Ip "\fB\-maix-struct-return\fR" 4 +.IX Item "-maix-struct-return" +Return all structures in memory (as specified by the \s-1AIX\s0 \s-1ABI\s0). +.Ip "\fB\-msvr4\-struct-return\fR" 4 +.IX Item "-msvr4-struct-return" +Return structures smaller than 8 bytes in registers (as specified by the +\&\s-1SVR4\s0 \s-1ABI\s0). +.Ip "\fB\-mabi=altivec\fR" 4 +.IX Item "-mabi=altivec" +Extend the current \s-1ABI\s0 with AltiVec \s-1ABI\s0 extensions. This does not +change the default \s-1ABI\s0, instead it adds the AltiVec \s-1ABI\s0 extensions to +the current \s-1ABI\s0. +.Ip "\fB\-mabi=no-altivec\fR" 4 +.IX Item "-mabi=no-altivec" +Disable AltiVec \s-1ABI\s0 extensions for the current \s-1ABI\s0. +.Ip "\fB\-mprototype\fR" 4 +.IX Item "-mprototype" +.PD 0 +.Ip "\fB\-mno-prototype\fR" 4 +.IX Item "-mno-prototype" +.PD +On System V.4 and embedded PowerPC systems assume that all calls to +variable argument functions are properly prototyped. Otherwise, the +compiler must insert an instruction before every non prototyped call to +set or clear bit 6 of the condition code register (\fI\s-1CR\s0\fR) to +indicate whether floating point values were passed in the floating point +registers in case the function takes a variable arguments. With +\&\fB\-mprototype\fR, only calls to prototyped variable argument functions +will set or clear the bit. +.Ip "\fB\-msim\fR" 4 +.IX Item "-msim" +On embedded PowerPC systems, assume that the startup module is called +\&\fIsim-crt0.o\fR and that the standard C libraries are \fIlibsim.a\fR and +\&\fIlibc.a\fR. This is the default for \fBpowerpc-*\-eabisim\fR. +configurations. +.Ip "\fB\-mmvme\fR" 4 +.IX Item "-mmvme" +On embedded PowerPC systems, assume that the startup module is called +\&\fIcrt0.o\fR and the standard C libraries are \fIlibmvme.a\fR and +\&\fIlibc.a\fR. +.Ip "\fB\-mads\fR" 4 +.IX Item "-mads" +On embedded PowerPC systems, assume that the startup module is called +\&\fIcrt0.o\fR and the standard C libraries are \fIlibads.a\fR and +\&\fIlibc.a\fR. +.Ip "\fB\-myellowknife\fR" 4 +.IX Item "-myellowknife" +On embedded PowerPC systems, assume that the startup module is called +\&\fIcrt0.o\fR and the standard C libraries are \fIlibyk.a\fR and +\&\fIlibc.a\fR. +.Ip "\fB\-mvxworks\fR" 4 +.IX Item "-mvxworks" +On System V.4 and embedded PowerPC systems, specify that you are +compiling for a VxWorks system. +.Ip "\fB\-memb\fR" 4 +.IX Item "-memb" +On embedded PowerPC systems, set the \fI\s-1PPC_EMB\s0\fR bit in the \s-1ELF\s0 flags +header to indicate that \fBeabi\fR extended relocations are used. +.Ip "\fB\-meabi\fR" 4 +.IX Item "-meabi" +.PD 0 +.Ip "\fB\-mno-eabi\fR" 4 +.IX Item "-mno-eabi" +.PD +On System V.4 and embedded PowerPC systems do (do not) adhere to the +Embedded Applications Binary Interface (eabi) which is a set of +modifications to the System V.4 specifications. Selecting \fB\-meabi\fR +means that the stack is aligned to an 8 byte boundary, a function +\&\f(CW\*(C`_\|_eabi\*(C'\fR is called to from \f(CW\*(C`main\*(C'\fR to set up the eabi +environment, and the \fB\-msdata\fR option can use both \f(CW\*(C`r2\*(C'\fR and +\&\f(CW\*(C`r13\*(C'\fR to point to two separate small data areas. Selecting +\&\fB\-mno-eabi\fR means that the stack is aligned to a 16 byte boundary, +do not call an initialization function from \f(CW\*(C`main\*(C'\fR, and the +\&\fB\-msdata\fR option will only use \f(CW\*(C`r13\*(C'\fR to point to a single +small data area. The \fB\-meabi\fR option is on by default if you +configured \s-1GCC\s0 using one of the \fBpowerpc*\-*\-eabi*\fR options. +.Ip "\fB\-msdata=eabi\fR" 4 +.IX Item "-msdata=eabi" +On System V.4 and embedded PowerPC systems, put small initialized +\&\f(CW\*(C`const\*(C'\fR global and static data in the \fB.sdata2\fR section, which +is pointed to by register \f(CW\*(C`r2\*(C'\fR. Put small initialized +non-\f(CW\*(C`const\*(C'\fR global and static data in the \fB.sdata\fR section, +which is pointed to by register \f(CW\*(C`r13\*(C'\fR. Put small uninitialized +global and static data in the \fB.sbss\fR section, which is adjacent to +the \fB.sdata\fR section. The \fB\-msdata=eabi\fR option is +incompatible with the \fB\-mrelocatable\fR option. The +\&\fB\-msdata=eabi\fR option also sets the \fB\-memb\fR option. +.Ip "\fB\-msdata=sysv\fR" 4 +.IX Item "-msdata=sysv" +On System V.4 and embedded PowerPC systems, put small global and static +data in the \fB.sdata\fR section, which is pointed to by register +\&\f(CW\*(C`r13\*(C'\fR. Put small uninitialized global and static data in the +\&\fB.sbss\fR section, which is adjacent to the \fB.sdata\fR section. +The \fB\-msdata=sysv\fR option is incompatible with the +\&\fB\-mrelocatable\fR option. +.Ip "\fB\-msdata=default\fR" 4 +.IX Item "-msdata=default" +.PD 0 +.Ip "\fB\-msdata\fR" 4 +.IX Item "-msdata" +.PD +On System V.4 and embedded PowerPC systems, if \fB\-meabi\fR is used, +compile code the same as \fB\-msdata=eabi\fR, otherwise compile code the +same as \fB\-msdata=sysv\fR. +.Ip "\fB\-msdata-data\fR" 4 +.IX Item "-msdata-data" +On System V.4 and embedded PowerPC systems, put small global and static +data in the \fB.sdata\fR section. Put small uninitialized global and +static data in the \fB.sbss\fR section. Do not use register \f(CW\*(C`r13\*(C'\fR +to address small data however. This is the default behavior unless +other \fB\-msdata\fR options are used. +.Ip "\fB\-msdata=none\fR" 4 +.IX Item "-msdata=none" +.PD 0 +.Ip "\fB\-mno-sdata\fR" 4 +.IX Item "-mno-sdata" +.PD +On embedded PowerPC systems, put all initialized global and static data +in the \fB.data\fR section, and all uninitialized data in the +\&\fB.bss\fR section. +.Ip "\fB\-G\fR \fInum\fR" 4 +.IX Item "-G num" +On embedded PowerPC systems, put global and static items less than or +equal to \fInum\fR bytes into the small data or bss sections instead of +the normal data or bss section. By default, \fInum\fR is 8. The +\&\fB\-G\fR \fInum\fR switch is also passed to the linker. +All modules should be compiled with the same \fB\-G\fR \fInum\fR value. +.Ip "\fB\-mregnames\fR" 4 +.IX Item "-mregnames" +.PD 0 +.Ip "\fB\-mno-regnames\fR" 4 +.IX Item "-mno-regnames" +.PD +On System V.4 and embedded PowerPC systems do (do not) emit register +names in the assembly language output using symbolic forms. +.Ip "\fB\-pthread\fR" 4 +.IX Item "-pthread" +Adds support for multithreading with the \fIpthreads\fR library. +This option sets flags for both the preprocessor and linker. +.PP +.I "\s-1IBM\s0 \s-1RT\s0 Options" +.IX Subsection "IBM RT Options" +.PP +These \fB\-m\fR options are defined for the \s-1IBM\s0 \s-1RT\s0 \s-1PC:\s0 +.Ip "\fB\-min-line-mul\fR" 4 +.IX Item "-min-line-mul" +Use an in-line code sequence for integer multiplies. This is the +default. +.Ip "\fB\-mcall-lib-mul\fR" 4 +.IX Item "-mcall-lib-mul" +Call \f(CW\*(C`lmul$$\*(C'\fR for integer multiples. +.Ip "\fB\-mfull-fp-blocks\fR" 4 +.IX Item "-mfull-fp-blocks" +Generate full-size floating point data blocks, including the minimum +amount of scratch space recommended by \s-1IBM\s0. This is the default. +.Ip "\fB\-mminimum-fp-blocks\fR" 4 +.IX Item "-mminimum-fp-blocks" +Do not include extra scratch space in floating point data blocks. This +results in smaller code, but slower execution, since scratch space must +be allocated dynamically. +.Ip "\fB\-mfp-arg-in-fpregs\fR" 4 +.IX Item "-mfp-arg-in-fpregs" +Use a calling sequence incompatible with the \s-1IBM\s0 calling convention in +which floating point arguments are passed in floating point registers. +Note that \f(CW\*(C`varargs.h\*(C'\fR and \f(CW\*(C`stdarg.h\*(C'\fR will not work with +floating point operands if this option is specified. +.Ip "\fB\-mfp-arg-in-gregs\fR" 4 +.IX Item "-mfp-arg-in-gregs" +Use the normal calling convention for floating point arguments. This is +the default. +.Ip "\fB\-mhc-struct-return\fR" 4 +.IX Item "-mhc-struct-return" +Return structures of more than one word in memory, rather than in a +register. This provides compatibility with the MetaWare HighC (hc) +compiler. Use the option \fB\-fpcc-struct-return\fR for compatibility +with the Portable C Compiler (pcc). +.Ip "\fB\-mnohc-struct-return\fR" 4 +.IX Item "-mnohc-struct-return" +Return some structures of more than one word in registers, when +convenient. This is the default. For compatibility with the +IBM-supplied compilers, use the option \fB\-fpcc-struct-return\fR or the +option \fB\-mhc-struct-return\fR. +.PP +.I "\s-1MIPS\s0 Options" +.IX Subsection "MIPS Options" +.PP +These \fB\-m\fR options are defined for the \s-1MIPS\s0 family of computers: +.Ip "\fB\-march=\fR\fIcpu-type\fR" 4 +.IX Item "-march=cpu-type" +Assume the defaults for the machine type \fIcpu-type\fR when generating +instructions. The choices for \fIcpu-type\fR are \fBr2000\fR, \fBr3000\fR, +\&\fBr3900\fR, \fBr4000\fR, \fBr4100\fR, \fBr4300\fR, \fBr4400\fR, +\&\fBr4600\fR, \fBr4650\fR, \fBr5000\fR, \fBr6000\fR, \fBr8000\fR, +and \fBorion\fR. Additionally, the \fBr2000\fR, \fBr3000\fR, +\&\fBr4000\fR, \fBr5000\fR, and \fBr6000\fR can be abbreviated as +\&\fBr2k\fR (or \fBr2K\fR), \fBr3k\fR, etc. +.Ip "\fB\-mtune=\fR\fIcpu-type\fR" 4 +.IX Item "-mtune=cpu-type" +Assume the defaults for the machine type \fIcpu-type\fR when scheduling +instructions. The choices for \fIcpu-type\fR are \fBr2000\fR, \fBr3000\fR, +\&\fBr3900\fR, \fBr4000\fR, \fBr4100\fR, \fBr4300\fR, \fBr4400\fR, +\&\fBr4600\fR, \fBr4650\fR, \fBr5000\fR, \fBr6000\fR, \fBr8000\fR, +and \fBorion\fR. Additionally, the \fBr2000\fR, \fBr3000\fR, +\&\fBr4000\fR, \fBr5000\fR, and \fBr6000\fR can be abbreviated as +\&\fBr2k\fR (or \fBr2K\fR), \fBr3k\fR, etc. While picking a specific +\&\fIcpu-type\fR will schedule things appropriately for that particular +chip, the compiler will not generate any code that does not meet level 1 +of the \s-1MIPS\s0 \s-1ISA\s0 (instruction set architecture) without a \fB\-mipsX\fR +or \fB\-mabi\fR switch being used. +.Ip "\fB\-mcpu=\fR\fIcpu-type\fR" 4 +.IX Item "-mcpu=cpu-type" +This is identical to specifying both \fB\-march\fR and \fB\-mtune\fR. +.Ip "\fB\-mips1\fR" 4 +.IX Item "-mips1" +Issue instructions from level 1 of the \s-1MIPS\s0 \s-1ISA\s0. This is the default. +\&\fBr3000\fR is the default \fIcpu-type\fR at this \s-1ISA\s0 level. +.Ip "\fB\-mips2\fR" 4 +.IX Item "-mips2" +Issue instructions from level 2 of the \s-1MIPS\s0 \s-1ISA\s0 (branch likely, square +root instructions). \fBr6000\fR is the default \fIcpu-type\fR at this +\&\s-1ISA\s0 level. +.Ip "\fB\-mips3\fR" 4 +.IX Item "-mips3" +Issue instructions from level 3 of the \s-1MIPS\s0 \s-1ISA\s0 (64\-bit instructions). +\&\fBr4000\fR is the default \fIcpu-type\fR at this \s-1ISA\s0 level. +.Ip "\fB\-mips4\fR" 4 +.IX Item "-mips4" +Issue instructions from level 4 of the \s-1MIPS\s0 \s-1ISA\s0 (conditional move, +prefetch, enhanced \s-1FPU\s0 instructions). \fBr8000\fR is the default +\&\fIcpu-type\fR at this \s-1ISA\s0 level. +.Ip "\fB\-mfp32\fR" 4 +.IX Item "-mfp32" +Assume that 32 32\-bit floating point registers are available. This is +the default. +.Ip "\fB\-mfp64\fR" 4 +.IX Item "-mfp64" +Assume that 32 64\-bit floating point registers are available. This is +the default when the \fB\-mips3\fR option is used. +.Ip "\fB\-mfused-madd\fR" 4 +.IX Item "-mfused-madd" +.PD 0 +.Ip "\fB\-mno-fused-madd\fR" 4 +.IX Item "-mno-fused-madd" +.PD +Generate code that uses (does not use) the floating point multiply and +accumulate instructions, when they are available. These instructions +are generated by default if they are available, but this may be +undesirable if the extra precision causes problems or on certain chips +in the mode where denormals are rounded to zero where denormals +generated by multiply and accumulate instructions cause exceptions +anyway. +.Ip "\fB\-mgp32\fR" 4 +.IX Item "-mgp32" +Assume that 32 32\-bit general purpose registers are available. This is +the default. +.Ip "\fB\-mgp64\fR" 4 +.IX Item "-mgp64" +Assume that 32 64\-bit general purpose registers are available. This is +the default when the \fB\-mips3\fR option is used. +.Ip "\fB\-mint64\fR" 4 +.IX Item "-mint64" +Force int and long types to be 64 bits wide. See \fB\-mlong32\fR for an +explanation of the default, and the width of pointers. +.Ip "\fB\-mlong64\fR" 4 +.IX Item "-mlong64" +Force long types to be 64 bits wide. See \fB\-mlong32\fR for an +explanation of the default, and the width of pointers. +.Ip "\fB\-mlong32\fR" 4 +.IX Item "-mlong32" +Force long, int, and pointer types to be 32 bits wide. +.Sp +If none of \fB\-mlong32\fR, \fB\-mlong64\fR, or \fB\-mint64\fR are set, +the size of ints, longs, and pointers depends on the \s-1ABI\s0 and \s-1ISA\s0 chosen. +For \fB\-mabi=32\fR, and \fB\-mabi=n32\fR, ints and longs are 32 bits +wide. For \fB\-mabi=64\fR, ints are 32 bits, and longs are 64 bits wide. +For \fB\-mabi=eabi\fR and either \fB\-mips1\fR or \fB\-mips2\fR, ints +and longs are 32 bits wide. For \fB\-mabi=eabi\fR and higher ISAs, ints +are 32 bits, and longs are 64 bits wide. The width of pointer types is +the smaller of the width of longs or the width of general purpose +registers (which in turn depends on the \s-1ISA\s0). +.Ip "\fB\-mabi=32\fR" 4 +.IX Item "-mabi=32" +.PD 0 +.Ip "\fB\-mabi=o64\fR" 4 +.IX Item "-mabi=o64" +.Ip "\fB\-mabi=n32\fR" 4 +.IX Item "-mabi=n32" +.Ip "\fB\-mabi=64\fR" 4 +.IX Item "-mabi=64" +.Ip "\fB\-mabi=eabi\fR" 4 +.IX Item "-mabi=eabi" +.PD +Generate code for the indicated \s-1ABI\s0. The default instruction level is +\&\fB\-mips1\fR for \fB32\fR, \fB\-mips3\fR for \fBn32\fR, and +\&\fB\-mips4\fR otherwise. Conversely, with \fB\-mips1\fR or +\&\fB\-mips2\fR, the default \s-1ABI\s0 is \fB32\fR; otherwise, the default \s-1ABI\s0 +is \fB64\fR. +.Ip "\fB\-mmips-as\fR" 4 +.IX Item "-mmips-as" +Generate code for the \s-1MIPS\s0 assembler, and invoke \fImips-tfile\fR to +add normal debug information. This is the default for all +platforms except for the \s-1OSF/1\s0 reference platform, using the OSF/rose +object format. If the either of the \fB\-gstabs\fR or \fB\-gstabs+\fR +switches are used, the \fImips-tfile\fR program will encapsulate the +stabs within \s-1MIPS\s0 \s-1ECOFF\s0. +.Ip "\fB\-mgas\fR" 4 +.IX Item "-mgas" +Generate code for the \s-1GNU\s0 assembler. This is the default on the \s-1OSF/1\s0 +reference platform, using the OSF/rose object format. Also, this is +the default if the configure option \fB\*(--with-gnu-as\fR is used. +.Ip "\fB\-msplit-addresses\fR" 4 +.IX Item "-msplit-addresses" +.PD 0 +.Ip "\fB\-mno-split-addresses\fR" 4 +.IX Item "-mno-split-addresses" +.PD +Generate code to load the high and low parts of address constants separately. +This allows \s-1GCC\s0 to optimize away redundant loads of the high order +bits of addresses. This optimization requires \s-1GNU\s0 as and \s-1GNU\s0 ld. +This optimization is enabled by default for some embedded targets where +\&\s-1GNU\s0 as and \s-1GNU\s0 ld are standard. +.Ip "\fB\-mrnames\fR" 4 +.IX Item "-mrnames" +.PD 0 +.Ip "\fB\-mno-rnames\fR" 4 +.IX Item "-mno-rnames" +.PD +The \fB\-mrnames\fR switch says to output code using the \s-1MIPS\s0 software +names for the registers, instead of the hardware names (ie, \fIa0\fR +instead of \fI$4\fR). The only known assembler that supports this option +is the Algorithmics assembler. +.Ip "\fB\-mgpopt\fR" 4 +.IX Item "-mgpopt" +.PD 0 +.Ip "\fB\-mno-gpopt\fR" 4 +.IX Item "-mno-gpopt" +.PD +The \fB\-mgpopt\fR switch says to write all of the data declarations +before the instructions in the text section, this allows the \s-1MIPS\s0 +assembler to generate one word memory references instead of using two +words for short global or static data items. This is on by default if +optimization is selected. +.Ip "\fB\-mstats\fR" 4 +.IX Item "-mstats" +.PD 0 +.Ip "\fB\-mno-stats\fR" 4 +.IX Item "-mno-stats" +.PD +For each non-inline function processed, the \fB\-mstats\fR switch +causes the compiler to emit one line to the standard error file to +print statistics about the program (number of registers saved, stack +size, etc.). +.Ip "\fB\-mmemcpy\fR" 4 +.IX Item "-mmemcpy" +.PD 0 +.Ip "\fB\-mno-memcpy\fR" 4 +.IX Item "-mno-memcpy" +.PD +The \fB\-mmemcpy\fR switch makes all block moves call the appropriate +string function (\fBmemcpy\fR or \fBbcopy\fR) instead of possibly +generating inline code. +.Ip "\fB\-mmips-tfile\fR" 4 +.IX Item "-mmips-tfile" +.PD 0 +.Ip "\fB\-mno-mips-tfile\fR" 4 +.IX Item "-mno-mips-tfile" +.PD +The \fB\-mno-mips-tfile\fR switch causes the compiler not +postprocess the object file with the \fImips-tfile\fR program, +after the \s-1MIPS\s0 assembler has generated it to add debug support. If +\&\fImips-tfile\fR is not run, then no local variables will be +available to the debugger. In addition, \fIstage2\fR and +\&\fIstage3\fR objects will have the temporary file names passed to the +assembler embedded in the object file, which means the objects will +not compare the same. The \fB\-mno-mips-tfile\fR switch should only +be used when there are bugs in the \fImips-tfile\fR program that +prevents compilation. +.Ip "\fB\-msoft-float\fR" 4 +.IX Item "-msoft-float" +Generate output containing library calls for floating point. +\&\fBWarning:\fR the requisite libraries are not part of \s-1GCC\s0. +Normally the facilities of the machine's usual C compiler are used, but +this can't be done directly in cross-compilation. You must make your +own arrangements to provide suitable library functions for +cross-compilation. +.Ip "\fB\-mhard-float\fR" 4 +.IX Item "-mhard-float" +Generate output containing floating point instructions. This is the +default if you use the unmodified sources. +.Ip "\fB\-mabicalls\fR" 4 +.IX Item "-mabicalls" +.PD 0 +.Ip "\fB\-mno-abicalls\fR" 4 +.IX Item "-mno-abicalls" +.PD +Emit (or do not emit) the pseudo operations \fB.abicalls\fR, +\&\fB.cpload\fR, and \fB.cprestore\fR that some System V.4 ports use for +position independent code. +.Ip "\fB\-mlong-calls\fR" 4 +.IX Item "-mlong-calls" +.PD 0 +.Ip "\fB\-mno-long-calls\fR" 4 +.IX Item "-mno-long-calls" +.PD +Do all calls with the \fB\s-1JALR\s0\fR instruction, which requires +loading up a function's address into a register before the call. +You need to use this switch, if you call outside of the current +512 megabyte segment to functions that are not through pointers. +.Ip "\fB\-mhalf-pic\fR" 4 +.IX Item "-mhalf-pic" +.PD 0 +.Ip "\fB\-mno-half-pic\fR" 4 +.IX Item "-mno-half-pic" +.PD +Put pointers to extern references into the data section and load them +up, rather than put the references in the text section. +.Ip "\fB\-membedded-pic\fR" 4 +.IX Item "-membedded-pic" +.PD 0 +.Ip "\fB\-mno-embedded-pic\fR" 4 +.IX Item "-mno-embedded-pic" +.PD +Generate \s-1PIC\s0 code suitable for some embedded systems. All calls are +made using \s-1PC\s0 relative address, and all data is addressed using the \f(CW$gp\fR +register. No more than 65536 bytes of global data may be used. This +requires \s-1GNU\s0 as and \s-1GNU\s0 ld which do most of the work. This currently +only works on targets which use \s-1ECOFF\s0; it does not work with \s-1ELF\s0. +.Ip "\fB\-membedded-data\fR" 4 +.IX Item "-membedded-data" +.PD 0 +.Ip "\fB\-mno-embedded-data\fR" 4 +.IX Item "-mno-embedded-data" +.PD +Allocate variables to the read-only data section first if possible, then +next in the small data section if possible, otherwise in data. This gives +slightly slower code than the default, but reduces the amount of \s-1RAM\s0 required +when executing, and thus may be preferred for some embedded systems. +.Ip "\fB\-muninit-const-in-rodata\fR" 4 +.IX Item "-muninit-const-in-rodata" +.PD 0 +.Ip "\fB\-mno-uninit-const-in-rodata\fR" 4 +.IX Item "-mno-uninit-const-in-rodata" +.PD +When used together with \fB\-membedded-data\fR, it will always store uninitialized +const variables in the read-only data section. +.Ip "\fB\-msingle-float\fR" 4 +.IX Item "-msingle-float" +.PD 0 +.Ip "\fB\-mdouble-float\fR" 4 +.IX Item "-mdouble-float" +.PD +The \fB\-msingle-float\fR switch tells gcc to assume that the floating +point coprocessor only supports single precision operations, as on the +\&\fBr4650\fR chip. The \fB\-mdouble-float\fR switch permits gcc to use +double precision operations. This is the default. +.Ip "\fB\-mmad\fR" 4 +.IX Item "-mmad" +.PD 0 +.Ip "\fB\-mno-mad\fR" 4 +.IX Item "-mno-mad" +.PD +Permit use of the \fBmad\fR, \fBmadu\fR and \fBmul\fR instructions, +as on the \fBr4650\fR chip. +.Ip "\fB\-m4650\fR" 4 +.IX Item "-m4650" +Turns on \fB\-msingle-float\fR, \fB\-mmad\fR, and, at least for now, +\&\fB\-mcpu=r4650\fR. +.Ip "\fB\-mips16\fR" 4 +.IX Item "-mips16" +.PD 0 +.Ip "\fB\-mno-mips16\fR" 4 +.IX Item "-mno-mips16" +.PD +Enable 16\-bit instructions. +.Ip "\fB\-mentry\fR" 4 +.IX Item "-mentry" +Use the entry and exit pseudo ops. This option can only be used with +\&\fB\-mips16\fR. +.Ip "\fB\-EL\fR" 4 +.IX Item "-EL" +Compile code for the processor in little endian mode. +The requisite libraries are assumed to exist. +.Ip "\fB\-EB\fR" 4 +.IX Item "-EB" +Compile code for the processor in big endian mode. +The requisite libraries are assumed to exist. +.Ip "\fB\-G\fR \fInum\fR" 4 +.IX Item "-G num" +Put global and static items less than or equal to \fInum\fR bytes into +the small data or bss sections instead of the normal data or bss +section. This allows the assembler to emit one word memory reference +instructions based on the global pointer (\fIgp\fR or \fI$28\fR), +instead of the normal two words used. By default, \fInum\fR is 8 when +the \s-1MIPS\s0 assembler is used, and 0 when the \s-1GNU\s0 assembler is used. The +\&\fB\-G\fR \fInum\fR switch is also passed to the assembler and linker. +All modules should be compiled with the same \fB\-G\fR \fInum\fR +value. +.Ip "\fB\-nocpp\fR" 4 +.IX Item "-nocpp" +Tell the \s-1MIPS\s0 assembler to not run its preprocessor over user +assembler files (with a \fB.s\fR suffix) when assembling them. +.Ip "\fB\-mfix7000\fR" 4 +.IX Item "-mfix7000" +Pass an option to gas which will cause nops to be inserted if +the read of the destination register of an mfhi or mflo instruction +occurs in the following two instructions. +.Ip "\fB\-no-crt0\fR" 4 +.IX Item "-no-crt0" +Do not include the default crt0. +.Ip "\fB\-mflush-func=\fR\fIfunc\fR" 4 +.IX Item "-mflush-func=func" +.PD 0 +.Ip "\fB\-mno-flush-func\fR" 4 +.IX Item "-mno-flush-func" +.PD +Specifies the function to call to flush the I and D caches, or to not +call any such function. If called, the function must take the same +arguments as the common \f(CW\*(C`_flush_func()\*(C'\fR, that is, the address of the +memory range for which the cache is being flushed, the size of the +memory range, and the number 3 (to flush both caches). The default +depends on the target gcc was configured for, but commonly is either +\&\fB_flush_func\fR or \fB_\|_cpu_flush\fR. +.PP +These options are defined by the macro +\&\f(CW\*(C`TARGET_SWITCHES\*(C'\fR in the machine description. The default for the +options is also defined by that macro, which enables you to change the +defaults. +.PP +.I "Intel 386 and \s-1AMD\s0 x86\-64 Options" +.IX Subsection "Intel 386 and AMD x86-64 Options" +.PP +These \fB\-m\fR options are defined for the i386 and x86\-64 family of +computers: +.Ip "\fB\-mcpu=\fR\fIcpu-type\fR" 4 +.IX Item "-mcpu=cpu-type" +Tune to \fIcpu-type\fR everything applicable about the generated code, except +for the \s-1ABI\s0 and the set of available instructions. The choices for +\&\fIcpu-type\fR are \fBi386\fR, \fBi486\fR, \fBi586\fR, \fBi686\fR, +\&\fBpentium\fR, \fBpentium-mmx\fR, \fBpentiumpro\fR, \fBpentium2\fR, +\&\fBpentium3\fR, \fBpentium4\fR, \fBk6\fR, \fBk6\-2\fR, \fBk6\-3\fR, +\&\fBathlon\fR, \fBathlon-tbird\fR, \fBathlon-4\fR, \fBathlon-xp\fR +and \fBathlon-mp\fR. +.Sp +While picking a specific \fIcpu-type\fR will schedule things appropriately +for that particular chip, the compiler will not generate any code that +does not run on the i386 without the \fB\-march=\fR\fIcpu-type\fR option +being used. \fBi586\fR is equivalent to \fBpentium\fR and \fBi686\fR +is equivalent to \fBpentiumpro\fR. \fBk6\fR and \fBathlon\fR are the +\&\s-1AMD\s0 chips as opposed to the Intel ones. +.Ip "\fB\-march=\fR\fIcpu-type\fR" 4 +.IX Item "-march=cpu-type" +Generate instructions for the machine type \fIcpu-type\fR. The choices +for \fIcpu-type\fR are the same as for \fB\-mcpu\fR. Moreover, +specifying \fB\-march=\fR\fIcpu-type\fR implies \fB\-mcpu=\fR\fIcpu-type\fR. +.Ip "\fB\-m386\fR" 4 +.IX Item "-m386" +.PD 0 +.Ip "\fB\-m486\fR" 4 +.IX Item "-m486" +.Ip "\fB\-mpentium\fR" 4 +.IX Item "-mpentium" +.Ip "\fB\-mpentiumpro\fR" 4 +.IX Item "-mpentiumpro" +.PD +These options are synonyms for \fB\-mcpu=i386\fR, \fB\-mcpu=i486\fR, +\&\fB\-mcpu=pentium\fR, and \fB\-mcpu=pentiumpro\fR respectively. +These synonyms are deprecated. +.Ip "\fB\-mfpmath=\fR\fIunit\fR" 4 +.IX Item "-mfpmath=unit" +generate floating point arithmetics for selected unit \fIunit\fR. the choices +for \fIunit\fR are: +.RS 4 +.Ip "\fB387\fR" 4 +.IX Item "387" +Use the standard 387 floating point coprocessor present majority of chips and +emulated otherwise. Code compiled with this option will run almost everywhere. +The temporary results are computed in 80bit precesion instead of precision +specified by the type resulting in slightly different results compared to most +of other chips. See \fB\-ffloat-store\fR for more detailed description. +.Sp +This is the default choice for i386 compiler. +.Ip "\fBsse\fR" 4 +.IX Item "sse" +Use scalar floating point instructions present in the \s-1SSE\s0 instruction set. +This instruction set is supported by Pentium3 and newer chips, in the \s-1AMD\s0 line +by Athlon-4, Athlon-xp and Athlon-mp chips. The earlier version of \s-1SSE\s0 +instruction set supports only single precision arithmetics, thus the double and +extended precision arithmetics is still done using 387. Later version, present +only in Pentium4 and the future \s-1AMD\s0 x86\-64 chips supports double precision +arithmetics too. +.Sp +For i387 you need to use \fB\-march=\fR\fIcpu-type\fR, \fB\-msse\fR or +\&\fB\-msse2\fR switches to enable \s-1SSE\s0 extensions and make this option +effective. For x86\-64 compiler, these extensions are enabled by default. +.Sp +The resulting code should be considerably faster in majority of cases and avoid +the numerical instability problems of 387 code, but may break some existing +code that expects temporaries to be 80bit. +.Sp +This is the default choice for x86\-64 compiler. +.Ip "\fBsse,387\fR" 4 +.IX Item "sse,387" +Attempt to utilize both instruction sets at once. This effectivly double the +amount of available registers and on chips with separate execution units for +387 and \s-1SSE\s0 the execution resources too. Use this option with care, as it is +still experimental, because gcc register allocator does not model separate +functional units well resulting in instable performance. +.RE +.RS 4 +.RE +.Ip "\fB\-masm=\fR\fIdialect\fR" 4 +.IX Item "-masm=dialect" +Output asm instructions using selected \fIdialect\fR. Supported choices are +\&\fBintel\fR or \fBatt\fR (the default one). +.Ip "\fB\-mieee-fp\fR" 4 +.IX Item "-mieee-fp" +.PD 0 +.Ip "\fB\-mno-ieee-fp\fR" 4 +.IX Item "-mno-ieee-fp" +.PD +Control whether or not the compiler uses \s-1IEEE\s0 floating point +comparisons. These handle correctly the case where the result of a +comparison is unordered. +.Ip "\fB\-msoft-float\fR" 4 +.IX Item "-msoft-float" +Generate output containing library calls for floating point. +\&\fBWarning:\fR the requisite libraries are not part of \s-1GCC\s0. +Normally the facilities of the machine's usual C compiler are used, but +this can't be done directly in cross-compilation. You must make your +own arrangements to provide suitable library functions for +cross-compilation. +.Sp +On machines where a function returns floating point results in the 80387 +register stack, some floating point opcodes may be emitted even if +\&\fB\-msoft-float\fR is used. +.Ip "\fB\-mno-fp-ret-in-387\fR" 4 +.IX Item "-mno-fp-ret-in-387" +Do not use the \s-1FPU\s0 registers for return values of functions. +.Sp +The usual calling convention has functions return values of types +\&\f(CW\*(C`float\*(C'\fR and \f(CW\*(C`double\*(C'\fR in an \s-1FPU\s0 register, even if there +is no \s-1FPU\s0. The idea is that the operating system should emulate +an \s-1FPU\s0. +.Sp +The option \fB\-mno-fp-ret-in-387\fR causes such values to be returned +in ordinary \s-1CPU\s0 registers instead. +.Ip "\fB\-mno-fancy-math-387\fR" 4 +.IX Item "-mno-fancy-math-387" +Some 387 emulators do not support the \f(CW\*(C`sin\*(C'\fR, \f(CW\*(C`cos\*(C'\fR and +\&\f(CW\*(C`sqrt\*(C'\fR instructions for the 387. Specify this option to avoid +generating those instructions. This option is the default on FreeBSD, +OpenBSD and NetBSD. This option is overridden when \fB\-march\fR +indicates that the target cpu will always have an \s-1FPU\s0 and so the +instruction will not need emulation. As of revision 2.6.1, these +instructions are not generated unless you also use the +\&\fB\-funsafe-math-optimizations\fR switch. +.Ip "\fB\-malign-double\fR" 4 +.IX Item "-malign-double" +.PD 0 +.Ip "\fB\-mno-align-double\fR" 4 +.IX Item "-mno-align-double" +.PD +Control whether \s-1GCC\s0 aligns \f(CW\*(C`double\*(C'\fR, \f(CW\*(C`long double\*(C'\fR, and +\&\f(CW\*(C`long long\*(C'\fR variables on a two word boundary or a one word +boundary. Aligning \f(CW\*(C`double\*(C'\fR variables on a two word boundary will +produce code that runs somewhat faster on a \fBPentium\fR at the +expense of more memory. +.Sp +\&\fBWarning:\fR if you use the \fB\-malign-double\fR switch, +structures containing the above types will be aligned differently than +the published application binary interface specifications for the 386. +.Ip "\fB\-m128bit-long-double\fR" 4 +.IX Item "-m128bit-long-double" +Control the size of \f(CW\*(C`long double\*(C'\fR type. i386 application binary interface +specify the size to be 12 bytes, while modern architectures (Pentium and newer) +prefer \f(CW\*(C`long double\*(C'\fR aligned to 8 or 16 byte boundary. This is +impossible to reach with 12 byte long doubles in the array accesses. +.Sp +\&\fBWarning:\fR if you use the \fB\-m128bit-long-double\fR switch, the +structures and arrays containing \f(CW\*(C`long double\*(C'\fR will change their size as +well as function calling convention for function taking \f(CW\*(C`long double\*(C'\fR +will be modified. +.Ip "\fB\-m96bit-long-double\fR" 4 +.IX Item "-m96bit-long-double" +Set the size of \f(CW\*(C`long double\*(C'\fR to 96 bits as required by the i386 +application binary interface. This is the default. +.Ip "\fB\-msvr3\-shlib\fR" 4 +.IX Item "-msvr3-shlib" +.PD 0 +.Ip "\fB\-mno-svr3\-shlib\fR" 4 +.IX Item "-mno-svr3-shlib" +.PD +Control whether \s-1GCC\s0 places uninitialized local variables into the +\&\f(CW\*(C`bss\*(C'\fR or \f(CW\*(C`data\*(C'\fR segments. \fB\-msvr3\-shlib\fR places them +into \f(CW\*(C`bss\*(C'\fR. These options are meaningful only on System V Release 3. +.Ip "\fB\-mrtd\fR" 4 +.IX Item "-mrtd" +Use a different function-calling convention, in which functions that +take a fixed number of arguments return with the \f(CW\*(C`ret\*(C'\fR \fInum\fR +instruction, which pops their arguments while returning. This saves one +instruction in the caller since there is no need to pop the arguments +there. +.Sp +You can specify that an individual function is called with this calling +sequence with the function attribute \fBstdcall\fR. You can also +override the \fB\-mrtd\fR option by using the function attribute +\&\fBcdecl\fR. +.Sp +\&\fBWarning:\fR this calling convention is incompatible with the one +normally used on Unix, so you cannot use it if you need to call +libraries compiled with the Unix compiler. +.Sp +Also, you must provide function prototypes for all functions that +take variable numbers of arguments (including \f(CW\*(C`printf\*(C'\fR); +otherwise incorrect code will be generated for calls to those +functions. +.Sp +In addition, seriously incorrect code will result if you call a +function with too many arguments. (Normally, extra arguments are +harmlessly ignored.) +.Ip "\fB\-mregparm=\fR\fInum\fR" 4 +.IX Item "-mregparm=num" +Control how many registers are used to pass integer arguments. By +default, no registers are used to pass arguments, and at most 3 +registers can be used. You can control this behavior for a specific +function by using the function attribute \fBregparm\fR. +.Sp +\&\fBWarning:\fR if you use this switch, and +\&\fInum\fR is nonzero, then you must build all modules with the same +value, including any libraries. This includes the system libraries and +startup modules. +.Ip "\fB\-mpreferred-stack-boundary=\fR\fInum\fR" 4 +.IX Item "-mpreferred-stack-boundary=num" +Attempt to keep the stack boundary aligned to a 2 raised to \fInum\fR +byte boundary. If \fB\-mpreferred-stack-boundary\fR is not specified, +the default is 4 (16 bytes or 128 bits), except when optimizing for code +size (\fB\-Os\fR), in which case the default is the minimum correct +alignment (4 bytes for x86, and 8 bytes for x86\-64). +.Sp +On Pentium and PentiumPro, \f(CW\*(C`double\*(C'\fR and \f(CW\*(C`long double\*(C'\fR values +should be aligned to an 8 byte boundary (see \fB\-malign-double\fR) or +suffer significant run time performance penalties. On Pentium \s-1III\s0, the +Streaming \s-1SIMD\s0 Extension (\s-1SSE\s0) data type \f(CW\*(C`_\|_m128\*(C'\fR suffers similar +penalties if it is not 16 byte aligned. +.Sp +To ensure proper alignment of this values on the stack, the stack boundary +must be as aligned as that required by any value stored on the stack. +Further, every function must be generated such that it keeps the stack +aligned. Thus calling a function compiled with a higher preferred +stack boundary from a function compiled with a lower preferred stack +boundary will most likely misalign the stack. It is recommended that +libraries that use callbacks always use the default setting. +.Sp +This extra alignment does consume extra stack space, and generally +increases code size. Code that is sensitive to stack space usage, such +as embedded systems and operating system kernels, may want to reduce the +preferred alignment to \fB\-mpreferred-stack-boundary=2\fR. +.Ip "\fB\-mmmx\fR" 4 +.IX Item "-mmmx" +.PD 0 +.Ip "\fB\-mno-mmx\fR" 4 +.IX Item "-mno-mmx" +.Ip "\fB\-msse\fR" 4 +.IX Item "-msse" +.Ip "\fB\-mno-sse\fR" 4 +.IX Item "-mno-sse" +.Ip "\fB\-msse2\fR" 4 +.IX Item "-msse2" +.Ip "\fB\-mno-sse2\fR" 4 +.IX Item "-mno-sse2" +.Ip "\fB\-m3dnow\fR" 4 +.IX Item "-m3dnow" +.Ip "\fB\-mno-3dnow\fR" 4 +.IX Item "-mno-3dnow" +.PD +These switches enable or disable the use of built-in functions that allow +direct access to the \s-1MMX\s0, \s-1SSE\s0 and 3Dnow extensions of the instruction set. +.Sp +To have \s-1SSE/SSE2\s0 instructions generated automatically from floating-point code, +see \fB\-mfpmath=sse\fR. +.Ip "\fB\-mpush-args\fR" 4 +.IX Item "-mpush-args" +.PD 0 +.Ip "\fB\-mno-push-args\fR" 4 +.IX Item "-mno-push-args" +.PD +Use \s-1PUSH\s0 operations to store outgoing parameters. This method is shorter +and usually equally fast as method using \s-1SUB/MOV\s0 operations and is enabled +by default. In some cases disabling it may improve performance because of +improved scheduling and reduced dependencies. +.Ip "\fB\-maccumulate-outgoing-args\fR" 4 +.IX Item "-maccumulate-outgoing-args" +If enabled, the maximum amount of space required for outgoing arguments will be +computed in the function prologue. This is faster on most modern CPUs +because of reduced dependencies, improved scheduling and reduced stack usage +when preferred stack boundary is not equal to 2. The drawback is a notable +increase in code size. This switch implies \fB\-mno-push-args\fR. +.Ip "\fB\-mthreads\fR" 4 +.IX Item "-mthreads" +Support thread-safe exception handling on \fBMingw32\fR. Code that relies +on thread-safe exception handling must compile and link all code with the +\&\fB\-mthreads\fR option. When compiling, \fB\-mthreads\fR defines +\&\fB\-D_MT\fR; when linking, it links in a special thread helper library +\&\fB\-lmingwthrd\fR which cleans up per thread exception handling data. +.Ip "\fB\-mno-align-stringops\fR" 4 +.IX Item "-mno-align-stringops" +Do not align destination of inlined string operations. This switch reduces +code size and improves performance in case the destination is already aligned, +but gcc don't know about it. +.Ip "\fB\-minline-all-stringops\fR" 4 +.IX Item "-minline-all-stringops" +By default \s-1GCC\s0 inlines string operations only when destination is known to be +aligned at least to 4 byte boundary. This enables more inlining, increase code +size, but may improve performance of code that depends on fast memcpy, strlen +and memset for short lengths. +.Ip "\fB\-momit-leaf-frame-pointer\fR" 4 +.IX Item "-momit-leaf-frame-pointer" +Don't keep the frame pointer in a register for leaf functions. This +avoids the instructions to save, set up and restore frame pointers and +makes an extra register available in leaf functions. The option +\&\fB\-fomit-frame-pointer\fR removes the frame pointer for all functions +which might make debugging harder. +.PP +These \fB\-m\fR switches are supported in addition to the above +on \s-1AMD\s0 x86\-64 processors in 64\-bit environments. +.Ip "\fB\-m32\fR" 4 +.IX Item "-m32" +.PD 0 +.Ip "\fB\-m64\fR" 4 +.IX Item "-m64" +.PD +Generate code for a 32\-bit or 64\-bit environment. +The 32\-bit environment sets int, long and pointer to 32 bits and +generates code that runs on any i386 system. +The 64\-bit environment sets int to 32 bits and long and pointer +to 64 bits and generates code for \s-1AMD\s0's x86\-64 architecture. +.Ip "\fB\-mno-red-zone\fR" 4 +.IX Item "-mno-red-zone" +Do not use a so called red zone for x86\-64 code. The red zone is mandated +by the x86\-64 \s-1ABI\s0, it is a 128\-byte area beyond the location of the +stack pointer that will not be modified by signal or interrupt handlers +and therefore can be used for temporary data without adjusting the stack +pointer. The flag \fB\-mno-red-zone\fR disables this red zone. +.Ip "\fB\-mcmodel=small\fR" 4 +.IX Item "-mcmodel=small" +Generate code for the small code model: the program and its symbols must +be linked in the lower 2 \s-1GB\s0 of the address space. Pointers are 64 bits. +Programs can be statically or dynamically linked. This is the default +code model. +.Ip "\fB\-mcmodel=kernel\fR" 4 +.IX Item "-mcmodel=kernel" +Generate code for the kernel code model. The kernel runs in the +negative 2 \s-1GB\s0 of the address space. +This model has to be used for Linux kernel code. +.Ip "\fB\-mcmodel=medium\fR" 4 +.IX Item "-mcmodel=medium" +Generate code for the medium model: The program is linked in the lower 2 +\&\s-1GB\s0 of the address space but symbols can be located anywhere in the +address space. Programs can be statically or dynamically linked, but +building of shared libraries are not supported with the medium model. +.Ip "\fB\-mcmodel=large\fR" 4 +.IX Item "-mcmodel=large" +Generate code for the large model: This model makes no assumptions +about addresses and sizes of sections. Currently \s-1GCC\s0 does not implement +this model. +.PP +.I "\s-1HPPA\s0 Options" +.IX Subsection "HPPA Options" +.PP +These \fB\-m\fR options are defined for the \s-1HPPA\s0 family of computers: +.Ip "\fB\-march=\fR\fIarchitecture-type\fR" 4 +.IX Item "-march=architecture-type" +Generate code for the specified architecture. The choices for +\&\fIarchitecture-type\fR are \fB1.0\fR for \s-1PA\s0 1.0, \fB1.1\fR for \s-1PA\s0 +1.1, and \fB2.0\fR for \s-1PA\s0 2.0 processors. Refer to +\&\fI/usr/lib/sched.models\fR on an \s-1HP-UX\s0 system to determine the proper +architecture option for your machine. Code compiled for lower numbered +architectures will run on higher numbered architectures, but not the +other way around. +.Sp +\&\s-1PA\s0 2.0 support currently requires gas snapshot 19990413 or later. The +next release of binutils (current is 2.9.1) will probably contain \s-1PA\s0 2.0 +support. +.Ip "\fB\-mpa-risc-1\-0\fR" 4 +.IX Item "-mpa-risc-1-0" +.PD 0 +.Ip "\fB\-mpa-risc-1\-1\fR" 4 +.IX Item "-mpa-risc-1-1" +.Ip "\fB\-mpa-risc-2\-0\fR" 4 +.IX Item "-mpa-risc-2-0" +.PD +Synonyms for \fB\-march=1.0\fR, \fB\-march=1.1\fR, and \fB\-march=2.0\fR respectively. +.Ip "\fB\-mbig-switch\fR" 4 +.IX Item "-mbig-switch" +Generate code suitable for big switch tables. Use this option only if +the assembler/linker complain about out of range branches within a switch +table. +.Ip "\fB\-mjump-in-delay\fR" 4 +.IX Item "-mjump-in-delay" +Fill delay slots of function calls with unconditional jump instructions +by modifying the return pointer for the function call to be the target +of the conditional jump. +.Ip "\fB\-mdisable-fpregs\fR" 4 +.IX Item "-mdisable-fpregs" +Prevent floating point registers from being used in any manner. This is +necessary for compiling kernels which perform lazy context switching of +floating point registers. If you use this option and attempt to perform +floating point operations, the compiler will abort. +.Ip "\fB\-mdisable-indexing\fR" 4 +.IX Item "-mdisable-indexing" +Prevent the compiler from using indexing address modes. This avoids some +rather obscure problems when compiling \s-1MIG\s0 generated code under \s-1MACH\s0. +.Ip "\fB\-mno-space-regs\fR" 4 +.IX Item "-mno-space-regs" +Generate code that assumes the target has no space registers. This allows +\&\s-1GCC\s0 to generate faster indirect calls and use unscaled index address modes. +.Sp +Such code is suitable for level 0 \s-1PA\s0 systems and kernels. +.Ip "\fB\-mfast-indirect-calls\fR" 4 +.IX Item "-mfast-indirect-calls" +Generate code that assumes calls never cross space boundaries. This +allows \s-1GCC\s0 to emit code which performs faster indirect calls. +.Sp +This option will not work in the presence of shared libraries or nested +functions. +.Ip "\fB\-mlong-load-store\fR" 4 +.IX Item "-mlong-load-store" +Generate 3\-instruction load and store sequences as sometimes required by +the \s-1HP-UX\s0 10 linker. This is equivalent to the \fB+k\fR option to +the \s-1HP\s0 compilers. +.Ip "\fB\-mportable-runtime\fR" 4 +.IX Item "-mportable-runtime" +Use the portable calling conventions proposed by \s-1HP\s0 for \s-1ELF\s0 systems. +.Ip "\fB\-mgas\fR" 4 +.IX Item "-mgas" +Enable the use of assembler directives only \s-1GAS\s0 understands. +.Ip "\fB\-mschedule=\fR\fIcpu-type\fR" 4 +.IX Item "-mschedule=cpu-type" +Schedule code according to the constraints for the machine type +\&\fIcpu-type\fR. The choices for \fIcpu-type\fR are \fB700\fR +\&\fB7100\fR, \fB7100LC\fR, \fB7200\fR, and \fB8000\fR. Refer to +\&\fI/usr/lib/sched.models\fR on an \s-1HP-UX\s0 system to determine the +proper scheduling option for your machine. +.Ip "\fB\-mlinker-opt\fR" 4 +.IX Item "-mlinker-opt" +Enable the optimization pass in the \s-1HPUX\s0 linker. Note this makes symbolic +debugging impossible. It also triggers a bug in the \s-1HPUX\s0 8 and \s-1HPUX\s0 9 linkers +in which they give bogus error messages when linking some programs. +.Ip "\fB\-msoft-float\fR" 4 +.IX Item "-msoft-float" +Generate output containing library calls for floating point. +\&\fBWarning:\fR the requisite libraries are not available for all \s-1HPPA\s0 +targets. Normally the facilities of the machine's usual C compiler are +used, but this cannot be done directly in cross-compilation. You must make +your own arrangements to provide suitable library functions for +cross-compilation. The embedded target \fBhppa1.1\-*\-pro\fR +does provide software floating point support. +.Sp +\&\fB\-msoft-float\fR changes the calling convention in the output file; +therefore, it is only useful if you compile \fIall\fR of a program with +this option. In particular, you need to compile \fIlibgcc.a\fR, the +library that comes with \s-1GCC\s0, with \fB\-msoft-float\fR in order for +this to work. +.PP +.I "Intel 960 Options" +.IX Subsection "Intel 960 Options" +.PP +These \fB\-m\fR options are defined for the Intel 960 implementations: +.Ip "\fB\-m\fR\fIcpu-type\fR" 4 +.IX Item "-mcpu-type" +Assume the defaults for the machine type \fIcpu-type\fR for some of +the other options, including instruction scheduling, floating point +support, and addressing modes. The choices for \fIcpu-type\fR are +\&\fBka\fR, \fBkb\fR, \fBmc\fR, \fBca\fR, \fBcf\fR, +\&\fBsa\fR, and \fBsb\fR. +The default is +\&\fBkb\fR. +.Ip "\fB\-mnumerics\fR" 4 +.IX Item "-mnumerics" +.PD 0 +.Ip "\fB\-msoft-float\fR" 4 +.IX Item "-msoft-float" +.PD +The \fB\-mnumerics\fR option indicates that the processor does support +floating-point instructions. The \fB\-msoft-float\fR option indicates +that floating-point support should not be assumed. +.Ip "\fB\-mleaf-procedures\fR" 4 +.IX Item "-mleaf-procedures" +.PD 0 +.Ip "\fB\-mno-leaf-procedures\fR" 4 +.IX Item "-mno-leaf-procedures" +.PD +Do (or do not) attempt to alter leaf procedures to be callable with the +\&\f(CW\*(C`bal\*(C'\fR instruction as well as \f(CW\*(C`call\*(C'\fR. This will result in more +efficient code for explicit calls when the \f(CW\*(C`bal\*(C'\fR instruction can be +substituted by the assembler or linker, but less efficient code in other +cases, such as calls via function pointers, or using a linker that doesn't +support this optimization. +.Ip "\fB\-mtail-call\fR" 4 +.IX Item "-mtail-call" +.PD 0 +.Ip "\fB\-mno-tail-call\fR" 4 +.IX Item "-mno-tail-call" +.PD +Do (or do not) make additional attempts (beyond those of the +machine-independent portions of the compiler) to optimize tail-recursive +calls into branches. You may not want to do this because the detection of +cases where this is not valid is not totally complete. The default is +\&\fB\-mno-tail-call\fR. +.Ip "\fB\-mcomplex-addr\fR" 4 +.IX Item "-mcomplex-addr" +.PD 0 +.Ip "\fB\-mno-complex-addr\fR" 4 +.IX Item "-mno-complex-addr" +.PD +Assume (or do not assume) that the use of a complex addressing mode is a +win on this implementation of the i960. Complex addressing modes may not +be worthwhile on the K-series, but they definitely are on the C-series. +The default is currently \fB\-mcomplex-addr\fR for all processors except +the \s-1CB\s0 and \s-1CC\s0. +.Ip "\fB\-mcode-align\fR" 4 +.IX Item "-mcode-align" +.PD 0 +.Ip "\fB\-mno-code-align\fR" 4 +.IX Item "-mno-code-align" +.PD +Align code to 8\-byte boundaries for faster fetching (or don't bother). +Currently turned on by default for C-series implementations only. +.Ip "\fB\-mic-compat\fR" 4 +.IX Item "-mic-compat" +.PD 0 +.Ip "\fB\-mic2.0\-compat\fR" 4 +.IX Item "-mic2.0-compat" +.Ip "\fB\-mic3.0\-compat\fR" 4 +.IX Item "-mic3.0-compat" +.PD +Enable compatibility with iC960 v2.0 or v3.0. +.Ip "\fB\-masm-compat\fR" 4 +.IX Item "-masm-compat" +.PD 0 +.Ip "\fB\-mintel-asm\fR" 4 +.IX Item "-mintel-asm" +.PD +Enable compatibility with the iC960 assembler. +.Ip "\fB\-mstrict-align\fR" 4 +.IX Item "-mstrict-align" +.PD 0 +.Ip "\fB\-mno-strict-align\fR" 4 +.IX Item "-mno-strict-align" +.PD +Do not permit (do permit) unaligned accesses. +.Ip "\fB\-mold-align\fR" 4 +.IX Item "-mold-align" +Enable structure-alignment compatibility with Intel's gcc release version +1.3 (based on gcc 1.37). This option implies \fB\-mstrict-align\fR. +.Ip "\fB\-mlong-double-64\fR" 4 +.IX Item "-mlong-double-64" +Implement type \fBlong double\fR as 64\-bit floating point numbers. +Without the option \fBlong double\fR is implemented by 80\-bit +floating point numbers. The only reason we have it because there is +no 128\-bit \fBlong double\fR support in \fBfp-bit.c\fR yet. So it +is only useful for people using soft-float targets. Otherwise, we +should recommend against use of it. +.PP +.I "\s-1DEC\s0 Alpha Options" +.IX Subsection "DEC Alpha Options" +.PP +These \fB\-m\fR options are defined for the \s-1DEC\s0 Alpha implementations: +.Ip "\fB\-mno-soft-float\fR" 4 +.IX Item "-mno-soft-float" +.PD 0 +.Ip "\fB\-msoft-float\fR" 4 +.IX Item "-msoft-float" +.PD +Use (do not use) the hardware floating-point instructions for +floating-point operations. When \fB\-msoft-float\fR is specified, +functions in \fIlibgcc.a\fR will be used to perform floating-point +operations. Unless they are replaced by routines that emulate the +floating-point operations, or compiled in such a way as to call such +emulations routines, these routines will issue floating-point +operations. If you are compiling for an Alpha without floating-point +operations, you must ensure that the library is built so as not to call +them. +.Sp +Note that Alpha implementations without floating-point operations are +required to have floating-point registers. +.Ip "\fB\-mfp-reg\fR" 4 +.IX Item "-mfp-reg" +.PD 0 +.Ip "\fB\-mno-fp-regs\fR" 4 +.IX Item "-mno-fp-regs" +.PD +Generate code that uses (does not use) the floating-point register set. +\&\fB\-mno-fp-regs\fR implies \fB\-msoft-float\fR. If the floating-point +register set is not used, floating point operands are passed in integer +registers as if they were integers and floating-point results are passed +in \f(CW\*(C`$0\*(C'\fR instead of \f(CW\*(C`$f0\*(C'\fR. This is a non-standard calling sequence, +so any function with a floating-point argument or return value called by code +compiled with \fB\-mno-fp-regs\fR must also be compiled with that +option. +.Sp +A typical use of this option is building a kernel that does not use, +and hence need not save and restore, any floating-point registers. +.Ip "\fB\-mieee\fR" 4 +.IX Item "-mieee" +The Alpha architecture implements floating-point hardware optimized for +maximum performance. It is mostly compliant with the \s-1IEEE\s0 floating +point standard. However, for full compliance, software assistance is +required. This option generates code fully \s-1IEEE\s0 compliant code +\&\fIexcept\fR that the \fIinexact-flag\fR is not maintained (see below). +If this option is turned on, the preprocessor macro \f(CW\*(C`_IEEE_FP\*(C'\fR is +defined during compilation. The resulting code is less efficient but is +able to correctly support denormalized numbers and exceptional \s-1IEEE\s0 +values such as not-a-number and plus/minus infinity. Other Alpha +compilers call this option \fB\-ieee_with_no_inexact\fR. +.Ip "\fB\-mieee-with-inexact\fR" 4 +.IX Item "-mieee-with-inexact" +This is like \fB\-mieee\fR except the generated code also maintains +the \s-1IEEE\s0 \fIinexact-flag\fR. Turning on this option causes the +generated code to implement fully-compliant \s-1IEEE\s0 math. In addition to +\&\f(CW\*(C`_IEEE_FP\*(C'\fR, \f(CW\*(C`_IEEE_FP_EXACT\*(C'\fR is defined as a preprocessor +macro. On some Alpha implementations the resulting code may execute +significantly slower than the code generated by default. Since there is +very little code that depends on the \fIinexact-flag\fR, you should +normally not specify this option. Other Alpha compilers call this +option \fB\-ieee_with_inexact\fR. +.Ip "\fB\-mfp-trap-mode=\fR\fItrap-mode\fR" 4 +.IX Item "-mfp-trap-mode=trap-mode" +This option controls what floating-point related traps are enabled. +Other Alpha compilers call this option \fB\-fptm\fR \fItrap-mode\fR. +The trap mode can be set to one of four values: +.RS 4 +.Ip "\fBn\fR" 4 +.IX Item "n" +This is the default (normal) setting. The only traps that are enabled +are the ones that cannot be disabled in software (e.g., division by zero +trap). +.Ip "\fBu\fR" 4 +.IX Item "u" +In addition to the traps enabled by \fBn\fR, underflow traps are enabled +as well. +.Ip "\fBsu\fR" 4 +.IX Item "su" +Like \fBsu\fR, but the instructions are marked to be safe for software +completion (see Alpha architecture manual for details). +.Ip "\fBsui\fR" 4 +.IX Item "sui" +Like \fBsu\fR, but inexact traps are enabled as well. +.RE +.RS 4 +.RE +.Ip "\fB\-mfp-rounding-mode=\fR\fIrounding-mode\fR" 4 +.IX Item "-mfp-rounding-mode=rounding-mode" +Selects the \s-1IEEE\s0 rounding mode. Other Alpha compilers call this option +\&\fB\-fprm\fR \fIrounding-mode\fR. The \fIrounding-mode\fR can be one +of: +.RS 4 +.Ip "\fBn\fR" 4 +.IX Item "n" +Normal \s-1IEEE\s0 rounding mode. Floating point numbers are rounded towards +the nearest machine number or towards the even machine number in case +of a tie. +.Ip "\fBm\fR" 4 +.IX Item "m" +Round towards minus infinity. +.Ip "\fBc\fR" 4 +.IX Item "c" +Chopped rounding mode. Floating point numbers are rounded towards zero. +.Ip "\fBd\fR" 4 +.IX Item "d" +Dynamic rounding mode. A field in the floating point control register +(\fIfpcr\fR, see Alpha architecture reference manual) controls the +rounding mode in effect. The C library initializes this register for +rounding towards plus infinity. Thus, unless your program modifies the +\&\fIfpcr\fR, \fBd\fR corresponds to round towards plus infinity. +.RE +.RS 4 +.RE +.Ip "\fB\-mtrap-precision=\fR\fItrap-precision\fR" 4 +.IX Item "-mtrap-precision=trap-precision" +In the Alpha architecture, floating point traps are imprecise. This +means without software assistance it is impossible to recover from a +floating trap and program execution normally needs to be terminated. +\&\s-1GCC\s0 can generate code that can assist operating system trap handlers +in determining the exact location that caused a floating point trap. +Depending on the requirements of an application, different levels of +precisions can be selected: +.RS 4 +.Ip "\fBp\fR" 4 +.IX Item "p" +Program precision. This option is the default and means a trap handler +can only identify which program caused a floating point exception. +.Ip "\fBf\fR" 4 +.IX Item "f" +Function precision. The trap handler can determine the function that +caused a floating point exception. +.Ip "\fBi\fR" 4 +.IX Item "i" +Instruction precision. The trap handler can determine the exact +instruction that caused a floating point exception. +.RE +.RS 4 +.Sp +Other Alpha compilers provide the equivalent options called +\&\fB\-scope_safe\fR and \fB\-resumption_safe\fR. +.RE +.Ip "\fB\-mieee-conformant\fR" 4 +.IX Item "-mieee-conformant" +This option marks the generated code as \s-1IEEE\s0 conformant. You must not +use this option unless you also specify \fB\-mtrap-precision=i\fR and either +\&\fB\-mfp-trap-mode=su\fR or \fB\-mfp-trap-mode=sui\fR. Its only effect +is to emit the line \fB.eflag 48\fR in the function prologue of the +generated assembly file. Under \s-1DEC\s0 Unix, this has the effect that +IEEE-conformant math library routines will be linked in. +.Ip "\fB\-mbuild-constants\fR" 4 +.IX Item "-mbuild-constants" +Normally \s-1GCC\s0 examines a 32\- or 64\-bit integer constant to +see if it can construct it from smaller constants in two or three +instructions. If it cannot, it will output the constant as a literal and +generate code to load it from the data segment at runtime. +.Sp +Use this option to require \s-1GCC\s0 to construct \fIall\fR integer constants +using code, even if it takes more instructions (the maximum is six). +.Sp +You would typically use this option to build a shared library dynamic +loader. Itself a shared library, it must relocate itself in memory +before it can find the variables and constants in its own data segment. +.Ip "\fB\-malpha-as\fR" 4 +.IX Item "-malpha-as" +.PD 0 +.Ip "\fB\-mgas\fR" 4 +.IX Item "-mgas" +.PD +Select whether to generate code to be assembled by the vendor-supplied +assembler (\fB\-malpha-as\fR) or by the \s-1GNU\s0 assembler \fB\-mgas\fR. +.Ip "\fB\-mbwx\fR" 4 +.IX Item "-mbwx" +.PD 0 +.Ip "\fB\-mno-bwx\fR" 4 +.IX Item "-mno-bwx" +.Ip "\fB\-mcix\fR" 4 +.IX Item "-mcix" +.Ip "\fB\-mno-cix\fR" 4 +.IX Item "-mno-cix" +.Ip "\fB\-mfix\fR" 4 +.IX Item "-mfix" +.Ip "\fB\-mno-fix\fR" 4 +.IX Item "-mno-fix" +.Ip "\fB\-mmax\fR" 4 +.IX Item "-mmax" +.Ip "\fB\-mno-max\fR" 4 +.IX Item "-mno-max" +.PD +Indicate whether \s-1GCC\s0 should generate code to use the optional \s-1BWX\s0, +\&\s-1CIX\s0, \s-1FIX\s0 and \s-1MAX\s0 instruction sets. The default is to use the instruction +sets supported by the \s-1CPU\s0 type specified via \fB\-mcpu=\fR option or that +of the \s-1CPU\s0 on which \s-1GCC\s0 was built if none was specified. +.Ip "\fB\-mfloat-vax\fR" 4 +.IX Item "-mfloat-vax" +.PD 0 +.Ip "\fB\-mfloat-ieee\fR" 4 +.IX Item "-mfloat-ieee" +.PD +Generate code that uses (does not use) \s-1VAX\s0 F and G floating point +arithmetic instead of \s-1IEEE\s0 single and double precision. +.Ip "\fB\-mexplicit-relocs\fR" 4 +.IX Item "-mexplicit-relocs" +.PD 0 +.Ip "\fB\-mno-explicit-relocs\fR" 4 +.IX Item "-mno-explicit-relocs" +.PD +Older Alpha assemblers provided no way to generate symbol relocations +except via assembler macros. Use of these macros does not allow +optimial instruction scheduling. \s-1GNU\s0 binutils as of version 2.12 +supports a new syntax that allows the compiler to explicitly mark +which relocations should apply to which instructions. This option +is mostly useful for debugging, as \s-1GCC\s0 detects the capabilities of +the assembler when it is built and sets the default accordingly. +.Ip "\fB\-msmall-data\fR" 4 +.IX Item "-msmall-data" +.PD 0 +.Ip "\fB\-mlarge-data\fR" 4 +.IX Item "-mlarge-data" +.PD +When \fB\-mexplicit-relocs\fR is in effect, static data is +accessed via \fIgp-relative\fR relocations. When \fB\-msmall-data\fR +is used, objects 8 bytes long or smaller are placed in a \fIsmall data area\fR +(the \f(CW\*(C`.sdata\*(C'\fR and \f(CW\*(C`.sbss\*(C'\fR sections) and are accessed via +16\-bit relocations off of the \f(CW\*(C`$gp\*(C'\fR register. This limits the +size of the small data area to 64KB, but allows the variables to be +directly accessed via a single instruction. +.Sp +The default is \fB\-mlarge-data\fR. With this option the data area +is limited to just below 2GB. Programs that require more than 2GB of +data must use \f(CW\*(C`malloc\*(C'\fR or \f(CW\*(C`mmap\*(C'\fR to allocate the data in the +heap instead of in the program's data segment. +.Sp +When generating code for shared libraries, \fB\-fpic\fR implies +\&\fB\-msmall-data\fR and \fB\-fPIC\fR implies \fB\-mlarge-data\fR. +.Ip "\fB\-mcpu=\fR\fIcpu_type\fR" 4 +.IX Item "-mcpu=cpu_type" +Set the instruction set and instruction scheduling parameters for +machine type \fIcpu_type\fR. You can specify either the \fB\s-1EV\s0\fR +style name or the corresponding chip number. \s-1GCC\s0 supports scheduling +parameters for the \s-1EV4\s0, \s-1EV5\s0 and \s-1EV6\s0 family of processors and will +choose the default values for the instruction set from the processor +you specify. If you do not specify a processor type, \s-1GCC\s0 will default +to the processor on which the compiler was built. +.Sp +Supported values for \fIcpu_type\fR are +.RS 4 +.Ip "\fBev4\fR" 4 +.IX Item "ev4" +.PD 0 +.Ip "\fBev45\fR" 4 +.IX Item "ev45" +.Ip "\fB21064\fR" 4 +.IX Item "21064" +.PD +Schedules as an \s-1EV4\s0 and has no instruction set extensions. +.Ip "\fBev5\fR" 4 +.IX Item "ev5" +.PD 0 +.Ip "\fB21164\fR" 4 +.IX Item "21164" +.PD +Schedules as an \s-1EV5\s0 and has no instruction set extensions. +.Ip "\fBev56\fR" 4 +.IX Item "ev56" +.PD 0 +.Ip "\fB21164a\fR" 4 +.IX Item "21164a" +.PD +Schedules as an \s-1EV5\s0 and supports the \s-1BWX\s0 extension. +.Ip "\fBpca56\fR" 4 +.IX Item "pca56" +.PD 0 +.Ip "\fB21164pc\fR" 4 +.IX Item "21164pc" +.Ip "\fB21164PC\fR" 4 +.IX Item "21164PC" +.PD +Schedules as an \s-1EV5\s0 and supports the \s-1BWX\s0 and \s-1MAX\s0 extensions. +.Ip "\fBev6\fR" 4 +.IX Item "ev6" +.PD 0 +.Ip "\fB21264\fR" 4 +.IX Item "21264" +.PD +Schedules as an \s-1EV6\s0 and supports the \s-1BWX\s0, \s-1FIX\s0, and \s-1MAX\s0 extensions. +.Ip "\fBev67\fR" 4 +.IX Item "ev67" +.PD 0 +.Ip "\fB21264a\fR" 4 +.IX Item "21264a" +.PD +Schedules as an \s-1EV6\s0 and supports the \s-1BWX\s0, \s-1CIX\s0, \s-1FIX\s0, and \s-1MAX\s0 extensions. +.RE +.RS 4 +.RE +.Ip "\fB\-mtune=\fR\fIcpu_type\fR" 4 +.IX Item "-mtune=cpu_type" +Set only the instruction scheduling parameters for machine type +\&\fIcpu_type\fR. The instruction set is not changed. +.Ip "\fB\-mmemory-latency=\fR\fItime\fR" 4 +.IX Item "-mmemory-latency=time" +Sets the latency the scheduler should assume for typical memory +references as seen by the application. This number is highly +dependent on the memory access patterns used by the application +and the size of the external cache on the machine. +.Sp +Valid options for \fItime\fR are +.RS 4 +.Ip "\fInumber\fR" 4 +.IX Item "number" +A decimal number representing clock cycles. +.Ip "\fBL1\fR" 4 +.IX Item "L1" +.PD 0 +.Ip "\fBL2\fR" 4 +.IX Item "L2" +.Ip "\fBL3\fR" 4 +.IX Item "L3" +.Ip "\fBmain\fR" 4 +.IX Item "main" +.PD +The compiler contains estimates of the number of clock cycles for +``typical'' \s-1EV4\s0 & \s-1EV5\s0 hardware for the Level 1, 2 & 3 caches +(also called Dcache, Scache, and Bcache), as well as to main memory. +Note that L3 is only valid for \s-1EV5\s0. +.RE +.RS 4 +.RE +.PP +.I "\s-1DEC\s0 Alpha/VMS Options" +.IX Subsection "DEC Alpha/VMS Options" +.PP +These \fB\-m\fR options are defined for the \s-1DEC\s0 Alpha/VMS implementations: +.Ip "\fB\-mvms-return-codes\fR" 4 +.IX Item "-mvms-return-codes" +Return \s-1VMS\s0 condition codes from main. The default is to return \s-1POSIX\s0 +style condition (e.g. error) codes. +.PP +.I "Clipper Options" +.IX Subsection "Clipper Options" +.PP +These \fB\-m\fR options are defined for the Clipper implementations: +.Ip "\fB\-mc300\fR" 4 +.IX Item "-mc300" +Produce code for a C300 Clipper processor. This is the default. +.Ip "\fB\-mc400\fR" 4 +.IX Item "-mc400" +Produce code for a C400 Clipper processor, i.e. use floating point +registers f8\*(--f15. +.PP +.I "H8/300 Options" +.IX Subsection "H8/300 Options" +.PP +These \fB\-m\fR options are defined for the H8/300 implementations: +.Ip "\fB\-mrelax\fR" 4 +.IX Item "-mrelax" +Shorten some address references at link time, when possible; uses the +linker option \fB\-relax\fR. +.Ip "\fB\-mh\fR" 4 +.IX Item "-mh" +Generate code for the H8/300H. +.Ip "\fB\-ms\fR" 4 +.IX Item "-ms" +Generate code for the H8/S. +.Ip "\fB\-ms2600\fR" 4 +.IX Item "-ms2600" +Generate code for the H8/S2600. This switch must be used with \fB\-ms\fR. +.Ip "\fB\-mint32\fR" 4 +.IX Item "-mint32" +Make \f(CW\*(C`int\*(C'\fR data 32 bits by default. +.Ip "\fB\-malign-300\fR" 4 +.IX Item "-malign-300" +On the H8/300H and H8/S, use the same alignment rules as for the H8/300. +The default for the H8/300H and H8/S is to align longs and floats on 4 +byte boundaries. +\&\fB\-malign-300\fR causes them to be aligned on 2 byte boundaries. +This option has no effect on the H8/300. +.PP +.I "\s-1SH\s0 Options" +.IX Subsection "SH Options" +.PP +These \fB\-m\fR options are defined for the \s-1SH\s0 implementations: +.Ip "\fB\-m1\fR" 4 +.IX Item "-m1" +Generate code for the \s-1SH1\s0. +.Ip "\fB\-m2\fR" 4 +.IX Item "-m2" +Generate code for the \s-1SH2\s0. +.Ip "\fB\-m3\fR" 4 +.IX Item "-m3" +Generate code for the \s-1SH3\s0. +.Ip "\fB\-m3e\fR" 4 +.IX Item "-m3e" +Generate code for the SH3e. +.Ip "\fB\-m4\-nofpu\fR" 4 +.IX Item "-m4-nofpu" +Generate code for the \s-1SH4\s0 without a floating-point unit. +.Ip "\fB\-m4\-single-only\fR" 4 +.IX Item "-m4-single-only" +Generate code for the \s-1SH4\s0 with a floating-point unit that only +supports single-precision arithmetic. +.Ip "\fB\-m4\-single\fR" 4 +.IX Item "-m4-single" +Generate code for the \s-1SH4\s0 assuming the floating-point unit is in +single-precision mode by default. +.Ip "\fB\-m4\fR" 4 +.IX Item "-m4" +Generate code for the \s-1SH4\s0. +.Ip "\fB\-mb\fR" 4 +.IX Item "-mb" +Compile code for the processor in big endian mode. +.Ip "\fB\-ml\fR" 4 +.IX Item "-ml" +Compile code for the processor in little endian mode. +.Ip "\fB\-mdalign\fR" 4 +.IX Item "-mdalign" +Align doubles at 64\-bit boundaries. Note that this changes the calling +conventions, and thus some functions from the standard C library will +not work unless you recompile it first with \fB\-mdalign\fR. +.Ip "\fB\-mrelax\fR" 4 +.IX Item "-mrelax" +Shorten some address references at link time, when possible; uses the +linker option \fB\-relax\fR. +.Ip "\fB\-mbigtable\fR" 4 +.IX Item "-mbigtable" +Use 32\-bit offsets in \f(CW\*(C`switch\*(C'\fR tables. The default is to use +16\-bit offsets. +.Ip "\fB\-mfmovd\fR" 4 +.IX Item "-mfmovd" +Enable the use of the instruction \f(CW\*(C`fmovd\*(C'\fR. +.Ip "\fB\-mhitachi\fR" 4 +.IX Item "-mhitachi" +Comply with the calling conventions defined by Hitachi. +.Ip "\fB\-mnomacsave\fR" 4 +.IX Item "-mnomacsave" +Mark the \f(CW\*(C`MAC\*(C'\fR register as call-clobbered, even if +\&\fB\-mhitachi\fR is given. +.Ip "\fB\-mieee\fR" 4 +.IX Item "-mieee" +Increase IEEE-compliance of floating-point code. +.Ip "\fB\-misize\fR" 4 +.IX Item "-misize" +Dump instruction size and location in the assembly code. +.Ip "\fB\-mpadstruct\fR" 4 +.IX Item "-mpadstruct" +This option is deprecated. It pads structures to multiple of 4 bytes, +which is incompatible with the \s-1SH\s0 \s-1ABI\s0. +.Ip "\fB\-mspace\fR" 4 +.IX Item "-mspace" +Optimize for space instead of speed. Implied by \fB\-Os\fR. +.Ip "\fB\-mprefergot\fR" 4 +.IX Item "-mprefergot" +When generating position-independent code, emit function calls using +the Global Offset Table instead of the Procedure Linkage Table. +.Ip "\fB\-musermode\fR" 4 +.IX Item "-musermode" +Generate a library function call to invalidate instruction cache +entries, after fixing up a trampoline. This library function call +doesn't assume it can write to the whole memory address space. This +is the default when the target is \f(CW\*(C`sh\-*\-linux*\*(C'\fR. +.PP +.I "Options for System V" +.IX Subsection "Options for System V" +.PP +These additional options are available on System V Release 4 for +compatibility with other compilers on those systems: +.Ip "\fB\-G\fR" 4 +.IX Item "-G" +Create a shared object. +It is recommended that \fB\-symbolic\fR or \fB\-shared\fR be used instead. +.Ip "\fB\-Qy\fR" 4 +.IX Item "-Qy" +Identify the versions of each tool used by the compiler, in a +\&\f(CW\*(C`.ident\*(C'\fR assembler directive in the output. +.Ip "\fB\-Qn\fR" 4 +.IX Item "-Qn" +Refrain from adding \f(CW\*(C`.ident\*(C'\fR directives to the output file (this is +the default). +.Ip "\fB\-YP,\fR\fIdirs\fR" 4 +.IX Item "-YP,dirs" +Search the directories \fIdirs\fR, and no others, for libraries +specified with \fB\-l\fR. +.Ip "\fB\-Ym,\fR\fIdir\fR" 4 +.IX Item "-Ym,dir" +Look in the directory \fIdir\fR to find the M4 preprocessor. +The assembler uses this option. +.PP +.I "TMS320C3x/C4x Options" +.IX Subsection "TMS320C3x/C4x Options" +.PP +These \fB\-m\fR options are defined for TMS320C3x/C4x implementations: +.Ip "\fB\-mcpu=\fR\fIcpu_type\fR" 4 +.IX Item "-mcpu=cpu_type" +Set the instruction set, register set, and instruction scheduling +parameters for machine type \fIcpu_type\fR. Supported values for +\&\fIcpu_type\fR are \fBc30\fR, \fBc31\fR, \fBc32\fR, \fBc40\fR, and +\&\fBc44\fR. The default is \fBc40\fR to generate code for the +\&\s-1TMS320C40\s0. +.Ip "\fB\-mbig-memory\fR" 4 +.IX Item "-mbig-memory" +.PD 0 +.Ip "\fB\-mbig\fR" 4 +.IX Item "-mbig" +.Ip "\fB\-msmall-memory\fR" 4 +.IX Item "-msmall-memory" +.Ip "\fB\-msmall\fR" 4 +.IX Item "-msmall" +.PD +Generates code for the big or small memory model. The small memory +model assumed that all data fits into one 64K word page. At run-time +the data page (\s-1DP\s0) register must be set to point to the 64K page +containing the .bss and .data program sections. The big memory model is +the default and requires reloading of the \s-1DP\s0 register for every direct +memory access. +.Ip "\fB\-mbk\fR" 4 +.IX Item "-mbk" +.PD 0 +.Ip "\fB\-mno-bk\fR" 4 +.IX Item "-mno-bk" +.PD +Allow (disallow) allocation of general integer operands into the block +count register \s-1BK\s0. +.Ip "\fB\-mdb\fR" 4 +.IX Item "-mdb" +.PD 0 +.Ip "\fB\-mno-db\fR" 4 +.IX Item "-mno-db" +.PD +Enable (disable) generation of code using decrement and branch, +\&\fIDBcond\fR\|(D), instructions. This is enabled by default for the C4x. To be +on the safe side, this is disabled for the C3x, since the maximum +iteration count on the C3x is 2^{23 + 1} (but who iterates loops more than +2^{23} times on the C3x?). Note that \s-1GCC\s0 will try to reverse a loop so +that it can utilise the decrement and branch instruction, but will give +up if there is more than one memory reference in the loop. Thus a loop +where the loop counter is decremented can generate slightly more +efficient code, in cases where the \s-1RPTB\s0 instruction cannot be utilised. +.Ip "\fB\-mdp-isr-reload\fR" 4 +.IX Item "-mdp-isr-reload" +.PD 0 +.Ip "\fB\-mparanoid\fR" 4 +.IX Item "-mparanoid" +.PD +Force the \s-1DP\s0 register to be saved on entry to an interrupt service +routine (\s-1ISR\s0), reloaded to point to the data section, and restored on +exit from the \s-1ISR\s0. This should not be required unless someone has +violated the small memory model by modifying the \s-1DP\s0 register, say within +an object library. +.Ip "\fB\-mmpyi\fR" 4 +.IX Item "-mmpyi" +.PD 0 +.Ip "\fB\-mno-mpyi\fR" 4 +.IX Item "-mno-mpyi" +.PD +For the C3x use the 24\-bit \s-1MPYI\s0 instruction for integer multiplies +instead of a library call to guarantee 32\-bit results. Note that if one +of the operands is a constant, then the multiplication will be performed +using shifts and adds. If the \fB\-mmpyi\fR option is not specified for the C3x, +then squaring operations are performed inline instead of a library call. +.Ip "\fB\-mfast-fix\fR" 4 +.IX Item "-mfast-fix" +.PD 0 +.Ip "\fB\-mno-fast-fix\fR" 4 +.IX Item "-mno-fast-fix" +.PD +The C3x/C4x \s-1FIX\s0 instruction to convert a floating point value to an +integer value chooses the nearest integer less than or equal to the +floating point value rather than to the nearest integer. Thus if the +floating point number is negative, the result will be incorrectly +truncated an additional code is necessary to detect and correct this +case. This option can be used to disable generation of the additional +code required to correct the result. +.Ip "\fB\-mrptb\fR" 4 +.IX Item "-mrptb" +.PD 0 +.Ip "\fB\-mno-rptb\fR" 4 +.IX Item "-mno-rptb" +.PD +Enable (disable) generation of repeat block sequences using the \s-1RPTB\s0 +instruction for zero overhead looping. The \s-1RPTB\s0 construct is only used +for innermost loops that do not call functions or jump across the loop +boundaries. There is no advantage having nested \s-1RPTB\s0 loops due to the +overhead required to save and restore the \s-1RC\s0, \s-1RS\s0, and \s-1RE\s0 registers. +This is enabled by default with \fB\-O2\fR. +.Ip "\fB\-mrpts=\fR\fIcount\fR" 4 +.IX Item "-mrpts=count" +.PD 0 +.Ip "\fB\-mno-rpts\fR" 4 +.IX Item "-mno-rpts" +.PD +Enable (disable) the use of the single instruction repeat instruction +\&\s-1RPTS\s0. If a repeat block contains a single instruction, and the loop +count can be guaranteed to be less than the value \fIcount\fR, \s-1GCC\s0 will +emit a \s-1RPTS\s0 instruction instead of a \s-1RPTB\s0. If no value is specified, +then a \s-1RPTS\s0 will be emitted even if the loop count cannot be determined +at compile time. Note that the repeated instruction following \s-1RPTS\s0 does +not have to be reloaded from memory each iteration, thus freeing up the +\&\s-1CPU\s0 buses for operands. However, since interrupts are blocked by this +instruction, it is disabled by default. +.Ip "\fB\-mloop-unsigned\fR" 4 +.IX Item "-mloop-unsigned" +.PD 0 +.Ip "\fB\-mno-loop-unsigned\fR" 4 +.IX Item "-mno-loop-unsigned" +.PD +The maximum iteration count when using \s-1RPTS\s0 and \s-1RPTB\s0 (and \s-1DB\s0 on the C40) +is 2^{31 + 1} since these instructions test if the iteration count is +negative to terminate the loop. If the iteration count is unsigned +there is a possibility than the 2^{31 + 1} maximum iteration count may be +exceeded. This switch allows an unsigned iteration count. +.Ip "\fB\-mti\fR" 4 +.IX Item "-mti" +Try to emit an assembler syntax that the \s-1TI\s0 assembler (asm30) is happy +with. This also enforces compatibility with the \s-1API\s0 employed by the \s-1TI\s0 +C3x C compiler. For example, long doubles are passed as structures +rather than in floating point registers. +.Ip "\fB\-mregparm\fR" 4 +.IX Item "-mregparm" +.PD 0 +.Ip "\fB\-mmemparm\fR" 4 +.IX Item "-mmemparm" +.PD +Generate code that uses registers (stack) for passing arguments to functions. +By default, arguments are passed in registers where possible rather +than by pushing arguments on to the stack. +.Ip "\fB\-mparallel-insns\fR" 4 +.IX Item "-mparallel-insns" +.PD 0 +.Ip "\fB\-mno-parallel-insns\fR" 4 +.IX Item "-mno-parallel-insns" +.PD +Allow the generation of parallel instructions. This is enabled by +default with \fB\-O2\fR. +.Ip "\fB\-mparallel-mpy\fR" 4 +.IX Item "-mparallel-mpy" +.PD 0 +.Ip "\fB\-mno-parallel-mpy\fR" 4 +.IX Item "-mno-parallel-mpy" +.PD +Allow the generation of MPY||ADD and MPY||SUB parallel instructions, +provided \fB\-mparallel-insns\fR is also specified. These instructions have +tight register constraints which can pessimize the code generation +of large functions. +.PP +.I "V850 Options" +.IX Subsection "V850 Options" +.PP +These \fB\-m\fR options are defined for V850 implementations: +.Ip "\fB\-mlong-calls\fR" 4 +.IX Item "-mlong-calls" +.PD 0 +.Ip "\fB\-mno-long-calls\fR" 4 +.IX Item "-mno-long-calls" +.PD +Treat all calls as being far away (near). If calls are assumed to be +far away, the compiler will always load the functions address up into a +register, and call indirect through the pointer. +.Ip "\fB\-mno-ep\fR" 4 +.IX Item "-mno-ep" +.PD 0 +.Ip "\fB\-mep\fR" 4 +.IX Item "-mep" +.PD +Do not optimize (do optimize) basic blocks that use the same index +pointer 4 or more times to copy pointer into the \f(CW\*(C`ep\*(C'\fR register, and +use the shorter \f(CW\*(C`sld\*(C'\fR and \f(CW\*(C`sst\*(C'\fR instructions. The \fB\-mep\fR +option is on by default if you optimize. +.Ip "\fB\-mno-prolog-function\fR" 4 +.IX Item "-mno-prolog-function" +.PD 0 +.Ip "\fB\-mprolog-function\fR" 4 +.IX Item "-mprolog-function" +.PD +Do not use (do use) external functions to save and restore registers at +the prolog and epilog of a function. The external functions are slower, +but use less code space if more than one function saves the same number +of registers. The \fB\-mprolog-function\fR option is on by default if +you optimize. +.Ip "\fB\-mspace\fR" 4 +.IX Item "-mspace" +Try to make the code as small as possible. At present, this just turns +on the \fB\-mep\fR and \fB\-mprolog-function\fR options. +.Ip "\fB\-mtda=\fR\fIn\fR" 4 +.IX Item "-mtda=n" +Put static or global variables whose size is \fIn\fR bytes or less into +the tiny data area that register \f(CW\*(C`ep\*(C'\fR points to. The tiny data +area can hold up to 256 bytes in total (128 bytes for byte references). +.Ip "\fB\-msda=\fR\fIn\fR" 4 +.IX Item "-msda=n" +Put static or global variables whose size is \fIn\fR bytes or less into +the small data area that register \f(CW\*(C`gp\*(C'\fR points to. The small data +area can hold up to 64 kilobytes. +.Ip "\fB\-mzda=\fR\fIn\fR" 4 +.IX Item "-mzda=n" +Put static or global variables whose size is \fIn\fR bytes or less into +the first 32 kilobytes of memory. +.Ip "\fB\-mv850\fR" 4 +.IX Item "-mv850" +Specify that the target processor is the V850. +.Ip "\fB\-mbig-switch\fR" 4 +.IX Item "-mbig-switch" +Generate code suitable for big switch tables. Use this option only if +the assembler/linker complain about out of range branches within a switch +table. +.PP +.I "\s-1ARC\s0 Options" +.IX Subsection "ARC Options" +.PP +These options are defined for \s-1ARC\s0 implementations: +.Ip "\fB\-EL\fR" 4 +.IX Item "-EL" +Compile code for little endian mode. This is the default. +.Ip "\fB\-EB\fR" 4 +.IX Item "-EB" +Compile code for big endian mode. +.Ip "\fB\-mmangle-cpu\fR" 4 +.IX Item "-mmangle-cpu" +Prepend the name of the cpu to all public symbol names. +In multiple-processor systems, there are many \s-1ARC\s0 variants with different +instruction and register set characteristics. This flag prevents code +compiled for one cpu to be linked with code compiled for another. +No facility exists for handling variants that are ``almost identical''. +This is an all or nothing option. +.Ip "\fB\-mcpu=\fR\fIcpu\fR" 4 +.IX Item "-mcpu=cpu" +Compile code for \s-1ARC\s0 variant \fIcpu\fR. +Which variants are supported depend on the configuration. +All variants support \fB\-mcpu=base\fR, this is the default. +.Ip "\fB\-mtext=\fR\fItext-section\fR" 4 +.IX Item "-mtext=text-section" +.PD 0 +.Ip "\fB\-mdata=\fR\fIdata-section\fR" 4 +.IX Item "-mdata=data-section" +.Ip "\fB\-mrodata=\fR\fIreadonly-data-section\fR" 4 +.IX Item "-mrodata=readonly-data-section" +.PD +Put functions, data, and readonly data in \fItext-section\fR, +\&\fIdata-section\fR, and \fIreadonly-data-section\fR respectively +by default. This can be overridden with the \f(CW\*(C`section\*(C'\fR attribute. +.PP +.I "\s-1NS32K\s0 Options" +.IX Subsection "NS32K Options" +.PP +These are the \fB\-m\fR options defined for the 32000 series. The default +values for these options depends on which style of 32000 was selected when +the compiler was configured; the defaults for the most common choices are +given below. +.Ip "\fB\-m32032\fR" 4 +.IX Item "-m32032" +.PD 0 +.Ip "\fB\-m32032\fR" 4 +.IX Item "-m32032" +.PD +Generate output for a 32032. This is the default +when the compiler is configured for 32032 and 32016 based systems. +.Ip "\fB\-m32332\fR" 4 +.IX Item "-m32332" +.PD 0 +.Ip "\fB\-m32332\fR" 4 +.IX Item "-m32332" +.PD +Generate output for a 32332. This is the default +when the compiler is configured for 32332\-based systems. +.Ip "\fB\-m32532\fR" 4 +.IX Item "-m32532" +.PD 0 +.Ip "\fB\-m32532\fR" 4 +.IX Item "-m32532" +.PD +Generate output for a 32532. This is the default +when the compiler is configured for 32532\-based systems. +.Ip "\fB\-m32081\fR" 4 +.IX Item "-m32081" +Generate output containing 32081 instructions for floating point. +This is the default for all systems. +.Ip "\fB\-m32381\fR" 4 +.IX Item "-m32381" +Generate output containing 32381 instructions for floating point. This +also implies \fB\-m32081\fR. The 32381 is only compatible with the 32332 +and 32532 cpus. This is the default for the pc532\-netbsd configuration. +.Ip "\fB\-mmulti-add\fR" 4 +.IX Item "-mmulti-add" +Try and generate multiply-add floating point instructions \f(CW\*(C`polyF\*(C'\fR +and \f(CW\*(C`dotF\*(C'\fR. This option is only available if the \fB\-m32381\fR +option is in effect. Using these instructions requires changes to +register allocation which generally has a negative impact on +performance. This option should only be enabled when compiling code +particularly likely to make heavy use of multiply-add instructions. +.Ip "\fB\-mnomulti-add\fR" 4 +.IX Item "-mnomulti-add" +Do not try and generate multiply-add floating point instructions +\&\f(CW\*(C`polyF\*(C'\fR and \f(CW\*(C`dotF\*(C'\fR. This is the default on all platforms. +.Ip "\fB\-msoft-float\fR" 4 +.IX Item "-msoft-float" +Generate output containing library calls for floating point. +\&\fBWarning:\fR the requisite libraries may not be available. +.Ip "\fB\-mnobitfield\fR" 4 +.IX Item "-mnobitfield" +Do not use the bit-field instructions. On some machines it is faster to +use shifting and masking operations. This is the default for the pc532. +.Ip "\fB\-mbitfield\fR" 4 +.IX Item "-mbitfield" +Do use the bit-field instructions. This is the default for all platforms +except the pc532. +.Ip "\fB\-mrtd\fR" 4 +.IX Item "-mrtd" +Use a different function-calling convention, in which functions +that take a fixed number of arguments return pop their +arguments on return with the \f(CW\*(C`ret\*(C'\fR instruction. +.Sp +This calling convention is incompatible with the one normally +used on Unix, so you cannot use it if you need to call libraries +compiled with the Unix compiler. +.Sp +Also, you must provide function prototypes for all functions that +take variable numbers of arguments (including \f(CW\*(C`printf\*(C'\fR); +otherwise incorrect code will be generated for calls to those +functions. +.Sp +In addition, seriously incorrect code will result if you call a +function with too many arguments. (Normally, extra arguments are +harmlessly ignored.) +.Sp +This option takes its name from the 680x0 \f(CW\*(C`rtd\*(C'\fR instruction. +.Ip "\fB\-mregparam\fR" 4 +.IX Item "-mregparam" +Use a different function-calling convention where the first two arguments +are passed in registers. +.Sp +This calling convention is incompatible with the one normally +used on Unix, so you cannot use it if you need to call libraries +compiled with the Unix compiler. +.Ip "\fB\-mnoregparam\fR" 4 +.IX Item "-mnoregparam" +Do not pass any arguments in registers. This is the default for all +targets. +.Ip "\fB\-msb\fR" 4 +.IX Item "-msb" +It is \s-1OK\s0 to use the sb as an index register which is always loaded with +zero. This is the default for the pc532\-netbsd target. +.Ip "\fB\-mnosb\fR" 4 +.IX Item "-mnosb" +The sb register is not available for use or has not been initialized to +zero by the run time system. This is the default for all targets except +the pc532\-netbsd. It is also implied whenever \fB\-mhimem\fR or +\&\fB\-fpic\fR is set. +.Ip "\fB\-mhimem\fR" 4 +.IX Item "-mhimem" +Many ns32000 series addressing modes use displacements of up to 512MB. +If an address is above 512MB then displacements from zero can not be used. +This option causes code to be generated which can be loaded above 512MB. +This may be useful for operating systems or \s-1ROM\s0 code. +.Ip "\fB\-mnohimem\fR" 4 +.IX Item "-mnohimem" +Assume code will be loaded in the first 512MB of virtual address space. +This is the default for all platforms. +.PP +.I "\s-1AVR\s0 Options" +.IX Subsection "AVR Options" +.PP +These options are defined for \s-1AVR\s0 implementations: +.Ip "\fB\-mmcu=\fR\fImcu\fR" 4 +.IX Item "-mmcu=mcu" +Specify \s-1ATMEL\s0 \s-1AVR\s0 instruction set or \s-1MCU\s0 type. +.Sp +Instruction set avr1 is for the minimal \s-1AVR\s0 core, not supported by the C +compiler, only for assembler programs (\s-1MCU\s0 types: at90s1200, attiny10, +attiny11, attiny12, attiny15, attiny28). +.Sp +Instruction set avr2 (default) is for the classic \s-1AVR\s0 core with up to +8K program memory space (\s-1MCU\s0 types: at90s2313, at90s2323, attiny22, +at90s2333, at90s2343, at90s4414, at90s4433, at90s4434, at90s8515, +at90c8534, at90s8535). +.Sp +Instruction set avr3 is for the classic \s-1AVR\s0 core with up to 128K program +memory space (\s-1MCU\s0 types: atmega103, atmega603, at43usb320, at76c711). +.Sp +Instruction set avr4 is for the enhanced \s-1AVR\s0 core with up to 8K program +memory space (\s-1MCU\s0 types: atmega8, atmega83, atmega85). +.Sp +Instruction set avr5 is for the enhanced \s-1AVR\s0 core with up to 128K program +memory space (\s-1MCU\s0 types: atmega16, atmega161, atmega163, atmega32, atmega323, +atmega64, atmega128, at43usb355, at94k). +.Ip "\fB\-msize\fR" 4 +.IX Item "-msize" +Output instruction sizes to the asm file. +.Ip "\fB\-minit-stack=\fR\fIN\fR" 4 +.IX Item "-minit-stack=N" +Specify the initial stack address, which may be a symbol or numeric value, +\&\fB_\|_stack\fR is the default. +.Ip "\fB\-mno-interrupts\fR" 4 +.IX Item "-mno-interrupts" +Generated code is not compatible with hardware interrupts. +Code size will be smaller. +.Ip "\fB\-mcall-prologues\fR" 4 +.IX Item "-mcall-prologues" +Functions prologues/epilogues expanded as call to appropriate +subroutines. Code size will be smaller. +.Ip "\fB\-mno-tablejump\fR" 4 +.IX Item "-mno-tablejump" +Do not generate tablejump insns which sometimes increase code size. +.Ip "\fB\-mtiny-stack\fR" 4 +.IX Item "-mtiny-stack" +Change only the low 8 bits of the stack pointer. +.PP +.I "MCore Options" +.IX Subsection "MCore Options" +.PP +These are the \fB\-m\fR options defined for the Motorola M*Core +processors. +.Ip "\fB\-mhardlit\fR" 4 +.IX Item "-mhardlit" +.PD 0 +.Ip "\fB\-mhardlit\fR" 4 +.IX Item "-mhardlit" +.Ip "\fB\-mno-hardlit\fR" 4 +.IX Item "-mno-hardlit" +.PD +Inline constants into the code stream if it can be done in two +instructions or less. +.Ip "\fB\-mdiv\fR" 4 +.IX Item "-mdiv" +.PD 0 +.Ip "\fB\-mdiv\fR" 4 +.IX Item "-mdiv" +.Ip "\fB\-mno-div\fR" 4 +.IX Item "-mno-div" +.PD +Use the divide instruction. (Enabled by default). +.Ip "\fB\-mrelax-immediate\fR" 4 +.IX Item "-mrelax-immediate" +.PD 0 +.Ip "\fB\-mrelax-immediate\fR" 4 +.IX Item "-mrelax-immediate" +.Ip "\fB\-mno-relax-immediate\fR" 4 +.IX Item "-mno-relax-immediate" +.PD +Allow arbitrary sized immediates in bit operations. +.Ip "\fB\-mwide-bitfields\fR" 4 +.IX Item "-mwide-bitfields" +.PD 0 +.Ip "\fB\-mwide-bitfields\fR" 4 +.IX Item "-mwide-bitfields" +.Ip "\fB\-mno-wide-bitfields\fR" 4 +.IX Item "-mno-wide-bitfields" +.PD +Always treat bit-fields as int-sized. +.Ip "\fB\-m4byte-functions\fR" 4 +.IX Item "-m4byte-functions" +.PD 0 +.Ip "\fB\-m4byte-functions\fR" 4 +.IX Item "-m4byte-functions" +.Ip "\fB\-mno-4byte-functions\fR" 4 +.IX Item "-mno-4byte-functions" +.PD +Force all functions to be aligned to a four byte boundary. +.Ip "\fB\-mcallgraph-data\fR" 4 +.IX Item "-mcallgraph-data" +.PD 0 +.Ip "\fB\-mcallgraph-data\fR" 4 +.IX Item "-mcallgraph-data" +.Ip "\fB\-mno-callgraph-data\fR" 4 +.IX Item "-mno-callgraph-data" +.PD +Emit callgraph information. +.Ip "\fB\-mslow-bytes\fR" 4 +.IX Item "-mslow-bytes" +.PD 0 +.Ip "\fB\-mslow-bytes\fR" 4 +.IX Item "-mslow-bytes" +.Ip "\fB\-mno-slow-bytes\fR" 4 +.IX Item "-mno-slow-bytes" +.PD +Prefer word access when reading byte quantities. +.Ip "\fB\-mlittle-endian\fR" 4 +.IX Item "-mlittle-endian" +.PD 0 +.Ip "\fB\-mlittle-endian\fR" 4 +.IX Item "-mlittle-endian" +.Ip "\fB\-mbig-endian\fR" 4 +.IX Item "-mbig-endian" +.PD +Generate code for a little endian target. +.Ip "\fB\-m210\fR" 4 +.IX Item "-m210" +.PD 0 +.Ip "\fB\-m210\fR" 4 +.IX Item "-m210" +.Ip "\fB\-m340\fR" 4 +.IX Item "-m340" +.PD +Generate code for the 210 processor. +.PP +.I "\s-1IA-64\s0 Options" +.IX Subsection "IA-64 Options" +.PP +These are the \fB\-m\fR options defined for the Intel \s-1IA-64\s0 architecture. +.Ip "\fB\-mbig-endian\fR" 4 +.IX Item "-mbig-endian" +Generate code for a big endian target. This is the default for \s-1HPUX\s0. +.Ip "\fB\-mlittle-endian\fR" 4 +.IX Item "-mlittle-endian" +Generate code for a little endian target. This is the default for \s-1AIX5\s0 +and Linux. +.Ip "\fB\-mgnu-as\fR" 4 +.IX Item "-mgnu-as" +.PD 0 +.Ip "\fB\-mno-gnu-as\fR" 4 +.IX Item "-mno-gnu-as" +.PD +Generate (or don't) code for the \s-1GNU\s0 assembler. This is the default. +.Ip "\fB\-mgnu-ld\fR" 4 +.IX Item "-mgnu-ld" +.PD 0 +.Ip "\fB\-mno-gnu-ld\fR" 4 +.IX Item "-mno-gnu-ld" +.PD +Generate (or don't) code for the \s-1GNU\s0 linker. This is the default. +.Ip "\fB\-mno-pic\fR" 4 +.IX Item "-mno-pic" +Generate code that does not use a global pointer register. The result +is not position independent code, and violates the \s-1IA-64\s0 \s-1ABI\s0. +.Ip "\fB\-mvolatile-asm-stop\fR" 4 +.IX Item "-mvolatile-asm-stop" +.PD 0 +.Ip "\fB\-mno-volatile-asm-stop\fR" 4 +.IX Item "-mno-volatile-asm-stop" +.PD +Generate (or don't) a stop bit immediately before and after volatile asm +statements. +.Ip "\fB\-mb-step\fR" 4 +.IX Item "-mb-step" +Generate code that works around Itanium B step errata. +.Ip "\fB\-mregister-names\fR" 4 +.IX Item "-mregister-names" +.PD 0 +.Ip "\fB\-mno-register-names\fR" 4 +.IX Item "-mno-register-names" +.PD +Generate (or don't) \fBin\fR, \fBloc\fR, and \fBout\fR register names for +the stacked registers. This may make assembler output more readable. +.Ip "\fB\-mno-sdata\fR" 4 +.IX Item "-mno-sdata" +.PD 0 +.Ip "\fB\-msdata\fR" 4 +.IX Item "-msdata" +.PD +Disable (or enable) optimizations that use the small data section. This may +be useful for working around optimizer bugs. +.Ip "\fB\-mconstant-gp\fR" 4 +.IX Item "-mconstant-gp" +Generate code that uses a single constant global pointer value. This is +useful when compiling kernel code. +.Ip "\fB\-mauto-pic\fR" 4 +.IX Item "-mauto-pic" +Generate code that is self-relocatable. This implies \fB\-mconstant-gp\fR. +This is useful when compiling firmware code. +.Ip "\fB\-minline-divide-min-latency\fR" 4 +.IX Item "-minline-divide-min-latency" +Generate code for inline divides using the minimum latency algorithm. +.Ip "\fB\-minline-divide-max-throughput\fR" 4 +.IX Item "-minline-divide-max-throughput" +Generate code for inline divides using the maximum throughput algorithm. +.Ip "\fB\-mno-dwarf2\-asm\fR" 4 +.IX Item "-mno-dwarf2-asm" +.PD 0 +.Ip "\fB\-mdwarf2\-asm\fR" 4 +.IX Item "-mdwarf2-asm" +.PD +Don't (or do) generate assembler code for the \s-1DWARF2\s0 line number debugging +info. This may be useful when not using the \s-1GNU\s0 assembler. +.Ip "\fB\-mfixed-range=\fR\fIregister-range\fR" 4 +.IX Item "-mfixed-range=register-range" +Generate code treating the given register range as fixed registers. +A fixed register is one that the register allocator can not use. This is +useful when compiling kernel code. A register range is specified as +two registers separated by a dash. Multiple register ranges can be +specified separated by a comma. +.PP +.I "D30V Options" +.IX Subsection "D30V Options" +.PP +These \fB\-m\fR options are defined for D30V implementations: +.Ip "\fB\-mextmem\fR" 4 +.IX Item "-mextmem" +Link the \fB.text\fR, \fB.data\fR, \fB.bss\fR, \fB.strings\fR, +\&\fB.rodata\fR, \fB.rodata1\fR, \fB.data1\fR sections into external +memory, which starts at location \f(CW\*(C`0x80000000\*(C'\fR. +.Ip "\fB\-mextmemory\fR" 4 +.IX Item "-mextmemory" +Same as the \fB\-mextmem\fR switch. +.Ip "\fB\-monchip\fR" 4 +.IX Item "-monchip" +Link the \fB.text\fR section into onchip text memory, which starts at +location \f(CW\*(C`0x0\*(C'\fR. Also link \fB.data\fR, \fB.bss\fR, +\&\fB.strings\fR, \fB.rodata\fR, \fB.rodata1\fR, \fB.data1\fR sections +into onchip data memory, which starts at location \f(CW\*(C`0x20000000\*(C'\fR. +.Ip "\fB\-mno-asm-optimize\fR" 4 +.IX Item "-mno-asm-optimize" +.PD 0 +.Ip "\fB\-masm-optimize\fR" 4 +.IX Item "-masm-optimize" +.PD +Disable (enable) passing \fB\-O\fR to the assembler when optimizing. +The assembler uses the \fB\-O\fR option to automatically parallelize +adjacent short instructions where possible. +.Ip "\fB\-mbranch-cost=\fR\fIn\fR" 4 +.IX Item "-mbranch-cost=n" +Increase the internal costs of branches to \fIn\fR. Higher costs means +that the compiler will issue more instructions to avoid doing a branch. +The default is 2. +.Ip "\fB\-mcond-exec=\fR\fIn\fR" 4 +.IX Item "-mcond-exec=n" +Specify the maximum number of conditionally executed instructions that +replace a branch. The default is 4. +.PP +.I "S/390 and zSeries Options" +.IX Subsection "S/390 and zSeries Options" +.PP +These are the \fB\-m\fR options defined for the S/390 and zSeries architecture. +.Ip "\fB\-mhard-float\fR" 4 +.IX Item "-mhard-float" +.PD 0 +.Ip "\fB\-msoft-float\fR" 4 +.IX Item "-msoft-float" +.PD +Use (do not use) the hardware floating-point instructions and registers +for floating-point operations. When \fB\-msoft-float\fR is specified, +functions in \fIlibgcc.a\fR will be used to perform floating-point +operations. When \fB\-mhard-float\fR is specified, the compiler +generates \s-1IEEE\s0 floating-point instructions. This is the default. +.Ip "\fB\-mbackchain\fR" 4 +.IX Item "-mbackchain" +.PD 0 +.Ip "\fB\-mno-backchain\fR" 4 +.IX Item "-mno-backchain" +.PD +Generate (or do not generate) code which maintains an explicit +backchain within the stack frame that points to the caller's frame. +This is currently needed to allow debugging. The default is to +generate the backchain. +.Ip "\fB\-msmall-exec\fR" 4 +.IX Item "-msmall-exec" +.PD 0 +.Ip "\fB\-mno-small-exec\fR" 4 +.IX Item "-mno-small-exec" +.PD +Generate (or do not generate) code using the \f(CW\*(C`bras\*(C'\fR instruction +to do subroutine calls. +This only works reliably if the total executable size does not +exceed 64k. The default is to use the \f(CW\*(C`basr\*(C'\fR instruction instead, +which does not have this limitation. +.Ip "\fB\-m64\fR" 4 +.IX Item "-m64" +.PD 0 +.Ip "\fB\-m31\fR" 4 +.IX Item "-m31" +.PD +When \fB\-m31\fR is specified, generate code compliant to the +Linux for S/390 \s-1ABI\s0. When \fB\-m64\fR is specified, generate +code compliant to the Linux for zSeries \s-1ABI\s0. This allows \s-1GCC\s0 in +particular to generate 64\-bit instructions. For the \fBs390\fR +targets, the default is \fB\-m31\fR, while the \fBs390x\fR +targets default to \fB\-m64\fR. +.Ip "\fB\-mmvcle\fR" 4 +.IX Item "-mmvcle" +.PD 0 +.Ip "\fB\-mno-mvcle\fR" 4 +.IX Item "-mno-mvcle" +.PD +Generate (or do not generate) code using the \f(CW\*(C`mvcle\*(C'\fR instruction +to perform block moves. When \fB\-mno-mvcle\fR is specifed, +use a \f(CW\*(C`mvc\*(C'\fR loop instead. This is the default. +.Ip "\fB\-mdebug\fR" 4 +.IX Item "-mdebug" +.PD 0 +.Ip "\fB\-mno-debug\fR" 4 +.IX Item "-mno-debug" +.PD +Print (or do not print) additional debug information when compiling. +The default is to not print debug information. +.PP +.I "\s-1CRIS\s0 Options" +.IX Subsection "CRIS Options" +.PP +These options are defined specifically for the \s-1CRIS\s0 ports. +.Ip "\fB\-march=\fR\fIarchitecture-type\fR" 4 +.IX Item "-march=architecture-type" +.PD 0 +.Ip "\fB\-mcpu=\fR\fIarchitecture-type\fR" 4 +.IX Item "-mcpu=architecture-type" +.PD +Generate code for the specified architecture. The choices for +\&\fIarchitecture-type\fR are \fBv3\fR, \fBv8\fR and \fBv10\fR for +respectively \s-1ETRAX\s0\ 4, \s-1ETRAX\s0\ 100, and \s-1ETRAX\s0\ 100\ \s-1LX\s0. +Default is \fBv0\fR except for cris-axis-linux-gnu, where the default is +\&\fBv10\fR. +.Ip "\fB\-mtune=\fR\fIarchitecture-type\fR" 4 +.IX Item "-mtune=architecture-type" +Tune to \fIarchitecture-type\fR everything applicable about the generated +code, except for the \s-1ABI\s0 and the set of available instructions. The +choices for \fIarchitecture-type\fR are the same as for +\&\fB\-march=\fR\fIarchitecture-type\fR. +.Ip "\fB\-mmax-stack-frame=\fR\fIn\fR" 4 +.IX Item "-mmax-stack-frame=n" +Warn when the stack frame of a function exceeds \fIn\fR bytes. +.Ip "\fB\-melinux-stacksize=\fR\fIn\fR" 4 +.IX Item "-melinux-stacksize=n" +Only available with the \fBcris-axis-aout\fR target. Arranges for +indications in the program to the kernel loader that the stack of the +program should be set to \fIn\fR bytes. +.Ip "\fB\-metrax4\fR" 4 +.IX Item "-metrax4" +.PD 0 +.Ip "\fB\-metrax100\fR" 4 +.IX Item "-metrax100" +.PD +The options \fB\-metrax4\fR and \fB\-metrax100\fR are synonyms for +\&\fB\-march=v3\fR and \fB\-march=v8\fR respectively. +.Ip "\fB\-mpdebug\fR" 4 +.IX Item "-mpdebug" +Enable CRIS-specific verbose debug-related information in the assembly +code. This option also has the effect to turn off the \fB#NO_APP\fR +formatted-code indicator to the assembler at the beginning of the +assembly file. +.Ip "\fB\-mcc-init\fR" 4 +.IX Item "-mcc-init" +Do not use condition-code results from previous instruction; always emit +compare and test instructions before use of condition codes. +.Ip "\fB\-mno-side-effects\fR" 4 +.IX Item "-mno-side-effects" +Do not emit instructions with side-effects in addressing modes other than +post-increment. +.Ip "\fB\-mstack-align\fR" 4 +.IX Item "-mstack-align" +.PD 0 +.Ip "\fB\-mno-stack-align\fR" 4 +.IX Item "-mno-stack-align" +.Ip "\fB\-mdata-align\fR" 4 +.IX Item "-mdata-align" +.Ip "\fB\-mno-data-align\fR" 4 +.IX Item "-mno-data-align" +.Ip "\fB\-mconst-align\fR" 4 +.IX Item "-mconst-align" +.Ip "\fB\-mno-const-align\fR" 4 +.IX Item "-mno-const-align" +.PD +These options (no-options) arranges (eliminate arrangements) for the +stack-frame, individual data and constants to be aligned for the maximum +single data access size for the chosen \s-1CPU\s0 model. The default is to +arrange for 32\-bit alignment. \s-1ABI\s0 details such as structure layout are +not affected by these options. +.Ip "\fB\-m32\-bit\fR" 4 +.IX Item "-m32-bit" +.PD 0 +.Ip "\fB\-m16\-bit\fR" 4 +.IX Item "-m16-bit" +.Ip "\fB\-m8\-bit\fR" 4 +.IX Item "-m8-bit" +.PD +Similar to the stack- data- and const-align options above, these options +arrange for stack-frame, writable data and constants to all be 32\-bit, +16\-bit or 8\-bit aligned. The default is 32\-bit alignment. +.Ip "\fB\-mno-prologue-epilogue\fR" 4 +.IX Item "-mno-prologue-epilogue" +.PD 0 +.Ip "\fB\-mprologue-epilogue\fR" 4 +.IX Item "-mprologue-epilogue" +.PD +With \fB\-mno-prologue-epilogue\fR, the normal function prologue and +epilogue that sets up the stack-frame are omitted and no return +instructions or return sequences are generated in the code. Use this +option only together with visual inspection of the compiled code: no +warnings or errors are generated when call-saved registers must be saved, +or storage for local variable needs to be allocated. +.Ip "\fB\-mno-gotplt\fR" 4 +.IX Item "-mno-gotplt" +.PD 0 +.Ip "\fB\-mgotplt\fR" 4 +.IX Item "-mgotplt" +.PD +With \fB\-fpic\fR and \fB\-fPIC\fR, don't generate (do generate) +instruction sequences that load addresses for functions from the \s-1PLT\s0 part +of the \s-1GOT\s0 rather than (traditional on other architectures) calls to the +\&\s-1PLT\s0. The default is \fB\-mgotplt\fR. +.Ip "\fB\-maout\fR" 4 +.IX Item "-maout" +Legacy no-op option only recognized with the cris-axis-aout target. +.Ip "\fB\-melf\fR" 4 +.IX Item "-melf" +Legacy no-op option only recognized with the cris-axis-elf and +cris-axis-linux-gnu targets. +.Ip "\fB\-melinux\fR" 4 +.IX Item "-melinux" +Only recognized with the cris-axis-aout target, where it selects a +GNU/linux-like multilib, include files and instruction set for +\&\fB\-march=v8\fR. +.Ip "\fB\-mlinux\fR" 4 +.IX Item "-mlinux" +Legacy no-op option only recognized with the cris-axis-linux-gnu target. +.Ip "\fB\-sim\fR" 4 +.IX Item "-sim" +This option, recognized for the cris-axis-aout and cris-axis-elf arranges +to link with input-output functions from a simulator library. Code, +initialized data and zero-initialized data are allocated consecutively. +.Ip "\fB\-sim2\fR" 4 +.IX Item "-sim2" +Like \fB\-sim\fR, but pass linker options to locate initialized data at +0x40000000 and zero-initialized data at 0x80000000. +.PP +.I "\s-1MMIX\s0 Options" +.IX Subsection "MMIX Options" +.PP +These options are defined for the \s-1MMIX:\s0 +.Ip "\fB\-mlibfuncs\fR" 4 +.IX Item "-mlibfuncs" +.PD 0 +.Ip "\fB\-mno-libfuncs\fR" 4 +.IX Item "-mno-libfuncs" +.PD +Specify that intrinsic library functions are being compiled, passing all +values in registers, no matter the size. +.Ip "\fB\-mepsilon\fR" 4 +.IX Item "-mepsilon" +.PD 0 +.Ip "\fB\-mno-epsilon\fR" 4 +.IX Item "-mno-epsilon" +.PD +Generate floating-point comparison instructions that compare with respect +to the \f(CW\*(C`rE\*(C'\fR epsilon register. +.Ip "\fB\-mabi=mmixware\fR" 4 +.IX Item "-mabi=mmixware" +.PD 0 +.Ip "\fB\-mabi=gnu\fR" 4 +.IX Item "-mabi=gnu" +.PD +Generate code that passes function parameters and return values that (in +the called function) are seen as registers \f(CW\*(C`$0\*(C'\fR and up, as opposed to +the \s-1GNU\s0 \s-1ABI\s0 which uses global registers \f(CW\*(C`$231\*(C'\fR and up. +.Ip "\fB\-mzero-extend\fR" 4 +.IX Item "-mzero-extend" +.PD 0 +.Ip "\fB\-mno-zero-extend\fR" 4 +.IX Item "-mno-zero-extend" +.PD +When reading data from memory in sizes shorter than 64 bits, use (do not +use) zero-extending load instructions by default, rather than +sign-extending ones. +.Ip "\fB\-mknuthdiv\fR" 4 +.IX Item "-mknuthdiv" +.PD 0 +.Ip "\fB\-mno-knuthdiv\fR" 4 +.IX Item "-mno-knuthdiv" +.PD +Make the result of a division yielding a remainder have the same sign as +the divisor. With the default, \fB\-mno-knuthdiv\fR, the sign of the +remainder follows the sign of the dividend. Both methods are +arithmetically valid, the latter being almost exclusively used. +.Ip "\fB\-mtoplevel-symbols\fR" 4 +.IX Item "-mtoplevel-symbols" +.PD 0 +.Ip "\fB\-mno-toplevel-symbols\fR" 4 +.IX Item "-mno-toplevel-symbols" +.PD +Prepend (do not prepend) a \fB:\fR to all global symbols, so the assembly +code can be used with the \f(CW\*(C`PREFIX\*(C'\fR assembly directive. +.Ip "\fB\-melf\fR" 4 +.IX Item "-melf" +Generate an executable in the \s-1ELF\s0 format, rather than the default +\&\fBmmo\fR format used by the \fBmmix\fR simulator. +.Ip "\fB\-mbranch-predict\fR" 4 +.IX Item "-mbranch-predict" +.PD 0 +.Ip "\fB\-mno-branch-predict\fR" 4 +.IX Item "-mno-branch-predict" +.PD +Use (do not use) the probable-branch instructions, when static branch +prediction indicates a probable branch. +.Ip "\fB\-mbase-addresses\fR" 4 +.IX Item "-mbase-addresses" +.PD 0 +.Ip "\fB\-mno-base-addresses\fR" 4 +.IX Item "-mno-base-addresses" +.PD +Generate (do not generate) code that uses \fIbase addresses\fR. Using a +base address automatically generates a request (handled by the assembler +and the linker) for a constant to be set up in a global register. The +register is used for one or more base address requests within the range 0 +to 255 from the value held in the register. The generally leads to short +and fast code, but the number of different data items that can be +addressed is limited. This means that a program that uses lots of static +data may require \fB\-mno-base-addresses\fR. +.PP +.I "\s-1PDP-11\s0 Options" +.IX Subsection "PDP-11 Options" +.PP +These options are defined for the \s-1PDP-11:\s0 +.Ip "\fB\-mfpu\fR" 4 +.IX Item "-mfpu" +Use hardware \s-1FPP\s0 floating point. This is the default. (\s-1FIS\s0 floating +point on the \s-1PDP-11/40\s0 is not supported.) +.Ip "\fB\-msoft-float\fR" 4 +.IX Item "-msoft-float" +Do not use hardware floating point. +.Ip "\fB\-mac0\fR" 4 +.IX Item "-mac0" +Return floating-point results in ac0 (fr0 in Unix assembler syntax). +.Ip "\fB\-mno-ac0\fR" 4 +.IX Item "-mno-ac0" +Return floating-point results in memory. This is the default. +.Ip "\fB\-m40\fR" 4 +.IX Item "-m40" +Generate code for a \s-1PDP-11/40\s0. +.Ip "\fB\-m45\fR" 4 +.IX Item "-m45" +Generate code for a \s-1PDP-11/45\s0. This is the default. +.Ip "\fB\-m10\fR" 4 +.IX Item "-m10" +Generate code for a \s-1PDP-11/10\s0. +.Ip "\fB\-mbcopy-builtin\fR" 4 +.IX Item "-mbcopy-builtin" +Use inline \f(CW\*(C`movstrhi\*(C'\fR patterns for copying memory. This is the +default. +.Ip "\fB\-mbcopy\fR" 4 +.IX Item "-mbcopy" +Do not use inline \f(CW\*(C`movstrhi\*(C'\fR patterns for copying memory. +.Ip "\fB\-mint16\fR" 4 +.IX Item "-mint16" +.PD 0 +.Ip "\fB\-mno-int32\fR" 4 +.IX Item "-mno-int32" +.PD +Use 16\-bit \f(CW\*(C`int\*(C'\fR. This is the default. +.Ip "\fB\-mint32\fR" 4 +.IX Item "-mint32" +.PD 0 +.Ip "\fB\-mno-int16\fR" 4 +.IX Item "-mno-int16" +.PD +Use 32\-bit \f(CW\*(C`int\*(C'\fR. +.Ip "\fB\-mfloat64\fR" 4 +.IX Item "-mfloat64" +.PD 0 +.Ip "\fB\-mno-float32\fR" 4 +.IX Item "-mno-float32" +.PD +Use 64\-bit \f(CW\*(C`float\*(C'\fR. This is the default. +.Ip "\fB\-mfloat32\fR" 4 +.IX Item "-mfloat32" +.PD 0 +.Ip "\fB\-mno-float64\fR" 4 +.IX Item "-mno-float64" +.PD +Use 32\-bit \f(CW\*(C`float\*(C'\fR. +.Ip "\fB\-mabshi\fR" 4 +.IX Item "-mabshi" +Use \f(CW\*(C`abshi2\*(C'\fR pattern. This is the default. +.Ip "\fB\-mno-abshi\fR" 4 +.IX Item "-mno-abshi" +Do not use \f(CW\*(C`abshi2\*(C'\fR pattern. +.Ip "\fB\-mbranch-expensive\fR" 4 +.IX Item "-mbranch-expensive" +Pretend that branches are expensive. This is for experimenting with +code generation only. +.Ip "\fB\-mbranch-cheap\fR" 4 +.IX Item "-mbranch-cheap" +Do not pretend that branches are expensive. This is the default. +.Ip "\fB\-msplit\fR" 4 +.IX Item "-msplit" +Generate code for a system with split I&D. +.Ip "\fB\-mno-split\fR" 4 +.IX Item "-mno-split" +Generate code for a system without split I&D. This is the default. +.Ip "\fB\-munix-asm\fR" 4 +.IX Item "-munix-asm" +Use Unix assembler syntax. This is the default when configured for +\&\fBpdp11\-*\-bsd\fR. +.Ip "\fB\-mdec-asm\fR" 4 +.IX Item "-mdec-asm" +Use \s-1DEC\s0 assembler syntax. This is the default when configured for any +\&\s-1PDP-11\s0 target other than \fBpdp11\-*\-bsd\fR. +.PP +.I "Xstormy16 Options" +.IX Subsection "Xstormy16 Options" +.PP +These options are defined for Xstormy16: +.Ip "\fB\-msim\fR" 4 +.IX Item "-msim" +Choose startup files and linker script suitable for the simulator. +.PP +.I "Xtensa Options" +.IX Subsection "Xtensa Options" +.PP +The Xtensa architecture is designed to support many different +configurations. The compiler's default options can be set to match a +particular Xtensa configuration by copying a configuration file into the +\&\s-1GCC\s0 sources when building \s-1GCC\s0. The options below may be used to +override the default options. +.Ip "\fB\-mbig-endian\fR" 4 +.IX Item "-mbig-endian" +.PD 0 +.Ip "\fB\-mlittle-endian\fR" 4 +.IX Item "-mlittle-endian" +.PD +Specify big-endian or little-endian byte ordering for the target Xtensa +processor. +.Ip "\fB\-mdensity\fR" 4 +.IX Item "-mdensity" +.PD 0 +.Ip "\fB\-mno-density\fR" 4 +.IX Item "-mno-density" +.PD +Enable or disable use of the optional Xtensa code density instructions. +.Ip "\fB\-mmac16\fR" 4 +.IX Item "-mmac16" +.PD 0 +.Ip "\fB\-mno-mac16\fR" 4 +.IX Item "-mno-mac16" +.PD +Enable or disable use of the Xtensa \s-1MAC16\s0 option. When enabled, \s-1GCC\s0 +will generate \s-1MAC16\s0 instructions from standard C code, with the +limitation that it will use neither the \s-1MR\s0 register file nor any +instruction that operates on the \s-1MR\s0 registers. When this option is +disabled, \s-1GCC\s0 will translate 16\-bit multiply/accumulate operations to a +combination of core instructions and library calls, depending on whether +any other multiplier options are enabled. +.Ip "\fB\-mmul16\fR" 4 +.IX Item "-mmul16" +.PD 0 +.Ip "\fB\-mno-mul16\fR" 4 +.IX Item "-mno-mul16" +.PD +Enable or disable use of the 16\-bit integer multiplier option. When +enabled, the compiler will generate 16\-bit multiply instructions for +multiplications of 16 bits or smaller in standard C code. When this +option is disabled, the compiler will either use 32\-bit multiply or +\&\s-1MAC16\s0 instructions if they are available or generate library calls to +perform the multiply operations using shifts and adds. +.Ip "\fB\-mmul32\fR" 4 +.IX Item "-mmul32" +.PD 0 +.Ip "\fB\-mno-mul32\fR" 4 +.IX Item "-mno-mul32" +.PD +Enable or disable use of the 32\-bit integer multiplier option. When +enabled, the compiler will generate 32\-bit multiply instructions for +multiplications of 32 bits or smaller in standard C code. When this +option is disabled, the compiler will generate library calls to perform +the multiply operations using either shifts and adds or 16\-bit multiply +instructions if they are available. +.Ip "\fB\-mnsa\fR" 4 +.IX Item "-mnsa" +.PD 0 +.Ip "\fB\-mno-nsa\fR" 4 +.IX Item "-mno-nsa" +.PD +Enable or disable use of the optional normalization shift amount +(\f(CW\*(C`NSA\*(C'\fR) instructions to implement the built-in \f(CW\*(C`ffs\*(C'\fR function. +.Ip "\fB\-mminmax\fR" 4 +.IX Item "-mminmax" +.PD 0 +.Ip "\fB\-mno-minmax\fR" 4 +.IX Item "-mno-minmax" +.PD +Enable or disable use of the optional minimum and maximum value +instructions. +.Ip "\fB\-msext\fR" 4 +.IX Item "-msext" +.PD 0 +.Ip "\fB\-mno-sext\fR" 4 +.IX Item "-mno-sext" +.PD +Enable or disable use of the optional sign extend (\f(CW\*(C`SEXT\*(C'\fR) +instruction. +.Ip "\fB\-mbooleans\fR" 4 +.IX Item "-mbooleans" +.PD 0 +.Ip "\fB\-mno-booleans\fR" 4 +.IX Item "-mno-booleans" +.PD +Enable or disable support for the boolean register file used by Xtensa +coprocessors. This is not typically useful by itself but may be +required for other options that make use of the boolean registers (e.g., +the floating-point option). +.Ip "\fB\-mhard-float\fR" 4 +.IX Item "-mhard-float" +.PD 0 +.Ip "\fB\-msoft-float\fR" 4 +.IX Item "-msoft-float" +.PD +Enable or disable use of the floating-point option. When enabled, \s-1GCC\s0 +generates floating-point instructions for 32\-bit \f(CW\*(C`float\*(C'\fR +operations. When this option is disabled, \s-1GCC\s0 generates library calls +to emulate 32\-bit floating-point operations using integer instructions. +Regardless of this option, 64\-bit \f(CW\*(C`double\*(C'\fR operations are always +emulated with calls to library functions. +.Ip "\fB\-mfused-madd\fR" 4 +.IX Item "-mfused-madd" +.PD 0 +.Ip "\fB\-mno-fused-madd\fR" 4 +.IX Item "-mno-fused-madd" +.PD +Enable or disable use of fused multiply/add and multiply/subtract +instructions in the floating-point option. This has no effect if the +floating-point option is not also enabled. Disabling fused multiply/add +and multiply/subtract instructions forces the compiler to use separate +instructions for the multiply and add/subtract operations. This may be +desirable in some cases where strict \s-1IEEE\s0 754\-compliant results are +required: the fused multiply add/subtract instructions do not round the +intermediate result, thereby producing results with \fImore\fR bits of +precision than specified by the \s-1IEEE\s0 standard. Disabling fused multiply +add/subtract instructions also ensures that the program output is not +sensitive to the compiler's ability to combine multiply and add/subtract +operations. +.Ip "\fB\-mserialize-volatile\fR" 4 +.IX Item "-mserialize-volatile" +.PD 0 +.Ip "\fB\-mno-serialize-volatile\fR" 4 +.IX Item "-mno-serialize-volatile" +.PD +When this option is enabled, \s-1GCC\s0 inserts \f(CW\*(C`MEMW\*(C'\fR instructions before +\&\f(CW\*(C`volatile\*(C'\fR memory references to guarantee sequential consistency. +The default is \fB\-mserialize-volatile\fR. Use +\&\fB\-mno-serialize-volatile\fR to omit the \f(CW\*(C`MEMW\*(C'\fR instructions. +.Ip "\fB\-mtext-section-literals\fR" 4 +.IX Item "-mtext-section-literals" +.PD 0 +.Ip "\fB\-mno-text-section-literals\fR" 4 +.IX Item "-mno-text-section-literals" +.PD +Control the treatment of literal pools. The default is +\&\fB\-mno-text-section-literals\fR, which places literals in a separate +section in the output file. This allows the literal pool to be placed +in a data \s-1RAM/ROM\s0, and it also allows the linker to combine literal +pools from separate object files to remove redundant literals and +improve code size. With \fB\-mtext-section-literals\fR, the literals +are interspersed in the text section in order to keep them as close as +possible to their references. This may be necessary for large assembly +files. +.Ip "\fB\-mtarget-align\fR" 4 +.IX Item "-mtarget-align" +.PD 0 +.Ip "\fB\-mno-target-align\fR" 4 +.IX Item "-mno-target-align" +.PD +When this option is enabled, \s-1GCC\s0 instructs the assembler to +automatically align instructions to reduce branch penalties at the +expense of some code density. The assembler attempts to widen density +instructions to align branch targets and the instructions following call +instructions. If there are not enough preceding safe density +instructions to align a target, no widening will be performed. The +default is \fB\-mtarget-align\fR. These options do not affect the +treatment of auto-aligned instructions like \f(CW\*(C`LOOP\*(C'\fR, which the +assembler will always align, either by widening density instructions or +by inserting no-op instructions. +.Ip "\fB\-mlongcalls\fR" 4 +.IX Item "-mlongcalls" +.PD 0 +.Ip "\fB\-mno-longcalls\fR" 4 +.IX Item "-mno-longcalls" +.PD +When this option is enabled, \s-1GCC\s0 instructs the assembler to translate +direct calls to indirect calls unless it can determine that the target +of a direct call is in the range allowed by the call instruction. This +translation typically occurs for calls to functions in other source +files. Specifically, the assembler translates a direct \f(CW\*(C`CALL\*(C'\fR +instruction into an \f(CW\*(C`L32R\*(C'\fR followed by a \f(CW\*(C`CALLX\*(C'\fR instruction. +The default is \fB\-mno-longcalls\fR. This option should be used in +programs where the call target can potentially be out of range. This +option is implemented in the assembler, not the compiler, so the +assembly code generated by \s-1GCC\s0 will still show direct call +instructions\-\-\-look at the disassembled object code to see the actual +instructions. Note that the assembler will use an indirect call for +every cross-file call, not just those that really will be out of range. +.Sh "Options for Code Generation Conventions" +.IX Subsection "Options for Code Generation Conventions" +These machine-independent options control the interface conventions +used in code generation. +.PP +Most of them have both positive and negative forms; the negative form +of \fB\-ffoo\fR would be \fB\-fno-foo\fR. In the table below, only +one of the forms is listed\-\-\-the one which is not the default. You +can figure out the other form by either removing \fBno-\fR or adding +it. +.Ip "\fB\-fexceptions\fR" 4 +.IX Item "-fexceptions" +Enable exception handling. Generates extra code needed to propagate +exceptions. For some targets, this implies \s-1GCC\s0 will generate frame +unwind information for all functions, which can produce significant data +size overhead, although it does not affect execution. If you do not +specify this option, \s-1GCC\s0 will enable it by default for languages like +\&\*(C+ which normally require exception handling, and disable it for +languages like C that do not normally require it. However, you may need +to enable this option when compiling C code that needs to interoperate +properly with exception handlers written in \*(C+. You may also wish to +disable this option if you are compiling older \*(C+ programs that don't +use exception handling. +.Ip "\fB\-fnon-call-exceptions\fR" 4 +.IX Item "-fnon-call-exceptions" +Generate code that allows trapping instructions to throw exceptions. +Note that this requires platform-specific runtime support that does +not exist everywhere. Moreover, it only allows \fItrapping\fR +instructions to throw exceptions, i.e. memory references or floating +point instructions. It does not allow exceptions to be thrown from +arbitrary signal handlers such as \f(CW\*(C`SIGALRM\*(C'\fR. +.Ip "\fB\-funwind-tables\fR" 4 +.IX Item "-funwind-tables" +Similar to \fB\-fexceptions\fR, except that it will just generate any needed +static data, but will not affect the generated code in any other way. +You will normally not enable this option; instead, a language processor +that needs this handling would enable it on your behalf. +.Ip "\fB\-fasynchronous-unwind-tables\fR" 4 +.IX Item "-fasynchronous-unwind-tables" +Generate unwind table in dwarf2 format, if supported by target machine. The +table is exact at each instruction boundary, so it can be used for stack +unwinding from asynchronous events (such as debugger or garbage collector). +.Ip "\fB\-fpcc-struct-return\fR" 4 +.IX Item "-fpcc-struct-return" +Return ``short'' \f(CW\*(C`struct\*(C'\fR and \f(CW\*(C`union\*(C'\fR values in memory like +longer ones, rather than in registers. This convention is less +efficient, but it has the advantage of allowing intercallability between +GCC-compiled files and files compiled with other compilers, particularly +the Portable C Compiler (pcc). +.Sp +The precise convention for returning structures in memory depends +on the target configuration macros. +.Sp +Short structures and unions are those whose size and alignment match +that of some integer type. +.Sp +\&\fBWarning:\fR code compiled with the \fB\-fpcc-struct-return\fR +switch is not binary compatible with code compiled with the +\&\fB\-freg-struct-return\fR switch. +Use it to conform to a non-default application binary interface. +.Ip "\fB\-freg-struct-return\fR" 4 +.IX Item "-freg-struct-return" +Return \f(CW\*(C`struct\*(C'\fR and \f(CW\*(C`union\*(C'\fR values in registers when possible. +This is more efficient for small structures than +\&\fB\-fpcc-struct-return\fR. +.Sp +If you specify neither \fB\-fpcc-struct-return\fR nor +\&\fB\-freg-struct-return\fR, \s-1GCC\s0 defaults to whichever convention is +standard for the target. If there is no standard convention, \s-1GCC\s0 +defaults to \fB\-fpcc-struct-return\fR, except on targets where \s-1GCC\s0 is +the principal compiler. In those cases, we can choose the standard, and +we chose the more efficient register return alternative. +.Sp +\&\fBWarning:\fR code compiled with the \fB\-freg-struct-return\fR +switch is not binary compatible with code compiled with the +\&\fB\-fpcc-struct-return\fR switch. +Use it to conform to a non-default application binary interface. +.Ip "\fB\-fshort-enums\fR" 4 +.IX Item "-fshort-enums" +Allocate to an \f(CW\*(C`enum\*(C'\fR type only as many bytes as it needs for the +declared range of possible values. Specifically, the \f(CW\*(C`enum\*(C'\fR type +will be equivalent to the smallest integer type which has enough room. +.Sp +\&\fBWarning:\fR the \fB\-fshort-enums\fR switch causes \s-1GCC\s0 to generate +code that is not binary compatible with code generated without that switch. +Use it to conform to a non-default application binary interface. +.Ip "\fB\-fshort-double\fR" 4 +.IX Item "-fshort-double" +Use the same size for \f(CW\*(C`double\*(C'\fR as for \f(CW\*(C`float\*(C'\fR. +.Sp +\&\fBWarning:\fR the \fB\-fshort-double\fR switch causes \s-1GCC\s0 to generate +code that is not binary compatible with code generated without that switch. +Use it to conform to a non-default application binary interface. +.Ip "\fB\-fshort-wchar\fR" 4 +.IX Item "-fshort-wchar" +Override the underlying type for \fBwchar_t\fR to be \fBshort +unsigned int\fR instead of the default for the target. This option is +useful for building programs to run under \s-1WINE\s0. +.Sp +\&\fBWarning:\fR the \fB\-fshort-wchar\fR switch causes \s-1GCC\s0 to generate +code that is not binary compatible with code generated without that switch. +Use it to conform to a non-default application binary interface. +.Ip "\fB\-fshared-data\fR" 4 +.IX Item "-fshared-data" +Requests that the data and non-\f(CW\*(C`const\*(C'\fR variables of this +compilation be shared data rather than private data. The distinction +makes sense only on certain operating systems, where shared data is +shared between processes running the same program, while private data +exists in one copy per process. +.Ip "\fB\-fno-common\fR" 4 +.IX Item "-fno-common" +In C, allocate even uninitialized global variables in the data section of the +object file, rather than generating them as common blocks. This has the +effect that if the same variable is declared (without \f(CW\*(C`extern\*(C'\fR) in +two different compilations, you will get an error when you link them. +The only reason this might be useful is if you wish to verify that the +program will work on other systems which always work this way. +.Ip "\fB\-fno-ident\fR" 4 +.IX Item "-fno-ident" +Ignore the \fB#ident\fR directive. +.Ip "\fB\-fno-gnu-linker\fR" 4 +.IX Item "-fno-gnu-linker" +Do not output global initializations (such as \*(C+ constructors and +destructors) in the form used by the \s-1GNU\s0 linker (on systems where the \s-1GNU\s0 +linker is the standard method of handling them). Use this option when +you want to use a non-GNU linker, which also requires using the +\&\fBcollect2\fR program to make sure the system linker includes +constructors and destructors. (\fBcollect2\fR is included in the \s-1GCC\s0 +distribution.) For systems which \fImust\fR use \fBcollect2\fR, the +compiler driver \fBgcc\fR is configured to do this automatically. +.Ip "\fB\-finhibit-size-directive\fR" 4 +.IX Item "-finhibit-size-directive" +Don't output a \f(CW\*(C`.size\*(C'\fR assembler directive, or anything else that +would cause trouble if the function is split in the middle, and the +two halves are placed at locations far apart in memory. This option is +used when compiling \fIcrtstuff.c\fR; you should not need to use it +for anything else. +.Ip "\fB\-fverbose-asm\fR" 4 +.IX Item "-fverbose-asm" +Put extra commentary information in the generated assembly code to +make it more readable. This option is generally only of use to those +who actually need to read the generated assembly code (perhaps while +debugging the compiler itself). +.Sp +\&\fB\-fno-verbose-asm\fR, the default, causes the +extra information to be omitted and is useful when comparing two assembler +files. +.Ip "\fB\-fvolatile\fR" 4 +.IX Item "-fvolatile" +Consider all memory references through pointers to be volatile. +.Ip "\fB\-fvolatile-global\fR" 4 +.IX Item "-fvolatile-global" +Consider all memory references to extern and global data items to +be volatile. \s-1GCC\s0 does not consider static data items to be volatile +because of this switch. +.Ip "\fB\-fvolatile-static\fR" 4 +.IX Item "-fvolatile-static" +Consider all memory references to static data to be volatile. +.Ip "\fB\-fpic\fR" 4 +.IX Item "-fpic" +Generate position-independent code (\s-1PIC\s0) suitable for use in a shared +library, if supported for the target machine. Such code accesses all +constant addresses through a global offset table (\s-1GOT\s0). The dynamic +loader resolves the \s-1GOT\s0 entries when the program starts (the dynamic +loader is not part of \s-1GCC\s0; it is part of the operating system). If +the \s-1GOT\s0 size for the linked executable exceeds a machine-specific +maximum size, you get an error message from the linker indicating that +\&\fB\-fpic\fR does not work; in that case, recompile with \fB\-fPIC\fR +instead. (These maximums are 16k on the m88k, 8k on the Sparc, and 32k +on the m68k and \s-1RS/6000\s0. The 386 has no such limit.) +.Sp +Position-independent code requires special support, and therefore works +only on certain machines. For the 386, \s-1GCC\s0 supports \s-1PIC\s0 for System V +but not for the Sun 386i. Code generated for the \s-1IBM\s0 \s-1RS/6000\s0 is always +position-independent. +.Ip "\fB\-fPIC\fR" 4 +.IX Item "-fPIC" +If supported for the target machine, emit position-independent code, +suitable for dynamic linking and avoiding any limit on the size of the +global offset table. This option makes a difference on the m68k, m88k, +and the Sparc. +.Sp +Position-independent code requires special support, and therefore works +only on certain machines. +.Ip "\fB\-ffixed-\fR\fIreg\fR" 4 +.IX Item "-ffixed-reg" +Treat the register named \fIreg\fR as a fixed register; generated code +should never refer to it (except perhaps as a stack pointer, frame +pointer or in some other fixed role). +.Sp +\&\fIreg\fR must be the name of a register. The register names accepted +are machine-specific and are defined in the \f(CW\*(C`REGISTER_NAMES\*(C'\fR +macro in the machine description macro file. +.Sp +This flag does not have a negative form, because it specifies a +three-way choice. +.Ip "\fB\-fcall-used-\fR\fIreg\fR" 4 +.IX Item "-fcall-used-reg" +Treat the register named \fIreg\fR as an allocable register that is +clobbered by function calls. It may be allocated for temporaries or +variables that do not live across a call. Functions compiled this way +will not save and restore the register \fIreg\fR. +.Sp +It is an error to used this flag with the frame pointer or stack pointer. +Use of this flag for other registers that have fixed pervasive roles in +the machine's execution model will produce disastrous results. +.Sp +This flag does not have a negative form, because it specifies a +three-way choice. +.Ip "\fB\-fcall-saved-\fR\fIreg\fR" 4 +.IX Item "-fcall-saved-reg" +Treat the register named \fIreg\fR as an allocable register saved by +functions. It may be allocated even for temporaries or variables that +live across a call. Functions compiled this way will save and restore +the register \fIreg\fR if they use it. +.Sp +It is an error to used this flag with the frame pointer or stack pointer. +Use of this flag for other registers that have fixed pervasive roles in +the machine's execution model will produce disastrous results. +.Sp +A different sort of disaster will result from the use of this flag for +a register in which function values may be returned. +.Sp +This flag does not have a negative form, because it specifies a +three-way choice. +.Ip "\fB\-fpack-struct\fR" 4 +.IX Item "-fpack-struct" +Pack all structure members together without holes. +.Sp +\&\fBWarning:\fR the \fB\-fpack-struct\fR switch causes \s-1GCC\s0 to generate +code that is not binary compatible with code generated without that switch. +Additionally, it makes the code suboptimial. +Use it to conform to a non-default application binary interface. +.Ip "\fB\-finstrument-functions\fR" 4 +.IX Item "-finstrument-functions" +Generate instrumentation calls for entry and exit to functions. Just +after function entry and just before function exit, the following +profiling functions will be called with the address of the current +function and its call site. (On some platforms, +\&\f(CW\*(C`_\|_builtin_return_address\*(C'\fR does not work beyond the current +function, so the call site information may not be available to the +profiling functions otherwise.) +.Sp +.Vb 4 +\& void __cyg_profile_func_enter (void *this_fn, +\& void *call_site); +\& void __cyg_profile_func_exit (void *this_fn, +\& void *call_site); +.Ve +The first argument is the address of the start of the current function, +which may be looked up exactly in the symbol table. +.Sp +This instrumentation is also done for functions expanded inline in other +functions. The profiling calls will indicate where, conceptually, the +inline function is entered and exited. This means that addressable +versions of such functions must be available. If all your uses of a +function are expanded inline, this may mean an additional expansion of +code size. If you use \fBextern inline\fR in your C code, an +addressable version of such functions must be provided. (This is +normally the case anyways, but if you get lucky and the optimizer always +expands the functions inline, you might have gotten away without +providing static copies.) +.Sp +A function may be given the attribute \f(CW\*(C`no_instrument_function\*(C'\fR, in +which case this instrumentation will not be done. This can be used, for +example, for the profiling functions listed above, high-priority +interrupt routines, and any functions from which the profiling functions +cannot safely be called (perhaps signal handlers, if the profiling +routines generate output or allocate memory). +.Ip "\fB\-fstack-check\fR" 4 +.IX Item "-fstack-check" +Generate code to verify that you do not go beyond the boundary of the +stack. You should specify this flag if you are running in an +environment with multiple threads, but only rarely need to specify it in +a single-threaded environment since stack overflow is automatically +detected on nearly all systems if there is only one stack. +.Sp +Note that this switch does not actually cause checking to be done; the +operating system must do that. The switch causes generation of code +to ensure that the operating system sees the stack being extended. +.Ip "\fB\-fstack-limit-register=\fR\fIreg\fR" 4 +.IX Item "-fstack-limit-register=reg" +.PD 0 +.Ip "\fB\-fstack-limit-symbol=\fR\fIsym\fR" 4 +.IX Item "-fstack-limit-symbol=sym" +.Ip "\fB\-fno-stack-limit\fR" 4 +.IX Item "-fno-stack-limit" +.PD +Generate code to ensure that the stack does not grow beyond a certain value, +either the value of a register or the address of a symbol. If the stack +would grow beyond the value, a signal is raised. For most targets, +the signal is raised before the stack overruns the boundary, so +it is possible to catch the signal without taking special precautions. +.Sp +For instance, if the stack starts at absolute address \fB0x80000000\fR +and grows downwards, you can use the flags +\&\fB\-fstack-limit-symbol=_\|_stack_limit\fR and +\&\fB\-Wl,\-\-defsym,_\|_stack_limit=0x7ffe0000\fR to enforce a stack limit +of 128KB. Note that this may only work with the \s-1GNU\s0 linker. +.Ip "\fB\-fargument-alias\fR" 4 +.IX Item "-fargument-alias" +.PD 0 +.Ip "\fB\-fargument-noalias\fR" 4 +.IX Item "-fargument-noalias" +.Ip "\fB\-fargument-noalias-global\fR" 4 +.IX Item "-fargument-noalias-global" +.PD +Specify the possible relationships among parameters and between +parameters and global data. +.Sp +\&\fB\-fargument-alias\fR specifies that arguments (parameters) may +alias each other and may alias global storage.\fB\-fargument-noalias\fR specifies that arguments do not alias +each other, but may alias global storage.\fB\-fargument-noalias-global\fR specifies that arguments do not +alias each other and do not alias global storage. +.Sp +Each language will automatically use whatever option is required by +the language standard. You should not need to use these options yourself. +.Ip "\fB\-fleading-underscore\fR" 4 +.IX Item "-fleading-underscore" +This option and its counterpart, \fB\-fno-leading-underscore\fR, forcibly +change the way C symbols are represented in the object file. One use +is to help link with legacy assembly code. +.Sp +\&\fBWarning:\fR the \fB\-fleading-underscore\fR switch causes \s-1GCC\s0 to +generate code that is not binary compatible with code generated without that +switch. Use it to conform to a non-default application binary interface. +Not all targets provide complete support for this switch. +.SH "ENVIRONMENT" +.IX Header "ENVIRONMENT" +This section describes several environment variables that affect how \s-1GCC\s0 +operates. Some of them work by specifying directories or prefixes to use +when searching for various kinds of files. Some are used to specify other +aspects of the compilation environment. +.PP +Note that you can also specify places to search using options such as +\&\fB\-B\fR, \fB\-I\fR and \fB\-L\fR. These +take precedence over places specified using environment variables, which +in turn take precedence over those specified by the configuration of \s-1GCC\s0. +.Ip "\fB\s-1LANG\s0\fR" 4 +.IX Item "LANG" +.PD 0 +.Ip "\fB\s-1LC_CTYPE\s0\fR" 4 +.IX Item "LC_CTYPE" +.Ip "\fB\s-1LC_MESSAGES\s0\fR" 4 +.IX Item "LC_MESSAGES" +.Ip "\fB\s-1LC_ALL\s0\fR" 4 +.IX Item "LC_ALL" +.PD +These environment variables control the way that \s-1GCC\s0 uses +localization information that allow \s-1GCC\s0 to work with different +national conventions. \s-1GCC\s0 inspects the locale categories +\&\fB\s-1LC_CTYPE\s0\fR and \fB\s-1LC_MESSAGES\s0\fR if it has been configured to do +so. These locale categories can be set to any value supported by your +installation. A typical value is \fBen_UK\fR for English in the United +Kingdom. +.Sp +The \fB\s-1LC_CTYPE\s0\fR environment variable specifies character +classification. \s-1GCC\s0 uses it to determine the character boundaries in +a string; this is needed for some multibyte encodings that contain quote +and escape characters that would otherwise be interpreted as a string +end or escape. +.Sp +The \fB\s-1LC_MESSAGES\s0\fR environment variable specifies the language to +use in diagnostic messages. +.Sp +If the \fB\s-1LC_ALL\s0\fR environment variable is set, it overrides the value +of \fB\s-1LC_CTYPE\s0\fR and \fB\s-1LC_MESSAGES\s0\fR; otherwise, \fB\s-1LC_CTYPE\s0\fR +and \fB\s-1LC_MESSAGES\s0\fR default to the value of the \fB\s-1LANG\s0\fR +environment variable. If none of these variables are set, \s-1GCC\s0 +defaults to traditional C English behavior. +.Ip "\fB\s-1TMPDIR\s0\fR" 4 +.IX Item "TMPDIR" +If \fB\s-1TMPDIR\s0\fR is set, it specifies the directory to use for temporary +files. \s-1GCC\s0 uses temporary files to hold the output of one stage of +compilation which is to be used as input to the next stage: for example, +the output of the preprocessor, which is the input to the compiler +proper. +.Ip "\fB\s-1GCC_EXEC_PREFIX\s0\fR" 4 +.IX Item "GCC_EXEC_PREFIX" +If \fB\s-1GCC_EXEC_PREFIX\s0\fR is set, it specifies a prefix to use in the +names of the subprograms executed by the compiler. No slash is added +when this prefix is combined with the name of a subprogram, but you can +specify a prefix that ends with a slash if you wish. +.Sp +If \fB\s-1GCC_EXEC_PREFIX\s0\fR is not set, \s-1GCC\s0 will attempt to figure out +an appropriate prefix to use based on the pathname it was invoked with. +.Sp +If \s-1GCC\s0 cannot find the subprogram using the specified prefix, it +tries looking in the usual places for the subprogram. +.Sp +The default value of \fB\s-1GCC_EXEC_PREFIX\s0\fR is +\&\fI\fIprefix\fI/lib/gcc-lib/\fR where \fIprefix\fR is the value +of \f(CW\*(C`prefix\*(C'\fR when you ran the \fIconfigure\fR script. +.Sp +Other prefixes specified with \fB\-B\fR take precedence over this prefix. +.Sp +This prefix is also used for finding files such as \fIcrt0.o\fR that are +used for linking. +.Sp +In addition, the prefix is used in an unusual way in finding the +directories to search for header files. For each of the standard +directories whose name normally begins with \fB/usr/local/lib/gcc-lib\fR +(more precisely, with the value of \fB\s-1GCC_INCLUDE_DIR\s0\fR), \s-1GCC\s0 tries +replacing that beginning with the specified prefix to produce an +alternate directory name. Thus, with \fB\-Bfoo/\fR, \s-1GCC\s0 will search +\&\fIfoo/bar\fR where it would normally search \fI/usr/local/lib/bar\fR. +These alternate directories are searched first; the standard directories +come next. +.Ip "\fB\s-1COMPILER_PATH\s0\fR" 4 +.IX Item "COMPILER_PATH" +The value of \fB\s-1COMPILER_PATH\s0\fR is a colon-separated list of +directories, much like \fB\s-1PATH\s0\fR. \s-1GCC\s0 tries the directories thus +specified when searching for subprograms, if it can't find the +subprograms using \fB\s-1GCC_EXEC_PREFIX\s0\fR. +.Ip "\fB\s-1LIBRARY_PATH\s0\fR" 4 +.IX Item "LIBRARY_PATH" +The value of \fB\s-1LIBRARY_PATH\s0\fR is a colon-separated list of +directories, much like \fB\s-1PATH\s0\fR. When configured as a native compiler, +\&\s-1GCC\s0 tries the directories thus specified when searching for special +linker files, if it can't find them using \fB\s-1GCC_EXEC_PREFIX\s0\fR. Linking +using \s-1GCC\s0 also uses these directories when searching for ordinary +libraries for the \fB\-l\fR option (but directories specified with +\&\fB\-L\fR come first). +.Ip "\fB\s-1LANG\s0\fR" 4 +.IX Item "LANG" +This variable is used to pass locale information to the compiler. One way in +which this information is used is to determine the character set to be used +when character literals, string literals and comments are parsed in C and \*(C+. +When the compiler is configured to allow multibyte characters, +the following values for \fB\s-1LANG\s0\fR are recognized: +.RS 4 +.Ip "\fBC-JIS\fR" 4 +.IX Item "C-JIS" +Recognize \s-1JIS\s0 characters. +.Ip "\fBC-SJIS\fR" 4 +.IX Item "C-SJIS" +Recognize \s-1SJIS\s0 characters. +.Ip "\fBC-EUCJP\fR" 4 +.IX Item "C-EUCJP" +Recognize \s-1EUCJP\s0 characters. +.RE +.RS 4 +.Sp +If \fB\s-1LANG\s0\fR is not defined, or if it has some other value, then the +compiler will use mblen and mbtowc as defined by the default locale to +recognize and translate multibyte characters. +.RE +.PP +Some additional environments variables affect the behavior of the +preprocessor. +.Ip "\fB\s-1CPATH\s0\fR" 4 +.IX Item "CPATH" +.PD 0 +.Ip "\fBC_INCLUDE_PATH\fR" 4 +.IX Item "C_INCLUDE_PATH" +.Ip "\fB\s-1CPLUS_INCLUDE_PATH\s0\fR" 4 +.IX Item "CPLUS_INCLUDE_PATH" +.Ip "\fB\s-1OBJC_INCLUDE_PATH\s0\fR" 4 +.IX Item "OBJC_INCLUDE_PATH" +.PD +Each variable's value is a list of directories separated by a special +character, much like \fB\s-1PATH\s0\fR, in which to look for header files. +The special character, \f(CW\*(C`PATH_SEPARATOR\*(C'\fR, is target-dependent and +determined at \s-1GCC\s0 build time. For Windows-based targets it is a +semicolon, and for almost all other targets it is a colon. +.Sp +\&\fB\s-1CPATH\s0\fR specifies a list of directories to be searched as if +specified with \fB\-I\fR, but after any paths given with \fB\-I\fR +options on the command line. The environment variable is used +regardless of which language is being preprocessed. +.Sp +The remaining environment variables apply only when preprocessing the +particular language indicated. Each specifies a list of directories +to be searched as if specified with \fB\-isystem\fR, but after any +paths given with \fB\-isystem\fR options on the command line. +.Ip "\fB\s-1DEPENDENCIES_OUTPUT\s0\fR" 4 +.IX Item "DEPENDENCIES_OUTPUT" +@anchor{\s-1DEPENDENCIES_OUTPUT\s0} +If this variable is set, its value specifies how to output +dependencies for Make based on the non-system header files processed +by the compiler. System header files are ignored in the dependency +output. +.Sp +The value of \fB\s-1DEPENDENCIES_OUTPUT\s0\fR can be just a file name, in +which case the Make rules are written to that file, guessing the target +name from the source file name. Or the value can have the form +\&\fIfile\fR\fB \fR\fItarget\fR, in which case the rules are written to +file \fIfile\fR using \fItarget\fR as the target name. +.Sp +In other words, this environment variable is equivalent to combining +the options \fB\-MM\fR and \fB\-MF\fR, +with an optional \fB\-MT\fR switch too. +.Ip "\fB\s-1SUNPRO_DEPENDENCIES\s0\fR" 4 +.IX Item "SUNPRO_DEPENDENCIES" +This variable is the same as the environment variable +\&\fB\s-1DEPENDENCIES_OUTPUT\s0\fR, except that +system header files are not ignored, so it implies \fB\-M\fR rather +than \fB\-MM\fR. However, the dependence on the main input file is +omitted. +.SH "BUGS" +.IX Header "BUGS" +For instructions on reporting bugs, see +<\fBhttp://gcc.gnu.org/bugs.html\fR>. Use of the \fBgccbug\fR +script to report bugs is recommended. +.SH "FOOTNOTES" +.IX Header "FOOTNOTES" +.Ip "1." 4 +On some systems, \fBgcc \-shared\fR +needs to build supplementary stub code for constructors to work. On +multi-libbed systems, \fBgcc \-shared\fR must select the correct support +libraries to link against. Failing to supply the correct flags may lead +to subtle defects. Supplying them in cases where they are not necessary +is innocuous. +.SH "SEE ALSO" +.IX Header "SEE ALSO" +\&\fIgpl\fR\|(7), \fIgfdl\fR\|(7), \fIfsf-funding\fR\|(7), +\&\fIcpp\fR\|(1), \fIgcov\fR\|(1), \fIg77\fR\|(1), \fIas\fR\|(1), \fIld\fR\|(1), \fIgdb\fR\|(1), \fIadb\fR\|(1), \fIdbx\fR\|(1), \fIsdb\fR\|(1) +and the Info entries for \fIgcc\fR, \fIcpp\fR, \fIg77\fR, \fIas\fR, +\&\fIld\fR, \fIbinutils\fR and \fIgdb\fR. +.SH "AUTHOR" +.IX Header "AUTHOR" +See the Info entry for \fBgcc\fR, or +<\fBhttp://gcc.gnu.org/onlinedocs/gcc/Contributors.html\fR>, +for contributors to \s-1GCC\s0. +.SH "COPYRIGHT" +.IX Header "COPYRIGHT" +Copyright (c) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, +1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc. +.PP +Permission is granted to copy, distribute and/or modify this document +under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.1 or +any later version published by the Free Software Foundation; with the +Invariant Sections being ``\s-1GNU\s0 General Public License'' and ``Funding +Free Software'', the Front-Cover texts being (a) (see below), and with +the Back-Cover Texts being (b) (see below). A copy of the license is +included in the \fIgfdl\fR\|(7) man page. +.PP +(a) The \s-1FSF\s0's Front-Cover Text is: +.PP +.Vb 1 +\& A GNU Manual +.Ve +(b) The \s-1FSF\s0's Back-Cover Text is: +.PP +.Vb 3 +\& You have freedom to copy and modify this GNU Manual, like GNU +\& software. Copies published by the Free Software Foundation raise +\& funds for GNU development. +.Ve diff --git a/contrib/gcc/doc/gcov.1 b/contrib/gcc/doc/gcov.1 new file mode 100644 index 0000000..35871cc --- /dev/null +++ b/contrib/gcc/doc/gcov.1 @@ -0,0 +1,453 @@ +.\" Automatically generated by Pod::Man version 1.15 +.\" Tue Nov 19 18:17:13 2002 +.\" +.\" Standard preamble: +.\" ====================================================================== +.de Sh \" Subsection heading +.br +.if t .Sp +.ne 5 +.PP +\fB\\$1\fR +.PP +.. +.de Sp \" Vertical space (when we can't use .PP) +.if t .sp .5v +.if n .sp +.. +.de Ip \" List item +.br +.ie \\n(.$>=3 .ne \\$3 +.el .ne 3 +.IP "\\$1" \\$2 +.. +.de Vb \" Begin verbatim text +.ft CW +.nf +.ne \\$1 +.. +.de Ve \" End verbatim text +.ft R + +.fi +.. +.\" Set up some character translations and predefined strings. \*(-- will +.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left +.\" double quote, and \*(R" will give a right double quote. | will give a +.\" real vertical bar. \*(C+ will give a nicer C++. Capital omega is used +.\" to do unbreakable dashes and therefore won't be available. \*(C` and +.\" \*(C' expand to `' in nroff, nothing in troff, for use with C<> +.tr \(*W-|\(bv\*(Tr +.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p' +.ie n \{\ +. ds -- \(*W- +. ds PI pi +. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch +. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch +. ds L" "" +. ds R" "" +. ds C` "" +. ds C' "" +'br\} +.el\{\ +. ds -- \|\(em\| +. ds PI \(*p +. ds L" `` +. ds R" '' +'br\} +.\" +.\" If the F register is turned on, we'll generate index entries on stderr +.\" for titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and +.\" index entries marked with X<> in POD. Of course, you'll have to process +.\" the output yourself in some meaningful fashion. +.if \nF \{\ +. de IX +. tm Index:\\$1\t\\n%\t"\\$2" +.. +. nr % 0 +. rr F +.\} +.\" +.\" For nroff, turn off justification. Always turn off hyphenation; it +.\" makes way too many mistakes in technical documents. +.hy 0 +.if n .na +.\" +.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2). +.\" Fear. Run. Save yourself. No user-serviceable parts. +.bd B 3 +. \" fudge factors for nroff and troff +.if n \{\ +. ds #H 0 +. ds #V .8m +. ds #F .3m +. ds #[ \f1 +. ds #] \fP +.\} +.if t \{\ +. ds #H ((1u-(\\\\n(.fu%2u))*.13m) +. ds #V .6m +. ds #F 0 +. ds #[ \& +. ds #] \& +.\} +. \" simple accents for nroff and troff +.if n \{\ +. ds ' \& +. ds ` \& +. ds ^ \& +. ds , \& +. ds ~ ~ +. ds / +.\} +.if t \{\ +. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u" +. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u' +. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u' +. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u' +. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u' +. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u' +.\} +. \" troff and (daisy-wheel) nroff accents +.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V' +.ds 8 \h'\*(#H'\(*b\h'-\*(#H' +.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#] +.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H' +.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u' +.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#] +.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#] +.ds ae a\h'-(\w'a'u*4/10)'e +.ds Ae A\h'-(\w'A'u*4/10)'E +. \" corrections for vroff +.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u' +.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u' +. \" for low resolution devices (crt and lpr) +.if \n(.H>23 .if \n(.V>19 \ +\{\ +. ds : e +. ds 8 ss +. ds o a +. ds d- d\h'-1'\(ga +. ds D- D\h'-1'\(hy +. ds th \o'bp' +. ds Th \o'LP' +. ds ae ae +. ds Ae AE +.\} +.rm #[ #] #H #V #F C +.\" ====================================================================== +.\" +.IX Title "GCOV 1" +.TH GCOV 1 "gcc-3.2.1" "2002-11-19" "GNU" +.UC +.SH "NAME" +gcov \- coverage testing tool +.SH "SYNOPSIS" +.IX Header "SYNOPSIS" +gcov [\fB\-v\fR|\fB\*(--version\fR] [\fB\-h\fR|\fB\*(--help\fR] + [\fB\-b\fR|\fB\*(--branch-probabilities\fR] [\fB\-c\fR|\fB\*(--branch-counts\fR] + [\fB\-n\fR|\fB\*(--no-output\fR] [\fB\-l\fR|\fB\*(--long-file-names\fR] + [\fB\-f\fR|\fB\*(--function-summaries\fR] + [\fB\-o\fR|\fB\*(--object-directory\fR \fIdirectory\fR] \fIsourcefile\fR +.SH "DESCRIPTION" +.IX Header "DESCRIPTION" +\&\fBgcov\fR is a test coverage program. Use it in concert with \s-1GCC\s0 +to analyze your programs to help create more efficient, faster +running code. You can use \fBgcov\fR as a profiling tool to help +discover where your optimization efforts will best affect your code. You +can also use \fBgcov\fR along with the other profiling tool, +\&\fBgprof\fR, to assess which parts of your code use the greatest amount +of computing time. +.PP +Profiling tools help you analyze your code's performance. Using a +profiler such as \fBgcov\fR or \fBgprof\fR, you can find out some +basic performance statistics, such as: +.Ip "\(bu" 4 +how often each line of code executes +.Ip "\(bu" 4 +what lines of code are actually executed +.Ip "\(bu" 4 +how much computing time each section of code uses +.PP +Once you know these things about how your code works when compiled, you +can look at each module to see which modules should be optimized. +\&\fBgcov\fR helps you determine where to work on optimization. +.PP +Software developers also use coverage testing in concert with +testsuites, to make sure software is actually good enough for a release. +Testsuites can verify that a program works as expected; a coverage +program tests to see how much of the program is exercised by the +testsuite. Developers can then determine what kinds of test cases need +to be added to the testsuites to create both better testing and a better +final product. +.PP +You should compile your code without optimization if you plan to use +\&\fBgcov\fR because the optimization, by combining some lines of code +into one function, may not give you as much information as you need to +look for `hot spots' where the code is using a great deal of computer +time. Likewise, because \fBgcov\fR accumulates statistics by line (at +the lowest resolution), it works best with a programming style that +places only one statement on each line. If you use complicated macros +that expand to loops or to other control structures, the statistics are +less helpful\-\-\-they only report on the line where the macro call +appears. If your complex macros behave like functions, you can replace +them with inline functions to solve this problem. +.PP +\&\fBgcov\fR creates a logfile called \fI\fIsourcefile\fI.gcov\fR which +indicates how many times each line of a source file \fI\fIsourcefile\fI.c\fR +has executed. You can use these logfiles along with \fBgprof\fR to aid +in fine-tuning the performance of your programs. \fBgprof\fR gives +timing information you can use along with the information you get from +\&\fBgcov\fR. +.PP +\&\fBgcov\fR works only on code compiled with \s-1GCC\s0. It is not +compatible with any other profiling or test coverage mechanism. +.SH "OPTIONS" +.IX Header "OPTIONS" +.Ip "\fB\-h\fR" 4 +.IX Item "-h" +.PD 0 +.Ip "\fB\*(--help\fR" 4 +.IX Item "help" +.PD +Display help about using \fBgcov\fR (on the standard output), and +exit without doing any further processing. +.Ip "\fB\-v\fR" 4 +.IX Item "-v" +.PD 0 +.Ip "\fB\*(--version\fR" 4 +.IX Item "version" +.PD +Display the \fBgcov\fR version number (on the standard output), +and exit without doing any further processing. +.Ip "\fB\-b\fR" 4 +.IX Item "-b" +.PD 0 +.Ip "\fB\*(--branch-probabilities\fR" 4 +.IX Item "branch-probabilities" +.PD +Write branch frequencies to the output file, and write branch summary +info to the standard output. This option allows you to see how often +each branch in your program was taken. +.Ip "\fB\-c\fR" 4 +.IX Item "-c" +.PD 0 +.Ip "\fB\*(--branch-counts\fR" 4 +.IX Item "branch-counts" +.PD +Write branch frequencies as the number of branches taken, rather than +the percentage of branches taken. +.Ip "\fB\-n\fR" 4 +.IX Item "-n" +.PD 0 +.Ip "\fB\*(--no-output\fR" 4 +.IX Item "no-output" +.PD +Do not create the \fBgcov\fR output file. +.Ip "\fB\-l\fR" 4 +.IX Item "-l" +.PD 0 +.Ip "\fB\*(--long-file-names\fR" 4 +.IX Item "long-file-names" +.PD +Create long file names for included source files. For example, if the +header file \fIx.h\fR contains code, and was included in the file +\&\fIa.c\fR, then running \fBgcov\fR on the file \fIa.c\fR will produce +an output file called \fIa.c.x.h.gcov\fR instead of \fIx.h.gcov\fR. +This can be useful if \fIx.h\fR is included in multiple source files. +.Ip "\fB\-f\fR" 4 +.IX Item "-f" +.PD 0 +.Ip "\fB\*(--function-summaries\fR" 4 +.IX Item "function-summaries" +.PD +Output summaries for each function in addition to the file level summary. +.Ip "\fB\-o\fR \fIdirectory\fR" 4 +.IX Item "-o directory" +.PD 0 +.Ip "\fB\*(--object-directory\fR \fIdirectory\fR" 4 +.IX Item "object-directory directory" +.PD +The directory where the object files live. Gcov will search for \fI.bb\fR, +\&\fI.bbg\fR, and \fI.da\fR files in this directory. +.PP +When using \fBgcov\fR, you must first compile your program with two +special \s-1GCC\s0 options: \fB\-fprofile-arcs \-ftest-coverage\fR. +This tells the compiler to generate additional information needed by +gcov (basically a flow graph of the program) and also includes +additional code in the object files for generating the extra profiling +information needed by gcov. These additional files are placed in the +directory where the source code is located. +.PP +Running the program will cause profile output to be generated. For each +source file compiled with \fB\-fprofile-arcs\fR, an accompanying \fI.da\fR +file will be placed in the source directory. +.PP +Running \fBgcov\fR with your program's source file names as arguments +will now produce a listing of the code along with frequency of execution +for each line. For example, if your program is called \fItmp.c\fR, this +is what you see when you use the basic \fBgcov\fR facility: +.PP +.Vb 5 +\& $ gcc -fprofile-arcs -ftest-coverage tmp.c +\& $ a.out +\& $ gcov tmp.c +\& 87.50% of 8 source lines executed in file tmp.c +\& Creating tmp.c.gcov. +.Ve +The file \fItmp.c.gcov\fR contains output from \fBgcov\fR. +Here is a sample: +.PP +.Vb 3 +\& main() +\& { +\& 1 int i, total; +.Ve +.Vb 1 +\& 1 total = 0; +.Ve +.Vb 2 +\& 11 for (i = 0; i < 10; i++) +\& 10 total += i; +.Ve +.Vb 5 +\& 1 if (total != 45) +\& ###### printf ("Failure\en"); +\& else +\& 1 printf ("Success\en"); +\& 1 } +.Ve +When you use the \fB\-b\fR option, your output looks like this: +.PP +.Vb 6 +\& $ gcov -b tmp.c +\& 87.50% of 8 source lines executed in file tmp.c +\& 80.00% of 5 branches executed in file tmp.c +\& 80.00% of 5 branches taken at least once in file tmp.c +\& 50.00% of 2 calls executed in file tmp.c +\& Creating tmp.c.gcov. +.Ve +Here is a sample of a resulting \fItmp.c.gcov\fR file: +.PP +.Vb 3 +\& main() +\& { +\& 1 int i, total; +.Ve +.Vb 1 +\& 1 total = 0; +.Ve +.Vb 5 +\& 11 for (i = 0; i < 10; i++) +\& branch 0 taken = 91% +\& branch 1 taken = 100% +\& branch 2 taken = 100% +\& 10 total += i; +.Ve +.Vb 9 +\& 1 if (total != 45) +\& branch 0 taken = 100% +\& ###### printf ("Failure\en"); +\& call 0 never executed +\& branch 1 never executed +\& else +\& 1 printf ("Success\en"); +\& call 0 returns = 100% +\& 1 } +.Ve +For each basic block, a line is printed after the last line of the basic +block describing the branch or call that ends the basic block. There can +be multiple branches and calls listed for a single source line if there +are multiple basic blocks that end on that line. In this case, the +branches and calls are each given a number. There is no simple way to map +these branches and calls back to source constructs. In general, though, +the lowest numbered branch or call will correspond to the leftmost construct +on the source line. +.PP +For a branch, if it was executed at least once, then a percentage +indicating the number of times the branch was taken divided by the +number of times the branch was executed will be printed. Otherwise, the +message ``never executed'' is printed. +.PP +For a call, if it was executed at least once, then a percentage +indicating the number of times the call returned divided by the number +of times the call was executed will be printed. This will usually be +100%, but may be less for functions call \f(CW\*(C`exit\*(C'\fR or \f(CW\*(C`longjmp\*(C'\fR, +and thus may not return every time they are called. +.PP +The execution counts are cumulative. If the example program were +executed again without removing the \fI.da\fR file, the count for the +number of times each line in the source was executed would be added to +the results of the previous \fIrun\fR\|(s). This is potentially useful in +several ways. For example, it could be used to accumulate data over a +number of program runs as part of a test verification suite, or to +provide more accurate long-term information over a large number of +program runs. +.PP +The data in the \fI.da\fR files is saved immediately before the program +exits. For each source file compiled with \fB\-fprofile-arcs\fR, the profiling +code first attempts to read in an existing \fI.da\fR file; if the file +doesn't match the executable (differing number of basic block counts) it +will ignore the contents of the file. It then adds in the new execution +counts and finally writes the data to the file. +.Sh "Using \fBgcov\fP with \s-1GCC\s0 Optimization" +.IX Subsection "Using gcov with GCC Optimization" +If you plan to use \fBgcov\fR to help optimize your code, you must +first compile your program with two special \s-1GCC\s0 options: +\&\fB\-fprofile-arcs \-ftest-coverage\fR. Aside from that, you can use any +other \s-1GCC\s0 options; but if you want to prove that every single line +in your program was executed, you should not compile with optimization +at the same time. On some machines the optimizer can eliminate some +simple code lines by combining them with other lines. For example, code +like this: +.PP +.Vb 4 +\& if (a != b) +\& c = 1; +\& else +\& c = 0; +.Ve +can be compiled into one instruction on some machines. In this case, +there is no way for \fBgcov\fR to calculate separate execution counts +for each line because there isn't separate code for each line. Hence +the \fBgcov\fR output looks like this if you compiled the program with +optimization: +.PP +.Vb 4 +\& 100 if (a != b) +\& 100 c = 1; +\& 100 else +\& 100 c = 0; +.Ve +The output shows that this block of code, combined by optimization, +executed 100 times. In one sense this result is correct, because there +was only one instruction representing all four of these lines. However, +the output does not indicate how many times the result was 0 and how +many times the result was 1. +.SH "SEE ALSO" +.IX Header "SEE ALSO" +\&\fIgpl\fR\|(7), \fIgfdl\fR\|(7), \fIfsf-funding\fR\|(7), \fIgcc\fR\|(1) and the Info entry for \fIgcc\fR. +.SH "COPYRIGHT" +.IX Header "COPYRIGHT" +Copyright (c) 1996, 1997, 1999, 2000, 2001 Free Software Foundation, Inc. +.PP +Permission is granted to copy, distribute and/or modify this document +under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.1 or +any later version published by the Free Software Foundation; with the +Invariant Sections being ``\s-1GNU\s0 General Public License'' and ``Funding +Free Software'', the Front-Cover texts being (a) (see below), and with +the Back-Cover Texts being (b) (see below). A copy of the license is +included in the \fIgfdl\fR\|(7) man page. +.PP +(a) The \s-1FSF\s0's Front-Cover Text is: +.PP +.Vb 1 +\& A GNU Manual +.Ve +(b) The \s-1FSF\s0's Back-Cover Text is: +.PP +.Vb 3 +\& You have freedom to copy and modify this GNU Manual, like GNU +\& software. Copies published by the Free Software Foundation raise +\& funds for GNU development. +.Ve diff --git a/contrib/gcc/doc/install.texi b/contrib/gcc/doc/install.texi index e9f8bee..350d365 100644 --- a/contrib/gcc/doc/install.texi +++ b/contrib/gcc/doc/install.texi @@ -123,9 +123,6 @@ Free Documentation License}''. @node Installing GCC, Binaries, , Top @end ifnothtml @ifset indexhtml -@html -<h1 align="center">Installing GCC</h1> -@end html @ifnothtml @chapter Installing GCC @end ifnothtml @@ -151,11 +148,7 @@ We recommend you browse the entire generic installation instructions before you proceed. Lists of successful builds for released versions of GCC are -available at our web pages for -@uref{http://gcc.gnu.org/gcc-3.1/buildstat.html,,3.1}, -@uref{http://gcc.gnu.org/gcc-3.0/buildstat.html,,3.0} -and -@uref{http://gcc.gnu.org/gcc-2.95/buildstat.html,,2.95}. +available at @uref{http://gcc.gnu.org/buildstat.html}. These lists are updated as new information becomes available. The installation procedure itself is broken into five steps. @@ -198,7 +191,7 @@ not yet been merged into the main part of this manual. @end ifhtml @html -<hr> +<hr /> <p> @end html @ifhtml @@ -214,9 +207,6 @@ not yet been merged into the main part of this manual. @node Downloading the source, Configuration, , Installing GCC @end ifnothtml @ifset downloadhtml -@html -<h1 align="center">Downloading GCC</h1> -@end html @ifnothtml @chapter Downloading GCC @end ifnothtml @@ -255,7 +245,7 @@ components of the binutils you intend to build alongside the compiler @file{opcodes}, @dots{}) to the directory containing the GCC sources. @html -<hr> +<hr /> <p> @end html @ifhtml @@ -269,9 +259,6 @@ components of the binutils you intend to build alongside the compiler @node Configuration, Building, Downloading the source, Installing GCC @end ifnothtml @ifset configurehtml -@html -<h1 align="center">Installing GCC: Configuration</h1> -@end html @ifnothtml @chapter Installing GCC: Configuration @end ifnothtml @@ -368,7 +355,6 @@ subdirectory of @var{objdir} or vice versa. These additional options control where certain parts of the distribution are installed. Normally you should not need to use these options. @table @code - @item --exec-prefix=@var{dirname} Specify the toplevel installation directory for architecture-dependent files. The default is @file{@var{prefix}}. @@ -435,9 +421,9 @@ complex conversion patterns. As a basic rule, @var{prefix} (and @var{suffix}) are prepended (appended) before further transformations can happen with a special transformation script @var{pattern}. -As currently implemented, this options only take effect for native +As currently implemented, these options only take effect for native builds; cross compiler binaries' names are not transformed even when a -transformation is explicitly asked for by one of this options. +transformation is explicitly asked for by one of these options. For native builds, some of the installed programs are also installed with the target alias in front of their name, as in @@ -473,12 +459,49 @@ any in that directory---are not part of GCC@. They are part of other programs---perhaps many others. (GCC installs its own header files in another directory which is based on the @option{--prefix} value.) +Both the local-prefix include directory and the GCC-prefix include +directory are part of GCC's "system include" directories. Although these +two directories are not fixed, they need to be searched in the proper +order for the correct processing of the include_next directive. The +local-prefix include directory is searched before the GCC-prefix +include directory. Another characteristic of system include directories +is that pedantic warnings are turned off for headers in these directories. + +Some autoconf macros add @option{-I @var{directory}} options to the +compiler command line, to ensure that directories containing installed +packages' headers are searched. When @var{directory} is one of GCC's +system include directories, GCC will ignore the option so that system +directories continue to be processed in the correct order. This +may result in a search order different from what was specified but the +directory will still be searched. + +GCC automatically searches for ordinary libraries using +@env{GCC_EXEC_PREFIX}. Thus, when the same installation prefix is +used for both GCC and packages, GCC will automatically search for +both headers and libraries. This provides a configuration that is +easy to use. GCC behaves in a manner similar to that when it is +installed as a system compiler in @file{/usr}. + +Sites that need to install multiple versions of GCC may not want to +use the above simple configuration. It is possible to use the +@option{--program-prefix}, @option{--program-suffix} and +@option{--program-transform-name} options to install multiple versions +into a single directory, but it may be simpler to use different prefixes +and the @option{--with-local-prefix} option to specify the location of the +site-specific files for each version. It will then be necessary for +users to specify explicitly the location of local site libraries +(e.g., with @env{LIBRARY_PATH}). + +The same value can be used for both @option{--with-local-prefix} and +@option{--prefix} provided it is not @file{/usr}. This can be used +to avoid the default search of @file{/usr/local/include}. + @strong{Do not} specify @file{/usr} as the @option{--with-local-prefix}! The directory you use for @option{--with-local-prefix} @strong{must not} contain any of the system's standard header files. If it did contain them, certain programs would be miscompiled (including GNU Emacs, on certain targets), because this would override and nullify the header -file corrections made by the @code{fixincludes} script. +file corrections made by the @command{fixincludes} script. Indications are that people who use this option use it based on mistaken ideas of what it is for. People use it as if it specified where to @@ -516,15 +539,25 @@ configured with @option{--with-gnu-as}.) If you have more than one assembler installed on your system, you may want to use this option in connection with @option{--with-as=@var{pathname}}. -The systems where it makes a difference whether you use the GNU assembler are -@samp{hppa1.0-@var{any}-@var{any}}, @samp{hppa1.1-@var{any}-@var{any}}, -@samp{i386-@var{any}-sysv}, @samp{i386-@var{any}-isc}, -@samp{i860-@var{any}-bsd}, @samp{m68k-bull-sysv}, -@samp{m68k-hp-hpux}, @samp{m68k-sony-bsd}, -@samp{m68k-altos-sysv}, @samp{m68000-hp-hpux}, -@samp{m68000-att-sysv}, @samp{@var{any}-lynx-lynxos}, -and @samp{mips-@var{any}}. -On any other system, @option{--with-gnu-as} has no effect. +The following systems are the only ones where it makes a difference +whether you use the GNU assembler. On any other system, +@option{--with-gnu-as} has no effect. + +@itemize bullet +@item @samp{hppa1.0-@var{any}-@var{any}} +@item @samp{hppa1.1-@var{any}-@var{any}} +@item @samp{i386-@var{any}-sysv} +@item @samp{i386-@var{any}-isc} +@item @samp{i860-@var{any}-bsd} +@item @samp{m68k-bull-sysv} +@item @samp{m68k-hp-hpux} +@item @samp{m68k-sony-bsd} +@item @samp{m68k-altos-sysv} +@item @samp{m68000-hp-hpux} +@item @samp{m68000-att-sysv} +@item @samp{@var{any}-lynx-lynxos} +@item @samp{mips-@var{any}} +@end itemize On the systems listed above (except for the HP-PA, for ISC on the 386, and for @samp{mips-sgi-irix5.*}), if you use the GNU assembler, @@ -601,7 +634,6 @@ predefined set of them. Some targets provide finer-grained control over which multilibs are built (e.g., @option{--disable-softfloat}): @table @code - @item arc-*-elf* biendian. @@ -829,10 +861,10 @@ Some options which only apply to building cross compilers: @item --with-headers=@var{dir} Specifies a directory which has target include files. -@emph{This options is required} when building a cross +@emph{This option is required} when building a cross compiler, if @file{@var{prefix}/@var{target}/sys-include} doesn't pre-exist. These include files will be copied into the @file{gcc} install directory. -Fixincludes will be run on these files to make them compatible with +@command{fixincludes} will be run on these files to make them compatible with GCC. @item --with-libs=``@var{dir1} @var{dir2} @dots{} @var{dirN}'' Specifies a list of directories which contain the target runtime @@ -850,7 +882,7 @@ Note that each @option{--enable} option has a corresponding corresponding @option{--without} option. @html -<hr> +<hr /> <p> @end html @ifhtml @@ -864,9 +896,6 @@ corresponding @option{--without} option. @node Building, Testing, Configuration, Installing GCC @end ifnothtml @ifset buildhtml -@html -<h1 align="center">Installing GCC: Building</h1> -@end html @ifnothtml @chapter Building @end ifnothtml @@ -903,7 +932,7 @@ because you have previously configured the compiler in the source directory. Make sure you have done all the necessary preparations. If you build GCC on a BSD system using a directory stored in an old System -V file system, problems may occur in running @code{fixincludes} if the +V file system, problems may occur in running @command{fixincludes} if the System V file system doesn't support symbolic links. These problems result in a failure to fix the declaration of @code{size_t} in @file{sys/types.h}. If you find that @code{size_t} is a signed type and @@ -955,14 +984,17 @@ bootstrap} except that object files from the stage1 and stage2 of the 3-stage bootstrap of the compiler are deleted as soon as they are no longer needed. - If you want to save additional space during the bootstrap and in the final installation as well, you can build the compiler binaries -without debugging information with @samp{make CFLAGS='-O' LIBCFLAGS='-g --O2' LIBCXXFLAGS='-g -O2 -fno-implicit-templates' bootstrap}. This will save +without debugging information as in the following example. This will save roughly 40% of disk space both for the bootstrap and the final installation. (Libraries will still contain debugging information.) +@example + make CFLAGS='-O' LIBCFLAGS='-g -O2' \ + LIBCXXFLAGS='-g -O2 -fno-implicit-templates' bootstrap +@end example + If you wish to use non-default GCC flags when compiling the stage2 and stage3 compilers, set @code{BOOT_CFLAGS} on the command line when doing @samp{make bootstrap}. Non-default optimization flags are less well @@ -1058,9 +1090,9 @@ used to disable building the Ada front end. Additional build tools (such as @command{gnatmake}) or a working GNAT run-time library installation are usually @emph{not} required. However, -if you want to boostrap the compiler using a minimal version of GNAT, +if you want to bootstrap the compiler using a minimal version of GNAT, you have to issue the following commands before invoking @samp{make -boostrap} (this assumes that you start with an unmodified and consistent +bootstrap} (this assumes that you start with an unmodified and consistent source distribution): @example @@ -1092,7 +1124,7 @@ Currently, when compiling the Ada front end, you cannot use the parallel build feature described in the previous section. @html -<hr> +<hr /> <p> @end html @ifhtml @@ -1106,9 +1138,6 @@ build feature described in the previous section. @node Testing, Final install, Building, Installing GCC @end ifnothtml @ifset testhtml -@html -<h1 align="center">Installing GCC: Testing</h1> -@end html @ifnothtml @chapter Installing GCC: Testing @end ifnothtml @@ -1167,6 +1196,11 @@ The testing process will try to test as many components in the GCC distribution as possible, including the C, C++, Objective-C and Fortran compilers as well as the C++ and Java runtime libraries. +While running the testsuite, DejaGnu might emit messages resembling +@samp{WARNING: Couldn't find the global config file.} or +@samp{WARNING: Couldn't find tool init file}. +These messages are harmless and do not affect the validity of the tests. + @section How can I run the test suite on selected tests? As a first possibility to cut down the number of tests that are run it is @@ -1194,6 +1228,17 @@ To get a list of the possible @file{*.exp} files, pipe the output of @samp{make check} into a file and look at the @samp{Running @dots{} .exp} lines. +To run only the tests for a library, run @samp{make check} from the +the library's testsuite in a subdirectory of the object directory: +@file{libstdc++-v3/testsuite} or @file{libcgj/testsuite}. + +@section Additional testing for Java Class Libraries + +The @uref{http://sources.redhat.com/mauve/,,Mauve Project} provides +a suite of tests for the Java Class Libraries. This suite can be run +as part of libgcj testing by specifying the location of the Mauve tree +when invoking @samp{make}, as in @samp{make MAUVEDIR=~/mauve check}. + @section How to interpret test results After the testsuite has run you'll find various @file{*.sum} and @file{*.log} @@ -1248,7 +1293,7 @@ few failing testcases are possible even on released versions and you should look here first if you think your results are unreasonable. @html -<hr> +<hr /> <p> @end html @ifhtml @@ -1262,9 +1307,6 @@ should look here first if you think your results are unreasonable. @node Final install, , Testing, Installing GCC @end ifnothtml @ifset finalinstallhtml -@html -<h1 align="center">Installing GCC: Final installation</h1> -@end html @ifnothtml @chapter Installing GCC: Final installation @end ifnothtml @@ -1274,6 +1316,9 @@ Now that GCC has been built (and optionally tested), you can install it with cd @var{objdir}; make install @end example +We strongly recommend to install into a target directory where there is +no previous version of GCC present. + That step completes the installation of GCC; user level binaries can be found in @file{@var{prefix}/bin} where @var{prefix} is the value you specified with the @option{--prefix} to configure (or @file{/usr/local} @@ -1286,10 +1331,8 @@ parts of the compiler in @file{@var{libdir}/gcc-lib}; documentation in info format in @file{@var{infodir}} (normally @file{@var{prefix}/info}). If you built a released version of GCC using @samp{make bootstrap} then please -quickly review the build status page for -@uref{http://gcc.gnu.org/gcc-3.1/buildstat.html,,3.1}, -@uref{http://gcc.gnu.org/gcc-3.0/buildstat.html,,3.0}, or -@uref{http://gcc.gnu.org/gcc-2.95/buildstat.html,,2.95}. +quickly review the build status page for your release, available from +@uref{http://gcc.gnu.org/buildstat.html}. If your system is not listed for the version of GCC that you built, send a note to @email{gcc@@gcc.gnu.org} indicating @@ -1362,7 +1405,7 @@ Free Software Foundation}, though such manuals may not be for the most recent version of GCC@. @html -<hr> +<hr /> <p> @end html @ifhtml @@ -1376,9 +1419,6 @@ recent version of GCC@. @node Binaries, Specific, Installing GCC, Top @end ifnothtml @ifset binarieshtml -@html -<h1 align="center">Installing GCC: Binaries</h1> -@end html @ifnothtml @chapter Installing GCC: Binaries @end ifnothtml @@ -1399,14 +1439,18 @@ contact their makers. AIX: @itemize @item -@uref{http://freeware.bull.net,,Bull's Freeware and Shareware Archive for AIX}; +@uref{http://www.bullfreeware.com,,Bull's Freeware and Shareware Archive for AIX}; @item -@uref{http://aixpdslib.seas.ucla.edu,,UCLA Software Library for AIX}; +@uref{http://aixpdslib.seas.ucla.edu,,UCLA Software Library for AIX}. @end itemize @item -DOS---@uref{http://www.delorie.com/djgpp/,,DJGPP}; +DOS---@uref{http://www.delorie.com/djgpp/,,DJGPP}. + +@item +Hitachi H8/300[HS]---@uref{http://h8300-hms.sourceforge.net/,,GNU +Development Tools for the Hitachi H8/300[HS] Series}. @item HP-UX: @@ -1420,13 +1464,16 @@ HP-UX: @item @uref{http://www.sco.com/skunkware/devtools/index.html#gcc,,SCO -OpenServer/Unixware}; +OpenServer/Unixware}. @item -Solaris 2 (SPARC, Intel)---@uref{http://www.sunfreeware.com/,,Sunfreeware}; +Sinix/Reliant Unix---@uref{ftp://ftp.siemens.de/sni/mr/pd/gnu/gcc,,Siemens}. + +@item +Solaris 2 (SPARC, Intel)---@uref{http://www.sunfreeware.com/,,Sunfreeware}. @item -SGI---@uref{http://freeware.sgi.com/,,SGI Freeware}; +SGI---@uref{http://freeware.sgi.com/,,SGI Freeware}. @item Windows 95, 98, and NT: @@ -1434,8 +1481,7 @@ Windows 95, 98, and NT: @item The @uref{http://sources.redhat.com/cygwin/,,Cygwin} project; @item -@uref{http://www.xraylith.wisc.edu/~khan/software/gnu-win32/,,GNU Win32} -related projects by Mumit Khan. +The @uref{http://www.mingw.org/,,MinGW} project. @end itemize @item @@ -1443,10 +1489,6 @@ related projects by Mumit Khan. Written Word} offers binaries for Solaris 2.5.1, 2.6, 2.7/SPARC, 2.7/Intel, IRIX 6.2, 6.5, Digital UNIX 4.0D, HP-UX 10.20, and HP-UX 11.00. -@item -Hitachi H8/300[HS]---@uref{http://h8300-hms.sourceforge.net/,,GNU -Development Tools for the Hitachi H8/300[HS] Series} - @end itemize In addition to those specific offerings, you can get a binary @@ -1459,7 +1501,7 @@ bootstrapping the compiler. An updated version of that disk is in the works. @html -<hr> +<hr /> <p> @end html @ifhtml @@ -1473,9 +1515,6 @@ works. @node Specific, Old, Binaries, Top @end ifnothtml @ifset specifichtml -@html -<h1 align="center">Host/target specific installation notes for GCC</h1> -@end html @ifnothtml @chapter Host/target specific installation notes for GCC @end ifnothtml @@ -1701,7 +1740,7 @@ GNU Compiler Collection on your machine. @html <!-- -------- host/target specific issues start here ---------------- --> -<hr> +<hr /> @end html @heading @anchor{1750a-*-*}1750a-*-* MIL-STD-1750A processors. This target is obsoleted in GCC 3.1. @@ -1742,8 +1781,7 @@ The 1750A's ``Load/Store Upper/Lower Byte'' instructions are not used by GCC@. @html -</p> -<hr> +<hr /> @end html @heading @anchor{a29k}a29k AMD Am29k-family processors. These are normally used in embedded @@ -1757,15 +1795,13 @@ You may need to make a variant of the file @file{a29k.h} for your particular configuration. @html -</p> -<hr> +<hr /> @end html @heading @anchor{a29k-*-bsd}a29k-*-bsd AMD Am29050 used in a system running a variant of BSD Unix. @html -</p> -<hr> +<hr /> @end html @heading @anchor{alpha*-*-*}alpha*-*-* @@ -1780,8 +1816,7 @@ debugging information, not the least of which is incorrect linking of shared libraries. @html -</p> -<hr> +<hr /> @end html @heading @anchor{alpha*-dec-osf*}alpha*-dec-osf* Systems using processors that implement the DEC Alpha architecture and @@ -1791,6 +1826,13 @@ Tru64 UNIX) operating system, for example the DEC Alpha AXP systems. Support for versions before @code{alpha*-dec-osf4} is obsoleted in GCC 3.1. (These are the versions which identify themselves as DEC OSF/1.) +In Digital Unix V4.0, virtual memory exhausted bootstrap failures +may be fixed by configuring with @option{--with-gc=simple}, +reconfiguring Kernel Virtual Memory and Swap parameters +per the @command{/usr/sbin/sys_check} Tuning Suggestions, +or applying the patch in +@uref{http://gcc.gnu.org/ml/gcc/2002-08/msg00822.html}. + In Tru64 UNIX V5.1, Compaq introduced a new assembler that does not currently (2001-06-13) work with @command{mips-tfile}. As a workaround, we need to use the old assembler, invoked via the barely documented @@ -1857,8 +1899,7 @@ DBX@. DEC is now aware of this problem with the assembler and hopes to provide a fix shortly. @html -</p> -<hr> +<hr /> @end html @heading @anchor{alphaev5-cray-unicosmk*}alphaev5-cray-unicosmk* Cray T3E systems running Unicos/Mk. @@ -1874,8 +1915,10 @@ need to tell GCC where to find the assembler and the linker. The simplest way to do so is by providing @option{--with-as} and @option{--with-ld} to @file{configure}, e.g.@: -@samp{configure --with-as=/opt/ctl/bin/cam --with-ld=/opt/ctl/bin/cld ---enable-languages=c} +@example + configure --with-as=/opt/ctl/bin/cam --with-ld=/opt/ctl/bin/cld \ + --enable-languages=c +@end example The comparison test during @samp{make bootstrap} fails on Unicos/Mk because the assembler inserts timestamps into object files. You should @@ -1883,16 +1926,14 @@ be able to work around this by doing @samp{make all} after getting this failure. @html -</p> -<hr> +<hr /> @end html @heading @anchor{arc-*-elf}arc-*-elf Argonaut ARC processor. This configuration is intended for embedded systems. @html -</p> -<hr> +<hr /> @end html @heading @anchor{arm-*-aout}arm-*-aout Advanced RISC Machines ARM-family processors. These are often used in @@ -1904,23 +1945,20 @@ You may need to make a variant of the file @file{arm.h} for your particular configuration. @html -</p> -<hr> +<hr /> @end html @heading @anchor{arm-*-elf}arm-*-elf This configuration is intended for embedded systems. @html -</p> -<hr> +<hr /> @end html @heading @anchor{arm*-*-linux-gnu}arm*-*-linux-gnu We require GNU binutils 2.10 or newer. @html -</p> -<hr> +<hr /> @end html @heading @anchor{arm-*-riscix}arm-*-riscix The ARM2 or ARM3 processor running RISC iX, Acorn's port of BSD Unix. @@ -1937,8 +1975,7 @@ debugging, pass @option{--with-gnu-as} to configure. You will need to install GNU @command{sed} before you can run configure. @html -</p> -<hr> +<hr /> @end html @heading @anchor{avr}avr @@ -1975,8 +2012,7 @@ The following error: indicates that you should upgrade to a newer version of the binutils. @html -</p> -<hr> +<hr /> @end html @heading @anchor{c4x}c4x @@ -2006,8 +2042,7 @@ can also be obtained from: @end itemize @html -</p> -<hr> +<hr /> @end html @heading @anchor{cris}CRIS @@ -2045,8 +2080,7 @@ information about this platform is available at @uref{http://developer.axis.com/}. @html -</p> -<hr> +<hr /> @end html @heading @anchor{dos}DOS @@ -2058,15 +2092,13 @@ compilation package DJGPP, which includes binaries as well as sources, and includes all the necessary compilation tools and libraries. @html -</p> -<hr> +<hr /> @end html @heading @anchor{dsp16xx}dsp16xx A port to the AT&T DSP1610 family of processors. @html -</p> -<hr> +<hr /> @end html @heading @anchor{*-*-freebsd*}*-*-freebsd* @@ -2096,15 +2128,17 @@ results on FreeBSD 3.0, 3.4, 4.0, 4.2, 4.3, 4.4, 4.5-STABLE and 5-CURRENT@. In principle, @option{--enable-threads} is now compatible with @option{--enable-libgcj} on FreeBSD@. However, it has only been built -and tested on i386-*-freebsd4.5 and alpha-*-freebsd5.0. The static +and tested on @samp{i386-*-freebsd4.5} and @samp{alpha-*-freebsd5.0}. +The static library may be incorrectly built (symbols are missing at link time). There is a rare timing-based startup hang (probably involves an assupmtion about the thread library). Multi-threaded boehm-gc (required for libjava) exposes severe threaded signal-handling bugs on FreeBSD before 4.5-RELEASE. The alpha port may not fully bootstrap without some manual -intervention: gcjh will crash with a floating-point exception while +intervention: @command{gcjh} will crash with a floating-point exception while generating @file{java/lang/Double.h} (just copy the version built on -i386-*-freebsd* and rerun the top-level gmake with no arguments and it +@samp{i386-*-freebsd*} and rerun the top-level @command{gmake} with no +arguments and it should properly complete the bootstrap). Other CPU architectures supported by FreeBSD will require additional configuration tuning in, at the very least, both boehm-gc and libffi. @@ -2112,8 +2146,7 @@ the very least, both boehm-gc and libffi. Shared @file{libgcc_s.so} is now built and installed by default. @html -</p> -<hr> +<hr /> @end html @heading @anchor{elxsi-elxsi-bsd}elxsi-elxsi-bsd The Elxsi's C compiler has known limitations that prevent it from @@ -2122,8 +2155,7 @@ compiling GCC@. Please contact @email{mrs@@wrs.com} for more details. Support for this processor is obsoleted in GCC 3.1. @html -</p> -<hr> +<hr /> @end html @heading @anchor{h8300-hms}h8300-hms Hitachi H8/300 series of processors. @@ -2136,14 +2168,14 @@ first three arguments in function calls in registers. Structures are no longer a multiple of 2 bytes. @html -</p> -<hr> +<hr /> @end html @heading @anchor{hppa*-hp-hpux*}hppa*-hp-hpux* We @emph{highly} recommend using gas/binutils 2.8 or newer on all hppa platforms; you may encounter a variety of problems when using the HP -assembler. +assembler. The HP assembler does not work with the @samp{hppa64-hp-hpux11*} +port. Specifically, @option{-g} does not work on HP-UX (since that system uses a peculiar debugging format which GCC does not know about), unless you @@ -2151,15 +2183,15 @@ use GAS and GDB and configure GCC with the @uref{./configure.html#with-gnu-as,,@option{--with-gnu-as}} and @option{--with-as=@dots{}} options. -If you wish to use pa-risc 2.0 architecture support, you must use either -the HP assembler, gas/binutils 2.11 or a recent +If you wish to use the pa-risc 2.0 architecture support with a 32-bit +runtime, you must use either the HP assembler, gas/binutils 2.11 or newer, +or a recent @uref{ftp://sources.redhat.com/pub/binutils/snapshots,,snapshot of gas}. More specific information to @samp{hppa*-hp-hpux*} targets follows. @html -</p> -<hr> +<hr /> @end html @heading @anchor{hppa*-hp-hpux9}hppa*-hp-hpux9 @@ -2175,8 +2207,7 @@ and @env{SHELL} to @file{/bin/ksh} in your environment. @html -</p> -<hr> +<hr /> @end html @heading @anchor{hppa*-hp-hpux10}hppa*-hp-hpux10 @@ -2207,31 +2238,53 @@ bootstrap}. @html -</p> -<hr> +<hr /> @end html @heading @anchor{hppa*-hp-hpux11}hppa*-hp-hpux11 -GCC 3.0 and up support HP-UX 11. You must use GNU binutils 2.11 or above on -this platform. Thread support is not currently implemented for this -platform, so @option{--enable-threads} does not work. -See @uref{http://gcc.gnu.org/ml/gcc-prs/2002-01/msg00551.html} -and @uref{http://gcc.gnu.org/ml/gcc-bugs/2002-01/msg00663.html}. +GCC 3.0 and up support HP-UX 11. On 64-bit capable systems, there +are two distinct ports. The @samp{hppa2.0w-hp-hpux11*} port generates +code for the 32-bit pa-risc runtime architecture. It uses the HP +linker and is currently the default selected by config.guess. The +optional @samp{hppa64-hp-hpux11*} port generates 64-bit code for the +pa-risc 2.0 architecture. It must be explicitly selected using the +@samp{--host=hppa64-hp-hpux11*} configure option. Different prefixes +must be used if both ports are to be installed on the same system. + +You must use GNU binutils 2.11 or above with the 32-bit port. Thread +support is not currently implemented, so @option{--enable-threads} does +not work. See: + +@itemize +@item @uref{http://gcc.gnu.org/ml/gcc-prs/2002-01/msg00551.html} +@item @uref{http://gcc.gnu.org/ml/gcc-bugs/2002-01/msg00663.html}. +@end itemize + GCC 2.95.x is not supported under HP-UX 11 and cannot be used to compile GCC 3.0 and up. Refer to @uref{binaries.html,,binaries} for information about obtaining precompiled GCC binaries for HP-UX. +GNU binutils 2.13 or later is recommended with the 64-bit port. +The HP assembler is not supported. It is @emph{highly} recommended +that the GNU linker be used as well. Either binutils must be built +prior to gcc, or a binary distribution of gcc or binutils must be +obtained for the initial builds. When starting with a HP compiler, +it is preferable to use the ANSI compiler as the bundled compiler +only supports traditional C. Bootstrapping with the bundled compiler +is tested infrequently and problems often arise because of the subtle +differences in semantics between traditional and ISO C. There also +have been problems reported with various binary distributions. This +port still is undergoing significant development. + @html -</p> -<hr> +<hr /> @end html @heading @anchor{i370-*-*}i370-*-* This port is very preliminary and has many known bugs. We hope to have a higher-quality port for this machine soon. @html -</p> -<hr> +<hr /> @end html @heading @anchor{*-*-linux-gnu}*-*-linux-gnu @@ -2241,7 +2294,6 @@ The patch @uref{glibc-2.2.patch,,glibc-2.2.patch}, that is to be applied in the GCC source tree, fixes the compatibility problems. @html -</p> @end html @html @@ -2258,8 +2310,7 @@ glibc 2.2.4 whether patches for GCC 3.0 are needed. You can use glibc 2.2.3 with GCC 3.0, just do not try to recompile it. @html -</p> -<hr> +<hr /> @end html @heading @anchor{ix86-*-linux*oldld}i?86-*-linux*oldld Use this configuration to generate @file{a.out} binaries on Linux-based @@ -2269,8 +2320,7 @@ installed. This configuration is obsoleted in GCC 3.1. @html -</p> -<hr> +<hr /> @end html @heading @anchor{ix86-*-linux*aout}i?86-*-linux*aout Use this configuration to generate @file{a.out} binaries on Linux-based @@ -2278,8 +2328,7 @@ GNU systems. This configuration is being superseded. You must use gas/binutils version 2.5.2 or later. @html -</p> -<hr> +<hr /> @end html @heading @anchor{ix86-*-linux*}i?86-*-linux* @@ -2290,23 +2339,20 @@ possible you have a hardware problem. Further information on this can be found on @uref{http://www.bitwizard.nl/sig11/,,www.bitwizard.nl}. @html -</p> -<hr> +<hr /> @end html @heading @anchor{ix86-*-sco}i?86-*-sco Compilation with RCC is recommended. Also, it may be a good idea to link with GNU malloc instead of the malloc that comes with the system. @html -</p> -<hr> +<hr /> @end html @heading @anchor{ix86-*-sco3.2v4}i?86-*-sco3.2v4 Use this configuration for SCO release 3.2 version 4. @html -</p> -<hr> +<hr /> @end html @heading @anchor{ix86-*-sco3.2v5*}i?86-*-sco3.2v5* Use this for the SCO OpenServer Release 5 family of operating systems. @@ -2381,8 +2427,7 @@ engineering and will hopefully be addressed in later releases. @html -</p> -<hr> +<hr /> @end html @heading @anchor{ix86-*-udk}i?86-*-udk @@ -2401,8 +2446,10 @@ from the right place) while making the tools not think we're actually building a cross compiler. The easiest way to do this is with a configure command like this: -@samp{CC=/udk/usr/ccs/bin/cc @var{/your/path/to}/gcc/configure ---host=i686-pc-udk --target=i686-pc-udk --program-prefix=udk-} +@example + CC=/udk/usr/ccs/bin/cc @var{/your/path/to}/gcc/configure \ + --host=i686-pc-udk --target=i686-pc-udk --program-prefix=udk- +@end example @emph{You should substitute @samp{i686} in the above command with the appropriate processor for your host.} @@ -2416,8 +2463,7 @@ have installed. @html -</p> -<hr> +<hr /> @end html @heading @anchor{ix86-*-isc}i?86-*-isc This configuration is obsoleted in GCC 3.1. @@ -2429,8 +2475,7 @@ In ISC version 4.1, @command{sed} core dumps when building @file{deduced.h}. Use the version of @command{sed} from version 4.0. @html -</p> -<hr> +<hr /> @end html @heading @anchor{ix86-ibm-aix}i?86-ibm-aix This configuration is obsoleted in GCC 3.1. @@ -2439,8 +2484,7 @@ You need to use GAS version 2.1 or later, and LD from GNU binutils version 2.2 or later. @html -</p> -<hr> +<hr /> @end html @heading @anchor{ix86-sequent-bsd}i?86-sequent-bsd This configuration is obsoleted in GCC 3.1. @@ -2448,8 +2492,7 @@ This configuration is obsoleted in GCC 3.1. Go to the Berkeley universe before compiling. @html -</p> -<hr> +<hr /> @end html @heading @anchor{ix86-sequent-ptx1*}i?86-sequent-ptx1*, i?86-sequent-ptx2*, i?86-sequent-sysv3* This configuration is obsoleted in GCC 3.1. @@ -2461,8 +2504,7 @@ If you encounter this problem, upgrade your operating system or use @command{bash} (the GNU shell) to run @code{fixproto}. @html -</p> -<hr> +<hr /> @end html @heading @anchor{i860-intel-osf*}i860-intel-osf* All support for the i860 processor is obsoleted in GCC 3.1. @@ -2506,8 +2548,7 @@ insert the line These problems don't exist in operating system version 1.1. @html -</p> -<hr> +<hr /> @end html @heading @anchor{ia64-*-linux}ia64-*-linux IA-64 processor (also known as IPF, or Itanium Processor Family) @@ -2531,8 +2572,7 @@ GCC 3.0.2 is believed to be fully ABI compliant, and hence no more major ABI changes are expected. @html -</p> -<hr> +<hr /> @end html @heading @anchor{*-lynx-lynxos}*-lynx-lynxos LynxOS 2.2 and earlier comes with GCC 1.x already installed as @@ -2543,8 +2583,7 @@ COFF format object files and executables; otherwise GCC will use the installed tools, which produce @file{a.out} format executables. @html -</p> -<hr> +<hr /> <!-- rs6000-ibm-aix*, powerpc-ibm-aix* --> @end html @heading @anchor{*-ibm-aix*}*-ibm-aix* @@ -2572,6 +2611,35 @@ interoperate with GCC@. Building @file{libstdc++.a} requires a fix for a AIX Assembler bug APAR IY26685 (AIX 4.3) or APAR IY25528 (AIX 5.1). +@samp{libstdc++} in GCC 3.2 increments the major version number of the +shared object and GCC installation places the @file{libstdc++.a} +shared library in a common location which will overwrite the GCC 3.1 +version of the shared library. Applications either need to be +re-linked against the new shared library or the GCC 3.1 version of the +@samp{libstdc++} shared object needs to be available to the AIX +runtime loader. The GCC 3.1 @samp{libstdc++.so.4} shared object can +be installed for runtime dynamic loading using the following steps to +set the @samp{F_LOADONLY} flag in the shared object for @emph{each} +multilib @file{libstdc++.a} installed: + +Extract the shared object from each the GCC 3.1 @file{libstdc++.a} +archive: +@example + % ar -x libstdc++.a libstdc++.so.4 +@end example + +Enable the @samp{F_LOADONLY} flag so that the shared object will be +available for runtime dynamic loading, but not linking: +@example + % strip -e libstdc++.so.4 +@end example + +Archive the runtime-only shared object in the GCC 3.2 +@file{libstdc++.a} archive: +@example + % ar -q libstdc++.a libstdc++.so.4 +@end example + Linking executables and shared libraries may produce warnings of duplicate symbols. The assembly files generated by GCC for AIX always have included multiple symbol definitions for certain global variable @@ -2624,16 +2692,14 @@ A default can be specified with the @option{-mcpu=@var{cpu_type}} switch and using the configure option @option{--with-cpu-@var{cpu_type}}. @html -</p> -<hr> +<hr /> @end html @heading @anchor{m32r-*-elf}m32r-*-elf Mitsubishi M32R processor. This configuration is intended for embedded systems. @html -</p> -<hr> +<hr /> @end html @heading @anchor{m68000-hp-bsd}m68000-hp-bsd HP 9000 series 200 running BSD@. Note that the C compiler that comes @@ -2641,24 +2707,21 @@ with this system cannot compile GCC; contact @email{law@@cygnus.com} to get binaries of GCC for bootstrapping. @html -</p> -<hr> +<hr /> @end html @heading @anchor{m6811-elf}m6811-elf Motorola 68HC11 family micro controllers. These are used in embedded applications. There are no standard Unix configurations. @html -</p> -<hr> +<hr /> @end html @heading @anchor{m6812-elf}m6812-elf Motorola 68HC12 family micro controllers. These are used in embedded applications. There are no standard Unix configurations. @html -</p> -<hr> +<hr /> @end html @heading @anchor{m68k-altos}m68k-altos Altos 3068. This configuration is obsoleted in GCC 3.1. @@ -2667,8 +2730,7 @@ You must use the GNU assembler, linker and debugger. Also, you must fix a kernel bug. @html -</p> -<hr> +<hr /> @end html @heading @anchor{m68k-apple-aux}m68k-apple-aux Apple Macintosh running A/UX@. @@ -2687,8 +2749,7 @@ You will also a patched version of @file{/bin/ld} there that raises some of the arbitrary limits found in the original. @html -</p> -<hr> +<hr /> @end html @heading @anchor{m68k-att-sysv}m68k-att-sysv AT&T 3b1, a.k.a.@: 7300 PC@. This version of GCC cannot @@ -2698,8 +2759,7 @@ bootstrap. Binaries are available from the OSU-CIS archive, at @uref{ftp://archive.cis.ohio-state.edu/pub/att7300/}. @html -</p> -<hr> +<hr /> @end html @heading @anchor{m68k-bull-sysv}m68k-bull-sysv Bull DPX/2 series 200 and 300 with BOS-2.00.45 up to BOS-2.01. @@ -2714,8 +2774,7 @@ assembler or for availability of the DPX/2 port of GAS, contact @email{F.Pierresteguy@@frcl.bull.fr}. @html -</p> -<hr> +<hr /> @end html @heading @anchor{m68k-crds-unos}m68k-crds-unos Use @samp{configure unos} for building on Unos. @@ -2754,8 +2813,7 @@ If linking @file{cc1} fails, try putting the object files into a library and linking from that library. @html -</p> -<hr> +<hr /> @end html @heading @anchor{m68k-hp-hpux}m68k-hp-hpux HP 9000 series 300 or 400 running HP-UX@. HP-UX version 8.0 has a bug in @@ -2813,8 +2871,7 @@ to look like: @html -</p> -<hr> +<hr /> @end html @heading @anchor{m68k-*-nextstep*}m68k-*-nextstep* These configurations are obsoleted in GCC 3.1. @@ -2864,8 +2921,7 @@ for this sequence to work. @end example @html -</p> -<hr> +<hr /> @end html @heading @anchor{m68k-ncr-*}m68k-ncr-* On the Tower models 4@var{n}0 and 6@var{n}0, by default a process is not @@ -2881,8 +2937,7 @@ MAXUMEM = 4096 @html -</p> -<hr> +<hr /> @end html @heading @anchor{m68k-sun}m68k-sun Sun 3. We do not provide a configuration file to use the Sun FPA by @@ -2890,8 +2945,7 @@ default, because programs that establish signal handlers for floating point traps inherently cannot work with the FPA@. @html -</p> -<hr> +<hr /> @end html @heading @anchor{m68k-sun-sunos4.1.1}m68k-sun-sunos4.1.1 @@ -2899,8 +2953,7 @@ It is reported that you may need the GNU assembler on this platform. @html -</p> -<hr> +<hr /> @end html @heading @anchor{m88k-*-svr3}m88k-*-svr3 Motorola m88k running the AT&T/Unisoft/Motorola V.3 reference port. @@ -2918,8 +2971,7 @@ It is best, however, to use an older version of GCC for bootstrapping if you have one. @html -</p> -<hr> +<hr /> @end html @heading @anchor{m88k-*-dgux}m88k-*-dgux Motorola m88k running DG/UX@. @@ -2938,8 +2990,7 @@ If you do not specify a configuration name, @file{configure} guesses the configuration based on the current software development environment. @html -</p> -<hr> +<hr /> @end html @heading @anchor{m88k-tektronix-sysv3}m88k-tektronix-sysv3 Tektronix XD88 running UTekV 3.2e. @@ -2954,8 +3005,7 @@ Otherwise you may have trouble getting clean comparisons between stages. @html -</p> -<hr> +<hr /> @end html @heading @anchor{mips-*-*}mips-*-* If you use the 1.31 version of the MIPS assembler (such as was shipped @@ -3008,8 +3058,7 @@ If you override the @code{CC} make variable and use the MIPS compilers, you may need to add @option{-Wf,-XNg1500 -Olimit 3000}. @html -</p> -<hr> +<hr /> @end html @heading @anchor{mips-dec-*}mips-dec-* These configurations are obsoleted in GCC 3.1. @@ -3042,8 +3091,7 @@ If you override the @code{CC} make variable and use the MIPS compilers, you may need to add @option{-Wf,-XNg1500 -Olimit 3000}. @html -</p> -<hr> +<hr /> @end html @heading @anchor{mips-mips-riscos*}mips-mips-riscos* These configurations are obsoleted in GCC 3.1. @@ -3073,8 +3121,7 @@ BSD 4.3 configuration for RISC-OS, revision @var{rev}. System V.4 configuration for RISC-OS, revision @var{rev}. @html -</p> -<hr> +<hr /> @end html @item mips-mips-riscos@var{rev}sysv System V.3 configuration for RISC-OS, revision @var{rev}. @@ -3086,8 +3133,7 @@ RISC-OS revision 4 to RISC-OS revision 5. This has the effect of avoiding a linker bug. @html -</p> -<hr> +<hr /> @end html @heading @anchor{mips-sgi-irix4}mips-sgi-irix4 This configuration is obsoleted in GCC 3.1. @@ -3119,8 +3165,7 @@ ignored. @end example @html -</p> -<hr> +<hr /> @end html @heading @anchor{mips-sgi-irix5}mips-sgi-irix5 @@ -3165,8 +3210,7 @@ however, you may have success with @command{smake} on IRIX 5.2 if you do not have GNU @command{make} available. @html -</p> -<hr> +<hr /> @end html @heading @anchor{mips-sgi-irix6}mips-sgi-irix6 @@ -3195,6 +3239,27 @@ then your version of @command{cc} uses the O32 or N64 ABI by default. You should set the environment variable @env{CC} to @samp{cc -n32} before configuring GCC@. +If you want the resulting @command{gcc} to run on old 32-bit systems +with the MIPS R4400 CPU, you need to ensure that only code for the mips3 +instruction set architecture (ISA) is generated. While GCC 3.x does +this correctly, both GCC 2.95 and SGI's MIPSpro @command{cc} may change +the ISA depending on the machine where GCC is built. Using one of them +as the bootstrap compiler may result in mips4 code, which won't run at +all on mips3-only systems. For the test program above, you should see: + +@example +test.o: ELF N32 MSB mips-3 @dots{} +@end example + +If you get: + +@example +test.o: ELF N32 MSB mips-4 @dots{} +@end example + +instead, you should set the environment variable @env{CC} to @samp{cc +-n32 -mips3} or @samp{gcc -mips3} respectively before configuring GCC@. + GCC on IRIX 6 is usually built to support both the N32 and N64 ABIs. If you build GCC on a system that doesn't have the N64 libraries installed, you need to configure with @option{--disable-multilib} so GCC doesn't @@ -3226,7 +3291,7 @@ its maximum of 262144 bytes. If you have root access, you can use the GCC does not correctly pass/return structures which are smaller than 16 bytes and which are not 8 bytes. The problem is very involved and difficult to fix. It affects a number of other targets also, -but IRIX 6 is affected the most, because it is a 64 bit target, and 4 byte +but IRIX 6 is affected the most, because it is a 64-bit target, and 4 byte structures are common. The exact problem is that structures are being padded at the wrong end, e.g.@: a 4 byte structure is loaded into the lower 4 bytes of the register when it should be loaded into the upper 4 bytes of the @@ -3244,8 +3309,7 @@ See @uref{http://freeware.sgi.com/,,http://freeware.sgi.com/} for more information about using GCC on IRIX platforms. @html -</p> -<hr> +<hr /> @end html @heading @anchor{mips-sony-sysv}mips-sony-sysv Sony MIPS NEWS@. This configuration is obsoleted in GCC 3.1. @@ -3255,8 +3319,7 @@ COFF)@. In particular, the linker does not like the code generated by GCC when shared libraries are linked in. @html -</p> -<hr> +<hr /> @end html @heading @anchor{ns32k-encore}ns32k-encore This configuration is obsoleted in GCC 3.1. @@ -3264,8 +3327,7 @@ This configuration is obsoleted in GCC 3.1. Encore ns32000 system. Encore systems are supported only under BSD@. @html -</p> -<hr> +<hr /> @end html @heading @anchor{ns32k-*-genix}ns32k-*-genix National Semiconductor ns32000 system. This configuration is obsoleted @@ -3275,8 +3337,7 @@ Genix has bugs in @code{alloca} and @code{malloc}; you must get the compiled versions of these from GNU Emacs. @html -</p> -<hr> +<hr /> @end html @heading @anchor{ns32k-sequent}ns32k-sequent This configuration is obsoleted in GCC 3.1. @@ -3284,8 +3345,7 @@ This configuration is obsoleted in GCC 3.1. Go to the Berkeley universe before compiling. @html -</p> -<hr> +<hr /> @end html @heading @anchor{ns32k-utek}ns32k-utek UTEK ns32000 system (``merlin''). This configuration is obsoleted in @@ -3296,8 +3356,7 @@ The C compiler that comes with this system cannot compile GCC; contact @html -</p> -<hr> +<hr /> @end html @heading @anchor{powerpc*-*-*}powerpc-*-* @@ -3305,8 +3364,7 @@ You can specify a default version for the @option{-mcpu=@var{cpu_type}} switch by using the configure option @option{--with-cpu-@var{cpu_type}}. @html -</p> -<hr> +<hr /> @end html @heading @anchor{powerpc-*-darwin*}powerpc-*-darwin* PowerPC running Darwin (Mac OS X kernel). @@ -3320,7 +3378,7 @@ binaries are available at registration required). Versions of the assembler prior to ``cctools-364'' cannot handle the -4-argument form of rlwinm and related mask-using instructions. Darwin +4-argument form of @code{rlwinm} and related mask-using instructions. Darwin 1.3 (Mac OS X 10.0) uses cctools-353 for instance. To get cctools-364, check out @file{cctools} with tag @samp{Apple-364}, build it, and install the assembler as @file{usr/bin/as}. See @@ -3339,25 +3397,22 @@ number of extensions not available in a standard GCC release. These extensions are generally specific to Mac programming. @html -</p> -<hr> +<hr /> @end html @heading @anchor{powerpc-*-elf}powerpc-*-elf, powerpc-*-sysv4 PowerPC system in big endian mode, running System V.4. @html -</p> -<hr> +<hr /> @end html @heading @anchor{powerpc-*-linux-gnu*}powerpc-*-linux-gnu* You will need -@uref{ftp://ftp.kernel.org/pub/linux/devel/binutils,,binutils 2.12.90.0.7} +@uref{ftp://ftp.kernel.org/pub/linux/devel/binutils,,binutils 2.13.90.0.10} or newer for a working GCC@. @html -</p> -<hr> +<hr /> @end html @heading @anchor{powerpc-*-netbsd*}powerpc-*-netbsd* PowerPC system in big endian mode running NetBSD@. To build the @@ -3365,60 +3420,52 @@ documentation you will need Texinfo version 4.1 (NetBSD 1.5.1 included Texinfo version 3.12). @html -</p> -<hr> +<hr /> @end html @heading @anchor{powerpc-*-eabiaix}powerpc-*-eabiaix Embedded PowerPC system in big endian mode with @option{-mcall-aix} selected as the default. @html -</p> -<hr> +<hr /> @end html @heading @anchor{powerpc-*-eabisim}powerpc-*-eabisim Embedded PowerPC system in big endian mode for use in running under the PSIM simulator. @html -</p> -<hr> +<hr /> @end html @heading @anchor{powerpc-*-eabi}powerpc-*-eabi Embedded PowerPC system in big endian mode. @html -</p> -<hr> +<hr /> @end html @heading @anchor{powerpcle-*-elf}powerpcle-*-elf, powerpcle-*-sysv4 PowerPC system in little endian mode, running System V.4. @html -</p> -<hr> +<hr /> @end html @heading @anchor{powerpcle-*-eabisim}powerpcle-*-eabisim Embedded PowerPC system in little endian mode for use in running under the PSIM simulator. @html -</p> -<hr> +<hr /> @end html @heading @anchor{powerpcle-*-eabi}powerpcle-*-eabi Embedded PowerPC system in little endian mode. @html -</p> -<hr> +<hr /> @end html @heading @anchor{powerpcle-*-winnt}powerpcle-*-winnt, powerpcle-*-pe PowerPC system in little endian mode running Windows NT@. @html -</p> -<hr> +<hr /> @end html @heading @anchor{romp-*-aos}romp-*-aos, romp-*-mach These configurations are obsoleted in GCC 3.1. @@ -3431,22 +3478,19 @@ floating-point constants and can be safely ignored; the stage 3 compiler is correct. @html -</p> -<hr> +<hr /> @end html @heading @anchor{s390-*-linux*}s390-*-linux* S/390 system running Linux for S/390@. @html -</p> -<hr> +<hr /> @end html @heading @anchor{s390x-*-linux*}s390x-*-linux* -zSeries system (64 Bit) running Linux for zSeries@. +zSeries system (64-bit) running Linux for zSeries@. @html -</p> -<hr> +<hr /> @end html @c Please use Solaris 2 to refer to all release of Solaris, starting @c with 2.0 until 2.6, 7, and 8. Solaris 1 was a marketing name for @@ -3461,9 +3505,7 @@ GCC you first have to install a pre-built compiler, see our The Solaris 2 @command{/bin/sh} will often fail to configure @file{libstdc++-v3}, @file{boehm-gc} or @file{libjava}. If you encounter this problem, set @env{CONFIG_SHELL} to -@command{/bin/ksh} in your environment and run @command{make bootstrap} again. -Another possibility that sometimes helps is to remove -@file{*-*-solaris2*/config.cache}. +@command{/bin/ksh} in your environment before running @command{configure}. Solaris 2 comes with a number of optional OS packages. Some of these packages are needed to use GCC fully, namely @code{SUNWarc}, @@ -3501,8 +3543,7 @@ There are patches for Solaris 2.6 (105633-56 or newer for SPARC, 108653-22 for Intel) that fix this bug. @html -</p> -<hr> +<hr /> @end html @heading @anchor{sparc-sun-solaris2*}sparc-sun-solaris2* @@ -3514,8 +3555,10 @@ information. Sun @command{as} 4.x is broken in that it cannot cope with long symbol names. A typical error message might look similar to the following: -@samp{/usr/ccs/bin/as: "/var/tmp/ccMsw135.s", line 11041: -error: can't compute value of an expression involving an external symbol.} +@smallexample +/usr/ccs/bin/as: "/var/tmp/ccMsw135.s", line 11041: error: + can't compute value of an expression involving an external symbol. +@end smallexample This is Sun bug 4237974. This is fixed with patch 108908-02 for Solaris 2.6 and has been fixed in later (5.x) versions of the assembler, @@ -3535,8 +3578,7 @@ that supports only 32-bit binaries, one must configure with 64-bit target libraries. @html -</p> -<hr> +<hr /> @end html @heading @anchor{sparc-sun-solaris2.7}sparc-sun-solaris2.7 @@ -3578,7 +3620,7 @@ the Solaris 7 Recommended Patch Cluster. @html <p> -<hr> +<hr /> @end html @heading @anchor{sparc-sun-sunos4*}sparc-sun-sunos4* @@ -3597,8 +3639,7 @@ be due to a bug in @command{sh}. You can probably get around it by running @command{make}. @html -</p> -<hr> +<hr /> @end html @heading @anchor{sparc-unknown-linux-gnulibc1}sparc-unknown-linux-gnulibc1 @@ -3608,8 +3649,7 @@ for this platform, too. @html -</p> -<hr> +<hr /> @end html @heading @anchor{sparc-*-linux*}sparc-*-linux* @@ -3619,8 +3659,7 @@ releases mishandled unaligned relocations on @code{sparc-*-*} targets. @html -</p> -<hr> +<hr /> @end html @heading @anchor{sparc64-*-*}sparc64-*-* @@ -3631,8 +3670,7 @@ invocation with an environment that causes @command{configure} to recognize (via @samp{uname -a}) the system as @samp{sparc-*-*} instead. @html -</p> -<hr> +<hr /> @end html @heading @anchor{sparcv9-*-solaris2*}sparcv9-*-solaris2* @@ -3647,8 +3685,7 @@ step in order to bootstrap this target with the Sun compiler: specifies the v9 architecture to the Sun linker and assembler. @html -</p> -<hr> +<hr /> @end html @heading @anchor{#*-*-sysv*}*-*-sysv* On System V release 3, you may get this error message @@ -3682,16 +3719,14 @@ On a System V release 4 system, make sure @file{/usr/bin} precedes @file{/usr/ucb} uses libraries which have bugs. @html -</p> -<hr> +<hr /> @end html @heading @anchor{vax-dec-ultrix}vax-dec-ultrix Don't try compiling with VAX C (@code{vcc}). It produces incorrect code in some cases (for example, when @code{alloca} is used). @html -</p> -<hr> +<hr /> @end html @heading @anchor{we32k-*-*}we32k-*-* These computers are also known as the 3b2, 3b5, 3b20 and other similar @@ -3729,8 +3764,7 @@ You may need to raise the ULIMIT setting to build a C++ compiler, as the file @file{cc1plus} is larger than one megabyte. @html -</p> -<hr> +<hr /> @end html @heading @anchor{xtensa-*-elf}xtensa-*-elf @@ -3748,8 +3782,7 @@ downloaded files include a customized copy of this header file, which you can use to replace the default header file. @html -</p> -<hr> +<hr /> @end html @heading @anchor{xtensa-*-linux*}xtensa-*-linux* @@ -3761,10 +3794,9 @@ respects, this target is the same as the @uref{#xtensa-*-elf,,@samp{xtensa-*-elf}} target. @html -</p> -<hr> +<hr /> @end html -@heading @anchor{windows}Microsoft Windows (32 bit) +@heading @anchor{windows}Microsoft Windows (32-bit) A port of GCC 2.95.x is included with the @uref{http://www.cygwin.com/,,Cygwin environment}. @@ -3773,8 +3805,7 @@ Current (as of early 2001) snapshots of GCC will build under Cygwin without modification. @html -</p> -<hr> +<hr /> @end html @heading @anchor{os2}OS/2 @@ -3787,8 +3818,7 @@ An older copy of GCC 2.8.1 is included with the EMX tools available at ftp://ftp.leo.org/pub/comp/os/os2/leo/devtools/emx+gcc/}. @html -</p> -<hr> +<hr /> @end html @heading @anchor{older}Older systems @@ -3838,8 +3868,7 @@ about GCC on such systems (which may no longer be applicable to current GCC) is to be found in the GCC texinfo manual. @html -</p> -<hr> +<hr /> @end html @heading @anchor{elf_targets}all ELF targets (SVR4, Solaris 2, etc.) @@ -3850,8 +3879,7 @@ automatically. @html -</p> -<hr> +<hr /> <p> @end html @ifhtml @@ -3863,8 +3891,7 @@ automatically. @ifset oldhtml @include install-old.texi @html -</p> -<hr> +<hr /> <p> @end html @ifhtml @@ -3876,8 +3903,7 @@ automatically. @ifset gfdlhtml @include fdl.texi @html -</p> -<hr> +<hr /> <p> @end html @ifhtml diff --git a/contrib/gcc/doc/invoke.texi b/contrib/gcc/doc/invoke.texi index a56e3ed..0b527b2 100644 --- a/contrib/gcc/doc/invoke.texi +++ b/contrib/gcc/doc/invoke.texi @@ -157,7 +157,7 @@ in the following sections. @xref{Overall Options,,Options Controlling the Kind of Output}. @gccoptlist{ -c -S -E -o @var{file} -pipe -pass-exit-codes -x @var{language} @gol --v -### --target-help --help} +-v -### --help --target-help --version} @item C Language Options @xref{C Dialect Options,,Options Controlling C Dialect}. @@ -236,8 +236,9 @@ in the following sections. @item C-only Warning Options @gccoptlist{ --Wbad-function-cast -Wmissing-declarations -Wmissing-prototypes @gol --Wnested-externs -Wstrict-prototypes -Wtraditional} +-Wbad-function-cast -Wmissing-declarations @gol +-Wmissing-prototypes -Wnested-externs @gol +-Wstrict-prototypes -Wtraditional} @item Debugging Options @xref{Debugging Options,,Options for Debugging Your Program or GCC}. @@ -248,7 +249,8 @@ in the following sections. -fdump-tree-original@r{[}-@var{n}@r{]} -fdump-tree-optimized@r{[}-@var{n}@r{]} @gol -fdump-tree-inlined@r{[}-@var{n}@r{]} @gol -fmem-report -fpretend-float @gol --fprofile-arcs -ftest-coverage -ftime-report @gol +-fprofile-arcs -fsched-verbose=@var{n} @gol +-ftest-coverage -ftime-report @gol -g -g@var{level} -gcoff -gdwarf -gdwarf-1 -gdwarf-1+ -gdwarf-2 @gol -ggdb -gstabs -gstabs+ -gvms -gxcoff -gxcoff+ @gol -p -pg -print-file-name=@var{library} -print-libgcc-file-name @gol @@ -261,6 +263,7 @@ in the following sections. @gccoptlist{ -falign-functions=@var{n} -falign-jumps=@var{n} @gol -falign-labels=@var{n} -falign-loops=@var{n} @gol +-fbounds-check @gol -fbranch-probabilities -fcaller-saves -fcprop-registers @gol -fcse-follow-jumps -fcse-skip-blocks -fdata-sections @gol -fdelayed-branch -fdelete-null-pointer-checks @gol @@ -269,7 +272,8 @@ in the following sections. -fgcse -fgcse-lm -fgcse-sm @gol -finline-functions -finline-limit=@var{n} -fkeep-inline-functions @gol -fkeep-static-consts -fmerge-constants -fmerge-all-constants @gol --fmove-all-movables -fno-default-inline -fno-defer-pop @gol +-fmove-all-movables -fno-branch-count-reg @gol +-fno-default-inline -fno-defer-pop @gol -fno-function-cse -fno-guess-branch-probability @gol -fno-inline -fno-math-errno -fno-peephole -fno-peephole2 @gol -funsafe-math-optimizations -fno-trapping-math @gol @@ -278,6 +282,8 @@ in the following sections. -freduce-all-givs -fregmove -frename-registers @gol -frerun-cse-after-loop -frerun-loop-opt @gol -fschedule-insns -fschedule-insns2 @gol +-fno-sched-interblock -fno-sched-spec @gol +-fsched-spec-load -fsched-spec-load-dangerous @gol -fsingle-precision-constant -fssa -fssa-ccp -fssa-dce @gol -fstrength-reduce -fstrict-aliasing -fthread-jumps @gol -ftrapv -funroll-all-loops -funroll-loops @gol @@ -481,7 +487,7 @@ in the following sections. -mno-fp-ret-in-387 -msoft-float -msvr3-shlib @gol -mno-wide-multiply -mrtd -malign-double @gol -mpreferred-stack-boundary=@var{num} @gol --mmmx -msse -msse2 -msse-math -m3dnow @gol +-mmmx -msse -msse2 -m3dnow @gol -mthreads -mno-align-stringops -minline-all-stringops @gol -mpush-args -maccumulate-outgoing-args -m128bit-long-double @gol -m96bit-long-double -mregparm=@var{num} -momit-leaf-frame-pointer @gol @@ -915,6 +921,10 @@ be displayed. @opindex target-help Print (on the standard output) a description of target specific command line options for each tool. + +@item --version +@opindex version +Display the version number and copyrights of the invoked GCC. @end table @node Invoking G++ @@ -2923,18 +2933,7 @@ optimization and code generation options plus Control Optimization}). The other use of @option{-fprofile-arcs} is for use with @code{gcov}, -when it is used with the @option{-ftest-coverage} option. GCC -supports two methods of determining code coverage: the options that -support @code{gcov}, and options @option{-a} and @option{-ax}, which -write information to text files. The options that support @code{gcov} -do not need to instrument every arc in the program, so a program compiled -with them runs faster than a program compiled with @option{-a}, which -adds instrumentation code to every basic block in the program. The -tradeoff: since @code{gcov} does not have execution counts for all -branches, it must start with the execution counts for the instrumented -branches, and then iterate over the program flow graph until the entire -graph has been solved. Hence, @code{gcov} runs a little more slowly than -a program which uses information from @option{-a} and @option{-ax}. +when it is used with the @option{-ftest-coverage} option. With @option{-fprofile-arcs}, for each function of your program GCC creates a program flow graph, then finds a spanning tree for the graph. @@ -2944,11 +2943,6 @@ executed. When an arc is the only exit or only entrance to a block, the instrumentation code can be added to the block; otherwise, a new basic block must be created to hold the instrumentation code. -This option makes it possible to estimate branch probabilities and to -calculate basic block execution counts. In general, basic block -execution counts as provided by @option{-a} do not give enough -information to estimate all branch probabilities. - @need 2000 @item -ftest-coverage @opindex ftest-coverage @@ -3180,6 +3174,23 @@ Dump after all tree based optimization, to @file{@var{file}.optimized}. Dump after function inlining, to @file{@var{file}.inlined}. @end table +@item -fsched-verbose=@var{n} +@opindex fsched-verbose +On targets that use instruction scheduling, this option controls the +amount of debugging output the scheduler prints. This information is +written to standard error, unless @option{-dS} or @option{-dR} is +specified, in which case it is output to the usual dump +listing file, @file{.sched} or @file{.sched2} respectively. However +for @var{n} greater than nine, the output is always printed to standard +error. + +For @var{n} greater than zero, @option{-fsched-verbose} outputs the +same information as @option{-dRS}. For @var{n} greater than one, it +also output basic block probabilities, detailed ready list information +and unit/insn info. For @var{n} greater than two, it includes RTL +at abort point, control-flow and regions info. And for @var{n} over +four, @option{-fsched-verbose} also includes dependence info. + @item -fpretend-float @opindex fpretend-float When running a cross-compiler, pretend that the target machine uses the @@ -3484,6 +3495,14 @@ types. Languages like C or C++ require each non-automatic variable to have distinct location, so using this option will result in non-conforming behavior. +@item -fno-branch-count-reg +@opindex fno-branch-count-reg +Do not use ``decrement and branch'' instructions on a count register, +but instead generate a sequence of instructions that decrement a +register, compare it against zero, then branch based upon the result. +This option is only meaningful on architectures that support such +instructions, which include x86, PowerPC, IA-64 and S/390. + @item -fno-function-cse @opindex fno-function-cse Do not put function addresses in registers; make each instruction that @@ -3546,6 +3565,14 @@ an exact implementation of IEEE or ISO rules/specifications for math functions. The default is @option{-ftrapping-math}. + +@item -fbounds-check +@opindex fbounds-check +For front-ends that support it, generate additional code to check that +indices used to access arrays are within the declared range. This is +currenly only supported by the Java and Fortran 77 front-ends, where +this option defaults to true and false respectively. + @end table The following options control specific optimizations. The @option{-O2} @@ -3673,6 +3700,30 @@ instruction scheduling after register allocation has been done. This is especially useful on machines with a relatively small number of registers and where memory load instructions take more than one cycle. +@item -fno-sched-interblock +@opindex fno-sched-interblock +Don't schedule instructions across basic blocks. This is normally +enabled by default when scheduling before register allocation, i.e.@: +with @option{-fschedule-insns} or at @option{-O2} or higher. + +@item -fno-sched-spec +@opindex fno-sched-spec +Don't allow speculative motion of non-load instructions. This is normally +enabled by default when scheduling before register allocation, i.e.@: +with @option{-fschedule-insns} or at @option{-O2} or higher. + +@item -fsched-spec-load +@opindex fsched-spec-load +Allow speculative motion of some load instructions. This only makes +sense when scheduling before register allocation, i.e.@: with +@option{-fschedule-insns} or at @option{-O2} or higher. + +@item -fsched-spec-load-dangerous +@opindex fsched-spec-load-dangerous +Allow speculative motion of more load instructions. This only makes +sense when scheduling before register allocation, i.e.@: with +@option{-fschedule-insns} or at @option{-O2} or higher. + @item -ffunction-sections @itemx -fdata-sections @opindex ffunction-sections @@ -7575,6 +7626,9 @@ direct access to the MMX, SSE and 3Dnow extensions of the instruction set. @xref{X86 Built-in Functions}, for details of the functions enabled and disabled by these switches. +To have SSE/SSE2 instructions generated automatically from floating-point code, +see @option{-mfpmath=sse}. + @item -mpush-args @itemx -mno-push-args @opindex mpush-args diff --git a/contrib/gcc/doc/sourcebuild.texi b/contrib/gcc/doc/sourcebuild.texi index 9a14e44..8977869 100644 --- a/contrib/gcc/doc/sourcebuild.texi +++ b/contrib/gcc/doc/sourcebuild.texi @@ -738,6 +738,7 @@ here; FIXME: document the others. @menu * Test Idioms:: Idioms used in test suite code. * C Tests:: The C language test suites. +* libgcj Tests:: The Java library test suites. @end menu @node Test Idioms @@ -870,3 +871,23 @@ shouldn't. FIXME: merge in @file{testsuite/README.gcc} and discuss the format of test cases and magic comments more. + +@node libgcj Tests +@subsection The Java library test suites. + +Runtime tests are executed via @samp{make check} from the @samp{testsuite} +directory of the libjava hierarchy in the build tree. Additional runtime +tests can be checked into this testsuite. + +Regression testing of the core packages in libgcj is also covered by the +Mauve test suite. The @uref{http://sources.redhat.com/mauve/,,Mauve Project} +develops tests for the Java Class Libraries. These tests are run as part +of libgcj testing by specifying the location of the Mauve tree when invoking +@samp{make}, as in @samp{make MAUVEDIR=~/mauve check}. + +The @uref{http://oss.software.ibm.com/developerworks/opensource/jacks/,, +Jacks} project provides a test suite for Java compilers that can be used +to test changes that affect the GCJ front end. There is no automated +mechanism to run the Jacks suite as part of GCJ testing. + +We encourage developers to contribute test cases to Mauve and Jacks. diff --git a/contrib/gcc/expmed.c b/contrib/gcc/expmed.c index ab127ec..ce89335 100644 --- a/contrib/gcc/expmed.c +++ b/contrib/gcc/expmed.c @@ -1144,7 +1144,7 @@ extract_bit_field (str_rtx, bitsize, bitnum, unsignedp, /* Else we've got some float mode source being extracted into a different float mode destination -- this combination of subregs results in Severe Tire Damage. */ - abort (); + goto no_subreg_mode_swap; } if (GET_CODE (op0) == REG) op0 = gen_rtx_SUBREG (mode1, op0, byte_offset); @@ -1155,6 +1155,7 @@ extract_bit_field (str_rtx, bitsize, bitnum, unsignedp, return convert_to_mode (tmode, op0, unsignedp); return op0; } + no_subreg_mode_swap: /* Handle fields bigger than a word. */ diff --git a/contrib/gcc/expr.c b/contrib/gcc/expr.c index 99f7fcf..94a28e9 100644 --- a/contrib/gcc/expr.c +++ b/contrib/gcc/expr.c @@ -54,9 +54,11 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA #ifdef PUSH_ROUNDING +#ifndef PUSH_ARGS_REVERSED #if defined (STACK_GROWS_DOWNWARD) != defined (ARGS_GROW_DOWNWARD) #define PUSH_ARGS_REVERSED /* If it's last to first. */ #endif +#endif #endif @@ -6227,7 +6229,7 @@ expand_expr (exp, target, tmode, modifier) } case PARM_DECL: - if (DECL_RTL (exp) == 0) + if (! DECL_RTL_SET_P (exp)) { error_with_decl (exp, "prior parameter's size depends on `%s'"); return CONST0_RTX (mode); @@ -7600,9 +7602,10 @@ expand_expr (exp, target, tmode, modifier) { op0 = expand_expr (TREE_OPERAND (exp, 0), subtarget, VOIDmode, 0); op1 = expand_expr (TREE_OPERAND (exp, 1), NULL_RTX, VOIDmode, 0); - temp = simplify_binary_operation (PLUS, mode, op0, op1); - if (temp) - return temp; + if (op0 == const0_rtx) + return op1; + if (op1 == const0_rtx) + return op0; goto binop2; } diff --git a/contrib/gcc/f/ChangeLog b/contrib/gcc/f/ChangeLog index 3f3b286..729cfc9d 100644 --- a/contrib/gcc/f/ChangeLog +++ b/contrib/gcc/f/ChangeLog @@ -1,3 +1,22 @@ +2002-11-19 Release Manager + + * GCC 3.2.1 Released. + +2002-11-19 Release Manager + + * GCC 3.2.1 Released. + +2002-11-18 Release Manager + + * GCC 3.2.1 Released. + +2002-10-28 Andris Pavenis <pavenis@latnet.lv> + Toon Moene <toon@moene.indiv.nluug.nl> + + PR fortran/8308 + * lang-specs.h: Correct ratfor specs. + * news.texi: Document this fix. + 2002-09-14 Hans-Peter Nilsson <hp@bitrange.com> * target.c (ffetarget_memcpy_): Don't test nonexistent diff --git a/contrib/gcc/f/g77.1 b/contrib/gcc/f/g77.1 index 3f20af9..b3e8394 100644 --- a/contrib/gcc/f/g77.1 +++ b/contrib/gcc/f/g77.1 @@ -1,365 +1,1724 @@ -.\" Copyright (c) 1995-1997 Free Software Foundation -*-Text-*- -.\" See section COPYING for conditions for redistribution -.\" FIXME: no info here on predefines. Should there be? extra for F77... -.TH G77 1 "1999-02-14" "GNU Tools" "GNU Tools" -.de BP -.sp -.ti \-.2i -\(** +.\" Automatically generated by Pod::Man version 1.15 +.\" Tue Nov 19 18:17:20 2002 +.\" +.\" Standard preamble: +.\" ====================================================================== +.de Sh \" Subsection heading +.br +.if t .Sp +.ne 5 +.PP +\fB\\$1\fR +.PP +.. +.de Sp \" Vertical space (when we can't use .PP) +.if t .sp .5v +.if n .sp .. -.SH NAME -g77 \- GNU project Fortran Compiler (v0.5.24) -.SH SYNOPSIS -.RB g77 " [" \c -.IR option " | " "filename " ].\|.\|. -.SH WARNING -The information in this man page is an extract from the full -documentation of the GNU Fortran compiler (version 0.5.24), -and is limited to the meaning of some of the options. +.de Ip \" List item +.br +.ie \\n(.$>=3 .ne \\$3 +.el .ne 3 +.IP "\\$1" \\$2 +.. +.de Vb \" Begin verbatim text +.ft CW +.nf +.ne \\$1 +.. +.de Ve \" End verbatim text +.ft R + +.fi +.. +.\" Set up some character translations and predefined strings. \*(-- will +.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left +.\" double quote, and \*(R" will give a right double quote. | will give a +.\" real vertical bar. \*(C+ will give a nicer C++. Capital omega is used +.\" to do unbreakable dashes and therefore won't be available. \*(C` and +.\" \*(C' expand to `' in nroff, nothing in troff, for use with C<> +.tr \(*W-|\(bv\*(Tr +.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p' +.ie n \{\ +. ds -- \(*W- +. ds PI pi +. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch +. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch +. ds L" "" +. ds R" "" +. ds C` "" +. ds C' "" +'br\} +.el\{\ +. ds -- \|\(em\| +. ds PI \(*p +. ds L" `` +. ds R" '' +'br\} +.\" +.\" If the F register is turned on, we'll generate index entries on stderr +.\" for titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and +.\" index entries marked with X<> in POD. Of course, you'll have to process +.\" the output yourself in some meaningful fashion. +.if \nF \{\ +. de IX +. tm Index:\\$1\t\\n%\t"\\$2" +.. +. nr % 0 +. rr F +.\} +.\" +.\" For nroff, turn off justification. Always turn off hyphenation; it +.\" makes way too many mistakes in technical documents. +.hy 0 +.if n .na +.\" +.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2). +.\" Fear. Run. Save yourself. No user-serviceable parts. +.bd B 3 +. \" fudge factors for nroff and troff +.if n \{\ +. ds #H 0 +. ds #V .8m +. ds #F .3m +. ds #[ \f1 +. ds #] \fP +.\} +.if t \{\ +. ds #H ((1u-(\\\\n(.fu%2u))*.13m) +. ds #V .6m +. ds #F 0 +. ds #[ \& +. ds #] \& +.\} +. \" simple accents for nroff and troff +.if n \{\ +. ds ' \& +. ds ` \& +. ds ^ \& +. ds , \& +. ds ~ ~ +. ds / +.\} +.if t \{\ +. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u" +. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u' +. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u' +. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u' +. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u' +. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u' +.\} +. \" troff and (daisy-wheel) nroff accents +.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V' +.ds 8 \h'\*(#H'\(*b\h'-\*(#H' +.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#] +.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H' +.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u' +.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#] +.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#] +.ds ae a\h'-(\w'a'u*4/10)'e +.ds Ae A\h'-(\w'A'u*4/10)'E +. \" corrections for vroff +.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u' +.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u' +. \" for low resolution devices (crt and lpr) +.if \n(.H>23 .if \n(.V>19 \ +\{\ +. ds : e +. ds 8 ss +. ds o a +. ds d- d\h'-1'\(ga +. ds D- D\h'-1'\(hy +. ds th \o'bp' +. ds Th \o'LP' +. ds ae ae +. ds Ae AE +.\} +.rm #[ #] #H #V #F C +.\" ====================================================================== +.\" +.IX Title "G77 1" +.TH G77 1 "gcc-3.2.1" "2002-11-19" "GNU" +.UC +.SH "NAME" +g77 \- \s-1GNU\s0 project Fortran 77 compiler +.SH "SYNOPSIS" +.IX Header "SYNOPSIS" +g77 [\fB\-c\fR|\fB\-S\fR|\fB\-E\fR] + [\fB\-g\fR] [\fB\-pg\fR] [\fB\-O\fR\fIlevel\fR] + [\fB\-W\fR\fIwarn\fR...] [\fB\-pedantic\fR] + [\fB\-I\fR\fIdir\fR...] [\fB\-L\fR\fIdir\fR...] + [\fB\-D\fR\fImacro\fR[=\fIdefn\fR]...] [\fB\-U\fR\fImacro\fR] + [\fB\-f\fR\fIoption\fR...] [\fB\-m\fR\fImachine-option\fR...] + [\fB\-o\fR \fIoutfile\fR] \fIinfile\fR... .PP -This man page is not up to date, since no volunteers want to -maintain it. If you find a discrepancy between the man page and the -software, please check the Info file, which is the authoritative -documentation. -.\" .PP -.\" The version of GNU Fortran documented by the Info file is 0.5.24, -.\" which includes substantial improvements and changes since 0.5.24, -.\" the version documented in this man page. +Only the most useful options are listed here; see below for the +remainder. +.SH "DESCRIPTION" +.IX Header "DESCRIPTION" +The \fBg77\fR command supports all the options supported by the +\&\fBgcc\fR command. .PP -If we find that the things in this man page that are out of date cause -significant confusion or complaints, we will stop distributing the man -page. The alternative, updating the man page when we update the Info -file, is impractical because the rest of the work of maintaining GNU Fortran -leaves us no time for that. The GNU project regards man pages as -obsolete and should not let them take time away from other things. +All \fBgcc\fR and \fBg77\fR options +are accepted both by \fBg77\fR and by \fBgcc\fR +(as well as any other drivers built at the same time, +such as \fBg++\fR), +since adding \fBg77\fR to the \fBgcc\fR distribution +enables acceptance of \fBg77\fR options +by all of the relevant drivers. .PP -For complete and current documentation, refer to the Info file `\|\c -.B g77\c -\&\|' or the manual -.I -Using and Porting GNU Fortran (for version 0.5.24)\c -\&. Both are made from the Texinfo source file -.BR g77.texi . +In some cases, options have positive and negative forms; +the negative form of \fB\-ffoo\fR would be \fB\-fno-foo\fR. +This manual documents only one of these two forms, whichever +one is not the default. +.SH "OPTIONS" +.IX Header "OPTIONS" +Here is a summary of all the options specific to \s-1GNU\s0 Fortran, grouped +by type. Explanations are in the following sections. +.Ip "\fIOverall Options\fR" 4 +.IX Item "Overall Options" +\&\fB\-fversion \-fset-g77\-defaults \-fno-silent\fR +.Ip "\fIShorthand Options\fR" 4 +.IX Item "Shorthand Options" +\&\fB\-ff66 \-fno-f66 \-ff77 \-fno-f77 \-fno-ugly\fR +.Ip "\fIFortran Language Options\fR" 4 +.IX Item "Fortran Language Options" +\&\fB\-ffree-form \-fno-fixed-form \-ff90 +\&\-fvxt \-fdollar-ok \-fno-backslash +\&\-fno-ugly-args \-fno-ugly-assign \-fno-ugly-assumed +\&\-fugly-comma \-fugly-complex \-fugly-init \-fugly-logint +\&\-fonetrip \-ftypeless-boz +\&\-fintrin-case-initcap \-fintrin-case-upper +\&\-fintrin-case-lower \-fintrin-case-any +\&\-fmatch-case-initcap \-fmatch-case-upper +\&\-fmatch-case-lower \-fmatch-case-any +\&\-fsource-case-upper \-fsource-case-lower +\&\-fsource-case-preserve +\&\-fsymbol-case-initcap \-fsymbol-case-upper +\&\-fsymbol-case-lower \-fsymbol-case-any +\&\-fcase-strict-upper \-fcase-strict-lower +\&\-fcase-initcap \-fcase-upper \-fcase-lower \-fcase-preserve +\&\-ff2c-intrinsics-delete \-ff2c-intrinsics-hide +\&\-ff2c-intrinsics-disable \-ff2c-intrinsics-enable +\&\-fbadu77\-intrinsics-delete \-fbadu77\-intrinsics-hide +\&\-fbadu77\-intrinsics-disable \-fbadu77\-intrinsics-enable +\&\-ff90\-intrinsics-delete \-ff90\-intrinsics-hide +\&\-ff90\-intrinsics-disable \-ff90\-intrinsics-enable +\&\-fgnu-intrinsics-delete \-fgnu-intrinsics-hide +\&\-fgnu-intrinsics-disable \-fgnu-intrinsics-enable +\&\-fmil-intrinsics-delete \-fmil-intrinsics-hide +\&\-fmil-intrinsics-disable \-fmil-intrinsics-enable +\&\-funix-intrinsics-delete \-funix-intrinsics-hide +\&\-funix-intrinsics-disable \-funix-intrinsics-enable +\&\-fvxt-intrinsics-delete \-fvxt-intrinsics-hide +\&\-fvxt-intrinsics-disable \-fvxt-intrinsics-enable +\&\-ffixed-line-length-\fR\fIn\fR \fB\-ffixed-line-length-none\fR +.Ip "\fIWarning Options\fR" 4 +.IX Item "Warning Options" +\&\fB\-fsyntax-only \-pedantic \-pedantic-errors \-fpedantic +\&\-w \-Wno-globals \-Wimplicit \-Wunused \-Wuninitialized +\&\-Wall \-Wsurprising +\&\-Werror \-W\fR +.Ip "\fIDebugging Options\fR" 4 +.IX Item "Debugging Options" +\&\fB\-g\fR +.Ip "\fIOptimization Options\fR" 4 +.IX Item "Optimization Options" +\&\fB\-malign-double +\&\-ffloat-store \-fforce-mem \-fforce-addr \-fno-inline +\&\-ffast-math \-fstrength-reduce \-frerun-cse-after-loop +\&\-funsafe-math-optimizations \-fno-trapping-math +\&\-fexpensive-optimizations \-fdelayed-branch +\&\-fschedule-insns \-fschedule-insn2 \-fcaller-saves +\&\-funroll-loops \-funroll-all-loops +\&\-fno-move-all-movables \-fno-reduce-all-givs +\&\-fno-rerun-loop-opt\fR +.Ip "\fIDirectory Options\fR" 4 +.IX Item "Directory Options" +\&\fB\-I\fR\fIdir\fR \fB\-I-\fR +.Ip "\fICode Generation Options\fR" 4 +.IX Item "Code Generation Options" +\&\fB\-fno-automatic \-finit-local-zero \-fno-f2c +\&\-ff2c-library \-fno-underscoring \-fno-ident +\&\-fpcc-struct-return \-freg-struct-return +\&\-fshort-double \-fno-common \-fpack-struct +\&\-fzeros \-fno-second-underscore +\&\-femulate-complex +\&\-falias-check \-fargument-alias +\&\-fargument-noalias \-fno-argument-noalias-global +\&\-fno-globals \-fflatten-arrays +\&\-fbounds-check \-ffortran-bounds-check\fR .PP -If your system has the `\|\c -.B info\c -\&\|' command installed, the command `\|\c -.B info g77\c -\&\|' should work, unless -.B g77 -has not been properly installed. -If your system lacks `\|\c -.B info\c -\&\|', or you wish to avoid using it for now, -the command `\|\c -.B more /usr/info/g77.info*\c -\&\|' should work, unless -.B g77 -has not been properly installed. +Compilation can involve as many as four stages: preprocessing, code +generation (often what is really meant by the term ``compilation''), +assembly, and linking, always in that order. The first three +stages apply to an individual source file, and end by producing an +object file; linking combines all the object files (those newly +compiled, and those specified as input) into an executable file. .PP -If -.B g77 -has not been properly installed, so that you -cannot easily access the Info file for it, -ask your system administrator, or the installer -of -.B g77 -(if you know who that is) to fix the problem. -.SH DESCRIPTION -The C and F77 compilers are integrated; -.B g77 -is a program to call -.B gcc -with options to recognize programs written in Fortran (ANSI FORTRAN 77, -also called F77). -.B gcc -processes input files -through one or more of four stages: preprocessing, compilation, -assembly, and linking. This man page contains full descriptions for -.I only -F77-specific aspects of the compiler, though it also contains -summaries of some general-purpose options. For a fuller explanation -of the compiler, see -.BR gcc ( 1 ). - -For complete documentation on GNU Fortran, type `\|\c -.B info g77\c -\&\|'. - -F77 source files use the suffix `\|\c -.B .f\c -\&\|', `\|\c -.B .for\c -\&\|', or `\|\c -.B .FOR\c -\&\|'; F77 files to be preprocessed by -.BR cpp ( 1 ) -use the suffix `\|\c -.B .F\c -\&\|', `\|\c -.B .fpp\c -\&\|', or `\|\c -.B .FPP\c -\&\|'; Ratfor source files use the suffix `\|\c -.B .r\c -\&\|' (though -.B ratfor -itself is not supplied as part of -.B g77\c -\&). -.SH OPTIONS -There are many command-line options, including options to control -details of optimization, warnings, and code generation, which are -common to both -.B gcc -and -.B g77\c -\&. For full information on all options, see -.BR gcc ( 1 ). - -Options must be separate: `\|\c -.B \-dr\c -\&\|' is quite different from `\|\c -.B \-d \-r -\&\|'. - -Most `\|\c -.B \-f\c -\&\|' and `\|\c -.B \-W\c -\&\|' options have two contrary forms: -.BI \-f name -and -.BI \-fno\- name\c -\& (or -.BI \-W name -and -.BI \-Wno\- name\c -\&). Only the non-default forms are shown here. - -.TP -.B \-c -Compile or assemble the source files, but do not link. The compiler -output is an object file corresponding to each source file. -.TP -.BI \-D macro -Define macro \c -.I macro\c -\& with the string `\|\c -.B 1\c -\&\|' as its definition. -.TP -.BI \-D macro = defn -Define macro \c -.I macro\c -\& as \c -.I defn\c -\&. -.TP -.B \-E -Stop after the preprocessing stage; do not run the compiler proper. The -output is preprocessed source code, which is sent to the -standard output. -.TP -.B \-g +For any given input file, the file name suffix determines what kind of +program is contained in the file\-\-\-that is, the language in which the +program is written is generally indicated by the suffix. +Suffixes specific to \s-1GNU\s0 Fortran are listed below. +.Ip "\fIfile\fR\fB.f\fR" 4 +.IX Item "file.f" +.PD 0 +.Ip "\fIfile\fR\fB.for\fR" 4 +.IX Item "file.for" +.Ip "\fIfile\fR\fB.FOR\fR" 4 +.IX Item "file.FOR" +.PD +Fortran source code that should not be preprocessed. +.Sp +Such source code cannot contain any preprocessor directives, such +as \f(CW\*(C`#include\*(C'\fR, \f(CW\*(C`#define\*(C'\fR, \f(CW\*(C`#if\*(C'\fR, and so on. +.Sp +You can force \fB.f\fR files to be preprocessed by \fBcpp\fR by using +\&\fB\-x f77\-cpp-input\fR. +.Ip "\fIfile\fR\fB.F\fR" 4 +.IX Item "file.F" +.PD 0 +.Ip "\fIfile\fR\fB.fpp\fR" 4 +.IX Item "file.fpp" +.Ip "\fIfile\fR\fB.FPP\fR" 4 +.IX Item "file.FPP" +.PD +Fortran source code that must be preprocessed (by the C preprocessor +\&\fBcpp\fR, which is part of \s-1GNU\s0 \s-1CC\s0). +.Sp +Note that preprocessing is not extended to the contents of +files included by the \f(CW\*(C`INCLUDE\*(C'\fR directive\-\-\-the \f(CW\*(C`#include\*(C'\fR +preprocessor directive must be used instead. +.Ip "\fIfile\fR\fB.r\fR" 4 +.IX Item "file.r" +Ratfor source code, which must be preprocessed by the \fBratfor\fR +command, which is available separately (as it is not yet part of the \s-1GNU\s0 +Fortran distribution). +One version in Fortran, adapted for use with \fBg77\fR is at +<\fBftp://members.aol.com/n8tm/rat7.uue\fR> (of uncertain copyright +status). Another, public domain version in C is at +<\fBhttp://sepwww.stanford.edu/sep/prof/ratfor.shar.2\fR>. +.PP +\&\s-1UNIX\s0 users typically use the \fI\fIfile\fI.f\fR and \fI\fIfile\fI.F\fR +nomenclature. +Users of other operating systems, especially those that cannot +distinguish upper-case +letters from lower-case letters in their file names, typically use +the \fI\fIfile\fI.for\fR and \fI\fIfile\fI.fpp\fR nomenclature. +.PP +Use of the preprocessor \fBcpp\fR allows use of C-like +constructs such as \f(CW\*(C`#define\*(C'\fR and \f(CW\*(C`#include\*(C'\fR, but can +lead to unexpected, even mistaken, results due to Fortran's source file +format. +It is recommended that use of the C preprocessor +be limited to \f(CW\*(C`#include\*(C'\fR and, in +conjunction with \f(CW\*(C`#define\*(C'\fR, only \f(CW\*(C`#if\*(C'\fR and related directives, +thus avoiding in-line macro expansion entirely. +This recommendation applies especially +when using the traditional fixed source form. +With free source form, +fewer unexpected transformations are likely to happen, but use of +constructs such as Hollerith and character constants can nevertheless +present problems, especially when these are continued across multiple +source lines. +These problems result, primarily, from differences between the way +such constants are interpreted by the C preprocessor and by a Fortran +compiler. +.PP +Another example of a problem that results from using the C preprocessor +is that a Fortran comment line that happens to contain any +characters ``interesting'' to the C preprocessor, +such as a backslash at the end of the line, +is not recognized by the preprocessor as a comment line, +so instead of being passed through ``raw'', +the line is edited according to the rules for the preprocessor. +For example, the backslash at the end of the line is removed, +along with the subsequent newline, resulting in the next +line being effectively commented out\-\-\-unfortunate if that +line is a non-comment line of important code! +.PP +\&\fINote:\fR The \fB\-traditional\fR and \fB\-undef\fR flags are supplied +to \fBcpp\fR by default, to help avoid unpleasant surprises. +.PP +This means that \s-1ANSI\s0 C preprocessor features (such as the \fB#\fR +operator) aren't available, and only variables in the C reserved +namespace (generally, names with a leading underscore) are liable to +substitution by C predefines. +Thus, if you want to do system-specific +tests, use, for example, \fB#ifdef _\|_linux_\|_\fR rather than \fB#ifdef linux\fR. +Use the \fB\-v\fR option to see exactly how the preprocessor is invoked. +.PP +Unfortunately, the \fB\-traditional\fR flag will not avoid an error from +anything that \fBcpp\fR sees as an unterminated C comment, such as: +.PP +.Vb 2 +\& C Some Fortran compilers accept /* as starting +\& C an inline comment. +.Ve +The following options that affect overall processing are recognized +by the \fBg77\fR and \fBgcc\fR commands in a \s-1GNU\s0 Fortran installation: +.Ip "\fB\-fversion\fR" 4 +.IX Item "-fversion" +Ensure that the \fBg77\fR version of the compiler phase is reported, +if run, +and, starting in \f(CW\*(C`egcs\*(C'\fR version 1.1, +that internal consistency checks in the \fIf771\fR program are run. +.Sp +This option is supplied automatically when \fB\-v\fR or \fB\*(--verbose\fR +is specified as a command-line option for \fBg77\fR or \fBgcc\fR +and when the resulting commands compile Fortran source files. +.Sp +In \s-1GCC\s0 3.1, this is changed back to the behaviour \fBgcc\fR displays +for \fB.c\fR files. +.Ip "\fB\-fset-g77\-defaults\fR" 4 +.IX Item "-fset-g77-defaults" +\&\fIVersion info:\fR +This option was obsolete as of \f(CW\*(C`egcs\*(C'\fR +version 1.1. +The effect is instead achieved +by the \f(CW\*(C`lang_init_options\*(C'\fR routine +in \fIgcc/gcc/f/com.c\fR. +.Sp +Set up whatever \fBgcc\fR options are to apply to Fortran +compilations, and avoid running internal consistency checks +that might take some time. +.Sp +This option is supplied automatically when compiling Fortran code +via the \fBg77\fR or \fBgcc\fR command. +The description of this option is provided so that users seeing +it in the output of, say, \fBg77 \-v\fR understand why it is +there. +.Sp +Also, developers who run \f(CW\*(C`f771\*(C'\fR directly might want to specify it +by hand to get the same defaults as they would running \f(CW\*(C`f771\*(C'\fR +via \fBg77\fR or \fBgcc\fR +However, such developers should, after linking a new \f(CW\*(C`f771\*(C'\fR +executable, invoke it without this option once, +e.g. via \f(CW\*(C`./f771 \-quiet < /dev/null\*(C'\fR, +to ensure that they have not introduced any +internal inconsistencies (such as in the table of +intrinsics) before proceeding\-\--\fBg77\fR will crash +with a diagnostic if it detects an inconsistency. +.Ip "\fB\-fno-silent\fR" 4 +.IX Item "-fno-silent" +Print (to \f(CW\*(C`stderr\*(C'\fR) the names of the program units as +they are compiled, in a form similar to that used by popular +\&\s-1UNIX\s0 \fBf77\fR implementations and \fBf2c\fR +.Sh "Shorthand Options" +.IX Subsection "Shorthand Options" +The following options serve as ``shorthand'' +for other options accepted by the compiler: +.Ip "\fB\-fugly\fR" 4 +.IX Item "-fugly" +\&\fINote:\fR This option is no longer supported. +The information, below, is provided to aid +in the conversion of old scripts. +.Sp +Specify that certain ``ugly'' constructs are to be quietly accepted. +Same as: +.Sp +.Vb 3 +\& -fugly-args -fugly-assign -fugly-assumed +\& -fugly-comma -fugly-complex -fugly-init +\& -fugly-logint +.Ve +These constructs are considered inappropriate to use in new +or well-maintained portable Fortran code, but widely used +in old code. +.Ip "\fB\-fno-ugly\fR" 4 +.IX Item "-fno-ugly" +Specify that all ``ugly'' constructs are to be noisily rejected. +Same as: +.Sp +.Vb 3 +\& -fno-ugly-args -fno-ugly-assign -fno-ugly-assumed +\& -fno-ugly-comma -fno-ugly-complex -fno-ugly-init +\& -fno-ugly-logint +.Ve +.Ip "\fB\-ff66\fR" 4 +.IX Item "-ff66" +Specify that the program is written in idiomatic \s-1FORTRAN\s0 66. +Same as \fB\-fonetrip \-fugly-assumed\fR. +.Sp +The \fB\-fno-f66\fR option is the inverse of \fB\-ff66\fR. +As such, it is the same as \fB\-fno-onetrip \-fno-ugly-assumed\fR. +.Sp +The meaning of this option is likely to be refined as future +versions of \fBg77\fR provide more compatibility with other +existing and obsolete Fortran implementations. +.Ip "\fB\-ff77\fR" 4 +.IX Item "-ff77" +Specify that the program is written in idiomatic \s-1UNIX\s0 \s-1FORTRAN\s0 77 +and/or the dialect accepted by the \fBf2c\fR product. +Same as \fB\-fbackslash \-fno-typeless-boz\fR. +.Sp +The meaning of this option is likely to be refined as future +versions of \fBg77\fR provide more compatibility with other +existing and obsolete Fortran implementations. +.Ip "\fB\-fno-f77\fR" 4 +.IX Item "-fno-f77" +The \fB\-fno-f77\fR option is \fInot\fR the inverse +of \fB\-ff77\fR. +It specifies that the program is not written in idiomatic \s-1UNIX\s0 +\&\s-1FORTRAN\s0 77 or \fBf2c\fR but in a more widely portable dialect. +\&\fB\-fno-f77\fR is the same as \fB\-fno-backslash\fR. +.Sp +The meaning of this option is likely to be refined as future +versions of \fBg77\fR provide more compatibility with other +existing and obsolete Fortran implementations. +.Sh "Options Controlling Fortran Dialect" +.IX Subsection "Options Controlling Fortran Dialect" +The following options control the dialect of Fortran +that the compiler accepts: +.Ip "\fB\-ffree-form\fR" 4 +.IX Item "-ffree-form" +.PD 0 +.Ip "\fB\-fno-fixed-form\fR" 4 +.IX Item "-fno-fixed-form" +.PD +Specify that the source file is written in free form +(introduced in Fortran 90) instead of the more-traditional fixed form. +.Ip "\fB\-ff90\fR" 4 +.IX Item "-ff90" +Allow certain Fortran-90 constructs. +.Sp +This option controls whether certain +Fortran 90 constructs are recognized. +(Other Fortran 90 constructs +might or might not be recognized depending on other options such as +\&\fB\-fvxt\fR, \fB\-ff90\-intrinsics-enable\fR, and the +current level of support for Fortran 90.) +.Ip "\fB\-fvxt\fR" 4 +.IX Item "-fvxt" +Specify the treatment of certain constructs that have different +meanings depending on whether the code is written in +\&\s-1GNU\s0 Fortran (based on \s-1FORTRAN\s0 77 and akin to Fortran 90) +or \s-1VXT\s0 Fortran (more like \s-1VAX\s0 \s-1FORTRAN\s0). +.Sp +The default is \fB\-fno-vxt\fR. +\&\fB\-fvxt\fR specifies that the \s-1VXT\s0 Fortran interpretations +for those constructs are to be chosen. +.Ip "\fB\-fdollar-ok\fR" 4 +.IX Item "-fdollar-ok" +Allow \fB$\fR as a valid character in a symbol name. +.Ip "\fB\-fno-backslash\fR" 4 +.IX Item "-fno-backslash" +Specify that \fB\e\fR is not to be specially interpreted in character +and Hollerith constants a la C and many \s-1UNIX\s0 Fortran compilers. +.Sp +For example, with \fB\-fbackslash\fR in effect, \fBA\enB\fR specifies +three characters, with the second one being newline. +With \fB\-fno-backslash\fR, it specifies four characters, +\&\fBA\fR, \fB\e\fR, \fBn\fR, and \fBB\fR. +.Sp +Note that \fBg77\fR implements a fairly general form of backslash +processing that is incompatible with the narrower forms supported +by some other compilers. +For example, \fB'A\e003B'\fR is a three-character string in \fBg77\fR +whereas other compilers that support backslash might not support +the three-octal-digit form, and thus treat that string as longer +than three characters. +.Ip "\fB\-fno-ugly-args\fR" 4 +.IX Item "-fno-ugly-args" +Disallow passing Hollerith and typeless constants as actual +arguments (for example, \fB\s-1CALL\s0 FOO(4HABCD)\fR). +.Ip "\fB\-fugly-assign\fR" 4 +.IX Item "-fugly-assign" +Use the same storage for a given variable regardless of +whether it is used to hold an assigned-statement label +(as in \fB\s-1ASSIGN\s0 10 \s-1TO\s0 I\fR) or used to hold numeric data +(as in \fBI = 3\fR). +.Ip "\fB\-fugly-assumed\fR" 4 +.IX Item "-fugly-assumed" +Assume any dummy array with a final dimension specified as \fB1\fR +is really an assumed-size array, as if \fB*\fR had been specified +for the final dimension instead of \fB1\fR. +.Sp +For example, \fB\s-1DIMENSION\s0 X(1)\fR is treated as if it +had read \fB\s-1DIMENSION\s0 X(*)\fR. +.Ip "\fB\-fugly-comma\fR" 4 +.IX Item "-fugly-comma" +In an external-procedure invocation, +treat a trailing comma in the argument list +as specification of a trailing null argument, +and treat an empty argument list +as specification of a single null argument. +.Sp +For example, \fB\s-1CALL\s0 \f(BIFOO\fB\|(,)\fR is treated as +\&\fB\s-1CALL\s0 FOO(%\f(BIVAL\fB\|(0), %\f(BIVAL\fB\|(0))\fR. +That is, \fItwo\fR null arguments are specified +by the procedure call when \fB\-fugly-comma\fR is in force. +And \fBF = \f(BIFUNC()\fB\fR is treated as \fBF = FUNC(%\f(BIVAL\fB\|(0))\fR. +.Sp +The default behavior, \fB\-fno-ugly-comma\fR, is to ignore +a single trailing comma in an argument list. +So, by default, \fB\s-1CALL\s0 FOO(X,)\fR is treated +exactly the same as \fB\s-1CALL\s0 \f(BIFOO\fB\|(X)\fR. +.Ip "\fB\-fugly-complex\fR" 4 +.IX Item "-fugly-complex" +Do not complain about \fBREAL(\fR\fIexpr\fR\fB)\fR or +\&\fBAIMAG(\fR\fIexpr\fR\fB)\fR when \fIexpr\fR is a \f(CW\*(C`COMPLEX\*(C'\fR +type other than \f(CW\*(C`COMPLEX(KIND=1)\*(C'\fR\-\-\-usually +this is used to permit \f(CW\*(C`COMPLEX(KIND=2)\*(C'\fR +(\f(CW\*(C`DOUBLE COMPLEX\*(C'\fR) operands. +.Sp +The \fB\-ff90\fR option controls the interpretation +of this construct. +.Ip "\fB\-fno-ugly-init\fR" 4 +.IX Item "-fno-ugly-init" +Disallow use of Hollerith and typeless constants as initial +values (in \f(CW\*(C`PARAMETER\*(C'\fR and \f(CW\*(C`DATA\*(C'\fR statements), and +use of character constants to +initialize numeric types and vice versa. +.Sp +For example, \fB\s-1DATA\s0 I/'F'/, \s-1CHRVAR/65/\s0, J/4HABCD/\fR is disallowed by +\&\fB\-fno-ugly-init\fR. +.Ip "\fB\-fugly-logint\fR" 4 +.IX Item "-fugly-logint" +Treat \f(CW\*(C`INTEGER\*(C'\fR and \f(CW\*(C`LOGICAL\*(C'\fR variables and +expressions as potential stand-ins for each other. +.Sp +For example, automatic conversion between \f(CW\*(C`INTEGER\*(C'\fR and +\&\f(CW\*(C`LOGICAL\*(C'\fR is enabled, for many contexts, via this option. +.Ip "\fB\-fonetrip\fR" 4 +.IX Item "-fonetrip" +Executable iterative \f(CW\*(C`DO\*(C'\fR loops are to be executed at +least once each time they are reached. +.Sp +\&\s-1ANSI\s0 \s-1FORTRAN\s0 77 and more recent versions of the Fortran standard +specify that the body of an iterative \f(CW\*(C`DO\*(C'\fR loop is not executed +if the number of iterations calculated from the parameters of the +loop is less than 1. +(For example, \fB\s-1DO\s0 10 I = 1, 0\fR.) +Such a loop is called a \fIzero-trip loop\fR. +.Sp +Prior to \s-1ANSI\s0 \s-1FORTRAN\s0 77, many compilers implemented \f(CW\*(C`DO\*(C'\fR loops +such that the body of a loop would be executed at least once, even +if the iteration count was zero. +Fortran code written assuming this behavior is said to require +\&\fIone-trip loops\fR. +For example, some code written to the \s-1FORTRAN\s0 66 standard +expects this behavior from its \f(CW\*(C`DO\*(C'\fR loops, although that +standard did not specify this behavior. +.Sp +The \fB\-fonetrip\fR option specifies that the source \fIfile\fR\|(s) being +compiled require one-trip loops. +.Sp +This option affects only those loops specified by the (iterative) \f(CW\*(C`DO\*(C'\fR +statement and by implied-\f(CW\*(C`DO\*(C'\fR lists in I/O statements. +Loops specified by implied-\f(CW\*(C`DO\*(C'\fR lists in \f(CW\*(C`DATA\*(C'\fR and +specification (non-executable) statements are not affected. +.Ip "\fB\-ftypeless-boz\fR" 4 +.IX Item "-ftypeless-boz" +Specifies that prefix-radix non-decimal constants, such as +\&\fBZ'\s-1ABCD\s0'\fR, are typeless instead of \f(CW\*(C`INTEGER(KIND=1)\*(C'\fR. +.Sp +You can test for yourself whether a particular compiler treats +the prefix form as \f(CW\*(C`INTEGER(KIND=1)\*(C'\fR or typeless by running the +following program: +.Sp +.Vb 6 +\& EQUIVALENCE (I, R) +\& R = Z'ABCD1234' +\& J = Z'ABCD1234' +\& IF (J .EQ. I) PRINT *, 'Prefix form is TYPELESS' +\& IF (J .NE. I) PRINT *, 'Prefix form is INTEGER' +\& END +.Ve +Reports indicate that many compilers process this form as +\&\f(CW\*(C`INTEGER(KIND=1)\*(C'\fR, though a few as typeless, and at least one +based on a command-line option specifying some kind of +compatibility. +.Ip "\fB\-fintrin-case-initcap\fR" 4 +.IX Item "-fintrin-case-initcap" +.PD 0 +.Ip "\fB\-fintrin-case-upper\fR" 4 +.IX Item "-fintrin-case-upper" +.Ip "\fB\-fintrin-case-lower\fR" 4 +.IX Item "-fintrin-case-lower" +.Ip "\fB\-fintrin-case-any\fR" 4 +.IX Item "-fintrin-case-any" +.PD +Specify expected case for intrinsic names. +\&\fB\-fintrin-case-lower\fR is the default. +.Ip "\fB\-fmatch-case-initcap\fR" 4 +.IX Item "-fmatch-case-initcap" +.PD 0 +.Ip "\fB\-fmatch-case-upper\fR" 4 +.IX Item "-fmatch-case-upper" +.Ip "\fB\-fmatch-case-lower\fR" 4 +.IX Item "-fmatch-case-lower" +.Ip "\fB\-fmatch-case-any\fR" 4 +.IX Item "-fmatch-case-any" +.PD +Specify expected case for keywords. +\&\fB\-fmatch-case-lower\fR is the default. +.Ip "\fB\-fsource-case-upper\fR" 4 +.IX Item "-fsource-case-upper" +.PD 0 +.Ip "\fB\-fsource-case-lower\fR" 4 +.IX Item "-fsource-case-lower" +.Ip "\fB\-fsource-case-preserve\fR" 4 +.IX Item "-fsource-case-preserve" +.PD +Specify whether source text other than character and Hollerith constants +is to be translated to uppercase, to lowercase, or preserved as is. +\&\fB\-fsource-case-lower\fR is the default. +.Ip "\fB\-fsymbol-case-initcap\fR" 4 +.IX Item "-fsymbol-case-initcap" +.PD 0 +.Ip "\fB\-fsymbol-case-upper\fR" 4 +.IX Item "-fsymbol-case-upper" +.Ip "\fB\-fsymbol-case-lower\fR" 4 +.IX Item "-fsymbol-case-lower" +.Ip "\fB\-fsymbol-case-any\fR" 4 +.IX Item "-fsymbol-case-any" +.PD +Specify valid cases for user-defined symbol names. +\&\fB\-fsymbol-case-any\fR is the default. +.Ip "\fB\-fcase-strict-upper\fR" 4 +.IX Item "-fcase-strict-upper" +Same as \fB\-fintrin-case-upper \-fmatch-case-upper \-fsource-case-preserve +\&\-fsymbol-case-upper\fR. +(Requires all pertinent source to be in uppercase.) +.Ip "\fB\-fcase-strict-lower\fR" 4 +.IX Item "-fcase-strict-lower" +Same as \fB\-fintrin-case-lower \-fmatch-case-lower \-fsource-case-preserve +\&\-fsymbol-case-lower\fR. +(Requires all pertinent source to be in lowercase.) +.Ip "\fB\-fcase-initcap\fR" 4 +.IX Item "-fcase-initcap" +Same as \fB\-fintrin-case-initcap \-fmatch-case-initcap \-fsource-case-preserve +\&\-fsymbol-case-initcap\fR. +(Requires all pertinent source to be in initial capitals, +as in \fBPrint *,SqRt(Value)\fR.) +.Ip "\fB\-fcase-upper\fR" 4 +.IX Item "-fcase-upper" +Same as \fB\-fintrin-case-any \-fmatch-case-any \-fsource-case-upper +\&\-fsymbol-case-any\fR. +(Maps all pertinent source to uppercase.) +.Ip "\fB\-fcase-lower\fR" 4 +.IX Item "-fcase-lower" +Same as \fB\-fintrin-case-any \-fmatch-case-any \-fsource-case-lower +\&\-fsymbol-case-any\fR. +(Maps all pertinent source to lowercase.) +.Ip "\fB\-fcase-preserve\fR" 4 +.IX Item "-fcase-preserve" +Same as \fB\-fintrin-case-any \-fmatch-case-any \-fsource-case-preserve +\&\-fsymbol-case-any\fR. +(Preserves all case in user-defined symbols, +while allowing any-case matching of intrinsics and keywords. +For example, \fBcall Foo(i,I)\fR would pass two \fIdifferent\fR +variables named \fBi\fR and \fBI\fR to a procedure named \fBFoo\fR.) +.Ip "\fB\-fbadu77\-intrinsics-delete\fR" 4 +.IX Item "-fbadu77-intrinsics-delete" +.PD 0 +.Ip "\fB\-fbadu77\-intrinsics-hide\fR" 4 +.IX Item "-fbadu77-intrinsics-hide" +.Ip "\fB\-fbadu77\-intrinsics-disable\fR" 4 +.IX Item "-fbadu77-intrinsics-disable" +.Ip "\fB\-fbadu77\-intrinsics-enable\fR" 4 +.IX Item "-fbadu77-intrinsics-enable" +.PD +Specify status of \s-1UNIX\s0 intrinsics having inappropriate forms. +\&\fB\-fbadu77\-intrinsics-enable\fR is the default. +.Ip "\fB\-ff2c-intrinsics-delete\fR" 4 +.IX Item "-ff2c-intrinsics-delete" +.PD 0 +.Ip "\fB\-ff2c-intrinsics-hide\fR" 4 +.IX Item "-ff2c-intrinsics-hide" +.Ip "\fB\-ff2c-intrinsics-disable\fR" 4 +.IX Item "-ff2c-intrinsics-disable" +.Ip "\fB\-ff2c-intrinsics-enable\fR" 4 +.IX Item "-ff2c-intrinsics-enable" +.PD +Specify status of f2c-specific intrinsics. +\&\fB\-ff2c-intrinsics-enable\fR is the default. +.Ip "\fB\-ff90\-intrinsics-delete\fR" 4 +.IX Item "-ff90-intrinsics-delete" +.PD 0 +.Ip "\fB\-ff90\-intrinsics-hide\fR" 4 +.IX Item "-ff90-intrinsics-hide" +.Ip "\fB\-ff90\-intrinsics-disable\fR" 4 +.IX Item "-ff90-intrinsics-disable" +.Ip "\fB\-ff90\-intrinsics-enable\fR" 4 +.IX Item "-ff90-intrinsics-enable" +.PD +Specify status of F90\-specific intrinsics. +\&\fB\-ff90\-intrinsics-enable\fR is the default. +.Ip "\fB\-fgnu-intrinsics-delete\fR" 4 +.IX Item "-fgnu-intrinsics-delete" +.PD 0 +.Ip "\fB\-fgnu-intrinsics-hide\fR" 4 +.IX Item "-fgnu-intrinsics-hide" +.Ip "\fB\-fgnu-intrinsics-disable\fR" 4 +.IX Item "-fgnu-intrinsics-disable" +.Ip "\fB\-fgnu-intrinsics-enable\fR" 4 +.IX Item "-fgnu-intrinsics-enable" +.PD +Specify status of Digital's COMPLEX-related intrinsics. +\&\fB\-fgnu-intrinsics-enable\fR is the default. +.Ip "\fB\-fmil-intrinsics-delete\fR" 4 +.IX Item "-fmil-intrinsics-delete" +.PD 0 +.Ip "\fB\-fmil-intrinsics-hide\fR" 4 +.IX Item "-fmil-intrinsics-hide" +.Ip "\fB\-fmil-intrinsics-disable\fR" 4 +.IX Item "-fmil-intrinsics-disable" +.Ip "\fB\-fmil-intrinsics-enable\fR" 4 +.IX Item "-fmil-intrinsics-enable" +.PD +Specify status of MIL-STD-1753\-specific intrinsics. +\&\fB\-fmil-intrinsics-enable\fR is the default. +.Ip "\fB\-funix-intrinsics-delete\fR" 4 +.IX Item "-funix-intrinsics-delete" +.PD 0 +.Ip "\fB\-funix-intrinsics-hide\fR" 4 +.IX Item "-funix-intrinsics-hide" +.Ip "\fB\-funix-intrinsics-disable\fR" 4 +.IX Item "-funix-intrinsics-disable" +.Ip "\fB\-funix-intrinsics-enable\fR" 4 +.IX Item "-funix-intrinsics-enable" +.PD +Specify status of \s-1UNIX\s0 intrinsics. +\&\fB\-funix-intrinsics-enable\fR is the default. +.Ip "\fB\-fvxt-intrinsics-delete\fR" 4 +.IX Item "-fvxt-intrinsics-delete" +.PD 0 +.Ip "\fB\-fvxt-intrinsics-hide\fR" 4 +.IX Item "-fvxt-intrinsics-hide" +.Ip "\fB\-fvxt-intrinsics-disable\fR" 4 +.IX Item "-fvxt-intrinsics-disable" +.Ip "\fB\-fvxt-intrinsics-enable\fR" 4 +.IX Item "-fvxt-intrinsics-enable" +.PD +Specify status of \s-1VXT\s0 intrinsics. +\&\fB\-fvxt-intrinsics-enable\fR is the default. +.Ip "\fB\-ffixed-line-length-\fR\fIn\fR" 4 +.IX Item "-ffixed-line-length-n" +Set column after which characters are ignored in typical fixed-form +lines in the source file, and through which spaces are assumed (as +if padded to that length) after the ends of short fixed-form lines. +.Sp +Popular values for \fIn\fR include 72 (the +standard and the default), 80 (card image), and 132 (corresponds +to ``extended-source'' options in some popular compilers). +\&\fIn\fR may be \fBnone\fR, meaning that the entire line is meaningful +and that continued character constants never have implicit spaces appended +to them to fill out the line. +\&\fB\-ffixed-line-length-0\fR means the same thing as +\&\fB\-ffixed-line-length-none\fR. +.Sh "Options to Request or Suppress Warnings" +.IX Subsection "Options to Request or Suppress Warnings" +Warnings are diagnostic messages that report constructions which +are not inherently erroneous but which are risky or suggest there +might have been an error. +.PP +You can request many specific warnings with options beginning \fB\-W\fR, +for example \fB\-Wimplicit\fR to request warnings on implicit +declarations. Each of these specific warning options also has a +negative form beginning \fB\-Wno-\fR to turn off warnings; +for example, \fB\-Wno-implicit\fR. This manual lists only one of the +two forms, whichever is not the default. +.PP +These options control the amount and kinds of warnings produced by \s-1GNU\s0 +Fortran: +.Ip "\fB\-fsyntax-only\fR" 4 +.IX Item "-fsyntax-only" +Check the code for syntax errors, but don't do anything beyond that. +.Ip "\fB\-pedantic\fR" 4 +.IX Item "-pedantic" +Issue warnings for uses of extensions to \s-1ANSI\s0 \s-1FORTRAN\s0 77. +\&\fB\-pedantic\fR also applies to C-language constructs where they +occur in \s-1GNU\s0 Fortran source files, such as use of \fB\ee\fR in a +character constant within a directive like \fB#include\fR. +.Sp +Valid \s-1ANSI\s0 \s-1FORTRAN\s0 77 programs should compile properly with or without +this option. +However, without this option, certain \s-1GNU\s0 extensions and traditional +Fortran features are supported as well. +With this option, many of them are rejected. +.Sp +Some users try to use \fB\-pedantic\fR to check programs for strict \s-1ANSI\s0 +conformance. +They soon find that it does not do quite what they want\-\-\-it finds some +non-ANSI practices, but not all. +However, improvements to \fBg77\fR in this area are welcome. +.Ip "\fB\-pedantic-errors\fR" 4 +.IX Item "-pedantic-errors" +Like \fB\-pedantic\fR, except that errors are produced rather than +warnings. +.Ip "\fB\-fpedantic\fR" 4 +.IX Item "-fpedantic" +Like \fB\-pedantic\fR, but applies only to Fortran constructs. +.Ip "\fB\-w\fR" 4 +.IX Item "-w" +Inhibit all warning messages. +.Ip "\fB\-Wno-globals\fR" 4 +.IX Item "-Wno-globals" +Inhibit warnings about use of a name as both a global name +(a subroutine, function, or block data program unit, or a +common block) and implicitly as the name of an intrinsic +in a source file. +.Sp +Also inhibit warnings about inconsistent invocations and/or +definitions of global procedures (function and subroutines). +Such inconsistencies include different numbers of arguments +and different types of arguments. +.Ip "\fB\-Wimplicit\fR" 4 +.IX Item "-Wimplicit" +Warn whenever a variable, array, or function is implicitly +declared. +Has an effect similar to using the \f(CW\*(C`IMPLICIT NONE\*(C'\fR statement +in every program unit. +(Some Fortran compilers provide this feature by an option +named \fB\-u\fR or \fB/WARNINGS=DECLARATIONS\fR.) +.Ip "\fB\-Wunused\fR" 4 +.IX Item "-Wunused" +Warn whenever a variable is unused aside from its declaration. +.Ip "\fB\-Wuninitialized\fR" 4 +.IX Item "-Wuninitialized" +Warn whenever an automatic variable is used without first being initialized. +.Sp +These warnings are possible only in optimizing compilation, +because they require data-flow information that is computed only +when optimizing. If you don't specify \fB\-O\fR, you simply won't +get these warnings. +.Sp +These warnings occur only for variables that are candidates for +register allocation. Therefore, they do not occur for a variable +whose address is taken, or whose size +is other than 1, 2, 4 or 8 bytes. Also, they do not occur for +arrays, even when they are in registers. +.Sp +Note that there might be no warning about a variable that is used only +to compute a value that itself is never used, because such +computations may be deleted by data-flow analysis before the warnings +are printed. +.Sp +These warnings are made optional because \s-1GNU\s0 Fortran is not smart +enough to see all the reasons why the code might be correct +despite appearing to have an error. Here is one example of how +this can happen: +.Sp +.Vb 6 +\& SUBROUTINE DISPAT(J) +\& IF (J.EQ.1) I=1 +\& IF (J.EQ.2) I=4 +\& IF (J.EQ.3) I=5 +\& CALL FOO(I) +\& END +.Ve +If the value of \f(CW\*(C`J\*(C'\fR is always 1, 2 or 3, then \f(CW\*(C`I\*(C'\fR is +always initialized, but \s-1GNU\s0 Fortran doesn't know this. Here is +another common case: +.Sp +.Vb 6 +\& SUBROUTINE MAYBE(FLAG) +\& LOGICAL FLAG +\& IF (FLAG) VALUE = 9.4 +\& ... +\& IF (FLAG) PRINT *, VALUE +\& END +.Ve +This has no bug because \f(CW\*(C`VALUE\*(C'\fR is used only if it is set. +.Ip "\fB\-Wall\fR" 4 +.IX Item "-Wall" +The \fB\-Wunused\fR and \fB\-Wuninitialized\fR options combined. +These are all the +options which pertain to usage that we recommend avoiding and that we +believe is easy to avoid. +(As more warnings are added to \fBg77\fR some might +be added to the list enabled by \fB\-Wall\fR.) +.PP +The remaining \fB\-W...\fR options are not implied by \fB\-Wall\fR +because they warn about constructions that we consider reasonable to +use, on occasion, in clean programs. +.Ip "\fB\-Wsurprising\fR" 4 +.IX Item "-Wsurprising" +Warn about ``suspicious'' constructs that are interpreted +by the compiler in a way that might well be surprising to +someone reading the code. +These differences can result in subtle, compiler-dependent +(even machine-dependent) behavioral differences. +The constructs warned about include: +.RS 4 +.Ip "\(bu" 4 +Expressions having two arithmetic operators in a row, such +as \fBX*\-Y\fR. +Such a construct is nonstandard, and can produce +unexpected results in more complicated situations such +as \fBX**\-Y*Z\fR. +\&\fBg77\fR along with many other compilers, interprets +this example differently than many programmers, and a few +other compilers. +Specifically, \fBg77\fR interprets \fBX**\-Y*Z\fR as +\&\fB(X**(\-Y))*Z\fR, while others might think it should +be interpreted as \fBX**(\-(Y*Z))\fR. +.Sp +A revealing example is the constant expression \fB2**\-2*1.\fR, +which \fBg77\fR evaluates to .25, while others might evaluate +it to 0., the difference resulting from the way precedence affects +type promotion. +.Sp +(The \fB\-fpedantic\fR option also warns about expressions +having two arithmetic operators in a row.) +.Ip "\(bu" 4 +Expressions with a unary minus followed by an operand and then +a binary operator other than plus or minus. +For example, \fB\-2**2\fR produces a warning, because +the precedence is \fB\-(2**2)\fR, yielding \-4, not +\&\fB(\-2)**2\fR, which yields 4, and which might represent +what a programmer expects. +.Sp +An example of an expression producing different results +in a surprising way is \fB\-I*S\fR, where \fII\fR holds +the value \fB\-2147483648\fR and \fIS\fR holds \fB0.5\fR. +On many systems, negating \fII\fR results in the same +value, not a positive number, because it is already the +lower bound of what an \f(CW\*(C`INTEGER(KIND=1)\*(C'\fR variable can hold. +So, the expression evaluates to a positive number, while +the ``expected'' interpretation, \fB(\-I)*S\fR, would +evaluate to a negative number. +.Sp +Even cases such as \fB\-I*J\fR produce warnings, +even though, in most configurations and situations, +there is no computational difference between the +results of the two interpretations\-\-\-the purpose +of this warning is to warn about differing interpretations +and encourage a better style of coding, not to identify +only those places where bugs might exist in the user's +code. +.Ip "\(bu" 4 +\&\f(CW\*(C`DO\*(C'\fR loops with \f(CW\*(C`DO\*(C'\fR variables that are not +of integral type\-\-\-that is, using \f(CW\*(C`REAL\*(C'\fR +variables as loop control variables. +Although such loops can be written to work in the +``obvious'' way, the way \fBg77\fR is required by the +Fortran standard to interpret such code is likely to +be quite different from the way many programmers expect. +(This is true of all \f(CW\*(C`DO\*(C'\fR loops, but the differences +are pronounced for non-integral loop control variables.) +.RE +.RS 4 +.RE +.Ip "\fB\-Werror\fR" 4 +.IX Item "-Werror" +Make all warnings into errors. +.Ip "\fB\-W\fR" 4 +.IX Item "-W" +Turns on ``extra warnings'' and, if optimization is specified +via \fB\-O\fR, the \fB\-Wuninitialized\fR option. +(This might change in future versions of \fBg77\fR +.Sp +``Extra warnings'' are issued for: +.RS 4 +.Ip "\(bu" 4 +Unused parameters to a procedure (when \fB\-Wunused\fR also is +specified). +.Ip "\(bu" 4 +Overflows involving floating-point constants (not available +for certain configurations). +.RE +.RS 4 +.RE +.PP +Some of these have no effect when compiling programs written in Fortran: +.Ip "\fB\-Wcomment\fR" 4 +.IX Item "-Wcomment" +.PD 0 +.Ip "\fB\-Wformat\fR" 4 +.IX Item "-Wformat" +.Ip "\fB\-Wparentheses\fR" 4 +.IX Item "-Wparentheses" +.Ip "\fB\-Wswitch\fR" 4 +.IX Item "-Wswitch" +.Ip "\fB\-Wtraditional\fR" 4 +.IX Item "-Wtraditional" +.Ip "\fB\-Wshadow\fR" 4 +.IX Item "-Wshadow" +.Ip "\fB\-Wid-clash-\fR\fIlen\fR" 4 +.IX Item "-Wid-clash-len" +.Ip "\fB\-Wlarger-than-\fR\fIlen\fR" 4 +.IX Item "-Wlarger-than-len" +.Ip "\fB\-Wconversion\fR" 4 +.IX Item "-Wconversion" +.Ip "\fB\-Waggregate-return\fR" 4 +.IX Item "-Waggregate-return" +.Ip "\fB\-Wredundant-decls\fR" 4 +.IX Item "-Wredundant-decls" +.PD +These options all could have some relevant meaning for +\&\s-1GNU\s0 Fortran programs, but are not yet supported. +.Sh "Options for Debugging Your Program or \s-1GNU\s0 Fortran" +.IX Subsection "Options for Debugging Your Program or GNU Fortran" +\&\s-1GNU\s0 Fortran has various special options that are used for debugging +either your program or \fBg77\fR +.Ip "\fB\-g\fR" 4 +.IX Item "-g" Produce debugging information in the operating system's native format -(for DBX or SDB or DWARF). GDB also can work with this debugging -information. On most systems that use DBX format, `\|\c -.B \-g\c -\&\|' enables use -of extra debugging information that only GDB can use. - -Unlike most other Fortran compilers, GNU Fortran allows you to use `\|\c -.B \-g\c -\&\|' with -`\|\c -.B \-O\c -\&\|'. The shortcuts taken by optimized code may occasionally -produce surprising results: some variables you declared may not exist -at all; flow of control may briefly move where you did not expect it; -some statements may not be executed because they compute constant -results or their values were already at hand; some statements may -execute in different places because they were moved out of loops. - -Nevertheless it proves possible to debug optimized output. This makes -it reasonable to use the optimizer for programs that might have bugs. -.TP -.BI "\-I" "dir"\c -\& -Append directory \c -.I dir\c -\& to the list of directories searched for include files. -.TP -.BI "\-L" "dir"\c -\& -Add directory \c -.I dir\c -\& to the list of directories to be searched -for `\|\c -.B \-l\c -\&\|'. -.TP -.BI \-l library\c -\& -Use the library named \c -.I library\c -\& when linking. -.TP -.B \-nostdinc -Do not search the standard system directories for header files. Only -the directories you have specified with -.B \-I -options (and the current directory, if appropriate) are searched. -.TP -.B \-O -Optimize. Optimizing compilation takes somewhat more time, and a lot -more memory for a large function. See the GCC documentation for -further optimisation options. Loop unrolling, in particular, may be -worth investigating for typical numerical Fortran programs. -.TP -.BI "\-o " file\c -\& -Place output in file \c -.I file\c -\&. -.TP -.B \-S -Stop after the stage of compilation proper; do not assemble. The output -is an assembler code file for each non-assembler input -file specified. -.TP -.BI \-U macro -Undefine macro \c -.I macro\c -\&. -.TP -.B \-v -Print (on standard error output) the commands executed to run the -stages of compilation. Also print the version number of the compiler -driver program and of the preprocessor and the compiler proper. The -version numbers of g77 itself and the GCC distribution on which it is -based are distinct. -.TP -.B \-Wall -Issue warnings for conditions which pertain to usage that we recommend -avoiding and that we believe is easy to avoid, even in conjunction -with macros. +(stabs, \s-1COFF\s0, \s-1XCOFF\s0, or \s-1DWARF\s0). \s-1GDB\s0 can work with this debugging +information. +.Sp +A sample debugging session looks like this (note the use of the breakpoint): +.Sp +.Vb 24 +\& $ cat gdb.f +\& PROGRAM PROG +\& DIMENSION A(10) +\& DATA A /1.,2.,3.,4.,5.,6.,7.,8.,9.,10./ +\& A(5) = 4. +\& PRINT*,A +\& END +\& $ g77 -g -O gdb.f +\& $ gdb a.out +\& ... +\& (gdb) break MAIN__ +\& Breakpoint 1 at 0x8048e96: file gdb.f, line 4. +\& (gdb) run +\& Starting program: /home/toon/g77-bugs/./a.out +\& Breakpoint 1, MAIN__ () at gdb.f:4 +\& 4 A(5) = 4. +\& Current language: auto; currently fortran +\& (gdb) print a(5) +\& $1 = 5 +\& (gdb) step +\& 5 PRINT*,A +\& (gdb) print a(5) +\& $2 = 4 +\& ... +.Ve +One could also add the setting of the breakpoint and the first run command +to the file \fI.gdbinit\fR in the current directory, to simplify the debugging +session. +.Sh "Options That Control Optimization" +.IX Subsection "Options That Control Optimization" +Most Fortran users will want to use no optimization when +developing and testing programs, and use \fB\-O\fR or \fB\-O2\fR when +compiling programs for late-cycle testing and for production use. +However, note that certain diagnostics\-\-\-such as for uninitialized +variables\-\-\-depend on the flow analysis done by \fB\-O\fR, i.e. you +must use \fB\-O\fR or \fB\-O2\fR to get such diagnostics. .PP - -.SH FILES -.ta \w'LIBDIR/g77\-include 'u -file.h C header (preprocessor) file -.br -file.f Fortran source file -.br -file.for Fortran source file -.br -file.FOR Fortran source file -.br -file.F preprocessed Fortran source file -.br -file.fpp preprocessed Fortran source file -.br -file.FPP preprocessed Fortran source file -.br -file.r Ratfor source file (ratfor not included) -.br -file.s assembly language file -.br -file.o object file -.br -a.out link edited output -.br -\fITMPDIR\fR/cc\(** temporary files -.br -\fILIBDIR\fR/cpp preprocessor -.br -\fILIBDIR\fR/f771 compiler -.br -\fILIBDIR\fR/libg2c.a Fortran run-time library -.br -\fILIBDIR\fR/libgcc.a GCC subroutine library -.br -/lib/crt[01n].o start-up routine -.br -/lib/libc.a standard C library, see -.IR intro (3) -.br -/usr/include standard directory for -.B #include -files -.br -\fILIBDIR\fR/include standard gcc directory for -.B #include -.br - files. -.sp -.I LIBDIR -is usually -.B /usr/local/lib/\c -.IR machine / version . -.sp -.I TMPDIR -comes from the environment variable -.B TMPDIR -(default -.B /usr/tmp -if available, else -.B /tmp\c -\&). +The following flags have particular applicability when +compiling Fortran programs: +.Ip "\fB\-malign-double\fR" 4 +.IX Item "-malign-double" +(Intel x86 architecture only.) +.Sp +Noticeably improves performance of \fBg77\fR programs making +heavy use of \f(CW\*(C`REAL(KIND=2)\*(C'\fR (\f(CW\*(C`DOUBLE PRECISION\*(C'\fR) data +on some systems. +In particular, systems using Pentium, Pentium Pro, 586, and +686 implementations +of the i386 architecture execute programs faster when +\&\f(CW\*(C`REAL(KIND=2)\*(C'\fR (\f(CW\*(C`DOUBLE PRECISION\*(C'\fR) data are +aligned on 64\-bit boundaries +in memory. +.Sp +This option can, at least, make benchmark results more consistent +across various system configurations, versions of the program, +and data sets. +.Sp +\&\fINote:\fR The warning in the \fBgcc\fR documentation about +this option does not apply, generally speaking, to Fortran +code compiled by \fBg77\fR +.Sp +\&\fIAlso also note:\fR The negative form of \fB\-malign-double\fR +is \fB\-mno-align-double\fR, not \fB\-benign-double\fR. +.Ip "\fB\-ffloat-store\fR" 4 +.IX Item "-ffloat-store" +Might help a Fortran program that depends on exact \s-1IEEE\s0 conformance on +some machines, but might slow down a program that doesn't. +.Sp +This option is effective when the floating-point unit is set to work in +\&\s-1IEEE\s0 854 `extended precision'\-\-\-as it typically is on x86 and m68k \s-1GNU\s0 +systems\-\-\-rather than \s-1IEEE\s0 754 double precision. \fB\-ffloat-store\fR +tries to remove the extra precision by spilling data from floating-point +registers into memory and this typically involves a big performance +hit. However, it doesn't affect intermediate results, so that it is +only partially effective. `Excess precision' is avoided in code like: +.Sp +.Vb 2 +\& a = b + c +\& d = a * e +.Ve +but not in code like: +.Sp +.Vb 1 +\& d = (b + c) * e +.Ve +For another, potentially better, way of controlling the precision, +see \f(CW@ref\fR{Floating-point precision}. +.Ip "\fB\-fforce-mem\fR" 4 +.IX Item "-fforce-mem" +.PD 0 +.Ip "\fB\-fforce-addr\fR" 4 +.IX Item "-fforce-addr" +.PD +Might improve optimization of loops. +.Ip "\fB\-fno-inline\fR" 4 +.IX Item "-fno-inline" +Don't compile statement functions inline. +Might reduce the size of a program unit\-\-\-which might be at +expense of some speed (though it should compile faster). +Note that if you are not optimizing, no functions can be expanded inline. +.Ip "\fB\-ffast-math\fR" 4 +.IX Item "-ffast-math" +Might allow some programs designed to not be too dependent +on \s-1IEEE\s0 behavior for floating-point to run faster, or die trying. +Sets \fB\-funsafe-math-optimizations\fR, and +\&\fB\-fno-trapping-math\fR. +.Ip "\fB\-funsafe-math-optimizations\fR" 4 +.IX Item "-funsafe-math-optimizations" +Allow optimizations that may be give incorrect results +for certain \s-1IEEE\s0 inputs. +.Ip "\fB\-fno-trapping-math\fR" 4 +.IX Item "-fno-trapping-math" +Allow the compiler to assume that floating-point arithmetic +will not generate traps on any inputs. This is useful, for +example, when running a program using \s-1IEEE\s0 \*(L"non-stop\*(R" +floating-point arithmetic. +.Ip "\fB\-fstrength-reduce\fR" 4 +.IX Item "-fstrength-reduce" +Might make some loops run faster. +.Ip "\fB\-frerun-cse-after-loop\fR" 4 +.IX Item "-frerun-cse-after-loop" +.PD 0 +.Ip "\fB\-fexpensive-optimizations\fR" 4 +.IX Item "-fexpensive-optimizations" +.Ip "\fB\-fdelayed-branch\fR" 4 +.IX Item "-fdelayed-branch" +.Ip "\fB\-fschedule-insns\fR" 4 +.IX Item "-fschedule-insns" +.Ip "\fB\-fschedule-insns2\fR" 4 +.IX Item "-fschedule-insns2" +.Ip "\fB\-fcaller-saves\fR" 4 +.IX Item "-fcaller-saves" +.PD +Might improve performance on some code. +.Ip "\fB\-funroll-loops\fR" 4 +.IX Item "-funroll-loops" +Typically improves performance on code using iterative \f(CW\*(C`DO\*(C'\fR loops by +unrolling them and is probably generally appropriate for Fortran, though +it is not turned on at any optimization level. +Note that outer loop unrolling isn't done specifically; decisions about +whether to unroll a loop are made on the basis of its instruction count. +.Sp +Also, no `loop discovery'[1] is done, so only loops written with \f(CW\*(C`DO\*(C'\fR +benefit from loop optimizations, including\-\-\-but not limited +to\-\-\-unrolling. Loops written with \f(CW\*(C`IF\*(C'\fR and \f(CW\*(C`GOTO\*(C'\fR are not +currently recognized as such. This option unrolls only iterative +\&\f(CW\*(C`DO\*(C'\fR loops, not \f(CW\*(C`DO WHILE\*(C'\fR loops. +.Ip "\fB\-funroll-all-loops\fR" 4 +.IX Item "-funroll-all-loops" +Probably improves performance on code using \f(CW\*(C`DO WHILE\*(C'\fR loops by +unrolling them in addition to iterative \f(CW\*(C`DO\*(C'\fR loops. In the absence +of \f(CW\*(C`DO WHILE\*(C'\fR, this option is equivalent to \fB\-funroll-loops\fR +but possibly slower. +.Ip "\fB\-fno-move-all-movables\fR" 4 +.IX Item "-fno-move-all-movables" +.PD 0 +.Ip "\fB\-fno-reduce-all-givs\fR" 4 +.IX Item "-fno-reduce-all-givs" +.Ip "\fB\-fno-rerun-loop-opt\fR" 4 +.IX Item "-fno-rerun-loop-opt" +.PD +\&\fIVersion info:\fR +These options are not supported by +versions of \fBg77\fR based on \fBgcc\fR version 2.8. +.Sp +Each of these might improve performance on some code. +.Sp +Analysis of Fortran code optimization and the resulting +optimizations triggered by the above options were +contributed by Toon Moene (<\fBtoon@moene.indiv.nluug.nl\fR>). +.Sp +These three options are intended to be removed someday, once +they have helped determine the efficacy of various +approaches to improving the performance of Fortran code. +.Sp +Please let us know how use of these options affects +the performance of your production code. +We're particularly interested in code that runs faster +when these options are \fIdisabled\fR, and in +non-Fortran code that benefits when they are +\&\fIenabled\fR via the above \fBgcc\fR command-line options. +.Sh "Options Controlling the Preprocessor" +.IX Subsection "Options Controlling the Preprocessor" +These options control the C preprocessor, which is run on each C source +file before actual compilation. +.PP +Some of these options also affect how \fBg77\fR processes the +\&\f(CW\*(C`INCLUDE\*(C'\fR directive. +Since this directive is processed even when preprocessing +is not requested, it is not described in this section. +.PP +However, the \f(CW\*(C`INCLUDE\*(C'\fR directive does not apply +preprocessing to the contents of the included file itself. +.PP +Therefore, any file that contains preprocessor directives +(such as \f(CW\*(C`#include\*(C'\fR, \f(CW\*(C`#define\*(C'\fR, and \f(CW\*(C`#if\*(C'\fR) +must be included via the \f(CW\*(C`#include\*(C'\fR directive, not +via the \f(CW\*(C`INCLUDE\*(C'\fR directive. +Therefore, any file containing preprocessor directives, +if included, is necessarily included by a file that itself +contains preprocessor directives. +.Sh "Options for Directory Search" +.IX Subsection "Options for Directory Search" +These options affect how the \fBcpp\fR preprocessor searches +for files specified via the \f(CW\*(C`#include\*(C'\fR directive. +Therefore, when compiling Fortran programs, they are meaningful +when the preprocessor is used. +.PP +Some of these options also affect how \fBg77\fR searches +for files specified via the \f(CW\*(C`INCLUDE\*(C'\fR directive, +although files included by that directive are not, +themselves, preprocessed. +These options are: +.Ip "\fB\-I-\fR" 4 +.IX Item "-I-" +.PD 0 +.Ip "\fB\-I\fR\fIdir\fR" 4 +.IX Item "-Idir" +.PD +These affect interpretation of the \f(CW\*(C`INCLUDE\*(C'\fR directive +(as well as of the \f(CW\*(C`#include\*(C'\fR directive of the \fBcpp\fR +preprocessor). +.Sp +Note that \fB\-I\fR\fIdir\fR must be specified \fIwithout\fR any +spaces between \fB\-I\fR and the directory name\-\-\-that is, +\&\fB\-Ifoo/bar\fR is valid, but \fB\-I foo/bar\fR +is rejected by the \fBg77\fR compiler (though the preprocessor supports +the latter form). +Also note that the general behavior of \fB\-I\fR and +\&\f(CW\*(C`INCLUDE\*(C'\fR is pretty much the same as of \fB\-I\fR with +\&\f(CW\*(C`#include\*(C'\fR in the \fBcpp\fR preprocessor, with regard to +looking for \fIheader.gcc\fR files and other such things. +.Sh "Options for Code Generation Conventions" +.IX Subsection "Options for Code Generation Conventions" +These machine-independent options control the interface conventions +used in code generation. +.PP +Most of them have both positive and negative forms; the negative form +of \fB\-ffoo\fR would be \fB\-fno-foo\fR. In the table below, only +one of the forms is listed\-\-\-the one which is not the default. You +can figure out the other form by either removing \fBno-\fR or adding +it. +.Ip "\fB\-fno-automatic\fR" 4 +.IX Item "-fno-automatic" +Treat each program unit as if the \f(CW\*(C`SAVE\*(C'\fR statement was specified +for every local variable and array referenced in it. +Does not affect common blocks. +(Some Fortran compilers provide this option under +the name \fB\-static\fR.) +.Ip "\fB\-finit-local-zero\fR" 4 +.IX Item "-finit-local-zero" +Specify that variables and arrays that are local to a program unit +(not in a common block and not passed as an argument) are to be initialized +to binary zeros. +.Sp +Since there is a run-time penalty for initialization of variables +that are not given the \f(CW\*(C`SAVE\*(C'\fR attribute, it might be a +good idea to also use \fB\-fno-automatic\fR with \fB\-finit-local-zero\fR. +.Ip "\fB\-fno-f2c\fR" 4 +.IX Item "-fno-f2c" +Do not generate code designed to be compatible with code generated +by \fBf2c\fR use the \s-1GNU\s0 calling conventions instead. +.Sp +The \fBf2c\fR calling conventions require functions that return +type \f(CW\*(C`REAL(KIND=1)\*(C'\fR to actually return the C type \f(CW\*(C`double\*(C'\fR, +and functions that return type \f(CW\*(C`COMPLEX\*(C'\fR to return the +values via an extra argument in the calling sequence that points +to where to store the return value. +Under the \s-1GNU\s0 calling conventions, such functions simply return +their results as they would in \s-1GNU\s0 C\-\--\f(CW\*(C`REAL(KIND=1)\*(C'\fR functions +return the C type \f(CW\*(C`float\*(C'\fR, and \f(CW\*(C`COMPLEX\*(C'\fR functions +return the \s-1GNU\s0 C type \f(CW\*(C`complex\*(C'\fR (or its \f(CW\*(C`struct\*(C'\fR +equivalent). +.Sp +This does not affect the generation of code that interfaces with the +\&\f(CW\*(C`libg2c\*(C'\fR library. +.Sp +However, because the \f(CW\*(C`libg2c\*(C'\fR library uses \fBf2c\fR +calling conventions, \fBg77\fR rejects attempts to pass +intrinsics implemented by routines in this library as actual +arguments when \fB\-fno-f2c\fR is used, to avoid bugs when +they are actually called by code expecting the \s-1GNU\s0 calling +conventions to work. +.Sp +For example, \fB\s-1INTRINSIC\s0 \s-1ABS\s0;CALL FOO(\s-1ABS\s0)\fR is +rejected when \fB\-fno-f2c\fR is in force. +(Future versions of the \fBg77\fR run-time library might +offer routines that provide GNU-callable versions of the +routines that implement the \fBf2c\fR intrinsics +that may be passed as actual arguments, so that +valid programs need not be rejected when \fB\-fno-f2c\fR +is used.) +.Sp +\&\fBCaution:\fR If \fB\-fno-f2c\fR is used when compiling any +source file used in a program, it must be used when compiling +\&\fIall\fR Fortran source files used in that program. +.Ip "\fB\-ff2c-library\fR" 4 +.IX Item "-ff2c-library" +Specify that use of \f(CW\*(C`libg2c\*(C'\fR (or the original \f(CW\*(C`libf2c\*(C'\fR) +is required. +This is the default for the current version of \fBg77\fR +.Sp +Currently it is not +valid to specify \fB\-fno-f2c-library\fR. +This option is provided so users can specify it in shell +scripts that build programs and libraries that require the +\&\f(CW\*(C`libf2c\*(C'\fR library, even when being compiled by future +versions of \fBg77\fR that might otherwise default to +generating code for an incompatible library. +.Ip "\fB\-fno-underscoring\fR" 4 +.IX Item "-fno-underscoring" +Do not transform names of entities specified in the Fortran +source file by appending underscores to them. +.Sp +With \fB\-funderscoring\fR in effect, \fBg77\fR appends two underscores +to names with underscores and one underscore to external names with +no underscores. (\fBg77\fR also appends two underscores to internal +names with underscores to avoid naming collisions with external names. +The \fB\-fno-second-underscore\fR option disables appending of the +second underscore in all cases.) +.Sp +This is done to ensure compatibility with code produced by many +\&\s-1UNIX\s0 Fortran compilers, including \fBf2c\fR which perform the +same transformations. +.Sp +Use of \fB\-fno-underscoring\fR is not recommended unless you are +experimenting with issues such as integration of (\s-1GNU\s0) Fortran into +existing system environments (vis-a-vis existing libraries, tools, and +so on). +.Sp +For example, with \fB\-funderscoring\fR, and assuming other defaults like +\&\fB\-fcase-lower\fR and that \fB\f(BIj()\fB\fR and \fB\f(BImax_count()\fB\fR are +external functions while \fBmy_var\fR and \fBlvar\fR are local variables, +a statement like +.Sp +.Vb 1 +\& I = J() + MAX_COUNT (MY_VAR, LVAR) +.Ve +is implemented as something akin to: +.Sp +.Vb 1 +\& i = j_() + max_count__(&my_var__, &lvar); +.Ve +With \fB\-fno-underscoring\fR, the same statement is implemented as: +.Sp +.Vb 1 +\& i = j() + max_count(&my_var, &lvar); +.Ve +Use of \fB\-fno-underscoring\fR allows direct specification of +user-defined names while debugging and when interfacing \fBg77\fR +code with other languages. +.Sp +Note that just because the names match does \fInot\fR mean that the +interface implemented by \fBg77\fR for an external name matches the +interface implemented by some other language for that same name. +That is, getting code produced by \fBg77\fR to link to code produced +by some other compiler using this or any other method can be only a +small part of the overall solution\-\-\-getting the code generated by +both compilers to agree on issues other than naming can require +significant effort, and, unlike naming disagreements, linkers normally +cannot detect disagreements in these other areas. +.Sp +Also, note that with \fB\-fno-underscoring\fR, the lack of appended +underscores introduces the very real possibility that a user-defined +external name will conflict with a name in a system library, which +could make finding unresolved-reference bugs quite difficult in some +cases\-\-\-they might occur at program run time, and show up only as +buggy behavior at run time. +.Sp +In future versions of \fBg77\fR we hope to improve naming and linking +issues so that debugging always involves using the names as they appear +in the source, even if the names as seen by the linker are mangled to +prevent accidental linking between procedures with incompatible +interfaces. +.Ip "\fB\-fno-second-underscore\fR" 4 +.IX Item "-fno-second-underscore" +Do not append a second underscore to names of entities specified +in the Fortran source file. +.Sp +This option has no effect if \fB\-fno-underscoring\fR is +in effect. +.Sp +Otherwise, with this option, an external name such as \fB\s-1MAX_COUNT\s0\fR +is implemented as a reference to the link-time external symbol +\&\fBmax_count_\fR, instead of \fBmax_count_\|_\fR. +.Ip "\fB\-fno-ident\fR" 4 +.IX Item "-fno-ident" +Ignore the \fB#ident\fR directive. +.Ip "\fB\-fzeros\fR" 4 +.IX Item "-fzeros" +Treat initial values of zero as if they were any other value. +.Sp +As of version 0.5.18, \fBg77\fR normally treats \f(CW\*(C`DATA\*(C'\fR and +other statements that are used to specify initial values of zero +for variables and arrays as if no values were actually specified, +in the sense that no diagnostics regarding multiple initializations +are produced. +.Sp +This is done to speed up compiling of programs that initialize +large arrays to zeros. +.Sp +Use \fB\-fzeros\fR to revert to the simpler, slower behavior +that can catch multiple initializations by keeping track of +all initializations, zero or otherwise. +.Sp +\&\fICaution:\fR Future versions of \fBg77\fR might disregard this option +(and its negative form, the default) or interpret it somewhat +differently. +The interpretation changes will affect only non-standard +programs; standard-conforming programs should not be affected. +.Ip "\fB\-femulate-complex\fR" 4 +.IX Item "-femulate-complex" +Implement \f(CW\*(C`COMPLEX\*(C'\fR arithmetic via emulation, +instead of using the facilities of +the \fBgcc\fR back end that provide direct support of +\&\f(CW\*(C`complex\*(C'\fR arithmetic. +.Sp +(\fBgcc\fR had some bugs in its back-end support +for \f(CW\*(C`complex\*(C'\fR arithmetic, due primarily to the support not being +completed as of version 2.8.1 and \f(CW\*(C`egcs\*(C'\fR 1.1.2.) +.Sp +Use \fB\-femulate-complex\fR if you suspect code-generation bugs, +or experience compiler crashes, +that might result from \fBg77\fR using the \f(CW\*(C`COMPLEX\*(C'\fR support +in the \fBgcc\fR back end. +If using that option fixes the bugs or crashes you are seeing, +that indicates a likely \fBg77\fR bugs +(though, all compiler crashes are considered bugs), +so, please report it. +(Note that the known bugs, now believed fixed, produced compiler crashes +rather than causing the generation of incorrect code.) +.Sp +Use of this option should not affect how Fortran code compiled +by \fBg77\fR works in terms of its interfaces to other code, +e.g. that compiled by \fBf2c\fR +.Sp +As of \s-1GCC\s0 version 3.0, this option is not necessary anymore. +.Sp +\&\fICaution:\fR Future versions of \fBg77\fR might ignore both forms +of this option. +.Ip "\fB\-falias-check\fR" 4 +.IX Item "-falias-check" +.PD 0 +.Ip "\fB\-fargument-alias\fR" 4 +.IX Item "-fargument-alias" +.Ip "\fB\-fargument-noalias\fR" 4 +.IX Item "-fargument-noalias" +.Ip "\fB\-fno-argument-noalias-global\fR" 4 +.IX Item "-fno-argument-noalias-global" +.PD +\&\fIVersion info:\fR +These options are not supported by +versions of \fBg77\fR based on \fBgcc\fR version 2.8. +.Sp +These options specify to what degree aliasing +(overlap) +is permitted between +arguments (passed as pointers) and \f(CW\*(C`COMMON\*(C'\fR (external, or +public) storage. +.Sp +The default for Fortran code, as mandated by the \s-1FORTRAN\s0 77 and +Fortran 90 standards, is \fB\-fargument-noalias-global\fR. +The default for code written in the C language family is +\&\fB\-fargument-alias\fR. +.Sp +Note that, on some systems, compiling with \fB\-fforce-addr\fR in +effect can produce more optimal code when the default aliasing +options are in effect (and when optimization is enabled). +.Ip "\fB\-fno-globals\fR" 4 +.IX Item "-fno-globals" +Disable diagnostics about inter-procedural +analysis problems, such as disagreements about the +type of a function or a procedure's argument, +that might cause a compiler crash when attempting +to inline a reference to a procedure within a +program unit. +(The diagnostics themselves are still produced, but +as warnings, unless \fB\-Wno-globals\fR is specified, +in which case no relevant diagnostics are produced.) +.Sp +Further, this option disables such inlining, to +avoid compiler crashes resulting from incorrect +code that would otherwise be diagnosed. +.Sp +As such, this option might be quite useful when +compiling existing, ``working'' code that happens +to have a few bugs that do not generally show themselves, +but which \fBg77\fR diagnoses. +.Sp +Use of this option therefore has the effect of +instructing \fBg77\fR to behave more like it did +up through version 0.5.19.1, when it paid little or +no attention to disagreements between program units +about a procedure's type and argument information, +and when it performed no inlining of procedures +(except statement functions). +.Sp +Without this option, \fBg77\fR defaults to performing +the potentially inlining procedures as it started doing +in version 0.5.20, but as of version 0.5.21, it also +diagnoses disagreements that might cause such inlining +to crash the compiler as (fatal) errors, +and warns about similar disagreements +that are currently believed to not +likely to result in the compiler later crashing +or producing incorrect code. +.Ip "\fB\-fflatten-arrays\fR" 4 +.IX Item "-fflatten-arrays" +Use back end's C-like constructs +(pointer plus offset) +instead of its \f(CW\*(C`ARRAY_REF\*(C'\fR construct +to handle all array references. +.Sp +\&\fINote:\fR This option is not supported. +It is intended for use only by \fBg77\fR developers, +to evaluate code-generation issues. +It might be removed at any time. +.Ip "\fB\-fbounds-check\fR" 4 +.IX Item "-fbounds-check" +.PD 0 +.Ip "\fB\-ffortran-bounds-check\fR" 4 +.IX Item "-ffortran-bounds-check" +.PD +Enable generation of run-time checks for array subscripts +and substring start and end points +against the (locally) declared minimum and maximum values. +.Sp +The current implementation uses the \f(CW\*(C`libf2c\*(C'\fR +library routine \f(CW\*(C`s_rnge\*(C'\fR to print the diagnostic. +.Sp +However, whereas \fBf2c\fR generates a single check per +reference for a multi-dimensional array, of the computed +offset against the valid offset range (0 through the size of the array), +\&\fBg77\fR generates a single check per \fIsubscript\fR expression. +This catches some cases of potential bugs that \fBf2c\fR does not, +such as references to below the beginning of an assumed-size array. +.Sp +\&\fBg77\fR also generates checks for \f(CW\*(C`CHARACTER\*(C'\fR substring references, +something \fBf2c\fR currently does not do. +.Sp +Use the new \fB\-ffortran-bounds-check\fR option +to specify bounds-checking for only the Fortran code you are compiling, +not necessarily for code written in other languages. +.Sp +\&\fINote:\fR To provide more detailed information on the offending subscript, +\&\fBg77\fR provides the \f(CW\*(C`libg2c\*(C'\fR run-time library routine \f(CW\*(C`s_rnge\*(C'\fR +with somewhat differently-formatted information. +Here's a sample diagnostic: +.Sp +.Vb 3 +\& Subscript out of range on file line 4, procedure rnge.f/bf. +\& Attempt to access the -6-th element of variable b[subscript-2-of-2]. +\& Aborted +.Ve +The above message indicates that the offending source line is +line 4 of the file \fIrnge.f\fR, +within the program unit (or statement function) named \fBbf\fR. +The offended array is named \fBb\fR. +The offended array dimension is the second for a two-dimensional array, +and the offending, computed subscript expression was \fB\-6\fR. +.Sp +For a \f(CW\*(C`CHARACTER\*(C'\fR substring reference, the second line has +this appearance: +.Sp +.Vb 1 +\& Attempt to access the 11-th element of variable a[start-substring]. +.Ve +This indicates that the offended \f(CW\*(C`CHARACTER\*(C'\fR variable or array +is named \fBa\fR, +the offended substring position is the starting (leftmost) position, +and the offending substring expression is \fB11\fR. +.Sp +(Though the verbage of \f(CW\*(C`s_rnge\*(C'\fR is not ideal +for the purpose of the \fBg77\fR compiler, +the above information should provide adequate diagnostic abilities +to it users.) +.PP +Some of these do \fInot\fR work when compiling programs written in Fortran: +.Ip "\fB\-fpcc-struct-return\fR" 4 +.IX Item "-fpcc-struct-return" +.PD 0 +.Ip "\fB\-freg-struct-return\fR" 4 +.IX Item "-freg-struct-return" +.PD +You should not use these except strictly the same way as you +used them to build the version of \f(CW\*(C`libg2c\*(C'\fR with which +you will be linking all code compiled by \fBg77\fR with the +same option. +.Ip "\fB\-fshort-double\fR" 4 +.IX Item "-fshort-double" +This probably either has no effect on Fortran programs, or +makes them act loopy. +.Ip "\fB\-fno-common\fR" 4 +.IX Item "-fno-common" +Do not use this when compiling Fortran programs, +or there will be Trouble. +.Ip "\fB\-fpack-struct\fR" 4 +.IX Item "-fpack-struct" +This probably will break any calls to the \f(CW\*(C`libg2c\*(C'\fR library, +at the very least, even if it is built with the same option. +.SH "ENVIRONMENT" +.IX Header "ENVIRONMENT" +\&\s-1GNU\s0 Fortran currently does not make use of any environment +variables to control its operation above and beyond those +that affect the operation of \fBgcc\fR. +.SH "BUGS" +.IX Header "BUGS" +For instructions on reporting bugs, see +<\fBhttp://gcc.gnu.org/bugs.html\fR>. Use of the \fBgccbug\fR +script to report bugs is recommended. +.SH "FOOTNOTES" +.IX Header "FOOTNOTES" +.Ip "1." 4 +\&\fIloop discovery\fR refers to the +process by which a compiler, or indeed any reader of a program, +determines which portions of the program are more likely to be executed +repeatedly as it is being run. Such discovery typically is done early +when compiling using optimization techniques, so the ``discovered'' +loops get more attention\-\-\-and more run-time resources, such as +registers\-\-\-from the compiler. It is easy to ``discover'' loops that are +constructed out of looping constructs in the language +(such as Fortran's \f(CW\*(C`DO\*(C'\fR). For some programs, ``discovering'' loops +constructed out of lower-level constructs (such as \f(CW\*(C`IF\*(C'\fR and +\&\f(CW\*(C`GOTO\*(C'\fR) can lead to generation of more optimal code +than otherwise. .SH "SEE ALSO" -gcc(1), cpp(1), as(1), ld(1), gdb(1), adb(1), dbx(1), sdb(1). -.br -.RB "`\|" g77 "\|', `\|" gcc "\|', `\|" cpp "\|'," -.RB "`\|" as "\|', `\|" ld "\|'," -and -.RB "`\|" gdb "\|'" -entries in -.B info\c -\&. -.br -.I -Using and Porting GNU Fortran (for version 0.5.24)\c -, James Craig Burley; -.I -Using and Porting GNU CC (for version 2.0)\c -, Richard M. Stallman; -.I -The C Preprocessor\c -, Richard M. Stallman; -.I -Debugging with GDB: the GNU Source-Level Debugger\c -, Richard M. Stallman and Roland H. Pesch; -.I -Using as: the GNU Assembler\c -, Dean Elsner, Jay Fenlason & friends; -.I -gld: the GNU linker\c -, Steve Chamberlain and Roland Pesch. - -.SH BUGS -For instructions on how to report bugs, type `\|\c -.B info g77 -n Bugs\c -\&\|'. - -.SH COPYING -Copyright (c) 1991-1998 Free Software Foundation, Inc. +.IX Header "SEE ALSO" +\&\fIgpl\fR\|(7), \fIgfdl\fR\|(7), \fIfsf-funding\fR\|(7), +\&\fIcpp\fR\|(1), \fIgcov\fR\|(1), \fIgcc\fR\|(1), \fIas\fR\|(1), \fIld\fR\|(1), \fIgdb\fR\|(1), \fIadb\fR\|(1), \fIdbx\fR\|(1), \fIsdb\fR\|(1) +and the Info entries for \fIgcc\fR, \fIcpp\fR, \fIg77\fR, \fIas\fR, +\&\fIld\fR, \fIbinutils\fR and \fIgdb\fR. +.SH "AUTHOR" +.IX Header "AUTHOR" +See the Info entry for \fBg77\fR for contributors to \s-1GCC\s0 and G77. +.SH "COPYRIGHT" +.IX Header "COPYRIGHT" +Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001, 2002 +Free Software Foundation, Inc. +.PP +Permission is granted to copy, distribute and/or modify this document +under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.1 or +any later version published by the Free Software Foundation; with the +Invariant Sections being ``\s-1GNU\s0 General Public License'' and ``Funding +Free Software'', the Front-Cover texts being (a) (see below), and with +the Back-Cover Texts being (b) (see below). A copy of the license is +included in the \fIgfdl\fR\|(7) man page. .PP -Permission is granted to make and distribute verbatim copies of -this manual provided the copyright notice and this permission notice -are preserved on all copies. +(a) The \s-1FSF\s0's Front-Cover Text is: .PP -Permission is granted to copy and distribute modified versions of this -manual under the conditions for verbatim copying, provided that the -entire resulting derived work is distributed under the terms of a -permission notice identical to this one. +.Vb 1 +\& A GNU Manual +.Ve +(b) The \s-1FSF\s0's Back-Cover Text is: .PP -Permission is granted to copy and distribute translations of this -manual into another language, under the above conditions for modified -versions, except that this permission notice may be included in -translations approved by the Free Software Foundation instead of in -the original English. -.SH AUTHORS -See the GNU CC Manual for the contributors to GNU CC. -See the GNU Fortran Manual for the contributors to -GNU Fortran. +.Vb 3 +\& You have freedom to copy and modify this GNU Manual, like GNU +\& software. Copies published by the Free Software Foundation raise +\& funds for GNU development. +.Ve diff --git a/contrib/gcc/f/lang-specs.h b/contrib/gcc/f/lang-specs.h index d6c3a14..d6018bd 100644 --- a/contrib/gcc/f/lang-specs.h +++ b/contrib/gcc/f/lang-specs.h @@ -1,5 +1,6 @@ /* lang-specs.h file for Fortran - Copyright (C) 1995, 1996, 1997, 1999, 2000 Free Software Foundation, Inc. + Copyright (C) 1995, 1996, 1997, 1999, 2000, 2002 + Free Software Foundation, Inc. Contributed by James Craig Burley. This file is part of GNU Fortran. @@ -33,7 +34,7 @@ the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA {".r", "@ratfor", 0}, {"@ratfor", "%{C:%{!E:%eGNU C does not support -C without using -E}}\ - ratfor %{C} %{v} %i %{E:%W{o*}} %{!E: %{!pipe:-o %g.f} |\n\ + ratfor %{C} %{v} %{E:%W{o*}} %{!E: %{!pipe:-o %g.f} %i |\n\ f771 %{!pipe:%g.f} %(cc1_options) %{I*} %{!fsyntax-only:%(invoke_as)}}", 0}, {".f", "@f77", 0}, {".for", "@f77", 0}, diff --git a/contrib/gcc/f/news.texi b/contrib/gcc/f/news.texi index 51ee75e..37b08d9 100644 --- a/contrib/gcc/f/news.texi +++ b/contrib/gcc/f/news.texi @@ -10,7 +10,7 @@ @c in the standalone derivations of this file (e.g. NEWS). @set copyrights-news 1995,1996,1997,1998,1999,2000,2001,2002 -@set last-update-news 2002-08-05 +@set last-update-news 2002-10-28 @include root.texi @@ -156,7 +156,11 @@ The following information was last updated on @value{last-update-news}: @heading In @code{GCC} 3.2 versus @code{GCC} 3.1: @itemize @bullet @item -Nothing. +Problem Reports fixed (in chronological order of submission): +@table @code +@item 8308 +gcc-3.x does not compile files with suffix .r (RATFOR) [Fixed in 3.2.1] +@end table @end itemize @heading In @code{GCC} 3.1 (formerly known as g77-0.5.27) versus @code{GCC} 3.0: diff --git a/contrib/gcc/f/version.c b/contrib/gcc/f/version.c index a420cc9..a34c990 100644 --- a/contrib/gcc/f/version.c +++ b/contrib/gcc/f/version.c @@ -1,4 +1,4 @@ #include "ansidecl.h" #include "f/version.h" -const char *const ffe_version_string = "3.2.1 20021009 (prerelease)"; +const char *const ffe_version_string = "3.2.1 20021119 (release)"; diff --git a/contrib/gcc/flow.c b/contrib/gcc/flow.c index 8fabc2a..5b43c6b 100644 --- a/contrib/gcc/flow.c +++ b/contrib/gcc/flow.c @@ -499,6 +499,9 @@ life_analysis (f, file, flags) } } #endif + + rebuild_jump_labels (get_insns ()); + /* Removing dead insns should've made jumptables really dead. */ delete_dead_jumptables (); } diff --git a/contrib/gcc/fold-const.c b/contrib/gcc/fold-const.c index a7e1e28..926581c 100644 --- a/contrib/gcc/fold-const.c +++ b/contrib/gcc/fold-const.c @@ -4869,6 +4869,7 @@ fold_binary_op_with_conditional_arg (code, type, cond, arg, cond_first_p) /* And these are the types of the expressions. */ tree lhs_type = type; tree rhs_type = type; + int save = 0; if (cond_first_p) { @@ -4927,11 +4928,12 @@ fold_binary_op_with_conditional_arg (code, type, cond, arg, cond_first_p) if an arm is a COND_EXPR since we get exponential behavior in that case. */ - if (TREE_CODE (arg) != SAVE_EXPR && ! TREE_CONSTANT (arg) - && global_bindings_p () == 0 - && ((TREE_CODE (arg) != VAR_DECL - && TREE_CODE (arg) != PARM_DECL) - || TREE_SIDE_EFFECTS (arg))) + if (TREE_CODE (arg) == SAVE_EXPR) + save = 1; + else if (! TREE_CONSTANT (arg) + && global_bindings_p () == 0 + && ((TREE_CODE (arg) != VAR_DECL && TREE_CODE (arg) != PARM_DECL) + || TREE_SIDE_EFFECTS (arg))) { if (TREE_CODE (true_value) != COND_EXPR) lhs = fold (build (lhs_code, lhs_type, *true_lhs, *true_rhs)); @@ -4941,7 +4943,11 @@ fold_binary_op_with_conditional_arg (code, type, cond, arg, cond_first_p) if ((lhs == 0 || ! TREE_CONSTANT (lhs)) && (rhs == 0 || !TREE_CONSTANT (rhs))) - arg = save_expr (arg), lhs = rhs = 0; + { + arg = save_expr (arg); + lhs = rhs = 0; + save = 1; + } } if (lhs == 0) @@ -4951,7 +4957,7 @@ fold_binary_op_with_conditional_arg (code, type, cond, arg, cond_first_p) test = fold (build (COND_EXPR, type, test, lhs, rhs)); - if (TREE_CODE (arg) == SAVE_EXPR) + if (save) return build (COMPOUND_EXPR, type, convert (void_type_node, arg), strip_compound_expr (test, arg)); @@ -6535,7 +6541,7 @@ fold (expr) else if (TREE_INT_CST_HIGH (arg1) == -1 && (TREE_INT_CST_LOW (arg1) - == ((unsigned HOST_WIDE_INT) 1 << (width - 1))) + == ((unsigned HOST_WIDE_INT) -1 << (width - 1))) && ! TREE_UNSIGNED (TREE_TYPE (arg1))) switch (TREE_CODE (t)) { diff --git a/contrib/gcc/getopt.h b/contrib/gcc/getopt.h index cb5feba..04346dd 100644 --- a/contrib/gcc/getopt.h +++ b/contrib/gcc/getopt.h @@ -111,7 +111,7 @@ struct option errors, only prototype getopt for the GNU C library. */ extern int getopt (int argc, char *const *argv, const char *shortopts); #else /* not __GNU_LIBRARY__ */ -# if !defined (HAVE_DECL_GETOPT) +# if !defined (HAVE_DECL_GETOPT) && !defined (__cplusplus) extern int getopt (); # endif #endif /* __GNU_LIBRARY__ */ diff --git a/contrib/gcc/hooks.c b/contrib/gcc/hooks.c index 3fd876a..2f71873 100644 --- a/contrib/gcc/hooks.c +++ b/contrib/gcc/hooks.c @@ -38,3 +38,11 @@ hook_void_bool_false () { return false; } + +/* Generic hook that takes (tree) and returns false. */ +bool +hook_tree_bool_false (a) + tree a ATTRIBUTE_UNUSED; +{ + return false; +} diff --git a/contrib/gcc/hooks.h b/contrib/gcc/hooks.h index 763ab8e..d91aca8 100644 --- a/contrib/gcc/hooks.h +++ b/contrib/gcc/hooks.h @@ -24,5 +24,6 @@ Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. bool hook_void_bool_false PARAMS ((void)); void hook_void_void PARAMS ((void)); +bool hook_tree_bool_false PARAMS ((tree)); #endif diff --git a/contrib/gcc/jump.c b/contrib/gcc/jump.c index 1a26b59..14baeed 100644 --- a/contrib/gcc/jump.c +++ b/contrib/gcc/jump.c @@ -1076,6 +1076,21 @@ simplejump_p (insn) && GET_CODE (SET_DEST (PATTERN (insn))) == PC && GET_CODE (SET_SRC (PATTERN (insn))) == LABEL_REF); } +/* Return 1 if INSN is an tablejump. */ + +int +tablejump_p (insn) + rtx insn; +{ + rtx table; + return (GET_CODE (insn) == JUMP_INSN + && JUMP_LABEL (insn) + && NEXT_INSN (JUMP_LABEL (insn)) + && (table = next_active_insn (JUMP_LABEL (insn))) + && GET_CODE (table) == JUMP_INSN + && (GET_CODE (PATTERN (table)) == ADDR_VEC + || GET_CODE (PATTERN (table)) == ADDR_DIFF_VEC)); +} /* Return nonzero if INSN is a (possibly) conditional jump and nothing more. diff --git a/contrib/gcc/langhooks-def.h b/contrib/gcc/langhooks-def.h index e80b798..0132117 100644 --- a/contrib/gcc/langhooks-def.h +++ b/contrib/gcc/langhooks-def.h @@ -104,6 +104,8 @@ tree lhd_tree_inlining_convert_parm_for_inlining PARAMS ((tree, tree, tree)); lhd_tree_inlining_copy_res_decl_for_inlining #define LANG_HOOKS_TREE_INLINING_ANON_AGGR_TYPE_P \ lhd_tree_inlining_anon_aggr_type_p +#define LANG_HOOKS_TREE_INLINING_VAR_MOD_TYPE_P \ + hook_tree_bool_false #define LANG_HOOKS_TREE_INLINING_START_INLINING \ lhd_tree_inlining_start_inlining #define LANG_HOOKS_TREE_INLINING_END_INLINING \ @@ -120,6 +122,7 @@ tree lhd_tree_inlining_convert_parm_for_inlining PARAMS ((tree, tree, tree)); LANG_HOOKS_TREE_INLINING_AUTO_VAR_IN_FN_P, \ LANG_HOOKS_TREE_INLINING_COPY_RES_DECL_FOR_INLINING, \ LANG_HOOKS_TREE_INLINING_ANON_AGGR_TYPE_P, \ + LANG_HOOKS_TREE_INLINING_VAR_MOD_TYPE_P, \ LANG_HOOKS_TREE_INLINING_START_INLINING, \ LANG_HOOKS_TREE_INLINING_END_INLINING, \ LANG_HOOKS_TREE_INLINING_CONVERT_PARM_FOR_INLINING \ diff --git a/contrib/gcc/langhooks.h b/contrib/gcc/langhooks.h index 7a3c3bd..a77ddee 100644 --- a/contrib/gcc/langhooks.h +++ b/contrib/gcc/langhooks.h @@ -46,6 +46,7 @@ struct lang_hooks_for_tree_inlining void *, int *, void *)); int (*anon_aggr_type_p) PARAMS ((union tree_node *)); + bool (*var_mod_type_p) PARAMS ((union tree_node *)); int (*start_inlining) PARAMS ((union tree_node *)); void (*end_inlining) PARAMS ((union tree_node *)); union tree_node *(*convert_parm_for_inlining) PARAMS ((union tree_node *, diff --git a/contrib/gcc/loop.c b/contrib/gcc/loop.c index 732a84d..149e7d1 100644 --- a/contrib/gcc/loop.c +++ b/contrib/gcc/loop.c @@ -9560,6 +9560,25 @@ loop_regs_scan (loop, extra_size) if (GET_CODE (insn) == CODE_LABEL || GET_CODE (insn) == JUMP_INSN) memset (last_set, 0, regs->num * sizeof (rtx)); + + /* Invalidate all registers used for function argument passing. + We check rtx_varies_p for the same reason as below, to allow + optimizing PIC calculations. */ + if (GET_CODE (insn) == CALL_INSN) + { + rtx link; + for (link = CALL_INSN_FUNCTION_USAGE (insn); + link; + link = XEXP (link, 1)) + { + rtx op, reg; + + if (GET_CODE (op = XEXP (link, 0)) == USE + && GET_CODE (reg = XEXP (op, 0)) == REG + && rtx_varies_p (reg, 1)) + regs->array[REGNO (reg)].may_not_optimize = 1; + } + } } /* Invalidate all hard registers clobbered by calls. With one exception: diff --git a/contrib/gcc/move-if-change b/contrib/gcc/move-if-change index ee1b348..66d8b8a 100755 --- a/contrib/gcc/move-if-change +++ b/contrib/gcc/move-if-change @@ -1,26 +1,11 @@ #!/bin/sh - -# Copyright (C) 1996 Free Software Foundation, Inc. -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - +# Like mv $1 $2, but if the files are the same, just delete $1. +# Status is 0 if $2 is changed, 1 otherwise. if test -r $2 then if -cmp $1 $2 > /dev/null +cmp -s $1 $2 then echo $2 is unchanged rm -f $1 diff --git a/contrib/gcc/reload1.c b/contrib/gcc/reload1.c index 9782f3a..5928a68 100644 --- a/contrib/gcc/reload1.c +++ b/contrib/gcc/reload1.c @@ -440,7 +440,6 @@ static void delete_output_reload PARAMS ((rtx, int, int)); static void delete_address_reloads PARAMS ((rtx, rtx)); static void delete_address_reloads_1 PARAMS ((rtx, rtx, rtx)); static rtx inc_for_reload PARAMS ((rtx, rtx, rtx, int)); -static int constraint_accepts_reg_p PARAMS ((const char *, rtx)); static void reload_cse_regs_1 PARAMS ((rtx)); static int reload_cse_noop_set_p PARAMS ((rtx)); static int reload_cse_simplify_set PARAMS ((rtx, rtx)); @@ -6384,38 +6383,43 @@ emit_input_reload_insns (chain, rl, old, j) && SET_DEST (PATTERN (temp)) == old /* Make sure we can access insn_operand_constraint. */ && asm_noperands (PATTERN (temp)) < 0 - /* This is unsafe if prev insn rejects our reload reg. */ - && constraint_accepts_reg_p (insn_data[recog_memoized (temp)].operand[0].constraint, - reloadreg) /* This is unsafe if operand occurs more than once in current insn. Perhaps some occurrences aren't reloaded. */ - && count_occurrences (PATTERN (insn), old, 0) == 1 - /* Don't risk splitting a matching pair of operands. */ - && ! reg_mentioned_p (old, SET_SRC (PATTERN (temp)))) + && count_occurrences (PATTERN (insn), old, 0) == 1) { + rtx old = SET_DEST (PATTERN (temp)); /* Store into the reload register instead of the pseudo. */ SET_DEST (PATTERN (temp)) = reloadreg; - /* If the previous insn is an output reload, the source is - a reload register, and its spill_reg_store entry will - contain the previous destination. This is now - invalid. */ - if (GET_CODE (SET_SRC (PATTERN (temp))) == REG - && REGNO (SET_SRC (PATTERN (temp))) < FIRST_PSEUDO_REGISTER) + /* Verify that resulting insn is valid. */ + extract_insn (temp); + if (constrain_operands (1)) { - spill_reg_store[REGNO (SET_SRC (PATTERN (temp)))] = 0; - spill_reg_stored_to[REGNO (SET_SRC (PATTERN (temp)))] = 0; - } + /* If the previous insn is an output reload, the source is + a reload register, and its spill_reg_store entry will + contain the previous destination. This is now + invalid. */ + if (GET_CODE (SET_SRC (PATTERN (temp))) == REG + && REGNO (SET_SRC (PATTERN (temp))) < FIRST_PSEUDO_REGISTER) + { + spill_reg_store[REGNO (SET_SRC (PATTERN (temp)))] = 0; + spill_reg_stored_to[REGNO (SET_SRC (PATTERN (temp)))] = 0; + } - /* If these are the only uses of the pseudo reg, - pretend for GDB it lives in the reload reg we used. */ - if (REG_N_DEATHS (REGNO (old)) == 1 - && REG_N_SETS (REGNO (old)) == 1) + /* If these are the only uses of the pseudo reg, + pretend for GDB it lives in the reload reg we used. */ + if (REG_N_DEATHS (REGNO (old)) == 1 + && REG_N_SETS (REGNO (old)) == 1) + { + reg_renumber[REGNO (old)] = REGNO (rl->reg_rtx); + alter_reg (REGNO (old), -1); + } + special = 1; + } + else { - reg_renumber[REGNO (old)] = REGNO (rl->reg_rtx); - alter_reg (REGNO (old), -1); + SET_DEST (PATTERN (temp)) = old; } - special = 1; } } @@ -7991,51 +7995,6 @@ inc_for_reload (reloadreg, in, value, inc_amount) return store; } -/* Return 1 if we are certain that the constraint-string STRING allows - the hard register REG. Return 0 if we can't be sure of this. */ - -static int -constraint_accepts_reg_p (string, reg) - const char *string; - rtx reg; -{ - int value = 0; - int regno = true_regnum (reg); - int c; - - /* Initialize for first alternative. */ - value = 0; - /* Check that each alternative contains `g' or `r'. */ - while (1) - switch (c = *string++) - { - case 0: - /* If an alternative lacks `g' or `r', we lose. */ - return value; - case ',': - /* If an alternative lacks `g' or `r', we lose. */ - if (value == 0) - return 0; - /* Initialize for next alternative. */ - value = 0; - break; - case 'g': - case 'r': - /* Any general reg wins for this alternative. */ - if (TEST_HARD_REG_BIT (reg_class_contents[(int) GENERAL_REGS], regno)) - value = 1; - break; - default: - /* Any reg in specified class wins for this alternative. */ - { - enum reg_class class = REG_CLASS_FROM_LETTER (c); - - if (TEST_HARD_REG_BIT (reg_class_contents[(int) class], regno)) - value = 1; - } - } -} - /* INSN is a no-op; delete it. If this sets the return value of the function, we must keep a USE around, in case this is in a different basic block than the final USE. Otherwise, diff --git a/contrib/gcc/rtl.h b/contrib/gcc/rtl.h index 63b9f58..388d381 100644 --- a/contrib/gcc/rtl.h +++ b/contrib/gcc/rtl.h @@ -1804,6 +1804,7 @@ extern rtx pc_set PARAMS ((rtx)); extern rtx condjump_label PARAMS ((rtx)); extern int simplejump_p PARAMS ((rtx)); extern int returnjump_p PARAMS ((rtx)); +extern int tablejump_p PARAMS ((rtx)); extern int onlyjump_p PARAMS ((rtx)); extern int only_sets_cc0_p PARAMS ((rtx)); extern int sets_cc0_p PARAMS ((rtx)); diff --git a/contrib/gcc/stmt.c b/contrib/gcc/stmt.c index e010893..4ba3021 100644 --- a/contrib/gcc/stmt.c +++ b/contrib/gcc/stmt.c @@ -3351,8 +3351,18 @@ tail_recursion_args (actuals, formals) if (GET_MODE (DECL_RTL (f)) == GET_MODE (argvec[i])) emit_move_insn (DECL_RTL (f), argvec[i]); else - convert_move (DECL_RTL (f), argvec[i], - TREE_UNSIGNED (TREE_TYPE (TREE_VALUE (a)))); + { + rtx tmp = argvec[i]; + + if (DECL_MODE (f) != GET_MODE (DECL_RTL (f))) + { + tmp = gen_reg_rtx (DECL_MODE (f)); + convert_move (tmp, argvec[i], + TREE_UNSIGNED (TREE_TYPE (TREE_VALUE (a)))); + } + convert_move (DECL_RTL (f), tmp, + TREE_UNSIGNED (TREE_TYPE (TREE_VALUE (a)))); + } } free_temp_slots (); diff --git a/contrib/gcc/tradcpp.c b/contrib/gcc/tradcpp.c index e696bf0..979179c 100644 --- a/contrib/gcc/tradcpp.c +++ b/contrib/gcc/tradcpp.c @@ -4104,7 +4104,7 @@ output_line_command (ip, op, conditional, file_change) sprintf (line_cmd_buf, "# %d \"%s\"", ip->lineno, ip->fname); if (file_change != same_file) strcat (line_cmd_buf, file_change == enter_file ? " 1" : " 2"); - if (system_include_depth > 0) + if (system_include_depth > (file_change == leave_file)) strcat (line_cmd_buf, " 3"); len = strlen (line_cmd_buf); line_cmd_buf[len++] = '\n'; diff --git a/contrib/gcc/tree-inline.c b/contrib/gcc/tree-inline.c index 79f4c52..307c35c 100644 --- a/contrib/gcc/tree-inline.c +++ b/contrib/gcc/tree-inline.c @@ -1224,6 +1224,12 @@ walk_tree (tp, func, data, htab_) { WALK_SUBTREE_TAIL (TREE_TYPE (*tp)); } + else if (TREE_CODE_CLASS (code) == 't') + { + WALK_SUBTREE (TYPE_SIZE (*tp)); + WALK_SUBTREE (TYPE_SIZE_UNIT (*tp)); + /* Also examine various special fields, below. */ + } result = (*lang_hooks.tree_inlining.walk_subtrees) (tp, &walk_subtrees, func, data, htab); @@ -1320,6 +1326,7 @@ walk_tree (tp, func, data, htab_) return NULL_TREE; #undef WALK_SUBTREE +#undef WALK_SUBTREE_TAIL } /* Like walk_tree, but does not walk duplicate nodes more than @@ -1378,8 +1385,8 @@ copy_tree_r (tp, walk_subtrees, data) if (TREE_CODE (*tp) == SCOPE_STMT) SCOPE_STMT_BLOCK (*tp) = NULL_TREE; } - else if (TREE_CODE_CLASS (code) == 't') - /* There's no need to copy types, or anything beneath them. */ + else if (TREE_CODE_CLASS (code) == 't' && !variably_modified_type_p (*tp)) + /* Types only need to be copied if they are variably modified. */ *walk_subtrees = 0; return NULL_TREE; diff --git a/contrib/gcc/tree.c b/contrib/gcc/tree.c index bd89387..5ffb010 100644 --- a/contrib/gcc/tree.c +++ b/contrib/gcc/tree.c @@ -286,7 +286,7 @@ tree_size (node) case '1': /* a unary arithmetic expression */ case '2': /* a binary arithmetic expression */ return (sizeof (struct tree_exp) - + (TREE_CODE_LENGTH (code) - 1) * sizeof (char *)); + + TREE_CODE_LENGTH (code) * sizeof (char *) - sizeof (char *)); case 'c': /* a constant */ /* We can't use TREE_CODE_LENGTH for INTEGER_CST, since the number of @@ -304,12 +304,12 @@ tree_size (node) case 'x': /* something random, like an identifier. */ { - size_t length; - length = (sizeof (struct tree_common) - + TREE_CODE_LENGTH (code) * sizeof (char *)); - if (code == TREE_VEC) - length += (TREE_VEC_LENGTH (node) - 1) * sizeof (char *); - return length; + size_t length; + length = (sizeof (struct tree_common) + + TREE_CODE_LENGTH (code) * sizeof (char *)); + if (code == TREE_VEC) + length += TREE_VEC_LENGTH (node) * sizeof (char *) - sizeof (char *); + return length; } default: @@ -4335,6 +4335,65 @@ int_fits_type_p (c, type) } } +/* Returns true if T is, contains, or refers to a type with variable + size. This concept is more general than that of C99 'variably + modified types': in C99, a struct type is never variably modified + because a VLA may not appear as a structure member. However, in + GNU C code like: + + struct S { int i[f()]; }; + + is valid, and other languages may define similar constructs. */ + +bool +variably_modified_type_p (type) + tree type; +{ + /* If TYPE itself has variable size, it is variably modified. + + We do not yet have a representation of the C99 '[*]' syntax. + When a representation is chosen, this function should be modified + to test for that case as well. */ + if (TYPE_SIZE (type) + && TYPE_SIZE (type) != error_mark_node + && TREE_CODE (TYPE_SIZE (type)) != INTEGER_CST) + return true; + + /* If TYPE is a pointer or reference, it is variably modified if + the type pointed to is variably modified. */ + if ((TREE_CODE (type) == POINTER_TYPE + || TREE_CODE (type) == REFERENCE_TYPE) + && variably_modified_type_p (TREE_TYPE (type))) + return true; + + /* If TYPE is an array, it is variably modified if the array + elements are. (Note that the VLA case has already been checked + above.) */ + if (TREE_CODE (type) == ARRAY_TYPE + && variably_modified_type_p (TREE_TYPE (type))) + return true; + + /* If TYPE is a function type, it is variably modified if any of the + parameters or the return type are variably modified. */ + if (TREE_CODE (type) == FUNCTION_TYPE + || TREE_CODE (type) == METHOD_TYPE) + { + tree parm; + + if (variably_modified_type_p (TREE_TYPE (type))) + return true; + for (parm = TYPE_ARG_TYPES (type); + parm && parm != void_list_node; + parm = TREE_CHAIN (parm)) + if (variably_modified_type_p (TREE_VALUE (parm))) + return true; + } + + /* The current language may have other cases to check, but in general, + all other types are not variably modified. */ + return (*lang_hooks.tree_inlining.var_mod_type_p) (type); +} + /* Given a DECL or TYPE, return the scope in which it was declared, or NULL_TREE if there is no containing scope. */ diff --git a/contrib/gcc/tree.h b/contrib/gcc/tree.h index 084c306..03724e1 100644 --- a/contrib/gcc/tree.h +++ b/contrib/gcc/tree.h @@ -2938,6 +2938,7 @@ struct obstack; /* In tree.c */ extern int really_constant_p PARAMS ((tree)); extern int int_fits_type_p PARAMS ((tree, tree)); +extern bool variably_modified_type_p PARAMS ((tree)); extern int tree_log2 PARAMS ((tree)); extern int tree_floor_log2 PARAMS ((tree)); extern void preserve_data PARAMS ((void)); diff --git a/contrib/gcc/varasm.c b/contrib/gcc/varasm.c index 9e683a5..dcfe381 100644 --- a/contrib/gcc/varasm.c +++ b/contrib/gcc/varasm.c @@ -535,7 +535,6 @@ asm_output_aligned_bss (file, decl, name, size, align) const char *name; int size, align; { - ASM_GLOBALIZE_LABEL (file, name); bss_section (); ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT)); #ifdef ASM_DECLARE_OBJECT_NAME |