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author | dim <dim@FreeBSD.org> | 2014-11-24 18:43:37 +0000 |
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committer | dim <dim@FreeBSD.org> | 2014-11-24 18:43:37 +0000 |
commit | 82ca21468e7fe6a5112961ba86434579bed3f204 (patch) | |
tree | c2772f1f62ff857fee7802d46eb79f45d45d6d54 /contrib/llvm/patches/patch-r262261-llvm-r199974-sparc.diff | |
parent | 6148c19c738a92f344008aa3f88f4e008bada0ee (diff) | |
download | FreeBSD-src-82ca21468e7fe6a5112961ba86434579bed3f204.zip FreeBSD-src-82ca21468e7fe6a5112961ba86434579bed3f204.tar.gz |
Cleanup patch set, and update README.TXT. Add three new patches.
Diffstat (limited to 'contrib/llvm/patches/patch-r262261-llvm-r199974-sparc.diff')
-rw-r--r-- | contrib/llvm/patches/patch-r262261-llvm-r199974-sparc.diff | 54 |
1 files changed, 0 insertions, 54 deletions
diff --git a/contrib/llvm/patches/patch-r262261-llvm-r199974-sparc.diff b/contrib/llvm/patches/patch-r262261-llvm-r199974-sparc.diff deleted file mode 100644 index ca388fb..0000000 --- a/contrib/llvm/patches/patch-r262261-llvm-r199974-sparc.diff +++ /dev/null @@ -1,54 +0,0 @@ -Pull in r199974 from upstream llvm trunk (by Venkatraman Govindaraju): - - [Sparc] Correct quad register list in the asm parser. - Add test cases to check parsing of v9 double registers and their aliased quad registers. - -Introduced here: http://svnweb.freebsd.org/changeset/base/262261 - -Index: test/MC/Disassembler/Sparc/sparc-fp.txt -=================================================================== ---- test/MC/Disassembler/Sparc/sparc-fp.txt -+++ test/MC/Disassembler/Sparc/sparc-fp.txt -@@ -81,6 +81,12 @@ - # CHECK: faddq %f0, %f4, %f8 - 0x91 0xa0 0x08 0x64 - -+# CHECK: faddd %f32, %f34, %f62 -+0xbf 0xa0 0x48 0x43 -+ -+# CHECK: faddq %f32, %f36, %f60 -+0xbb 0xa0 0x48 0x65 -+ - # CHECK: fsubs %f0, %f4, %f8 - 0x91 0xa0 0x08 0xa4 - -Index: test/MC/Sparc/sparc-fp-instructions.s -=================================================================== ---- test/MC/Sparc/sparc-fp-instructions.s -+++ test/MC/Sparc/sparc-fp-instructions.s -@@ -64,6 +64,12 @@ - faddd %f0, %f4, %f8 - faddq %f0, %f4, %f8 - -+ ! make sure we can handle V9 double registers and their aliased quad registers. -+ ! CHECK: faddd %f32, %f34, %f62 ! encoding: [0xbf,0xa0,0x48,0x43] -+ ! CHECK: faddq %f32, %f36, %f60 ! encoding: [0xbb,0xa0,0x48,0x65] -+ faddd %f32, %f34, %f62 -+ faddq %f32, %f36, %f60 -+ - ! CHECK: fsubs %f0, %f4, %f8 ! encoding: [0x91,0xa0,0x08,0xa4] - ! CHECK: fsubd %f0, %f4, %f8 ! encoding: [0x91,0xa0,0x08,0xc4] - ! CHECK: fsubq %f0, %f4, %f8 ! encoding: [0x91,0xa0,0x08,0xe4] -Index: lib/Target/Sparc/AsmParser/SparcAsmParser.cpp -=================================================================== ---- lib/Target/Sparc/AsmParser/SparcAsmParser.cpp -+++ lib/Target/Sparc/AsmParser/SparcAsmParser.cpp -@@ -117,7 +117,7 @@ class SparcAsmParser : public MCTargetAsmParser { - static unsigned QuadFPRegs[32] = { - Sparc::Q0, Sparc::Q1, Sparc::Q2, Sparc::Q3, - Sparc::Q4, Sparc::Q5, Sparc::Q6, Sparc::Q7, -- Sparc::Q8, Sparc::Q7, Sparc::Q8, Sparc::Q9, -+ Sparc::Q8, Sparc::Q9, Sparc::Q10, Sparc::Q11, - Sparc::Q12, Sparc::Q13, Sparc::Q14, Sparc::Q15 }; - - |