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| author | dim <dim@FreeBSD.org> | 2014-03-18 22:07:45 +0000 |
|---|---|---|
| committer | dim <dim@FreeBSD.org> | 2014-03-18 22:07:45 +0000 |
| commit | ce0b21596585c6ddd828c54e5077ba0aecfae8fc (patch) | |
| tree | 67bb26dee066c422ad2e624408df89bdc262af76 /contrib/llvm/patches/patch-r262261-llvm-r198149-sparc.diff | |
| parent | f931c3355875cf6371ab8fbad62d0f35958db4a0 (diff) | |
| download | FreeBSD-src-ce0b21596585c6ddd828c54e5077ba0aecfae8fc.zip FreeBSD-src-ce0b21596585c6ddd828c54e5077ba0aecfae8fc.tar.gz | |
Add separate patch files for all the customizations we have currently
applied to our copy of llvm/clang. These can be applied in alphabetical
order to a pristine llvm/clang 3.4 release source tree, to result in the
same version used in FreeBSD.
This is intended to clearly document all the changes until now, which
mostly consist of cherry pickings from the respective upstream trunks,
plus a number of hand-written FreeBSD-specific ones. Hopefully those
can eventually be cleaned up and sent upstream too.
MFC after: 1 week
X-MFC-With: r263313
Diffstat (limited to 'contrib/llvm/patches/patch-r262261-llvm-r198149-sparc.diff')
| -rw-r--r-- | contrib/llvm/patches/patch-r262261-llvm-r198149-sparc.diff | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/contrib/llvm/patches/patch-r262261-llvm-r198149-sparc.diff b/contrib/llvm/patches/patch-r262261-llvm-r198149-sparc.diff new file mode 100644 index 0000000..912daf3 --- /dev/null +++ b/contrib/llvm/patches/patch-r262261-llvm-r198149-sparc.diff @@ -0,0 +1,54 @@ +Pull in r198149 from upstream llvm trunk (by Venkatraman Govindaraju): + + [SparcV9] For codegen generated library calls that return float, set inreg flag manually in LowerCall(). + This makes the sparc backend to generate Sparc64 ABI compliant code. + +Introduced here: http://svn.freebsd.org/changeset/base/262261 + +Index: lib/Target/Sparc/SparcISelLowering.cpp +=================================================================== +--- lib/Target/Sparc/SparcISelLowering.cpp ++++ lib/Target/Sparc/SparcISelLowering.cpp +@@ -1252,6 +1252,12 @@ SparcTargetLowering::LowerCall_64(TargetLowering:: + SmallVector<CCValAssign, 16> RVLocs; + CCState RVInfo(CLI.CallConv, CLI.IsVarArg, DAG.getMachineFunction(), + DAG.getTarget(), RVLocs, *DAG.getContext()); ++ ++ // Set inreg flag manually for codegen generated library calls that ++ // return float. ++ if (CLI.Ins.size() == 1 && CLI.Ins[0].VT == MVT::f32 && CLI.CS == 0) ++ CLI.Ins[0].Flags.setInReg(); ++ + RVInfo.AnalyzeCallResult(CLI.Ins, CC_Sparc64); + + // Copy all of the result registers out of their specified physreg. +Index: test/CodeGen/SPARC/64abi.ll +=================================================================== +--- test/CodeGen/SPARC/64abi.ll ++++ test/CodeGen/SPARC/64abi.ll +@@ -440,4 +440,25 @@ entry: + ret i64 %0 + } + ++; CHECK-LABEL: test_call_libfunc ++; CHECK: st %f1, [%fp+[[Offset0:[0-9]+]]] ++; CHECK: fmovs %f3, %f1 ++; CHECK: call cosf ++; CHECK: st %f0, [%fp+[[Offset1:[0-9]+]]] ++; CHECK: ld [%fp+[[Offset0]]], %f1 ++; CHECK: call sinf ++; CHECK: ld [%fp+[[Offset1]]], %f1 ++; CHECK: fmuls %f1, %f0, %f0 + ++define inreg float @test_call_libfunc(float %arg0, float %arg1) { ++entry: ++ %0 = tail call inreg float @cosf(float %arg1) ++ %1 = tail call inreg float @sinf(float %arg0) ++ %2 = fmul float %0, %1 ++ ret float %2 ++} ++ ++declare inreg float @cosf(float %arg) readnone nounwind ++declare inreg float @sinf(float %arg) readnone nounwind ++ ++ |
