Upgrade our copy of clang and llvm to 3.5.1 release. This is a bugfix

only release, no new features have been added.

Please note that this version requires C++11 support to build; see
UPDATING for more information.

Release notes for llvm and clang can be found here:
<http://llvm.org/releases/3.5.1/docs/ReleaseNotes.html>
<http://llvm.org/releases/3.5.1/tools/clang/docs/ReleaseNotes.html>

MFC after:	1 month
X-MFC-With:	276479

1 files changed, 79 insertions, 0 deletions

diff --git a/contrib/llvm/patches/patch-20-llvm-r223147-arm-cpu-directive.diff b/contrib/llvm/patches/patch-20-llvm-r223147-arm-cpu-directive.diff
new file mode 100644
index 0000000..e97dc2e
--- /dev/null
+++ b/contrib/llvm/patches/patch-20-llvm-r223147-arm-cpu-directive.diff
@@ -0,0 +1,79 @@
+Pull in r223147, r223255 and r223390 from upstream llvm trunk (by Roman
+Divacky):
+
+  Introduce CPUStringIsValid() into MCSubtargetInfo and use it for ARM
+  .cpu parsing.
+
+  Previously .cpu directive in ARM assembler didnt switch to the new
+  CPU and therefore acted as a nop. This implemented real action for
+  .cpu and eg. allows to assembler FreeBSD kernel with -integrated-as.
+
+  Change the name to be in style.
+
+  Add a FIXME as requested by Renato Golin.
+
+Introduced here: http://svnweb.freebsd.org/changeset/base/275654
+
+Index: include/llvm/MC/MCSubtargetInfo.h
+===================================================================
+--- include/llvm/MC/MCSubtargetInfo.h
++++ include/llvm/MC/MCSubtargetInfo.h
+@@ -132,6 +132,15 @@ class MCSubtargetInfo {
+ 
+   /// Initialize an InstrItineraryData instance.
+   void initInstrItins(InstrItineraryData &InstrItins) const;
++
++  /// Check whether the CPU string is valid.
++  bool isCPUStringValid(StringRef CPU) {
++    auto Found = std::find_if(ProcDesc.begin(), ProcDesc.end(),
++                              [=](const SubtargetFeatureKV &KV) {
++                                return CPU == KV.Key; 
++                              });
++    return Found != ProcDesc.end();
++  }
+ };
+ 
+ } // End llvm namespace
+Index: lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+===================================================================
+--- lib/Target/ARM/AsmParser/ARMAsmParser.cpp
++++ lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+@@ -8618,6 +8618,20 @@ bool ARMAsmParser::parseDirectiveEabiAttr(SMLoc L)
+ bool ARMAsmParser::parseDirectiveCPU(SMLoc L) {
+   StringRef CPU = getParser().parseStringToEndOfStatement().trim();
+   getTargetStreamer().emitTextAttribute(ARMBuildAttrs::CPU_name, CPU);
++
++  if (!STI.isCPUStringValid(CPU)) {
++    Error(L, "Unknown CPU name");
++    return false;
++  }
++
++  // FIXME: This switches the CPU features globally, therefore it might
++  // happen that code you would not expect to assemble will. For details
++  // see: http://llvm.org/bugs/show_bug.cgi?id=20757
++  STI.InitMCProcessorInfo(CPU, "");
++  STI.InitCPUSchedModel(CPU);
++  unsigned FB = ComputeAvailableFeatures(STI.getFeatureBits());
++  setAvailableFeatures(FB);
++
+   return false;
+ }
+ 
+Index: test/MC/ARM/cpu-test.s
+===================================================================
+--- test/MC/ARM/cpu-test.s
++++ test/MC/ARM/cpu-test.s
+@@ -0,0 +1,13 @@
++// RUN: not llvm-mc -o - -triple arm-gnueabi-freebsd11.0 < %s > %t 2> %t2
++// RUN: FileCheck %s < %t
++// RUN: FileCheck %s --check-prefix=CHECK-ERROR < %t2
++
++// CHECK: .cpu cortex-a8
++.cpu cortex-a8
++// CHECK: dsb     sy
++dsb
++.cpu arm9       
++// CHECK-ERROR: error: instruction requires: data-barriers
++dsb
++// CHECK-ERROR: error: Unknown CPU name
++.cpu foobar