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authordim <dim@FreeBSD.org>2014-11-29 20:18:08 +0000
committerdim <dim@FreeBSD.org>2014-11-29 20:18:08 +0000
commit354f4d34dd14ba216ca3c65b20e4743347662958 (patch)
treeb24bbe1dc8635451a559acdca9c7bebc741b534c /contrib/llvm/patches/patch-11-llvm-r222562-loop-rotate.diff
parent409c2db38ee329b80114866313cc0b55476e2f28 (diff)
downloadFreeBSD-src-354f4d34dd14ba216ca3c65b20e4743347662958.zip
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Pull in r214802 from upstream llvm trunk (by Renato Golin):
Allow CP10/CP11 operations on ARMv5/v6 Those registers are VFP/NEON and vector instructions should be used instead, but old cores rely on those co-processors to enable VFP unwinding. This change was prompted by the libc++abi's unwinding routine and is also present in many legacy low-level bare-metal code that we ought to compile/assemble. Fixing bug PR20025 and allowing PR20529 to proceed with a fix in libc++abi. This enables assembling certain ARM instructions used in libgcc.
Diffstat (limited to 'contrib/llvm/patches/patch-11-llvm-r222562-loop-rotate.diff')
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