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| author | dim <dim@FreeBSD.org> | 2015-01-26 21:41:54 +0000 |
|---|---|---|
| committer | dim <dim@FreeBSD.org> | 2015-01-26 21:41:54 +0000 |
| commit | a53e4d44d0463dae21283fdb3ca61a1e38df799f (patch) | |
| tree | 6f5baa0292e962bb69dc0020ada66d60ea578642 /contrib/llvm/lib | |
| parent | c9e57e45aceb65bdac0c758538375582075c8a97 (diff) | |
| parent | 191df99881cad772b533cb8ad72897ab307efdb9 (diff) | |
| download | FreeBSD-src-a53e4d44d0463dae21283fdb3ca61a1e38df799f.zip FreeBSD-src-a53e4d44d0463dae21283fdb3ca61a1e38df799f.tar.gz | |
Merge ^/head r277719 through 277776.
Diffstat (limited to 'contrib/llvm/lib')
| -rw-r--r-- | contrib/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/contrib/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp b/contrib/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp index d734d43..99ebcf3 100644 --- a/contrib/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp +++ b/contrib/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp @@ -33,6 +33,10 @@ using namespace llvm; #define GET_REGINFO_TARGET_DESC #include "AArch64GenRegisterInfo.inc" +static cl::opt<bool> +ReserveX18("aarch64-reserve-x18", cl::Hidden, + cl::desc("Reserve X18, making it unavailable as GPR")); + AArch64RegisterInfo::AArch64RegisterInfo(const AArch64InstrInfo *tii, const AArch64Subtarget *sti) : AArch64GenRegisterInfo(AArch64::LR), TII(tii), STI(sti) {} @@ -90,7 +94,7 @@ AArch64RegisterInfo::getReservedRegs(const MachineFunction &MF) const { Reserved.set(AArch64::W29); } - if (STI->isTargetDarwin()) { + if (STI->isTargetDarwin() || ReserveX18) { Reserved.set(AArch64::X18); // Platform register Reserved.set(AArch64::W18); } @@ -117,7 +121,7 @@ bool AArch64RegisterInfo::isReservedReg(const MachineFunction &MF, return true; case AArch64::X18: case AArch64::W18: - return STI->isTargetDarwin(); + return STI->isTargetDarwin() || ReserveX18; case AArch64::FP: case AArch64::W29: return TFI->hasFP(MF) || STI->isTargetDarwin(); @@ -379,7 +383,7 @@ unsigned AArch64RegisterInfo::getRegPressureLimit(const TargetRegisterClass *RC, case AArch64::GPR64commonRegClassID: return 32 - 1 // XZR/SP - (TFI->hasFP(MF) || STI->isTargetDarwin()) // FP - - STI->isTargetDarwin() // X18 reserved as platform register + - (STI->isTargetDarwin() || ReserveX18) // X18 reserved as platform register - hasBasePointer(MF); // X19 case AArch64::FPR8RegClassID: case AArch64::FPR16RegClassID: |
