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authordim <dim@FreeBSD.org>2015-01-18 14:14:47 +0000
committerdim <dim@FreeBSD.org>2015-01-18 14:14:47 +0000
commitc074a2b0d05fdd11d61e6c5ffa970c806be2f31a (patch)
tree0e56d6fc0fbb158ec2ac946d1e22170e0107492d /contrib/llvm/lib/Target/Mips/MipsLongBranch.cpp
parent814696f72012ae32daa581d7a1d5253a9b439b09 (diff)
parent3c7e7a1538a873b0d3b012ef8811969ac4552c2a (diff)
downloadFreeBSD-src-c074a2b0d05fdd11d61e6c5ffa970c806be2f31a.zip
FreeBSD-src-c074a2b0d05fdd11d61e6c5ffa970c806be2f31a.tar.gz
Upgrade our copy of clang and llvm to 3.5.1 release. This is a bugfix
only release, no new features have been added. Please note that this version requires C++11 support to build; see UPDATING for more information. Release notes for llvm and clang can be found here: <http://llvm.org/releases/3.5.1/docs/ReleaseNotes.html> <http://llvm.org/releases/3.5.1/tools/clang/docs/ReleaseNotes.html> MFC after: 1 month X-MFC-With: 276479
Diffstat (limited to 'contrib/llvm/lib/Target/Mips/MipsLongBranch.cpp')
-rw-r--r--contrib/llvm/lib/Target/Mips/MipsLongBranch.cpp8
1 files changed, 4 insertions, 4 deletions
diff --git a/contrib/llvm/lib/Target/Mips/MipsLongBranch.cpp b/contrib/llvm/lib/Target/Mips/MipsLongBranch.cpp
index 27110b6..5790ed6 100644
--- a/contrib/llvm/lib/Target/Mips/MipsLongBranch.cpp
+++ b/contrib/llvm/lib/Target/Mips/MipsLongBranch.cpp
@@ -64,8 +64,8 @@ namespace {
MipsLongBranch(TargetMachine &tm)
: MachineFunctionPass(ID), TM(tm),
IsPIC(TM.getRelocationModel() == Reloc::PIC_),
- ABI(TM.getSubtarget<MipsSubtarget>().getTargetABI()),
- LongBranchSeqSize(!IsPIC ? 2 : (ABI == MipsSubtarget::N64 ? 10 :
+ ABI(TM.getSubtarget<MipsSubtarget>().getABI()),
+ LongBranchSeqSize(!IsPIC ? 2 : (ABI.IsN64() ? 10 :
(!TM.getSubtarget<MipsSubtarget>().isTargetNaCl() ? 9 : 10))) {}
const char *getPassName() const override {
@@ -86,7 +86,7 @@ namespace {
MachineFunction *MF;
SmallVector<MBBInfo, 16> MBBInfos;
bool IsPIC;
- unsigned ABI;
+ MipsABIInfo ABI;
unsigned LongBranchSeqSize;
};
@@ -273,7 +273,7 @@ void MipsLongBranch::expandToLongBranch(MBBInfo &I) {
const MipsSubtarget &Subtarget = TM.getSubtarget<MipsSubtarget>();
unsigned BalOp = Subtarget.hasMips32r6() ? Mips::BAL : Mips::BAL_BR;
- if (ABI != MipsSubtarget::N64) {
+ if (!ABI.IsN64()) {
// $longbr:
// addiu $sp, $sp, -8
// sw $ra, 0($sp)
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