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author | dim <dim@FreeBSD.org> | 2015-05-25 13:43:03 +0000 |
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committer | dim <dim@FreeBSD.org> | 2015-05-25 13:43:03 +0000 |
commit | 9f7fffcc5b3bcf5932d21d2c7a6fe6ff3586ebb7 (patch) | |
tree | ae4e0278591951934639733b0f93324644a9ee4a /contrib/llvm/lib/Target/ARM | |
parent | 2c52296aaa76fb2fba542afba29865f67b00663a (diff) | |
download | FreeBSD-src-9f7fffcc5b3bcf5932d21d2c7a6fe6ff3586ebb7.zip FreeBSD-src-9f7fffcc5b3bcf5932d21d2c7a6fe6ff3586ebb7.tar.gz |
Upgrade our copy of clang and llvm to 3.6.1 release.
This release contains the following cherry-picked revisions from
upstream trunk:
226124 226151 226164 226165 226166 226407 226408 226409 226652
226905 226983 227084 227087 227089 227208 227209 227210 227211
227212 227213 227214 227269 227430 227482 227503 227519 227574
227822 227986 227987 227988 227989 227990 228037 228038 228039
228040 228188 228189 228190 228273 228372 228373 228374 228403
228765 228848 228918 229223 229225 229226 229227 229228 229230
229234 229235 229236 229238 229239 229413 229507 229680 229750
229751 229752 229911 230146 230147 230235 230253 230255 230469
230500 230564 230603 230657 230742 230748 230956 231219 231237
231245 231259 231280 231451 231563 231601 231658 231659 231662
231984 231986 232046 232085 232142 232176 232179 232189 232382
232386 232389 232425 232438 232443 232675 232786 232797 232943
232957 233075 233080 233351 233353 233409 233410 233508 233584
233819 233904 234629 234636 234891 234975 234977 235524 235641
235662 235931 236099 236306 236307
Please note that from 3.5.0 onwards, clang and llvm require C++11
support to build; see UPDATING for more information.
Diffstat (limited to 'contrib/llvm/lib/Target/ARM')
-rw-r--r-- | contrib/llvm/lib/Target/ARM/ARMISelLowering.cpp | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/contrib/llvm/lib/Target/ARM/ARMISelLowering.cpp b/contrib/llvm/lib/Target/ARM/ARMISelLowering.cpp index e4bea5f..a3a76e6 100644 --- a/contrib/llvm/lib/Target/ARM/ARMISelLowering.cpp +++ b/contrib/llvm/lib/Target/ARM/ARMISelLowering.cpp @@ -3092,8 +3092,11 @@ ARMTargetLowering::LowerFormalArguments(SDValue Chain, for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { CCValAssign &VA = ArgLocs[i]; - std::advance(CurOrigArg, Ins[VA.getValNo()].OrigArgIndex - CurArgIdx); - CurArgIdx = Ins[VA.getValNo()].OrigArgIndex; + if (Ins[VA.getValNo()].isOrigArg()) { + std::advance(CurOrigArg, + Ins[VA.getValNo()].getOrigArgIndex() - CurArgIdx); + CurArgIdx = Ins[VA.getValNo()].getOrigArgIndex(); + } // Arguments stored in registers. if (VA.isRegLoc()) { EVT RegVT = VA.getLocVT(); @@ -3173,7 +3176,7 @@ ARMTargetLowering::LowerFormalArguments(SDValue Chain, assert(VA.isMemLoc()); assert(VA.getValVT() != MVT::i64 && "i64 should already be lowered"); - int index = ArgLocs[i].getValNo(); + int index = VA.getValNo(); // Some Ins[] entries become multiple ArgLoc[] entries. // Process them only once. @@ -3186,6 +3189,8 @@ ARMTargetLowering::LowerFormalArguments(SDValue Chain, // Since they could be overwritten by lowering of arguments in case of // a tail call. if (Flags.isByVal()) { + assert(Ins[index].isOrigArg() && + "Byval arguments cannot be implicit"); unsigned CurByValIndex = CCInfo.getInRegsParamsProcessed(); ByValStoreOffset = RoundUpToAlignment(ByValStoreOffset, Flags.getByValAlign()); |