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author | dim <dim@FreeBSD.org> | 2016-02-13 15:58:51 +0000 |
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committer | dim <dim@FreeBSD.org> | 2016-02-13 15:58:51 +0000 |
commit | 7024e27ddea8cff63ccd142987756cba5001628d (patch) | |
tree | 788dd2f48fde34dee962a966ebc3d94510e29a47 /contrib/llvm/lib/Target/ARM | |
parent | 0fcbd80cfc7cfbf997f34115b7b17d8c679c71fc (diff) | |
parent | 97a7b8a20a989eb4cf3d9465e1451de6cd05fa41 (diff) | |
download | FreeBSD-src-7024e27ddea8cff63ccd142987756cba5001628d.zip FreeBSD-src-7024e27ddea8cff63ccd142987756cba5001628d.tar.gz |
Update llvm, clang and lldb to release_38 branch r260756.
Diffstat (limited to 'contrib/llvm/lib/Target/ARM')
-rw-r--r-- | contrib/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/contrib/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp b/contrib/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp index dfbb969..6e7edbf 100644 --- a/contrib/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp +++ b/contrib/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp @@ -747,7 +747,7 @@ bool ARMDAGToDAGISel::SelectLdStSOReg(SDValue N, SDValue &Base, SDValue &Offset, // If Offset is a multiply-by-constant and it's profitable to extract a shift // and use it in a shifted operand do so. - if (Offset.getOpcode() == ISD::MUL) { + if (Offset.getOpcode() == ISD::MUL && N.hasOneUse()) { unsigned PowerOfTwo = 0; SDValue NewMulConst; if (canExtractShiftFromMul(Offset, 31, PowerOfTwo, NewMulConst)) { @@ -1422,7 +1422,7 @@ bool ARMDAGToDAGISel::SelectT2AddrModeSoReg(SDValue N, // If OffReg is a multiply-by-constant and it's profitable to extract a shift // and use it in a shifted operand do so. - if (OffReg.getOpcode() == ISD::MUL) { + if (OffReg.getOpcode() == ISD::MUL && N.hasOneUse()) { unsigned PowerOfTwo = 0; SDValue NewMulConst; if (canExtractShiftFromMul(OffReg, 3, PowerOfTwo, NewMulConst)) { |