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author | dim <dim@FreeBSD.org> | 2014-11-29 20:18:08 +0000 |
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committer | dim <dim@FreeBSD.org> | 2014-11-29 20:18:08 +0000 |
commit | 354f4d34dd14ba216ca3c65b20e4743347662958 (patch) | |
tree | b24bbe1dc8635451a559acdca9c7bebc741b534c /contrib/llvm/lib/Target/ARM | |
parent | 409c2db38ee329b80114866313cc0b55476e2f28 (diff) | |
download | FreeBSD-src-354f4d34dd14ba216ca3c65b20e4743347662958.zip FreeBSD-src-354f4d34dd14ba216ca3c65b20e4743347662958.tar.gz |
Pull in r214802 from upstream llvm trunk (by Renato Golin):
Allow CP10/CP11 operations on ARMv5/v6
Those registers are VFP/NEON and vector instructions should be used instead,
but old cores rely on those co-processors to enable VFP unwinding. This change
was prompted by the libc++abi's unwinding routine and is also present in many
legacy low-level bare-metal code that we ought to compile/assemble.
Fixing bug PR20025 and allowing PR20529 to proceed with a fix in libc++abi.
This enables assembling certain ARM instructions used in libgcc.
Diffstat (limited to 'contrib/llvm/lib/Target/ARM')
-rw-r--r-- | contrib/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/contrib/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/contrib/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index b62706c..2b12813 100644 --- a/contrib/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/contrib/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -3118,9 +3118,10 @@ static int MatchCoprocessorOperandName(StringRef Name, char CoprocOp) { return -1; switch (Name[1]) { default: return -1; - // p10 and p11 are invalid for coproc instructions (reserved for FP/NEON) - case '0': return CoprocOp == 'p'? -1: 10; - case '1': return CoprocOp == 'p'? -1: 11; + // CP10 and CP11 are VFP/NEON and so vector instructions should be used. + // However, old cores (v5/v6) did use them in that way. + case '0': return 10; + case '1': return 11; case '2': return 12; case '3': return 13; case '4': return 14; @@ -3177,6 +3178,9 @@ ARMAsmParser::parseCoprocNumOperand(OperandVector &Operands) { int Num = MatchCoprocessorOperandName(Tok.getString(), 'p'); if (Num == -1) return MatchOperand_NoMatch; + // ARMv7 and v8 don't allow cp10/cp11 due to VFP/NEON specific instructions + if ((hasV7Ops() || hasV8Ops()) && (Num == 10 || Num == 11)) + return MatchOperand_NoMatch; Parser.Lex(); // Eat identifier token. Operands.push_back(ARMOperand::CreateCoprocNum(Num, S)); |