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authorjhb <jhb@FreeBSD.org>2014-01-29 14:56:48 +0000
committerjhb <jhb@FreeBSD.org>2014-01-29 14:56:48 +0000
commit3f6ca218c6bdd97f650bf22c333e4de00d52996b (patch)
tree09685dd2341b1fb3a81952684f6e4b12e50ee984 /contrib/libc++/include/array
parenta9cddbb1f16b47f5880a3d0ec07880709fdec16e (diff)
downloadFreeBSD-src-3f6ca218c6bdd97f650bf22c333e4de00d52996b.zip
FreeBSD-src-3f6ca218c6bdd97f650bf22c333e4de00d52996b.tar.gz
Enhance the support for PCI legacy INTx interrupts and enable them in
the virtio backends. - Add a new ioctl to export the count of pins on the I/O APIC from vmm to the hypervisor. - Use pins on the I/O APIC >= 16 for PCI interrupts leaving 0-15 for ISA interrupts. - Populate the MP Table with I/O interrupt entries for any PCI INTx interrupts. - Create a _PRT table under the PCI root bridge in ACPI to route any PCI INTx interrupts appropriately. - Track which INTx interrupts are in use per-slot so that functions that share a slot attempt to distribute their INTx interrupts across the four available pins. - Implicitly mask INTx interrupts if either MSI or MSI-X is enabled and when the INTx DIS bit is set in a function's PCI command register. Either assert or deassert the associated I/O APIC pin when the state of one of those conditions changes. - Add INTx support to the virtio backends. - Always advertise the MSI capability in the virtio backends. Submitted by: neel (7) Reviewed by: neel MFC after: 2 weeks
Diffstat (limited to 'contrib/libc++/include/array')
0 files changed, 0 insertions, 0 deletions
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