Merge gcc.2.95.3-test1 changes onto mainline

8 files changed, 4478 insertions, 805 deletions

diff --git a/contrib/gcc/config/alpha/alpha.c b/contrib/gcc/config/alpha/alpha.c
index f7428c3..a8f4936 100644
--- a/contrib/gcc/config/alpha/alpha.c
+++ b/contrib/gcc/config/alpha/alpha.c
@@ -1,5 +1,5 @@
 /* Subroutines used for code generation on the DEC Alpha.
-   Copyright (C) 1992, 1993, 1994, 1995 Free Software Foundation, Inc.
+   Copyright (C) 1992, 93-98, 1999 Free Software Foundation, Inc. 
    Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
 
 This file is part of GNU CC.
@@ -19,9 +19,11 @@ along with GNU CC; see the file COPYING.  If not, write to
 the Free Software Foundation, 59 Temple Place - Suite 330,
 Boston, MA 02111-1307, USA.  */
 
+/* $FreeBSD$ */
+
 
-#include <stdio.h>
 #include "config.h"
+#include "system.h"
 #include "rtl.h"
 #include "regs.h"
 #include "hard-reg-set.h"
@@ -34,9 +36,44 @@ Boston, MA 02111-1307, USA.  */
 #include "flags.h"
 #include "recog.h"
 #include "reload.h"
+#include "tree.h"
 #include "expr.h"
 #include "obstack.h"
-#include "tree.h"
+#include "except.h"
+#include "function.h"
+#include "toplev.h"
+
+/* External data.  */
+extern char *version_string;
+extern int rtx_equal_function_value_matters;
+
+/* Specify which cpu to schedule for. */
+
+enum processor_type alpha_cpu;
+static const char * const alpha_cpu_name[] = 
+{
+  "ev4", "ev5", "ev6"
+};
+
+/* Specify how accurate floating-point traps need to be.  */
+
+enum alpha_trap_precision alpha_tp;
+
+/* Specify the floating-point rounding mode.  */
+
+enum alpha_fp_rounding_mode alpha_fprm;
+
+/* Specify which things cause traps.  */
+
+enum alpha_fp_trap_mode alpha_fptm;
+
+/* Strings decoded into the above options.  */
+
+const char *alpha_cpu_string;	/* -mcpu= */
+const char *alpha_tp_string;	/* -mtrap-precision=[p|s|i] */
+const char *alpha_fprm_string;	/* -mfp-rounding-mode=[n|m|c|d] */
+const char *alpha_fptm_string;	/* -mfp-trap-mode=[n|u|su|sui] */
+const char *alpha_mlat_string;	/* -mmemory-latency= */
 
 /* Save information from a "cmpxx" operation until the branch or scc is
    emitted.  */
@@ -44,26 +81,246 @@ Boston, MA 02111-1307, USA.  */
 rtx alpha_compare_op0, alpha_compare_op1;
 int alpha_compare_fp_p;
 
-/* Save the name of the current function as used by the assembler.  This
-   is used by the epilogue.  */
+/* Define the information needed to modify the epilogue for EH.  */
 
-char *alpha_function_name;
+rtx alpha_eh_epilogue_sp_ofs;
 
 /* Non-zero if inside of a function, because the Alpha asm can't
    handle .files inside of functions.  */
 
 static int inside_function = FALSE;
 
-/* Nonzero if the current function needs gp.  */
+/* If non-null, this rtx holds the return address for the function.  */
 
-int alpha_function_needs_gp;
+static rtx alpha_return_addr_rtx;
 
-extern char *version_string;
-extern int rtx_equal_function_value_matters;
+/* The number of cycles of latency we should assume on memory reads.  */
+
+int alpha_memory_latency = 3;
+
+/* Whether the function needs the GP.  */
+
+static int alpha_function_needs_gp;
+
+/* The alias set for prologue/epilogue register save/restore.  */
+
+static int alpha_sr_alias_set;
 
 /* Declarations of static functions.  */
-static void alpha_set_memflags_1  PROTO((rtx, int, int, int));
-static void add_long_const	PROTO((FILE *, HOST_WIDE_INT, int, int, int));
+static void alpha_set_memflags_1
+  PROTO((rtx, int, int, int));
+static rtx alpha_emit_set_const_1
+  PROTO((rtx, enum machine_mode, HOST_WIDE_INT, int));
+static void alpha_expand_unaligned_load_words
+  PROTO((rtx *out_regs, rtx smem, HOST_WIDE_INT words, HOST_WIDE_INT ofs));
+static void alpha_expand_unaligned_store_words
+  PROTO((rtx *out_regs, rtx smem, HOST_WIDE_INT words, HOST_WIDE_INT ofs));
+static void alpha_sa_mask
+  PROTO((unsigned long *imaskP, unsigned long *fmaskP));
+static int alpha_does_function_need_gp
+  PROTO((void));
+
+int zap_mask
+  PROTO((HOST_WIDE_INT));
+rtx alpha_emit_set_long_const
+  PROTO((rtx, HOST_WIDE_INT, HOST_WIDE_INT));
+void alpha_expand_unaligned_load
+  PROTO((rtx, rtx, HOST_WIDE_INT, HOST_WIDE_INT, int));
+void alpha_expand_unaligned_store
+  PROTO((rtx, rtx, HOST_WIDE_INT, HOST_WIDE_INT));
+
+/* Get the number of args of a function in one of two ways.  */
+#ifdef OPEN_VMS
+#define NUM_ARGS current_function_args_info.num_args
+#else
+#define NUM_ARGS current_function_args_info
+#endif
+
+#define REG_PV 27
+#define REG_RA 26
+
+/* Parse target option strings. */
+
+void
+override_options ()
+{
+  alpha_tp = ALPHA_TP_PROG;
+  alpha_fprm = ALPHA_FPRM_NORM;
+  alpha_fptm = ALPHA_FPTM_N;
+
+  if (TARGET_IEEE)
+    {
+      alpha_tp = ALPHA_TP_INSN;
+      alpha_fptm = ALPHA_FPTM_SU;
+    }
+
+  if (TARGET_IEEE_WITH_INEXACT)
+    {
+      alpha_tp = ALPHA_TP_INSN;
+      alpha_fptm = ALPHA_FPTM_SUI;
+    }
+
+  if (alpha_tp_string)
+    {
+      if (! strcmp (alpha_tp_string, "p"))
+	alpha_tp = ALPHA_TP_PROG;
+      else if (! strcmp (alpha_tp_string, "f"))
+	alpha_tp = ALPHA_TP_FUNC;
+      else if (! strcmp (alpha_tp_string, "i"))
+	alpha_tp = ALPHA_TP_INSN;
+      else
+	error ("bad value `%s' for -mtrap-precision switch", alpha_tp_string);
+    }
+
+  if (alpha_fprm_string)
+    {
+      if (! strcmp (alpha_fprm_string, "n"))
+	alpha_fprm = ALPHA_FPRM_NORM;
+      else if (! strcmp (alpha_fprm_string, "m"))
+	alpha_fprm = ALPHA_FPRM_MINF;
+      else if (! strcmp (alpha_fprm_string, "c"))
+	alpha_fprm = ALPHA_FPRM_CHOP;
+      else if (! strcmp (alpha_fprm_string,"d"))
+	alpha_fprm = ALPHA_FPRM_DYN;
+      else
+	error ("bad value `%s' for -mfp-rounding-mode switch",
+	       alpha_fprm_string);
+    }
+
+  if (alpha_fptm_string)
+    {
+      if (strcmp (alpha_fptm_string, "n") == 0)
+	alpha_fptm = ALPHA_FPTM_N;
+      else if (strcmp (alpha_fptm_string, "u") == 0)
+	alpha_fptm = ALPHA_FPTM_U;
+      else if (strcmp (alpha_fptm_string, "su") == 0)
+	alpha_fptm = ALPHA_FPTM_SU;
+      else if (strcmp (alpha_fptm_string, "sui") == 0)
+	alpha_fptm = ALPHA_FPTM_SUI;
+      else
+	error ("bad value `%s' for -mfp-trap-mode switch", alpha_fptm_string);
+    }
+
+  alpha_cpu
+    = TARGET_CPU_DEFAULT & MASK_CPU_EV6 ? PROCESSOR_EV6
+      : (TARGET_CPU_DEFAULT & MASK_CPU_EV5 ? PROCESSOR_EV5 : PROCESSOR_EV4);
+
+  if (alpha_cpu_string)
+    {
+      if (! strcmp (alpha_cpu_string, "ev4")
+	  || ! strcmp (alpha_cpu_string, "21064"))
+	{
+	  alpha_cpu = PROCESSOR_EV4;
+	  target_flags &= ~ (MASK_BWX | MASK_MAX | MASK_FIX | MASK_CIX);
+	}
+      else if (! strcmp (alpha_cpu_string, "ev5")
+	       || ! strcmp (alpha_cpu_string, "21164"))
+	{
+	  alpha_cpu = PROCESSOR_EV5;
+	  target_flags &= ~ (MASK_BWX | MASK_MAX | MASK_FIX | MASK_CIX);
+	}
+      else if (! strcmp (alpha_cpu_string, "ev56")
+	       || ! strcmp (alpha_cpu_string, "21164a"))
+	{
+	  alpha_cpu = PROCESSOR_EV5;
+	  target_flags |= MASK_BWX;
+	  target_flags &= ~ (MASK_MAX | MASK_FIX | MASK_CIX);
+	}
+      else if (! strcmp (alpha_cpu_string, "pca56")
+	       || ! strcmp (alpha_cpu_string, "21164PC")
+	       || ! strcmp (alpha_cpu_string, "21164pc"))
+	{
+	  alpha_cpu = PROCESSOR_EV5;
+	  target_flags |= MASK_BWX | MASK_MAX;
+	  target_flags &= ~ (MASK_FIX | MASK_CIX);
+	}
+      else if (! strcmp (alpha_cpu_string, "ev6")
+	       || ! strcmp (alpha_cpu_string, "21264"))
+	{
+	  alpha_cpu = PROCESSOR_EV6;
+	  target_flags |= MASK_BWX | MASK_MAX | MASK_FIX;
+	  target_flags &= ~ (MASK_CIX);
+	}
+      else
+	error ("bad value `%s' for -mcpu switch", alpha_cpu_string);
+    }
+
+  /* Do some sanity checks on the above options. */
+
+  if ((alpha_fptm == ALPHA_FPTM_SU || alpha_fptm == ALPHA_FPTM_SUI)
+      && alpha_tp != ALPHA_TP_INSN && alpha_cpu != PROCESSOR_EV6)
+    {
+      warning ("fp software completion requires -mtrap-precision=i");
+      alpha_tp = ALPHA_TP_INSN;
+    }
+
+  if (TARGET_FLOAT_VAX)
+    {
+      if (alpha_fprm == ALPHA_FPRM_MINF || alpha_fprm == ALPHA_FPRM_DYN)
+	{
+	  warning ("rounding mode not supported for VAX floats");
+	  alpha_fprm = ALPHA_FPRM_NORM;
+	}
+      if (alpha_fptm == ALPHA_FPTM_SUI)
+	{
+	  warning ("trap mode not supported for VAX floats");
+	  alpha_fptm = ALPHA_FPTM_SU;
+	}
+    }
+
+  {
+    char *end;
+    int lat;
+
+    if (!alpha_mlat_string)
+      alpha_mlat_string = "L1";
+
+    if (ISDIGIT ((unsigned char)alpha_mlat_string[0])
+	&& (lat = strtol (alpha_mlat_string, &end, 10), *end == '\0'))
+      ;
+    else if ((alpha_mlat_string[0] == 'L' || alpha_mlat_string[0] == 'l')
+	     && ISDIGIT ((unsigned char)alpha_mlat_string[1])
+	     && alpha_mlat_string[2] == '\0')
+      {
+	static int const cache_latency[][4] = 
+	{
+	  { 3, 30, -1 },	/* ev4 -- Bcache is a guess */
+	  { 2, 12, 38 },	/* ev5 -- Bcache from PC164 LMbench numbers */
+	  { 3, 13, -1 },	/* ev6 -- Ho hum, doesn't exist yet */
+	};
+
+	lat = alpha_mlat_string[1] - '0';
+	if (lat < 0 || lat > 3 || cache_latency[alpha_cpu][lat-1] == -1)
+	  {
+	    warning ("L%d cache latency unknown for %s",
+		     lat, alpha_cpu_name[alpha_cpu]);
+	    lat = 3;
+	  }
+	else
+	  lat = cache_latency[alpha_cpu][lat-1];
+      }
+    else if (! strcmp (alpha_mlat_string, "main"))
+      {
+	/* Most current memories have about 370ns latency.  This is
+	   a reasonable guess for a fast cpu.  */
+	lat = 150;
+      }
+    else
+      {
+	warning ("bad value `%s' for -mmemory-latency", alpha_mlat_string);
+	lat = 3;
+      }
+
+    alpha_memory_latency = lat;
+  }
+
+  /* Default the definition of "small data" to 8 bytes.  */
+  if (!g_switch_set)
+    g_switch_value = 8;
+
+  /* Acquire a unique set number for our register saves and restores.  */
+  alpha_sr_alias_set = new_alias_set ();
+}
 
 /* Returns 1 if VALUE is a mask that contains full bytes of zero or ones.  */
 
@@ -123,10 +380,10 @@ reg_or_8bit_operand (op, mode)
 int
 cint8_operand (op, mode)
      register rtx op;
-     enum machine_mode mode;
+     enum machine_mode mode ATTRIBUTE_UNUSED;
 {
-  return (GET_CODE (op) == CONST_INT
-	  && (unsigned HOST_WIDE_INT) INTVAL (op) < 0x100);
+  return ((GET_CODE (op) == CONST_INT
+	   && (unsigned HOST_WIDE_INT) INTVAL (op) < 0x100));
 }
 
 /* Return 1 if the operand is a valid second operand to an add insn.  */
@@ -137,9 +394,9 @@ add_operand (op, mode)
      enum machine_mode mode;
 {
   if (GET_CODE (op) == CONST_INT)
+    /* Constraints I, J, O and P are covered by K.  */
     return (CONST_OK_FOR_LETTER_P (INTVAL (op), 'K')
-	    || CONST_OK_FOR_LETTER_P (INTVAL (op), 'L')
-	    || CONST_OK_FOR_LETTER_P (INTVAL (op), 'O'));
+	    || CONST_OK_FOR_LETTER_P (INTVAL (op), 'L'));
 
   return register_operand (op, mode);
 }
@@ -153,8 +410,8 @@ sext_add_operand (op, mode)
      enum machine_mode mode;
 {
   if (GET_CODE (op) == CONST_INT)
-    return ((unsigned HOST_WIDE_INT) INTVAL (op) < 255
-	    || (unsigned HOST_WIDE_INT) (- INTVAL (op)) < 255);
+    return (CONST_OK_FOR_LETTER_P (INTVAL (op), 'I')
+	    || CONST_OK_FOR_LETTER_P (INTVAL (op), 'O'));
 
   return register_operand (op, mode);
 }
@@ -164,7 +421,7 @@ sext_add_operand (op, mode)
 int
 const48_operand (op, mode)
      register rtx op;
-     enum machine_mode mode;
+     enum machine_mode mode ATTRIBUTE_UNUSED;
 {
   return (GET_CODE (op) == CONST_INT
 	  && (INTVAL (op) == 4 || INTVAL (op) == 8));
@@ -209,10 +466,11 @@ or_operand (op, mode)
 int
 mode_width_operand (op, mode)
      register rtx op;
-     enum machine_mode mode;
+     enum machine_mode mode ATTRIBUTE_UNUSED;
 {
   return (GET_CODE (op) == CONST_INT
-	  && (INTVAL (op) == 8 || INTVAL (op) == 16 || INTVAL (op) == 32));
+	  && (INTVAL (op) == 8 || INTVAL (op) == 16
+	      || INTVAL (op) == 32 || INTVAL (op) == 64));
 }
 
 /* Return 1 if OP is a constant that is the width of an integral machine mode
@@ -221,18 +479,24 @@ mode_width_operand (op, mode)
 int
 mode_mask_operand (op, mode)
      register rtx op;
-     enum machine_mode mode;
+     enum machine_mode mode ATTRIBUTE_UNUSED;
 {
 #if HOST_BITS_PER_WIDE_INT == 32
   if (GET_CODE (op) == CONST_DOUBLE)
-    return CONST_DOUBLE_HIGH (op) == 0 && CONST_DOUBLE_LOW (op) == -1;
+    return (CONST_DOUBLE_LOW (op) == -1
+	    && (CONST_DOUBLE_HIGH (op) == -1
+		|| CONST_DOUBLE_HIGH (op) == 0));
+#else
+  if (GET_CODE (op) == CONST_DOUBLE)
+    return (CONST_DOUBLE_LOW (op) == -1 && CONST_DOUBLE_HIGH (op) == 0);
 #endif
 
   return (GET_CODE (op) == CONST_INT
 	  && (INTVAL (op) == 0xff
 	      || INTVAL (op) == 0xffff
+	      || INTVAL (op) == (HOST_WIDE_INT)0xffffffff
 #if HOST_BITS_PER_WIDE_INT == 64
-	      || INTVAL (op) == 0xffffffff
+	      || INTVAL (op) == -1
 #endif
 	      ));
 }
@@ -242,7 +506,7 @@ mode_mask_operand (op, mode)
 int
 mul8_operand (op, mode)
      register rtx op;
-     enum machine_mode mode;
+     enum machine_mode mode ATTRIBUTE_UNUSED;
 {
   return (GET_CODE (op) == CONST_INT
 	  && (unsigned HOST_WIDE_INT) INTVAL (op) < 64
@@ -270,6 +534,18 @@ reg_or_fp0_operand (op, mode)
   return fp0_operand (op, mode) || register_operand (op, mode);
 }
 
+/* Return 1 if OP is a hard floating-point register.  */
+
+int
+hard_fp_register_operand (op, mode)
+     register rtx op;
+     enum machine_mode mode;
+{
+  return ((GET_CODE (op) == REG && REGNO_REG_CLASS (REGNO (op)) == FLOAT_REGS)
+	  || (GET_CODE (op) == SUBREG
+	      && hard_fp_register_operand (SUBREG_REG (op), mode)));
+}
+
 /* Return 1 if OP is a register or a constant integer.  */
 
 
@@ -278,7 +554,8 @@ reg_or_cint_operand (op, mode)
     register rtx op;
     enum machine_mode mode;
 {
-     return GET_CODE (op) == CONST_INT || register_operand (op, mode);
+     return (GET_CODE (op) == CONST_INT
+	     || register_operand (op, mode));
 }
 
 /* Return 1 if OP is something that can be reloaded into a register;
@@ -294,12 +571,15 @@ some_operand (op, mode)
 
   switch (GET_CODE (op))
     {
-    case REG:  case MEM:  case CONST_DOUBLE:
-    case CONST_INT:  case LABEL_REF:  case SYMBOL_REF:  case CONST:
+    case REG:  case MEM:  case CONST_DOUBLE:  case CONST_INT:  case LABEL_REF:
+    case SYMBOL_REF:  case CONST:
       return 1;
 
     case SUBREG:
       return some_operand (SUBREG_REG (op), VOIDmode);
+
+    default:
+      break;
     }
 
   return 0;
@@ -323,7 +603,7 @@ input_operand (op, mode)
     case LABEL_REF:
     case SYMBOL_REF:
     case CONST:
-        /* This handles both the Windows/NT and OSF cases.  */
+      /* This handles both the Windows/NT and OSF cases.  */
       return mode == ptr_mode || mode == DImode;
 
     case REG:
@@ -334,13 +614,20 @@ input_operand (op, mode)
 	return 1;
       /* ... fall through ... */
     case MEM:
-      return mode != HImode && mode != QImode && general_operand (op, mode);
+      return ((TARGET_BWX || (mode != HImode && mode != QImode))
+	      && general_operand (op, mode));
 
     case CONST_DOUBLE:
       return GET_MODE_CLASS (mode) == MODE_FLOAT && op == CONST0_RTX (mode);
 
     case CONST_INT:
       return mode == QImode || mode == HImode || add_operand (op, mode);
+
+    case CONSTANT_P_RTX:
+      return 1;
+
+    default:
+      break;
     }
 
   return 0;
@@ -352,7 +639,7 @@ input_operand (op, mode)
 int
 current_file_function_operand (op, mode)
      rtx op;
-     enum machine_mode mode;
+     enum machine_mode mode ATTRIBUTE_UNUSED;
 {
   return (GET_CODE (op) == SYMBOL_REF
 	  && ! profile_flag && ! profile_block_flag
@@ -370,7 +657,9 @@ call_operand (op, mode)
   if (mode != Pmode)
     return 0;
 
-  return (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == REG);
+  return (GET_CODE (op) == SYMBOL_REF
+	  || (GET_CODE (op) == REG
+	      && (TARGET_OPEN_VMS || TARGET_WINDOWS_NT || REGNO (op) == 27)));
 }
 
 /* Return 1 if OP is a valid Alpha comparison operator.  Here we know which
@@ -390,17 +679,37 @@ alpha_comparison_operator (op, mode)
 	  || (mode == DImode && (code == LEU || code == LTU)));
 }
 
+/* Return 1 if OP is a valid Alpha swapped comparison operator.  */
+
+int
+alpha_swapped_comparison_operator (op, mode)
+     register rtx op;
+     enum machine_mode mode;
+{
+  enum rtx_code code = GET_CODE (op);
+
+  if (mode != GET_MODE (op) || GET_RTX_CLASS (code) != '<')
+    return 0;
+
+  code = swap_condition (code);
+  return (code == EQ || code == LE || code == LT
+	  || (mode == DImode && (code == LEU || code == LTU)));
+}
+
 /* Return 1 if OP is a signed comparison operation.  */
 
 int
 signed_comparison_operator (op, mode)
      register rtx op;
-     enum machine_mode mode;
+     enum machine_mode mode ATTRIBUTE_UNUSED;
 {
   switch (GET_CODE (op))
     {
     case EQ:  case NE:  case LE:  case LT:  case GE:   case GT:
       return 1;
+
+    default:
+      break;
     }
 
   return 0;
@@ -411,12 +720,15 @@ signed_comparison_operator (op, mode)
 int
 divmod_operator (op, mode)
      register rtx op;
-     enum machine_mode mode;
+     enum machine_mode mode ATTRIBUTE_UNUSED;
 {
   switch (GET_CODE (op))
     {
     case DIV:  case MOD:  case UDIV:  case UMOD:
       return 1;
+
+    default:
+      break;
     }
 
   return 0;
@@ -426,43 +738,49 @@ divmod_operator (op, mode)
    a constant.  It must be a valid address.  This means that we can do
    this as an aligned reference plus some offset.
 
-   Take into account what reload will do.
-
-   We could say that out-of-range stack slots are alignable, but that would
-   complicate get_aligned_mem and it isn't worth the trouble since few
-   functions have large stack space.  */
+   Take into account what reload will do.  */
 
 int
 aligned_memory_operand (op, mode)
      register rtx op;
      enum machine_mode mode;
 {
-  if (GET_CODE (op) == SUBREG)
+  rtx base;
+
+  if (reload_in_progress)
     {
-      if (GET_MODE (op) != mode)
-	return 0;
-      op = SUBREG_REG (op);
-      mode = GET_MODE (op);
+      rtx tmp = op;
+      if (GET_CODE (tmp) == SUBREG)
+	tmp = SUBREG_REG (tmp);
+      if (GET_CODE (tmp) == REG
+	  && REGNO (tmp) >= FIRST_PSEUDO_REGISTER)
+	{
+	  op = reg_equiv_memory_loc[REGNO (tmp)];
+	  if (op == 0)
+	    return 0;
+	}
     }
 
-  if (reload_in_progress && GET_CODE (op) == REG
-      && REGNO (op) >= FIRST_PSEUDO_REGISTER)
-    op = reg_equiv_mem[REGNO (op)];
-
-  if (GET_CODE (op) != MEM || GET_MODE (op) != mode
-      || ! memory_address_p (mode, XEXP (op, 0)))
+  if (GET_CODE (op) != MEM
+      || GET_MODE (op) != mode)
     return 0;
-
   op = XEXP (op, 0);
 
-  if (GET_CODE (op) == PLUS)
-    op = XEXP (op, 0);
+  /* LEGITIMIZE_RELOAD_ADDRESS creates (plus (plus reg const_hi) const_lo)
+     sorts of constructs.  Dig for the real base register.  */
+  if (reload_in_progress
+      && GET_CODE (op) == PLUS
+      && GET_CODE (XEXP (op, 0)) == PLUS)
+    base = XEXP (XEXP (op, 0), 0);
+  else
+    {
+      if (! memory_address_p (mode, op))
+	return 0;
+      base = (GET_CODE (op) == PLUS ? XEXP (op, 0) : op);
+    }
 
-  return (GET_CODE (op) == REG
-	  && (REGNO (op) == STACK_POINTER_REGNUM
-	      || op == hard_frame_pointer_rtx
-	      || (REGNO (op) >= FIRST_VIRTUAL_REGISTER
-		  && REGNO (op) <= LAST_VIRTUAL_REGISTER)));
+  return (GET_CODE (base) == REG
+	  && REGNO_POINTER_ALIGN (REGNO (base)) >= 4);
 }
 
 /* Similar, but return 1 if OP is a MEM which is not alignable.  */
@@ -472,34 +790,52 @@ unaligned_memory_operand (op, mode)
      register rtx op;
      enum machine_mode mode;
 {
-  if (GET_CODE (op) == SUBREG)
+  rtx base;
+
+  if (reload_in_progress)
     {
-      if (GET_MODE (op) != mode)
-	return 0;
-      op = SUBREG_REG (op);
-      mode = GET_MODE (op);
+      rtx tmp = op;
+      if (GET_CODE (tmp) == SUBREG)
+	tmp = SUBREG_REG (tmp);
+      if (GET_CODE (tmp) == REG
+	  && REGNO (tmp) >= FIRST_PSEUDO_REGISTER)
+	{
+	  op = reg_equiv_memory_loc[REGNO (tmp)];
+	  if (op == 0)
+	    return 0;
+	}
     }
 
-  if (reload_in_progress && GET_CODE (op) == REG
-      && REGNO (op) >= FIRST_PSEUDO_REGISTER)
-    op = reg_equiv_mem[REGNO (op)];
-
-  if (GET_CODE (op) != MEM || GET_MODE (op) != mode)
+  if (GET_CODE (op) != MEM
+      || GET_MODE (op) != mode)
     return 0;
-
   op = XEXP (op, 0);
 
-  if (! memory_address_p (mode, op))
-    return 1;
+  /* LEGITIMIZE_RELOAD_ADDRESS creates (plus (plus reg const_hi) const_lo)
+     sorts of constructs.  Dig for the real base register.  */
+  if (reload_in_progress
+      && GET_CODE (op) == PLUS
+      && GET_CODE (XEXP (op, 0)) == PLUS)
+    base = XEXP (XEXP (op, 0), 0);
+  else
+    {
+      if (! memory_address_p (mode, op))
+	return 0;
+      base = (GET_CODE (op) == PLUS ? XEXP (op, 0) : op);
+    }
 
-  if (GET_CODE (op) == PLUS)
-    op = XEXP (op, 0);
+  return (GET_CODE (base) == REG
+	  && REGNO_POINTER_ALIGN (REGNO (base)) < 4);
+}
 
-  return (GET_CODE (op) != REG
-	  || (REGNO (op) != STACK_POINTER_REGNUM
-	      && op != hard_frame_pointer_rtx
-	      && (REGNO (op) < FIRST_VIRTUAL_REGISTER
-		  || REGNO (op) > LAST_VIRTUAL_REGISTER)));
+/* Return 1 if OP is either a register or an unaligned memory location.  */
+
+int
+reg_or_unaligned_mem_operand (op, mode)
+     rtx op;
+     enum machine_mode mode;
+{
+  return register_operand (op, mode) || unaligned_memory_operand (op, mode);
 }
 
 /* Return 1 if OP is any memory location.  During reload a pseudo matches.  */
@@ -507,7 +843,7 @@ unaligned_memory_operand (op, mode)
 int
 any_memory_operand (op, mode)
      register rtx op;
-     enum machine_mode mode;
+     enum machine_mode mode ATTRIBUTE_UNUSED;
 {
   return (GET_CODE (op) == MEM
 	  || (GET_CODE (op) == SUBREG && GET_CODE (SUBREG_REG (op)) == REG)
@@ -518,9 +854,89 @@ any_memory_operand (op, mode)
 	      && REGNO (SUBREG_REG (op)) >= FIRST_PSEUDO_REGISTER));
 }
 
+/* Returns 1 if OP is not an eliminable register.
+
+   This exists to cure a pathological abort in the s8addq (et al) patterns,
+
+	long foo () { long t; bar(); return (long) &t * 26107; }
+
+   which run afoul of a hack in reload to cure a (presumably) similar
+   problem with lea-type instructions on other targets.  But there is
+   one of us and many of them, so work around the problem by selectively
+   preventing combine from making the optimization.  */
+
+int
+reg_not_elim_operand (op, mode)
+      register rtx op;
+      enum machine_mode mode;
+{
+  rtx inner = op;
+  if (GET_CODE (op) == SUBREG)
+    inner = SUBREG_REG (op);
+  if (inner == frame_pointer_rtx || inner == arg_pointer_rtx)
+    return 0;
+
+  return register_operand (op, mode);
+}
+
+/* Return 1 is OP is a memory location that is not a reference (using
+   an AND) to an unaligned location.  Take into account what reload
+   will do.  */
+
+int
+normal_memory_operand (op, mode)
+     register rtx op;
+     enum machine_mode mode ATTRIBUTE_UNUSED;
+{
+  if (reload_in_progress)
+    {
+      rtx tmp = op;
+      if (GET_CODE (tmp) == SUBREG)
+	tmp = SUBREG_REG (tmp);
+      if (GET_CODE (tmp) == REG
+	  && REGNO (tmp) >= FIRST_PSEUDO_REGISTER)
+	{
+	  op = reg_equiv_memory_loc[REGNO (tmp)];
+
+	  /* This may not have been assigned an equivalent address if it will
+	     be eliminated.  In that case, it doesn't matter what we do.  */
+	  if (op == 0)
+	    return 1;
+	}
+    }
+
+  return GET_CODE (op) == MEM && GET_CODE (XEXP (op, 0)) != AND;
+}
+
+/* Accept a register, but not a subreg of any kind.  This allows us to
+   avoid pathological cases in reload wrt data movement common in 
+   int->fp conversion.  */
+
+int
+reg_no_subreg_operand (op, mode)
+     register rtx op;
+     enum machine_mode mode;
+{
+  if (GET_CODE (op) == SUBREG)
+    return 0;
+  return register_operand (op, mode);
+}
+
+/* Return 1 if this function can directly return via $26.  */
+
+int
+direct_return ()
+{
+  return (! TARGET_OPEN_VMS && reload_completed && alpha_sa_size () == 0
+	  && get_frame_size () == 0
+	  && current_function_outgoing_args_size == 0
+	  && current_function_pretend_args_size == 0);
+}
+
 /* REF is an alignable memory location.  Place an aligned SImode
    reference into *PALIGNED_MEM and the number of bits to shift into
-   *PBITNUM.  */
+   *PBITNUM.  SCRATCH is a free register for use in reloading out
+   of range stack slots.  */
 
 void
 get_aligned_mem (ref, paligned_mem, pbitnum)
@@ -530,67 +946,67 @@ get_aligned_mem (ref, paligned_mem, pbitnum)
   rtx base;
   HOST_WIDE_INT offset = 0;
 
-  if (GET_CODE (ref) == SUBREG)
-    {
-      offset = SUBREG_WORD (ref) * UNITS_PER_WORD;
-      if (BYTES_BIG_ENDIAN)
-	offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (ref)))
-		   - MIN (UNITS_PER_WORD,
-			  GET_MODE_SIZE (GET_MODE (SUBREG_REG (ref)))));
-      ref = SUBREG_REG (ref);
-    }
+  if (GET_CODE (ref) != MEM)
+    abort ();
 
-  if (GET_CODE (ref) == REG)
-    ref = reg_equiv_mem[REGNO (ref)];
+  if (reload_in_progress
+      && ! memory_address_p (GET_MODE (ref), XEXP (ref, 0)))
+    {
+      base = find_replacement (&XEXP (ref, 0));
 
-  if (reload_in_progress)
-    base = find_replacement (&XEXP (ref, 0));
+      if (! memory_address_p (GET_MODE (ref), base))
+	abort ();
+    }
   else
-    base = XEXP (ref, 0);
+    {
+      base = XEXP (ref, 0);
+    }
 
   if (GET_CODE (base) == PLUS)
     offset += INTVAL (XEXP (base, 1)), base = XEXP (base, 0);
 
-  *paligned_mem = gen_rtx (MEM, SImode,
-			   plus_constant (base, offset & ~3));
-  MEM_IN_STRUCT_P (*paligned_mem) = MEM_IN_STRUCT_P (ref);
-  MEM_VOLATILE_P (*paligned_mem) = MEM_VOLATILE_P (ref);
+  *paligned_mem = gen_rtx_MEM (SImode, plus_constant (base, offset & ~3));
+  MEM_COPY_ATTRIBUTES (*paligned_mem, ref);
   RTX_UNCHANGING_P (*paligned_mem) = RTX_UNCHANGING_P (ref);
 
+  /* Sadly, we cannot use alias sets here because we may overlap other
+     data in a different alias set.  */
+  /* MEM_ALIAS_SET (*paligned_mem) = MEM_ALIAS_SET (ref); */
+
   *pbitnum = GEN_INT ((offset & 3) * 8);
 }
 
-/* Similar, but just get the address.  Handle the two reload cases.  */
+/* Similar, but just get the address.  Handle the two reload cases.  
+   Add EXTRA_OFFSET to the address we return.  */
 
 rtx
-get_unaligned_address (ref)
+get_unaligned_address (ref, extra_offset)
      rtx ref;
+     int extra_offset;
 {
   rtx base;
   HOST_WIDE_INT offset = 0;
 
-  if (GET_CODE (ref) == SUBREG)
-    {
-      offset = SUBREG_WORD (ref) * UNITS_PER_WORD;
-      if (BYTES_BIG_ENDIAN)
-	offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (ref)))
-		   - MIN (UNITS_PER_WORD,
-			  GET_MODE_SIZE (GET_MODE (SUBREG_REG (ref)))));
-      ref = SUBREG_REG (ref);
-    }
+  if (GET_CODE (ref) != MEM)
+    abort ();
 
-  if (GET_CODE (ref) == REG)
-    ref = reg_equiv_mem[REGNO (ref)];
+  if (reload_in_progress
+      && ! memory_address_p (GET_MODE (ref), XEXP (ref, 0)))
+    {
+      base = find_replacement (&XEXP (ref, 0));
 
-  if (reload_in_progress)
-    base = find_replacement (&XEXP (ref, 0));
+      if (! memory_address_p (GET_MODE (ref), base))
+	abort ();
+    }
   else
-    base = XEXP (ref, 0);
+    {
+      base = XEXP (ref, 0);
+    }
 
   if (GET_CODE (base) == PLUS)
     offset += INTVAL (XEXP (base, 1)), base = XEXP (base, 0);
 
-  return plus_constant (base, offset);
+  return plus_constant (base, offset + extra_offset);
 }
 
 /* Subfunction of the following function.  Update the flags of any MEM
@@ -628,6 +1044,15 @@ alpha_set_memflags_1 (x, in_struct_p, volatile_p, unchanging_p)
       MEM_IN_STRUCT_P (x) = in_struct_p;
       MEM_VOLATILE_P (x) = volatile_p;
       RTX_UNCHANGING_P (x) = unchanging_p;
+      /* Sadly, we cannot use alias sets because the extra aliasing
+	 produced by the AND interferes.  Given that two-byte quantities
+	 are the only thing we would be able to differentiate anyway,
+	 there does not seem to be any point in convoluting the early
+	 out of the alias check.  */
+      /* MEM_ALIAS_SET (x) = alias_set; */
+      break;
+
+    default:
       break;
     }
 }
@@ -643,14 +1068,19 @@ alpha_set_memflags (insn, ref)
      rtx insn;
      rtx ref;
 {
-  /* Note that it is always safe to get these flags, though they won't
-     be what we think if REF is not a MEM.  */
-  int in_struct_p = MEM_IN_STRUCT_P (ref);
-  int volatile_p = MEM_VOLATILE_P (ref);
-  int unchanging_p = RTX_UNCHANGING_P (ref);
+  int in_struct_p, volatile_p, unchanging_p;
 
-  if (GET_CODE (ref) != MEM
-      || (! in_struct_p && ! volatile_p && ! unchanging_p))
+  if (GET_CODE (ref) != MEM)
+    return;
+
+  in_struct_p = MEM_IN_STRUCT_P (ref);
+  volatile_p = MEM_VOLATILE_P (ref);
+  unchanging_p = RTX_UNCHANGING_P (ref);
+
+  /* This is only called from alpha.md, after having had something 
+     generated from one of the insn patterns.  So if everything is
+     zero, the pattern is already up-to-date.  */
+  if (! in_struct_p && ! volatile_p && ! unchanging_p)
     return;
 
   alpha_set_memflags_1 (insn, in_struct_p, volatile_p, unchanging_p);
@@ -669,6 +1099,26 @@ alpha_emit_set_const (target, mode, c, n)
      HOST_WIDE_INT c;
      int n;
 {
+  rtx pat;
+  int i;
+
+  /* Try 1 insn, then 2, then up to N. */
+  for (i = 1; i <= n; i++)
+    if ((pat = alpha_emit_set_const_1 (target, mode, c, i)) != 0)
+      return pat;
+
+  return 0;
+}
+
+/* Internal routine for the above to check for N or below insns.  */
+
+static rtx
+alpha_emit_set_const_1 (target, mode, c, n)
+     rtx target;
+     enum machine_mode mode;
+     HOST_WIDE_INT c;
+     int n;
+{
   HOST_WIDE_INT new = c;
   int i, bits;
   /* Use a pseudo if highly optimizing and still generating RTL.  */
@@ -688,12 +1138,10 @@ alpha_emit_set_const (target, mode, c, n)
 
   /* If this is a sign-extended 32-bit constant, we can do this in at most
      three insns, so do it if we have enough insns left.  We always have
-     a sign-extended 32-bit constant when compiling on a narrow machine. 
-     Note that we cannot handle the constant 0x80000000.  */
+     a sign-extended 32-bit constant when compiling on a narrow machine.   */
 
-  if ((HOST_BITS_PER_WIDE_INT != 64
-       || c >> 31 == -1 || c >> 31 == 0)
-      && c != 0x80000000U)
+  if (HOST_BITS_PER_WIDE_INT != 64
+      || c >> 31 == -1 || c >> 31 == 0)
     {
       HOST_WIDE_INT low = (c & 0xffff) - 2 * (c & 0x8000);
       HOST_WIDE_INT tmp1 = c - low;
@@ -712,13 +1160,19 @@ alpha_emit_set_const (target, mode, c, n)
 	}
 
       if (c == low || (low == 0 && extra == 0))
-	return copy_to_suggested_reg (GEN_INT (c), target, mode);
-      else if (n >= 2 + (extra != 0)
-	       /* We can't do this when SImode if HIGH required adjustment.
-		  This is because the code relies on an implicit overflow
-		  which is invisible to the RTL.  We can thus get incorrect
-		  code if the two ldah instructions are combined.  */
-	       && ! (mode == SImode && extra != 0))
+	{
+	  /* We used to use copy_to_suggested_reg (GEN_INT (c), target, mode)
+	     but that meant that we can't handle INT_MIN on 32-bit machines
+	     (like NT/Alpha), because we recurse indefinitely through 
+	     emit_move_insn to gen_movdi.  So instead, since we know exactly
+	     what we want, create it explicitly.  */
+
+	  if (target == NULL)
+	    target = gen_reg_rtx (mode);
+	  emit_insn (gen_rtx_SET (VOIDmode, target, GEN_INT (c)));
+	  return target;
+	}
+      else if (n >= 2 + (extra != 0))
 	{
 	  temp = copy_to_suggested_reg (GEN_INT (low), subtarget, mode);
 
@@ -784,7 +1238,7 @@ alpha_emit_set_const (target, mode, c, n)
 	for (; bits > 0; bits--)
 	  if ((temp = (alpha_emit_set_const
 		       (subtarget, mode,
-			(unsigned HOST_WIDE_INT) c >> bits, i))) != 0
+			(unsigned HOST_WIDE_INT) (c >> bits), i))) != 0
 	      || ((temp = (alpha_emit_set_const
 			  (subtarget, mode,
 			   ((unsigned HOST_WIDE_INT) c) >> bits, i)))
@@ -795,9 +1249,11 @@ alpha_emit_set_const (target, mode, c, n)
       /* Now try high-order zero bits.  Here we try the shifted-in bits as
 	 all zero and all ones.  Be careful to avoid shifting outside the
 	 mode and to avoid shifting outside the host wide int size.  */
+      /* On narrow hosts, don't shift a 1 into the high bit, since we'll
+	 confuse the recursive call and set all of the high 32 bits.  */
 
       if ((bits = (MIN (HOST_BITS_PER_WIDE_INT, GET_MODE_SIZE (mode) * 8)
-		   - floor_log2 (c) - 1)) > 0)
+		   - floor_log2 (c) - 1 - (HOST_BITS_PER_WIDE_INT < 64))) > 0)
 	for (; bits > 0; bits--)
 	  if ((temp = alpha_emit_set_const (subtarget, mode,
 					    c << bits, i)) != 0
@@ -829,6 +1285,1132 @@ alpha_emit_set_const (target, mode, c, n)
 
   return 0;
 }
+
+/* Having failed to find a 3 insn sequence in alpha_emit_set_const,
+   fall back to a straight forward decomposition.  We do this to avoid
+   exponential run times encountered when looking for longer sequences
+   with alpha_emit_set_const.  */
+
+rtx
+alpha_emit_set_long_const (target, c1, c2)
+     rtx target;
+     HOST_WIDE_INT c1, c2;
+{
+  HOST_WIDE_INT d1, d2, d3, d4;
+
+  /* Decompose the entire word */
+#if HOST_BITS_PER_WIDE_INT >= 64
+  if (c2 != -(c1 < 0))
+    abort ();
+  d1 = ((c1 & 0xffff) ^ 0x8000) - 0x8000;
+  c1 -= d1;
+  d2 = ((c1 & 0xffffffff) ^ 0x80000000) - 0x80000000;
+  c1 = (c1 - d2) >> 32;
+  d3 = ((c1 & 0xffff) ^ 0x8000) - 0x8000;
+  c1 -= d3;
+  d4 = ((c1 & 0xffffffff) ^ 0x80000000) - 0x80000000;
+  if (c1 != d4)
+    abort ();
+#else
+  d1 = ((c1 & 0xffff) ^ 0x8000) - 0x8000;
+  c1 -= d1;
+  d2 = ((c1 & 0xffffffff) ^ 0x80000000) - 0x80000000;
+  if (c1 != d2)
+    abort ();
+  c2 += (d2 < 0);
+  d3 = ((c2 & 0xffff) ^ 0x8000) - 0x8000;
+  c2 -= d3;
+  d4 = ((c2 & 0xffffffff) ^ 0x80000000) - 0x80000000;
+  if (c2 != d4)
+    abort ();
+#endif
+
+  /* Construct the high word */
+  if (d4)
+    {
+      emit_move_insn (target, GEN_INT (d4));
+      if (d3)
+	emit_move_insn (target, gen_rtx_PLUS (DImode, target, GEN_INT (d3)));
+    }
+  else
+    emit_move_insn (target, GEN_INT (d3));
+
+  /* Shift it into place */
+  emit_move_insn (target, gen_rtx_ASHIFT (DImode, target, GEN_INT (32)));
+
+  /* Add in the low bits.  */
+  if (d2)
+    emit_move_insn (target, gen_rtx_PLUS (DImode, target, GEN_INT (d2)));
+  if (d1)
+    emit_move_insn (target, gen_rtx_PLUS (DImode, target, GEN_INT (d1)));
+
+  return target;
+}
+
+/* Generate the comparison for a conditional branch.  */
+
+rtx
+alpha_emit_conditional_branch (code)
+     enum rtx_code code;
+{
+  enum rtx_code cmp_code, branch_code;
+  enum machine_mode cmp_mode, branch_mode = VOIDmode;
+  rtx op0 = alpha_compare_op0, op1 = alpha_compare_op1;
+  rtx tem;
+
+  /* The general case: fold the comparison code to the types of compares
+     that we have, choosing the branch as necessary.  */
+  switch (code)
+    {
+    case EQ:  case LE:  case LT:  case LEU:  case LTU:
+      /* We have these compares: */
+      cmp_code = code, branch_code = NE;
+      break;
+
+    case NE:
+      /* This must be reversed. */
+      cmp_code = EQ, branch_code = EQ;
+      break;
+
+    case GE:  case GT: case GEU:  case GTU:
+      /* For FP, we swap them, for INT, we reverse them.  */
+      if (alpha_compare_fp_p)
+	{
+	  cmp_code = swap_condition (code);
+	  branch_code = NE;
+	  tem = op0, op0 = op1, op1 = tem;
+	}
+      else
+	{
+	  cmp_code = reverse_condition (code);
+	  branch_code = EQ;
+	}
+      break;
+
+    default:
+      abort ();
+    }
+
+  if (alpha_compare_fp_p)
+    {
+      cmp_mode = DFmode;
+      if (flag_fast_math)
+	{
+	  /* When we are not as concerned about non-finite values, and we
+	     are comparing against zero, we can branch directly.  */
+	  if (op1 == CONST0_RTX (DFmode))
+	    cmp_code = NIL, branch_code = code;
+	  else if (op0 == CONST0_RTX (DFmode))
+	    {
+	      /* Undo the swap we probably did just above.  */
+	      tem = op0, op0 = op1, op1 = tem;
+	      branch_code = swap_condition (cmp_code);
+	      cmp_code = NIL;
+	    }
+	}
+      else
+	{
+	  /* ??? We mark the the branch mode to be CCmode to prevent the
+	     compare and branch from being combined, since the compare 
+	     insn follows IEEE rules that the branch does not.  */
+	  branch_mode = CCmode;
+	}
+    }
+  else
+    {
+      cmp_mode = DImode;
+
+      /* The following optimizations are only for signed compares.  */
+      if (code != LEU && code != LTU && code != GEU && code != GTU)
+	{
+	  /* Whee.  Compare and branch against 0 directly.  */
+	  if (op1 == const0_rtx)
+	    cmp_code = NIL, branch_code = code;
+
+	  /* We want to use cmpcc/bcc when we can, since there is a zero delay
+	     bypass between logicals and br/cmov on EV5.  But we don't want to
+	     force valid immediate constants into registers needlessly.  */
+	  else if (GET_CODE (op1) == CONST_INT)
+	    {
+	      HOST_WIDE_INT v = INTVAL (op1), n = -v;
+
+	      if (! CONST_OK_FOR_LETTER_P (v, 'I')
+		  && (CONST_OK_FOR_LETTER_P (n, 'K')
+		      || CONST_OK_FOR_LETTER_P (n, 'L')))
+		{
+		  cmp_code = PLUS, branch_code = code;
+		  op1 = GEN_INT (n);
+		}
+	    }
+	}
+    }
+
+  /* Force op0 into a register.  */
+  if (GET_CODE (op0) != REG)
+    op0 = force_reg (cmp_mode, op0);
+
+  /* Emit an initial compare instruction, if necessary.  */
+  tem = op0;
+  if (cmp_code != NIL)
+    {
+      tem = gen_reg_rtx (cmp_mode);
+      emit_move_insn (tem, gen_rtx_fmt_ee (cmp_code, cmp_mode, op0, op1));
+    }
+
+  /* Return the branch comparison.  */
+  return gen_rtx_fmt_ee (branch_code, branch_mode, tem, CONST0_RTX (cmp_mode));
+}
+
+
+/* Rewrite a comparison against zero CMP of the form
+   (CODE (cc0) (const_int 0)) so it can be written validly in
+   a conditional move (if_then_else CMP ...).
+   If both of the operands that set cc0 are non-zero we must emit
+   an insn to perform the compare (it can't be done within
+   the conditional move). */
+rtx
+alpha_emit_conditional_move (cmp, mode)
+     rtx cmp;
+     enum machine_mode mode;
+{
+  enum rtx_code code = GET_CODE (cmp);
+  enum rtx_code cmov_code = NE;
+  rtx op0 = alpha_compare_op0;
+  rtx op1 = alpha_compare_op1;
+  enum machine_mode cmp_mode
+    = (GET_MODE (op0) == VOIDmode ? DImode : GET_MODE (op0));
+  enum machine_mode cmp_op_mode = alpha_compare_fp_p ? DFmode : DImode;
+  enum machine_mode cmov_mode = VOIDmode;
+  rtx tem;
+
+  if (alpha_compare_fp_p != FLOAT_MODE_P (mode))
+    return 0;
+
+  /* We may be able to use a conditional move directly.
+     This avoids emitting spurious compares. */
+  if (signed_comparison_operator (cmp, cmp_op_mode)
+      && (!alpha_compare_fp_p || flag_fast_math)
+      && (op0 == CONST0_RTX (cmp_mode) || op1 == CONST0_RTX (cmp_mode)))
+    return gen_rtx_fmt_ee (code, VOIDmode, op0, op1);
+
+  /* We can't put the comparison insides a conditional move;
+     emit a compare instruction and put that inside the
+     conditional move.  Make sure we emit only comparisons we have;
+     swap or reverse as necessary.  */
+
+  switch (code)
+    {
+    case EQ:  case LE:  case LT:  case LEU:  case LTU:
+      /* We have these compares: */
+      break;
+
+    case NE:
+      /* This must be reversed. */
+      code = reverse_condition (code);
+      cmov_code = EQ;
+      break;
+
+    case GE:  case GT:  case GEU:  case GTU:
+      /* These must be swapped.  Make sure the new first operand is in
+	 a register.  */
+      code = swap_condition (code);
+      tem = op0, op0 = op1, op1 = tem;
+      op0 = force_reg (cmp_mode, op0);
+      break;
+
+    default:
+      abort ();
+    }
+
+  /* ??? We mark the branch mode to be CCmode to prevent the compare
+     and cmov from being combined, since the compare insn follows IEEE
+     rules that the cmov does not.  */
+  if (alpha_compare_fp_p && !flag_fast_math)
+    cmov_mode = CCmode;
+
+  tem = gen_reg_rtx (cmp_op_mode);
+  emit_move_insn (tem, gen_rtx_fmt_ee (code, cmp_op_mode, op0, op1));
+  return gen_rtx_fmt_ee (cmov_code, cmov_mode, tem, CONST0_RTX (cmp_op_mode));
+}
+
+/* Use ext[wlq][lh] as the Architecture Handbook describes for extracting
+   unaligned data:
+
+           unsigned:                       signed:
+   word:   ldq_u  r1,X(r11)                ldq_u  r1,X(r11)
+           ldq_u  r2,X+1(r11)              ldq_u  r2,X+1(r11)
+           lda    r3,X(r11)                lda    r3,X+2(r11)
+           extwl  r1,r3,r1                 extql  r1,r3,r1
+           extwh  r2,r3,r2                 extqh  r2,r3,r2
+           or     r1.r2.r1                 or     r1,r2,r1
+                                           sra    r1,48,r1
+
+   long:   ldq_u  r1,X(r11)                ldq_u  r1,X(r11)
+           ldq_u  r2,X+3(r11)              ldq_u  r2,X+3(r11)
+           lda    r3,X(r11)                lda    r3,X(r11)
+           extll  r1,r3,r1                 extll  r1,r3,r1
+           extlh  r2,r3,r2                 extlh  r2,r3,r2
+           or     r1.r2.r1                 addl   r1,r2,r1
+
+   quad:   ldq_u  r1,X(r11)
+           ldq_u  r2,X+7(r11)
+           lda    r3,X(r11)
+           extql  r1,r3,r1
+           extqh  r2,r3,r2
+           or     r1.r2.r1
+*/
+
+void
+alpha_expand_unaligned_load (tgt, mem, size, ofs, sign)
+     rtx tgt, mem;
+     HOST_WIDE_INT size, ofs;
+     int sign;
+{
+  rtx meml, memh, addr, extl, exth;
+  enum machine_mode mode;
+
+  meml = gen_reg_rtx (DImode);
+  memh = gen_reg_rtx (DImode);
+  addr = gen_reg_rtx (DImode);
+  extl = gen_reg_rtx (DImode);
+  exth = gen_reg_rtx (DImode);
+
+  emit_move_insn (meml,
+		  change_address (mem, DImode,
+				  gen_rtx_AND (DImode, 
+					       plus_constant (XEXP (mem, 0),
+							      ofs),
+					       GEN_INT (-8))));
+
+  emit_move_insn (memh,
+		  change_address (mem, DImode,
+				  gen_rtx_AND (DImode, 
+					       plus_constant (XEXP (mem, 0),
+							      ofs + size - 1),
+					       GEN_INT (-8))));
+
+  if (sign && size == 2)
+    {
+      emit_move_insn (addr, plus_constant (XEXP (mem, 0), ofs+2));
+
+      emit_insn (gen_extxl (extl, meml, GEN_INT (64), addr));
+      emit_insn (gen_extqh (exth, memh, addr));
+
+      /* We must use tgt here for the target.  Alpha-vms port fails if we use
+	 addr for the target, because addr is marked as a pointer and combine
+	 knows that pointers are always sign-extended 32 bit values.  */
+      addr = expand_binop (DImode, ior_optab, extl, exth, tgt, 1, OPTAB_WIDEN);
+      addr = expand_binop (DImode, ashr_optab, addr, GEN_INT (48), 
+			   addr, 1, OPTAB_WIDEN);
+    }
+  else
+    {
+      emit_move_insn (addr, plus_constant (XEXP (mem, 0), ofs));
+      emit_insn (gen_extxl (extl, meml, GEN_INT (size*8), addr));
+      switch (size)
+	{
+	case 2:
+	  emit_insn (gen_extwh (exth, memh, addr));
+	  mode = HImode;
+	  break;
+
+	case 4:
+	  emit_insn (gen_extlh (exth, memh, addr));
+	  mode = SImode;
+	  break;
+
+	case 8:
+	  emit_insn (gen_extqh (exth, memh, addr));
+	  mode = DImode;
+	  break;
+	default:
+	  abort();
+	}
+
+      addr = expand_binop (mode, ior_optab, gen_lowpart (mode, extl),
+			   gen_lowpart (mode, exth), gen_lowpart (mode, tgt),
+			   sign, OPTAB_WIDEN);
+    }
+
+  if (addr != tgt)
+    emit_move_insn (tgt, gen_lowpart(GET_MODE (tgt), addr));
+}
+
+/* Similarly, use ins and msk instructions to perform unaligned stores.  */
+
+void
+alpha_expand_unaligned_store (dst, src, size, ofs)
+     rtx dst, src;
+     HOST_WIDE_INT size, ofs;
+{
+  rtx dstl, dsth, addr, insl, insh, meml, memh;
+  
+  dstl = gen_reg_rtx (DImode);
+  dsth = gen_reg_rtx (DImode);
+  insl = gen_reg_rtx (DImode);
+  insh = gen_reg_rtx (DImode);
+
+  meml = change_address (dst, DImode,
+			 gen_rtx_AND (DImode, 
+				      plus_constant (XEXP (dst, 0), ofs),
+				      GEN_INT (-8)));
+  memh = change_address (dst, DImode,
+			 gen_rtx_AND (DImode, 
+				      plus_constant (XEXP (dst, 0),
+						     ofs+size-1),
+				      GEN_INT (-8)));
+
+  emit_move_insn (dsth, memh);
+  emit_move_insn (dstl, meml);
+  addr = copy_addr_to_reg (plus_constant (XEXP (dst, 0), ofs));
+
+  if (src != const0_rtx)
+    {
+      emit_insn (gen_insxh (insh, gen_lowpart (DImode, src),
+			    GEN_INT (size*8), addr));
+
+      switch (size)
+	{
+	case 2:
+	  emit_insn (gen_inswl (insl, gen_lowpart (HImode, src), addr));
+	  break;
+	case 4:
+	  emit_insn (gen_insll (insl, gen_lowpart (SImode, src), addr));
+	  break;
+	case 8:
+	  emit_insn (gen_insql (insl, src, addr));
+	  break;
+	}
+    }
+
+  emit_insn (gen_mskxh (dsth, dsth, GEN_INT (size*8), addr));
+
+  switch (size)
+    {
+    case 2:
+      emit_insn (gen_mskxl (dstl, dstl, GEN_INT (0xffff), addr));
+      break;
+    case 4:
+      emit_insn (gen_mskxl (dstl, dstl, GEN_INT (0xffffffff), addr));
+      break;
+    case 8:
+      {
+#if HOST_BITS_PER_WIDE_INT == 32
+	rtx msk = immed_double_const (0xffffffff, 0xffffffff, DImode);
+#else
+	rtx msk = immed_double_const (0xffffffffffffffff, 0, DImode);
+#endif
+	emit_insn (gen_mskxl (dstl, dstl, msk, addr));
+      }
+      break;
+    }
+
+  if (src != const0_rtx)
+    {
+      dsth = expand_binop (DImode, ior_optab, insh, dsth, dsth, 0, OPTAB_WIDEN);
+      dstl = expand_binop (DImode, ior_optab, insl, dstl, dstl, 0, OPTAB_WIDEN);
+    }
+  
+  /* Must store high before low for degenerate case of aligned.  */
+  emit_move_insn (memh, dsth);
+  emit_move_insn (meml, dstl);
+}
+
+/* The block move code tries to maximize speed by separating loads and
+   stores at the expense of register pressure: we load all of the data
+   before we store it back out.  There are two secondary effects worth
+   mentioning, that this speeds copying to/from aligned and unaligned
+   buffers, and that it makes the code significantly easier to write.  */
+
+#define MAX_MOVE_WORDS	8
+
+/* Load an integral number of consecutive unaligned quadwords.  */
+
+static void
+alpha_expand_unaligned_load_words (out_regs, smem, words, ofs)
+     rtx *out_regs;
+     rtx smem;
+     HOST_WIDE_INT words, ofs;
+{
+  rtx const im8 = GEN_INT (-8);
+  rtx const i64 = GEN_INT (64);
+  rtx ext_tmps[MAX_MOVE_WORDS], data_regs[MAX_MOVE_WORDS+1];
+  rtx sreg, areg;
+  HOST_WIDE_INT i;
+
+  /* Generate all the tmp registers we need.  */
+  for (i = 0; i < words; ++i)
+    {
+      data_regs[i] = out_regs[i];
+      ext_tmps[i] = gen_reg_rtx (DImode);
+    }
+  data_regs[words] = gen_reg_rtx (DImode);
+
+  if (ofs != 0)
+    smem = change_address (smem, GET_MODE (smem),
+			   plus_constant (XEXP (smem, 0), ofs));
+  
+  /* Load up all of the source data.  */
+  for (i = 0; i < words; ++i)
+    {
+      emit_move_insn (data_regs[i],
+		      change_address (smem, DImode,
+				      gen_rtx_AND (DImode,
+						   plus_constant (XEXP(smem,0),
+								  8*i),
+						   im8)));
+    }
+  emit_move_insn (data_regs[words],
+		  change_address (smem, DImode,
+				  gen_rtx_AND (DImode,
+					       plus_constant (XEXP(smem,0),
+							      8*words - 1),
+					       im8)));
+
+  /* Extract the half-word fragments.  Unfortunately DEC decided to make
+     extxh with offset zero a noop instead of zeroing the register, so 
+     we must take care of that edge condition ourselves with cmov.  */
+
+  sreg = copy_addr_to_reg (XEXP (smem, 0));
+  areg = expand_binop (DImode, and_optab, sreg, GEN_INT (7), NULL, 
+		       1, OPTAB_WIDEN);
+  for (i = 0; i < words; ++i)
+    {
+      emit_insn (gen_extxl (data_regs[i], data_regs[i], i64, sreg));
+
+      emit_insn (gen_extqh (ext_tmps[i], data_regs[i+1], sreg));
+      emit_insn (gen_rtx_SET (VOIDmode, ext_tmps[i],
+			      gen_rtx_IF_THEN_ELSE (DImode,
+						    gen_rtx_EQ (DImode, areg,
+								const0_rtx),
+						    const0_rtx, ext_tmps[i])));
+    }
+
+  /* Merge the half-words into whole words.  */
+  for (i = 0; i < words; ++i)
+    {
+      out_regs[i] = expand_binop (DImode, ior_optab, data_regs[i],
+				  ext_tmps[i], data_regs[i], 1, OPTAB_WIDEN);
+    }
+}
+
+/* Store an integral number of consecutive unaligned quadwords.  DATA_REGS
+   may be NULL to store zeros.  */
+
+static void
+alpha_expand_unaligned_store_words (data_regs, dmem, words, ofs)
+     rtx *data_regs;
+     rtx dmem;
+     HOST_WIDE_INT words, ofs;
+{
+  rtx const im8 = GEN_INT (-8);
+  rtx const i64 = GEN_INT (64);
+#if HOST_BITS_PER_WIDE_INT == 32
+  rtx const im1 = immed_double_const (0xffffffff, 0xffffffff, DImode);
+#else
+  rtx const im1 = immed_double_const (0xffffffffffffffff, 0, DImode);
+#endif
+  rtx ins_tmps[MAX_MOVE_WORDS];
+  rtx st_tmp_1, st_tmp_2, dreg;
+  rtx st_addr_1, st_addr_2;
+  HOST_WIDE_INT i;
+
+  /* Generate all the tmp registers we need.  */
+  if (data_regs != NULL)
+    for (i = 0; i < words; ++i)
+      ins_tmps[i] = gen_reg_rtx(DImode);
+  st_tmp_1 = gen_reg_rtx(DImode);
+  st_tmp_2 = gen_reg_rtx(DImode);
+  
+  if (ofs != 0)
+    dmem = change_address (dmem, GET_MODE (dmem),
+			   plus_constant (XEXP (dmem, 0), ofs));
+  
+
+  st_addr_2 = change_address (dmem, DImode,
+			      gen_rtx_AND (DImode,
+					   plus_constant (XEXP(dmem,0),
+							  words*8 - 1),
+				       im8));
+  st_addr_1 = change_address (dmem, DImode,
+			      gen_rtx_AND (DImode, 
+					   XEXP (dmem, 0),
+					   im8));
+
+  /* Load up the destination end bits.  */
+  emit_move_insn (st_tmp_2, st_addr_2);
+  emit_move_insn (st_tmp_1, st_addr_1);
+
+  /* Shift the input data into place.  */
+  dreg = copy_addr_to_reg (XEXP (dmem, 0));
+  if (data_regs != NULL)
+    {
+      for (i = words-1; i >= 0; --i)
+	{
+	  emit_insn (gen_insxh (ins_tmps[i], data_regs[i], i64, dreg));
+	  emit_insn (gen_insql (data_regs[i], data_regs[i], dreg));
+	}
+      for (i = words-1; i > 0; --i)
+	{
+	  ins_tmps[i-1] = expand_binop (DImode, ior_optab, data_regs[i],
+					ins_tmps[i-1], ins_tmps[i-1], 1,
+					OPTAB_WIDEN);
+	}
+    }
+
+  /* Split and merge the ends with the destination data.  */
+  emit_insn (gen_mskxh (st_tmp_2, st_tmp_2, i64, dreg));
+  emit_insn (gen_mskxl (st_tmp_1, st_tmp_1, im1, dreg));
+
+  if (data_regs != NULL)
+    {
+      st_tmp_2 = expand_binop (DImode, ior_optab, st_tmp_2, ins_tmps[words-1],
+			       st_tmp_2, 1, OPTAB_WIDEN);
+      st_tmp_1 = expand_binop (DImode, ior_optab, st_tmp_1, data_regs[0],
+			       st_tmp_1, 1, OPTAB_WIDEN);
+    }
+
+  /* Store it all.  */
+  emit_move_insn (st_addr_2, st_tmp_2);
+  for (i = words-1; i > 0; --i)
+    {
+      emit_move_insn (change_address (dmem, DImode,
+				      gen_rtx_AND (DImode,
+						   plus_constant(XEXP (dmem,0),
+								 i*8),
+					       im8)),
+		      data_regs ? ins_tmps[i-1] : const0_rtx);
+    }
+  emit_move_insn (st_addr_1, st_tmp_1);
+}
+
+
+/* Expand string/block move operations.
+
+   operands[0] is the pointer to the destination.
+   operands[1] is the pointer to the source.
+   operands[2] is the number of bytes to move.
+   operands[3] is the alignment.  */
+
+int
+alpha_expand_block_move (operands)
+     rtx operands[];
+{
+  rtx bytes_rtx	= operands[2];
+  rtx align_rtx = operands[3];
+  HOST_WIDE_INT orig_bytes = INTVAL (bytes_rtx);
+  HOST_WIDE_INT bytes = orig_bytes;
+  HOST_WIDE_INT src_align = INTVAL (align_rtx);
+  HOST_WIDE_INT dst_align = src_align;
+  rtx orig_src	= operands[1];
+  rtx orig_dst	= operands[0];
+  rtx data_regs[2*MAX_MOVE_WORDS+16];
+  rtx tmp;
+  int i, words, ofs, nregs = 0;
+  
+  if (bytes <= 0)
+    return 1;
+  if (bytes > MAX_MOVE_WORDS*8)
+    return 0;
+
+  /* Look for additional alignment information from recorded register info.  */
+
+  tmp = XEXP (orig_src, 0);
+  if (GET_CODE (tmp) == REG)
+    {
+      if (REGNO_POINTER_ALIGN (REGNO (tmp)) > src_align)
+	src_align = REGNO_POINTER_ALIGN (REGNO (tmp));
+    }
+  else if (GET_CODE (tmp) == PLUS
+	   && GET_CODE (XEXP (tmp, 0)) == REG
+	   && GET_CODE (XEXP (tmp, 1)) == CONST_INT)
+    {
+      HOST_WIDE_INT c = INTVAL (XEXP (tmp, 1));
+      int a = REGNO_POINTER_ALIGN (REGNO (XEXP (tmp, 0)));
+
+      if (a > src_align)
+	{
+          if (a >= 8 && c % 8 == 0)
+	    src_align = 8;
+          else if (a >= 4 && c % 4 == 0)
+	    src_align = 4;
+          else if (a >= 2 && c % 2 == 0)
+	    src_align = 2;
+	}
+    }
+	
+  tmp = XEXP (orig_dst, 0);
+  if (GET_CODE (tmp) == REG)
+    {
+      if (REGNO_POINTER_ALIGN (REGNO (tmp)) > dst_align)
+	dst_align = REGNO_POINTER_ALIGN (REGNO (tmp));
+    }
+  else if (GET_CODE (tmp) == PLUS
+	   && GET_CODE (XEXP (tmp, 0)) == REG
+	   && GET_CODE (XEXP (tmp, 1)) == CONST_INT)
+    {
+      HOST_WIDE_INT c = INTVAL (XEXP (tmp, 1));
+      int a = REGNO_POINTER_ALIGN (REGNO (XEXP (tmp, 0)));
+
+      if (a > dst_align)
+	{
+          if (a >= 8 && c % 8 == 0)
+	    dst_align = 8;
+          else if (a >= 4 && c % 4 == 0)
+	    dst_align = 4;
+          else if (a >= 2 && c % 2 == 0)
+	    dst_align = 2;
+	}
+    }
+
+  /*
+   * Load the entire block into registers.
+   */
+
+  if (GET_CODE (XEXP (orig_src, 0)) == ADDRESSOF)
+    {
+      enum machine_mode mode;
+      tmp = XEXP (XEXP (orig_src, 0), 0);
+
+      /* Don't use the existing register if we're reading more than
+	 is held in the register.  Nor if there is not a mode that
+	 handles the exact size.  */
+      mode = mode_for_size (bytes * BITS_PER_UNIT, MODE_INT, 1);
+      if (mode != BLKmode
+	  && GET_MODE_SIZE (GET_MODE (tmp)) >= bytes)
+	{
+	  if (mode == TImode)
+	    {
+	      data_regs[nregs] = gen_lowpart (DImode, tmp);
+	      data_regs[nregs+1] = gen_highpart (DImode, tmp);
+	      nregs += 2;
+	    }
+	  else
+	    data_regs[nregs++] = gen_lowpart (mode, tmp);
+	  goto src_done;
+	}
+
+      /* No appropriate mode; fall back on memory.  */
+      orig_src = change_address (orig_src, GET_MODE (orig_src),
+				 copy_addr_to_reg (XEXP (orig_src, 0)));
+    }
+
+  ofs = 0;
+  if (src_align >= 8 && bytes >= 8)
+    {
+      words = bytes / 8;
+
+      for (i = 0; i < words; ++i)
+	data_regs[nregs+i] = gen_reg_rtx(DImode);
+
+      for (i = 0; i < words; ++i)
+	{
+	  emit_move_insn (data_regs[nregs+i],
+			  change_address (orig_src, DImode,
+					  plus_constant (XEXP (orig_src, 0),
+							 ofs + i*8)));
+	}
+
+      nregs += words;
+      bytes -= words * 8;
+      ofs += words * 8;
+    }
+  if (src_align >= 4 && bytes >= 4)
+    {
+      words = bytes / 4;
+
+      for (i = 0; i < words; ++i)
+	data_regs[nregs+i] = gen_reg_rtx(SImode);
+
+      for (i = 0; i < words; ++i)
+	{
+	  emit_move_insn (data_regs[nregs+i],
+			  change_address (orig_src, SImode,
+					  plus_constant (XEXP (orig_src, 0),
+							 ofs + i*4)));
+	}
+
+      nregs += words;
+      bytes -= words * 4;
+      ofs += words * 4;
+    }
+  if (bytes >= 16)
+    {
+      words = bytes / 8;
+
+      for (i = 0; i < words+1; ++i)
+	data_regs[nregs+i] = gen_reg_rtx(DImode);
+
+      alpha_expand_unaligned_load_words (data_regs + nregs, orig_src,
+					 words, ofs);
+
+      nregs += words;
+      bytes -= words * 8;
+      ofs += words * 8;
+    }
+  if (!TARGET_BWX && bytes >= 8)
+    {
+      data_regs[nregs++] = tmp = gen_reg_rtx (DImode);
+      alpha_expand_unaligned_load (tmp, orig_src, 8, ofs, 0);
+      bytes -= 8;
+      ofs += 8;
+    }
+  if (!TARGET_BWX && bytes >= 4)
+    {
+      data_regs[nregs++] = tmp = gen_reg_rtx (SImode);
+      alpha_expand_unaligned_load (tmp, orig_src, 4, ofs, 0);
+      bytes -= 4;
+      ofs += 4;
+    }
+  if (bytes >= 2)
+    {
+      if (src_align >= 2)
+	{
+	  do {
+	    data_regs[nregs++] = tmp = gen_reg_rtx (HImode);
+	    emit_move_insn (tmp,
+			    change_address (orig_src, HImode,
+					    plus_constant (XEXP (orig_src, 0),
+							   ofs)));
+	    bytes -= 2;
+	    ofs += 2;
+	  } while (bytes >= 2);
+	}
+      else if (!TARGET_BWX)
+	{
+	  data_regs[nregs++] = tmp = gen_reg_rtx (HImode);
+	  alpha_expand_unaligned_load (tmp, orig_src, 2, ofs, 0);
+	  bytes -= 2;
+	  ofs += 2;
+	}
+    }
+  while (bytes > 0)
+    {
+      data_regs[nregs++] = tmp = gen_reg_rtx (QImode);
+      emit_move_insn (tmp,
+		      change_address (orig_src, QImode,
+				      plus_constant (XEXP (orig_src, 0),
+						     ofs)));
+      bytes -= 1;
+      ofs += 1;
+    }
+ src_done:
+
+  if (nregs > (int)(sizeof(data_regs)/sizeof(*data_regs)))
+    abort();
+
+  /*
+   * Now save it back out again.
+   */
+
+  i = 0, ofs = 0;
+
+  if (GET_CODE (XEXP (orig_dst, 0)) == ADDRESSOF)
+    {
+      enum machine_mode mode;
+      tmp = XEXP (XEXP (orig_dst, 0), 0);
+
+      mode = mode_for_size (orig_bytes * BITS_PER_UNIT, MODE_INT, 1);
+      if (GET_MODE (tmp) == mode)
+	{
+	  if (nregs == 1)
+	    {
+	      emit_move_insn (tmp, data_regs[0]);
+	      i = 1;
+	      goto dst_done;
+	    }
+	  else if (nregs == 2 && mode == TImode)
+	    {
+	      /* Undo the subregging done above when copying between
+		 two TImode registers.  */
+	      if (GET_CODE (data_regs[0]) == SUBREG
+		  && GET_MODE (SUBREG_REG (data_regs[0])) == TImode)
+		{
+		  emit_move_insn (tmp, SUBREG_REG (data_regs[0]));
+		}
+	      else
+		{
+		  rtx seq;
+
+		  start_sequence ();
+		  emit_move_insn (gen_lowpart (DImode, tmp), data_regs[0]);
+		  emit_move_insn (gen_highpart (DImode, tmp), data_regs[1]);
+		  seq = get_insns ();
+		  end_sequence ();
+
+		  emit_no_conflict_block (seq, tmp, data_regs[0],
+					  data_regs[1], NULL_RTX);
+		}
+
+	      i = 2;
+	      goto dst_done;
+	    }
+	}
+
+      /* ??? If nregs > 1, consider reconstructing the word in regs.  */
+      /* ??? Optimize mode < dst_mode with strict_low_part.  */
+
+      /* No appropriate mode; fall back on memory.  We can speed things
+	 up by recognizing extra alignment information.  */
+      orig_dst = change_address (orig_dst, GET_MODE (orig_dst),
+				 copy_addr_to_reg (XEXP (orig_dst, 0)));
+      dst_align = GET_MODE_SIZE (GET_MODE (tmp));
+    }
+
+  /* Write out the data in whatever chunks reading the source allowed.  */
+  if (dst_align >= 8)
+    {
+      while (i < nregs && GET_MODE (data_regs[i]) == DImode)
+	{
+	  emit_move_insn (change_address (orig_dst, DImode,
+					  plus_constant (XEXP (orig_dst, 0),
+							 ofs)),
+			  data_regs[i]);
+	  ofs += 8;
+	  i++;
+	}
+    }
+  if (dst_align >= 4)
+    {
+      /* If the source has remaining DImode regs, write them out in
+	 two pieces.  */
+      while (i < nregs && GET_MODE (data_regs[i]) == DImode)
+	{
+	  tmp = expand_binop (DImode, lshr_optab, data_regs[i], GEN_INT (32),
+			      NULL_RTX, 1, OPTAB_WIDEN);
+
+	  emit_move_insn (change_address (orig_dst, SImode,
+					  plus_constant (XEXP (orig_dst, 0),
+							 ofs)),
+			  gen_lowpart (SImode, data_regs[i]));
+	  emit_move_insn (change_address (orig_dst, SImode,
+					  plus_constant (XEXP (orig_dst, 0),
+							 ofs+4)),
+			  gen_lowpart (SImode, tmp));
+	  ofs += 8;
+	  i++;
+	}
+
+      while (i < nregs && GET_MODE (data_regs[i]) == SImode)
+	{
+	  emit_move_insn (change_address(orig_dst, SImode,
+					 plus_constant (XEXP (orig_dst, 0),
+							ofs)),
+			  data_regs[i]);
+	  ofs += 4;
+	  i++;
+	}
+    }
+  if (i < nregs && GET_MODE (data_regs[i]) == DImode)
+    {
+      /* Write out a remaining block of words using unaligned methods.  */
+
+      for (words = 1; i+words < nregs ; ++words)
+	if (GET_MODE (data_regs[i+words]) != DImode)
+	  break;
+
+      if (words == 1)
+	alpha_expand_unaligned_store (orig_dst, data_regs[i], 8, ofs);
+      else
+        alpha_expand_unaligned_store_words (data_regs+i, orig_dst, words, ofs);
+     
+      i += words;
+      ofs += words * 8;
+    }
+
+  /* Due to the above, this won't be aligned.  */
+  /* ??? If we have more than one of these, consider constructing full
+     words in registers and using alpha_expand_unaligned_store_words.  */
+  while (i < nregs && GET_MODE (data_regs[i]) == SImode)
+    {
+      alpha_expand_unaligned_store (orig_dst, data_regs[i], 4, ofs);
+      ofs += 4;
+      i++;
+    }
+
+  if (dst_align >= 2)
+    while (i < nregs && GET_MODE (data_regs[i]) == HImode)
+      {
+	emit_move_insn (change_address (orig_dst, HImode,
+					plus_constant (XEXP (orig_dst, 0),
+						       ofs)),
+			data_regs[i]);
+	i++;
+	ofs += 2;
+      }
+  else
+    while (i < nregs && GET_MODE (data_regs[i]) == HImode)
+      {
+	alpha_expand_unaligned_store (orig_dst, data_regs[i], 2, ofs);
+	i++;
+	ofs += 2;
+      }
+  while (i < nregs && GET_MODE (data_regs[i]) == QImode)
+    {
+      emit_move_insn (change_address (orig_dst, QImode,
+				      plus_constant (XEXP (orig_dst, 0),
+						     ofs)),
+		      data_regs[i]);
+      i++;
+      ofs += 1;
+    }
+ dst_done:
+
+  if (i != nregs)
+    abort();
+
+  return 1;
+}
+
+int
+alpha_expand_block_clear (operands)
+     rtx operands[];
+{
+  rtx bytes_rtx	= operands[1];
+  rtx align_rtx = operands[2];
+  HOST_WIDE_INT bytes = INTVAL (bytes_rtx);
+  HOST_WIDE_INT align = INTVAL (align_rtx);
+  rtx orig_dst	= operands[0];
+  rtx tmp;
+  HOST_WIDE_INT i, words, ofs = 0;
+  
+  if (bytes <= 0)
+    return 1;
+  if (bytes > MAX_MOVE_WORDS*8)
+    return 0;
+
+  /* Look for stricter alignment.  */
+
+  tmp = XEXP (orig_dst, 0);
+  if (GET_CODE (tmp) == REG)
+    {
+      if (REGNO_POINTER_ALIGN (REGNO (tmp)) > align)
+	align = REGNO_POINTER_ALIGN (REGNO (tmp));
+    }
+  else if (GET_CODE (tmp) == PLUS
+	   && GET_CODE (XEXP (tmp, 0)) == REG
+	   && GET_CODE (XEXP (tmp, 1)) == CONST_INT)
+    {
+      HOST_WIDE_INT c = INTVAL (XEXP (tmp, 1));
+      int a = REGNO_POINTER_ALIGN (REGNO (XEXP (tmp, 0)));
+
+      if (a > align)
+	{
+          if (a >= 8 && c % 8 == 0)
+	    align = 8;
+          else if (a >= 4 && c % 4 == 0)
+	    align = 4;
+          else if (a >= 2 && c % 2 == 0)
+	    align = 2;
+	}
+    }
+  else if (GET_CODE (tmp) == ADDRESSOF)
+    {
+      enum machine_mode mode;
+
+      mode = mode_for_size (bytes * BITS_PER_UNIT, MODE_INT, 1);
+      if (GET_MODE (XEXP (tmp, 0)) == mode)
+	{
+	  emit_move_insn (XEXP (tmp, 0), const0_rtx);
+	  return 1;
+	}
+
+      /* No appropriate mode; fall back on memory.  */
+      orig_dst = change_address (orig_dst, GET_MODE (orig_dst),
+				 copy_addr_to_reg (tmp));
+      align = GET_MODE_SIZE (GET_MODE (XEXP (tmp, 0)));
+    }
+
+  /* Handle a block of contiguous words first.  */
+
+  if (align >= 8 && bytes >= 8)
+    {
+      words = bytes / 8;
+
+      for (i = 0; i < words; ++i)
+	{
+	  emit_move_insn (change_address(orig_dst, DImode,
+					 plus_constant (XEXP (orig_dst, 0),
+							ofs + i*8)),
+			  const0_rtx);
+	}
+
+      bytes -= words * 8;
+      ofs += words * 8;
+    }
+  if (align >= 4 && bytes >= 4)
+    {
+      words = bytes / 4;
+
+      for (i = 0; i < words; ++i)
+	{
+	  emit_move_insn (change_address (orig_dst, SImode,
+					  plus_constant (XEXP (orig_dst, 0),
+							 ofs + i*4)),
+			  const0_rtx);
+	}
+
+      bytes -= words * 4;
+      ofs += words * 4;
+    }
+  if (bytes >= 16)
+    {
+      words = bytes / 8;
+
+      alpha_expand_unaligned_store_words (NULL, orig_dst, words, ofs);
+
+      bytes -= words * 8;
+      ofs += words * 8;
+    }
+
+  /* Next clean up any trailing pieces.  We know from the contiguous
+     block move that there are no aligned SImode or DImode hunks left.  */
+
+  if (!TARGET_BWX && bytes >= 8)
+    {
+      alpha_expand_unaligned_store (orig_dst, const0_rtx, 8, ofs);
+      bytes -= 8;
+      ofs += 8;
+    }
+  if (!TARGET_BWX && bytes >= 4)
+    {
+      alpha_expand_unaligned_store (orig_dst, const0_rtx, 4, ofs);
+      bytes -= 4;
+      ofs += 4;
+    }
+  if (bytes >= 2)
+    {
+      if (align >= 2)
+	{
+	  do {
+	    emit_move_insn (change_address (orig_dst, HImode,
+					    plus_constant (XEXP (orig_dst, 0),
+							   ofs)),
+			    const0_rtx);
+	    bytes -= 2;
+	    ofs += 2;
+	  } while (bytes >= 2);
+	}
+      else if (!TARGET_BWX)
+	{
+	  alpha_expand_unaligned_store (orig_dst, const0_rtx, 2, ofs);
+	  bytes -= 2;
+	  ofs += 2;
+	}
+    }
+  while (bytes > 0)
+    {
+      emit_move_insn (change_address (orig_dst, QImode,
+				      plus_constant (XEXP (orig_dst, 0),
+						     ofs)),
+		      const0_rtx);
+      bytes -= 1;
+      ofs += 1;
+    }
+
+  return 1;
+}
+
 
 /* Adjust the cost of a scheduling dependency.  Return the new cost of
    a dependency LINK or INSN on DEP_INSN.  COST is the current cost.  */
@@ -840,7 +2422,8 @@ alpha_adjust_cost (insn, link, dep_insn, cost)
      rtx dep_insn;
      int cost;
 {
-  rtx set;
+  rtx set, set_src;
+  enum attr_type insn_type, dep_insn_type;
 
   /* If the dependence is an anti-dependence, there is no cost.  For an
      output dependence, there is sometimes a cost, but it doesn't seem
@@ -849,60 +2432,225 @@ alpha_adjust_cost (insn, link, dep_insn, cost)
   if (REG_NOTE_KIND (link) != 0)
     return 0;
 
-  /* If INSN is a store insn and DEP_INSN is setting the data being stored,
-     we can sometimes lower the cost.  */
+  /* If we can't recognize the insns, we can't really do anything.  */
+  if (recog_memoized (insn) < 0 || recog_memoized (dep_insn) < 0)
+    return cost;
 
-  if (recog_memoized (insn) >= 0 && get_attr_type (insn) == TYPE_ST
-      && (set = single_set (dep_insn)) != 0
-      && GET_CODE (PATTERN (insn)) == SET
-      && rtx_equal_p (SET_DEST (set), SET_SRC (PATTERN (insn))))
-    switch (get_attr_type (dep_insn))
-      {
-      case TYPE_LD:
-	/* No savings here.  */
-	return cost;
-
-      case TYPE_IMULL:
-      case TYPE_IMULQ:
-	/* In these cases, we save one cycle.  */
-	return cost - 2;
-
-      default:
-	/* In all other cases, we save two cycles.  */
-	return MAX (0, cost - 4);
-      }
+  insn_type = get_attr_type (insn);
+  dep_insn_type = get_attr_type (dep_insn);
 
-  /* Another case that needs adjustment is an arithmetic or logical
-     operation.  It's cost is usually one cycle, but we default it to
-     two in the MD file.  The only case that it is actually two is
-     for the address in loads and stores.  */
+  /* Bring in the user-defined memory latency.  */
+  if (dep_insn_type == TYPE_ILD
+      || dep_insn_type == TYPE_FLD
+      || dep_insn_type == TYPE_LDSYM)
+    cost += alpha_memory_latency-1;
 
-  if (recog_memoized (dep_insn) >= 0
-      && get_attr_type (dep_insn) == TYPE_IADDLOG)
-    switch (get_attr_type (insn))
-      {
-      case TYPE_LD:
-      case TYPE_ST:
-	return cost;
+  switch (alpha_cpu)
+    {
+    case PROCESSOR_EV4:
+      /* On EV4, if INSN is a store insn and DEP_INSN is setting the data
+	 being stored, we can sometimes lower the cost.  */
+
+      if ((insn_type == TYPE_IST || insn_type == TYPE_FST)
+	  && (set = single_set (dep_insn)) != 0
+	  && GET_CODE (PATTERN (insn)) == SET
+	  && rtx_equal_p (SET_DEST (set), SET_SRC (PATTERN (insn))))
+	{
+	  switch (dep_insn_type)
+	    {
+	    case TYPE_ILD:
+	    case TYPE_FLD:
+	      /* No savings here.  */
+	      return cost;
+
+	    case TYPE_IMUL:
+	      /* In these cases, we save one cycle.  */
+	      return cost - 1;
+
+	    default:
+	      /* In all other cases, we save two cycles.  */
+	      return MAX (0, cost - 2);
+	    }
+	}
 
-      default:
-	return 2;
-      }
+      /* Another case that needs adjustment is an arithmetic or logical
+	 operation.  It's cost is usually one cycle, but we default it to
+	 two in the MD file.  The only case that it is actually two is
+	 for the address in loads, stores, and jumps.  */
 
-  /* The final case is when a compare feeds into an integer branch.  The cost
-     is only one cycle in that case.  */
+      if (dep_insn_type == TYPE_IADD || dep_insn_type == TYPE_ILOG)
+	{
+	  switch (insn_type)
+	    {
+	    case TYPE_ILD:
+	    case TYPE_IST:
+	    case TYPE_FLD:
+	    case TYPE_FST:
+	    case TYPE_JSR:
+	      return cost;
+	    default:
+	      return 1;
+	    }
+	}
 
-  if (recog_memoized (dep_insn) >= 0
-      && get_attr_type (dep_insn) == TYPE_ICMP
-      && recog_memoized (insn) >= 0
-      && get_attr_type (insn) == TYPE_IBR)
-    return 2;
+      /* The final case is when a compare feeds into an integer branch;
+	 the cost is only one cycle in that case.  */
 
-  /* Otherwise, return the default cost. */
+      if (dep_insn_type == TYPE_ICMP && insn_type == TYPE_IBR)
+	return 1;
+      break;
+
+    case PROCESSOR_EV5:
+      /* And the lord DEC saith:  "A special bypass provides an effective
+	 latency of 0 cycles for an ICMP or ILOG insn producing the test
+	 operand of an IBR or ICMOV insn." */
+
+      if ((dep_insn_type == TYPE_ICMP || dep_insn_type == TYPE_ILOG)
+	  && (set = single_set (dep_insn)) != 0)
+	{
+	  /* A branch only has one input.  This must be it.  */
+	  if (insn_type == TYPE_IBR)
+	    return 0;
+	  /* A conditional move has three, make sure it is the test.  */
+	  if (insn_type == TYPE_ICMOV
+	      && GET_CODE (set_src = PATTERN (insn)) == SET
+	      && GET_CODE (set_src = SET_SRC (set_src)) == IF_THEN_ELSE
+	      && rtx_equal_p (SET_DEST (set), XEXP (set_src, 0)))
+	    return 0;
+	}
+
+      /* "The multiplier is unable to receive data from IEU bypass paths.
+	 The instruction issues at the expected time, but its latency is
+	 increased by the time it takes for the input data to become
+	 available to the multiplier" -- which happens in pipeline stage
+	 six, when results are comitted to the register file.  */
+
+      if (insn_type == TYPE_IMUL)
+	{
+	  switch (dep_insn_type)
+	    {
+	    /* These insns produce their results in pipeline stage five.  */
+	    case TYPE_ILD:
+	    case TYPE_ICMOV:
+	    case TYPE_IMUL:
+	    case TYPE_MVI:
+	      return cost + 1;
+
+	    /* Other integer insns produce results in pipeline stage four.  */
+	    default:
+	      return cost + 2;
+	    }
+	}
+      break;
 
+    case PROCESSOR_EV6:
+      /* There is additional latency to move the result of (most) FP 
+         operations anywhere but the FP register file.  */
+
+      if ((insn_type == TYPE_FST || insn_type == TYPE_FTOI)
+	  && (dep_insn_type == TYPE_FADD ||
+	      dep_insn_type == TYPE_FMUL ||
+	      dep_insn_type == TYPE_FCMOV))
+        return cost + 2;
+
+      break;
+    }
+
+  /* Otherwise, return the default cost. */
   return cost;
 }
 
+/* Functions to save and restore alpha_return_addr_rtx.  */
+
+struct machine_function
+{
+  rtx ra_rtx;
+};
+
+static void
+alpha_save_machine_status (p)
+     struct function *p;
+{
+  struct machine_function *machine =
+    (struct machine_function *) xmalloc (sizeof (struct machine_function));
+
+  p->machine = machine;
+  machine->ra_rtx = alpha_return_addr_rtx;
+}
+
+static void
+alpha_restore_machine_status (p)
+     struct function *p;
+{
+  struct machine_function *machine = p->machine;
+
+  alpha_return_addr_rtx = machine->ra_rtx;
+
+  free (machine);
+  p->machine = (struct machine_function *)0;
+}
+
+/* Do anything needed before RTL is emitted for each function.  */
+
+void
+alpha_init_expanders ()
+{
+  alpha_return_addr_rtx = NULL_RTX;
+  alpha_eh_epilogue_sp_ofs = NULL_RTX;
+
+  /* Arrange to save and restore machine status around nested functions.  */
+  save_machine_status = alpha_save_machine_status;
+  restore_machine_status = alpha_restore_machine_status;
+}
+
+/* Start the ball rolling with RETURN_ADDR_RTX.  */
+
+rtx
+alpha_return_addr (count, frame)
+     int count;
+     rtx frame ATTRIBUTE_UNUSED;
+{
+  rtx init;
+
+  if (count != 0)
+    return const0_rtx;
+
+  if (alpha_return_addr_rtx)
+    return alpha_return_addr_rtx;
+
+  /* No rtx yet.  Invent one, and initialize it from $26 in the prologue.  */
+  alpha_return_addr_rtx = gen_reg_rtx (Pmode);
+  init = gen_rtx_SET (VOIDmode, alpha_return_addr_rtx,
+		      gen_rtx_REG (Pmode, REG_RA));
+
+  /* Emit the insn to the prologue with the other argument copies.  */
+  push_topmost_sequence ();
+  emit_insn_after (init, get_insns ());
+  pop_topmost_sequence ();
+
+  return alpha_return_addr_rtx;
+}
+
+static int
+alpha_ra_ever_killed ()
+{
+  rtx top;
+
+#ifdef ASM_OUTPUT_MI_THUNK
+  if (current_function_is_thunk)
+    return 0;
+#endif
+  if (!alpha_return_addr_rtx)
+    return regs_ever_live[REG_RA];
+
+  push_topmost_sequence ();
+  top = get_insns ();
+  pop_topmost_sequence ();
+
+  return reg_set_between_p (gen_rtx_REG (Pmode, REG_RA), top, NULL_RTX);
+}
+
+
 /* Print an operand.  Recognize special options, documented below.  */
 
 void
@@ -915,6 +2663,115 @@ print_operand (file, x, code)
 
   switch (code)
     {
+    case '&':
+      /* Generates fp-rounding mode suffix: nothing for normal, 'c' for
+	 chopped, 'm' for minus-infinity, and 'd' for dynamic rounding
+	 mode.  alpha_fprm controls which suffix is generated.  */
+      switch (alpha_fprm)
+	{
+	case ALPHA_FPRM_NORM:
+	  break;
+	case ALPHA_FPRM_MINF: 
+	  fputc ('m', file);
+	  break;
+	case ALPHA_FPRM_CHOP:
+	  fputc ('c', file);
+	  break;
+	case ALPHA_FPRM_DYN:
+	  fputc ('d', file);
+	  break;
+	}
+      break;
+
+    case '\'':
+      /* Generates trap-mode suffix for instructions that accept the su
+	 suffix only (cmpt et al).  */
+      if (alpha_tp == ALPHA_TP_INSN)
+	fputs ("su", file);
+      break;
+
+    case '`':
+      /* Generates trap-mode suffix for instructions that accept the
+	 v and sv suffix.  The only instruction that needs this is cvtql.  */
+      switch (alpha_fptm)
+	{
+	case ALPHA_FPTM_N:
+	  break;
+	case ALPHA_FPTM_U:
+	  fputs ("v", file);
+	  break;
+	case ALPHA_FPTM_SU:
+	case ALPHA_FPTM_SUI:
+	  fputs ("sv", file);
+	  break;
+	}
+      break;
+
+    case '(':
+      /* Generates trap-mode suffix for instructions that accept the
+	 v, sv, and svi suffix.  The only instruction that needs this
+	 is cvttq.  */
+      switch (alpha_fptm)
+	{
+	case ALPHA_FPTM_N:
+	  break;
+	case ALPHA_FPTM_U:
+	  fputs ("v", file);
+	  break;
+	case ALPHA_FPTM_SU:
+	  fputs ("sv", file);
+	  break;
+	case ALPHA_FPTM_SUI:
+	  fputs ("svi", file);
+	  break;
+	}
+      break;
+
+    case ')':
+      /* Generates trap-mode suffix for instructions that accept the u, su,
+	 and sui suffix.  This is the bulk of the IEEE floating point
+	 instructions (addt et al).  */
+      switch (alpha_fptm)
+	{
+	case ALPHA_FPTM_N:
+	  break;
+	case ALPHA_FPTM_U:
+	  fputc ('u', file);
+	  break;
+	case ALPHA_FPTM_SU:
+	  fputs ("su", file);
+	  break;
+	case ALPHA_FPTM_SUI:
+	  fputs ("sui", file);
+	  break;
+	}
+      break;
+
+    case '+':
+      /* Generates trap-mode suffix for instructions that accept the sui
+	 suffix (cvtqt and cvtqs).  */
+      switch (alpha_fptm)
+	{
+	case ALPHA_FPTM_N:
+	case ALPHA_FPTM_U:
+	case ALPHA_FPTM_SU:	/* cvtqt/cvtqs can't cause underflow */
+	  break;
+	case ALPHA_FPTM_SUI:
+	  fputs ("sui", file);
+	  break;
+	}
+      break;
+
+    case ',':
+      /* Generates single precision instruction suffix.  */
+      fprintf (file, "%c", (TARGET_FLOAT_VAX ? 'f' : 's'));
+      break;
+
+    case '-':
+      /* Generates double precision instruction suffix.  */
+      fprintf (file, "%c", (TARGET_FLOAT_VAX ? 'g' : 't'));
+      break;
+
     case 'r':
       /* If this operand is the constant zero, write it as "$31".  */
       if (GET_CODE (x) == REG)
@@ -942,7 +2799,7 @@ print_operand (file, x, code)
       if (GET_CODE (x) != CONST_INT)
 	output_operand_lossage ("invalid %%N value");
 
-      fprintf (file, "%ld", ~ INTVAL (x));
+      fprintf (file, HOST_WIDE_INT_PRINT_DEC, ~ INTVAL (x));
       break;
 
     case 'P':
@@ -950,7 +2807,7 @@ print_operand (file, x, code)
       if (GET_CODE (x) != CONST_INT)
 	output_operand_lossage ("invalid %%P value");
 
-      fprintf (file, "%ld", (HOST_WIDE_INT) 1 << INTVAL (x));
+      fprintf (file, HOST_WIDE_INT_PRINT_DEC, (HOST_WIDE_INT) 1 << INTVAL (x));
       break;
 
     case 'h':
@@ -958,7 +2815,7 @@ print_operand (file, x, code)
       if (GET_CODE (x) != CONST_INT)
 	output_operand_lossage ("invalid %%h value");
 
-      fprintf (file, "%ld", INTVAL (x) >> 16);
+      fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x) >> 16);
       break;
 
     case 'L':
@@ -966,7 +2823,8 @@ print_operand (file, x, code)
       if (GET_CODE (x) != CONST_INT)
 	output_operand_lossage ("invalid %%L value");
 
-      fprintf (file, "%ld", (INTVAL (x) & 0xffff) - 2 * (INTVAL (x) & 0x8000));
+      fprintf (file, HOST_WIDE_INT_PRINT_DEC,
+	       (INTVAL (x) & 0xffff) - 2 * (INTVAL (x) & 0x8000));
       break;
 
     case 'm':
@@ -988,7 +2846,7 @@ print_operand (file, x, code)
 	    if (value & 0xff)
 	      mask |= (1 << (i + sizeof (int)));
 
-	  fprintf (file, "%ld", mask & 0xff);
+	  fprintf (file, HOST_WIDE_INT_PRINT_DEC, mask & 0xff);
 	}
 
       else if (GET_CODE (x) == CONST_INT)
@@ -999,20 +2857,24 @@ print_operand (file, x, code)
 	    if (value & 0xff)
 	      mask |= (1 << i);
 
-	  fprintf (file, "%ld", mask);
+	  fprintf (file, HOST_WIDE_INT_PRINT_DEC, mask);
 	}
       else
 	output_operand_lossage ("invalid %%m value");
       break;
 
     case 'M':
-      /* 'b', 'w', or 'l' as the value of the constant.  */
+      /* 'b', 'w', 'l', or 'q' as the value of the constant.  */
       if (GET_CODE (x) != CONST_INT
-	  || (INTVAL (x) != 8 && INTVAL (x) != 16 && INTVAL (x) != 32))
+	  || (INTVAL (x) != 8 && INTVAL (x) != 16
+	      && INTVAL (x) != 32 && INTVAL (x) != 64))
 	output_operand_lossage ("invalid %%M value");
 
       fprintf (file, "%s",
-	       INTVAL (x) == 8 ? "b" : INTVAL (x) == 16 ? "w" : "l");
+	       (INTVAL (x) == 8 ? "b"
+		: INTVAL (x) == 16 ? "w"
+		: INTVAL (x) == 32 ? "l"
+		: "q"));
       break;
 
     case 'U':
@@ -1021,14 +2883,24 @@ print_operand (file, x, code)
 	fprintf (file, "b");
       else if (GET_CODE (x) == CONST_INT && INTVAL (x) == 0xffff)
 	fprintf (file, "w");
+      else if (GET_CODE (x) == CONST_INT && INTVAL (x) == 0xffffffff)
+	fprintf (file, "l");
 #if HOST_BITS_PER_WIDE_INT == 32
       else if (GET_CODE (x) == CONST_DOUBLE
 	       && CONST_DOUBLE_HIGH (x) == 0
 	       && CONST_DOUBLE_LOW (x) == -1)
 	fprintf (file, "l");
+      else if (GET_CODE (x) == CONST_DOUBLE
+	       && CONST_DOUBLE_HIGH (x) == -1
+	       && CONST_DOUBLE_LOW (x) == -1)
+	fprintf (file, "q");
 #else
-      else if (GET_CODE (x) == CONST_INT && INTVAL (x) == 0xffffffff)
-	fprintf (file, "l");
+      else if (GET_CODE (x) == CONST_INT && INTVAL (x) == -1)
+	fprintf (file, "q");
+      else if (GET_CODE (x) == CONST_DOUBLE
+	       && CONST_DOUBLE_HIGH (x) == 0
+	       && CONST_DOUBLE_LOW (x) == -1)
+	fprintf (file, "q");
 #endif
       else
 	output_operand_lossage ("invalid %%U value");
@@ -1041,7 +2913,7 @@ print_operand (file, x, code)
 	  && (INTVAL (x) & 7) != 8)
 	output_operand_lossage ("invalid %%s value");
 
-      fprintf (file, "%ld", INTVAL (x) / 8);
+      fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x) / 8);
       break;
 
     case 'S':
@@ -1052,46 +2924,31 @@ print_operand (file, x, code)
 	  && (INTVAL (x) & 7) != 8)
 	output_operand_lossage ("invalid %%s value");
 
-      fprintf (file, "%ld", (64 - INTVAL (x)) / 8);
+      fprintf (file, HOST_WIDE_INT_PRINT_DEC, (64 - INTVAL (x)) / 8);
       break;
 
-    case 'C':
+    case 'C': case 'D': case 'c': case 'd':
       /* Write out comparison name.  */
-      if (GET_RTX_CLASS (GET_CODE (x)) != '<')
-	output_operand_lossage ("invalid %%C value");
-
-      if (GET_CODE (x) == LEU)
-	fprintf (file, "ule");
-      else if (GET_CODE (x) == LTU)
-	fprintf (file, "ult");
-      else
-	fprintf (file, "%s", GET_RTX_NAME (GET_CODE (x)));
-      break;
-
-    case 'D':
-      /* Similar, but write reversed code.  We can't get an unsigned code
-	 here.  */
-      if (GET_RTX_CLASS (GET_CODE (x)) != '<')
-	output_operand_lossage ("invalid %%D value");
-
-      fprintf (file, "%s", GET_RTX_NAME (reverse_condition (GET_CODE (x))));
-      break;
-
-    case 'c':
-      /* Similar to `c', but swap.  We can't get unsigned here either.  */
-      if (GET_RTX_CLASS (GET_CODE (x)) != '<')
-	output_operand_lossage ("invalid %%D value");
-
-      fprintf (file, "%s", GET_RTX_NAME (swap_condition (GET_CODE (x))));
-      break;
-
-    case 'd':
-      /* Similar, but reverse and swap.  We can't get unsigned here either.  */
-      if (GET_RTX_CLASS (GET_CODE (x)) != '<')
-	output_operand_lossage ("invalid %%D value");
-
-      fprintf (file, "%s",
-	       GET_RTX_NAME (swap_condition (reverse_condition ((GET_CODE (x))))));
+      {
+	enum rtx_code c = GET_CODE (x);
+
+        if (GET_RTX_CLASS (c) != '<')
+	  output_operand_lossage ("invalid %%C value");
+
+	if (code == 'D')
+	  c = reverse_condition (c);
+	else if (code == 'c')
+	  c = swap_condition (c);
+	else if (code == 'd')
+	  c = swap_condition (reverse_condition (c));
+
+        if (c == LEU)
+	  fprintf (file, "ule");
+        else if (c == LTU)
+	  fprintf (file, "ult");
+        else
+	  fprintf (file, "%s", GET_RTX_NAME (c));
+      }
       break;
 
     case 'E':
@@ -1135,6 +2992,100 @@ print_operand (file, x, code)
       output_operand_lossage ("invalid %%xn code");
     }
 }
+
+void
+print_operand_address (file, addr)
+    FILE *file;
+     rtx addr;
+{
+  int basereg = 31;
+  HOST_WIDE_INT offset = 0;
+
+  if (GET_CODE (addr) == AND)
+    addr = XEXP (addr, 0);
+
+  if (GET_CODE (addr) == PLUS
+      && GET_CODE (XEXP (addr, 1)) == CONST_INT)
+    {
+      offset = INTVAL (XEXP (addr, 1));
+      addr = XEXP (addr, 0);
+    }
+  if (GET_CODE (addr) == REG)
+    basereg = REGNO (addr);
+  else if (GET_CODE (addr) == SUBREG
+	   && GET_CODE (SUBREG_REG (addr)) == REG)
+    basereg = REGNO (SUBREG_REG (addr)) + SUBREG_WORD (addr);
+  else if (GET_CODE (addr) == CONST_INT)
+    offset = INTVAL (addr);
+  else
+    abort ();
+
+  fprintf (file, HOST_WIDE_INT_PRINT_DEC, offset);
+  fprintf (file, "($%d)", basereg);
+}
+
+/* Emit RTL insns to initialize the variable parts of a trampoline at
+   TRAMP. FNADDR is an RTX for the address of the function's pure
+   code.  CXT is an RTX for the static chain value for the function.
+
+   The three offset parameters are for the individual template's
+   layout.  A JMPOFS < 0 indicates that the trampoline does not 
+   contain instructions at all.
+
+   We assume here that a function will be called many more times than
+   its address is taken (e.g., it might be passed to qsort), so we
+   take the trouble to initialize the "hint" field in the JMP insn.
+   Note that the hint field is PC (new) + 4 * bits 13:0.  */
+
+void
+alpha_initialize_trampoline (tramp, fnaddr, cxt, fnofs, cxtofs, jmpofs)
+     rtx tramp, fnaddr, cxt;
+     int fnofs, cxtofs, jmpofs;
+{
+  rtx temp, temp1, addr;
+  /* VMS really uses DImode pointers in memory at this point.  */
+  enum machine_mode mode = TARGET_OPEN_VMS ? Pmode : ptr_mode;
+
+#ifdef POINTERS_EXTEND_UNSIGNED
+  fnaddr = convert_memory_address (mode, fnaddr);
+  cxt = convert_memory_address (mode, cxt);
+#endif
+
+  /* Store function address and CXT.  */
+  addr = memory_address (mode, plus_constant (tramp, fnofs));
+  emit_move_insn (gen_rtx (MEM, mode, addr), fnaddr);
+  addr = memory_address (mode, plus_constant (tramp, cxtofs));
+  emit_move_insn (gen_rtx (MEM, mode, addr), cxt);
+
+  /* This has been disabled since the hint only has a 32k range, and in
+     no existing OS is the stack within 32k of the text segment. */
+  if (0 && jmpofs >= 0)
+    {
+      /* Compute hint value.  */
+      temp = force_operand (plus_constant (tramp, jmpofs+4), NULL_RTX);
+      temp = expand_binop (DImode, sub_optab, fnaddr, temp, temp, 1,
+			   OPTAB_WIDEN);
+      temp = expand_shift (RSHIFT_EXPR, Pmode, temp,
+		           build_int_2 (2, 0), NULL_RTX, 1);
+      temp = expand_and (gen_lowpart (SImode, temp), GEN_INT (0x3fff), 0);
+
+      /* Merge in the hint.  */
+      addr = memory_address (SImode, plus_constant (tramp, jmpofs));
+      temp1 = force_reg (SImode, gen_rtx (MEM, SImode, addr));
+      temp1 = expand_and (temp1, GEN_INT (0xffffc000), NULL_RTX);
+      temp1 = expand_binop (SImode, ior_optab, temp1, temp, temp1, 1,
+			    OPTAB_WIDEN);
+      emit_move_insn (gen_rtx (MEM, SImode, addr), temp1);
+    }
+
+#ifdef TRANSFER_FROM_TRAMPOLINE
+  emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "__enable_execute_stack"),
+		     0, VOIDmode, 1, addr, Pmode);
+#endif
+
+  if (jmpofs >= 0)
+    emit_insn (gen_imb ());
+}
 
 /* Do what is necessary for `va_start'.  The argument is ignored;
    We look at the current function to determine if stdarg or varargs
@@ -1143,9 +3094,9 @@ print_operand (file, x, code)
 
 struct rtx_def *
 alpha_builtin_saveregs (arglist)
-     tree arglist;
+     tree arglist ATTRIBUTE_UNUSED;
 {
-  rtx block, addr, argsize;
+  rtx block, addr, dest, argsize;
   tree fntype = TREE_TYPE (current_function_decl);
   int stdarg = (TYPE_ARG_TYPES (fntype) != 0
 		&& (TREE_VALUE (tree_last (TYPE_ARG_TYPES (fntype)))
@@ -1153,11 +3104,11 @@ alpha_builtin_saveregs (arglist)
 
   /* Compute the current position into the args, taking into account
      both registers and memory.  Both of these are already included in
-     current_function_args_info.  */
+     NUM_ARGS.  */
 
-  argsize = GEN_INT (current_function_args_info * UNITS_PER_WORD);
+  argsize = GEN_INT (NUM_ARGS * UNITS_PER_WORD);
 
-  /* SETUP_INCOMING_VARARGS moves the starting address base up by 48,
+  /* For Unix, SETUP_INCOMING_VARARGS moves the starting address base up by 48,
      storing fp arg registers in the first 48 bytes, and the integer arg
      registers in the next 48 bytes.  This is only done, however, if any
      integer registers need to be stored.
@@ -1166,35 +3117,71 @@ alpha_builtin_saveregs (arglist)
      order to account for the integer arg registers which are counted in
      argsize above, but which are not actually stored on the stack.  */
 
-  addr = (current_function_args_info <= 5 + stdarg
-	  ? plus_constant (virtual_incoming_args_rtx, 6 * UNITS_PER_WORD)
-	  : plus_constant (virtual_incoming_args_rtx, - (6 * UNITS_PER_WORD)));
-
-  addr = force_operand (addr, NULL_RTX);
+  if (TARGET_OPEN_VMS)
+    addr = plus_constant (virtual_incoming_args_rtx,
+			  NUM_ARGS <= 5 + stdarg
+			  ? UNITS_PER_WORD : - 6 * UNITS_PER_WORD);
+  else
+    addr = (NUM_ARGS <= 5 + stdarg
+	    ? plus_constant (virtual_incoming_args_rtx,
+			     6 * UNITS_PER_WORD)
+	    : plus_constant (virtual_incoming_args_rtx,
+			     - (6 * UNITS_PER_WORD)));
 
-  /* Allocate the va_list constructor */
-  block = assign_stack_local (BLKmode, 2 * UNITS_PER_WORD, BITS_PER_WORD);
-  RTX_UNCHANGING_P (block) = 1;
-  RTX_UNCHANGING_P (XEXP (block, 0)) = 1;
+  /* For VMS, we include the argsize, while on Unix, it's handled as
+     a separate field.  */
+  if (TARGET_OPEN_VMS)
+    addr = plus_constant (addr, INTVAL (argsize));
 
-  /* Store the address of the first integer register in the __base member.  */
+  addr = force_operand (addr, NULL_RTX);
 
 #ifdef POINTERS_EXTEND_UNSIGNED
   addr = convert_memory_address (ptr_mode, addr);
 #endif
 
-  emit_move_insn (change_address (block, ptr_mode, XEXP (block, 0)), addr);
-
-  /* Store the argsize as the __va_offset member.  */
-  emit_move_insn (change_address (block, TYPE_MODE (integer_type_node),
-				  plus_constant (XEXP (block, 0),
-						 POINTER_SIZE/BITS_PER_UNIT)),
-		  argsize);
-
-  /* Return the address of the va_list constructor, but don't put it in a
-     register.  Doing so would fail when not optimizing and produce worse
-     code when optimizing.  */
-  return XEXP (block, 0);
+  if (TARGET_OPEN_VMS)
+    return addr;
+  else
+    {
+      /* Allocate the va_list constructor */
+      block = assign_stack_local (BLKmode, 2 * UNITS_PER_WORD, BITS_PER_WORD);
+      RTX_UNCHANGING_P (block) = 1;
+      RTX_UNCHANGING_P (XEXP (block, 0)) = 1;
+
+      /* Store the address of the first integer register in the __base
+	 member.  */
+
+      dest = change_address (block, ptr_mode, XEXP (block, 0));
+      emit_move_insn (dest, addr);
+
+      if (current_function_check_memory_usage)
+	emit_library_call (chkr_set_right_libfunc, 1, VOIDmode, 3,
+			   dest, ptr_mode,
+			   GEN_INT (GET_MODE_SIZE (ptr_mode)),
+			   TYPE_MODE (sizetype),
+			   GEN_INT (MEMORY_USE_RW), 
+			   TYPE_MODE (integer_type_node));
+  
+      /* Store the argsize as the __va_offset member.  */
+      dest = change_address (block, TYPE_MODE (integer_type_node),
+			     plus_constant (XEXP (block, 0),
+					    POINTER_SIZE/BITS_PER_UNIT));
+      emit_move_insn (dest, argsize);
+
+      if (current_function_check_memory_usage)
+	emit_library_call (chkr_set_right_libfunc, 1, VOIDmode, 3,
+			   dest, ptr_mode,
+			   GEN_INT (GET_MODE_SIZE
+				    (TYPE_MODE (integer_type_node))),
+			   TYPE_MODE (sizetype),
+			   GEN_INT (MEMORY_USE_RW),
+			   TYPE_MODE (integer_type_node));
+
+      /* Return the address of the va_list constructor, but don't put it in a
+	 register.  Doing so would fail when not optimizing and produce worse
+	 code when optimizing.  */
+      return XEXP (block, 0);
+    }
 }
 
 /* This page contains routines that are used to determine what the function
@@ -1202,195 +3189,293 @@ alpha_builtin_saveregs (arglist)
 
 /* Compute the size of the save area in the stack.  */
 
+/* These variables are used for communication between the following functions.
+   They indicate various things about the current function being compiled
+   that are used to tell what kind of prologue, epilogue and procedure
+   descriptior to generate. */
+
+/* Nonzero if we need a stack procedure.  */
+static int vms_is_stack_procedure;
+
+/* Register number (either FP or SP) that is used to unwind the frame.  */
+static int vms_unwind_regno;
+
+/* Register number used to save FP.  We need not have one for RA since
+   we don't modify it for register procedures.  This is only defined
+   for register frame procedures.  */
+static int vms_save_fp_regno;
+
+/* Register number used to reference objects off our PV.  */
+static int vms_base_regno;
+
+/* Compute register masks for saved registers.  */
+
+static void
+alpha_sa_mask (imaskP, fmaskP)
+    unsigned long *imaskP;
+    unsigned long *fmaskP;
+{
+  unsigned long imask = 0;
+  unsigned long fmask = 0;
+  int i;
+
+#ifdef ASM_OUTPUT_MI_THUNK
+  if (!current_function_is_thunk)
+#endif
+    {
+      if (TARGET_OPEN_VMS && vms_is_stack_procedure)
+	imask |= (1L << HARD_FRAME_POINTER_REGNUM);
+
+      /* One for every register we have to save.  */
+      for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
+	if (! fixed_regs[i] && ! call_used_regs[i]
+	    && regs_ever_live[i] && i != REG_RA)
+	  {
+	    if (i < 32)
+	      imask |= (1L << i);
+	    else
+	      fmask |= (1L << (i - 32));
+	  }
+
+      if (imask || fmask || alpha_ra_ever_killed ())
+	imask |= (1L << REG_RA);
+    }
+
+  *imaskP = imask;
+  *fmaskP = fmask;
+}
+
 int
 alpha_sa_size ()
 {
-  int size = 0;
+  int sa_size = 0;
   int i;
 
-  for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
-    if (! fixed_regs[i] && ! call_used_regs[i] && regs_ever_live[i])
-      size++;
+#ifdef ASM_OUTPUT_MI_THUNK
+  if (current_function_is_thunk)
+    sa_size = 0;
+  else
+#endif
+    {
+      /* One for every register we have to save.  */
+      for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
+	if (! fixed_regs[i] && ! call_used_regs[i]
+	    && regs_ever_live[i] && i != REG_RA)
+	  sa_size++;
+    }
 
-  /* If some registers were saved but not reg 26, reg 26 must also
-     be saved, so leave space for it.  */
-  if (size != 0 && ! regs_ever_live[26])
-    size++;
+  if (TARGET_OPEN_VMS)
+    {
+      /* Start by assuming we can use a register procedure if we don't
+	 make any calls (REG_RA not used) or need to save any
+	 registers and a stack procedure if we do.  */
+      vms_is_stack_procedure = sa_size != 0 || alpha_ra_ever_killed ();
+
+      /* Decide whether to refer to objects off our PV via FP or PV.
+	 If we need FP for something else or if we receive a nonlocal
+	 goto (which expects PV to contain the value), we must use PV.
+	 Otherwise, start by assuming we can use FP.  */
+      vms_base_regno = (frame_pointer_needed
+			|| current_function_has_nonlocal_label
+			|| vms_is_stack_procedure
+			|| current_function_outgoing_args_size
+			? REG_PV : HARD_FRAME_POINTER_REGNUM);
+
+      /* If we want to copy PV into FP, we need to find some register
+	 in which to save FP.  */
+
+      vms_save_fp_regno = -1;
+      if (vms_base_regno == HARD_FRAME_POINTER_REGNUM)
+	for (i = 0; i < 32; i++)
+	  if (! fixed_regs[i] && call_used_regs[i] && ! regs_ever_live[i])
+	    vms_save_fp_regno = i;
+
+      if (vms_save_fp_regno == -1)
+	vms_base_regno = REG_PV, vms_is_stack_procedure = 1;
+
+      /* Stack unwinding should be done via FP unless we use it for PV.  */
+      vms_unwind_regno = (vms_base_regno == REG_PV
+			  ? HARD_FRAME_POINTER_REGNUM : STACK_POINTER_REGNUM);
+
+      /* If this is a stack procedure, allow space for saving FP and RA.  */
+      if (vms_is_stack_procedure)
+	sa_size += 2;
+    }
+  else
+    {
+      /* If some registers were saved but not RA, RA must also be saved,
+	 so leave space for it.  */
+      if (sa_size != 0 || alpha_ra_ever_killed ())
+	sa_size++;
+
+      /* Our size must be even (multiple of 16 bytes).  */
+      if (sa_size & 1)
+	sa_size++;
+    }
 
-  /* Our size must be even (multiple of 16 bytes).  */
-  if (size & 1)
-    size ++;
+  return sa_size * 8;
+}
 
-  return size * 8;
+int
+alpha_pv_save_size ()
+{
+  alpha_sa_size ();
+  return vms_is_stack_procedure ? 8 : 0;
 }
 
-/* Return 1 if this function can directly return via $26.  */
+int
+alpha_using_fp ()
+{
+  alpha_sa_size ();
+  return vms_unwind_regno == HARD_FRAME_POINTER_REGNUM;
+}
 
 int
-direct_return ()
+vms_valid_decl_attribute_p (decl, attributes, identifier, args)
+     tree decl ATTRIBUTE_UNUSED;
+     tree attributes ATTRIBUTE_UNUSED;
+     tree identifier;
+     tree args;
 {
-  return (reload_completed && alpha_sa_size () == 0
-	  && get_frame_size () == 0
-	  && current_function_outgoing_args_size == 0
-	  && current_function_pretend_args_size == 0);
+  if (is_attribute_p ("overlaid", identifier))
+    return (args == NULL_TREE);
+  return 0;
+}
+
+static int
+alpha_does_function_need_gp ()
+{
+  rtx insn;
+
+  /* We never need a GP for Windows/NT or VMS.  */
+  if (TARGET_WINDOWS_NT || TARGET_OPEN_VMS)
+    return 0;
+
+#ifdef TARGET_PROFILING_NEEDS_GP
+  if (profile_flag)
+    return 1;
+#endif
+
+#ifdef ASM_OUTPUT_MI_THUNK
+  if (current_function_is_thunk)
+    return 1;
+#endif
+
+  /* If we need a GP (we have a LDSYM insn or a CALL_INSN), load it first. 
+     Even if we are a static function, we still need to do this in case
+     our address is taken and passed to something like qsort.  */
+
+  push_topmost_sequence ();
+  insn = get_insns ();
+  pop_topmost_sequence ();
+
+  for (; insn; insn = NEXT_INSN (insn))
+    if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
+	&& GET_CODE (PATTERN (insn)) != USE
+	&& GET_CODE (PATTERN (insn)) != CLOBBER)
+      {
+	enum attr_type type = get_attr_type (insn);
+	if (type == TYPE_LDSYM || type == TYPE_JSR)
+	  return 1;
+      }
+
+  return 0;
 }
 
 /* Write a version stamp.  Don't write anything if we are running as a
    cross-compiler.  Otherwise, use the versions in /usr/include/stamp.h.  */
 
-#if !defined(CROSS_COMPILE) && !defined(_WIN32) && \
-    !defined(__NetBSD__) && !defined(__FreeBSD__)
+#ifdef HAVE_STAMP_H
 #include <stamp.h>
 #endif
 
 void
 alpha_write_verstamp (file)
-     FILE *file;
+     FILE *file ATTRIBUTE_UNUSED;
 {
 #ifdef MS_STAMP
   fprintf (file, "\t.verstamp %d %d\n", MS_STAMP, LS_STAMP);
 #endif
 }
 
-/* Write code to add constant C to register number IN_REG (possibly 31)
-   and put the result into OUT_REG.  Use TEMP_REG as a scratch register;
-   usually this will be OUT_REG, but should not be if OUT_REG is 
-   STACK_POINTER_REGNUM, since it must be updated in a single instruction.
-   Write the code to FILE.  */
+/* Helper function to set RTX_FRAME_RELATED_P on instructions, including
+   sequences.  */
 
-static void
-add_long_const (file, c, in_reg, out_reg, temp_reg)
-     FILE *file;
-     HOST_WIDE_INT c;
-     int in_reg, out_reg, temp_reg;
+static rtx
+set_frame_related_p ()
 {
-  HOST_WIDE_INT low = (c & 0xffff) - 2 * (c & 0x8000);
-  HOST_WIDE_INT tmp1 = c - low;
-  HOST_WIDE_INT high = ((tmp1 >> 16) & 0xffff) - 2 * ((tmp1 >> 16) & 0x8000);
-  HOST_WIDE_INT extra = 0;
+  rtx seq = gen_sequence ();
+  end_sequence ();
 
-  /* We don't have code to write out constants larger than 32 bits.  */
-#if HOST_BITS_PER_LONG_INT == 64
-  if ((unsigned HOST_WIDE_INT) c >> 32 != 0)
-    abort ();
-#endif
-
-  /* If HIGH will be interpreted as negative, we must adjust it to do two
-     ldha insns.  Note that we will never be building a negative constant
-     here.  */
-
-  if (high & 0x8000)
+  if (GET_CODE (seq) == SEQUENCE)
     {
-      extra = 0x4000;
-      tmp1 -= 0x40000000;
-      high = ((tmp1 >> 16) & 0xffff) - 2 * ((tmp1 >> 16) & 0x8000);
+      int i = XVECLEN (seq, 0);
+      while (--i >= 0)
+	RTX_FRAME_RELATED_P (XVECEXP (seq, 0, i)) = 1;
+     return emit_insn (seq);
     }
-
-  if (low != 0)
-    {
-      int result_reg = (extra == 0 && high == 0) ? out_reg : temp_reg;
-
-      if (low >= 0 && low < 255)
-	fprintf (file, "\taddq $%d,%d,$%d\n", in_reg, low, result_reg);
-      else
-	fprintf (file, "\tlda $%d,%d($%d)\n", result_reg, low, in_reg);
-
-      in_reg = result_reg;
-    }
-
-  if (extra)
+  else
     {
-      int result_reg = (high == 0) ? out_reg : temp_reg;
-
-      fprintf (file, "\tldah $%d,%d($%d)\n", result_reg, extra, in_reg);
-      in_reg = result_reg;
+      seq = emit_insn (seq);
+      RTX_FRAME_RELATED_P (seq) = 1;
+      return seq;
     }
-
-  if (high)
-    fprintf (file, "\tldah $%d,%d($%d)\n", out_reg, high, in_reg);
 }
 
+#define FRP(exp)  (start_sequence (), exp, set_frame_related_p ())
+
 /* Write function prologue.  */
 
-void
-output_prolog (file, size)
-     FILE *file;
-     int size;
-{
-  HOST_WIDE_INT out_args_size
-    = ALPHA_ROUND (current_function_outgoing_args_size);
-  HOST_WIDE_INT sa_size = alpha_sa_size ();
-  HOST_WIDE_INT frame_size
-    = (out_args_size + sa_size
-       + ALPHA_ROUND (size + current_function_pretend_args_size));
-  HOST_WIDE_INT reg_offset = out_args_size;
-  HOST_WIDE_INT start_reg_offset = reg_offset;
-  HOST_WIDE_INT actual_start_reg_offset = start_reg_offset;
-  int int_reg_save_area_size = 0;
-  rtx insn;
-  unsigned reg_mask = 0;
-  int i;
+/* On vms we have two kinds of functions:
 
-  /* Ecoff can handle multiple .file directives, so put out file and lineno.
-     We have to do that before the .ent directive as we cannot switch
-     files within procedures with native ecoff because line numbers are
-     linked to procedure descriptors.
-     Outputting the lineno helps debugging of one line functions as they
-     would otherwise get no line number at all. Please note that we would
-     like to put out last_linenum from final.c, but it is not accessible.  */
+   - stack frame (PROC_STACK)
+	these are 'normal' functions with local vars and which are
+	calling other functions
+   - register frame (PROC_REGISTER)
+	keeps all data in registers, needs no stack
 
-  if (write_symbols == SDB_DEBUG)
-    {
-      ASM_OUTPUT_SOURCE_FILENAME (file,
-				  DECL_SOURCE_FILE (current_function_decl));
-      if (debug_info_level != DINFO_LEVEL_TERSE)
-        ASM_OUTPUT_SOURCE_LINE (file,
-				DECL_SOURCE_LINE (current_function_decl));
-    }
+   We must pass this to the assembler so it can generate the
+   proper pdsc (procedure descriptor)
+   This is done with the '.pdesc' command.
 
-  /* The assembly language programmer's guide states that the second argument
-     to the .ent directive, the lex_level, is ignored by the assembler,
-     so we might as well omit it.  */
-     
-  fprintf (file, "\t.ent ");
-  assemble_name (file, alpha_function_name);
-  fprintf (file, "\n");
-  ASM_OUTPUT_LABEL (file, alpha_function_name);
-  inside_function = TRUE;
+   On not-vms, we don't really differentiate between the two, as we can
+   simply allocate stack without saving registers.  */
 
-  /* Set up offsets to alpha virtual arg/local debugging pointer.  */
+void
+alpha_expand_prologue ()
+{
+  /* Registers to save.  */
+  unsigned long imask = 0;
+  unsigned long fmask = 0;
+  /* Stack space needed for pushing registers clobbered by us.  */
+  HOST_WIDE_INT sa_size;
+  /* Complete stack size needed.  */
+  HOST_WIDE_INT frame_size;
+  /* Offset from base reg to register save area.  */
+  HOST_WIDE_INT reg_offset;
+  rtx sa_reg, mem;
+  int i;
 
-  alpha_auto_offset = -frame_size + current_function_pretend_args_size;
-  alpha_arg_offset = -frame_size + 48;
+  sa_size = alpha_sa_size ();
 
-  /* If we need a GP (we have a LDSYM insn or a CALL_INSN), load it first. 
-     Even if we are a static function, we still need to do this in case
-     our address is taken and passed to something like qsort.
-
-     We never need a GP for Windows/NT.  */
-
-  alpha_function_needs_gp = 0;
-  for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
-    if ((GET_CODE (insn) == CALL_INSN)
-	|| (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
-	    && GET_CODE (PATTERN (insn)) != USE
-	    && GET_CODE (PATTERN (insn)) != CLOBBER
-	    && (get_attr_type (insn) == TYPE_LDSYM
-		|| get_attr_type (insn) == TYPE_ISUBR)))
-      {
-	alpha_function_needs_gp = 1;
-	break;
-      }
+  frame_size = get_frame_size ();
+  if (TARGET_OPEN_VMS)
+    frame_size = ALPHA_ROUND (sa_size 
+			      + (vms_is_stack_procedure ? 8 : 0)
+			      + frame_size
+			      + current_function_pretend_args_size);
+  else
+    frame_size = (ALPHA_ROUND (current_function_outgoing_args_size)
+		  + sa_size
+		  + ALPHA_ROUND (frame_size
+				 + current_function_pretend_args_size));
 
-  if (WINDOWS_NT == 0)
-    {
-      if (alpha_function_needs_gp)
-	fprintf (file, "\tldgp $29,0($27)\n");
+  if (TARGET_OPEN_VMS)
+    reg_offset = 8;
+  else
+    reg_offset = ALPHA_ROUND (current_function_outgoing_args_size);
 
-      /* Put a label after the GP load so we can enter the function at it.  */
-      assemble_name (file, alpha_function_name);
-      fprintf (file, "..ng:\n");
-    }
+  alpha_sa_mask (&imask, &fmask);
 
   /* Adjust the stack by the frame size.  If the frame size is > 4096
      bytes, we need to be sure we probe somewhere in the first and last
@@ -1401,28 +3486,30 @@ output_prolog (file, size)
 
      Note that we are only allowed to adjust sp once in the prologue.  */
 
-  if (frame_size < 32768)
+  if (frame_size <= 32768)
     {
       if (frame_size > 4096)
 	{
 	  int probed = 4096;
 
-	  fprintf (file, "\tstq $31,-%d($30)\n", probed);
-
-	  while (probed + 8192 < frame_size)
-	    fprintf (file, "\tstq $31,-%d($30)\n", probed += 8192);
+	  do
+	    emit_insn (gen_probe_stack (GEN_INT (-probed)));
+	  while ((probed += 8192) < frame_size);
 
 	  /* We only have to do this probe if we aren't saving registers.  */
 	  if (sa_size == 0 && probed + 4096 < frame_size)
-	    fprintf (file, "\tstq $31,-%d($30)\n", frame_size);
+	    emit_insn (gen_probe_stack (GEN_INT (-frame_size)));
 	}
 
       if (frame_size != 0)
-	fprintf (file, "\tlda $30,-%d($30)\n", frame_size);
+	{
+	  FRP (emit_insn (gen_adddi3 (stack_pointer_rtx, stack_pointer_rtx,
+				      GEN_INT (-frame_size))));
+	}
     }
   else
     {
-      /* Here we generate code to set R4 to SP + 4096 and set R5 to the
+      /* Here we generate code to set R22 to SP + 4096 and set R23 to the
 	 number of 8192 byte blocks to probe.  We then probe each block
 	 in the loop and then set SP to the proper location.  If the
 	 amount remaining is > 4096, we have to do one more probe if we
@@ -1430,182 +3517,588 @@ output_prolog (file, size)
 
       HOST_WIDE_INT blocks = (frame_size + 4096) / 8192;
       HOST_WIDE_INT leftover = frame_size + 4096 - blocks * 8192;
+      rtx ptr = gen_rtx_REG (DImode, 22);
+      rtx count = gen_rtx_REG (DImode, 23);
+      rtx seq;
 
-      add_long_const (file, blocks, 31, 5, 5);
+      emit_move_insn (count, GEN_INT (blocks));
+      emit_insn (gen_adddi3 (ptr, stack_pointer_rtx, GEN_INT (4096)));
 
-      fprintf (file, "\tlda $4,4096($30)\n");
+      /* Because of the difficulty in emitting a new basic block this
+	 late in the compilation, generate the loop as a single insn.  */
+      emit_insn (gen_prologue_stack_probe_loop (count, ptr));
 
-      assemble_name (file, alpha_function_name);
-      fprintf (file, "..sc:\n");
+      if (leftover > 4096 && sa_size == 0)
+	{
+	  rtx last = gen_rtx_MEM (DImode, plus_constant (ptr, -leftover));
+	  MEM_VOLATILE_P (last) = 1;
+	  emit_move_insn (last, const0_rtx);
+	}
 
-      fprintf (file, "\tstq $31,-8192($4)\n");
-      fprintf (file, "\tsubq $5,1,$5\n");
-      fprintf (file, "\tlda $4,-8192($4)\n");
+      if (TARGET_WINDOWS_NT)
+	{
+	  /* For NT stack unwind (done by 'reverse execution'), it's
+	     not OK to take the result of a loop, even though the value
+	     is already in ptr, so we reload it via a single operation
+	     and subtract it to sp. 
+
+	     Yes, that's correct -- we have to reload the whole constant
+	     into a temporary via ldah+lda then subtract from sp.  To
+	     ensure we get ldah+lda, we use a special pattern.  */
+
+	  HOST_WIDE_INT lo, hi;
+	  lo = ((frame_size & 0xffff) ^ 0x8000) - 0x8000;
+	  hi = frame_size - lo;
+
+	  emit_move_insn (ptr, GEN_INT (hi));
+	  emit_insn (gen_nt_lda (ptr, GEN_INT (lo)));
+	  seq = emit_insn (gen_subdi3 (stack_pointer_rtx, stack_pointer_rtx,
+				       ptr));
+	}
+      else
+	{
+	  seq = emit_insn (gen_adddi3 (stack_pointer_rtx, ptr,
+				       GEN_INT (-leftover)));
+	}
 
-      fprintf (file, "\tbne $5,");
-      assemble_name (file, alpha_function_name);
-      fprintf (file, "..sc\n");
+      /* This alternative is special, because the DWARF code cannot
+         possibly intuit through the loop above.  So we invent this
+         note it looks at instead.  */
+      RTX_FRAME_RELATED_P (seq) = 1;
+      REG_NOTES (seq)
+        = gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR,
+			     gen_rtx_SET (VOIDmode, stack_pointer_rtx,
+			       gen_rtx_PLUS (Pmode, stack_pointer_rtx,
+					     GEN_INT (-frame_size))),
+			     REG_NOTES (seq));
+    }
 
-      if (leftover > 4096 && sa_size == 0)
-	fprintf (file, "\tstq $31,-%d($4)\n", leftover);
+  /* Cope with very large offsets to the register save area.  */
+  sa_reg = stack_pointer_rtx;
+  if (reg_offset + sa_size > 0x8000)
+    {
+      int low = ((reg_offset & 0xffff) ^ 0x8000) - 0x8000;
+      HOST_WIDE_INT bias;
 
-      fprintf (file, "\tlda $30,-%d($4)\n", leftover);
-    }
+      if (low + sa_size <= 0x8000)
+	bias = reg_offset - low, reg_offset = low;
+      else 
+	bias = reg_offset, reg_offset = 0;
 
-  /* Describe our frame.  */
-  fprintf (file, "\t.frame $%d,%d,$26,%d\n", 
-	   (frame_pointer_needed
-	    ? HARD_FRAME_POINTER_REGNUM : STACK_POINTER_REGNUM),
-	   frame_size, current_function_pretend_args_size);
+      sa_reg = gen_rtx_REG (DImode, 24);
+      FRP (emit_insn (gen_adddi3 (sa_reg, stack_pointer_rtx, GEN_INT (bias))));
+    }
     
-  /* Save register 26 if any other register needs to be saved.  */
-  if (sa_size != 0)
+  /* Save regs in stack order.  Beginning with VMS PV.  */
+  if (TARGET_OPEN_VMS && vms_is_stack_procedure)
+    {
+      mem = gen_rtx_MEM (DImode, stack_pointer_rtx);
+      MEM_ALIAS_SET (mem) = alpha_sr_alias_set;
+      FRP (emit_move_insn (mem, gen_rtx_REG (DImode, REG_PV)));
+    }
+
+  /* Save register RA next.  */
+  if (imask & (1L << REG_RA))
     {
-      reg_mask |= 1 << 26;
-      fprintf (file, "\tstq $26,%d($30)\n", reg_offset);
+      mem = gen_rtx_MEM (DImode, plus_constant (sa_reg, reg_offset));
+      MEM_ALIAS_SET (mem) = alpha_sr_alias_set;
+      FRP (emit_move_insn (mem, gen_rtx_REG (DImode, REG_RA)));
+      imask &= ~(1L << REG_RA);
       reg_offset += 8;
-      int_reg_save_area_size += 8;
     }
 
-  /* Now save any other used integer registers required to be saved.  */
+  /* Now save any other registers required to be saved.  */
   for (i = 0; i < 32; i++)
-    if (! fixed_regs[i] && ! call_used_regs[i] && regs_ever_live[i] && i != 26)
+    if (imask & (1L << i))
       {
-	reg_mask |= 1 << i;
-	fprintf (file, "\tstq $%d,%d($30)\n", i, reg_offset);
+	mem = gen_rtx_MEM (DImode, plus_constant (sa_reg, reg_offset));
+	MEM_ALIAS_SET (mem) = alpha_sr_alias_set;
+	FRP (emit_move_insn (mem, gen_rtx_REG (DImode, i)));
 	reg_offset += 8;
-	int_reg_save_area_size += 8;
       }
 
-  /* Print the register mask and do floating-point saves.  */
-  if (reg_mask)
-    fprintf (file, "\t.mask 0x%x,%d\n", reg_mask,
-	     actual_start_reg_offset - frame_size);
-
-  start_reg_offset = reg_offset;
-  reg_mask = 0;
-
   for (i = 0; i < 32; i++)
-    if (! fixed_regs[i + 32] && ! call_used_regs[i + 32]
-	&& regs_ever_live[i + 32])
+    if (fmask & (1L << i))
       {
-	reg_mask |= 1 << i;
-	fprintf (file, "\tstt $f%d,%d($30)\n", i, reg_offset);
+	mem = gen_rtx_MEM (DFmode, plus_constant (sa_reg, reg_offset));
+	MEM_ALIAS_SET (mem) = alpha_sr_alias_set;
+	FRP (emit_move_insn (mem, gen_rtx_REG (DFmode, i+32)));
 	reg_offset += 8;
       }
 
-  /* Print the floating-point mask, if we've saved any fp register.  */
-  if (reg_mask)
-    fprintf (file, "\t.fmask 0x%x,%d\n", reg_mask,
-	     actual_start_reg_offset - frame_size + int_reg_save_area_size);
+  if (TARGET_OPEN_VMS)
+    {
+      if (!vms_is_stack_procedure)
+	{
+	  /* Register frame procedures fave the fp.  */
+	  FRP (emit_move_insn (gen_rtx_REG (DImode, vms_save_fp_regno),
+			       hard_frame_pointer_rtx));
+	}
+
+      if (vms_base_regno != REG_PV)
+	FRP (emit_move_insn (gen_rtx_REG (DImode, vms_base_regno),
+			     gen_rtx_REG (DImode, REG_PV)));
+
+      if (vms_unwind_regno == HARD_FRAME_POINTER_REGNUM)
+	{
+	  FRP (emit_move_insn (hard_frame_pointer_rtx, stack_pointer_rtx));
+	}
+
+      /* If we have to allocate space for outgoing args, do it now.  */
+      if (current_function_outgoing_args_size != 0)
+	{
+	  FRP (emit_move_insn (stack_pointer_rtx, 
+	        plus_constant (hard_frame_pointer_rtx,
+	         - ALPHA_ROUND (current_function_outgoing_args_size))));
+	}
+    }
+  else
+    {
+      /* If we need a frame pointer, set it from the stack pointer.  */
+      if (frame_pointer_needed)
+	{
+	  if (TARGET_CAN_FAULT_IN_PROLOGUE)
+	    FRP (emit_move_insn (hard_frame_pointer_rtx, stack_pointer_rtx));
+	  else
+	    {
+	      /* This must always be the last instruction in the
+		 prologue, thus we emit a special move + clobber.  */
+	      FRP (emit_insn (gen_init_fp (hard_frame_pointer_rtx,
+				           stack_pointer_rtx, sa_reg)));
+	    }
+	}
+    }
 
-  /* If we need a frame pointer, set it from the stack pointer.  Note that
-     this must always be the last instruction in the prologue.  */
-  if (frame_pointer_needed)
-    fprintf (file, "\tbis $30,$30,$15\n");
+  /* The ABIs for VMS and OSF/1 say that while we can schedule insns into
+     the prologue, for exception handling reasons, we cannot do this for
+     any insn that might fault.  We could prevent this for mems with a
+     (clobber:BLK (scratch)), but this doesn't work for fp insns.  So we
+     have to prevent all such scheduling with a blockage.
 
-  /* End the prologue and say if we used gp.  */
-  fprintf (file, "\t.prologue %d\n", alpha_function_needs_gp);
+     Linux, on the other hand, never bothered to implement OSF/1's 
+     exception handling, and so doesn't care about such things.  Anyone
+     planning to use dwarf2 frame-unwind info can also omit the blockage.  */
+
+  if (! TARGET_CAN_FAULT_IN_PROLOGUE)
+    emit_insn (gen_blockage ());
 }
 
-/* Write function epilogue.  */
+/* Output the textual info surrounding the prologue.  */
 
 void
-output_epilog (file, size)
+alpha_start_function (file, fnname, decl)
      FILE *file;
-     int size;
-{
-  rtx insn = get_last_insn ();
-  HOST_WIDE_INT out_args_size
-    = ALPHA_ROUND (current_function_outgoing_args_size);
-  HOST_WIDE_INT sa_size = alpha_sa_size ();
-  HOST_WIDE_INT frame_size
-    = (out_args_size + sa_size
-       + ALPHA_ROUND (size + current_function_pretend_args_size));
-  HOST_WIDE_INT reg_offset = out_args_size;
-  HOST_WIDE_INT frame_size_from_reg_save = frame_size - reg_offset;
-  int restore_fp
-    = frame_pointer_needed && regs_ever_live[HARD_FRAME_POINTER_REGNUM];
+     char *fnname;
+     tree decl ATTRIBUTE_UNUSED;
+{
+  unsigned long imask = 0;
+  unsigned long fmask = 0;
+  /* Stack space needed for pushing registers clobbered by us.  */
+  HOST_WIDE_INT sa_size;
+  /* Complete stack size needed.  */
+  HOST_WIDE_INT frame_size;
+  /* Offset from base reg to register save area.  */
+  HOST_WIDE_INT reg_offset;
+  char *entry_label = (char *) alloca (strlen (fnname) + 6);
   int i;
 
-  /* If the last insn was a BARRIER, we don't have to write anything except
-     the .end pseudo-op.  */
-  if (GET_CODE (insn) == NOTE)
-    insn = prev_nonnote_insn (insn);
-  if (insn == 0 || GET_CODE (insn) != BARRIER)
+  sa_size = alpha_sa_size ();
+
+  frame_size = get_frame_size ();
+  if (TARGET_OPEN_VMS)
+    frame_size = ALPHA_ROUND (sa_size 
+			      + (vms_is_stack_procedure ? 8 : 0)
+			      + frame_size
+			      + current_function_pretend_args_size);
+  else
+    frame_size = (ALPHA_ROUND (current_function_outgoing_args_size)
+		  + sa_size
+		  + ALPHA_ROUND (frame_size
+				 + current_function_pretend_args_size));
+
+  if (TARGET_OPEN_VMS)
+    reg_offset = 8;
+  else
+    reg_offset = ALPHA_ROUND (current_function_outgoing_args_size);
+
+  alpha_sa_mask (&imask, &fmask);
+
+  /* Ecoff can handle multiple .file directives, so put out file and lineno.
+     We have to do that before the .ent directive as we cannot switch
+     files within procedures with native ecoff because line numbers are
+     linked to procedure descriptors.
+     Outputting the lineno helps debugging of one line functions as they
+     would otherwise get no line number at all. Please note that we would
+     like to put out last_linenum from final.c, but it is not accessible.  */
+
+  if (write_symbols == SDB_DEBUG)
+    {
+      ASM_OUTPUT_SOURCE_FILENAME (file,
+				  DECL_SOURCE_FILE (current_function_decl));
+      if (debug_info_level != DINFO_LEVEL_TERSE)
+        ASM_OUTPUT_SOURCE_LINE (file,
+				DECL_SOURCE_LINE (current_function_decl));
+    }
+
+  /* Issue function start and label.  */
+  if (TARGET_OPEN_VMS || !flag_inhibit_size_directive)
     {
-      int fp_offset = 0;
+      fputs ("\t.ent ", file);
+      assemble_name (file, fnname);
+      putc ('\n', file);
+    }
+
+  strcpy (entry_label, fnname);
+  if (TARGET_OPEN_VMS)
+    strcat (entry_label, "..en");
+  ASM_OUTPUT_LABEL (file, entry_label);
+  inside_function = TRUE;
+
+  if (TARGET_OPEN_VMS)
+    fprintf (file, "\t.base $%d\n", vms_base_regno);
+
+  if (!TARGET_OPEN_VMS && TARGET_IEEE_CONFORMANT
+      && !flag_inhibit_size_directive)
+    {
+      /* Set flags in procedure descriptor to request IEEE-conformant
+	 math-library routines.  The value we set it to is PDSC_EXC_IEEE
+	 (/usr/include/pdsc.h). */
+      fputs ("\t.eflag 48\n", file);
+    }
+
+  /* Set up offsets to alpha virtual arg/local debugging pointer.  */
+  alpha_auto_offset = -frame_size + current_function_pretend_args_size;
+  alpha_arg_offset = -frame_size + 48;
+
+  /* Describe our frame.  If the frame size is larger than an integer,
+     print it as zero to avoid an assembler error.  We won't be
+     properly describing such a frame, but that's the best we can do.  */
+  if (TARGET_OPEN_VMS)
+    {
+      fprintf (file, "\t.frame $%d,", vms_unwind_regno);
+      fprintf (file, HOST_WIDE_INT_PRINT_DEC,
+	       frame_size >= (1l << 31) ? 0 : frame_size);
+      fputs (",$26,", file);
+      fprintf (file, HOST_WIDE_INT_PRINT_DEC, reg_offset);
+      fputs ("\n", file);
+    }
+  else if (!flag_inhibit_size_directive)
+    {
+      fprintf (file, "\t.frame $%d,",
+	       (frame_pointer_needed
+		? HARD_FRAME_POINTER_REGNUM : STACK_POINTER_REGNUM));
+      fprintf (file, HOST_WIDE_INT_PRINT_DEC,
+	       frame_size >= (1l << 31) ? 0 : frame_size);
+      fprintf (file, ",$26,%d\n", current_function_pretend_args_size);
+    }
+
+  /* Describe which registers were spilled.  */
+  if (TARGET_OPEN_VMS)
+    {
+      if (imask)
+        /* ??? Does VMS care if mask contains ra?  The old code did'nt
+           set it, so I don't here.  */
+	fprintf (file, "\t.mask 0x%lx,0\n", imask & ~(1L << REG_RA));
+      if (fmask)
+	fprintf (file, "\t.fmask 0x%lx,0\n", fmask);
+      if (!vms_is_stack_procedure)
+	fprintf (file, "\t.fp_save $%d\n", vms_save_fp_regno);
+    }
+  else if (!flag_inhibit_size_directive)
+    {
+      if (imask)
+	{
+	  fprintf (file, "\t.mask 0x%lx,", imask);
+	  fprintf (file, HOST_WIDE_INT_PRINT_DEC,
+		   frame_size >= (1l << 31) ? 0 : reg_offset - frame_size);
+	  putc ('\n', file);
+
+	  for (i = 0; i < 32; ++i)
+	    if (imask & (1L << i))
+	      reg_offset += 8;
+	}
+
+      if (fmask)
+	{
+	  fprintf (file, "\t.fmask 0x%lx,", fmask);
+	  fprintf (file, HOST_WIDE_INT_PRINT_DEC,
+		   frame_size >= (1l << 31) ? 0 : reg_offset - frame_size);
+	  putc ('\n', file);
+	}
+    }
+
+  /* Emit GP related things.  It is rather unfortunate about the alignment
+     issues surrounding a CODE_LABEL that forces us to do the label in 
+     plain text.  */
+  if (!TARGET_OPEN_VMS && !TARGET_WINDOWS_NT)
+    {
+      alpha_function_needs_gp = alpha_does_function_need_gp ();
+      if (alpha_function_needs_gp)
+	fputs ("\tldgp $29,0($27)\n", file);
 
+      putc ('$', file);
+      assemble_name (file, fnname);
+      fputs ("..ng:\n", file);
+    }
+
+#ifdef OPEN_VMS
+  /* Ifdef'ed cause readonly_section and link_section are only
+     available then.  */
+  readonly_section ();
+  fprintf (file, "\t.align 3\n");
+  assemble_name (file, fnname); fputs ("..na:\n", file);
+  fputs ("\t.ascii \"", file);
+  assemble_name (file, fnname);
+  fputs ("\\0\"\n", file);
+      
+  link_section ();
+  fprintf (file, "\t.align 3\n");
+  fputs ("\t.name ", file);
+  assemble_name (file, fnname);
+  fputs ("..na\n", file);
+  ASM_OUTPUT_LABEL (file, fnname);
+  fprintf (file, "\t.pdesc ");
+  assemble_name (file, fnname);
+  fprintf (file, "..en,%s\n", vms_is_stack_procedure ? "stack" : "reg");
+  alpha_need_linkage (fnname, 1);
+  text_section ();
+#endif
+}
+
+/* Emit the .prologue note at the scheduled end of the prologue.  */
+
+void
+output_end_prologue (file)
+     FILE *file;
+{
+  if (TARGET_OPEN_VMS)
+    fputs ("\t.prologue\n", file);
+  else if (TARGET_WINDOWS_NT)
+    fputs ("\t.prologue 0\n", file);
+  else if (!flag_inhibit_size_directive)
+    fprintf (file, "\t.prologue %d\n", alpha_function_needs_gp);
+}
+
+/* Write function epilogue.  */
+
+/* ??? At some point we will want to support full unwind, and so will 
+   need to mark the epilogue as well.  At the moment, we just confuse
+   dwarf2out.  */
+#undef FRP
+#define FRP(exp) exp
+
+void
+alpha_expand_epilogue ()
+{
+  /* Registers to save.  */
+  unsigned long imask = 0;
+  unsigned long fmask = 0;
+  /* Stack space needed for pushing registers clobbered by us.  */
+  HOST_WIDE_INT sa_size;
+  /* Complete stack size needed.  */
+  HOST_WIDE_INT frame_size;
+  /* Offset from base reg to register save area.  */
+  HOST_WIDE_INT reg_offset;
+  int fp_is_frame_pointer, fp_offset;
+  rtx sa_reg, sa_reg_exp = NULL;
+  rtx sp_adj1, sp_adj2, mem;
+  int i;
+
+  sa_size = alpha_sa_size ();
+
+  frame_size = get_frame_size ();
+  if (TARGET_OPEN_VMS)
+    frame_size = ALPHA_ROUND (sa_size 
+			      + (vms_is_stack_procedure ? 8 : 0)
+			      + frame_size
+			      + current_function_pretend_args_size);
+  else
+    frame_size = (ALPHA_ROUND (current_function_outgoing_args_size)
+		  + sa_size
+		  + ALPHA_ROUND (frame_size
+				 + current_function_pretend_args_size));
+
+  if (TARGET_OPEN_VMS)
+    reg_offset = 8;
+  else
+    reg_offset = ALPHA_ROUND (current_function_outgoing_args_size);
+
+  alpha_sa_mask (&imask, &fmask);
+
+  fp_is_frame_pointer = ((TARGET_OPEN_VMS && vms_is_stack_procedure)
+			 || (!TARGET_OPEN_VMS && frame_pointer_needed));
+
+  if (sa_size)
+    {
       /* If we have a frame pointer, restore SP from it.  */
-      if (frame_pointer_needed)
-	fprintf (file, "\tbis $15,$15,$30\n");
+      if ((TARGET_OPEN_VMS
+	   && vms_unwind_regno == HARD_FRAME_POINTER_REGNUM)
+	  || (!TARGET_OPEN_VMS && frame_pointer_needed))
+	{
+	  FRP (emit_move_insn (stack_pointer_rtx, hard_frame_pointer_rtx));
+	}
 
-      /* Restore all the registers, starting with the return address
-	 register.  */
-      if (sa_size != 0)
+      /* Cope with very large offsets to the register save area.  */
+      sa_reg = stack_pointer_rtx;
+      if (reg_offset + sa_size > 0x8000)
 	{
-	  fprintf (file, "\tldq $26,%d($30)\n", reg_offset);
-	  reg_offset += 8;
+	  int low = ((reg_offset & 0xffff) ^ 0x8000) - 0x8000;
+	  HOST_WIDE_INT bias;
+
+	  if (low + sa_size <= 0x8000)
+	    bias = reg_offset - low, reg_offset = low;
+	  else 
+	    bias = reg_offset, reg_offset = 0;
+
+	  sa_reg = gen_rtx_REG (DImode, 22);
+	  sa_reg_exp = plus_constant (stack_pointer_rtx, bias);
+
+	  FRP (emit_move_insn (sa_reg, sa_reg_exp));
 	}
+	  
+      /* Restore registers in order, excepting a true frame pointer. */
 
-      /* Now restore any other used integer registers that that we saved,
-	 except for FP if it is being used as FP, since it must be
-	 restored last.  */
+      if (! alpha_eh_epilogue_sp_ofs)
+	{
+	  mem = gen_rtx_MEM (DImode, plus_constant(sa_reg, reg_offset));
+	  MEM_ALIAS_SET (mem) = alpha_sr_alias_set;
+          FRP (emit_move_insn (gen_rtx_REG (DImode, REG_RA), mem));
+	}
+      reg_offset += 8;
+      imask &= ~(1L << REG_RA);
 
-      for (i = 0; i < 32; i++)
-	if (! fixed_regs[i] && ! call_used_regs[i] && regs_ever_live[i]
-	    && i != 26)
+      for (i = 0; i < 32; ++i)
+	if (imask & (1L << i))
 	  {
-	    if (i == HARD_FRAME_POINTER_REGNUM && frame_pointer_needed)
+	    if (i == HARD_FRAME_POINTER_REGNUM && fp_is_frame_pointer)
 	      fp_offset = reg_offset;
 	    else
-	      fprintf (file, "\tldq $%d,%d($30)\n", i, reg_offset);
+	      {
+		mem = gen_rtx_MEM (DImode, plus_constant(sa_reg, reg_offset));
+		MEM_ALIAS_SET (mem) = alpha_sr_alias_set;
+		FRP (emit_move_insn (gen_rtx_REG (DImode, i), mem));
+	      }
 	    reg_offset += 8;
 	  }
 
-      for (i = 0; i < 32; i++)
-	if (! fixed_regs[i + 32] && ! call_used_regs[i + 32]
-	    && regs_ever_live[i + 32])
+      for (i = 0; i < 32; ++i)
+	if (fmask & (1L << i))
 	  {
-	    fprintf (file, "\tldt $f%d,%d($30)\n", i, reg_offset);
+	    mem = gen_rtx_MEM (DFmode, plus_constant(sa_reg, reg_offset));
+	    MEM_ALIAS_SET (mem) = alpha_sr_alias_set;
+	    FRP (emit_move_insn (gen_rtx_REG (DFmode, i+32), mem));
 	    reg_offset += 8;
 	  }
+    }
+
+  if (frame_size || alpha_eh_epilogue_sp_ofs)
+    {
+      sp_adj1 = stack_pointer_rtx;
+
+      if (alpha_eh_epilogue_sp_ofs)
+	{
+	  sp_adj1 = gen_rtx_REG (DImode, 23);
+	  emit_move_insn (sp_adj1,
+			  gen_rtx_PLUS (Pmode, stack_pointer_rtx,
+					alpha_eh_epilogue_sp_ofs));
+	}
 
-      /* If the stack size is large and we have a frame pointer, compute the
-	 size of the stack into a register because the old FP restore, stack
-	 pointer adjust, and return are required to be consecutive
-	 instructions.   */
-      if (frame_size > 32767 && restore_fp)
-	add_long_const (file, frame_size, 31, 1, 1);
-
-      /* If we needed a frame pointer and we have to restore it, do it
-	 now.  This must be done in one instruction immediately
-	 before the SP update.  */
-      if (restore_fp && fp_offset)
-	fprintf (file, "\tldq $15,%d($30)\n", fp_offset);
-
-      /* Now update the stack pointer, if needed.  Only one instruction must
-	 modify the stack pointer.  It must be the last instruction in the
-	 sequence and must be an ADDQ or LDA instruction.  If the frame
-	 pointer was loaded above, we may only put one instruction here.  */
-
-      if (frame_size > 32768 && restore_fp)
-	fprintf  (file, "\taddq $1,$30,$30\n");
+      /* If the stack size is large, begin computation into a temporary
+	 register so as not to interfere with a potential fp restore,
+	 which must be consecutive with an SP restore.  */
+      if (frame_size < 32768)
+	sp_adj2 = GEN_INT (frame_size);
+      else if (frame_size < 0x40007fffL)
+	{
+	  int low = ((frame_size & 0xffff) ^ 0x8000) - 0x8000;
+
+	  sp_adj2 = plus_constant (sp_adj1, frame_size - low);
+	  if (sa_reg_exp && rtx_equal_p (sa_reg_exp, sp_adj2))
+	    sp_adj1 = sa_reg;
+	  else
+	    {
+	      sp_adj1 = gen_rtx_REG (DImode, 23);
+	      FRP (emit_move_insn (sp_adj1, sp_adj2));
+	    }
+	  sp_adj2 = GEN_INT (low);
+	}
       else
-	add_long_const (file, frame_size, 30, 30, 1);
+	{
+	  rtx tmp = gen_rtx_REG (DImode, 23);
+	  FRP (sp_adj2 = alpha_emit_set_const (tmp, DImode, frame_size, 3));
+	  if (!sp_adj2)
+	    {
+	      /* We can't drop new things to memory this late, afaik,
+		 so build it up by pieces.  */
+	      FRP (sp_adj2 = alpha_emit_set_long_const (tmp, frame_size,
+							-(frame_size < 0)));
+	      if (!sp_adj2)
+		abort ();
+	    }
+	}
+
+      /* From now on, things must be in order.  So emit blockages.  */
 
-      /* Finally return to the caller.  */
-      fprintf (file, "\tret $31,($26),1\n");
+      /* Restore the frame pointer.  */
+      if (fp_is_frame_pointer)
+	{
+	  emit_insn (gen_blockage ());
+	  mem = gen_rtx_MEM (DImode, plus_constant(sa_reg, fp_offset));
+	  MEM_ALIAS_SET (mem) = alpha_sr_alias_set;
+	  FRP (emit_move_insn (hard_frame_pointer_rtx, mem));
+	}
+      else if (TARGET_OPEN_VMS)
+	{
+	  emit_insn (gen_blockage ());
+	  FRP (emit_move_insn (hard_frame_pointer_rtx,
+			       gen_rtx_REG (DImode, vms_save_fp_regno)));
+	}
+
+      /* Restore the stack pointer.  */
+      emit_insn (gen_blockage ());
+      FRP (emit_move_insn (stack_pointer_rtx,
+		           gen_rtx_PLUS (DImode, sp_adj1, sp_adj2)));
+    }
+  else 
+    {
+      if (TARGET_OPEN_VMS && !vms_is_stack_procedure)
+        {
+          emit_insn (gen_blockage ());
+          FRP (emit_move_insn (hard_frame_pointer_rtx,
+			       gen_rtx_REG (DImode, vms_save_fp_regno)));
+        }
     }
 
+  /* Return.  */
+  emit_jump_insn (gen_return_internal ());
+}
+
+/* Output the rest of the textual info surrounding the epilogue.  */
+
+void
+alpha_end_function (file, fnname, decl)
+     FILE *file;
+     char *fnname;
+     tree decl ATTRIBUTE_UNUSED;
+{
   /* End the function.  */
-  fprintf (file, "\t.end ");
-  assemble_name (file, alpha_function_name);
-  fprintf (file, "\n");
+  if (!flag_inhibit_size_directive)
+    {
+      fputs ("\t.end ", file);
+      assemble_name (file, fnname);
+      putc ('\n', file);
+    }
   inside_function = FALSE;
 
-  /* Show that we know this function if it is called again.  */
-  SYMBOL_REF_FLAG (XEXP (DECL_RTL (current_function_decl), 0)) = 1;
+  /* Show that we know this function if it is called again. 
+
+     Don't do this for global functions in object files destined for a
+     shared library because the function may be overridden by the application
+     or other libraries.  Similarly, don't do this for weak functions.  */
+
+  if (!DECL_WEAK (current_function_decl)
+      && (!flag_pic || !TREE_PUBLIC (current_function_decl)))
+    SYMBOL_REF_FLAG (XEXP (DECL_RTL (current_function_decl), 0)) = 1;
 }
 
 /* Debugging support.  */
@@ -1627,7 +4120,7 @@ static int num_source_filenames = 0;
 
 /* Name of the file containing the current function.  */
 
-static char *current_function_file = "";
+static const char *current_function_file = "";
 
 /* Offsets to alpha virtual arg/local debugging pointers.  */
 
@@ -1656,7 +4149,7 @@ alpha_output_filename (stream, name)
 	fprintf (stream, "\t#@stabs\n");
     }
 
-  else if (!TARGET_GAS && write_symbols == DBX_DEBUG)
+  else if (write_symbols == DBX_DEBUG)
     {
       ASM_GENERATE_INTERNAL_LABEL (ltext_label_name, "Ltext", 0);
       fprintf (stream, "%s ", ASM_STABS_OP);
@@ -1665,7 +4158,7 @@ alpha_output_filename (stream, name)
     }
 
   else if (name != current_function_file
-      && strcmp (name, current_function_file) != 0)
+	   && strcmp (name, current_function_file) != 0)
     {
       if (inside_function && ! TARGET_GAS)
 	fprintf (stream, "\t#.file\t%d ", num_source_filenames);
@@ -1688,7 +4181,7 @@ alpha_output_lineno (stream, line)
      FILE *stream;
      int line;
 {
-  if (! TARGET_GAS && write_symbols == DBX_DEBUG)
+  if (write_symbols == DBX_DEBUG)
     {
       /* mips-tfile doesn't understand .stabd directives.  */
       ++sym_lineno;
@@ -1698,3 +4191,1100 @@ alpha_output_lineno (stream, line)
   else
     fprintf (stream, "\n\t.loc\t%d %d\n", num_source_filenames, line);
 }
+
+/* Structure to show the current status of registers and memory.  */
+
+struct shadow_summary
+{
+  struct {
+    unsigned long i     : 31;	/* Mask of int regs */
+    unsigned long fp    : 31;	/* Mask of fp regs */
+    unsigned long mem   :  1;	/* mem == imem | fpmem */
+  } used, defd;
+};
+
+static void summarize_insn PROTO((rtx, struct shadow_summary *, int));
+static void alpha_handle_trap_shadows PROTO((rtx));
+
+/* Summary the effects of expression X on the machine.  Update SUM, a pointer
+   to the summary structure.  SET is nonzero if the insn is setting the
+   object, otherwise zero.  */
+
+static void
+summarize_insn (x, sum, set)
+     rtx x;
+     struct shadow_summary *sum;
+     int set;
+{
+  char *format_ptr;
+  int i, j;
+
+  if (x == 0)
+    return;
+
+  switch (GET_CODE (x))
+    {
+      /* ??? Note that this case would be incorrect if the Alpha had a
+	 ZERO_EXTRACT in SET_DEST.  */
+    case SET:
+      summarize_insn (SET_SRC (x), sum, 0);
+      summarize_insn (SET_DEST (x), sum, 1);
+      break;
+
+    case CLOBBER:
+      summarize_insn (XEXP (x, 0), sum, 1);
+      break;
+
+    case USE:
+      summarize_insn (XEXP (x, 0), sum, 0);
+      break;
+
+    case ASM_OPERANDS:
+      for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
+	summarize_insn (ASM_OPERANDS_INPUT (x, i), sum, 0);
+      break;
+
+    case PARALLEL:
+      for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
+	summarize_insn (XVECEXP (x, 0, i), sum, 0);
+      break;
+
+    case SUBREG:
+      summarize_insn (SUBREG_REG (x), sum, 0);
+      break;
+
+    case REG:
+      {
+	int regno = REGNO (x);
+	unsigned long mask = 1UL << (regno % 32);
+
+	if (regno == 31 || regno == 63)
+	  break;
+
+	if (set)
+	  {
+	    if (regno < 32)
+	      sum->defd.i |= mask;
+	    else
+	      sum->defd.fp |= mask;
+	  }
+	else
+	  {
+	    if (regno < 32)
+	      sum->used.i  |= mask;
+	    else
+	      sum->used.fp |= mask;
+	  }
+	}
+      break;
+
+    case MEM:
+      if (set)
+	sum->defd.mem = 1;
+      else
+	sum->used.mem = 1;
+
+      /* Find the regs used in memory address computation: */
+      summarize_insn (XEXP (x, 0), sum, 0);
+      break;
+
+    case CONST_INT:   case CONST_DOUBLE:
+    case SYMBOL_REF:  case LABEL_REF:     case CONST:
+      break;
+
+      /* Handle common unary and binary ops for efficiency.  */
+    case COMPARE:  case PLUS:    case MINUS:   case MULT:      case DIV:
+    case MOD:      case UDIV:    case UMOD:    case AND:       case IOR:
+    case XOR:      case ASHIFT:  case ROTATE:  case ASHIFTRT:  case LSHIFTRT:
+    case ROTATERT: case SMIN:    case SMAX:    case UMIN:      case UMAX:
+    case NE:       case EQ:      case GE:      case GT:        case LE:
+    case LT:       case GEU:     case GTU:     case LEU:       case LTU:
+      summarize_insn (XEXP (x, 0), sum, 0);
+      summarize_insn (XEXP (x, 1), sum, 0);
+      break;
+
+    case NEG:  case NOT:  case SIGN_EXTEND:  case ZERO_EXTEND:
+    case TRUNCATE:  case FLOAT_EXTEND:  case FLOAT_TRUNCATE:  case FLOAT:
+    case FIX:  case UNSIGNED_FLOAT:  case UNSIGNED_FIX:  case ABS:
+    case SQRT:  case FFS: 
+      summarize_insn (XEXP (x, 0), sum, 0);
+      break;
+
+    default:
+      format_ptr = GET_RTX_FORMAT (GET_CODE (x));
+      for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
+	switch (format_ptr[i])
+	  {
+	  case 'e':
+	    summarize_insn (XEXP (x, i), sum, 0);
+	    break;
+
+	  case 'E':
+	    for (j = XVECLEN (x, i) - 1; j >= 0; j--)
+	      summarize_insn (XVECEXP (x, i, j), sum, 0);
+	    break;
+
+	  case 'i':
+	    break;
+
+	  default:
+	    abort ();
+	  }
+    }
+}
+
+/* Ensure a sufficient number of `trapb' insns are in the code when
+   the user requests code with a trap precision of functions or
+   instructions.
+
+   In naive mode, when the user requests a trap-precision of
+   "instruction", a trapb is needed after every instruction that may
+   generate a trap.  This ensures that the code is resumption safe but
+   it is also slow.
+
+   When optimizations are turned on, we delay issuing a trapb as long
+   as possible.  In this context, a trap shadow is the sequence of
+   instructions that starts with a (potentially) trap generating
+   instruction and extends to the next trapb or call_pal instruction
+   (but GCC never generates call_pal by itself).  We can delay (and
+   therefore sometimes omit) a trapb subject to the following
+   conditions:
+
+   (a) On entry to the trap shadow, if any Alpha register or memory
+   location contains a value that is used as an operand value by some
+   instruction in the trap shadow (live on entry), then no instruction
+   in the trap shadow may modify the register or memory location.
+
+   (b) Within the trap shadow, the computation of the base register
+   for a memory load or store instruction may not involve using the
+   result of an instruction that might generate an UNPREDICTABLE
+   result.
+
+   (c) Within the trap shadow, no register may be used more than once
+   as a destination register.  (This is to make life easier for the
+   trap-handler.)
+
+   (d) The trap shadow may not include any branch instructions.  */
+
+static void
+alpha_handle_trap_shadows (insns)
+     rtx insns;
+{
+  struct shadow_summary shadow;
+  int trap_pending, exception_nesting;
+  rtx i, n;
+
+  trap_pending = 0;
+  exception_nesting = 0;
+  shadow.used.i = 0;
+  shadow.used.fp = 0;
+  shadow.used.mem = 0;
+  shadow.defd = shadow.used;
+  
+  for (i = insns; i ; i = NEXT_INSN (i))
+    {
+      if (GET_CODE (i) == NOTE)
+	{
+	  switch (NOTE_LINE_NUMBER (i))
+	    {
+	    case NOTE_INSN_EH_REGION_BEG:
+	      exception_nesting++;
+	      if (trap_pending)
+		goto close_shadow;
+	      break;
+
+	    case NOTE_INSN_EH_REGION_END:
+	      exception_nesting--;
+	      if (trap_pending)
+		goto close_shadow;
+	      break;
+
+	    case NOTE_INSN_EPILOGUE_BEG:
+	      if (trap_pending && alpha_tp >= ALPHA_TP_FUNC)
+		goto close_shadow;
+	      break;
+	    }
+	}
+      else if (trap_pending)
+	{
+	  if (alpha_tp == ALPHA_TP_FUNC)
+	    {
+	      if (GET_CODE (i) == JUMP_INSN
+		  && GET_CODE (PATTERN (i)) == RETURN)
+		goto close_shadow;
+	    }
+	  else if (alpha_tp == ALPHA_TP_INSN)
+	    {
+	      if (optimize > 0)
+		{
+		  struct shadow_summary sum;
+
+		  sum.used.i = 0;
+		  sum.used.fp = 0;
+		  sum.used.mem = 0;
+		  sum.defd = sum.used;
+
+		  switch (GET_CODE (i))
+		    {
+		    case INSN:
+		      /* Annoyingly, get_attr_trap will abort on these.  */
+		      if (GET_CODE (PATTERN (i)) == USE
+			  || GET_CODE (PATTERN (i)) == CLOBBER)
+			break;
+
+		      summarize_insn (PATTERN (i), &sum, 0);
+
+		      if ((sum.defd.i & shadow.defd.i)
+			  || (sum.defd.fp & shadow.defd.fp))
+			{
+			  /* (c) would be violated */
+			  goto close_shadow;
+			}
+
+		      /* Combine shadow with summary of current insn: */
+		      shadow.used.i   |= sum.used.i;
+		      shadow.used.fp  |= sum.used.fp;
+		      shadow.used.mem |= sum.used.mem;
+		      shadow.defd.i   |= sum.defd.i;
+		      shadow.defd.fp  |= sum.defd.fp;
+		      shadow.defd.mem |= sum.defd.mem;
+
+		      if ((sum.defd.i & shadow.used.i)
+			  || (sum.defd.fp & shadow.used.fp)
+			  || (sum.defd.mem & shadow.used.mem))
+			{
+			  /* (a) would be violated (also takes care of (b))  */
+			  if (get_attr_trap (i) == TRAP_YES
+			      && ((sum.defd.i & sum.used.i)
+				  || (sum.defd.fp & sum.used.fp)))
+			    abort ();
+
+			  goto close_shadow;
+			}
+		      break;
+
+		    case JUMP_INSN:
+		    case CALL_INSN:
+		    case CODE_LABEL:
+		      goto close_shadow;
+
+		    default:
+		      abort ();
+		    }
+		}
+	      else
+		{
+		close_shadow:
+		  n = emit_insn_before (gen_trapb (), i);
+		  PUT_MODE (n, TImode);
+		  PUT_MODE (i, TImode);
+		  trap_pending = 0;
+		  shadow.used.i = 0;
+		  shadow.used.fp = 0;
+		  shadow.used.mem = 0;
+		  shadow.defd = shadow.used;
+		}
+	    }
+	}
+
+      if ((exception_nesting > 0 || alpha_tp >= ALPHA_TP_FUNC)
+	  && GET_CODE (i) == INSN
+	  && GET_CODE (PATTERN (i)) != USE
+	  && GET_CODE (PATTERN (i)) != CLOBBER
+	  && get_attr_trap (i) == TRAP_YES)
+	{
+	  if (optimize && !trap_pending)
+	    summarize_insn (PATTERN (i), &shadow, 0);
+	  trap_pending = 1;
+	}
+    }
+}
+
+#ifdef HAIFA
+/* Alpha can only issue instruction groups simultaneously if they are
+   suitibly aligned.  This is very processor-specific.  */
+
+enum alphaev4_pipe {
+  EV4_STOP = 0,
+  EV4_IB0 = 1,
+  EV4_IB1 = 2,
+  EV4_IBX = 4
+};
+
+enum alphaev5_pipe {
+  EV5_STOP = 0,
+  EV5_NONE = 1,
+  EV5_E01 = 2,
+  EV5_E0 = 4,
+  EV5_E1 = 8,
+  EV5_FAM = 16,
+  EV5_FA = 32,
+  EV5_FM = 64
+};
+
+static enum alphaev4_pipe alphaev4_insn_pipe PROTO((rtx));
+static enum alphaev5_pipe alphaev5_insn_pipe PROTO((rtx));
+static rtx alphaev4_next_group PROTO((rtx, int*, int*));
+static rtx alphaev5_next_group PROTO((rtx, int*, int*));
+static rtx alphaev4_next_nop PROTO((int*));
+static rtx alphaev5_next_nop PROTO((int*));
+
+static void alpha_align_insns
+  PROTO((rtx, int, rtx (*)(rtx, int*, int*), rtx (*)(int*), int));
+
+static enum alphaev4_pipe
+alphaev4_insn_pipe (insn)
+     rtx insn;
+{
+  if (recog_memoized (insn) < 0)
+    return EV4_STOP;
+  if (get_attr_length (insn) != 4)
+    return EV4_STOP;
+
+  switch (get_attr_type (insn))
+    {
+    case TYPE_ILD:
+    case TYPE_FLD:
+      return EV4_IBX;
+
+    case TYPE_LDSYM:
+    case TYPE_IADD:
+    case TYPE_ILOG:
+    case TYPE_ICMOV:
+    case TYPE_ICMP:
+    case TYPE_IST:
+    case TYPE_FST:
+    case TYPE_SHIFT:
+    case TYPE_IMUL:
+    case TYPE_FBR:
+      return EV4_IB0;
+
+    case TYPE_MISC:
+    case TYPE_IBR:
+    case TYPE_JSR:
+    case TYPE_FCPYS:
+    case TYPE_FCMOV:
+    case TYPE_FADD:
+    case TYPE_FDIV:
+    case TYPE_FMUL:
+      return EV4_IB1;
+
+    default:
+      abort();
+    }
+}
+
+static enum alphaev5_pipe
+alphaev5_insn_pipe (insn)
+     rtx insn;
+{
+  if (recog_memoized (insn) < 0)
+    return EV5_STOP;
+  if (get_attr_length (insn) != 4)
+    return EV5_STOP;
+
+  switch (get_attr_type (insn))
+    {
+    case TYPE_ILD:
+    case TYPE_FLD:
+    case TYPE_LDSYM:
+    case TYPE_IADD:
+    case TYPE_ILOG:
+    case TYPE_ICMOV:
+    case TYPE_ICMP:
+      return EV5_E01;
+
+    case TYPE_IST:
+    case TYPE_FST:
+    case TYPE_SHIFT:
+    case TYPE_IMUL:
+    case TYPE_MISC:
+    case TYPE_MVI:
+      return EV5_E0;
+
+    case TYPE_IBR:
+    case TYPE_JSR:
+      return EV5_E1;
+
+    case TYPE_FCPYS:
+      return EV5_FAM;
+
+    case TYPE_FBR:
+    case TYPE_FCMOV:
+    case TYPE_FADD:
+    case TYPE_FDIV:
+      return EV5_FA;
+
+    case TYPE_FMUL:
+      return EV5_FM;
+
+    default:
+      abort();
+    }
+}
+
+/* IN_USE is a mask of the slots currently filled within the insn group. 
+   The mask bits come from alphaev4_pipe above.  If EV4_IBX is set, then
+   the insn in EV4_IB0 can be swapped by the hardware into EV4_IB1. 
+
+   LEN is, of course, the length of the group in bytes.  */
+
+static rtx
+alphaev4_next_group (insn, pin_use, plen)
+     rtx insn;
+     int *pin_use, *plen;
+{
+  int len, in_use;
+
+  len = in_use = 0;
+
+  if (GET_RTX_CLASS (GET_CODE (insn)) != 'i'
+      || GET_CODE (PATTERN (insn)) == CLOBBER
+      || GET_CODE (PATTERN (insn)) == USE)
+    goto next_and_done;
+
+  while (1)
+    {
+      enum alphaev4_pipe pipe;
+
+      pipe = alphaev4_insn_pipe (insn);
+      switch (pipe)
+	{
+	case EV4_STOP:
+	  /* Force complex instructions to start new groups.  */
+	  if (in_use)
+	    goto done;
+
+	  /* If this is a completely unrecognized insn, its an asm.
+	     We don't know how long it is, so record length as -1 to
+	     signal a needed realignment.  */
+	  if (recog_memoized (insn) < 0)
+	    len = -1;
+	  else
+	    len = get_attr_length (insn);
+	  goto next_and_done;
+
+	case EV4_IBX:
+	  if (in_use & EV4_IB0)
+	    {
+	      if (in_use & EV4_IB1)
+		goto done;
+	      in_use |= EV4_IB1;
+	    }
+	  else
+	    in_use |= EV4_IB0 | EV4_IBX;
+	  break;
+
+	case EV4_IB0:
+	  if (in_use & EV4_IB0)
+	    {
+	      if (!(in_use & EV4_IBX) || (in_use & EV4_IB1))
+		goto done;
+	      in_use |= EV4_IB1;
+	    }
+	  in_use |= EV4_IB0;
+	  break;
+
+	case EV4_IB1:
+	  if (in_use & EV4_IB1)
+	    goto done;
+	  in_use |= EV4_IB1;
+	  break;
+
+	default:
+	  abort();
+	}
+      len += 4;
+      
+      /* Haifa doesn't do well scheduling branches.  */
+      if (GET_CODE (insn) == JUMP_INSN)
+	goto next_and_done;
+
+    next:
+      insn = next_nonnote_insn (insn);
+
+      if (!insn || GET_RTX_CLASS (GET_CODE (insn)) != 'i')
+	goto done;
+
+      /* Let Haifa tell us where it thinks insn group boundaries are.  */
+      if (GET_MODE (insn) == TImode)
+	goto done;
+
+      if (GET_CODE (insn) == CLOBBER || GET_CODE (insn) == USE)
+	goto next;
+    }
+
+ next_and_done:
+  insn = next_nonnote_insn (insn);
+
+ done:
+  *plen = len;
+  *pin_use = in_use;
+  return insn;
+}
+
+/* IN_USE is a mask of the slots currently filled within the insn group. 
+   The mask bits come from alphaev5_pipe above.  If EV5_E01 is set, then
+   the insn in EV5_E0 can be swapped by the hardware into EV5_E1. 
+
+   LEN is, of course, the length of the group in bytes.  */
+
+static rtx
+alphaev5_next_group (insn, pin_use, plen)
+     rtx insn;
+     int *pin_use, *plen;
+{
+  int len, in_use;
+
+  len = in_use = 0;
+
+  if (GET_RTX_CLASS (GET_CODE (insn)) != 'i'
+      || GET_CODE (PATTERN (insn)) == CLOBBER
+      || GET_CODE (PATTERN (insn)) == USE)
+    goto next_and_done;
+
+  while (1)
+    {
+      enum alphaev5_pipe pipe;
+
+      pipe = alphaev5_insn_pipe (insn);
+      switch (pipe)
+	{
+	case EV5_STOP:
+	  /* Force complex instructions to start new groups.  */
+	  if (in_use)
+	    goto done;
+
+	  /* If this is a completely unrecognized insn, its an asm.
+	     We don't know how long it is, so record length as -1 to
+	     signal a needed realignment.  */
+	  if (recog_memoized (insn) < 0)
+	    len = -1;
+	  else
+	    len = get_attr_length (insn);
+	  goto next_and_done;
+
+	/* ??? Most of the places below, we would like to abort, as 
+	   it would indicate an error either in Haifa, or in the 
+	   scheduling description.  Unfortunately, Haifa never 
+	   schedules the last instruction of the BB, so we don't
+	   have an accurate TI bit to go off.  */
+	case EV5_E01:
+	  if (in_use & EV5_E0)
+	    {
+	      if (in_use & EV5_E1)
+		goto done;
+	      in_use |= EV5_E1;
+	    }
+	  else
+	    in_use |= EV5_E0 | EV5_E01;
+	  break;
+
+	case EV5_E0:
+	  if (in_use & EV5_E0)
+	    {
+	      if (!(in_use & EV5_E01) || (in_use & EV5_E1))
+		goto done;
+	      in_use |= EV5_E1;
+	    }
+	  in_use |= EV5_E0;
+	  break;
+
+	case EV5_E1:
+	  if (in_use & EV5_E1)
+	    goto done;
+	  in_use |= EV5_E1;
+	  break;
+
+	case EV5_FAM:
+	  if (in_use & EV5_FA)
+	    {
+	      if (in_use & EV5_FM)
+		goto done;
+	      in_use |= EV5_FM;
+	    }
+	  else
+	    in_use |= EV5_FA | EV5_FAM;
+	  break;
+
+	case EV5_FA:
+	  if (in_use & EV5_FA)
+	    goto done;
+	  in_use |= EV5_FA;
+	  break;
+
+	case EV5_FM:
+	  if (in_use & EV5_FM)
+	    goto done;
+	  in_use |= EV5_FM;
+	  break;
+
+	case EV5_NONE:
+	  break;
+
+	default:
+	  abort();
+	}
+      len += 4;
+      
+      /* Haifa doesn't do well scheduling branches.  */
+      /* ??? If this is predicted not-taken, slotting continues, except
+	 that no more IBR, FBR, or JSR insns may be slotted.  */
+      if (GET_CODE (insn) == JUMP_INSN)
+	goto next_and_done;
+
+    next:
+      insn = next_nonnote_insn (insn);
+
+      if (!insn || GET_RTX_CLASS (GET_CODE (insn)) != 'i')
+	goto done;
+
+      /* Let Haifa tell us where it thinks insn group boundaries are.  */
+      if (GET_MODE (insn) == TImode)
+	goto done;
+
+      if (GET_CODE (insn) == CLOBBER || GET_CODE (insn) == USE)
+	goto next;
+    }
+
+ next_and_done:
+  insn = next_nonnote_insn (insn);
+
+ done:
+  *plen = len;
+  *pin_use = in_use;
+  return insn;
+}
+
+static rtx
+alphaev4_next_nop (pin_use)
+     int *pin_use;
+{
+  int in_use = *pin_use;
+  rtx nop;
+
+  if (!(in_use & EV4_IB0))
+    {
+      in_use |= EV4_IB0;
+      nop = gen_nop ();
+    }
+  else if ((in_use & (EV4_IBX|EV4_IB1)) == EV4_IBX)
+    {
+      in_use |= EV4_IB1;
+      nop = gen_nop ();
+    }
+  else if (TARGET_FP && !(in_use & EV4_IB1))
+    {
+      in_use |= EV4_IB1;
+      nop = gen_fnop ();
+    }
+  else
+    nop = gen_unop ();
+
+  *pin_use = in_use;
+  return nop;
+}
+
+static rtx
+alphaev5_next_nop (pin_use)
+     int *pin_use;
+{
+  int in_use = *pin_use;
+  rtx nop;
+
+  if (!(in_use & EV5_E1))
+    {
+      in_use |= EV5_E1;
+      nop = gen_nop ();
+    }
+  else if (TARGET_FP && !(in_use & EV5_FA))
+    {
+      in_use |= EV5_FA;
+      nop = gen_fnop ();
+    }
+  else if (TARGET_FP && !(in_use & EV5_FM))
+    {
+      in_use |= EV5_FM;
+      nop = gen_fnop ();
+    }
+  else
+    nop = gen_unop ();
+
+  *pin_use = in_use;
+  return nop;
+}
+
+/* The instruction group alignment main loop.  */
+
+static void
+alpha_align_insns (insns, max_align, next_group, next_nop, gp_in_use)
+     rtx insns;
+     int max_align;
+     rtx (*next_group) PROTO((rtx, int*, int*));
+     rtx (*next_nop) PROTO((int*));
+     int gp_in_use;
+{
+  /* ALIGN is the known alignment for the insn group.  */
+  int align;
+  /* OFS is the offset of the current insn in the insn group.  */
+  int ofs;
+  int prev_in_use, in_use, len;
+  rtx i, next;
+
+  /* Let shorten branches care for assigning alignments to code labels.  */
+  shorten_branches (insns);
+
+  align = (FUNCTION_BOUNDARY/BITS_PER_UNIT < max_align
+	   ? FUNCTION_BOUNDARY/BITS_PER_UNIT : max_align);
+
+  /* Account for the initial GP load, which happens before the scheduled
+     prologue we emitted as RTL.  */
+  ofs = prev_in_use = 0;
+  if (alpha_does_function_need_gp())
+    {
+      ofs = 8 & (align - 1);
+      prev_in_use = gp_in_use;
+    }
+
+  i = insns;
+  if (GET_CODE (i) == NOTE)
+    i = next_nonnote_insn (i);
+
+  while (i)
+    {
+      next = (*next_group)(i, &in_use, &len);
+
+      /* When we see a label, resync alignment etc.  */
+      if (GET_CODE (i) == CODE_LABEL)
+	{
+	  int new_align = 1 << label_to_alignment (i);
+	  if (new_align >= align)
+	    {
+	      align = new_align < max_align ? new_align : max_align;
+	      ofs = 0;
+	    }
+	  else if (ofs & (new_align-1))
+	    ofs = (ofs | (new_align-1)) + 1;
+	  if (len != 0)
+	    abort();
+	}
+
+      /* Handle complex instructions special.  */
+      else if (in_use == 0)
+	{
+	  /* Asms will have length < 0.  This is a signal that we have
+	     lost alignment knowledge.  Assume, however, that the asm
+	     will not mis-align instructions.  */
+	  if (len < 0)
+	    {
+	      ofs = 0;
+	      align = 4;
+	      len = 0;
+	    }
+	}
+
+      /* If the known alignment is smaller than the recognized insn group,
+	 realign the output.  */
+      else if (align < len)
+	{
+	  int new_log_align = len > 8 ? 4 : 3;
+	  rtx where;
+
+	  where = prev_nonnote_insn (i);
+	  if (!where || GET_CODE (where) != CODE_LABEL)
+	    where = i;
+
+	  emit_insn_before (gen_realign (GEN_INT (new_log_align)), where);
+	  align = 1 << new_log_align;
+	  ofs = 0;
+	}
+
+      /* If the group won't fit in the same INT16 as the previous,
+	 we need to add padding to keep the group together.  Rather
+	 than simply leaving the insn filling to the assembler, we
+	 can make use of the knowledge of what sorts of instructions
+	 were issued in the previous group to make sure that all of
+	 the added nops are really free.  */
+      else if (ofs + len > align)
+	{
+	  int nop_count = (align - ofs) / 4;
+	  rtx where;
+
+	  /* Insert nops before labels and branches to truely merge the
+	     execution of the nops with the previous instruction group.  */
+	  where = prev_nonnote_insn (i);
+	  if (where)
+	    {
+	      if (GET_CODE (where) == CODE_LABEL)
+		{
+		  rtx where2 = prev_nonnote_insn (where);
+		  if (where2 && GET_CODE (where2) == JUMP_INSN)
+		    where = where2;
+		}
+	      else if (GET_CODE (where) != JUMP_INSN)
+		where = i;
+	    }
+	  else
+	    where = i;
+
+	  do 
+	    emit_insn_before ((*next_nop)(&prev_in_use), where);
+	  while (--nop_count);
+	  ofs = 0;
+	}
+
+      ofs = (ofs + len) & (align - 1);
+      prev_in_use = in_use;
+      i = next;
+    }
+}
+#endif /* HAIFA */
+
+/* Machine dependant reorg pass.  */
+
+void
+alpha_reorg (insns)
+     rtx insns;
+{
+  if (alpha_tp != ALPHA_TP_PROG || flag_exceptions)
+    alpha_handle_trap_shadows (insns);
+
+#ifdef HAIFA
+  /* Due to the number of extra trapb insns, don't bother fixing up
+     alignment when trap precision is instruction.  Moreover, we can
+     only do our job when sched2 is run and Haifa is our scheduler.  */
+  if (optimize && !optimize_size
+      && alpha_tp != ALPHA_TP_INSN
+      && flag_schedule_insns_after_reload)
+    {
+      if (alpha_cpu == PROCESSOR_EV4)
+	alpha_align_insns (insns, 8, alphaev4_next_group,
+			   alphaev4_next_nop, EV4_IB0);
+      else if (alpha_cpu == PROCESSOR_EV5)
+	alpha_align_insns (insns, 16, alphaev5_next_group,
+			   alphaev5_next_nop, EV5_E01 | EV5_E0);
+    }
+#endif
+}
+
+
+/* Check a floating-point value for validity for a particular machine mode.  */
+
+static char * const float_strings[] =
+{
+  /* These are for FLOAT_VAX.  */
+   "1.70141173319264430e+38", /* 2^127 (2^24 - 1) / 2^24 */
+  "-1.70141173319264430e+38",
+   "2.93873587705571877e-39", /* 2^-128 */
+  "-2.93873587705571877e-39",
+  /* These are for the default broken IEEE mode, which traps
+     on infinity or denormal numbers.  */
+   "3.402823466385288598117e+38", /* 2^128 (1 - 2^-24) */
+  "-3.402823466385288598117e+38",
+   "1.1754943508222875079687e-38", /* 2^-126 */
+  "-1.1754943508222875079687e-38",
+};
+
+static REAL_VALUE_TYPE float_values[8];
+static int inited_float_values = 0;
+
+int
+check_float_value (mode, d, overflow)
+     enum machine_mode mode;
+     REAL_VALUE_TYPE *d;
+     int overflow ATTRIBUTE_UNUSED;
+{
+
+  if (TARGET_IEEE || TARGET_IEEE_CONFORMANT || TARGET_IEEE_WITH_INEXACT)
+    return 0;
+
+  if (inited_float_values == 0)
+    {
+      int i;
+      for (i = 0; i < 8; i++)
+	float_values[i] = REAL_VALUE_ATOF (float_strings[i], DFmode);
+
+      inited_float_values = 1;
+    }
+
+  if (mode == SFmode)
+    {
+      REAL_VALUE_TYPE r;
+      REAL_VALUE_TYPE *fvptr;
+
+      if (TARGET_FLOAT_VAX)
+	fvptr = &float_values[0];
+      else
+	fvptr = &float_values[4];
+
+      bcopy ((char *) d, (char *) &r, sizeof (REAL_VALUE_TYPE));
+      if (REAL_VALUES_LESS (fvptr[0], r))
+	{
+	  bcopy ((char *) &fvptr[0], (char *) d,
+		 sizeof (REAL_VALUE_TYPE));
+	  return 1;
+	}
+      else if (REAL_VALUES_LESS (r, fvptr[1]))
+	{
+	  bcopy ((char *) &fvptr[1], (char *) d,
+		 sizeof (REAL_VALUE_TYPE));
+	  return 1;
+	}
+      else if (REAL_VALUES_LESS (dconst0, r)
+		&& REAL_VALUES_LESS (r, fvptr[2]))
+	{
+	  bcopy ((char *) &dconst0, (char *) d, sizeof (REAL_VALUE_TYPE));
+	  return 1;
+	}
+      else if (REAL_VALUES_LESS (r, dconst0)
+		&& REAL_VALUES_LESS (fvptr[3], r))
+	{
+	  bcopy ((char *) &dconst0, (char *) d, sizeof (REAL_VALUE_TYPE));
+	  return 1;
+	}
+    }
+
+  return 0;
+}
+
+#if OPEN_VMS
+
+/* Return the VMS argument type corresponding to MODE.  */
+
+enum avms_arg_type
+alpha_arg_type (mode)
+     enum machine_mode mode;
+{
+  switch (mode)
+    {
+    case SFmode:
+      return TARGET_FLOAT_VAX ? FF : FS;
+    case DFmode:
+      return TARGET_FLOAT_VAX ? FD : FT;
+    default:
+      return I64;
+    }
+}
+
+/* Return an rtx for an integer representing the VMS Argument Information
+   register value.  */
+
+struct rtx_def *
+alpha_arg_info_reg_val (cum)
+     CUMULATIVE_ARGS cum;
+{
+  unsigned HOST_WIDE_INT regval = cum.num_args;
+  int i;
+
+  for (i = 0; i < 6; i++)
+    regval |= ((int) cum.atypes[i]) << (i * 3 + 8);
+
+  return GEN_INT (regval);
+}
+
+/* Structure to collect function names for final output
+   in link section.  */
+
+enum links_kind {KIND_UNUSED, KIND_LOCAL, KIND_EXTERN};
+
+
+struct alpha_links {
+  struct alpha_links *next;
+  char *name;
+  enum links_kind kind;
+};
+
+static struct alpha_links *alpha_links_base = 0;
+
+/* Make (or fake) .linkage entry for function call.
+
+   IS_LOCAL is 0 if name is used in call, 1 if name is used in definition.  */
+
+void
+alpha_need_linkage (name, is_local)
+    char *name;
+    int is_local;
+{
+  rtx x;
+  struct alpha_links *lptr, *nptr;
+
+  if (name[0] == '*')
+    name++;
+
+  /* Is this name already defined ?  */
+
+  for (lptr = alpha_links_base; lptr; lptr = lptr->next)
+    if (strcmp (lptr->name, name) == 0)
+      {
+	if (is_local)
+	  {
+	    /* Defined here but external assumed.  */
+	    if (lptr->kind == KIND_EXTERN)
+	      lptr->kind = KIND_LOCAL;
+	  }
+	else
+	  {
+	    /* Used here but unused assumed.  */
+	    if (lptr->kind == KIND_UNUSED)
+	      lptr->kind = KIND_LOCAL;
+	  }
+	return;
+      }
+
+  nptr = (struct alpha_links *) xmalloc (sizeof (struct alpha_links));
+  nptr->next = alpha_links_base;
+  nptr->name = xstrdup (name);
+
+  /* Assume external if no definition.  */
+  nptr->kind = (is_local ? KIND_UNUSED : KIND_EXTERN);
+
+  /* Ensure we have an IDENTIFIER so assemble_name can mark is used.  */
+  get_identifier (name);
+
+  alpha_links_base = nptr;
+
+  return;
+}
+
+
+void
+alpha_write_linkage (stream)
+    FILE *stream;
+{
+  struct alpha_links *lptr, *nptr;
+
+  readonly_section ();
+
+  fprintf (stream, "\t.align 3\n");
+
+  for (lptr = alpha_links_base; lptr; lptr = nptr)
+    {
+      nptr = lptr->next;
+
+      if (lptr->kind == KIND_UNUSED
+	  || ! TREE_SYMBOL_REFERENCED (get_identifier (lptr->name)))
+	continue;
+
+      fprintf (stream, "$%s..lk:\n", lptr->name);
+      if (lptr->kind == KIND_LOCAL)   
+	{
+	  /*  Local and used, build linkage pair.  */
+	  fprintf (stream, "\t.quad %s..en\n", lptr->name);
+	  fprintf (stream, "\t.quad %s\n", lptr->name);
+	}
+      else
+	/* External and used, request linkage pair.  */
+	fprintf (stream, "\t.linkage %s\n", lptr->name);
+    }
+}
+
+#else
+
+void
+alpha_need_linkage (name, is_local)
+     char *name ATTRIBUTE_UNUSED;
+     int is_local ATTRIBUTE_UNUSED;
+{
+}
+
+#endif /* OPEN_VMS */
diff --git a/contrib/gcc/config/alpha/elf.h b/contrib/gcc/config/alpha/elf.h
index 24af9d3..e79b142 100644
--- a/contrib/gcc/config/alpha/elf.h
+++ b/contrib/gcc/config/alpha/elf.h
@@ -83,6 +83,7 @@ extern void output_file_directive ();
  fprintf(FILE, "\t%s \"GCC (%s) %s\"\n", IDENT_ASM_OP,	\
 	 lang_identify(), version_string)
 #else
+#undef  ASM_FILE_END
 #define ASM_FILE_END(FILE)					\
 do {				 				\
      if (!flag_no_ident)					\
@@ -95,6 +96,7 @@ do {				 				\
 #define SCCS_DIRECTIVE
 
 /* Output #ident as a .ident.  */
+#undef  ASM_OUTPUT_IDENT
 #define ASM_OUTPUT_IDENT(FILE, NAME) \
   fprintf (FILE, "\t%s\t\"%s\"\n", IDENT_ASM_OP, NAME);
 
@@ -133,6 +135,7 @@ do {				 				\
    library routines (e.g. .udiv) be explicitly declared as .globl
    in each assembly file where they are referenced.  */
 
+#undef  ASM_OUTPUT_EXTERNAL_LIBCALL
 #define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, FUN)				\
   ASM_GLOBALIZE_LABEL (FILE, XSTR (FUN, 0))
 
@@ -211,6 +214,7 @@ do {									\
    EXTRA_SECTIONS, EXTRA_SECTION_FUNCTIONS, SELECT_SECTION, and
    SELECT_RTX_SECTION.  We do both here just to be on the safe side.  */
 
+#undef  USE_CONST_SECTION
 #define USE_CONST_SECTION	1
 
 #define CONST_SECTION_ASM_OP	".section\t.rodata"
@@ -309,6 +313,7 @@ void FN ()								\
 
 /* A C statement (sans semicolon) to output an element in the table of
    global constructors.  */
+#undef  ASM_OUTPUT_CONSTRUCTOR
 #define ASM_OUTPUT_CONSTRUCTOR(FILE,NAME)				\
   do {									\
     ctors_section ();							\
@@ -319,6 +324,7 @@ void FN ()								\
 
 /* A C statement (sans semicolon) to output an element in the table of
    global destructors.  */
+#undef  ASM_OUTPUT_DESTRUCTOR
 #define ASM_OUTPUT_DESTRUCTOR(FILE,NAME)       				\
   do {									\
     dtors_section ();                   				\
@@ -382,6 +388,7 @@ void FN ()								\
 
 /* This is how we tell the assembler that a symbol is weak.  */
 
+#undef  ASM_WEAKEN_LABEL
 #define ASM_WEAKEN_LABEL(FILE,NAME) \
   do { fputs ("\t.weak\t", FILE); assemble_name (FILE, NAME); \
        fputc ('\n', FILE); } while (0)
@@ -417,6 +424,7 @@ void FN ()								\
 
 /* Write the extra assembler code needed to declare an object properly.  */
 
+#undef  ASM_DECLARE_OBJECT_NAME
 #define ASM_DECLARE_OBJECT_NAME(FILE, NAME, DECL)			\
   do {									\
     fprintf (FILE, "\t%s\t ", TYPE_ASM_OP);				\
@@ -441,6 +449,7 @@ void FN ()								\
    size_directive_output was set
    by ASM_DECLARE_OBJECT_NAME when it was run for the same decl.  */
 
+#undef  ASM_FINISH_DECLARE_OBJECT
 #define ASM_FINISH_DECLARE_OBJECT(FILE, DECL, TOP_LEVEL, AT_END)	\
 do {									\
   char *name = XSTR (XEXP (DECL_RTL (DECL), 0), 0);			\
diff --git a/contrib/gcc/config/i386/i386.md b/contrib/gcc/config/i386/i386.md
index b18c700..27df887 100644
--- a/contrib/gcc/config/i386/i386.md
+++ b/contrib/gcc/config/i386/i386.md
@@ -8192,7 +8192,7 @@ byte_xor_operation:
   "flag_pic"
   "
 {
-  load_pic_register ();
+  load_pic_register (1);
   DONE;
 }")
 
diff --git a/contrib/gcc/configure b/contrib/gcc/configure
index c1d12f1..b44dbae 100755
--- a/contrib/gcc/configure
+++ b/contrib/gcc/configure
@@ -64,7 +64,8 @@ ac_help="$ac_help
 ac_help="$ac_help
   --enable-dwarf2	  enable DWARF2 debugging as default."
 ac_help="$ac_help
-  --enable-nls            use Native Language Support (disabled by default)"
+  --enable-nls            use Native Language Support (disabled by default).
+                          EXPERIMENTAL, see ABOUT-GCC-NLS."
 ac_help="$ac_help
   --disable-nls           do not use Native Language Support"
 ac_help="$ac_help
@@ -88,7 +89,6 @@ program_suffix=NONE
 program_transform_name=s,x,x,
 silent=
 site=
-sitefile=
 srcdir=
 target=NONE
 verbose=
@@ -203,7 +203,6 @@ Configuration:
   --help                  print this message
   --no-create             do not create output files
   --quiet, --silent       do not print \`checking...' messages
-  --site-file=FILE        use FILE as the site file
   --version               print the version of autoconf that created configure
 Directory and file names:
   --prefix=PREFIX         install architecture-independent files in PREFIX
@@ -374,11 +373,6 @@ EOF
   -site=* | --site=* | --sit=*)
     site="$ac_optarg" ;;
 
-  -site-file | --site-file | --site-fil | --site-fi | --site-f)
-    ac_prev=sitefile ;;
-  -site-file=* | --site-file=* | --site-fil=* | --site-fi=* | --site-f=*)
-    sitefile="$ac_optarg" ;;
-
   -srcdir | --srcdir | --srcdi | --srcd | --src | --sr)
     ac_prev=srcdir ;;
   -srcdir=* | --srcdir=* | --srcdi=* | --srcd=* | --src=* | --sr=*)
@@ -544,16 +538,12 @@ fi
 srcdir=`echo "${srcdir}" | sed 's%\([^/]\)/*$%\1%'`
 
 # Prefer explicitly selected file to automatically selected ones.
-if test -z "$sitefile"; then
-  if test -z "$CONFIG_SITE"; then
-    if test "x$prefix" != xNONE; then
-      CONFIG_SITE="$prefix/share/config.site $prefix/etc/config.site"
-    else
-      CONFIG_SITE="$ac_default_prefix/share/config.site $ac_default_prefix/etc/config.site"
-    fi
+if test -z "$CONFIG_SITE"; then
+  if test "x$prefix" != xNONE; then
+    CONFIG_SITE="$prefix/share/config.site $prefix/etc/config.site"
+  else
+    CONFIG_SITE="$ac_default_prefix/share/config.site $ac_default_prefix/etc/config.site"
   fi
-else
-  CONFIG_SITE="$sitefile"
 fi
 for ac_site_file in $CONFIG_SITE; do
   if test -r "$ac_site_file"; then
@@ -608,7 +598,7 @@ copy=cp
 # - two terminals occur directly after each other
 # - the path contains an element with a dot in it
 echo $ac_n "checking LIBRARY_PATH variable""... $ac_c" 1>&6
-echo "configure:610: checking LIBRARY_PATH variable" >&5
+echo "configure:600: checking LIBRARY_PATH variable" >&5
 case ${LIBRARY_PATH} in
   [:\;]* | *[:\;] | *[:\;][:\;]* |  *[:\;]. | .[:\;]*| . | *[:\;].[:\;]* )
     library_path_setting="contains current directory"
@@ -633,7 +623,7 @@ fi
 # - two terminals occur directly after each other
 # - the path contains an element with a dot in it
 echo $ac_n "checking GCC_EXEC_PREFIX variable""... $ac_c" 1>&6
-echo "configure:635: checking GCC_EXEC_PREFIX variable" >&5
+echo "configure:625: checking GCC_EXEC_PREFIX variable" >&5
 case ${GCC_EXEC_PREFIX} in
   [:\;]* | *[:\;] | *[:\;][:\;]* |  *[:\;]. | .[:\;]*| . | *[:\;].[:\;]* )
     gcc_exec_prefix_setting="contains current directory"
@@ -974,7 +964,7 @@ else { echo "configure: error: can not run $ac_config_sub" 1>&2; exit 1; }
 fi
 
 echo $ac_n "checking host system type""... $ac_c" 1>&6
-echo "configure:976: checking host system type" >&5
+echo "configure:966: checking host system type" >&5
 
 host_alias=$host
 case "$host_alias" in
@@ -995,7 +985,7 @@ host_os=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
 echo "$ac_t""$host" 1>&6
 
 echo $ac_n "checking target system type""... $ac_c" 1>&6
-echo "configure:997: checking target system type" >&5
+echo "configure:987: checking target system type" >&5
 
 target_alias=$target
 case "$target_alias" in
@@ -1013,7 +1003,7 @@ target_os=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
 echo "$ac_t""$target" 1>&6
 
 echo $ac_n "checking build system type""... $ac_c" 1>&6
-echo "configure:1015: checking build system type" >&5
+echo "configure:1005: checking build system type" >&5
 
 build_alias=$build
 case "$build_alias" in
@@ -1040,7 +1030,7 @@ test "$host_alias" != "$target_alias" &&
 # Extract the first word of "gcc", so it can be a program name with args.
 set dummy gcc; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1042: checking for $ac_word" >&5
+echo "configure:1032: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -1070,7 +1060,7 @@ if test -z "$CC"; then
   # Extract the first word of "cc", so it can be a program name with args.
 set dummy cc; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1072: checking for $ac_word" >&5
+echo "configure:1062: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -1121,7 +1111,7 @@ fi
       # Extract the first word of "cl", so it can be a program name with args.
 set dummy cl; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1123: checking for $ac_word" >&5
+echo "configure:1113: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -1153,7 +1143,7 @@ fi
 fi
 
 echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works""... $ac_c" 1>&6
-echo "configure:1155: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5
+echo "configure:1145: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5
 
 ac_ext=c
 # CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
@@ -1164,12 +1154,12 @@ cross_compiling=$ac_cv_prog_cc_cross
 
 cat > conftest.$ac_ext << EOF
 
-#line 1166 "configure"
+#line 1156 "configure"
 #include "confdefs.h"
 
 main(){return(0);}
 EOF
-if { (eval echo configure:1171: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:1161: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
   ac_cv_prog_cc_works=yes
   # If we can't run a trivial program, we are probably using a cross compiler.
   if (./conftest; exit) 2>/dev/null; then
@@ -1195,12 +1185,12 @@ if test $ac_cv_prog_cc_works = no; then
   { echo "configure: error: installation or configuration problem: C compiler cannot create executables." 1>&2; exit 1; }
 fi
 echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler""... $ac_c" 1>&6
-echo "configure:1197: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5
+echo "configure:1187: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5
 echo "$ac_t""$ac_cv_prog_cc_cross" 1>&6
 cross_compiling=$ac_cv_prog_cc_cross
 
 echo $ac_n "checking whether we are using GNU C""... $ac_c" 1>&6
-echo "configure:1202: checking whether we are using GNU C" >&5
+echo "configure:1192: checking whether we are using GNU C" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_gcc'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -1209,7 +1199,7 @@ else
   yes;
 #endif
 EOF
-if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:1211: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then
+if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:1201: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then
   ac_cv_prog_gcc=yes
 else
   ac_cv_prog_gcc=no
@@ -1228,7 +1218,7 @@ ac_test_CFLAGS="${CFLAGS+set}"
 ac_save_CFLAGS="$CFLAGS"
 CFLAGS=
 echo $ac_n "checking whether ${CC-cc} accepts -g""... $ac_c" 1>&6
-echo "configure:1230: checking whether ${CC-cc} accepts -g" >&5
+echo "configure:1220: checking whether ${CC-cc} accepts -g" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_cc_g'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -1271,7 +1261,7 @@ fi
 
 
 echo $ac_n "checking whether ${MAKE-make} sets \${MAKE}""... $ac_c" 1>&6
-echo "configure:1273: checking whether ${MAKE-make} sets \${MAKE}" >&5
+echo "configure:1263: checking whether ${MAKE-make} sets \${MAKE}" >&5
 set dummy ${MAKE-make}; ac_make=`echo "$2" | sed 'y%./+-%__p_%'`
 if eval "test \"`echo '$''{'ac_cv_prog_make_${ac_make}_set'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
@@ -1299,7 +1289,7 @@ fi
 
 
 echo $ac_n "checking whether a default assembler was specified""... $ac_c" 1>&6
-echo "configure:1301: checking whether a default assembler was specified" >&5
+echo "configure:1291: checking whether a default assembler was specified" >&5
 if test x"${DEFAULT_ASSEMBLER+set}" = x"set"; then
     if test x"$gas_flag" = x"no"; then
     	echo "$ac_t""yes ($DEFAULT_ASSEMBLER)" 1>&6
@@ -1311,7 +1301,7 @@ else
 fi
 
 echo $ac_n "checking whether a default linker was specified""... $ac_c" 1>&6
-echo "configure:1313: checking whether a default linker was specified" >&5
+echo "configure:1303: checking whether a default linker was specified" >&5
 if test x"${DEFAULT_LINKER+set}" = x"set"; then
     if test x"$gnu_ld_flag" = x"no"; then
 	echo "$ac_t""yes ($DEFAULT_LINKER)" 1>&6
@@ -1323,12 +1313,12 @@ else
 fi
 
 # Find some useful tools
-for ac_prog in mawk gawk nawk awk
+for ac_prog in gawk mawk nawk awk
 do
 # Extract the first word of "$ac_prog", so it can be a program name with args.
 set dummy $ac_prog; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1330: checking for $ac_word" >&5
+echo "configure:1320: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_AWK'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -1360,7 +1350,7 @@ done
 # Extract the first word of "flex", so it can be a program name with args.
 set dummy flex; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1362: checking for $ac_word" >&5
+echo "configure:1352: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_LEX'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -1394,7 +1384,7 @@ then
   *) ac_lib=l ;;
   esac
   echo $ac_n "checking for yywrap in -l$ac_lib""... $ac_c" 1>&6
-echo "configure:1396: checking for yywrap in -l$ac_lib" >&5
+echo "configure:1386: checking for yywrap in -l$ac_lib" >&5
 ac_lib_var=`echo $ac_lib'_'yywrap | sed 'y%./+-%__p_%'`
 if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
@@ -1402,7 +1392,7 @@ else
   ac_save_LIBS="$LIBS"
 LIBS="-l$ac_lib  $LIBS"
 cat > conftest.$ac_ext <<EOF
-#line 1404 "configure"
+#line 1394 "configure"
 #include "confdefs.h"
 /* Override any gcc2 internal prototype to avoid an error.  */
 /* We use char because int might match the return type of a gcc2
@@ -1413,7 +1403,7 @@ int main() {
 yywrap()
 ; return 0; }
 EOF
-if { (eval echo configure:1415: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:1405: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
   rm -rf conftest*
   eval "ac_cv_lib_$ac_lib_var=yes"
 else
@@ -1436,7 +1426,7 @@ fi
 fi
 
 echo $ac_n "checking whether ln works""... $ac_c" 1>&6
-echo "configure:1438: checking whether ln works" >&5
+echo "configure:1428: checking whether ln works" >&5
 if eval "test \"`echo '$''{'gcc_cv_prog_LN'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -1468,7 +1458,7 @@ else
 fi
 
 echo $ac_n "checking whether ln -s works""... $ac_c" 1>&6
-echo "configure:1470: checking whether ln -s works" >&5
+echo "configure:1460: checking whether ln -s works" >&5
 if eval "test \"`echo '$''{'gcc_cv_prog_LN_S'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -1500,19 +1490,19 @@ else
 fi
 
 echo $ac_n "checking for volatile""... $ac_c" 1>&6
-echo "configure:1502: checking for volatile" >&5
+echo "configure:1492: checking for volatile" >&5
 if eval "test \"`echo '$''{'gcc_cv_c_volatile'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
   cat > conftest.$ac_ext <<EOF
-#line 1507 "configure"
+#line 1497 "configure"
 #include "confdefs.h"
 
 int main() {
 volatile int foo;
 ; return 0; }
 EOF
-if { (eval echo configure:1514: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+if { (eval echo configure:1504: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
   rm -rf conftest*
   gcc_cv_c_volatile=yes
 else
@@ -1535,7 +1525,7 @@ fi
 # Extract the first word of "ranlib", so it can be a program name with args.
 set dummy ranlib; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1537: checking for $ac_word" >&5
+echo "configure:1527: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -1567,7 +1557,7 @@ do
 # Extract the first word of "$ac_prog", so it can be a program name with args.
 set dummy $ac_prog; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1569: checking for $ac_word" >&5
+echo "configure:1559: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_YACC'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -1608,7 +1598,7 @@ test -n "$YACC" || YACC="yacc"
 # SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff"
 # ./install, which can be erroneously created by make from ./install.sh.
 echo $ac_n "checking for a BSD compatible install""... $ac_c" 1>&6
-echo "configure:1610: checking for a BSD compatible install" >&5
+echo "configure:1600: checking for a BSD compatible install" >&5
 if test -z "$INSTALL"; then
 if eval "test \"`echo '$''{'ac_cv_path_install'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
@@ -1659,7 +1649,7 @@ test -z "$INSTALL_DATA" && INSTALL_DATA='${INSTALL} -m 644'
 
 
 echo $ac_n "checking how to run the C preprocessor""... $ac_c" 1>&6
-echo "configure:1661: checking how to run the C preprocessor" >&5
+echo "configure:1651: checking how to run the C preprocessor" >&5
 # On Suns, sometimes $CPP names a directory.
 if test -n "$CPP" && test -d "$CPP"; then
   CPP=
@@ -1674,13 +1664,13 @@ else
   # On the NeXT, cc -E runs the code through the compiler's parser,
   # not just through cpp.
   cat > conftest.$ac_ext <<EOF
-#line 1676 "configure"
+#line 1666 "configure"
 #include "confdefs.h"
 #include <assert.h>
 Syntax Error
 EOF
 ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:1682: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+{ (eval echo configure:1672: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
 ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
 if test -z "$ac_err"; then
   :
@@ -1691,13 +1681,13 @@ else
   rm -rf conftest*
   CPP="${CC-cc} -E -traditional-cpp"
   cat > conftest.$ac_ext <<EOF
-#line 1693 "configure"
+#line 1683 "configure"
 #include "confdefs.h"
 #include <assert.h>
 Syntax Error
 EOF
 ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:1699: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+{ (eval echo configure:1689: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
 ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
 if test -z "$ac_err"; then
   :
@@ -1708,13 +1698,13 @@ else
   rm -rf conftest*
   CPP="${CC-cc} -nologo -E"
   cat > conftest.$ac_ext <<EOF
-#line 1710 "configure"
+#line 1700 "configure"
 #include "confdefs.h"
 #include <assert.h>
 Syntax Error
 EOF
 ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:1716: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+{ (eval echo configure:1706: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
 ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
 if test -z "$ac_err"; then
   :
@@ -1739,12 +1729,12 @@ fi
 echo "$ac_t""$CPP" 1>&6
 
 echo $ac_n "checking for ANSI C header files""... $ac_c" 1>&6
-echo "configure:1741: checking for ANSI C header files" >&5
+echo "configure:1731: checking for ANSI C header files" >&5
 if eval "test \"`echo '$''{'ac_cv_header_stdc'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
   cat > conftest.$ac_ext <<EOF
-#line 1746 "configure"
+#line 1736 "configure"
 #include "confdefs.h"
 #include <stdlib.h>
 #include <stdarg.h>
@@ -1752,7 +1742,7 @@ else
 #include <float.h>
 EOF
 ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:1754: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+{ (eval echo configure:1744: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
 ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
 if test -z "$ac_err"; then
   rm -rf conftest*
@@ -1769,7 +1759,7 @@ rm -f conftest*
 if test $ac_cv_header_stdc = yes; then
   # SunOS 4.x string.h does not declare mem*, contrary to ANSI.
 cat > conftest.$ac_ext <<EOF
-#line 1771 "configure"
+#line 1761 "configure"
 #include "confdefs.h"
 #include <string.h>
 EOF
@@ -1787,7 +1777,7 @@ fi
 if test $ac_cv_header_stdc = yes; then
   # ISC 2.0.2 stdlib.h does not declare free, contrary to ANSI.
 cat > conftest.$ac_ext <<EOF
-#line 1789 "configure"
+#line 1779 "configure"
 #include "confdefs.h"
 #include <stdlib.h>
 EOF
@@ -1808,7 +1798,7 @@ if test "$cross_compiling" = yes; then
   :
 else
   cat > conftest.$ac_ext <<EOF
-#line 1810 "configure"
+#line 1800 "configure"
 #include "confdefs.h"
 #include <ctype.h>
 #define ISLOWER(c) ('a' <= (c) && (c) <= 'z')
@@ -1819,7 +1809,7 @@ if (XOR (islower (i), ISLOWER (i)) || toupper (i) != TOUPPER (i)) exit(2);
 exit (0); }
 
 EOF
-if { (eval echo configure:1821: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
+if { (eval echo configure:1811: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
 then
   :
 else
@@ -1843,12 +1833,12 @@ EOF
 fi
 
 echo $ac_n "checking whether time.h and sys/time.h may both be included""... $ac_c" 1>&6
-echo "configure:1845: checking whether time.h and sys/time.h may both be included" >&5
+echo "configure:1835: checking whether time.h and sys/time.h may both be included" >&5
 if eval "test \"`echo '$''{'ac_cv_header_time'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
   cat > conftest.$ac_ext <<EOF
-#line 1850 "configure"
+#line 1840 "configure"
 #include "confdefs.h"
 #include <sys/types.h>
 #include <sys/time.h>
@@ -1857,7 +1847,7 @@ int main() {
 struct tm *tp;
 ; return 0; }
 EOF
-if { (eval echo configure:1859: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+if { (eval echo configure:1849: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
   rm -rf conftest*
   ac_cv_header_time=yes
 else
@@ -1878,12 +1868,12 @@ EOF
 fi
 
 echo $ac_n "checking whether string.h and strings.h may both be included""... $ac_c" 1>&6
-echo "configure:1880: checking whether string.h and strings.h may both be included" >&5
+echo "configure:1870: checking whether string.h and strings.h may both be included" >&5
 if eval "test \"`echo '$''{'gcc_cv_header_string'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
   cat > conftest.$ac_ext <<EOF
-#line 1885 "configure"
+#line 1875 "configure"
 #include "confdefs.h"
 #include <string.h>
 #include <strings.h>
@@ -1891,7 +1881,7 @@ int main() {
 
 ; return 0; }
 EOF
-if { (eval echo configure:1893: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+if { (eval echo configure:1883: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
   rm -rf conftest*
   gcc_cv_header_string=yes
 else
@@ -1912,12 +1902,12 @@ EOF
 fi
 
 echo $ac_n "checking for sys/wait.h that is POSIX.1 compatible""... $ac_c" 1>&6
-echo "configure:1914: checking for sys/wait.h that is POSIX.1 compatible" >&5
+echo "configure:1904: checking for sys/wait.h that is POSIX.1 compatible" >&5
 if eval "test \"`echo '$''{'ac_cv_header_sys_wait_h'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
   cat > conftest.$ac_ext <<EOF
-#line 1919 "configure"
+#line 1909 "configure"
 #include "confdefs.h"
 #include <sys/types.h>
 #include <sys/wait.h>
@@ -1933,7 +1923,7 @@ wait (&s);
 s = WIFEXITED (s) ? WEXITSTATUS (s) : 1;
 ; return 0; }
 EOF
-if { (eval echo configure:1935: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+if { (eval echo configure:1925: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
   rm -rf conftest*
   ac_cv_header_sys_wait_h=yes
 else
@@ -1957,17 +1947,17 @@ for ac_hdr in limits.h stddef.h string.h strings.h stdlib.h time.h fcntl.h unist
 do
 ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
 echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:1959: checking for $ac_hdr" >&5
+echo "configure:1949: checking for $ac_hdr" >&5
 if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
   cat > conftest.$ac_ext <<EOF
-#line 1964 "configure"
+#line 1954 "configure"
 #include "confdefs.h"
 #include <$ac_hdr>
 EOF
 ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:1969: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+{ (eval echo configure:1959: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
 ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
 if test -z "$ac_err"; then
   rm -rf conftest*
@@ -1997,17 +1987,17 @@ done
 # Check for thread headers.
 ac_safe=`echo "thread.h" | sed 'y%./+-%__p_%'`
 echo $ac_n "checking for thread.h""... $ac_c" 1>&6
-echo "configure:1999: checking for thread.h" >&5
+echo "configure:1989: checking for thread.h" >&5
 if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
   cat > conftest.$ac_ext <<EOF
-#line 2004 "configure"
+#line 1994 "configure"
 #include "confdefs.h"
 #include <thread.h>
 EOF
 ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:2009: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+{ (eval echo configure:1999: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
 ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
 if test -z "$ac_err"; then
   rm -rf conftest*
@@ -2031,17 +2021,17 @@ fi
 
 ac_safe=`echo "pthread.h" | sed 'y%./+-%__p_%'`
 echo $ac_n "checking for pthread.h""... $ac_c" 1>&6
-echo "configure:2033: checking for pthread.h" >&5
+echo "configure:2023: checking for pthread.h" >&5
 if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
   cat > conftest.$ac_ext <<EOF
-#line 2038 "configure"
+#line 2028 "configure"
 #include "confdefs.h"
 #include <pthread.h>
 EOF
 ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:2043: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+{ (eval echo configure:2033: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
 ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
 if test -z "$ac_err"; then
   rm -rf conftest*
@@ -2068,7 +2058,7 @@ fi
 # Extract the first word of "gnatbind", so it can be a program name with args.
 set dummy gnatbind; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2070: checking for $ac_word" >&5
+echo "configure:2060: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_gnat'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -2099,12 +2089,12 @@ fi
 # See if the system preprocessor understands the ANSI C preprocessor
 # stringification operator.
 echo $ac_n "checking whether cpp understands the stringify operator""... $ac_c" 1>&6
-echo "configure:2101: checking whether cpp understands the stringify operator" >&5
+echo "configure:2091: checking whether cpp understands the stringify operator" >&5
 if eval "test \"`echo '$''{'gcc_cv_c_have_stringify'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
   cat > conftest.$ac_ext <<EOF
-#line 2106 "configure"
+#line 2096 "configure"
 #include "confdefs.h"
 
 int main() {
@@ -2112,7 +2102,7 @@ int main() {
 char *test = S(foo);
 ; return 0; }
 EOF
-if { (eval echo configure:2114: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+if { (eval echo configure:2104: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
   rm -rf conftest*
   gcc_cv_c_have_stringify=yes
 else
@@ -2135,12 +2125,12 @@ fi
 # Use <inttypes.h> only if it exists,
 # doesn't clash with <sys/types.h>, and declares intmax_t.
 echo $ac_n "checking for inttypes.h""... $ac_c" 1>&6
-echo "configure:2137: checking for inttypes.h" >&5
+echo "configure:2127: checking for inttypes.h" >&5
 if eval "test \"`echo '$''{'gcc_cv_header_inttypes_h'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
   cat > conftest.$ac_ext <<EOF
-#line 2142 "configure"
+#line 2132 "configure"
 #include "confdefs.h"
 #include <sys/types.h>
 #include <inttypes.h>
@@ -2148,7 +2138,7 @@ int main() {
 intmax_t i = -1;
 ; return 0; }
 EOF
-if { (eval echo configure:2150: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+if { (eval echo configure:2140: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
   rm -rf conftest*
   gcc_cv_header_inttypes_h=yes
 else
@@ -2174,12 +2164,12 @@ for ac_func in strtoul bsearch strerror putenv popen bcopy bzero bcmp \
 	fputs_unlocked
 do
 echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:2176: checking for $ac_func" >&5
+echo "configure:2166: checking for $ac_func" >&5
 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
   cat > conftest.$ac_ext <<EOF
-#line 2181 "configure"
+#line 2171 "configure"
 #include "confdefs.h"
 /* System header to define __stub macros and hopefully few prototypes,
     which can conflict with char $ac_func(); below.  */
@@ -2202,7 +2192,7 @@ $ac_func();
 
 ; return 0; }
 EOF
-if { (eval echo configure:2204: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:2194: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
   rm -rf conftest*
   eval "ac_cv_func_$ac_func=yes"
 else
@@ -2231,12 +2221,12 @@ done
 #AC_CHECK_TYPE(wchar_t, unsigned int)
 
 echo $ac_n "checking for vprintf""... $ac_c" 1>&6
-echo "configure:2233: checking for vprintf" >&5
+echo "configure:2223: checking for vprintf" >&5
 if eval "test \"`echo '$''{'ac_cv_func_vprintf'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
   cat > conftest.$ac_ext <<EOF
-#line 2238 "configure"
+#line 2228 "configure"
 #include "confdefs.h"
 /* System header to define __stub macros and hopefully few prototypes,
     which can conflict with char vprintf(); below.  */
@@ -2259,7 +2249,7 @@ vprintf();
 
 ; return 0; }
 EOF
-if { (eval echo configure:2261: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:2251: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
   rm -rf conftest*
   eval "ac_cv_func_vprintf=yes"
 else
@@ -2283,12 +2273,12 @@ fi
 
 if test "$ac_cv_func_vprintf" != yes; then
 echo $ac_n "checking for _doprnt""... $ac_c" 1>&6
-echo "configure:2285: checking for _doprnt" >&5
+echo "configure:2275: checking for _doprnt" >&5
 if eval "test \"`echo '$''{'ac_cv_func__doprnt'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
   cat > conftest.$ac_ext <<EOF
-#line 2290 "configure"
+#line 2280 "configure"
 #include "confdefs.h"
 /* System header to define __stub macros and hopefully few prototypes,
     which can conflict with char _doprnt(); below.  */
@@ -2311,7 +2301,7 @@ _doprnt();
 
 ; return 0; }
 EOF
-if { (eval echo configure:2313: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:2303: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
   rm -rf conftest*
   eval "ac_cv_func__doprnt=yes"
 else
@@ -2347,7 +2337,7 @@ fi
 
 
 echo $ac_n "checking whether the printf functions support %p""... $ac_c" 1>&6
-echo "configure:2349: checking whether the printf functions support %p" >&5
+echo "configure:2339: checking whether the printf functions support %p" >&5
 if eval "test \"`echo '$''{'gcc_cv_func_printf_ptr'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -2355,7 +2345,7 @@ else
   gcc_cv_func_printf_ptr=no
 else
   cat > conftest.$ac_ext <<EOF
-#line 2357 "configure"
+#line 2347 "configure"
 #include "confdefs.h"
 #include <stdio.h>
 
@@ -2368,7 +2358,7 @@ main()
   exit (p != q);
 }
 EOF
-if { (eval echo configure:2370: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
+if { (eval echo configure:2360: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
 then
   gcc_cv_func_printf_ptr=yes
 else
@@ -2401,12 +2391,12 @@ case "${host}" in
   ;;
 esac
 echo $ac_n "checking for pid_t""... $ac_c" 1>&6
-echo "configure:2403: checking for pid_t" >&5
+echo "configure:2393: checking for pid_t" >&5
 if eval "test \"`echo '$''{'ac_cv_type_pid_t'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
   cat > conftest.$ac_ext <<EOF
-#line 2408 "configure"
+#line 2398 "configure"
 #include "confdefs.h"
 #include <sys/types.h>
 #if STDC_HEADERS
@@ -2435,17 +2425,17 @@ fi
 
 ac_safe=`echo "vfork.h" | sed 'y%./+-%__p_%'`
 echo $ac_n "checking for vfork.h""... $ac_c" 1>&6
-echo "configure:2437: checking for vfork.h" >&5
+echo "configure:2427: checking for vfork.h" >&5
 if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
   cat > conftest.$ac_ext <<EOF
-#line 2442 "configure"
+#line 2432 "configure"
 #include "confdefs.h"
 #include <vfork.h>
 EOF
 ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:2447: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+{ (eval echo configure:2437: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
 ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
 if test -z "$ac_err"; then
   rm -rf conftest*
@@ -2470,18 +2460,18 @@ else
 fi
 
 echo $ac_n "checking for working vfork""... $ac_c" 1>&6
-echo "configure:2472: checking for working vfork" >&5
+echo "configure:2462: checking for working vfork" >&5
 if eval "test \"`echo '$''{'ac_cv_func_vfork_works'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
   if test "$cross_compiling" = yes; then
   echo $ac_n "checking for vfork""... $ac_c" 1>&6
-echo "configure:2478: checking for vfork" >&5
+echo "configure:2468: checking for vfork" >&5
 if eval "test \"`echo '$''{'ac_cv_func_vfork'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
   cat > conftest.$ac_ext <<EOF
-#line 2483 "configure"
+#line 2473 "configure"
 #include "confdefs.h"
 /* System header to define __stub macros and hopefully few prototypes,
     which can conflict with char vfork(); below.  */
@@ -2504,7 +2494,7 @@ vfork();
 
 ; return 0; }
 EOF
-if { (eval echo configure:2506: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:2496: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
   rm -rf conftest*
   eval "ac_cv_func_vfork=yes"
 else
@@ -2526,7 +2516,7 @@ fi
 ac_cv_func_vfork_works=$ac_cv_func_vfork
 else
   cat > conftest.$ac_ext <<EOF
-#line 2528 "configure"
+#line 2518 "configure"
 #include "confdefs.h"
 /* Thanks to Paul Eggert for this test.  */
 #include <stdio.h>
@@ -2621,7 +2611,7 @@ main() {
   }
 }
 EOF
-if { (eval echo configure:2623: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
+if { (eval echo configure:2613: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
 then
   ac_cv_func_vfork_works=yes
 else
@@ -2649,12 +2639,12 @@ for ac_func in malloc realloc calloc free bcopy bzero bcmp \
 	strsignal putc_unlocked fputs_unlocked strstr
 do
 echo $ac_n "checking whether $ac_func must be declared""... $ac_c" 1>&6
-echo "configure:2651: checking whether $ac_func must be declared" >&5
+echo "configure:2641: checking whether $ac_func must be declared" >&5
 if eval "test \"`echo '$''{'gcc_cv_decl_needed_$ac_func'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
   cat > conftest.$ac_ext <<EOF
-#line 2656 "configure"
+#line 2646 "configure"
 #include "confdefs.h"
 
 #include <stdio.h>
@@ -2687,7 +2677,7 @@ int main() {
 char *(*pfn) = (char *(*)) $ac_func
 ; return 0; }
 EOF
-if { (eval echo configure:2689: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+if { (eval echo configure:2679: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
   rm -rf conftest*
   eval "gcc_cv_decl_needed_$ac_func=no"
 else
@@ -2716,12 +2706,12 @@ done
 for ac_func in getrlimit setrlimit
 do
 echo $ac_n "checking whether $ac_func must be declared""... $ac_c" 1>&6
-echo "configure:2718: checking whether $ac_func must be declared" >&5
+echo "configure:2708: checking whether $ac_func must be declared" >&5
 if eval "test \"`echo '$''{'gcc_cv_decl_needed_$ac_func'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
   cat > conftest.$ac_ext <<EOF
-#line 2723 "configure"
+#line 2713 "configure"
 #include "confdefs.h"
 
 #include <stdio.h>
@@ -2758,7 +2748,7 @@ int main() {
 char *(*pfn) = (char *(*)) $ac_func
 ; return 0; }
 EOF
-if { (eval echo configure:2760: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+if { (eval echo configure:2750: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
   rm -rf conftest*
   eval "gcc_cv_decl_needed_$ac_func=no"
 else
@@ -2785,12 +2775,12 @@ done
 
 
 echo $ac_n "checking for sys_siglist declaration in signal.h or unistd.h""... $ac_c" 1>&6
-echo "configure:2787: checking for sys_siglist declaration in signal.h or unistd.h" >&5
+echo "configure:2777: checking for sys_siglist declaration in signal.h or unistd.h" >&5
 if eval "test \"`echo '$''{'ac_cv_decl_sys_siglist'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
   cat > conftest.$ac_ext <<EOF
-#line 2792 "configure"
+#line 2782 "configure"
 #include "confdefs.h"
 #include <sys/types.h>
 #include <signal.h>
@@ -2802,7 +2792,7 @@ int main() {
 char *msg = *(sys_siglist + 1);
 ; return 0; }
 EOF
-if { (eval echo configure:2804: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+if { (eval echo configure:2794: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
   rm -rf conftest*
   ac_cv_decl_sys_siglist=yes
 else
@@ -2825,12 +2815,12 @@ fi
 
 # mkdir takes a single argument on some systems. 
 echo $ac_n "checking if mkdir takes one argument""... $ac_c" 1>&6
-echo "configure:2827: checking if mkdir takes one argument" >&5
+echo "configure:2817: checking if mkdir takes one argument" >&5
 if eval "test \"`echo '$''{'gcc_cv_mkdir_takes_one_arg'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
   cat > conftest.$ac_ext <<EOF
-#line 2832 "configure"
+#line 2822 "configure"
 #include "confdefs.h"
 
 #include <sys/types.h>
@@ -2847,7 +2837,7 @@ int main() {
 mkdir ("foo", 0);
 ; return 0; }
 EOF
-if { (eval echo configure:2849: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+if { (eval echo configure:2839: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
   rm -rf conftest*
   gcc_cv_mkdir_takes_one_arg=no
 else
@@ -3205,15 +3195,31 @@ for machine in $build $host $target; do
 		tmake_file=arm/t-linux
 		gnu_ld=yes
 		;;
-	arm*-*-linux-gnu*)		# ARM GNU/Linux with ELF
+	arm*-*-linux-gnuoldld*)		# ARM GNU/Linux with old ELF linker
 		xm_file=arm/xm-linux.h
 		xmake_file=x-linux
+		tm_file="arm/linux-oldld.h arm/linux-elf.h"
 		case $machine in
 		armv2*-*-*)
-			tm_file=arm/linux-elf26.h
+			tm_file="arm/linux-elf26.h $tm_file"
 			;;
-		*)
-			tm_file=arm/linux-elf.h
+		esac
+		tmake_file="t-linux arm/t-linux"
+		extra_parts="crtbegin.o crtbeginS.o crtend.o crtendS.o"
+		gnu_ld=yes
+		case x${enable_threads} in
+		x | xyes | xpthreads | xposix)
+			thread_file='posix'
+			;;
+		esac
+		;;
+	arm*-*-linux-gnu*)		# ARM GNU/Linux with ELF
+		xm_file=arm/xm-linux.h
+		xmake_file=x-linux
+		tm_file="arm/linux-elf.h"
+		case $machine in
+		armv2*-*-*)
+			tm_file="arm/linux-elf26.h $tm_file"
 			;;
 		esac
 		tmake_file="t-linux arm/t-linux"
@@ -6082,7 +6088,7 @@ fi
 
 
         echo $ac_n "checking for strerror in -lcposix""... $ac_c" 1>&6
-echo "configure:6063: checking for strerror in -lcposix" >&5
+echo "configure:6069: checking for strerror in -lcposix" >&5
 ac_lib_var=`echo cposix'_'strerror | sed 'y%./+-%__p_%'`
 if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
@@ -6090,7 +6096,7 @@ else
   ac_save_LIBS="$LIBS"
 LIBS="-lcposix  $LIBS"
 cat > conftest.$ac_ext <<EOF
-#line 6071 "configure"
+#line 6077 "configure"
 #include "confdefs.h"
 /* Override any gcc2 internal prototype to avoid an error.  */
 /* We use char because int might match the return type of a gcc2
@@ -6101,7 +6107,7 @@ int main() {
 strerror()
 ; return 0; }
 EOF
-if { (eval echo configure:6082: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:6088: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
   rm -rf conftest*
   eval "ac_cv_lib_$ac_lib_var=yes"
 else
@@ -6124,12 +6130,12 @@ fi
   
 
 echo $ac_n "checking for working const""... $ac_c" 1>&6
-echo "configure:6105: checking for working const" >&5
+echo "configure:6111: checking for working const" >&5
 if eval "test \"`echo '$''{'ac_cv_c_const'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
   cat > conftest.$ac_ext <<EOF
-#line 6110 "configure"
+#line 6116 "configure"
 #include "confdefs.h"
 
 int main() {
@@ -6178,7 +6184,7 @@ ccp = (char const *const *) p;
 
 ; return 0; }
 EOF
-if { (eval echo configure:6159: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+if { (eval echo configure:6165: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
   rm -rf conftest*
   ac_cv_c_const=yes
 else
@@ -6199,21 +6205,21 @@ EOF
 fi
 
 echo $ac_n "checking for inline""... $ac_c" 1>&6
-echo "configure:6180: checking for inline" >&5
+echo "configure:6186: checking for inline" >&5
 if eval "test \"`echo '$''{'ac_cv_c_inline'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
   ac_cv_c_inline=no
 for ac_kw in inline __inline__ __inline; do
   cat > conftest.$ac_ext <<EOF
-#line 6187 "configure"
+#line 6193 "configure"
 #include "confdefs.h"
 
 int main() {
 } $ac_kw foo() {
 ; return 0; }
 EOF
-if { (eval echo configure:6194: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+if { (eval echo configure:6200: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
   rm -rf conftest*
   ac_cv_c_inline=$ac_kw; break
 else
@@ -6239,12 +6245,12 @@ EOF
 esac
 
 echo $ac_n "checking for off_t""... $ac_c" 1>&6
-echo "configure:6220: checking for off_t" >&5
+echo "configure:6226: checking for off_t" >&5
 if eval "test \"`echo '$''{'ac_cv_type_off_t'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
   cat > conftest.$ac_ext <<EOF
-#line 6225 "configure"
+#line 6231 "configure"
 #include "confdefs.h"
 #include <sys/types.h>
 #if STDC_HEADERS
@@ -6272,12 +6278,12 @@ EOF
 fi
 
 echo $ac_n "checking for size_t""... $ac_c" 1>&6
-echo "configure:6253: checking for size_t" >&5
+echo "configure:6259: checking for size_t" >&5
 if eval "test \"`echo '$''{'ac_cv_type_size_t'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
   cat > conftest.$ac_ext <<EOF
-#line 6258 "configure"
+#line 6264 "configure"
 #include "confdefs.h"
 #include <sys/types.h>
 #if STDC_HEADERS
@@ -6307,19 +6313,19 @@ fi
 # The Ultrix 4.2 mips builtin alloca declared by alloca.h only works
 # for constant arguments.  Useless!
 echo $ac_n "checking for working alloca.h""... $ac_c" 1>&6
-echo "configure:6288: checking for working alloca.h" >&5
+echo "configure:6294: checking for working alloca.h" >&5
 if eval "test \"`echo '$''{'ac_cv_header_alloca_h'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
   cat > conftest.$ac_ext <<EOF
-#line 6293 "configure"
+#line 6299 "configure"
 #include "confdefs.h"
 #include <alloca.h>
 int main() {
 char *p = alloca(2 * sizeof(int));
 ; return 0; }
 EOF
-if { (eval echo configure:6300: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:6306: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
   rm -rf conftest*
   ac_cv_header_alloca_h=yes
 else
@@ -6340,12 +6346,12 @@ EOF
 fi
 
 echo $ac_n "checking for alloca""... $ac_c" 1>&6
-echo "configure:6321: checking for alloca" >&5
+echo "configure:6327: checking for alloca" >&5
 if eval "test \"`echo '$''{'ac_cv_func_alloca_works'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
   cat > conftest.$ac_ext <<EOF
-#line 6326 "configure"
+#line 6332 "configure"
 #include "confdefs.h"
 
 #ifdef __GNUC__
@@ -6373,7 +6379,7 @@ int main() {
 char *p = (char *) alloca(1);
 ; return 0; }
 EOF
-if { (eval echo configure:6354: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:6360: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
   rm -rf conftest*
   ac_cv_func_alloca_works=yes
 else
@@ -6405,12 +6411,12 @@ EOF
 
 
 echo $ac_n "checking whether alloca needs Cray hooks""... $ac_c" 1>&6
-echo "configure:6386: checking whether alloca needs Cray hooks" >&5
+echo "configure:6392: checking whether alloca needs Cray hooks" >&5
 if eval "test \"`echo '$''{'ac_cv_os_cray'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
   cat > conftest.$ac_ext <<EOF
-#line 6391 "configure"
+#line 6397 "configure"
 #include "confdefs.h"
 #if defined(CRAY) && ! defined(CRAY2)
 webecray
@@ -6435,12 +6441,12 @@ echo "$ac_t""$ac_cv_os_cray" 1>&6
 if test $ac_cv_os_cray = yes; then
 for ac_func in _getb67 GETB67 getb67; do
   echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:6416: checking for $ac_func" >&5
+echo "configure:6422: checking for $ac_func" >&5
 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
   cat > conftest.$ac_ext <<EOF
-#line 6421 "configure"
+#line 6427 "configure"
 #include "confdefs.h"
 /* System header to define __stub macros and hopefully few prototypes,
     which can conflict with char $ac_func(); below.  */
@@ -6463,7 +6469,7 @@ $ac_func();
 
 ; return 0; }
 EOF
-if { (eval echo configure:6444: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:6450: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
   rm -rf conftest*
   eval "ac_cv_func_$ac_func=yes"
 else
@@ -6490,7 +6496,7 @@ done
 fi
 
 echo $ac_n "checking stack direction for C alloca""... $ac_c" 1>&6
-echo "configure:6471: checking stack direction for C alloca" >&5
+echo "configure:6477: checking stack direction for C alloca" >&5
 if eval "test \"`echo '$''{'ac_cv_c_stack_direction'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -6498,7 +6504,7 @@ else
   ac_cv_c_stack_direction=0
 else
   cat > conftest.$ac_ext <<EOF
-#line 6479 "configure"
+#line 6485 "configure"
 #include "confdefs.h"
 find_stack_direction ()
 {
@@ -6517,7 +6523,7 @@ main ()
   exit (find_stack_direction() < 0);
 }
 EOF
-if { (eval echo configure:6498: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
+if { (eval echo configure:6504: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
 then
   ac_cv_c_stack_direction=1
 else
@@ -6542,17 +6548,17 @@ for ac_hdr in unistd.h
 do
 ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
 echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:6523: checking for $ac_hdr" >&5
+echo "configure:6529: checking for $ac_hdr" >&5
 if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
   cat > conftest.$ac_ext <<EOF
-#line 6528 "configure"
+#line 6534 "configure"
 #include "confdefs.h"
 #include <$ac_hdr>
 EOF
 ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:6533: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+{ (eval echo configure:6539: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
 ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
 if test -z "$ac_err"; then
   rm -rf conftest*
@@ -6581,12 +6587,12 @@ done
 for ac_func in getpagesize
 do
 echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:6562: checking for $ac_func" >&5
+echo "configure:6568: checking for $ac_func" >&5
 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
   cat > conftest.$ac_ext <<EOF
-#line 6567 "configure"
+#line 6573 "configure"
 #include "confdefs.h"
 /* System header to define __stub macros and hopefully few prototypes,
     which can conflict with char $ac_func(); below.  */
@@ -6609,7 +6615,7 @@ $ac_func();
 
 ; return 0; }
 EOF
-if { (eval echo configure:6590: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:6596: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
   rm -rf conftest*
   eval "ac_cv_func_$ac_func=yes"
 else
@@ -6634,7 +6640,7 @@ fi
 done
 
 echo $ac_n "checking for working mmap""... $ac_c" 1>&6
-echo "configure:6615: checking for working mmap" >&5
+echo "configure:6621: checking for working mmap" >&5
 if eval "test \"`echo '$''{'ac_cv_func_mmap_fixed_mapped'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -6642,7 +6648,7 @@ else
   ac_cv_func_mmap_fixed_mapped=no
 else
   cat > conftest.$ac_ext <<EOF
-#line 6623 "configure"
+#line 6629 "configure"
 #include "confdefs.h"
 
 /* Thanks to Mike Haertel and Jim Avera for this test.
@@ -6782,7 +6788,7 @@ main()
 }
 
 EOF
-if { (eval echo configure:6763: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
+if { (eval echo configure:6769: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
 then
   ac_cv_func_mmap_fixed_mapped=yes
 else
@@ -6810,17 +6816,17 @@ unistd.h sys/param.h
 do
 ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
 echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:6791: checking for $ac_hdr" >&5
+echo "configure:6797: checking for $ac_hdr" >&5
 if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
   cat > conftest.$ac_ext <<EOF
-#line 6796 "configure"
+#line 6802 "configure"
 #include "confdefs.h"
 #include <$ac_hdr>
 EOF
 ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:6801: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+{ (eval echo configure:6807: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
 ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
 if test -z "$ac_err"; then
   rm -rf conftest*
@@ -6850,12 +6856,12 @@ done
 strdup __argz_count __argz_stringify __argz_next
 do
 echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:6831: checking for $ac_func" >&5
+echo "configure:6837: checking for $ac_func" >&5
 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
   cat > conftest.$ac_ext <<EOF
-#line 6836 "configure"
+#line 6842 "configure"
 #include "confdefs.h"
 /* System header to define __stub macros and hopefully few prototypes,
     which can conflict with char $ac_func(); below.  */
@@ -6878,7 +6884,7 @@ $ac_func();
 
 ; return 0; }
 EOF
-if { (eval echo configure:6859: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:6865: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
   rm -rf conftest*
   eval "ac_cv_func_$ac_func=yes"
 else
@@ -6907,12 +6913,12 @@ done
      for ac_func in stpcpy
 do
 echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:6888: checking for $ac_func" >&5
+echo "configure:6894: checking for $ac_func" >&5
 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
   cat > conftest.$ac_ext <<EOF
-#line 6893 "configure"
+#line 6899 "configure"
 #include "confdefs.h"
 /* System header to define __stub macros and hopefully few prototypes,
     which can conflict with char $ac_func(); below.  */
@@ -6935,7 +6941,7 @@ $ac_func();
 
 ; return 0; }
 EOF
-if { (eval echo configure:6916: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:6922: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
   rm -rf conftest*
   eval "ac_cv_func_$ac_func=yes"
 else
@@ -6969,19 +6975,19 @@ EOF
 
    if test $ac_cv_header_locale_h = yes; then
     echo $ac_n "checking for LC_MESSAGES""... $ac_c" 1>&6
-echo "configure:6950: checking for LC_MESSAGES" >&5
+echo "configure:6956: checking for LC_MESSAGES" >&5
 if eval "test \"`echo '$''{'am_cv_val_LC_MESSAGES'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
   cat > conftest.$ac_ext <<EOF
-#line 6955 "configure"
+#line 6961 "configure"
 #include "confdefs.h"
 #include <locale.h>
 int main() {
 return LC_MESSAGES
 ; return 0; }
 EOF
-if { (eval echo configure:6962: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:6968: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
   rm -rf conftest*
   am_cv_val_LC_MESSAGES=yes
 else
@@ -7002,7 +7008,7 @@ EOF
     fi
   fi
    echo $ac_n "checking whether NLS is requested""... $ac_c" 1>&6
-echo "configure:6983: checking whether NLS is requested" >&5
+echo "configure:6989: checking whether NLS is requested" >&5
         # Check whether --enable-nls or --disable-nls was given.
 if test "${enable_nls+set}" = set; then
   enableval="$enable_nls"
@@ -7022,7 +7028,7 @@ fi
 EOF
 
       echo $ac_n "checking whether included gettext is requested""... $ac_c" 1>&6
-echo "configure:7003: checking whether included gettext is requested" >&5
+echo "configure:7009: checking whether included gettext is requested" >&5
       # Check whether --with-included-gettext or --without-included-gettext was given.
 if test "${with_included_gettext+set}" = set; then
   withval="$with_included_gettext"
@@ -7041,17 +7047,17 @@ fi
 
 	ac_safe=`echo "libintl.h" | sed 'y%./+-%__p_%'`
 echo $ac_n "checking for libintl.h""... $ac_c" 1>&6
-echo "configure:7022: checking for libintl.h" >&5
+echo "configure:7028: checking for libintl.h" >&5
 if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
   cat > conftest.$ac_ext <<EOF
-#line 7027 "configure"
+#line 7033 "configure"
 #include "confdefs.h"
 #include <libintl.h>
 EOF
 ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:7032: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+{ (eval echo configure:7038: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
 ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
 if test -z "$ac_err"; then
   rm -rf conftest*
@@ -7068,19 +7074,19 @@ fi
 if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
   echo "$ac_t""yes" 1>&6
   echo $ac_n "checking for gettext in libc""... $ac_c" 1>&6
-echo "configure:7049: checking for gettext in libc" >&5
+echo "configure:7055: checking for gettext in libc" >&5
 if eval "test \"`echo '$''{'gt_cv_func_gettext_libc'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
   cat > conftest.$ac_ext <<EOF
-#line 7054 "configure"
+#line 7060 "configure"
 #include "confdefs.h"
 #include <libintl.h>
 int main() {
 return (int) gettext ("")
 ; return 0; }
 EOF
-if { (eval echo configure:7061: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:7067: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
   rm -rf conftest*
   gt_cv_func_gettext_libc=yes
 else
@@ -7096,7 +7102,7 @@ echo "$ac_t""$gt_cv_func_gettext_libc" 1>&6
 
 	   if test "$gt_cv_func_gettext_libc" != "yes"; then
 	     echo $ac_n "checking for bindtextdomain in -lintl""... $ac_c" 1>&6
-echo "configure:7077: checking for bindtextdomain in -lintl" >&5
+echo "configure:7083: checking for bindtextdomain in -lintl" >&5
 ac_lib_var=`echo intl'_'bindtextdomain | sed 'y%./+-%__p_%'`
 if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
@@ -7104,7 +7110,7 @@ else
   ac_save_LIBS="$LIBS"
 LIBS="-lintl  $LIBS"
 cat > conftest.$ac_ext <<EOF
-#line 7085 "configure"
+#line 7091 "configure"
 #include "confdefs.h"
 /* Override any gcc2 internal prototype to avoid an error.  */
 /* We use char because int might match the return type of a gcc2
@@ -7115,7 +7121,7 @@ int main() {
 bindtextdomain()
 ; return 0; }
 EOF
-if { (eval echo configure:7096: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:7102: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
   rm -rf conftest*
   eval "ac_cv_lib_$ac_lib_var=yes"
 else
@@ -7131,12 +7137,12 @@ fi
 if eval "test \"`echo '$ac_cv_lib_'$ac_lib_var`\" = yes"; then
   echo "$ac_t""yes" 1>&6
   echo $ac_n "checking for gettext in libintl""... $ac_c" 1>&6
-echo "configure:7112: checking for gettext in libintl" >&5
+echo "configure:7118: checking for gettext in libintl" >&5
 if eval "test \"`echo '$''{'gt_cv_func_gettext_libintl'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
   echo $ac_n "checking for gettext in -lintl""... $ac_c" 1>&6
-echo "configure:7117: checking for gettext in -lintl" >&5
+echo "configure:7123: checking for gettext in -lintl" >&5
 ac_lib_var=`echo intl'_'gettext | sed 'y%./+-%__p_%'`
 if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
@@ -7144,7 +7150,7 @@ else
   ac_save_LIBS="$LIBS"
 LIBS="-lintl  $LIBS"
 cat > conftest.$ac_ext <<EOF
-#line 7125 "configure"
+#line 7131 "configure"
 #include "confdefs.h"
 /* Override any gcc2 internal prototype to avoid an error.  */
 /* We use char because int might match the return type of a gcc2
@@ -7155,7 +7161,7 @@ int main() {
 gettext()
 ; return 0; }
 EOF
-if { (eval echo configure:7136: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:7142: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
   rm -rf conftest*
   eval "ac_cv_lib_$ac_lib_var=yes"
 else
@@ -7194,7 +7200,7 @@ EOF
 	      # Extract the first word of "msgfmt", so it can be a program name with args.
 set dummy msgfmt; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:7175: checking for $ac_word" >&5
+echo "configure:7181: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_path_MSGFMT'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -7228,12 +7234,12 @@ fi
 		for ac_func in dcgettext
 do
 echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:7209: checking for $ac_func" >&5
+echo "configure:7215: checking for $ac_func" >&5
 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
   cat > conftest.$ac_ext <<EOF
-#line 7214 "configure"
+#line 7220 "configure"
 #include "confdefs.h"
 /* System header to define __stub macros and hopefully few prototypes,
     which can conflict with char $ac_func(); below.  */
@@ -7256,7 +7262,7 @@ $ac_func();
 
 ; return 0; }
 EOF
-if { (eval echo configure:7237: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:7243: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
   rm -rf conftest*
   eval "ac_cv_func_$ac_func=yes"
 else
@@ -7283,7 +7289,7 @@ done
 		# Extract the first word of "gmsgfmt", so it can be a program name with args.
 set dummy gmsgfmt; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:7264: checking for $ac_word" >&5
+echo "configure:7270: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_path_GMSGFMT'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -7319,7 +7325,7 @@ fi
 		# Extract the first word of "xgettext", so it can be a program name with args.
 set dummy xgettext; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:7300: checking for $ac_word" >&5
+echo "configure:7306: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_path_XGETTEXT'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -7351,7 +7357,7 @@ else
 fi
 
 		cat > conftest.$ac_ext <<EOF
-#line 7332 "configure"
+#line 7338 "configure"
 #include "confdefs.h"
 
 int main() {
@@ -7359,7 +7365,7 @@ extern int _nl_msg_cat_cntr;
 			       return _nl_msg_cat_cntr
 ; return 0; }
 EOF
-if { (eval echo configure:7340: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:7346: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
   rm -rf conftest*
   CATOBJEXT=.gmo
 		   DATADIRNAME=share
@@ -7382,7 +7388,7 @@ fi
 
         if test "$CATOBJEXT" = "NONE"; then
 	  echo $ac_n "checking whether catgets can be used""... $ac_c" 1>&6
-echo "configure:7363: checking whether catgets can be used" >&5
+echo "configure:7369: checking whether catgets can be used" >&5
 	  # Check whether --with-catgets or --without-catgets was given.
 if test "${with_catgets+set}" = set; then
   withval="$with_catgets"
@@ -7395,7 +7401,7 @@ fi
 
 	  if test "$nls_cv_use_catgets" = "yes"; then
 	    	    echo $ac_n "checking for main in -li""... $ac_c" 1>&6
-echo "configure:7376: checking for main in -li" >&5
+echo "configure:7382: checking for main in -li" >&5
 ac_lib_var=`echo i'_'main | sed 'y%./+-%__p_%'`
 if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
@@ -7403,14 +7409,14 @@ else
   ac_save_LIBS="$LIBS"
 LIBS="-li  $LIBS"
 cat > conftest.$ac_ext <<EOF
-#line 7384 "configure"
+#line 7390 "configure"
 #include "confdefs.h"
 
 int main() {
 main()
 ; return 0; }
 EOF
-if { (eval echo configure:7391: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:7397: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
   rm -rf conftest*
   eval "ac_cv_lib_$ac_lib_var=yes"
 else
@@ -7438,12 +7444,12 @@ else
 fi
 
 	    echo $ac_n "checking for catgets""... $ac_c" 1>&6
-echo "configure:7419: checking for catgets" >&5
+echo "configure:7425: checking for catgets" >&5
 if eval "test \"`echo '$''{'ac_cv_func_catgets'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
   cat > conftest.$ac_ext <<EOF
-#line 7424 "configure"
+#line 7430 "configure"
 #include "confdefs.h"
 /* System header to define __stub macros and hopefully few prototypes,
     which can conflict with char catgets(); below.  */
@@ -7466,7 +7472,7 @@ catgets();
 
 ; return 0; }
 EOF
-if { (eval echo configure:7447: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:7453: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
   rm -rf conftest*
   eval "ac_cv_func_catgets=yes"
 else
@@ -7488,7 +7494,7 @@ EOF
 	       # Extract the first word of "gencat", so it can be a program name with args.
 set dummy gencat; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:7469: checking for $ac_word" >&5
+echo "configure:7475: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_path_GENCAT'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -7524,7 +7530,7 @@ fi
 		 # Extract the first word of "gmsgfmt", so it can be a program name with args.
 set dummy gmsgfmt; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:7505: checking for $ac_word" >&5
+echo "configure:7511: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_path_GMSGFMT'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -7561,7 +7567,7 @@ fi
 		   # Extract the first word of "msgfmt", so it can be a program name with args.
 set dummy msgfmt; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:7542: checking for $ac_word" >&5
+echo "configure:7548: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_path_GMSGFMT'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -7596,7 +7602,7 @@ fi
 		 # Extract the first word of "xgettext", so it can be a program name with args.
 set dummy xgettext; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:7577: checking for $ac_word" >&5
+echo "configure:7583: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_path_XGETTEXT'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -7654,7 +7660,7 @@ fi
         # Extract the first word of "msgfmt", so it can be a program name with args.
 set dummy msgfmt; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:7635: checking for $ac_word" >&5
+echo "configure:7641: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_path_MSGFMT'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -7688,7 +7694,7 @@ fi
         # Extract the first word of "gmsgfmt", so it can be a program name with args.
 set dummy gmsgfmt; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:7669: checking for $ac_word" >&5
+echo "configure:7675: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_path_GMSGFMT'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -7724,7 +7730,7 @@ fi
         # Extract the first word of "xgettext", so it can be a program name with args.
 set dummy xgettext; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:7705: checking for $ac_word" >&5
+echo "configure:7711: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_path_XGETTEXT'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -7817,7 +7823,7 @@ fi
        LINGUAS=
      else
        echo $ac_n "checking for catalogs to be installed""... $ac_c" 1>&6
-echo "configure:7798: checking for catalogs to be installed" >&5
+echo "configure:7804: checking for catalogs to be installed" >&5
        NEW_LINGUAS=
        for lang in ${LINGUAS=$ALL_LINGUAS}; do
          case "$ALL_LINGUAS" in
@@ -7845,17 +7851,17 @@ echo "configure:7798: checking for catalogs to be installed" >&5
    if test "$CATOBJEXT" = ".cat"; then
      ac_safe=`echo "linux/version.h" | sed 'y%./+-%__p_%'`
 echo $ac_n "checking for linux/version.h""... $ac_c" 1>&6
-echo "configure:7826: checking for linux/version.h" >&5
+echo "configure:7832: checking for linux/version.h" >&5
 if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
   cat > conftest.$ac_ext <<EOF
-#line 7831 "configure"
+#line 7837 "configure"
 #include "confdefs.h"
 #include <linux/version.h>
 EOF
 ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:7836: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+{ (eval echo configure:7842: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
 ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
 if test -z "$ac_err"; then
   rm -rf conftest*
@@ -8089,7 +8095,7 @@ fi
 
 # Figure out what assembler alignment features are present.
 echo $ac_n "checking assembler alignment features""... $ac_c" 1>&6
-echo "configure:8070: checking assembler alignment features" >&5
+echo "configure:8076: checking assembler alignment features" >&5
 gcc_cv_as=
 gcc_cv_as_alignment_features=
 gcc_cv_as_gas_srcdir=`echo $srcdir | sed -e 's,/gcc$,,'`/gas
@@ -8210,7 +8216,7 @@ fi
 echo "$ac_t""$gcc_cv_as_alignment_features" 1>&6
 
 echo $ac_n "checking assembler subsection support""... $ac_c" 1>&6
-echo "configure:8191: checking assembler subsection support" >&5
+echo "configure:8197: checking assembler subsection support" >&5
 gcc_cv_as_subsections=
 if test x$gcc_cv_as != x; then
 	# Check if we have .subsection
@@ -8250,7 +8256,7 @@ fi
 echo "$ac_t""$gcc_cv_as_subsections" 1>&6
 
 echo $ac_n "checking assembler instructions""... $ac_c" 1>&6
-echo "configure:8231: checking assembler instructions" >&5
+echo "configure:8237: checking assembler instructions" >&5
 gcc_cv_as_instructions=
 if test x$gcc_cv_as != x; then
 	set "filds fists" "filds mem; fists mem"
diff --git a/contrib/gcc/cp/decl.c b/contrib/gcc/cp/decl.c
index 113d4b5..bd69ca5 100644
--- a/contrib/gcc/cp/decl.c
+++ b/contrib/gcc/cp/decl.c
@@ -8969,9 +8969,12 @@ grokfndecl (ctype, type, declarator, orig_declarator, virtualp, flags, quals,
 					    template_count, 
 					    2 * (funcdef_flag != 0) + 
 					    4 * (friendp != 0));
+
       if (decl == error_mark_node)
 	return NULL_TREE;
 
+      maybe_vlist_ctor_wrapper (decl, funcdef_flag);
+
       if ((! TYPE_FOR_JAVA (ctype) || check_java_method (decl))
 	  && check)
 	{
@@ -12173,6 +12176,8 @@ grok_ctor_properties (ctype, decl)
       parmtype = TREE_VALUE (parmtypes);
     }
 
+  maybe_vlist_ctor_wrapper (decl, 0);
+
   /* [class.copy]
 
      A non-template constructor for class X is a copy constructor if
diff --git a/contrib/gcc/function.c b/contrib/gcc/function.c
index cd8f249..3237efc 100644
--- a/contrib/gcc/function.c
+++ b/contrib/gcc/function.c
@@ -1430,7 +1430,16 @@ free_temps_for_rtl_expr (t)
 
   for (p = temp_slots; p; p = p->next)
     if (p->rtl_expr == t)
-      p->in_use = 0;
+      {
+	/* If this slot is below the current TEMP_SLOT_LEVEL, then it
+	   needs to be preserved.  This can happen if a temporary in
+	   the RTL_EXPR was addressed; preserve_temp_slots will move
+	   the temporary into a higher level.   */
+	if (temp_slot_level <= p->level)
+	  p->in_use = 0;
+	else
+	  p->rtl_expr = NULL_TREE;
+      }
 
   combine_temp_slots ();
 }
diff --git a/contrib/gcc/gcc.c b/contrib/gcc/gcc.c
index 3128db0..bffdbf3 100644
--- a/contrib/gcc/gcc.c
+++ b/contrib/gcc/gcc.c
@@ -596,7 +596,7 @@ static struct compiler default_compilers[] =
   {"@c",
    {
 #if USE_CPPLIB
-     "%{E|M|MM:cpp -lang-c %{ansi:-std=c89} %{std*} %{nostdinc*}\
+     "%{E|M|MM:cpp0 -lang-c %{ansi:-std=c89} %{std*} %{nostdinc*}\
 	%{C} %{v} %{A*} %{I*} %{P} %{$} %I\
 	%{C:%{!E:%eGNU C does not support -C without using -E}}\
 	%{M} %{MM} %{MD:-MD %b.d} %{MMD:-MMD %b.d} %{MG}\
@@ -632,7 +632,7 @@ static struct compiler default_compilers[] =
 		     %{c:%W{o*}%{!o*:-o %w%b%O}}%{!c:-o %d%w%u%O}\
                      %{!pipe:%g.s} %A\n }}}}"
 #else /* ! USE_CPPLIB */
-    "cpp -lang-c %{ansi:-std=c89} %{std*} %{nostdinc*}\
+    "cpp0 -lang-c %{ansi:-std=c89} %{std*} %{nostdinc*}\
 	%{C} %{v} %{A*} %{I*} %{P} %{$} %I\
 	%{C:%{!E:%eGNU C does not support -C without using -E}}\
 	%{M} %{MM} %{MD:-MD %b.d} %{MMD:-MMD %b.d} %{MG}\
@@ -660,7 +660,7 @@ static struct compiler default_compilers[] =
 #endif /* ! USE_CPPLIB */
   }},
   {"-",
-   {"%{E:cpp -lang-c %{ansi:-std=c89} %{std*} %{nostdinc*}\
+   {"%{E:cpp0 -lang-c %{ansi:-std=c89} %{std*} %{nostdinc*}\
 	%{C} %{v} %{A*} %{I*} %{P} %{$} %I\
 	%{C:%{!E:%eGNU C does not support -C without using -E}}\
 	%{M} %{MM} %{MD:-MD %b.d} %{MMD:-MMD %b.d} %{MG}\
@@ -678,7 +678,7 @@ static struct compiler default_compilers[] =
   {".h", {"@c-header"}},
   {"@c-header",
    {"%{!E:%eCompilation of header file requested} \
-    cpp %{nostdinc*} %{C} %{v} %{A*} %{I*} %{P} %{$} %I\
+    cpp0 %{nostdinc*} %{C} %{v} %{A*} %{I*} %{P} %{$} %I\
 	%{C:%{!E:%eGNU C does not support -C without using -E}}\
 	%{M} %{MM} %{MD:-MD %b.d} %{MMD:-MMD %b.d} %{MG}\
         %{!no-gcc:-D__GNUC__=%v1 -D__GNUC_MINOR__=%v2}\
@@ -709,7 +709,7 @@ static struct compiler default_compilers[] =
 			    %i %A\n }}}}"}},
   {".S", {"@assembler-with-cpp"}},
   {"@assembler-with-cpp",
-   {"cpp -lang-asm %{nostdinc*} %{C} %{v} %{A*} %{I*} %{P} %{$} %I\
+   {"cpp0 -lang-asm %{nostdinc*} %{C} %{v} %{A*} %{I*} %{P} %{$} %I\
 	%{C:%{!E:%eGNU C does not support -C without using -E}}\
 	%{M} %{MM} %{MD:-MD %b.d} %{MMD:-MMD %b.d} %{MG} %{trigraphs}\
         -$ %{!undef:%p %P} -D__ASSEMBLER__ \
diff --git a/contrib/gcc/reload.c b/contrib/gcc/reload.c
index 7be6edc..b49eec3 100644
--- a/contrib/gcc/reload.c
+++ b/contrib/gcc/reload.c
@@ -324,7 +324,6 @@ static int find_reusable_reload	PROTO((rtx *, rtx, enum reg_class,
 static rtx find_dummy_reload	PROTO((rtx, rtx, rtx *, rtx *,
 				       enum machine_mode, enum machine_mode,
 				       enum reg_class, int, int));
-static int earlyclobber_operand_p PROTO((rtx));
 static int hard_reg_set_here_p	PROTO((int, int, rtx));
 static struct decomposition decompose PROTO((rtx));
 static int immune_p		PROTO((rtx, rtx, struct decomposition));
@@ -593,7 +592,13 @@ push_secondary_reload (in_p, x, opnum, optional, reload_class, reload_mode,
 
       if (in_p && icode == CODE_FOR_nothing
 	  && SECONDARY_MEMORY_NEEDED (class, reload_class, mode))
-	get_secondary_mem (x, reload_mode, opnum, type);
+	{
+	  get_secondary_mem (x, reload_mode, opnum, type);
+
+	  /* We may have just added new reloads.  Make sure we add
+	     the new reload at the end.  */
+	  s_reload = n_reloads;
+	}
 #endif
 
       /* We need to make a new secondary reload for this register class.  */
@@ -1531,12 +1536,23 @@ push_reload (in, out, inloc, outloc, class,
 	    && GET_MODE_SIZE (inmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
 	    && HARD_REGNO_MODE_OK (regno, inmode)
 	    && GET_MODE_SIZE (outmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
-	    && HARD_REGNO_MODE_OK (regno, outmode)
-	    && TEST_HARD_REG_BIT (reg_class_contents[(int) class], regno)
-	    && !fixed_regs[regno])
+	    && HARD_REGNO_MODE_OK (regno, outmode))
 	  {
-	    reload_reg_rtx[i] = gen_rtx_REG (inmode, regno);
-	    break;
+	    unsigned int offs;
+	    unsigned int nregs = MAX (HARD_REGNO_NREGS (regno, inmode),
+				      HARD_REGNO_NREGS (regno, outmode));
+
+	    for (offs = 0; offs < nregs; offs++)
+	      if (fixed_regs[regno + offs]
+		  || ! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
+					  regno + offs))
+		break;
+
+	    if (offs == nregs)
+	      {
+		reload_reg_rtx[i] = gen_rtx_REG (inmode, regno);
+		break;
+	      }
 	  }
     }
 
@@ -1991,7 +2007,7 @@ find_dummy_reload (real_in, real_out, inloc, outloc,
 
 /* Return 1 if X is an operand of an insn that is being earlyclobbered.  */
 
-static int
+int
 earlyclobber_operand_p (x)
      rtx x;
 {
@@ -4668,7 +4684,7 @@ find_reloads_address (mode, memrefloc, ad, loc, opnum, type, ind_levels, insn)
 
       else if (regno < FIRST_PSEUDO_REGISTER
 	       && REGNO_MODE_OK_FOR_BASE_P (regno, mode)
-	       && ! regno_clobbered_p (regno, this_insn))
+	       && ! regno_clobbered_p (regno, this_insn, GET_MODE (ad), 0))
 	return 0;
 
       /* If we do not have one of the cases above, we must do the reload.  */
@@ -5348,7 +5364,12 @@ find_reloads_address_1 (mode, x, context, loc, opnum, type, ind_levels, insn)
 			&& (*insn_operand_predicate[icode][0]) (equiv, Pmode)
 			&& (*insn_operand_predicate[icode][1]) (equiv, Pmode)))
 		{
-		  loc = &XEXP (x, 0);
+		  /* We use the original pseudo for loc, so that
+		     emit_reload_insns() knows which pseudo this
+		     reload refers to and updates the pseudo rtx, not
+		     its equivalent memory location, as well as the
+		     corresponding entry in reg_last_reload_reg.  */
+		  loc = &XEXP (x_orig, 0);
 		  x = XEXP (x, 0);
 		  reloadnum
 		    = push_reload (x, x, loc, loc,
@@ -5356,13 +5377,6 @@ find_reloads_address_1 (mode, x, context, loc, opnum, type, ind_levels, insn)
 				    GET_MODE (x), GET_MODE (x), 0, 0,
 				    opnum, RELOAD_OTHER);
 
-		  /* If we created a new MEM based on reg_equiv_mem[REGNO], then
-		     LOC above is part of the new MEM, not the MEM in INSN.
-
-		     We must also replace the address of the MEM in INSN.  */
-		  if (&XEXP (x_orig, 0) != loc)
-		    push_replacement (&XEXP (x_orig, 0), reloadnum, VOIDmode);
-
 		}
 	      else
 		{
@@ -5502,7 +5516,7 @@ find_reloads_address_1 (mode, x, context, loc, opnum, type, ind_levels, insn)
 	   in this insn, reload it into some other register to be safe.
 	   The CLOBBER is supposed to make the register unavailable
 	   from before this insn to after it.  */
-	if (regno_clobbered_p (regno, this_insn))
+	if (regno_clobbered_p (regno, this_insn, GET_MODE (x), 0))
 	  {
 	    push_reload (x, NULL_RTX, loc, NULL_PTR,
 			 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
@@ -6262,16 +6276,29 @@ find_equiv_reg (goal, insn, class, other, reload_reg_p, goalreg, mode)
 		      && (valtry
 			  = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
 		      && (valueno = true_regnum (valtry)) >= 0)))
-	    if (other >= 0
-		? valueno == other
-		: ((unsigned) valueno < FIRST_PSEUDO_REGISTER
-		   && TEST_HARD_REG_BIT (reg_class_contents[(int) class],
-					 valueno)))
-	      {
-		value = valtry;
-		where = p;
-		break;
-	      }
+	    {
+	      if (other >= 0)
+		{
+		  if (valueno != other)
+		    continue;
+		}
+	      else if ((unsigned) valueno >= FIRST_PSEUDO_REGISTER)
+		continue;
+	      else
+		{
+		  int i;
+
+		  for (i = HARD_REGNO_NREGS (valueno, mode) - 1; i >= 0; i--)
+		    if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
+					     valueno + i))
+		      break;
+		  if (i >= 0)
+		    continue;
+		}
+	      value = valtry;
+	      where = p;
+	      break;
+	    }
 	}
     }
 
@@ -6314,15 +6341,22 @@ find_equiv_reg (goal, insn, class, other, reload_reg_p, goalreg, mode)
       && regno < valueno + HARD_REGNO_NREGS (valueno, mode))
     return 0;
 
+  nregs = HARD_REGNO_NREGS (regno, mode);
+  valuenregs = HARD_REGNO_NREGS (valueno, mode);
+
   /* Reject VALUE if it is one of the regs reserved for reloads.
      Reload1 knows how to reuse them anyway, and it would get
      confused if we allocated one without its knowledge.
      (Now that insns introduced by reload are ignored above,
      this case shouldn't happen, but I'm not positive.)  */
 
-  if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1
-      && reload_reg_p[valueno] >= 0)
-    return 0;
+  if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
+    {
+      int i;
+      for (i = 0; i < valuenregs; ++i)
+	if (reload_reg_p[valueno + i] >= 0)
+	  return 0;
+    }
 
   /* On some machines, certain regs must always be rejected
      because they don't behave the way ordinary registers do.  */
@@ -6332,9 +6366,6 @@ find_equiv_reg (goal, insn, class, other, reload_reg_p, goalreg, mode)
     return 0;
 #endif      
 
-  nregs = HARD_REGNO_NREGS (regno, mode);
-  valuenregs = HARD_REGNO_NREGS (valueno, mode);
-
   /* Reject VALUE if it is a register being used for an input reload
      even if it is not one of those reserved.  */
 
@@ -6370,16 +6401,23 @@ find_equiv_reg (goal, insn, class, other, reload_reg_p, goalreg, mode)
 
       /* Don't trust the conversion past a function call
 	 if either of the two is in a call-clobbered register, or memory.  */
-      if (GET_CODE (p) == CALL_INSN
-	  && ((regno >= 0 && regno < FIRST_PSEUDO_REGISTER
-	       && call_used_regs[regno])
-	      ||
-	      (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
-	       && call_used_regs[valueno])
-	      ||
-	      goal_mem
-	      || need_stable_sp))
-	return 0;
+      if (GET_CODE (p) == CALL_INSN)
+	{
+	  int i;
+
+	  if (goal_mem || need_stable_sp)
+	    return 0;
+
+	  if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER)
+	    for (i = 0; i < nregs; ++i)
+	      if (call_used_regs[regno + i])
+		return 0;
+
+	  if (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER)
+	    for (i = 0; i < valuenregs; ++i)
+	      if (call_used_regs[valueno + i])
+		return 0;
+	}
 
 #ifdef NON_SAVING_SETJMP 
       if (NON_SAVING_SETJMP && GET_CODE (p) == NOTE
@@ -6615,13 +6653,23 @@ find_inc_amount (x, inced)
 /* Return 1 if register REGNO is the subject of a clobber in insn INSN.  */
 
 int
-regno_clobbered_p (regno, insn)
+regno_clobbered_p (regno, insn, mode, sets)
      int regno;
      rtx insn;
+     enum machine_mode mode;
+     int sets;
 {
-  if (GET_CODE (PATTERN (insn)) == CLOBBER
+  int nregs = HARD_REGNO_NREGS (regno, mode);
+  int endregno = regno + nregs;
+
+  if ((GET_CODE (PATTERN (insn)) == CLOBBER
+       || (sets && GET_CODE (PATTERN (insn)) == SET))
       && GET_CODE (XEXP (PATTERN (insn), 0)) == REG)
-    return REGNO (XEXP (PATTERN (insn), 0)) == regno;
+    {
+      int test = REGNO (XEXP (PATTERN (insn), 0));
+
+      return test >= regno && test < endregno;
+    }
 
   if (GET_CODE (PATTERN (insn)) == PARALLEL)
     {
@@ -6630,9 +6678,15 @@ regno_clobbered_p (regno, insn)
       for (; i >= 0; i--)
 	{
 	  rtx elt = XVECEXP (PATTERN (insn), 0, i);
-	  if (GET_CODE (elt) == CLOBBER && GET_CODE (XEXP (elt, 0)) == REG
-	      && REGNO (XEXP (elt, 0)) == regno)
-	    return 1;
+	  if ((GET_CODE (elt) == CLOBBER
+	       || (sets && GET_CODE (PATTERN (insn)) == SET))
+	      && GET_CODE (XEXP (elt, 0)) == REG)
+	    {
+	      int test = REGNO (XEXP (elt, 0));
+	      
+	      if (test >= regno && test < endregno)
+		return 1;
+	    }
 	}
     }