This commit was generated by cvs2svn to compensate for changes in r161651,

which included commits to RCS files with non-trunk default branches.

21 files changed, 509 insertions, 313 deletions

diff --git a/contrib/gcc/config/alpha/alpha.md b/contrib/gcc/config/alpha/alpha.md
index c008e1b..cca51ba 100644
--- a/contrib/gcc/config/alpha/alpha.md
+++ b/contrib/gcc/config/alpha/alpha.md
@@ -967,7 +967,7 @@
    (clobber (reg:DI 23))
    (clobber (reg:DI 28))]
   "TARGET_EXPLICIT_RELOCS && ! TARGET_ABI_OPEN_VMS"
-  "ldq $27,__%E3($29)\t\t!literal!%#\;jsr $23,($27),__%E3\t\t!lituse_jsr!%#"
+  "#"
   "&& reload_completed"
   [(parallel [(set (match_dup 0)
 		   (sign_extend:DI (match_dup 3)))
@@ -1012,7 +1012,7 @@
    (clobber (reg:DI 23))
    (clobber (reg:DI 28))]
   "TARGET_EXPLICIT_RELOCS && ! TARGET_ABI_OPEN_VMS"
-  "jsr $23,($27),__%E3%J5"
+  "jsr $23,($27),__%E3%j5"
   [(set_attr "type" "jsr")
    (set_attr "length" "4")])
 
@@ -1036,7 +1036,7 @@
    (clobber (reg:DI 23))
    (clobber (reg:DI 28))]
   "TARGET_EXPLICIT_RELOCS && ! TARGET_ABI_OPEN_VMS"
-  "ldq $27,__%E3($29)\t\t!literal!%#\;jsr $23,($27),__%E3\t\t!lituse_jsr!%#"
+  "#"
   "&& reload_completed"
   [(parallel [(set (match_dup 0) (match_dup 3))
 	      (use (match_dup 0))
@@ -1080,7 +1080,7 @@
    (clobber (reg:DI 23))
    (clobber (reg:DI 28))]
   "TARGET_EXPLICIT_RELOCS && ! TARGET_ABI_OPEN_VMS"
-  "jsr $23,($27),__%E3%J5"
+  "jsr $23,($27),__%E3%j5"
   [(set_attr "type" "jsr")
    (set_attr "length" "4")])
 
diff --git a/contrib/gcc/config/arm/arm-protos.h b/contrib/gcc/config/arm/arm-protos.h
index 2da99b8..0b28e74 100644
--- a/contrib/gcc/config/arm/arm-protos.h
+++ b/contrib/gcc/config/arm/arm-protos.h
@@ -105,8 +105,10 @@ extern int load_multiple_sequence (rtx *, int, int *, int *, HOST_WIDE_INT *);
 extern const char *emit_ldm_seq (rtx *, int);
 extern int store_multiple_sequence (rtx *, int, int *, int *, HOST_WIDE_INT *);
 extern const char * emit_stm_seq (rtx *, int);
-extern rtx arm_gen_load_multiple (int, int, rtx, int, int, int, int, int);
-extern rtx arm_gen_store_multiple (int, int, rtx, int, int, int, int, int);
+extern rtx arm_gen_load_multiple (int, int, rtx, int, int,
+				  rtx, HOST_WIDE_INT *);
+extern rtx arm_gen_store_multiple (int, int, rtx, int, int,
+				   rtx, HOST_WIDE_INT *);
 extern int arm_gen_movstrqi (rtx *);
 extern rtx arm_gen_rotated_half_load (rtx);
 extern enum machine_mode arm_select_cc_mode (RTX_CODE, rtx, rtx);
diff --git a/contrib/gcc/config/arm/arm.c b/contrib/gcc/config/arm/arm.c
index 9518894..2f0eaed 100644
--- a/contrib/gcc/config/arm/arm.c
+++ b/contrib/gcc/config/arm/arm.c
@@ -5158,13 +5158,13 @@ multi_register_push (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
 
 rtx
 arm_gen_load_multiple (int base_regno, int count, rtx from, int up,
-		       int write_back, int unchanging_p, int in_struct_p,
-		       int scalar_p)
+		       int write_back, rtx basemem, HOST_WIDE_INT *offsetp)
 {
+  HOST_WIDE_INT offset = *offsetp;
   int i = 0, j;
   rtx result;
   int sign = up ? 1 : -1;
-  rtx mem;
+  rtx mem, addr;
 
   /* XScale has load-store double instructions, but they have stricter
      alignment requirements than load-store multiple, so we can not
@@ -5202,15 +5202,17 @@ arm_gen_load_multiple (int base_regno, int count, rtx from, int up,
       
       for (i = 0; i < count; i++)
 	{
-	  mem = gen_rtx_MEM (SImode, plus_constant (from, i * 4 * sign));
-	  RTX_UNCHANGING_P (mem) = unchanging_p;
-	  MEM_IN_STRUCT_P (mem) = in_struct_p;
-	  MEM_SCALAR_P (mem) = scalar_p;
+	  addr = plus_constant (from, i * 4 * sign);
+	  mem = adjust_automodify_address (basemem, SImode, addr, offset);
 	  emit_move_insn (gen_rtx_REG (SImode, base_regno + i), mem);
+	  offset += 4 * sign;
 	}
 
       if (write_back)
-	emit_move_insn (from, plus_constant (from, count * 4 * sign));
+	{
+	  emit_move_insn (from, plus_constant (from, count * 4 * sign));
+	  *offsetp = offset;
+	}
 
       seq = get_insns ();
       end_sequence ();
@@ -5231,26 +5233,28 @@ arm_gen_load_multiple (int base_regno, int count, rtx from, int up,
 
   for (j = 0; i < count; i++, j++)
     {
-      mem = gen_rtx_MEM (SImode, plus_constant (from, j * 4 * sign));
-      RTX_UNCHANGING_P (mem) = unchanging_p;
-      MEM_IN_STRUCT_P (mem) = in_struct_p;
-      MEM_SCALAR_P (mem) = scalar_p;
+      addr = plus_constant (from, j * 4 * sign);
+      mem = adjust_automodify_address_nv (basemem, SImode, addr, offset);
       XVECEXP (result, 0, i)
 	= gen_rtx_SET (VOIDmode, gen_rtx_REG (SImode, base_regno + j), mem);
+      offset += 4 * sign;
     }
 
+  if (write_back)
+    *offsetp = offset;
+
   return result;
 }
 
 rtx
 arm_gen_store_multiple (int base_regno, int count, rtx to, int up,
-			int write_back, int unchanging_p, int in_struct_p,
-			int scalar_p)
+			int write_back, rtx basemem, HOST_WIDE_INT *offsetp)
 {
+  HOST_WIDE_INT offset = *offsetp;
   int i = 0, j;
   rtx result;
   int sign = up ? 1 : -1;
-  rtx mem;
+  rtx mem, addr;
 
   /* See arm_gen_load_multiple for discussion of
      the pros/cons of ldm/stm usage for XScale.  */
@@ -5262,15 +5266,17 @@ arm_gen_store_multiple (int base_regno, int count, rtx to, int up,
       
       for (i = 0; i < count; i++)
 	{
-	  mem = gen_rtx_MEM (SImode, plus_constant (to, i * 4 * sign));
-	  RTX_UNCHANGING_P (mem) = unchanging_p;
-	  MEM_IN_STRUCT_P (mem) = in_struct_p;
-	  MEM_SCALAR_P (mem) = scalar_p;
+	  addr = plus_constant (to, i * 4 * sign);
+	  mem = adjust_automodify_address (basemem, SImode, addr, offset);
 	  emit_move_insn (mem, gen_rtx_REG (SImode, base_regno + i));
+	  offset += 4 * sign;
 	}
 
       if (write_back)
-	emit_move_insn (to, plus_constant (to, count * 4 * sign));
+	{
+	  emit_move_insn (to, plus_constant (to, count * 4 * sign));
+	  *offsetp = offset;
+	}
 
       seq = get_insns ();
       end_sequence ();
@@ -5291,15 +5297,16 @@ arm_gen_store_multiple (int base_regno, int count, rtx to, int up,
 
   for (j = 0; i < count; i++, j++)
     {
-      mem = gen_rtx_MEM (SImode, plus_constant (to, j * 4 * sign));
-      RTX_UNCHANGING_P (mem) = unchanging_p;
-      MEM_IN_STRUCT_P (mem) = in_struct_p;
-      MEM_SCALAR_P (mem) = scalar_p;
-
+      addr = plus_constant (to, j * 4 * sign);
+      mem = adjust_automodify_address_nv (basemem, SImode, addr, offset);
       XVECEXP (result, 0, i)
 	= gen_rtx_SET (VOIDmode, mem, gen_rtx_REG (SImode, base_regno + j));
+      offset += 4 * sign;
     }
 
+  if (write_back)
+    *offsetp = offset;
+
   return result;
 }
 
@@ -5307,13 +5314,11 @@ int
 arm_gen_movstrqi (rtx *operands)
 {
   HOST_WIDE_INT in_words_to_go, out_words_to_go, last_bytes;
+  HOST_WIDE_INT srcoffset, dstoffset;
   int i;
-  rtx src, dst;
-  rtx st_src, st_dst, fin_src, fin_dst;
+  rtx src, dst, srcbase, dstbase;
   rtx part_bytes_reg = NULL;
   rtx mem;
-  int dst_unchanging_p, dst_in_struct_p, src_unchanging_p, src_in_struct_p;
-  int dst_scalar_p, src_scalar_p;
 
   if (GET_CODE (operands[2]) != CONST_INT
       || GET_CODE (operands[3]) != CONST_INT
@@ -5321,23 +5326,17 @@ arm_gen_movstrqi (rtx *operands)
       || INTVAL (operands[3]) & 3)
     return 0;
 
-  st_dst = XEXP (operands[0], 0);
-  st_src = XEXP (operands[1], 0);
-
-  dst_unchanging_p = RTX_UNCHANGING_P (operands[0]);
-  dst_in_struct_p = MEM_IN_STRUCT_P (operands[0]);
-  dst_scalar_p = MEM_SCALAR_P (operands[0]);
-  src_unchanging_p = RTX_UNCHANGING_P (operands[1]);
-  src_in_struct_p = MEM_IN_STRUCT_P (operands[1]);
-  src_scalar_p = MEM_SCALAR_P (operands[1]);
-
-  fin_dst = dst = copy_to_mode_reg (SImode, st_dst);
-  fin_src = src = copy_to_mode_reg (SImode, st_src);
+  dstbase = operands[0];
+  srcbase = operands[1];
+  
+  dst = copy_to_mode_reg (SImode, XEXP (dstbase, 0));
+  src = copy_to_mode_reg (SImode, XEXP (srcbase, 0));
 
   in_words_to_go = ARM_NUM_INTS (INTVAL (operands[2]));
   out_words_to_go = INTVAL (operands[2]) / 4;
   last_bytes = INTVAL (operands[2]) & 3;
-
+  dstoffset = srcoffset = 0;
+  
   if (out_words_to_go != in_words_to_go && ((in_words_to_go - 1) & 3) != 0)
     part_bytes_reg = gen_rtx_REG (SImode, (in_words_to_go - 1) & 3);
 
@@ -5345,38 +5344,32 @@ arm_gen_movstrqi (rtx *operands)
     {
       if (in_words_to_go > 4)
 	emit_insn (arm_gen_load_multiple (0, 4, src, TRUE, TRUE,
-					  src_unchanging_p,
-					  src_in_struct_p,
-					  src_scalar_p));
+					  srcbase, &srcoffset));
       else
 	emit_insn (arm_gen_load_multiple (0, in_words_to_go, src, TRUE, 
-					  FALSE, src_unchanging_p,
-					  src_in_struct_p, src_scalar_p));
+					  FALSE, srcbase, &srcoffset));
 
       if (out_words_to_go)
 	{
 	  if (out_words_to_go > 4)
 	    emit_insn (arm_gen_store_multiple (0, 4, dst, TRUE, TRUE,
-					       dst_unchanging_p,
-					       dst_in_struct_p,
-					       dst_scalar_p));
+					       dstbase, &dstoffset));
+	  
 	  else if (out_words_to_go != 1)
 	    emit_insn (arm_gen_store_multiple (0, out_words_to_go,
 					       dst, TRUE, 
 					       (last_bytes == 0
 						? FALSE : TRUE),
-					       dst_unchanging_p,
-					       dst_in_struct_p,
-					       dst_scalar_p));
+					       dstbase, &dstoffset));
 	  else
 	    {
-	      mem = gen_rtx_MEM (SImode, dst);
-	      RTX_UNCHANGING_P (mem) = dst_unchanging_p;
-	      MEM_IN_STRUCT_P (mem) = dst_in_struct_p;
-	      MEM_SCALAR_P (mem) = dst_scalar_p;
+	      mem = adjust_automodify_address (dstbase, SImode, dst, dstoffset);
 	      emit_move_insn (mem, gen_rtx_REG (SImode, 0));
 	      if (last_bytes != 0)
-		emit_insn (gen_addsi3 (dst, dst, GEN_INT (4)));
+		{
+		  emit_insn (gen_addsi3 (dst, dst, GEN_INT (4)));
+		  dstoffset += 4;
+		}
 	    }
 	}
 
@@ -5388,20 +5381,12 @@ arm_gen_movstrqi (rtx *operands)
   if (out_words_to_go)
     {
       rtx sreg;
-      
-      mem = gen_rtx_MEM (SImode, src);
-      RTX_UNCHANGING_P (mem) = src_unchanging_p;
-      MEM_IN_STRUCT_P (mem) = src_in_struct_p;
-      MEM_SCALAR_P (mem) = src_scalar_p;
-      emit_move_insn (sreg = gen_reg_rtx (SImode), mem);
-      emit_move_insn (fin_src = gen_reg_rtx (SImode), plus_constant (src, 4));
-      
-      mem = gen_rtx_MEM (SImode, dst);
-      RTX_UNCHANGING_P (mem) = dst_unchanging_p;
-      MEM_IN_STRUCT_P (mem) = dst_in_struct_p;
-      MEM_SCALAR_P (mem) = dst_scalar_p;
+
+      mem = adjust_automodify_address (srcbase, SImode, src, srcoffset);
+      sreg = copy_to_reg (mem);
+
+      mem = adjust_automodify_address (dstbase, SImode, dst, dstoffset);
       emit_move_insn (mem, sreg);
-      emit_move_insn (fin_dst = gen_reg_rtx (SImode), plus_constant (dst, 4));
       in_words_to_go--;
       
       if (in_words_to_go)	/* Sanity check */
@@ -5413,10 +5398,7 @@ arm_gen_movstrqi (rtx *operands)
       if (in_words_to_go < 0)
 	abort ();
 
-      mem = gen_rtx_MEM (SImode, src);
-      RTX_UNCHANGING_P (mem) = src_unchanging_p;
-      MEM_IN_STRUCT_P (mem) = src_in_struct_p;
-      MEM_SCALAR_P (mem) = src_scalar_p;
+      mem = adjust_automodify_address (srcbase, SImode, src, srcoffset);
       part_bytes_reg = copy_to_mode_reg (SImode, mem);
     }
 
@@ -5434,10 +5416,9 @@ arm_gen_movstrqi (rtx *operands)
       
       while (last_bytes)
 	{
-	  mem = gen_rtx_MEM (QImode, plus_constant (dst, last_bytes - 1));
-	  RTX_UNCHANGING_P (mem) = dst_unchanging_p;
-	  MEM_IN_STRUCT_P (mem) = dst_in_struct_p;
-	  MEM_SCALAR_P (mem) = dst_scalar_p;
+	  mem = adjust_automodify_address (dstbase, QImode,
+					   plus_constant (dst, last_bytes - 1),
+					   dstoffset + last_bytes - 1);
 	  emit_move_insn (mem, gen_lowpart (QImode, part_bytes_reg));
 
 	  if (--last_bytes)
@@ -5453,10 +5434,7 @@ arm_gen_movstrqi (rtx *operands)
     {
       if (last_bytes > 1)
 	{
-	  mem = gen_rtx_MEM (HImode, dst);
-	  RTX_UNCHANGING_P (mem) = dst_unchanging_p;
-	  MEM_IN_STRUCT_P (mem) = dst_in_struct_p;
-	  MEM_SCALAR_P (mem) = dst_scalar_p;
+	  mem = adjust_automodify_address (dstbase, HImode, dst, dstoffset);
 	  emit_move_insn (mem, gen_lowpart (HImode, part_bytes_reg));
 	  last_bytes -= 2;
 	  if (last_bytes)
@@ -5466,15 +5444,13 @@ arm_gen_movstrqi (rtx *operands)
 	      emit_insn (gen_addsi3 (dst, dst, GEN_INT (2)));
 	      emit_insn (gen_lshrsi3 (tmp, part_bytes_reg, GEN_INT (16)));
 	      part_bytes_reg = tmp;
+	      dstoffset += 2;
 	    }
 	}
       
       if (last_bytes)
 	{
-	  mem = gen_rtx_MEM (QImode, dst);
-	  RTX_UNCHANGING_P (mem) = dst_unchanging_p;
-	  MEM_IN_STRUCT_P (mem) = dst_in_struct_p;
-	  MEM_SCALAR_P (mem) = dst_scalar_p;
+	  mem = adjust_automodify_address (dstbase, QImode, dst, dstoffset);
 	  emit_move_insn (mem, gen_lowpart (QImode, part_bytes_reg));
 	}
     }
diff --git a/contrib/gcc/config/arm/arm.md b/contrib/gcc/config/arm/arm.md
index 57926ba..0a5e647 100644
--- a/contrib/gcc/config/arm/arm.md
+++ b/contrib/gcc/config/arm/arm.md
@@ -5043,7 +5043,9 @@
                           (match_operand:SI 1 "" ""))
                      (use (match_operand:SI 2 "" ""))])]
   "TARGET_ARM"
-  "
+{
+  HOST_WIDE_INT offset = 0;
+  
   /* Support only fixed point registers.  */
   if (GET_CODE (operands[2]) != CONST_INT
       || INTVAL (operands[2]) > 14
@@ -5057,11 +5059,9 @@
   operands[3]
     = arm_gen_load_multiple (REGNO (operands[0]), INTVAL (operands[2]),
 			     force_reg (SImode, XEXP (operands[1], 0)),
-			     TRUE, FALSE, RTX_UNCHANGING_P(operands[1]),
-			     MEM_IN_STRUCT_P(operands[1]),
-	                     MEM_SCALAR_P (operands[1]));
-  "
-)
+			     TRUE, FALSE, operands[1], &offset);
+
+})
 
 ;; Load multiple with write-back
 
@@ -5165,7 +5165,9 @@
                           (match_operand:SI 1 "" ""))
                      (use (match_operand:SI 2 "" ""))])]
   "TARGET_ARM"
-  "
+{
+  HOST_WIDE_INT offset = 0;
+
   /* Support only fixed point registers.  */
   if (GET_CODE (operands[2]) != CONST_INT
       || INTVAL (operands[2]) > 14
@@ -5179,11 +5181,8 @@
   operands[3]
     = arm_gen_store_multiple (REGNO (operands[1]), INTVAL (operands[2]),
 			      force_reg (SImode, XEXP (operands[0], 0)),
-			      TRUE, FALSE, RTX_UNCHANGING_P (operands[0]),
-			      MEM_IN_STRUCT_P(operands[0]), 
-	                      MEM_SCALAR_P (operands[0]));
-  "
-)
+			      TRUE, FALSE, operands[0], &offset);
+})
 
 ;; Store multiple with write-back
 
diff --git a/contrib/gcc/config/host-linux.c b/contrib/gcc/config/host-linux.c
new file mode 100644
index 0000000..d5fea9d
--- /dev/null
+++ b/contrib/gcc/config/host-linux.c
@@ -0,0 +1,219 @@
+/* Linux host-specific hook definitions.
+   Copyright (C) 2004, 2005 Free Software Foundation, Inc.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 2, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with GCC; see the file COPYING.  If not, write to the
+   Free Software Foundation, 59 Temple Place - Suite 330, Boston,
+   MA 02111-1307, USA.  */
+
+#include "config.h"
+#include "system.h"
+#include "coretypes.h"
+#include <sys/mman.h>
+#include <limits.h>
+#include "hosthooks.h"
+#include "hosthooks-def.h"
+
+
+/* Linux has a feature called exec-shield-randomize that perturbs the
+   address of non-fixed mapped segments by a (relatively) small amount.
+   The feature is intended to make it harder to attack the system with
+   buffer overflow attacks, since every invocation of a program will
+   have its libraries and data segments at slightly different addresses.
+
+   This feature causes us problems with PCH because it makes it that
+   much harder to acquire a stable location at which to map our PCH
+   data file.
+
+   [ The feature causes other points of non-determinism within the
+     compiler as well, so we'd *really* like to be able to have the
+     driver disable exec-shield-randomize for the process group, but
+     that isn't possible at present.  ]
+
+   We're going to try several things:
+
+      * Select an architecture specific address as "likely" and see
+	if that's free.  For our 64-bit hosts, we can easily choose
+	an address in Never Never Land.
+
+      * If exec-shield-randomize is disabled, then just use the
+	address chosen by mmap in step one.
+
+      * If exec-shield-randomize is enabled, then temporarily allocate
+	32M of memory as a buffer, then allocate PCH memory, then
+	free the buffer.  The theory here is that the perturbation is
+	no more than 16M, and so by allocating our buffer larger than
+	that we make it considerably more likely that the address will
+	be free when we want to load the data back.
+*/
+
+#undef HOST_HOOKS_GT_PCH_GET_ADDRESS
+#define HOST_HOOKS_GT_PCH_GET_ADDRESS linux_gt_pch_get_address
+
+#undef HOST_HOOKS_GT_PCH_USE_ADDRESS
+#define HOST_HOOKS_GT_PCH_USE_ADDRESS linux_gt_pch_use_address
+
+/* For various ports, try to guess a fixed spot in the vm space
+   that's probably free.  */
+#if defined(__alpha)
+# define TRY_EMPTY_VM_SPACE	0x10000000000
+#elif defined(__ia64)
+# define TRY_EMPTY_VM_SPACE	0x2000000100000000
+#elif defined(__x86_64)
+# define TRY_EMPTY_VM_SPACE	0x1000000000
+#elif defined(__i386)
+# define TRY_EMPTY_VM_SPACE	0x60000000
+#elif defined(__powerpc__)
+# define TRY_EMPTY_VM_SPACE	0x60000000
+#elif defined(__s390x__)
+# define TRY_EMPTY_VM_SPACE	0x8000000000
+#elif defined(__s390__)
+# define TRY_EMPTY_VM_SPACE	0x60000000
+#elif defined(__sparc__) && defined(__LP64__)
+# define TRY_EMPTY_VM_SPACE	0x8000000000
+#elif defined(__sparc__)
+# define TRY_EMPTY_VM_SPACE	0x60000000
+#else
+# define TRY_EMPTY_VM_SPACE	0
+#endif
+
+/* Determine a location where we might be able to reliably allocate SIZE
+   bytes.  FD is the PCH file, though we should return with the file 
+   unmapped.  */
+
+static void *
+linux_gt_pch_get_address (size_t size, int fd)
+{
+  size_t buffer_size = 32 * 1024 * 1024;
+  void *addr, *buffer;
+  FILE *f;
+  bool randomize_on;
+
+  addr = mmap ((void *)TRY_EMPTY_VM_SPACE, size, PROT_READ | PROT_WRITE,
+	       MAP_PRIVATE, fd, 0);
+
+  /* If we failed the map, that means there's *no* free space.  */
+  if (addr == (void *) MAP_FAILED)
+    return NULL;
+  /* Unmap the area before returning.  */
+  munmap (addr, size);
+
+  /* If we got the exact area we requested, then that's great.  */
+  if (TRY_EMPTY_VM_SPACE && addr == (void *) TRY_EMPTY_VM_SPACE)
+    return addr;
+
+  /* If we didn't, then we need to look to see if virtual address
+     randomization is on.  That is recorded in
+     kernel.randomize_va_space.  An older implementation used
+     kernel.exec-shield-randomize.  */
+  f = fopen ("/proc/sys/kernel/randomize_va_space", "r");
+  if (f == NULL)
+    f = fopen ("/proc/sys/kernel/exec-shield-randomize", "r");
+  randomize_on = false;
+  if (f != NULL)
+    {
+      char buf[100];
+      size_t c;
+
+      c = fread (buf, 1, sizeof buf - 1, f);
+      if (c > 0)
+	{
+	  buf[c] = '\0';
+	  randomize_on = (atoi (buf) > 0);
+	}
+      fclose (f);
+    }
+
+  /* If it isn't, then accept the address that mmap selected as fine.  */
+  if (!randomize_on)
+    return addr;
+
+  /* Otherwise, we need to try again with buffer space.  */
+  buffer = mmap (0, buffer_size, PROT_NONE, MAP_PRIVATE | MAP_ANON, -1, 0);
+  addr = mmap (0, size, PROT_READ | PROT_WRITE, MAP_PRIVATE, fd, 0);
+  if (buffer != (void *) MAP_FAILED)
+    munmap (buffer, buffer_size);
+  if (addr == (void *) MAP_FAILED)
+    return NULL;
+  munmap (addr, size);
+
+  return addr;
+}
+
+/* Map SIZE bytes of FD+OFFSET at BASE.  Return 1 if we succeeded at
+   mapping the data at BASE, -1 if we couldn't.
+
+   It's not possibly to reliably mmap a file using MAP_PRIVATE to
+   a specific START address on either hpux or linux.  First we see
+   if mmap with MAP_PRIVATE works.  If it does, we are off to the
+   races.  If it doesn't, we try an anonymous private mmap since the
+   kernel is more likely to honor the BASE address in anonymous maps.
+   We then copy the data to the anonymous private map.  This assumes
+   of course that we don't need to change the data in the PCH file
+   after it is created.
+
+   This approach obviously causes a performance penalty but there is
+   little else we can do given the current PCH implementation.  */
+
+static int
+linux_gt_pch_use_address (void *base, size_t size, int fd, size_t offset)
+{
+  void *addr;
+
+  /* We're called with size == 0 if we're not planning to load a PCH
+     file at all.  This allows the hook to free any static space that
+     we might have allocated at link time.  */
+  if (size == 0)
+    return -1;
+
+  /* Try to map the file with MAP_PRIVATE.  */
+  addr = mmap (base, size, PROT_READ | PROT_WRITE, MAP_PRIVATE, fd, offset);
+
+  if (addr == base)
+    return 1;
+
+  if (addr != (void *) MAP_FAILED)
+    munmap (addr, size);
+
+  /* Try to make an anonymous private mmap at the desired location.  */
+  addr = mmap (base, size, PROT_READ | PROT_WRITE,
+	       MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
+
+  if (addr != base)
+    {
+      if (addr != (void *) MAP_FAILED)
+        munmap (addr, size);
+      return -1;
+    }
+
+  if (lseek (fd, offset, SEEK_SET) == (off_t)-1)
+    return -1;
+
+  while (size)
+    {
+      ssize_t nbytes;
+
+      nbytes = read (fd, base, MIN (size, SSIZE_MAX));
+      if (nbytes <= 0)
+        return -1;
+      base = (char *) base + nbytes;
+      size -= nbytes;
+    }
+
+  return 1;
+}
+
+
+const struct host_hooks host_hooks = HOST_HOOKS_INITIALIZER;
diff --git a/contrib/gcc/config/host-solaris.c b/contrib/gcc/config/host-solaris.c
new file mode 100644
index 0000000..4fa7a5b
--- /dev/null
+++ b/contrib/gcc/config/host-solaris.c
@@ -0,0 +1,79 @@
+/* Solaris host-specific hook definitions.
+   Copyright (C) 2004 Free Software Foundation, Inc.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 2, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with GCC; see the file COPYING.  If not, write to the
+   Free Software Foundation, 59 Temple Place - Suite 330, Boston,
+   MA 02111-1307, USA.  */
+
+#include "config.h"
+#include "system.h"
+#include "coretypes.h"
+#include <sys/mman.h>
+#include "hosthooks.h"
+#include "hosthooks-def.h"
+
+
+#undef HOST_HOOKS_GT_PCH_USE_ADDRESS
+#define HOST_HOOKS_GT_PCH_USE_ADDRESS sol_gt_pch_use_address
+
+/* Map SIZE bytes of FD+OFFSET at BASE.  Return 1 if we succeeded at 
+   mapping the data at BASE, -1 if we couldn't.  */
+
+static int
+sol_gt_pch_use_address (void *base, size_t size, int fd, size_t offset)
+{
+  void *addr;
+
+  /* We're called with size == 0 if we're not planning to load a PCH
+     file at all.  This allows the hook to free any static space that
+     we might have allocated at link time.  */
+  if (size == 0)
+    return -1;
+
+  addr = mmap (base, size, PROT_READ | PROT_WRITE, MAP_PRIVATE,
+	       fd, offset);
+
+  /* Solaris isn't good about honoring the mmap START parameter
+     without MAP_FIXED set.  Before we give up, search the desired
+     address space with mincore to see if the space is really free.  */
+  if (addr != base)
+    {
+      size_t page_size = getpagesize();
+      char one_byte;
+      size_t i;
+
+      if (addr != (void *) MAP_FAILED)
+	munmap (addr, size);
+
+      errno = 0;
+      for (i = 0; i < size; i += page_size)
+	if (mincore ((char *)base + i, page_size, (void *)&one_byte) == -1
+	    && errno == ENOMEM)
+	  continue; /* The page is not mapped.  */
+	else
+	  break;
+
+      if (i >= size)
+	addr = mmap (base, size, 
+		     PROT_READ | PROT_WRITE, MAP_PRIVATE | MAP_FIXED,
+		     fd, offset);
+    }
+
+  return addr == base ? 1 : -1;
+}
+
+
+const struct host_hooks host_hooks = HOST_HOOKS_INITIALIZER;
diff --git a/contrib/gcc/config/ia64/hpux.h b/contrib/gcc/config/ia64/hpux.h
index f76cbd2..09fb53f 100644
--- a/contrib/gcc/config/ia64/hpux.h
+++ b/contrib/gcc/config/ia64/hpux.h
@@ -84,13 +84,6 @@ do {							\
 	  %{mlp64:-L/usr/lib/hpux64/libp} -lgprof} \
      %{!symbolic:-lc}}"
 
-#ifndef CROSS_COMPILE
-#undef LIBGCC_SPEC
-#define LIBGCC_SPEC \
-  "%{shared-libgcc:%{!mlp64:-lgcc_s}%{mlp64:-lgcc_s_hpux64} -lgcc} \
-   %{!shared-libgcc:-lgcc}"
-#endif
-
 #undef SUBTARGET_SWITCHES
 #define SUBTARGET_SWITCHES \
   { "ilp32",    MASK_ILP32,     "Generate ILP32 code" }, \
diff --git a/contrib/gcc/config/rs6000/aix51.h b/contrib/gcc/config/rs6000/aix51.h
index 278b6a4..863b97f 100644
--- a/contrib/gcc/config/rs6000/aix51.h
+++ b/contrib/gcc/config/rs6000/aix51.h
@@ -197,7 +197,3 @@ do {									\
 #undef LD_INIT_SWITCH
 #define LD_INIT_SWITCH "-binitfini"
 
-/* AIX 5.1 has the float and long double forms of math functions.  */
-#undef TARGET_C99_FUNCTIONS
-#define TARGET_C99_FUNCTIONS  1
-
diff --git a/contrib/gcc/config/rs6000/host-darwin.c b/contrib/gcc/config/rs6000/host-darwin.c
index 7e80556..d04270c 100644
--- a/contrib/gcc/config/rs6000/host-darwin.c
+++ b/contrib/gcc/config/rs6000/host-darwin.c
@@ -1,5 +1,5 @@
 /* Darwin/powerpc host-specific hook definitions.
-   Copyright (C) 2003 Free Software Foundation, Inc.
+   Copyright (C) 2003, 2004 Free Software Foundation, Inc.
 
    This file is part of GCC.
 
@@ -137,22 +137,18 @@ darwin_rs6000_extra_signals (void)
     fatal_error ("While setting up signal handler: %m");
 }
 
-static void * darwin_rs6000_gt_pch_get_address (size_t);
-static bool darwin_rs6000_gt_pch_use_address (void *, size_t);
-
 #undef HOST_HOOKS_GT_PCH_GET_ADDRESS
 #define HOST_HOOKS_GT_PCH_GET_ADDRESS darwin_rs6000_gt_pch_get_address
 #undef HOST_HOOKS_GT_PCH_USE_ADDRESS
 #define HOST_HOOKS_GT_PCH_USE_ADDRESS darwin_rs6000_gt_pch_use_address
 
-
 /* Yes, this is really supposed to work.  */
 static char pch_address_space[1024*1024*1024] __attribute__((aligned (4096)));
 
 /* Return the address of the PCH address space, if the PCH will fit in it.  */
 
 static void *
-darwin_rs6000_gt_pch_get_address (size_t sz)
+darwin_rs6000_gt_pch_get_address (size_t sz, int fd ATTRIBUTE_UNUSED)
 {
   if (sz <= sizeof (pch_address_space))
     return pch_address_space;
@@ -163,18 +159,19 @@ darwin_rs6000_gt_pch_get_address (size_t sz)
 /* Check ADDR and SZ for validity, and deallocate (using munmap) that part of
    pch_address_space beyond SZ.  */
 
-static bool
-darwin_rs6000_gt_pch_use_address (void *addr, size_t sz)
+static int
+darwin_rs6000_gt_pch_use_address (void *addr, size_t sz, int fd, size_t off)
 {
   const size_t pagesize = getpagesize();
-  bool result;
+  void *mmap_result;
+  int ret;
 
   if ((size_t)pch_address_space % pagesize != 0
       || sizeof (pch_address_space) % pagesize != 0)
     abort ();
   
-  result = (addr == pch_address_space && sz <= sizeof (pch_address_space));
-  if (! result)
+  ret = (addr == pch_address_space && sz <= sizeof (pch_address_space));
+  if (! ret)
     sz = 0;
 
   /* Round the size to a whole page size.  Normally this is a no-op.  */
@@ -183,7 +180,22 @@ darwin_rs6000_gt_pch_use_address (void *addr, size_t sz)
   if (munmap (pch_address_space + sz, sizeof (pch_address_space) - sz) != 0)
     fatal_error ("couldn't unmap pch_address_space: %m\n");
 
-  return result;
+  if (ret)
+    {
+      mmap_result = mmap (addr, sz,
+			  PROT_READ | PROT_WRITE, MAP_PRIVATE | MAP_FIXED,
+			  fd, off);
+
+      /* The file might not be mmap-able.  */
+      ret = mmap_result != (void *) MAP_FAILED;
+
+      /* Sanity check for broken MAP_FIXED.  */
+      if (ret && mmap_result != addr)
+	abort ();
+    }
+
+  return ret;
 }
+
 
 const struct host_hooks host_hooks = HOST_HOOKS_INITIALIZER;
diff --git a/contrib/gcc/config/rs6000/linux64.h b/contrib/gcc/config/rs6000/linux64.h
index 013e23a..84e13a1 100644
--- a/contrib/gcc/config/rs6000/linux64.h
+++ b/contrib/gcc/config/rs6000/linux64.h
@@ -244,6 +244,12 @@
    ? rs6000_special_round_type_align (STRUCT, COMPUTED, SPECIFIED)	\
    : MAX ((COMPUTED), (SPECIFIED)))
 
+/* Use the default for compiling target libs.  */
+#ifdef IN_TARGET_LIBS
+#undef TARGET_ALIGN_NATURAL
+#define TARGET_ALIGN_NATURAL 1
+#endif
+
 /* Indicate that jump tables go in the text section.  */
 #undef  JUMP_TABLES_IN_TEXT_SECTION
 #define JUMP_TABLES_IN_TEXT_SECTION TARGET_64BIT
diff --git a/contrib/gcc/config/rs6000/rs6000-protos.h b/contrib/gcc/config/rs6000/rs6000-protos.h
index 3d17162..3303ecd 100644
--- a/contrib/gcc/config/rs6000/rs6000-protos.h
+++ b/contrib/gcc/config/rs6000/rs6000-protos.h
@@ -105,7 +105,7 @@ extern int registers_ok_for_quad_peep (rtx, rtx);
 extern int addrs_ok_for_quad_peep (rtx, rtx);
 extern bool gpr_or_gpr_p (rtx, rtx);
 extern enum reg_class secondary_reload_class (enum reg_class,
-					      enum machine_mode, rtx, int);
+					      enum machine_mode, rtx);
 extern int ccr_bit (rtx, int);
 extern int extract_MB (rtx);
 extern int extract_ME (rtx);
diff --git a/contrib/gcc/config/rs6000/rs6000.c b/contrib/gcc/config/rs6000/rs6000.c
index 1ffd4da..ea35843 100644
--- a/contrib/gcc/config/rs6000/rs6000.c
+++ b/contrib/gcc/config/rs6000/rs6000.c
@@ -2497,43 +2497,6 @@ word_offset_memref_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
   return (off % 4) == 0;
 }
 
-/* Return true if operand is a (MEM (PLUS (REG) (offset))) where offset
-   is not divisible by four.  */
-
-int
-invalid_gpr_mem (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
-{
-  rtx addr;
-  long off;
-
-  if (GET_CODE (op) != MEM)
-    return 0;
-
-  addr = XEXP (op, 0);
-  if (GET_CODE (addr) != PLUS
-      || GET_CODE (XEXP (addr, 0)) != REG
-      || GET_CODE (XEXP (addr, 1)) != CONST_INT)
-    return 0;
-
-  off = INTVAL (XEXP (addr, 1));
-  return (off & 3) != 0;
-}
-
-/* Return true if operand is a hard register that can be used as a base
-   register.  */
-
-int
-base_reg_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
-{
-  unsigned int regno;
-
-  if (!REG_P (op))
-    return 0;
-
-  regno = REGNO (op);
-  return regno != 0 && regno <= 31;
-}
-
 /* Return true if either operand is a general purpose register.  */
 
 bool
@@ -2658,16 +2621,18 @@ legitimate_offset_address_p (enum machine_mode mode, rtx x, int strict)
 
     case DFmode:
     case DImode:
-      /* Both DFmode and DImode may end up in gprs.  If gprs are 32-bit,
-	 then we need to load/store at both offset and offset+4.  */
-      if (!TARGET_POWERPC64)
+      if (mode == DFmode || !TARGET_POWERPC64)
 	extra = 4;
+      else if (offset & 3)
+	return false;
       break;
 
     case TFmode:
     case TImode:
-      if (!TARGET_POWERPC64)
+      if (mode == TFmode || !TARGET_POWERPC64)
 	extra = 12;
+      else if (offset & 3)
+	return false;
       else
 	extra = 8;
       break;
@@ -2989,7 +2954,7 @@ rs6000_legitimize_tls_address (rtx addr, enum tls_model model)
       rtx r3, got, tga, tmp1, tmp2, eqv;
 
       if (TARGET_64BIT)
-	got = gen_rtx_REG (Pmode, TOC_REGISTER);
+	got = gen_rtx_REG (Pmode, 2);
       else
 	{
 	  if (flag_pic == 1)
@@ -3206,6 +3171,26 @@ rs6000_legitimize_reload_address (rtx x, enum machine_mode mode,
       return x;
     }
 #endif
+
+  /* Force ld/std non-word aligned offset into base register by wrapping
+     in offset 0.  */
+  if (GET_CODE (x) == PLUS
+      && GET_CODE (XEXP (x, 0)) == REG
+      && REGNO (XEXP (x, 0)) < 32
+      && REG_MODE_OK_FOR_BASE_P (XEXP (x, 0), mode)
+      && GET_CODE (XEXP (x, 1)) == CONST_INT
+      && (INTVAL (XEXP (x, 1)) & 3) != 0
+      && GET_MODE_SIZE (mode) >= UNITS_PER_WORD
+      && TARGET_POWERPC64)
+    {
+      x = gen_rtx_PLUS (GET_MODE (x), x, GEN_INT (0));
+      push_reload (XEXP (x, 0), NULL_RTX, &XEXP (x, 0), NULL,
+		   BASE_REG_CLASS, GET_MODE (x), VOIDmode, 0, 0,
+		   opnum, (enum reload_type) type);
+      *win = 1;
+      return x;
+    }
+
   if (GET_CODE (x) == PLUS
       && GET_CODE (XEXP (x, 0)) == REG
       && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER
@@ -3240,6 +3225,7 @@ rs6000_legitimize_reload_address (rtx x, enum machine_mode mode,
       *win = 1;
       return x;
     }
+
 #if TARGET_MACHO
   if (GET_CODE (x) == SYMBOL_REF
       && DEFAULT_ABI == ABI_DARWIN
@@ -3269,6 +3255,7 @@ rs6000_legitimize_reload_address (rtx x, enum machine_mode mode,
       return x;
     }
 #endif
+
   if (TARGET_TOC
       && constant_pool_expr_p (x)
       && ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (get_pool_constant (x), mode))
@@ -4369,9 +4356,10 @@ function_arg (CUMULATIVE_ARGS *cum, enum machine_mode mode,
   if (mode == VOIDmode)
     {
       if (abi == ABI_V4
-	  && cum->nargs_prototype < 0
 	  && (cum->call_cookie & CALL_LIBCALL) == 0
-	  && (cum->prototype || TARGET_NO_PROTOTYPE))
+	  && (cum->stdarg
+	      || (cum->nargs_prototype < 0
+		  && (cum->prototype || TARGET_NO_PROTOTYPE))))
 	{
 	  /* For the SPE, we need to crxor CR6 always.  */
 	  if (TARGET_SPE_ABI)
@@ -7856,7 +7844,7 @@ expand_block_move (rtx operands[])
 	  mode = SImode;
 	  gen_func.mov = gen_movsi;
 	}
-      else if (bytes == 2 && (align >= 2 || ! STRICT_ALIGNMENT))
+      else if (bytes >= 2 && (align >= 2 || ! STRICT_ALIGNMENT))
 	{			/* move 2 bytes */
 	  move_bytes = 2;
 	  mode = HImode;
@@ -8725,14 +8713,12 @@ addrs_ok_for_quad_peep (rtx addr1, rtx addr2)
 
 /* Return the register class of a scratch register needed to copy IN into
    or out of a register in CLASS in MODE.  If it can be done directly,
-   NO_REGS is returned.  INP is nonzero if we are loading the reg, zero
-   for storing.  */
+   NO_REGS is returned.  */
 
 enum reg_class
 secondary_reload_class (enum reg_class class,
 			enum machine_mode mode,
-			rtx in,
-			int inp)
+			rtx in)
 {
   int regno;
 
@@ -8757,14 +8743,6 @@ secondary_reload_class (enum reg_class class,
         return BASE_REGS;
     }
 
-  /* A 64-bit gpr load or store using an offset that isn't a multiple of
-     four needs a secondary reload.  */
-  if (TARGET_POWERPC64
-      && GET_MODE_UNIT_SIZE (mode) >= 8
-      && (!inp || class != BASE_REGS)
-      && invalid_gpr_mem (in, mode))
-    return BASE_REGS;
-
   if (GET_CODE (in) == REG)
     {
       regno = REGNO (in);
@@ -11620,6 +11598,8 @@ uses_TOC (void)
 rtx
 create_TOC_reference (rtx symbol) 
 {
+  if (no_new_pseudos)
+    regs_ever_live[TOC_REGISTER] = 1;
   return gen_rtx_PLUS (Pmode, 
 	   gen_rtx_REG (Pmode, TOC_REGISTER),
 	     gen_rtx_CONST (Pmode, 
diff --git a/contrib/gcc/config/rs6000/rs6000.h b/contrib/gcc/config/rs6000/rs6000.h
index f1ad896..01a97da 100644
--- a/contrib/gcc/config/rs6000/rs6000.h
+++ b/contrib/gcc/config/rs6000/rs6000.h
@@ -1492,11 +1492,8 @@ enum reg_class
    or out of a register in CLASS in MODE.  If it can be done directly,
    NO_REGS is returned.  */
 
-#define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, IN) \
-  secondary_reload_class (CLASS, MODE, IN, 1)
-
-#define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, IN) \
-  secondary_reload_class (CLASS, MODE, IN, 0)
+#define SECONDARY_RELOAD_CLASS(CLASS, MODE, IN) \
+  secondary_reload_class (CLASS, MODE, IN)
 
 /* If we are copying between FP or AltiVec registers and anything
    else, we need a memory location.  */
@@ -2671,8 +2668,6 @@ extern char rs6000_reg_names[][8];	/* register names (0 vs. %r0).  */
   {"lwa_operand", {SUBREG, MEM, REG}},					   \
   {"volatile_mem_operand", {MEM}},					   \
   {"offsettable_mem_operand", {MEM}},					   \
-  {"invalid_gpr_mem", {MEM}},						   \
-  {"base_reg_operand", {REG}},						   \
   {"mem_or_easy_const_operand", {SUBREG, MEM, CONST_DOUBLE}},		   \
   {"add_operand", {SUBREG, REG, CONST_INT}},				   \
   {"non_add_cint_operand", {CONST_INT}},				   \
diff --git a/contrib/gcc/config/rs6000/rs6000.md b/contrib/gcc/config/rs6000/rs6000.md
index 3b062ce..0e242d4 100644
--- a/contrib/gcc/config/rs6000/rs6000.md
+++ b/contrib/gcc/config/rs6000/rs6000.md
@@ -5236,7 +5236,7 @@
    (set (match_dup 0) (plus:DI (match_dup 0)
 			       (const_int 2047)))
    (set (match_dup 4) (compare:CCUNS (match_dup 3)
-				     (const_int 3)))
+				     (const_int 2)))
    (set (match_dup 0) (ior:DI (match_dup 0)
 			      (match_dup 1)))
    (parallel [(set (match_dup 0) (and:DI (match_dup 0)
@@ -7839,8 +7839,8 @@
 }")
 
 (define_insn "*movsf_hardfloat"
-  [(set (match_operand:SF 0 "nonimmediate_operand" "=!r,!r,m,f,f,m,!cl,!q,!r,!r,!r")
-	(match_operand:SF 1 "input_operand" "r,m,r,f,m,f,r,r,h,G,Fn"))]
+  [(set (match_operand:SF 0 "nonimmediate_operand" "=!r,!r,m,f,f,m,!cl,!q,!r,!h,!r,!r")
+	(match_operand:SF 1 "input_operand" "r,m,r,f,m,f,r,r,h,0,G,Fn"))]
   "(gpc_reg_operand (operands[0], SFmode)
    || gpc_reg_operand (operands[1], SFmode))
    && (TARGET_HARD_FLOAT && TARGET_FPRS)"
@@ -7854,10 +7854,11 @@
    mt%0 %1
    mt%0 %1
    mf%1 %0
+   {cror 0,0,0|nop}
    #
    #"
-  [(set_attr "type" "*,load,store,fp,fpload,fpstore,*,mtjmpr,*,*,*")
-   (set_attr "length" "4,4,4,4,4,4,4,4,4,4,8")])
+  [(set_attr "type" "*,load,store,fp,fpload,fpstore,*,mtjmpr,*,*,*,*")
+   (set_attr "length" "4,4,4,4,4,4,4,4,4,4,4,8")])
 
 (define_insn "*movsf_softfloat"
   [(set (match_operand:SF 0 "nonimmediate_operand" "=r,cl,q,r,r,m,r,r,r,r,r,*h")
@@ -8114,67 +8115,26 @@
 ; ld/std require word-aligned displacements -> 'Y' constraint.
 ; List Y->r and r->Y before r->r for reload.
 (define_insn "*movdf_hardfloat64"
-  [(set (match_operand:DF 0 "nonimmediate_operand" "=Y,r,b,!r,f,f,m,!cl,!r,!r,!r,!r")
-	(match_operand:DF 1 "input_operand" "r,Y,m,r,f,m,f,r,h,G,H,F"))]
+  [(set (match_operand:DF 0 "nonimmediate_operand" "=Y,r,!r,f,f,m,!cl,!r,!h,!r,!r,!r")
+	(match_operand:DF 1 "input_operand" "r,Y,r,f,m,f,r,h,0,G,H,F"))]
   "TARGET_POWERPC64 && TARGET_HARD_FLOAT && TARGET_FPRS
    && (gpc_reg_operand (operands[0], DFmode)
        || gpc_reg_operand (operands[1], DFmode))"
   "@
    std%U0%X0 %1,%0
    ld%U1%X1 %0,%1
-   #
    mr %0,%1
    fmr %0,%1
    lfd%U1%X1 %0,%1
    stfd%U0%X0 %1,%0
    mt%0 %1
    mf%1 %0
+   {cror 0,0,0|nop}
    #
    #
    #"
-  [(set_attr "type" "store,load,load,*,fp,fpload,fpstore,mtjmpr,*,*,*,*")
-   (set_attr "length" "4,4,8,4,4,4,4,4,4,8,12,16")])
-
-(define_split
-  [(set (match_operand:DF 0 "base_reg_operand" "")
-	(match_operand:DF 1 "invalid_gpr_mem" ""))]
-  "TARGET_POWERPC64 && no_new_pseudos"
-  [(set (match_dup 2) (match_dup 3))
-   (set (match_dup 0) (match_dup 4))]
-  "
-{
-  operands[2] = gen_rtx_REG (Pmode, REGNO (operands[0]));
-  operands[3] = XEXP (operands[1], 0);
-  operands[4] = replace_equiv_address (operands[1], operands[2]);
-}")
-
-(define_expand "reload_outdf"
-  [(parallel [(match_operand:DF 0 "invalid_gpr_mem" "")
-	      (match_operand:DF 1 "register_operand" "")
-	      (match_operand:DI 2 "register_operand" "=&b")])]
-  "TARGET_POWERPC64"
-{
-  if (!TARGET_64BIT)
-    operands[2] = gen_rtx_REG (SImode, REGNO (operands[2]));
-  emit_move_insn (operands[2], XEXP (operands[0], 0));
-  operands[0] = replace_equiv_address (operands[0], operands[2]);
-  emit_move_insn (operands[0], operands[1]);
-  DONE;
-})
-
-(define_expand "reload_indf"
-  [(parallel [(match_operand:DF 0 "register_operand" "")
-	      (match_operand:DF 1 "invalid_gpr_mem" "")
-	      (match_operand:DI 2 "register_operand" "=&b")])]
-  "TARGET_POWERPC64"
-{
-  if (!TARGET_64BIT)
-    operands[2] = gen_rtx_REG (SImode, REGNO (operands[2]));
-  emit_move_insn (operands[2], XEXP (operands[1], 0));
-  operands[1] = replace_equiv_address (operands[1], operands[2]);
-  emit_move_insn (operands[0], operands[1]);
-  DONE;
-})
+  [(set_attr "type" "store,load,*,fp,fpload,fpstore,mtjmpr,*,*,*,*,*")
+   (set_attr "length" "4,4,4,4,4,4,4,4,4,8,12,16")])
 
 (define_insn "*movdf_softfloat64"
   [(set (match_operand:DF 0 "nonimmediate_operand" "=r,Y,r,cl,r,r,r,r,*h")
@@ -8191,7 +8151,7 @@
    #
    #
    #
-   nop"
+   {cror 0,0,0|nop}"
   [(set_attr "type" "load,store,*,*,*,*,*,*,*")
    (set_attr "length" "4,4,4,4,4,8,12,16,4")])
 
@@ -8519,15 +8479,14 @@
 }")
 
 (define_insn "*movdi_internal64"
-  [(set (match_operand:DI 0 "nonimmediate_operand" "=Y,r,b,r,r,r,r,r,??f,f,m,r,*h,*h")
-	(match_operand:DI 1 "input_operand" "r,Y,m,r,I,L,nF,R,f,m,f,*h,r,0"))]
+  [(set (match_operand:DI 0 "nonimmediate_operand" "=Y,r,r,r,r,r,r,??f,f,m,r,*h,*h")
+	(match_operand:DI 1 "input_operand" "r,Y,r,I,L,nF,R,f,m,f,*h,r,0"))]
   "TARGET_POWERPC64
    && (gpc_reg_operand (operands[0], DImode)
        || gpc_reg_operand (operands[1], DImode))"
   "@
    std%U0%X0 %1,%0
    ld%U1%X1 %0,%1
-   #
    mr %0,%1
    li %0,%1
    lis %0,%v1
@@ -8539,51 +8498,8 @@
    mf%1 %0
    mt%0 %1
    {cror 0,0,0|nop}"
-  [(set_attr "type" "store,load,load,*,*,*,*,*,fp,fpload,fpstore,mfjmpr,mtjmpr,*")
-   (set_attr "length" "4,4,8,4,4,4,20,4,4,4,4,4,4,4")])
-
-(define_split
-  [(set (match_operand:DI 0 "base_reg_operand" "")
-	(match_operand:DI 1 "invalid_gpr_mem" ""))]
-  "TARGET_POWERPC64 && no_new_pseudos"
-  [(set (match_dup 2) (match_dup 3))
-   (set (match_dup 0) (match_dup 4))]
-  "
-{
-  operands[2] = operands[0];
-  if (!TARGET_64BIT)
-    operands[2] = gen_rtx_REG (SImode, REGNO (operands[0]));
-  operands[3] = XEXP (operands[1], 0);
-  operands[4] = replace_equiv_address (operands[1], operands[2]);
-}")
-
-(define_expand "reload_outdi"
-  [(parallel [(match_operand:DI 0 "invalid_gpr_mem" "")
-              (match_operand:DI 1 "register_operand" "")
-              (match_operand:DI 2 "register_operand" "=&b")])]
-  "TARGET_POWERPC64"
-{
-  if (!TARGET_64BIT)
-    operands[2] = gen_rtx_REG (SImode, REGNO (operands[2]));
-  emit_move_insn (operands[2], XEXP (operands[0], 0));
-  operands[0] = replace_equiv_address (operands[0], operands[2]);
-  emit_move_insn (operands[0], operands[1]);
-  DONE;
-})
-
-(define_expand "reload_indi"
-  [(parallel [(match_operand:DI 0 "register_operand" "")
-	      (match_operand:DI 1 "invalid_gpr_mem" "")
-	      (match_operand:DI 2 "register_operand" "=&b")])]
-  "TARGET_POWERPC64"
-{
-  if (!TARGET_64BIT)
-    operands[2] = gen_rtx_REG (SImode, REGNO (operands[2]));
-  emit_move_insn (operands[2], XEXP (operands[1], 0));
-  operands[1] = replace_equiv_address (operands[1], operands[2]);
-  emit_move_insn (operands[0], operands[1]);
-  DONE;
-})
+  [(set_attr "type" "store,load,*,*,*,*,*,fp,fpload,fpstore,mfjmpr,mtjmpr,*")
+   (set_attr "length" "4,4,4,4,4,20,4,4,4,4,4,4,4")])
 
 ;; immediate value valid for a single instruction hiding in a const_double
 (define_insn ""
diff --git a/contrib/gcc/config/rs6000/sysv4.h b/contrib/gcc/config/rs6000/sysv4.h
index 57af869..d367aa8 100644
--- a/contrib/gcc/config/rs6000/sysv4.h
+++ b/contrib/gcc/config/rs6000/sysv4.h
@@ -1,6 +1,6 @@
 /* Target definitions for GNU compiler for PowerPC running System V.4
    Copyright (C) 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
-   2004 Free Software Foundation, Inc.
+   2004, 2005 Free Software Foundation, Inc.
    Contributed by Cygnus Support.
 
    This file is part of GCC.
@@ -123,8 +123,10 @@ extern const char *rs6000_tls_size_string; /* For -mtls-size= */
   { "no-toc",		 0, N_("no description yet") },			\
   { "toc",		 MASK_MINIMAL_TOC, N_("no description yet") },	\
   { "full-toc",		 MASK_MINIMAL_TOC, N_("no description yet") },	\
-  { "prototype",	 MASK_PROTOTYPE, N_("no description yet") },	\
-  { "no-prototype",	-MASK_PROTOTYPE, N_("no description yet") },	\
+  { "prototype",	 MASK_PROTOTYPE,				\
+    N_("Assume all variable arg functions are prototyped") },		\
+  { "no-prototype",	-MASK_PROTOTYPE,				\
+    N_("Non-prototyped functions might take a variable number of args") }, \
   { "no-traceback",	 0, N_("no description yet") },			\
   { "eabi",		 MASK_EABI, N_("Use EABI") },			\
   { "no-eabi",		-MASK_EABI, N_("Don't use EABI") },		\
@@ -1354,8 +1356,6 @@ ncrtn.o%s"
    ? (((GLOBAL) ? DW_EH_PE_indirect : 0) | DW_EH_PE_pcrel | DW_EH_PE_sdata4) \
    : DW_EH_PE_absptr)
 
-#define TARGET_ASM_EXCEPTION_SECTION readonly_data_section
-
 #define DOUBLE_INT_ASM_OP "\t.quad\t"
 
 /* Generate entries in .fixup for relocatable addresses.  */
diff --git a/contrib/gcc/config/sparc/gmon-sol2.c b/contrib/gcc/config/sparc/gmon-sol2.c
index 9f9f019..aeead89 100644
--- a/contrib/gcc/config/sparc/gmon-sol2.c
+++ b/contrib/gcc/config/sparc/gmon-sol2.c
@@ -267,8 +267,7 @@ _mcleanup(void)
  * -- [eichin:19920702.1107EST]
  */
 
-static void internal_mcount (char *, unsigned short *)
-     __attribute__ ((__unused__));
+static void internal_mcount (char *, unsigned short *) __attribute__ ((used));
 
 /* i7 == last ret, -> frompcindex */
 /* o7 == current ret, -> selfpc */
diff --git a/contrib/gcc/config/sparc/sol2-gas-bi.h b/contrib/gcc/config/sparc/sol2-gas-bi.h
index 88b3954..bea2b3c 100644
--- a/contrib/gcc/config/sparc/sol2-gas-bi.h
+++ b/contrib/gcc/config/sparc/sol2-gas-bi.h
@@ -3,3 +3,9 @@
 
 #undef  AS_SPARC64_FLAG
 #define AS_SPARC64_FLAG	"-TSO -64 -Av9"
+
+/* Emit a DTP-relative reference to a TLS variable.  */
+#ifdef HAVE_AS_TLS
+#define ASM_OUTPUT_DWARF_DTPREL(FILE, SIZE, X) \
+  sparc_output_dwarf_dtprel (FILE, SIZE, X)
+#endif
diff --git a/contrib/gcc/config/sparc/sol2.h b/contrib/gcc/config/sparc/sol2.h
index cbf914e..e5ed818 100644
--- a/contrib/gcc/config/sparc/sol2.h
+++ b/contrib/gcc/config/sparc/sol2.h
@@ -84,7 +84,7 @@ Boston, MA 02111-1307, USA.  */
 
 #undef  ASM_GENERATE_INTERNAL_LABEL
 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM)	\
-  sprintf ((LABEL), "*.L%s%ld", (PREFIX), (long)(NUM))
+  sprintf ((LABEL), "*.L%s%lu", (PREFIX), (unsigned long)(NUM))
 
 /* The native TLS-enabled assembler requires the directive #tls_object
    to be put on objects in TLS sections (as of v7.1).  This is not
@@ -113,6 +113,12 @@ Boston, MA 02111-1307, USA.  */
     }								\
   while (0)
 
+/* The Solaris assembler cannot grok r_tls_dtpoff.  This is
+   a kludge as ASM_OUTPUT_DWARF_DTPREL is defined in sparc.h,
+   undefined here and defined again in sol2-gas-bi.h.  */
+#ifdef HAVE_AS_TLS
+#undef ASM_OUTPUT_DWARF_DTPREL
+#endif
 
 
 #undef  ENDFILE_SPEC
diff --git a/contrib/gcc/config/sparc/sparc.c b/contrib/gcc/config/sparc/sparc.c
index 0b07e46..86524cc 100644
--- a/contrib/gcc/config/sparc/sparc.c
+++ b/contrib/gcc/config/sparc/sparc.c
@@ -2946,26 +2946,34 @@ eligible_for_epilogue_delay (rtx trial, int slot)
 int
 tls_call_delay (rtx trial)
 {
-  rtx pat, unspec;
+  rtx pat;
 
   /* Binutils allows
-     call __tls_get_addr, %tgd_call (foo)
-      add %l7, %o0, %o0, %tgd_add (foo)
+       call __tls_get_addr, %tgd_call (foo)
+        add %l7, %o0, %o0, %tgd_add (foo)
      while Sun as/ld does not.  */
   if (TARGET_GNU_TLS || !TARGET_TLS)
     return 1;
 
   pat = PATTERN (trial);
-  if (GET_CODE (pat) != SET || GET_CODE (SET_DEST (pat)) != PLUS)
-    return 1;
 
-  unspec = XEXP (SET_DEST (pat), 1);
-  if (GET_CODE (unspec) != UNSPEC
-      || (XINT (unspec, 1) != UNSPEC_TLSGD
-	  && XINT (unspec, 1) != UNSPEC_TLSLDM))
-    return 1;
+  /* We must reject tgd_add{32|64}, i.e.
+       (set (reg) (plus (reg) (unspec [(reg) (symbol_ref)] UNSPEC_TLSGD)))
+     and tldm_add{32|64}, i.e.
+       (set (reg) (plus (reg) (unspec [(reg) (symbol_ref)] UNSPEC_TLSLDM)))
+     for Sun as/ld.  */
+  if (GET_CODE (pat) == SET
+      && GET_CODE (SET_SRC (pat)) == PLUS)
+    {
+      rtx unspec = XEXP (SET_SRC (pat), 1);
 
-  return 0;
+      if (GET_CODE (unspec) == UNSPEC
+	  && (XINT (unspec, 1) == UNSPEC_TLSGD
+	      || XINT (unspec, 1) == UNSPEC_TLSLDM))
+	return 0;
+    }
+
+  return 1;
 }
 
 /* Return nonzero if TRIAL can go into the sibling call
diff --git a/contrib/gcc/config/sparc/sparc.h b/contrib/gcc/config/sparc/sparc.h
index 3202359..9f72bc8 100644
--- a/contrib/gcc/config/sparc/sparc.h
+++ b/contrib/gcc/config/sparc/sparc.h
@@ -1892,7 +1892,7 @@ extern GTY(()) rtx sparc_compare_op1;
    case of a global register variable occupying more than one register
    we prefix the second and following registers with .gnu.part1. etc.  */
 
-extern char sparc_hard_reg_printed[8];
+extern GTY(()) char sparc_hard_reg_printed[8];
 
 #ifdef HAVE_AS_REGISTER_PSEUDO_OP
 #define ASM_DECLARE_REGISTER_GLOBAL(FILE, DECL, REGNO, NAME)		\
diff --git a/contrib/gcc/config/x-solaris b/contrib/gcc/config/x-solaris
new file mode 100644
index 0000000..782f4a3
--- /dev/null
+++ b/contrib/gcc/config/x-solaris
@@ -0,0 +1,4 @@
+host-solaris.o : $(srcdir)/config/host-solaris.c $(CONFIG_H) $(SYSTEM_H) \
+  coretypes.h hosthooks.h hosthooks-def.h
+	$(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \
+		$(srcdir)/config/host-solaris.c