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| author | marius <marius@FreeBSD.org> | 2017-07-12 21:46:16 +0000 |
|---|---|---|
| committer | marius <marius@FreeBSD.org> | 2017-07-12 21:46:16 +0000 |
| commit | 3d6ec55b9b8b214178308cd956202d62953d8b52 (patch) | |
| tree | a7dc6a64b84698c92c34fe0741b953fa5710456e /contrib/diff/src/sdiff.c | |
| parent | 19285e4939bf9d407078204de4e10a66650c6afa (diff) | |
| download | FreeBSD-src-3d6ec55b9b8b214178308cd956202d62953d8b52.zip FreeBSD-src-3d6ec55b9b8b214178308cd956202d62953d8b52.tar.gz | |
MF11: r320898; MFC: r320577, r320620
Retry up to 2 ms to enable bus power as at least with some Intel
SDHCI/eMMC controllers the first attempt after a D3 to D0 transition,
i. e. when the firmware has put the devices into D3 state before,
can fail.
Approved by: re (gjb)
Diffstat (limited to 'contrib/diff/src/sdiff.c')
0 files changed, 0 insertions, 0 deletions
