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authoradrian <adrian@FreeBSD.org>2015-03-02 02:24:46 +0000
committeradrian <adrian@FreeBSD.org>2015-03-02 02:24:46 +0000
commit0753bc3ad13efe38c3080d8728352c400d473118 (patch)
tree76bed3d434795319812e0f51f38cf8b4690a3cc4 /contrib/diff/doc
parentcd6b3a6b0695024b9bdfab5c8de845d3d421f871 (diff)
downloadFreeBSD-src-0753bc3ad13efe38c3080d8728352c400d473118.zip
FreeBSD-src-0753bc3ad13efe38c3080d8728352c400d473118.tar.gz
Bring over the initial QCA955x SoC support framework.
This is enough to bring up the basic SoC support. What works thus far: * The mips74k core, pll setup, and UART (or else well, stuff would be really difficult..) * both USB 2.0 EHCI controllers * on-board 2GHz 3x3 wifi (the other variant has 2GHz/5GHz wifi on-chip); * arge0 - not yet sure why arge1 isn't firing off interrupts and thus handling traffic, but I will soon figure it out and fix it here. Tested: * AP135 reference design, QCA9558 SoC, pretending to be an 11n 2GHz AP. TODO: * There's an interrupt mux hooking up devices to IP2 and IP3 - but it's not a read-and-clear or write-to-clear register. So, trying to use it naively like I have been ends up with massive interrupt storms. For now the things that share those interrupts can just take them as shared interrupts and try to play nice. * There's two PCIe root complexes /and/ one of them can actually be a PCIe device endpoint. Yes, you heard right. I have to teach the AR724x PCIe bridge code to handle multiple instances with multiple memory/irq regions, and then there'll be RC support, but EP support isn't on my TODO list. * I'm not sure why arge1 isn't up and running. I'll go figure that out soon and fix it here. Thankyou to Qualcomm Atheros for providing me with hardware and an abundance of documentation about these things.
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