diff options
author | obrien <obrien@FreeBSD.org> | 2002-02-22 04:18:42 +0000 |
---|---|---|
committer | obrien <obrien@FreeBSD.org> | 2002-02-22 04:18:42 +0000 |
commit | 670387a18a22cf299c750186efe8ca24cebb7e05 (patch) | |
tree | 70c0d6a941b83c97839ec1237622c20ea8beb870 /contrib/binutils/include | |
parent | fc89183cdc6be5afa8deb7250fd15a20832ab528 (diff) | |
download | FreeBSD-src-670387a18a22cf299c750186efe8ca24cebb7e05.zip FreeBSD-src-670387a18a22cf299c750186efe8ca24cebb7e05.tar.gz |
Import of Binutils from the FSF 2.12 branch (pre-.0 release).
These bits are taken from the FSF anoncvs repo on 21-Feburary-2002 20:15 PST.
Diffstat (limited to 'contrib/binutils/include')
-rw-r--r-- | contrib/binutils/include/ChangeLog | 71 | ||||
-rw-r--r-- | contrib/binutils/include/coff/ChangeLog | 13 | ||||
-rw-r--r-- | contrib/binutils/include/demangle.h | 4 | ||||
-rw-r--r-- | contrib/binutils/include/dis-asm.h | 13 | ||||
-rw-r--r-- | contrib/binutils/include/elf/ChangeLog | 103 | ||||
-rw-r--r-- | contrib/binutils/include/elf/alpha.h | 5 | ||||
-rw-r--r-- | contrib/binutils/include/elf/common.h | 3 | ||||
-rw-r--r-- | contrib/binutils/include/elf/dwarf2.h | 50 | ||||
-rw-r--r-- | contrib/binutils/include/elf/m68k.h | 1 | ||||
-rw-r--r-- | contrib/binutils/include/elf/mmix.h | 21 | ||||
-rw-r--r-- | contrib/binutils/include/elf/or32.h | 62 | ||||
-rw-r--r-- | contrib/binutils/include/elf/ppc.h | 4 | ||||
-rw-r--r-- | contrib/binutils/include/elf/sh.h | 132 | ||||
-rw-r--r-- | contrib/binutils/include/libiberty.h | 4 | ||||
-rw-r--r-- | contrib/binutils/include/opcode/ChangeLog | 34 | ||||
-rw-r--r-- | contrib/binutils/include/opcode/cgen.h | 16 | ||||
-rw-r--r-- | contrib/binutils/include/opcode/i386.h | 104 |
17 files changed, 517 insertions, 123 deletions
diff --git a/contrib/binutils/include/ChangeLog b/contrib/binutils/include/ChangeLog index 0ec6eb8..c0fd95b 100644 --- a/contrib/binutils/include/ChangeLog +++ b/contrib/binutils/include/ChangeLog @@ -1,7 +1,38 @@ -2002-01-15 Richard Earnshaw <rearnsha@arm.com> +2002-02-08 Alexandre Oliva <aoliva@redhat.com> - * coff/arm.h (F_VFP_FLOAT): Define. - * elf/arm.h (F_VFP_FLOAT, EF_ARM_VFP_FLOAT): Define. + Contribute sh64-elf. + 2000-11-25 Hans-Peter Nilsson <hpn@cygnus.com> + * dis-asm.h (print_insn_sh64): New prototype. + (print_insn_sh64l): New prototype. + (print_insn_sh64x_media): New prototype. + +2002-02-05 Frank Ch. Eigler <fche@redhat.com> + + * dis-asm.h (disassemble_info): New field `insn_sets'. + (INIT_DISASSEMBLE_INFO): Clear it. + +2002-02-05 Jason Merrill <jason@redhat.com> + + * demangle.h (cplus_demangle_v3): Add "options" parm. + (cplus_demangle_v3_type): Remove prototype. + (DMGL_VERBOSE): New macro. + (DMGL_TYPES): New macro. + +2002-02-02 H.J. Lu (hjl@gnu.org) + + * demangle.h (cplus_demangle_v3_type): New prototype. + +2002-01-31 Ivan Guzvinec <ivang@opencores.org> + + * dis-asm.h : Add support for or32 targets + +2002-01-28 Kaveh R. Ghazi <ghazi@caip.rutgers.edu> + + * libiberty.h (C_alloca): Add ATTRIBUTE_MALLOC. + +2002-01-27 David O'Brien <obrien@FreeBSD.org> + + * cgen.h (BFD_VERSION): Use BFD_VERSION_DATE instead. 2001-12-14 Nick Clifton <nickc@cambridge.redhat.com> @@ -10,7 +41,6 @@ 2001-12-13 Jakub Jelinek <jakub@redhat.com> - * elf/common.h (PT_GNU_EH_FRAME): Define. * bfdlink.h (struct bfd_link_info): Add eh_frame_hdr field. 2001-12-07 Geoffrey Keating <geoffk@redhat.com> @@ -36,7 +66,7 @@ 2001-10-24 Neil Booth <neil@daikokuya.demon.co.uk> - * include/safe-ctype.h (_sch_isbasic, IS_ISOBASIC): New. + * safe-ctype.h (_sch_isbasic, IS_ISOBASIC): New. 2001-10-22 Kaveh R. Ghazi <ghazi@caip.rutgers.edu> @@ -79,11 +109,6 @@ * libiberty.h (ASTRDUP): New macro. libiberty_optr, libiberty_nptr, libiberty_len): Declare. -2001-09-17 Kaveh R. Ghazi <ghazi@caip.rutgers.edu> - - * libiberty.h (ASTRDUP): New macro. - libiberty_optr, libiberty_nptr, libiberty_len): Declare. - 2001-08-29 Kaveh R. Ghazi <ghazi@caip.rutgers.edu> * ansidecl.h: Update comments reflecting previous change. @@ -143,17 +168,11 @@ * hashtab.h (htab_hash_string): Declare. -2001-06-13 Andrew Cagney <ac131313@redhat.com> +2001-08-10 Andrew Cagney <ac131313@redhat.com> * libiberty.h (lbasename): Change function declaration to return a const char pointer. -2001-08-10 Richard Sandiford <rsandifo@redhat.com> - - * opcode/mips.h (INSN_GP32): Remove. - (OPCODE_IS_MEMBER): Remove gp32 parameter. - (M_MOVE): New macro identifier. - 2001-08-02 Mark Kettenis <kettenis@gnu.org> * xregex.h (_REGEX_RE_COMP): Define. @@ -165,19 +184,10 @@ * bfdlink.h (struct bfd_link_info): add new boolean field pei386_auto_import. -2001-08-01 Aldy Hernandez <aldyh@redhat.com> - - * opcode/mips.h (INSN_ISA_MASK): Nuke bits 12-15. - 2001-07-18 Andreas Jaeger <aj@suse.de> * xregex2.h: Place under LGPL version 2.1. -2001-07-12 Jeff Johnston <jjohnstn@redhat.com> - - * opcode/cgen.h (CGEN_INSN): Add regex support. - (build_insn_regex): Declare. - 2001-07-10 Jeff Johnston <jjohnstn@redhat.com> * xregex.h: New file to support libiberty regex. @@ -195,11 +205,6 @@ * ansidecl.h (NULL_PTR): Delete. -2001-05-11 Jakub Jelinek <jakub@redhat.com> - - * elf/ia64.h (ELF_STRING_ia64_unwind_once): Define. - (ELF_STRING_ia64_unwind_info_once): Define. - 2001-05-07 Zack Weinberg <zackw@stanford.edu> * demangle.h: Use PARAMS for all prototypes. @@ -312,11 +317,11 @@ * getopt.h obstack.h: Standarize copyright statement. -2000-12-05 Richard Henderson <rth@redhat.com> +2000-12-04 Richard Henderson <rth@redhat.com> * demangle.h: Change "new_abi" to "v3" everywhere. -2000-11-29 Zack Weinberg <zack@wolery.stanford.edu> +2000-11-22 Zack Weinberg <zack@wolery.stanford.edu> * libiberty.h: Move #includes to top. Prototype xmalloc_failed. diff --git a/contrib/binutils/include/coff/ChangeLog b/contrib/binutils/include/coff/ChangeLog index b8882bc..79e8e18 100644 --- a/contrib/binutils/include/coff/ChangeLog +++ b/contrib/binutils/include/coff/ChangeLog @@ -1,3 +1,11 @@ +2002-02-01 Tom Rix <trix@redhat.com> + + * xcoff.h: Conditionally support <aiaff> for pre AIX 4.3. + +2002-01-31 Ivan Guzvinec <ivang@opencores.org> + + * or32.h: New file. + 2001-12-24 Tom Rix <trix@redhat.com> * xcoff.h (xcoff_big_format_p): Make <bigaf> the default archive @@ -5,7 +13,6 @@ (XCOFFARMAG_ELEMENT_SIZE, XCOFFARMAGBIG_ELEMENT_SIZE): Define for archive header ascii elements. - 2001-12-17 Tom Rix <trix@redhat.com> * xcoff.h : Add .except and .typchk section string and styp flags. @@ -15,6 +22,10 @@ * xcoff.h : Clean up formatting. +2002-01-15 Richard Earnshaw <rearnsha@arm.com> + + * arm.h (F_VFP_FLOAT): Define. + 2001-11-11 Timothy Wall <twall@alum.mit.edu> * ti.h: Move arch-specific stuff from here... diff --git a/contrib/binutils/include/demangle.h b/contrib/binutils/include/demangle.h index a898218..ad0569a 100644 --- a/contrib/binutils/include/demangle.h +++ b/contrib/binutils/include/demangle.h @@ -29,6 +29,8 @@ #define DMGL_PARAMS (1 << 0) /* Include function args */ #define DMGL_ANSI (1 << 1) /* Include const, volatile, etc */ #define DMGL_JAVA (1 << 2) /* Demangle as Java rather than C++. */ +#define DMGL_VERBOSE (1 << 3) /* Include implementation details. */ +#define DMGL_TYPES (1 << 4) /* Also try to demangle type encodings. */ #define DMGL_AUTO (1 << 8) #define DMGL_GNU (1 << 9) @@ -125,7 +127,7 @@ cplus_demangle_name_to_style PARAMS ((const char *name)); /* V3 ABI demangling entry points, defined in cp-demangle.c. */ extern char* -cplus_demangle_v3 PARAMS ((const char* mangled)); +cplus_demangle_v3 PARAMS ((const char* mangled, int options)); extern char* java_demangle_v3 PARAMS ((const char* mangled)); diff --git a/contrib/binutils/include/dis-asm.h b/contrib/binutils/include/dis-asm.h index 4e16ed3..decc863 100644 --- a/contrib/binutils/include/dis-asm.h +++ b/contrib/binutils/include/dis-asm.h @@ -1,6 +1,6 @@ /* Interface between the opcode library and its callers. - Copyright 2001 Free Software Foundation, Inc. + Copyright 2001, 2002 Free Software Foundation, Inc. This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by @@ -73,6 +73,11 @@ typedef struct disassemble_info { unsigned long mach; /* Endianness (for bi-endian cpus). Mono-endian cpus can ignore this. */ enum bfd_endian endian; + /* An arch/mach-specific bitmask of selected instruction subsets, mainly + for processors with run-time-switchable instruction sets. The default, + zero, means that there is no constraint. CGEN-based opcodes ports + may use ISA_foo masks. */ + unsigned long insn_sets; /* Some targets need information about the current section to accurately display insns. If this is NULL, the target disassembler function @@ -212,6 +217,8 @@ extern int print_insn_mn10200 PARAMS ((bfd_vma, disassemble_info*)); extern int print_insn_mn10300 PARAMS ((bfd_vma, disassemble_info*)); extern int print_insn_ns32k PARAMS ((bfd_vma, disassemble_info*)); extern int print_insn_openrisc PARAMS ((bfd_vma, disassemble_info*)); +extern int print_insn_big_or32 PARAMS ((bfd_vma, disassemble_info*)); +extern int print_insn_little_or32 PARAMS ((bfd_vma, disassemble_info*)); extern int print_insn_pdp11 PARAMS ((bfd_vma, disassemble_info*)); extern int print_insn_pj PARAMS ((bfd_vma, disassemble_info*)); extern int print_insn_big_powerpc PARAMS ((bfd_vma, disassemble_info*)); @@ -227,6 +234,9 @@ extern int print_insn_v850 PARAMS ((bfd_vma, disassemble_info*)); extern int print_insn_vax PARAMS ((bfd_vma, disassemble_info*)); extern int print_insn_w65 PARAMS ((bfd_vma, disassemble_info*)); extern int print_insn_xstormy16 PARAMS ((bfd_vma, disassemble_info*)); +extern int print_insn_sh64 PARAMS ((bfd_vma, disassemble_info *)); +extern int print_insn_sh64l PARAMS ((bfd_vma, disassemble_info *)); +extern int print_insn_sh64x_media PARAMS ((bfd_vma, disassemble_info *)); extern disassembler_ftype arc_get_disassembler PARAMS ((void *)); extern disassembler_ftype cris_get_disassembler PARAMS ((bfd *)); @@ -273,6 +283,7 @@ extern int generic_symbol_at_address (INFO).flavour = bfd_target_unknown_flavour, \ (INFO).arch = bfd_arch_unknown, \ (INFO).mach = 0, \ + (INFO).insn_sets = 0, \ (INFO).endian = BFD_ENDIAN_UNKNOWN, \ (INFO).octets_per_byte = 1, \ INIT_DISASSEMBLE_INFO_NO_ARCH(INFO, STREAM, FPRINTF_FUNC) diff --git a/contrib/binutils/include/elf/ChangeLog b/contrib/binutils/include/elf/ChangeLog index a0b4f71..e70f7fd 100644 --- a/contrib/binutils/include/elf/ChangeLog +++ b/contrib/binutils/include/elf/ChangeLog @@ -1,7 +1,91 @@ +2002-02-13 Matt Fredette <fredette@netbsd.org> + + * m68k.h (EF_M68000): Define. + +2002-02-12 Alan Modra <amodra@bigpond.net.au> + + * ppc.h (DT_PPC64_OPD, DT_PPC64_OPDSZ): Define. + +2002-02-09 Richard Henderson <rth@redhat.com> + + * alpha.h (R_ALPHA_BRSGP): New. + +2002-02-08 Alexandre Oliva <aoliva@redhat.com> + + Contribute sh64-elf. + 2002-01-23 Alexandre Oliva <aoliva@redhat.com> + * sh.h (R_SH_GOTPLT32, R_SH_GOT_LOW16, R_SH_GOT_MEDLOW16, + R_SH_GOT_MEDHI16, R_SH_GOT_HI16, R_SH_GOTPLT_LOW16, + R_SH_GOTPLT_MEDLOW16, R_SH_GOTPLT_MEDHI16, R_SH_GOTPLT_HI16, + R_SH_PLT_LOW16, R_SH_PLT_MEDLOW16, R_SH_PLT_MEDHI16, + R_SH_PLT_HI16, R_SH_GOTOFF_LOW16, R_SH_GOTOFF_MEDLOW16, + R_SH_GOTOFF_MEDHI16, R_SH_GOTOFF_HI16, R_SH_GOTPC_LOW16, + R_SH_GOTPC_MEDLOW16, R_SH_GOTPC_MEDHI16, R_SH_GOTPC_HI16, + R_SH_GOT10BY4, R_SH_GOTPLT10BY4, R_SH_GOT10BY8, + R_SH_GOTPLT10BY8, R_SH_COPY64, R_SH_GLOB_DAT64, R_SH_JMP_SLOT64, + R_SH_RELATIVE64): New relocs. + (R_SH_FIRST_INVALID_RELOC_4): Adjust. + 2001-05-16 Alexandre Oliva <aoliva@redhat.com> + * sh.h: Renumbered and renamed some SH5 relocations to match + official numbers and names; moved unmaching ones to the range + 0xf2-0xff. + 2001-01-06 Hans-Peter Nilsson <hpn@cygnus.com> + * sh.h (sh64_get_contents_type): Declare. + (sh64_address_is_shmedia): Likewise. + 2000-12-30 Hans-Peter Nilsson <hpn@cygnus.com> + * sh.h (sh64_elf_crange): New type. + (struct sh64_section_data): New. + (sh64_elf_section_data): New macro. + (EF_SH5): Rename back from EF_SH64. + 2000-12-18 Hans-Peter Nilsson <hpn@cygnus.com> + * sh.h (SHF_SH5_ISA32_MIXED, SHT_SH5_CR_SORTED, + SH64_CRANGES_SECTION_NAME, SH64_CRANGE_SIZE, + SH64_CRANGE_CR_ADDR_OFFSET, SH64_CRANGE_CR_SIZE_OFFSET, + SH64_CRANGE_CR_TYPE_OFFSET): New macros. + 2000-12-12 Hans-Peter Nilsson <hpn@cygnus.com> + * sh.h (EF_SH64): Don't define EF_SH64_ABI64. + 2000-11-27 Hans-Peter Nilsson <hpn@cygnus.com> + * sh.h (EF_SH64_32BIT_ABI, EF_SH64_64BIT_ABI): Delete. + (EF_SH64_ABI64): New. + 2000-11-23 Hans-Peter Nilsson <hpn@cygnus.com> + * sh.h (EF_SH64): Rename from EF_SH5. + (EF_SH64_32BIT_ABI): New. + (EF_SH64_64BIT_ABI): New. + (R_SH_PT_16, R_SH_SHMEDIA_CODE + R_SH_IMMU5, R_SH_IMMS6, R_SH_IMMU6, R_SH_IMMS10, R_SH_IMMS10BY2, + R_SH_IMMS10BY4, R_SH_IMMS10BY8, R_SH_IMMS16, R_SH_IMMU16, + R_SH_IMM_LOW16, R_SH_IMM_LOW16_PCREL, R_SH_IMM_MEDLOW16, + R_SH_IMM_MEDLOW16_PCREL, R_SH_IMM_MEDHI16, R_SH_IMM_MEDHI16_PCREL, + R_SH_IMM_HI16, R_SH_IMM_HI16_PCREL, R_SH_64, R_SH_64_PCREL): New + relocs. + 2000-09-01 Ben Elliston <bje@redhat.com> + * sh.h (EF_SH5): Define. + +2002-02-01 Hans-Peter Nilsson <hp@bitrange.com> + + * mmix.h: Tweak comments. + (MMIX_LD_ALLOCATED_REG_CONTENTS_SECTION_NAME): New. + [BFD_ARCH_SIZE] (_bfd_mmix_prepare_linker_allocated_gregs, + _bfd_mmix_finalize_linker_allocated_gregs, + _bfd_mmix_check_all_relocs): Provide prototypes. + +2002-01-31 Ivan Guzvinec <ivang@opencores.org> + + * or32.h: New file. + * common.h: Add support for or32 targets. + +2002-01-28 Jason Merrill <jason@redhat.com> + + * dwarf2.h: Sync with gcc version. + 2002-01-16 Alan Modra <amodra@bigpond.net.au> * ppc.h (DT_PPC64_GLINK): Define. +2002-01-15 Richard Earnshaw <rearnsha@arm.com> + + * arm.h (F_VFP_FLOAT, EF_ARM_VFP_FLOAT): Define. + 2002-01-09 Jason Thorpe <thorpej@wasabisystems.com> * common.h: Update copyright years. @@ -24,6 +108,10 @@ unsigned int. * common.h (SHN_BAD): Define. +2001-12-13 Jakub Jelinek <jakub@redhat.com> + + * elf/common.h (PT_GNU_EH_FRAME): Define. + 2001-12-11 Alan Modra <amodra@bigpond.net.au> * common.h (SHN_XINDEX): Comment typo fix. @@ -90,7 +178,7 @@ (E_H8_MACH_H8300, E_H8_MACH_H8300H, E_H8_MACH_H8300S): New machine types. -Tue Aug 26 23:32:34 2001 J"orn Rennecke <amylaar@redhat.com> +2001-08-26 J"orn Rennecke <amylaar@redhat.com> * h8.h: New file. @@ -118,6 +206,11 @@ Tue Aug 26 23:32:34 2001 J"orn Rennecke <amylaar@redhat.com> * common.h: Remove definition of EM_MIPS_RS4_BE. The constant was never in active use and is used otherwise by the ABI. +2001-05-11 Jakub Jelinek <jakub@redhat.com> + + * ia64.h (ELF_STRING_ia64_unwind_once): Define. + (ELF_STRING_ia64_unwind_info_once): Define. + 2001-05-07 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de> * external.h: Fix typo. @@ -390,8 +483,8 @@ Tue Aug 26 23:32:34 2001 J"orn Rennecke <amylaar@redhat.com> (ELFOSABI_MODESTO): Defined. (ELFOSABI_OPENBSD): Likewise. -Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com> - David Mosberger <davidm@hpl.hp.com> +2000-04-21 Richard Henderson <rth@cygnus.com> + David Mosberger <davidm@hpl.hp.com> * ia64.h: New file. @@ -425,7 +518,7 @@ Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com> (PF_ARM_PI): Define. (PF_ARM_ABS): Define. -Wed Apr 5 22:08:59 2000 J"orn Rennecke <amylaar@cygnus.co.uk> +2000-04-05 J"orn Rennecke <amylaar@cygnus.co.uk> * sh.h (R_SH_LOOP_START, R_SH_LOOP_END): New RELOC_NUMBERs. @@ -454,7 +547,7 @@ Wed Apr 5 22:08:59 2000 J"orn Rennecke <amylaar@cygnus.co.uk> * common.h (ELFOSABI_LINUX): Define. -Thu Feb 17 00:18:33 2000 J"orn Rennecke <amylaar@cygnus.co.uk> +2000-02-17 J"orn Rennecke <amylaar@cygnus.co.uk> * sh.h: (EF_SH_MACH_MASK, EF_SH_UNKNOWN, EF_SH1, EF_SH2): New macros. (EF_SH3, EF_SH_HAS_DSP, EF_SH_DSP, EF_SH3_DSP): Likewise. diff --git a/contrib/binutils/include/elf/alpha.h b/contrib/binutils/include/elf/alpha.h index ab429d4..e937b81 100644 --- a/contrib/binutils/include/elf/alpha.h +++ b/contrib/binutils/include/elf/alpha.h @@ -94,6 +94,11 @@ START_RELOC_NUMBERS (elf_alpha_reloc_type) RELOC_NUMBER (R_ALPHA_JMP_SLOT, 26) /* Create PLT entry */ RELOC_NUMBER (R_ALPHA_RELATIVE, 27) /* Adjust by program base */ + /* Like BRADDR, but assert that the source and target object file + share the same GP value, and adjust the target address for + STO_ALPHA_STD_GPLOAD. */ + RELOC_NUMBER (R_ALPHA_BRSGP, 28) + END_RELOC_NUMBERS (R_ALPHA_max) #endif /* _ELF_ALPHA_H */ diff --git a/contrib/binutils/include/elf/common.h b/contrib/binutils/include/elf/common.h index 289d3f2..d6e45fc 100644 --- a/contrib/binutils/include/elf/common.h +++ b/contrib/binutils/include/elf/common.h @@ -199,6 +199,9 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ /* Old version of PowerPC, this should be removed shortly. */ #define EM_PPC_OLD 17 +/* (Depreciated) Temporary number for the OpenRISC processor. */ +#define EM_OR32 0x8472 + /* Cygnus M32R ELF backend. Written in the absence of an ABI. */ #define EM_CYGNUS_M32R 0x9041 diff --git a/contrib/binutils/include/elf/dwarf2.h b/contrib/binutils/include/elf/dwarf2.h index a99dca7..53eb655 100644 --- a/contrib/binutils/include/elf/dwarf2.h +++ b/contrib/binutils/include/elf/dwarf2.h @@ -1,6 +1,6 @@ /* Declarations and definitions of codes relating to the DWARF2 symbolic debugging information format. - Copyright 1992, 1993, 1995, 1996, 1999, 2000, 2001 + Copyright (C) 1992, 1993, 1995, 1996, 1997, 1999, 2000, 2001, 2002 Free Software Foundation, Inc. Written by Gary Funck (gary@intrepid.com) The Ada Joint Program @@ -10,21 +10,22 @@ Derived from the DWARF 1 implementation written by Ron Guilmette (rfg@netcom.com), November 1990. -This file is part of GNU CC. +This file is part of GCC. -GNU CC is free software; you can redistribute it and/or modify it -under the terms of the GNU General Public License as published by the -Free Software Foundation; either version 2, or (at your option) any -later version. +GCC is free software; you can redistribute it and/or modify it under +the terms of the GNU General Public License as published by the Free +Software Foundation; either version 2, or (at your option) any later +version. -GNU CC is distributed in the hope that it will be useful, but WITHOUT -ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +GCC is distributed in the hope that it will be useful, but WITHOUT ANY +WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to the Free -Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ +along with GCC; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ /* This file is derived from the DWARF specification (a public document) Revision 2.0.0 (July 27, 1993) developed by the UNIX International @@ -32,7 +33,7 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * by UNIX International. Copies of this specification are available from UNIX International, 20 Waterview Boulevard, Parsippany, NJ, 07054. - This file also now contains definitions from the DWARF 2.1 specification. */ + This file also now contains definitions from the DWARF 3 specification. */ /* This file is shared between GCC and GDB, and should not contain prototypes. */ @@ -177,7 +178,7 @@ enum dwarf_tag DW_TAG_variant_part = 0x33, DW_TAG_variable = 0x34, DW_TAG_volatile_type = 0x35, - /* DWARF 2.1. */ + /* DWARF 3. */ DW_TAG_dwarf_procedure = 0x36, DW_TAG_restrict_type = 0x37, DW_TAG_interface_type = 0x38, @@ -190,8 +191,8 @@ enum dwarf_tag DW_TAG_MIPS_loop = 0x4081, /* GNU extensions. */ DW_TAG_format_label = 0x4101, /* For FORTRAN 77 and Fortran 90. */ - DW_TAG_function_template = 0x4102, /* for C++ */ - DW_TAG_class_template = 0x4103, /* for C++ */ + DW_TAG_function_template = 0x4102, /* For C++. */ + DW_TAG_class_template = 0x4103, /* For C++. */ DW_TAG_GNU_BINCL = 0x4104, DW_TAG_GNU_EINCL = 0x4105 }; @@ -295,7 +296,7 @@ enum dwarf_attribute DW_AT_variable_parameter = 0x4b, DW_AT_virtuality = 0x4c, DW_AT_vtable_elem_location = 0x4d, - /* DWARF 2.1 values. */ + /* DWARF 3 values. */ DW_AT_allocated = 0x4e, DW_AT_associated = 0x4f, DW_AT_data_location = 0x50, @@ -326,7 +327,9 @@ enum dwarf_attribute DW_AT_mac_info = 0x2103, DW_AT_src_coords = 0x2104, DW_AT_body_begin = 0x2105, - DW_AT_body_end = 0x2106 + DW_AT_body_end = 0x2106, + /* VMS Extensions. */ + DW_AT_VMS_rtnbeg_pd_address = 0x2201 }; #define DW_AT_lo_user 0x2000 /* Implementation-defined range start. */ @@ -480,10 +483,10 @@ enum dwarf_location_atom DW_OP_deref_size = 0x94, DW_OP_xderef_size = 0x95, DW_OP_nop = 0x96, - /* DWARF 2.1 extensions. */ + /* DWARF 3 extensions. */ DW_OP_push_object_address = 0x97, - DW_OP_call2 = 0x98, /* 1 2-byte offset of DIE. */ - DW_OP_call4 = 0x99, /* 1 4-byte offset of DIE. */ + DW_OP_call2 = 0x98, + DW_OP_call4 = 0x99, DW_OP_calli = 0x9a }; @@ -502,7 +505,7 @@ enum dwarf_type DW_ATE_signed_char = 0x6, DW_ATE_unsigned = 0x7, DW_ATE_unsigned_char = 0x8, - /* DWARF 2.1. */ + /* DWARF 3. */ DW_ATE_imaginary_float = 0x9 }; @@ -589,7 +592,7 @@ enum dwarf_line_number_ops DW_LNS_set_basic_block = 7, DW_LNS_const_add_pc = 8, DW_LNS_fixed_advance_pc = 9, - /* DWARF 3 */ + /* DWARF 3. */ DW_LNS_set_prologue_end = 10, DW_LNS_set_epilogue_begin = 11, DW_LNS_set_isa = 12 @@ -624,9 +627,10 @@ enum dwarf_call_frame_info DW_CFA_def_cfa = 0x0c, DW_CFA_def_cfa_register = 0x0d, DW_CFA_def_cfa_offset = 0x0e, + + /* DWARF 3. */ DW_CFA_def_cfa_expression = 0x0f, DW_CFA_expression = 0x10, - /* Dwarf 2.1. */ DW_CFA_offset_extended_sf = 0x11, DW_CFA_def_cfa_sf = 0x12, DW_CFA_def_cfa_offset_sf = 0x13, @@ -666,7 +670,7 @@ enum dwarf_source_language DW_LANG_Pascal83 = 0x0009, DW_LANG_Modula2 = 0x000a, DW_LANG_Java = 0x000b, - /* DWARF 2.1. */ + /* DWARF 3. */ DW_LANG_C99 = 0x000c, DW_LANG_Ada95 = 0x000d, DW_LANG_Fortran95 = 0x000e, diff --git a/contrib/binutils/include/elf/m68k.h b/contrib/binutils/include/elf/m68k.h index 03bf465..7769c59 100644 --- a/contrib/binutils/include/elf/m68k.h +++ b/contrib/binutils/include/elf/m68k.h @@ -53,5 +53,6 @@ START_RELOC_NUMBERS (elf_m68k_reloc_type) END_RELOC_NUMBERS (R_68K_max) #define EF_CPU32 0x00810000 +#define EF_M68000 0x01000000 #endif diff --git a/contrib/binutils/include/elf/mmix.h b/contrib/binutils/include/elf/mmix.h index fa367e5..e3be26b 100644 --- a/contrib/binutils/include/elf/mmix.h +++ b/contrib/binutils/include/elf/mmix.h @@ -1,5 +1,5 @@ /* MMIX support for BFD. - Copyright (C) 2001 Free Software Foundation, Inc. + Copyright (C) 2001, 2002 Free Software Foundation, Inc. This file is part of BFD, the Binary File Descriptor library. @@ -82,7 +82,10 @@ START_RELOC_NUMBERS (elf_mmix_reloc_type) /* A general register. */ RELOC_NUMBER (R_MMIX_REG, 33) - /* A global register and an offset, equivalent of the expression. */ + /* A global register and an offset, the global register (allocated at + link time) contents plus the offset made equivalent to the relocation + expression at link time. The relocation must point at the Y field of + an instruction. */ RELOC_NUMBER (R_MMIX_BASE_PLUS_OFFSET, 34) /* A LOCAL assertion. */ @@ -107,6 +110,11 @@ END_RELOC_NUMBERS (R_MMIX_max) unspecified) ABI. */ #define MMIX_REG_CONTENTS_SECTION_NAME ".MMIX.reg_contents" +/* At link time, a section by this name is created, expected to be + included in MMIX_REG_CONTENTS_SECTION_NAME in the output. */ +#define MMIX_LD_ALLOCATED_REG_CONTENTS_SECTION_NAME \ + ".MMIX.reg_contents.linker_allocated" + /* This is a faked section holding symbols with SHN_REGISTER. Don't confuse it with MMIX_REG_CONTENTS_SECTION_NAME; this one has no contents, just values. It is an error for a value in this section to @@ -148,4 +156,13 @@ END_RELOC_NUMBERS (R_MMIX_max) #define MMO_SEC_IS_COMMON 0x8000 #define MMO_SEC_DEBUGGING 0x10000 +#ifdef BFD_ARCH_SIZE +extern boolean _bfd_mmix_prepare_linker_allocated_gregs + PARAMS ((bfd *, struct bfd_link_info *)); +extern boolean _bfd_mmix_finalize_linker_allocated_gregs + PARAMS ((bfd *, struct bfd_link_info *)); +extern boolean _bfd_mmix_check_all_relocs + PARAMS ((bfd *, struct bfd_link_info *)); +#endif + #endif /* ELF_MMIX_H */ diff --git a/contrib/binutils/include/elf/or32.h b/contrib/binutils/include/elf/or32.h new file mode 100644 index 0000000..14884f3 --- /dev/null +++ b/contrib/binutils/include/elf/or32.h @@ -0,0 +1,62 @@ +/* OR1K ELF support for BFD. Derived from ppc.h. + Copyright (C) 2002 Free Software Foundation, Inc. + Contributed by Ivan Guzvinec <ivang@opencores.org> + + This file is part of BFD, the Binary File Descriptor library. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +#ifndef _ELF_OR1K_H +#define _ELF_OR1K_H + +#include "elf/reloc-macros.h" + +/* Relocations. */ +START_RELOC_NUMBERS (elf_or32_reloc_type) + RELOC_NUMBER (R_OR32_NONE, 0) + RELOC_NUMBER (R_OR32_32, 1) + RELOC_NUMBER (R_OR32_16, 2) + RELOC_NUMBER (R_OR32_8, 3) + RELOC_NUMBER (R_OR32_CONST, 4) + RELOC_NUMBER (R_OR32_CONSTH, 5) + RELOC_NUMBER (R_OR32_JUMPTARG, 6) + RELOC_NUMBER (R_OR32_GNU_VTENTRY, 7) + RELOC_NUMBER (R_OR32_GNU_VTINHERIT, 8) +END_RELOC_NUMBERS (R_OR32_max) + +/* Four bit OR32 machine type field. */ +#define EF_OR32_MACH 0x0000000f + +/* Various CPU types. */ +#define E_OR32_MACH_BASE 0x00000000 +#define E_OR32_MACH_UNUSED1 0x00000001 +#define E_OR32_MACH_UNUSED2 0x00000002 +#define E_OR32_MACH_UNUSED4 0x00000003 + +/* Processor specific section headers, sh_type field */ +#define SHT_ORDERED SHT_HIPROC /* Link editor is to sort the \ + entries in this section \ + based on the address \ + specified in the associated \ + symbol table entry. */ + +/* Processor specific section flags, sh_flags field */ +#define SHF_EXCLUDE 0x80000000 /* Link editor is to exclude \ + this section from executable \ + and shared objects that it \ + builds when those objects \ + are not to be furhter \ + relocated. */ +#endif /* _ELF_OR1K_H */ diff --git a/contrib/binutils/include/elf/ppc.h b/contrib/binutils/include/elf/ppc.h index 8e4af62f..dfb43f4 100644 --- a/contrib/binutils/include/elf/ppc.h +++ b/contrib/binutils/include/elf/ppc.h @@ -174,6 +174,10 @@ END_RELOC_NUMBERS (R_PPC_max) /* Specify the start of the .glink section. */ #define DT_PPC64_GLINK DT_LOPROC +/* Specify the start and size of the .opd section. */ +#define DT_PPC64_OPD (DT_LOPROC + 1) +#define DT_PPC64_OPDSZ (DT_LOPROC + 2) + /* Processor specific flags for the ELF header e_flags field. */ #define EF_PPC_EMB 0x80000000 /* PowerPC embedded flag. */ diff --git a/contrib/binutils/include/elf/sh.h b/contrib/binutils/include/elf/sh.h index 700ca3e..1480f49 100644 --- a/contrib/binutils/include/elf/sh.h +++ b/contrib/binutils/include/elf/sh.h @@ -1,5 +1,5 @@ /* SH ELF support for BFD. - Copyright 1998, 2000 Free Software Foundation, Inc. + Copyright 1998, 2000, 2001, 2002 Free Software Foundation, Inc. This file is part of BFD, the Binary File Descriptor library. @@ -34,6 +34,9 @@ #define EF_SH3E 8 #define EF_SH4 9 +/* This one can only mix in objects from other EF_SH5 objects. */ +#define EF_SH5 10 + #define EF_SH_MERGE_MACH(mach1, mach2) \ (((((mach1) == EF_SH3 || (mach1) == EF_SH_UNKNOWN) && (mach2) == EF_SH_DSP) \ || ((mach1) == EF_SH_DSP \ @@ -47,6 +50,77 @@ ? EF_SH4 \ : ((mach1) > (mach2) ? (mach1) : (mach2))) +/* Flags for the st_other symbol field. + Keep away from the STV_ visibility flags (bit 0..1). */ + +/* A reference to this symbol should by default add 1. */ +#define STO_SH5_ISA32 (1 << 2) + +/* Section contains only SHmedia code (no SHcompact code). */ +#define SHF_SH5_ISA32 0x40000000 + +/* Section contains both SHmedia and SHcompact code, and possibly also + constants. */ +#define SHF_SH5_ISA32_MIXED 0x20000000 + +/* If applied to a .cranges section, marks that the section is sorted by + increasing cr_addr values. */ +#define SHT_SH5_CR_SORTED 0x80000001 + +/* Symbol should be handled as DataLabel (attached to global SHN_UNDEF + symbols). */ +#define STT_DATALABEL STT_LOPROC + +#define SH64_CRANGES_SECTION_NAME ".cranges" +enum sh64_elf_cr_type { + CRT_NONE = 0, + CRT_DATA = 1, + CRT_SH5_ISA16 = 2, + CRT_SH5_ISA32 = 3 +}; + +/* The official definition is this: + + typedef struct { + Elf32_Addr cr_addr; + Elf32_Word cr_size; + Elf32_Half cr_type; + } Elf32_CRange; + + but we have no use for that exact type. Instead we use this struct for + the internal representation. */ +typedef struct { + bfd_vma cr_addr; + bfd_size_type cr_size; + enum sh64_elf_cr_type cr_type; +} sh64_elf_crange; + +#define SH64_CRANGE_SIZE (4 + 4 + 2) +#define SH64_CRANGE_CR_ADDR_OFFSET 0 +#define SH64_CRANGE_CR_SIZE_OFFSET 4 +#define SH64_CRANGE_CR_TYPE_OFFSET (4 + 4) + +/* Get the contents type of an arbitrary address, or return CRT_NONE. */ +extern enum sh64_elf_cr_type sh64_get_contents_type + PARAMS ((asection *, bfd_vma, sh64_elf_crange *)); + +/* Simpler interface. + FIXME: This seems redundant now that we export the interface above. */ +extern boolean sh64_address_is_shmedia PARAMS ((asection *, bfd_vma)); + +/* We put this in elf_section_data (section)->tdata. */ +struct sh64_section_data +{ + flagword contents_flags; + + /* Only used in the cranges section, but we don't have an official + backend-specific bfd field. */ + bfd_size_type cranges_growth; +}; + +#define sh64_elf_section_data(sec) \ + ((struct sh64_section_data *) ((elf_section_data (sec))->tdata)) + #include "elf/reloc-macros.h" /* Relocations. */ @@ -79,7 +153,16 @@ START_RELOC_NUMBERS (elf_sh_reloc_type) RELOC_NUMBER (R_SH_LOOP_START, 36) RELOC_NUMBER (R_SH_LOOP_END, 37) FAKE_RELOC (R_SH_FIRST_INVALID_RELOC_2, 38) - FAKE_RELOC (R_SH_LAST_INVALID_RELOC_2, 159) + FAKE_RELOC (R_SH_LAST_INVALID_RELOC_2, 44) + RELOC_NUMBER (R_SH_DIR5U, 45) + RELOC_NUMBER (R_SH_DIR6U, 46) + RELOC_NUMBER (R_SH_DIR6S, 47) + RELOC_NUMBER (R_SH_DIR10S, 48) + RELOC_NUMBER (R_SH_DIR10SW, 49) + RELOC_NUMBER (R_SH_DIR10SL, 50) + RELOC_NUMBER (R_SH_DIR10SQ, 51) + FAKE_RELOC (R_SH_FIRST_INVALID_RELOC_3, 52) + FAKE_RELOC (R_SH_LAST_INVALID_RELOC_3, 159) RELOC_NUMBER (R_SH_GOT32, 160) RELOC_NUMBER (R_SH_PLT32, 161) RELOC_NUMBER (R_SH_COPY, 162) @@ -88,6 +171,51 @@ START_RELOC_NUMBERS (elf_sh_reloc_type) RELOC_NUMBER (R_SH_RELATIVE, 165) RELOC_NUMBER (R_SH_GOTOFF, 166) RELOC_NUMBER (R_SH_GOTPC, 167) + RELOC_NUMBER (R_SH_GOTPLT32, 168) + RELOC_NUMBER (R_SH_GOT_LOW16, 169) + RELOC_NUMBER (R_SH_GOT_MEDLOW16, 170) + RELOC_NUMBER (R_SH_GOT_MEDHI16, 171) + RELOC_NUMBER (R_SH_GOT_HI16, 172) + RELOC_NUMBER (R_SH_GOTPLT_LOW16, 173) + RELOC_NUMBER (R_SH_GOTPLT_MEDLOW16, 174) + RELOC_NUMBER (R_SH_GOTPLT_MEDHI16, 175) + RELOC_NUMBER (R_SH_GOTPLT_HI16, 176) + RELOC_NUMBER (R_SH_PLT_LOW16, 177) + RELOC_NUMBER (R_SH_PLT_MEDLOW16, 178) + RELOC_NUMBER (R_SH_PLT_MEDHI16, 179) + RELOC_NUMBER (R_SH_PLT_HI16, 180) + RELOC_NUMBER (R_SH_GOTOFF_LOW16, 181) + RELOC_NUMBER (R_SH_GOTOFF_MEDLOW16, 182) + RELOC_NUMBER (R_SH_GOTOFF_MEDHI16, 183) + RELOC_NUMBER (R_SH_GOTOFF_HI16, 184) + RELOC_NUMBER (R_SH_GOTPC_LOW16, 185) + RELOC_NUMBER (R_SH_GOTPC_MEDLOW16, 186) + RELOC_NUMBER (R_SH_GOTPC_MEDHI16, 187) + RELOC_NUMBER (R_SH_GOTPC_HI16, 188) + RELOC_NUMBER (R_SH_GOT10BY4, 189) + RELOC_NUMBER (R_SH_GOTPLT10BY4, 190) + RELOC_NUMBER (R_SH_GOT10BY8, 191) + RELOC_NUMBER (R_SH_GOTPLT10BY8, 192) + RELOC_NUMBER (R_SH_COPY64, 193) + RELOC_NUMBER (R_SH_GLOB_DAT64, 194) + RELOC_NUMBER (R_SH_JMP_SLOT64, 195) + RELOC_NUMBER (R_SH_RELATIVE64, 196) + FAKE_RELOC (R_SH_FIRST_INVALID_RELOC_4, 197) + FAKE_RELOC (R_SH_LAST_INVALID_RELOC_4, 241) + RELOC_NUMBER (R_SH_SHMEDIA_CODE, 242) + RELOC_NUMBER (R_SH_PT_16, 243) + RELOC_NUMBER (R_SH_IMMS16, 244) + RELOC_NUMBER (R_SH_IMMU16, 245) + RELOC_NUMBER (R_SH_IMM_LOW16, 246) + RELOC_NUMBER (R_SH_IMM_LOW16_PCREL, 247) + RELOC_NUMBER (R_SH_IMM_MEDLOW16, 248) + RELOC_NUMBER (R_SH_IMM_MEDLOW16_PCREL, 249) + RELOC_NUMBER (R_SH_IMM_MEDHI16, 250) + RELOC_NUMBER (R_SH_IMM_MEDHI16_PCREL, 251) + RELOC_NUMBER (R_SH_IMM_HI16, 252) + RELOC_NUMBER (R_SH_IMM_HI16_PCREL, 253) + RELOC_NUMBER (R_SH_64, 254) + RELOC_NUMBER (R_SH_64_PCREL, 255) END_RELOC_NUMBERS (R_SH_max) #endif diff --git a/contrib/binutils/include/libiberty.h b/contrib/binutils/include/libiberty.h index 455643d..3e0ca09 100644 --- a/contrib/binutils/include/libiberty.h +++ b/contrib/binutils/include/libiberty.h @@ -1,6 +1,6 @@ /* Function declarations for libiberty. - Copyright 2001 Free Software Foundation, Inc. + Copyright 2001, 2002 Free Software Foundation, Inc. Note - certain prototypes declared in this header file are for functions whoes implementation copyright does not belong to the @@ -283,7 +283,7 @@ extern int vasprintf PARAMS ((char **, const char *, va_list)) USE_C_ALLOCA yourself. The canonical autoconf macro C_ALLOCA is also set/unset as it is often used to indicate whether code needs to call alloca(0). */ -extern PTR C_alloca PARAMS((size_t)); +extern PTR C_alloca PARAMS ((size_t)) ATTRIBUTE_MALLOC; #undef alloca #if GCC_VERSION >= 2000 && !defined USE_C_ALLOCA # define alloca(x) __builtin_alloca(x) diff --git a/contrib/binutils/include/opcode/ChangeLog b/contrib/binutils/include/opcode/ChangeLog index dcde56b..9703eee 100644 --- a/contrib/binutils/include/opcode/ChangeLog +++ b/contrib/binutils/include/opcode/ChangeLog @@ -1,3 +1,22 @@ +Mon Feb 18 17:26:10 CET 2002 Jan Hubicka <jh@suse.cz> + + * i386.h (push,pop): Fix Reg64 to WordReg to allow 16bit operands. + +Fri Feb 15 15:16:40 CET 2002 Jan Hubicka <jh@suse.cz> + + * i386.h (push,pop): Allow 16bit operands in 64bit mode. + (xchg): Fix. + (in, out): Disable 64bit operands. + (call, jmp): Avoid REX prefixes. + (jcxz): Prohibit in 64bit mode + (jrcxz, loop): Add 64bit variants. + (movq): Fix patterns. + (movmskps, pextrw, pinstrw): Add 64bit variants. + +2002-01-31 Ivan Guzvinec <ivang@opencores.org> + + * or32.h: New file. + 2002-01-22 Graydon Hoare <graydon@redhat.com> * cgen.h (CGEN_MAYBE_MULTI_IFLD): New structure. @@ -118,11 +137,26 @@ Mon Dec 31 16:45:41 2001 Jeffrey A Law (law@cygnus.com) * ppc.h: Revert 2001-08-08. +2001-08-10 Richard Sandiford <rsandifo@redhat.com> + + * mips.h (INSN_GP32): Remove. + (OPCODE_IS_MEMBER): Remove gp32 parameter. + (M_MOVE): New macro identifier. + 2001-08-08 Alan Modra <amodra@one.net.au> 1999-10-25 Torbjorn Granlund <tege@swox.com> * ppc.h (struct powerpc_operand): New field `reloc'. +2001-08-01 Aldy Hernandez <aldyh@redhat.com> + + * mips.h (INSN_ISA_MASK): Nuke bits 12-15. + +2001-07-12 Jeff Johnston <jjohnstn@redhat.com> + + * cgen.h (CGEN_INSN): Add regex support. + (build_insn_regex): Declare. + 2001-07-11 Frank Ch. Eigler <fche@redhat.com> * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field. diff --git a/contrib/binutils/include/opcode/cgen.h b/contrib/binutils/include/opcode/cgen.h index e603b55..09c5cbf 100644 --- a/contrib/binutils/include/opcode/cgen.h +++ b/contrib/binutils/include/opcode/cgen.h @@ -26,7 +26,7 @@ with this program; if not, write to the Free Software Foundation, Inc., Perhaps the definition of bfd_vma can be moved outside of bfd.h. Or perhaps one could duplicate its definition in another file. Until such time, this file conditionally compiles definitions that require - bfd_vma using BFD_VERSION. */ + bfd_vma using BFD_VERSION_DATE. */ /* Enums must be defined before they can be used. Allow them to be used in struct definitions, even though the enum must @@ -276,7 +276,7 @@ typedef const char * (cgen_parse_fn) PC is the pc value of the insn. The result is an error message or NULL if success. */ -#ifdef BFD_VERSION +#ifdef BFD_VERSION_DATE typedef const char * (cgen_insert_fn) PARAMS ((CGEN_CPU_DESC, const CGEN_INSN *insn_, CGEN_FIELDS *fields_, CGEN_INSN_BYTES_PTR insnp_, @@ -297,7 +297,7 @@ typedef const char * (cgen_insert_fn) (); PC is the pc value of the insn. The result is the length of the insn in bits or zero if not recognized. */ -#ifdef BFD_VERSION +#ifdef BFD_VERSION_DATE typedef int (cgen_extract_fn) PARAMS ((CGEN_CPU_DESC, const CGEN_INSN *insn_, CGEN_EXTRACT_INFO *ex_info_, CGEN_INSN_INT base_insn_, @@ -316,7 +316,7 @@ typedef int (cgen_extract_fn) (); PC is the pc value of the insn. LEN is the length of the insn, in bits. */ -#ifdef BFD_VERSION +#ifdef BFD_VERSION_DATE typedef void (cgen_print_fn) PARAMS ((CGEN_CPU_DESC, PTR info_, const CGEN_INSN *insn_, CGEN_FIELDS *fields_, bfd_vma pc_, int len_)); @@ -381,7 +381,7 @@ enum cgen_parse_operand_result CGEN_PARSE_OPERAND_RESULT_ERROR }; -#ifdef BFD_VERSION /* Don't require bfd.h unnecessarily. */ +#ifdef BFD_VERSION_DATE /* Don't require bfd.h unnecessarily. */ typedef const char * (cgen_parse_operand_fn) PARAMS ((CGEN_CPU_DESC, enum cgen_parse_operand_type, const char **, int, int, @@ -565,7 +565,7 @@ const CGEN_KEYWORD_ENTRY *cgen_keyword_search_next extern const char *cgen_parse_keyword PARAMS ((CGEN_CPU_DESC, const char **, CGEN_KEYWORD *, long *)); -#ifdef BFD_VERSION /* Don't require bfd.h unnecessarily. */ +#ifdef BFD_VERSION_DATE /* Don't require bfd.h unnecessarily. */ extern const char *cgen_parse_signed_integer PARAMS ((CGEN_CPU_DESC, const char **, int, long *)); extern const char *cgen_parse_unsigned_integer @@ -1253,7 +1253,7 @@ typedef struct cgen_cpu_desc const char * (*parse_operand) PARAMS ((CGEN_CPU_DESC, int opindex_, const char **, CGEN_FIELDS *fields_)); -#ifdef BFD_VERSION +#ifdef BFD_VERSION_DATE const char * (*insert_operand) PARAMS ((CGEN_CPU_DESC, int opindex_, CGEN_FIELDS *fields_, CGEN_INSN_BYTES_PTR, bfd_vma pc_)); @@ -1286,7 +1286,7 @@ typedef struct cgen_cpu_desc PARAMS ((CGEN_CPU_DESC, int opindex_, const CGEN_FIELDS *fields_)); void (*set_int_operand) PARAMS ((CGEN_CPU_DESC, int opindex_, CGEN_FIELDS *fields_, int value_)); -#ifdef BFD_VERSION +#ifdef BFD_VERSION_DATE bfd_vma (*get_vma_operand) PARAMS ((CGEN_CPU_DESC, int opindex_, const CGEN_FIELDS *fields_)); void (*set_vma_operand) diff --git a/contrib/binutils/include/opcode/i386.h b/contrib/binutils/include/opcode/i386.h index 571990e..43d7208 100644 --- a/contrib/binutils/include/opcode/i386.h +++ b/contrib/binutils/include/opcode/i386.h @@ -62,6 +62,7 @@ static const template i386_optab[] = { #define wl_Suf (No_bSuf|No_sSuf|No_xSuf|No_qSuf) #define wlq_Suf (No_bSuf|No_sSuf|No_xSuf) #define lq_Suf (No_bSuf|No_wSuf|No_sSuf|No_xSuf) +#define wq_Suf (No_bSuf|No_lSuf|No_sSuf|No_xSuf) #define sl_Suf (No_bSuf|No_wSuf|No_xSuf|No_qSuf) #define sldx_Suf (No_bSuf|No_wSuf|No_qSuf) #define bwl_Suf (No_sSuf|No_xSuf|No_qSuf) @@ -148,12 +149,12 @@ static const template i386_optab[] = { {"push", 1, 0x06, X, 0|CpuNo64, wl_Suf|Seg2ShortForm|DefaultSize, { SReg2, 0, 0 } }, {"push", 1, 0x0fa0, X, Cpu386|CpuNo64, wl_Suf|Seg3ShortForm|DefaultSize, { SReg3, 0, 0 } }, /* In 64bit mode, the operand size is implicitly 64bit. */ -{"push", 1, 0x50, X, Cpu64, q_Suf|ShortForm|DefaultSize|NoRex64, { Reg64, 0, 0 } }, -{"push", 1, 0xff, 6, Cpu64, q_Suf|Modrm|DefaultSize|NoRex64, { Reg64|WordMem, 0, 0 } }, -{"push", 1, 0x6a, X, Cpu186|Cpu64, q_Suf|DefaultSize|NoRex64, { Imm8S, 0, 0} }, -{"push", 1, 0x68, X, Cpu186|Cpu64, q_Suf|DefaultSize|NoRex64, { Imm32S, 0, 0} }, -{"push", 1, 0x06, X, Cpu64, q_Suf|Seg2ShortForm|DefaultSize|NoRex64, { SReg2, 0, 0 } }, -{"push", 1, 0x0fa0, X, Cpu386|Cpu64, q_Suf|Seg3ShortForm|DefaultSize|NoRex64, { SReg3, 0, 0 } }, +{"push", 1, 0x50, X, Cpu64, wq_Suf|ShortForm|DefaultSize|NoRex64, { WordReg, 0, 0 } }, +{"push", 1, 0xff, 6, Cpu64, wq_Suf|Modrm|DefaultSize|NoRex64, { WordReg|WordMem, 0, 0 } }, +{"push", 1, 0x6a, X, Cpu186|Cpu64, wq_Suf|DefaultSize|NoRex64, { Imm8S, 0, 0} }, +{"push", 1, 0x68, X, Cpu186|Cpu64, wq_Suf|DefaultSize|NoRex64, { Imm32S|Imm16, 0, 0} }, +{"push", 1, 0x06, X, Cpu64, wq_Suf|Seg2ShortForm|DefaultSize|NoRex64, { SReg2, 0, 0 } }, +{"push", 1, 0x0fa0, X, Cpu386|Cpu64, wq_Suf|Seg3ShortForm|DefaultSize|NoRex64, { SReg3, 0, 0 } }, {"pusha", 0, 0x60, X, Cpu186|CpuNo64, wl_Suf|DefaultSize, { 0, 0, 0 } }, @@ -164,10 +165,10 @@ static const template i386_optab[] = { {"pop", 1, 0x07, X, CpuNo64, wl_Suf|Seg2ShortForm|DefaultSize, { SReg2, 0, 0 } }, {"pop", 1, 0x0fa1, X, Cpu386|CpuNo64, wl_Suf|Seg3ShortForm|DefaultSize, { SReg3, 0, 0 } }, /* In 64bit mode, the operand size is implicitly 64bit. */ -{"pop", 1, 0x58, X, Cpu64, q_Suf|ShortForm|DefaultSize|NoRex64, { Reg64, 0, 0 } }, -{"pop", 1, 0x8f, 0, Cpu64, q_Suf|Modrm|DefaultSize|NoRex64, { Reg64|WordMem, 0, 0 } }, -{"pop", 1, 0x07, X, Cpu64, q_Suf|Seg2ShortForm|DefaultSize|NoRex64, { SReg2, 0, 0 } }, -{"pop", 1, 0x0fa1, X, Cpu64, q_Suf|Seg3ShortForm|DefaultSize|NoRex64, { SReg3, 0, 0 } }, +{"pop", 1, 0x58, X, Cpu64, wq_Suf|ShortForm|DefaultSize|NoRex64, { WordReg, 0, 0 } }, +{"pop", 1, 0x8f, 0, Cpu64, wq_Suf|Modrm|DefaultSize|NoRex64, { WordReg|WordMem, 0, 0 } }, +{"pop", 1, 0x07, X, Cpu64, wq_Suf|Seg2ShortForm|DefaultSize|NoRex64, { SReg2, 0, 0 } }, +{"pop", 1, 0x0fa1, X, Cpu64, wq_Suf|Seg3ShortForm|DefaultSize|NoRex64, { SReg3, 0, 0 } }, {"popa", 0, 0x61, X, Cpu186|CpuNo64, wl_Suf|DefaultSize, { 0, 0, 0 } }, @@ -176,20 +177,20 @@ static const template i386_optab[] = { In the 64bit code, xchg eax, eax is reused for new nop instruction. */ -{"xchg", 2, 0x90, X, CpuNo64, wl_Suf|ShortForm, { WordReg, Acc, 0 } }, -{"xchg", 2, 0x90, X, CpuNo64, wl_Suf|ShortForm, { Acc, WordReg, 0 } }, +{"xchg", 2, 0x90, X, 0, wlq_Suf|ShortForm, { WordReg, Acc, 0 } }, +{"xchg", 2, 0x90, X, 0, wlq_Suf|ShortForm, { Acc, WordReg, 0 } }, {"xchg", 2, 0x86, X, 0, bwlq_Suf|W|Modrm, { Reg, Reg|AnyMem, 0 } }, {"xchg", 2, 0x86, X, 0, bwlq_Suf|W|Modrm, { Reg|AnyMem, Reg, 0 } }, /* In/out from ports. */ -{"in", 2, 0xe4, X, 0, bwlq_Suf|W, { Imm8, Acc, 0 } }, -{"in", 2, 0xec, X, 0, bwlq_Suf|W, { InOutPortReg, Acc, 0 } }, -{"in", 1, 0xe4, X, 0, bwlq_Suf|W, { Imm8, 0, 0 } }, -{"in", 1, 0xec, X, 0, bwlq_Suf|W, { InOutPortReg, 0, 0 } }, -{"out", 2, 0xe6, X, 0, bwlq_Suf|W, { Acc, Imm8, 0 } }, -{"out", 2, 0xee, X, 0, bwlq_Suf|W, { Acc, InOutPortReg, 0 } }, -{"out", 1, 0xe6, X, 0, bwlq_Suf|W, { Imm8, 0, 0 } }, -{"out", 1, 0xee, X, 0, bwlq_Suf|W, { InOutPortReg, 0, 0 } }, +{"in", 2, 0xe4, X, 0, bwl_Suf|W, { Imm8, Acc, 0 } }, +{"in", 2, 0xec, X, 0, bwl_Suf|W, { InOutPortReg, Acc, 0 } }, +{"in", 1, 0xe4, X, 0, bwl_Suf|W, { Imm8, 0, 0 } }, +{"in", 1, 0xec, X, 0, bwl_Suf|W, { InOutPortReg, 0, 0 } }, +{"out", 2, 0xe6, X, 0, bwl_Suf|W, { Acc, Imm8, 0 } }, +{"out", 2, 0xee, X, 0, bwl_Suf|W, { Acc, InOutPortReg, 0 } }, +{"out", 1, 0xe6, X, 0, bwl_Suf|W, { Imm8, 0, 0 } }, +{"out", 1, 0xee, X, 0, bwl_Suf|W, { InOutPortReg, 0, 0 } }, /* Load effective address. */ {"lea", 2, 0x8d, X, 0, wlq_Suf|Modrm, { WordMem, WordReg, 0 } }, @@ -210,9 +211,9 @@ static const template i386_optab[] = { {"lahf", 0, 0x9f, X, CpuNo64,NoSuf, { 0, 0, 0} }, {"sahf", 0, 0x9e, X, CpuNo64,NoSuf, { 0, 0, 0} }, {"pushf", 0, 0x9c, X, CpuNo64,wlq_Suf|DefaultSize, { 0, 0, 0} }, -{"pushf", 0, 0x9c, X, Cpu64, q_Suf|DefaultSize|NoRex64,{ 0, 0, 0} }, +{"pushf", 0, 0x9c, X, Cpu64, wq_Suf|DefaultSize|NoRex64,{ 0, 0, 0} }, {"popf", 0, 0x9d, X, CpuNo64,wlq_Suf|DefaultSize, { 0, 0, 0} }, -{"popf", 0, 0x9d, X, Cpu64, q_Suf|DefaultSize|NoRex64,{ 0, 0, 0} }, +{"popf", 0, 0x9d, X, Cpu64, wq_Suf|DefaultSize|NoRex64,{ 0, 0, 0} }, {"stc", 0, 0xf9, X, 0, NoSuf, { 0, 0, 0} }, {"std", 0, 0xfd, X, 0, NoSuf, { 0, 0, 0} }, {"sti", 0, 0xfb, X, 0, NoSuf, { 0, 0, 0} }, @@ -370,7 +371,8 @@ static const template i386_optab[] = { /* Control transfer instructions. */ {"call", 1, 0xe8, X, 0, wlq_Suf|JumpDword|DefaultSize, { Disp16|Disp32, 0, 0} }, -{"call", 1, 0xff, 2, 0, wlq_Suf|Modrm|DefaultSize, { WordReg|WordMem|JumpAbsolute, 0, 0} }, +{"call", 1, 0xff, 2, CpuNo64, wl_Suf|Modrm|DefaultSize, { WordReg|WordMem|JumpAbsolute, 0, 0} }, +{"call", 1, 0xff, 2, Cpu64, wq_Suf|Modrm|DefaultSize|NoRex64,{ WordReg|WordMem|JumpAbsolute, 0, 0} }, /* Intel Syntax */ {"call", 2, 0x9a, X, CpuNo64,wlq_Suf|JumpInterSegment|DefaultSize, { Imm16, Imm16|Imm32, 0} }, /* Intel Syntax */ @@ -381,7 +383,8 @@ static const template i386_optab[] = { #define JUMP_PC_RELATIVE 0xeb {"jmp", 1, 0xeb, X, 0, NoSuf|Jump, { Disp, 0, 0} }, -{"jmp", 1, 0xff, 4, 0, wlq_Suf|Modrm, { WordReg|WordMem|JumpAbsolute, 0, 0} }, +{"jmp", 1, 0xff, 4, CpuNo64, wl_Suf|Modrm, { WordReg|WordMem|JumpAbsolute, 0, 0} }, +{"jmp", 1, 0xff, 4, Cpu64, wq_Suf|Modrm|NoRex64, { WordReg|WordMem|JumpAbsolute, 0, 0} }, /* Intel Syntax */ {"jmp", 2, 0xea, X, CpuNo64,wl_Suf|JumpInterSegment, { Imm16, Imm16|Imm32, 0} }, /* Intel Syntax */ @@ -432,18 +435,25 @@ static const template i386_optab[] = { {"jg", 1, 0x7f, X, 0, NoSuf|Jump, { Disp, 0, 0} }, /* jcxz vs. jecxz is chosen on the basis of the address size prefix. */ -{"jcxz", 1, 0xe3, X, 0, NoSuf|JumpByte|Size16, { Disp, 0, 0} }, -{"jecxz", 1, 0xe3, X, 0, NoSuf|JumpByte|Size32, { Disp, 0, 0} }, +{"jcxz", 1, 0xe3, X, CpuNo64,NoSuf|JumpByte|Size16, { Disp, 0, 0} }, +{"jecxz", 1, 0xe3, X, CpuNo64,NoSuf|JumpByte|Size32, { Disp, 0, 0} }, +{"jecxz", 1, 0x67e3, X, Cpu64,NoSuf|JumpByte|Size32, { Disp, 0, 0} }, +{"jrcxz", 1, 0xe3, X, Cpu64, NoSuf|JumpByte|Size64|NoRex64, { Disp, 0, 0} }, /* The loop instructions also use the address size prefix to select %cx rather than %ecx for the loop count, so the `w' form of these instructions emit an address size prefix rather than a data size prefix. */ -{"loop", 1, 0xe2, X, 0, wlq_Suf|JumpByte, { Disp, 0, 0} }, -{"loopz", 1, 0xe1, X, 0, wlq_Suf|JumpByte, { Disp, 0, 0} }, -{"loope", 1, 0xe1, X, 0, wlq_Suf|JumpByte, { Disp, 0, 0} }, -{"loopnz", 1, 0xe0, X, 0, wlq_Suf|JumpByte, { Disp, 0, 0} }, -{"loopne", 1, 0xe0, X, 0, wlq_Suf|JumpByte, { Disp, 0, 0} }, +{"loop", 1, 0xe2, X, CpuNo64,wl_Suf|JumpByte,{ Disp, 0, 0} }, +{"loop", 1, 0xe2, X, Cpu64, lq_Suf|JumpByte|NoRex64,{ Disp, 0, 0} }, +{"loopz", 1, 0xe1, X, CpuNo64,wl_Suf|JumpByte,{ Disp, 0, 0} }, +{"loopz", 1, 0xe1, X, Cpu64, lq_Suf|JumpByte|NoRex64,{ Disp, 0, 0} }, +{"loope", 1, 0xe1, X, CpuNo64,wl_Suf|JumpByte,{ Disp, 0, 0} }, +{"loope", 1, 0xe1, X, Cpu64, lq_Suf|JumpByte|NoRex64,{ Disp, 0, 0} }, +{"loopnz", 1, 0xe0, X, CpuNo64,wl_Suf|JumpByte,{ Disp, 0, 0} }, +{"loopnz", 1, 0xe0, X, Cpu64, lq_Suf|JumpByte|NoRex64,{ Disp, 0, 0} }, +{"loopne", 1, 0xe0, X, CpuNo64,wl_Suf|JumpByte,{ Disp, 0, 0} }, +{"loopne", 1, 0xe0, X, Cpu64, lq_Suf|JumpByte|NoRex64,{ Disp, 0, 0} }, /* Set byte on flag instructions. */ {"seto", 1, 0x0f90, 0, Cpu386, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, @@ -482,10 +492,10 @@ static const template i386_optab[] = { {"cmps", 2, 0xa6, X, 0, bwlq_Suf|W|IsString, { AnyMem|EsSeg, AnyMem, 0} }, {"scmp", 0, 0xa6, X, 0, bwlq_Suf|W|IsString, { 0, 0, 0} }, {"scmp", 2, 0xa6, X, 0, bwlq_Suf|W|IsString, { AnyMem|EsSeg, AnyMem, 0} }, -{"ins", 0, 0x6c, X, Cpu186, bwlq_Suf|W|IsString, { 0, 0, 0} }, -{"ins", 2, 0x6c, X, Cpu186, bwlq_Suf|W|IsString, { InOutPortReg, AnyMem|EsSeg, 0} }, -{"outs", 0, 0x6e, X, Cpu186, bwlq_Suf|W|IsString, { 0, 0, 0} }, -{"outs", 2, 0x6e, X, Cpu186, bwlq_Suf|W|IsString, { AnyMem, InOutPortReg, 0} }, +{"ins", 0, 0x6c, X, Cpu186, bwl_Suf|W|IsString, { 0, 0, 0} }, +{"ins", 2, 0x6c, X, Cpu186, bwl_Suf|W|IsString, { InOutPortReg, AnyMem|EsSeg, 0} }, +{"outs", 0, 0x6e, X, Cpu186, bwl_Suf|W|IsString, { 0, 0, 0} }, +{"outs", 2, 0x6e, X, Cpu186, bwl_Suf|W|IsString, { AnyMem, InOutPortReg, 0} }, {"lods", 0, 0xac, X, 0, bwlq_Suf|W|IsString, { 0, 0, 0} }, {"lods", 1, 0xac, X, 0, bwlq_Suf|W|IsString, { AnyMem, 0, 0} }, {"lods", 2, 0xac, X, 0, bwlq_Suf|W|IsString, { AnyMem, Acc, 0} }, @@ -971,12 +981,16 @@ static const template i386_optab[] = { {"movd", 2, 0x660f6e,X,CpuSSE2,FP|Modrm, { Reg32|LLongMem, RegXMM, 0 } }, {"movd", 2, 0x660f7e,X,CpuSSE2,FP|Modrm, { RegXMM, Reg32|LLongMem, 0 } }, /* Real MMX instructions. */ +{"movd", 2, 0x0f6e, X, CpuMMX, FP|Modrm, { Reg64|LLongMem, RegMMX, 0 } }, +{"movd", 2, 0x0f7e, X, CpuMMX, FP|Modrm, { RegMMX, Reg64|LLongMem, 0 } }, +{"movd", 2, 0x660f6e,X,CpuSSE2,FP|Modrm, { Reg64|LLongMem, RegXMM, 0 } }, +{"movd", 2, 0x660f7e,X,CpuSSE2,FP|Modrm, { RegXMM, Reg64|LLongMem, 0 } }, +/* In the 64bit mode the short form mov immediate is redefined to have + 64bit displacement value. */ {"movq", 2, 0x0f6f, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, {"movq", 2, 0x0f7f, X, CpuMMX, FP|Modrm, { RegMMX, RegMMX|LongMem, 0 } }, {"movq", 2, 0xf30f7e,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, {"movq", 2, 0x660fd6,X,CpuSSE2,FP|Modrm, { RegXMM, RegXMM|LLongMem, 0 } }, -/* In the 64bit mode the short form mov immediate is redefined to have - 64bit displacement value. */ {"movq", 2, 0x88, X, Cpu64, NoSuf|D|W|Modrm|Size64,{ Reg64, Reg64|AnyMem, 0 } }, {"movq", 2, 0xc6, 0, Cpu64, NoSuf|W|Modrm|Size64, { Imm32S, Reg64|WordMem, 0 } }, {"movq", 2, 0xb0, X, Cpu64, NoSuf|W|ShortForm|Size64,{ Imm64, Reg64, 0 } }, @@ -1140,7 +1154,7 @@ static const template i386_optab[] = { {"movlhps", 2, 0x0f16, X, CpuSSE, FP|Modrm, { RegXMM|InvMem, RegXMM, 0 } }, {"movlps", 2, 0x0f12, X, CpuSSE, FP|Modrm, { LLongMem, RegXMM, 0 } }, {"movlps", 2, 0x0f13, X, CpuSSE, FP|Modrm, { RegXMM, LLongMem, 0 } }, -{"movmskps", 2, 0x0f50, X, CpuSSE, FP|Modrm, { RegXMM|InvMem, Reg32, 0 } }, +{"movmskps", 2, 0x0f50, X, CpuSSE, lq_Suf|IgnoreSize|Modrm, { RegXMM|InvMem, Reg32|Reg64, 0 } }, {"movntps", 2, 0x0f2b, X, CpuSSE, FP|Modrm, { RegXMM, LLongMem, 0 } }, {"movntq", 2, 0x0fe7, X, CpuSSE, FP|Modrm, { RegMMX, LLongMem, 0 } }, {"movntdq", 2, 0x660fe7, X, CpuSSE2,FP|Modrm, { RegXMM, LLongMem, 0 } }, @@ -1155,10 +1169,10 @@ static const template i386_optab[] = { {"pavgb", 2, 0x660fe0, X, CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, {"pavgw", 2, 0x0fe3, X, CpuSSE, FP|Modrm, { RegMMX|LLongMem, RegMMX, 0 } }, {"pavgw", 2, 0x660fe3, X, CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, -{"pextrw", 3, 0x0fc5, X, CpuSSE, FP|Modrm, { Imm8, RegMMX|InvMem, Reg32 } }, -{"pextrw", 3, 0x660fc5, X, CpuSSE2,FP|Modrm, { Imm8, RegXMM|InvMem, Reg32 } }, -{"pinsrw", 3, 0x0fc4, X, CpuSSE, FP|Modrm, { Imm8, Reg32|ShortMem, RegMMX } }, -{"pinsrw", 3, 0x660fc4, X, CpuSSE2, FP|Modrm, { Imm8, Reg32|ShortMem, RegXMM } }, +{"pextrw", 3, 0x0fc5, X, CpuSSE, lq_Suf|IgnoreSize|Modrm, { Imm8, RegMMX|InvMem, Reg32|Reg64 } }, +{"pextrw", 3, 0x660fc5, X, CpuSSE2,lq_Suf|IgnoreSize|Modrm, { Imm8, RegXMM|InvMem, Reg32|Reg64 } }, +{"pinsrw", 3, 0x0fc4, X, CpuSSE, lq_Suf|IgnoreSize|Modrm, { Imm8, Reg32|Reg64|ShortMem, RegMMX } }, +{"pinsrw", 3, 0x660fc4, X, CpuSSE2, lq_Suf|IgnoreSize|Modrm, { Imm8, Reg32|Reg64|ShortMem, RegXMM } }, {"pmaxsw", 2, 0x0fee, X, CpuSSE, FP|Modrm, { RegMMX|LLongMem, RegMMX, 0 } }, {"pmaxsw", 2, 0x660fee, X, CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, {"pmaxub", 2, 0x0fde, X, CpuSSE, FP|Modrm, { RegMMX|LLongMem, RegMMX, 0 } }, @@ -1167,8 +1181,8 @@ static const template i386_optab[] = { {"pminsw", 2, 0x660fea, X, CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, {"pminub", 2, 0x0fda, X, CpuSSE, FP|Modrm, { RegMMX|LLongMem, RegMMX, 0 } }, {"pminub", 2, 0x660fda, X, CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, -{"pmovmskb", 2, 0x0fd7, X, CpuSSE, FP|Modrm, { RegMMX|InvMem, Reg32, 0 } }, -{"pmovmskb", 2, 0x660fd7, X, CpuSSE2,FP|Modrm, { RegXMM|InvMem, Reg32, 0 } }, +{"pmovmskb", 2, 0x0fd7, X, CpuSSE, lq_Suf|IgnoreSize|Modrm, { RegMMX|InvMem, Reg32|Reg64, 0 } }, +{"pmovmskb", 2, 0x660fd7, X, CpuSSE2,lq_Suf|IgnoreSize|Modrm, { RegXMM|InvMem, Reg32|Reg64, 0 } }, {"pmulhuw", 2, 0x0fe4, X, CpuSSE, FP|Modrm, { RegMMX|LLongMem, RegMMX, 0 } }, {"pmulhuw", 2, 0x660fe4, X, CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, {"prefetchnta", 1, 0x0f18, 0, CpuSSE, FP|Modrm, { LLongMem, 0, 0 } }, @@ -1233,7 +1247,7 @@ static const template i386_optab[] = { {"movhpd", 2, 0x660f17, X, CpuSSE2, FP|Modrm, { RegXMM, LLongMem, 0 } }, {"movlpd", 2, 0x660f12, X, CpuSSE2, FP|Modrm, { LLongMem, RegXMM, 0 } }, {"movlpd", 2, 0x660f13, X, CpuSSE2, FP|Modrm, { RegXMM, LLongMem, 0 } }, -{"movmskpd", 2, 0x660f50, X, CpuSSE2, FP|Modrm, { RegXMM|InvMem, Reg32, 0 } }, +{"movmskpd", 2, 0x660f50, X, CpuSSE2, lq_Suf|IgnoreSize|Modrm, { RegXMM|InvMem, Reg32|Reg64, 0 } }, {"movntpd", 2, 0x660f2b, X, CpuSSE2, FP|Modrm, { RegXMM, LLongMem, 0 } }, {"movsd", 2, 0xf20f10, X, CpuSSE2, FP|Modrm, { RegXMM|LongMem, RegXMM, 0 } }, {"movsd", 2, 0xf20f11, X, CpuSSE2, FP|Modrm, { RegXMM, RegXMM|LongMem, 0 } }, |